Jack Berkhout / FT813

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Dependents:   20180621_FT813

Fork of FT810 by Curtis Mattull

src/FT_GPU_Hal.cpp@10:6a81aeca25e3, 2018-07-23 (annotated)

Committer:
JackB
Date:
Mon Jul 23 12:22:23 2018 +0000
Revision:
10:6a81aeca25e3
Parent:
8:b5a41d1581ad 
FT813

Who changed what in which revision?

UserRevisionLine numberNew contents of line
JackB 10:6a81aeca25e3 1 /* mbed Library for FTDI FT813 Enbedded Video Engine "EVE"
cpm219 0:2d0ef4830603 2 * based on Original Code Sample from FTDI
cpm219 0:2d0ef4830603 3 * ported to mbed by Peter Drescher, DC2PD 2014
cpm219 0:2d0ef4830603 4 * Released under the MIT License: http://mbed.org/license/mit
cpm219 0:2d0ef4830603 5 * 19.09.14 changed to shorter function names
cpm219 0:2d0ef4830603 6 * FTDI was using very long names.
cpm219 0:2d0ef4830603 7 * Ft_App_Flush_Co_Buffer -> Flush_Co_Buffer ... */
cpm219 0:2d0ef4830603 8
cpm219 0:2d0ef4830603 9 #include "FT_Platform.h"
cpm219 0:2d0ef4830603 10 #include "mbed.h"
cpm219 0:2d0ef4830603 11 #include "FT_LCD_Type.h"
cpm219 6:ce30c1530d71 12 //Serial pc(USBTX, USBRX);
cpm219 0:2d0ef4830603 13
JackB 10:6a81aeca25e3 14 #define SPI_SPEED_START 10000000
JackB 10:6a81aeca25e3 15 #define SPI_SPEED_AFTER 27000000
JackB 10:6a81aeca25e3 16
JackB 10:6a81aeca25e3 17 FT813::FT813(PinName mosi,
cpm219 0:2d0ef4830603 18 PinName miso,
cpm219 0:2d0ef4830603 19 PinName sck,
cpm219 0:2d0ef4830603 20 PinName ss,
cpm219 0:2d0ef4830603 21 PinName intr,
cpm219 0:2d0ef4830603 22 PinName pd)
JackB 10:6a81aeca25e3 23 :
JackB 10:6a81aeca25e3 24 _spi(mosi, miso, sck),
JackB 10:6a81aeca25e3 25 _ss(ss),
JackB 10:6a81aeca25e3 26 _pd(pd),
JackB 10:6a81aeca25e3 27 _f800_isr(InterruptIn(intr))
JackB 10:6a81aeca25e3 28 {
JackB 10:6a81aeca25e3 29 _spi.format(8, 0); // 8 bit spi mode 0
JackB 10:6a81aeca25e3 30 _spi.frequency(SPI_SPEED_START); // start with 10 Mhz SPI clock
JackB 10:6a81aeca25e3 31 _ss = 1; // cs high
JackB 10:6a81aeca25e3 32 _pd = 1; // PD high
JackB 10:6a81aeca25e3 33 Bootup();
JackB 10:6a81aeca25e3 34 _address = 0;
JackB 10:6a81aeca25e3 35 _bitmap_count = 0;
JackB 10:6a81aeca25e3 36 _bitmapCount = 0;
JackB 10:6a81aeca25e3 37 _bitmapAddress = 0;
JackB 10:6a81aeca25e3 38 }
cpm219 0:2d0ef4830603 39
cpm219 0:2d0ef4830603 40
JackB 10:6a81aeca25e3 41 ft_bool_t FT813::Bootup(void)
JackB 10:6a81aeca25e3 42 {
cpm219 6:ce30c1530d71 43 // terminal.printf("Bootup() entered\r\n");
cpm219 0:2d0ef4830603 44 Open();
cpm219 5:506e2de9a9e6 45
cpm219 0:2d0ef4830603 46 BootupConfig();
cpm219 0:2d0ef4830603 47
cpm219 0:2d0ef4830603 48 return(1);
JackB 10:6a81aeca25e3 49 }
cpm219 0:2d0ef4830603 50
cpm219 0:2d0ef4830603 51
JackB 10:6a81aeca25e3 52 ft_void_t FT813::BootupConfig(void)
JackB 10:6a81aeca25e3 53 {
cpm219 0:2d0ef4830603 54 ft_uint8_t chipid;
cpm219 0:2d0ef4830603 55 /* Do a power cycle for safer side */
JackB 10:6a81aeca25e3 56 Powercycle(FT_TRUE);
cpm219 0:2d0ef4830603 57 /*
cpm219 0:2d0ef4830603 58 7/8/16: Curt added the sleep delay below...
cpm219 0:2d0ef4830603 59 */
cpm219 0:2d0ef4830603 60 // Sleep(30);
cpm219 0:2d0ef4830603 61
cpm219 0:2d0ef4830603 62 /* Set the clk to external clock */
JackB 10:6a81aeca25e3 63 HostCommand(FT_GPU_EXTERNAL_OSC);
cpm219 0:2d0ef4830603 64 Sleep(10);
cpm219 0:2d0ef4830603 65
JackB 10:6a81aeca25e3 66 /* Access address 0 to wake up the FT813 */
JackB 10:6a81aeca25e3 67 HostCommand(FT_GPU_ACTIVE_M);
cpm219 0:2d0ef4830603 68 Sleep(500);
cpm219 0:2d0ef4830603 69
cpm219 0:2d0ef4830603 70 /* Switch PLL output to 48MHz */
JackB 10:6a81aeca25e3 71 HostCommand(FT_GPU_PLL_48M);
cpm219 0:2d0ef4830603 72 Sleep(10);
cpm219 0:2d0ef4830603 73
cpm219 0:2d0ef4830603 74 /* Do a core reset for safer side */
JackB 10:6a81aeca25e3 75 HostCommand(FT_GPU_CORE_RESET);
cpm219 0:2d0ef4830603 76 Sleep(500);
JackB 10:6a81aeca25e3 77 //Read Register ID to check if FT813 is ready.
JackB 10:6a81aeca25e3 78 chipid = Rd8(REG_ID);
cpm219 0:2d0ef4830603 79 // chipid = Rd8(0x0C0000);
JackB 10:6a81aeca25e3 80 // printf("ID1: 0x%08X\n", chipid);
cpm219 0:2d0ef4830603 81 while(chipid != 0x7C)
JackB 10:6a81aeca25e3 82 // wait(1);
JackB 10:6a81aeca25e3 83 // printf("ID2: 0x%08X\n", chipid);
cpm219 0:2d0ef4830603 84
cpm219 0:2d0ef4830603 85 // Speed up
JackB 10:6a81aeca25e3 86 // _spi.frequency(50000000); // 30 Mhz SPI clock DC
JackB 10:6a81aeca25e3 87 _spi.frequency(SPI_SPEED_AFTER); // 20 Mhz SPI clock DC
JackB 10:6a81aeca25e3 88 // _spi.frequency(12000000); // 12 Mhz SPI clock
cpm219 0:2d0ef4830603 89 /* Configuration of LCD display */
cpm219 0:2d0ef4830603 90 DispHCycle = my_DispHCycle;
JackB 10:6a81aeca25e3 91 Wr16(REG_HCYCLE, DispHCycle);
cpm219 0:2d0ef4830603 92 DispHOffset = my_DispHOffset;
JackB 10:6a81aeca25e3 93 Wr16(REG_HOFFSET, DispHOffset);
cpm219 0:2d0ef4830603 94 DispWidth = my_DispWidth;
JackB 10:6a81aeca25e3 95 Wr16(REG_HSIZE, DispWidth);
cpm219 0:2d0ef4830603 96 DispHSync0 = my_DispHSync0;
JackB 10:6a81aeca25e3 97 Wr16(REG_HSYNC0, DispHSync0);
cpm219 0:2d0ef4830603 98 DispHSync1 = my_DispHSync1;
JackB 10:6a81aeca25e3 99 Wr16(REG_HSYNC1, DispHSync1);
cpm219 0:2d0ef4830603 100 DispVCycle = my_DispVCycle;
JackB 10:6a81aeca25e3 101 Wr16(REG_VCYCLE, DispVCycle);
cpm219 0:2d0ef4830603 102 DispVOffset = my_DispVOffset;
JackB 10:6a81aeca25e3 103 Wr16(REG_VOFFSET, DispVOffset);
cpm219 0:2d0ef4830603 104 DispHeight = my_DispHeight;
JackB 10:6a81aeca25e3 105 Wr16(REG_VSIZE, DispHeight);
cpm219 0:2d0ef4830603 106 DispVSync0 = my_DispVSync0;
JackB 10:6a81aeca25e3 107 Wr16(REG_VSYNC0, DispVSync0);
cpm219 0:2d0ef4830603 108 DispVSync1 = my_DispVSync1;
JackB 10:6a81aeca25e3 109 Wr16(REG_VSYNC1, DispVSync1);
cpm219 0:2d0ef4830603 110 DispSwizzle = my_DispSwizzle;
JackB 10:6a81aeca25e3 111 Wr8(REG_SWIZZLE, DispSwizzle);
cpm219 0:2d0ef4830603 112 DispPCLKPol = my_DispPCLKPol;
JackB 10:6a81aeca25e3 113 Wr8(REG_PCLK_POL, DispPCLKPol);
JackB 10:6a81aeca25e3 114 Wr8(REG_CSPREAD, 0);
cpm219 0:2d0ef4830603 115 DispPCLK = my_DispPCLK;
JackB 10:6a81aeca25e3 116 Wr8(REG_PCLK, DispPCLK); // After this display is visible on the LCD
cpm219 0:2d0ef4830603 117
JackB 10:6a81aeca25e3 118 Wr16(REG_PWM_HZ, 10000);
cpm219 4:03932ce8a04e 119 //#ifdef Inv_Backlite // turn on backlite
JackB 10:6a81aeca25e3 120 // Wr16(REG_PWM_DUTY, 0);
cpm219 4:03932ce8a04e 121 //#else
JackB 10:6a81aeca25e3 122 Wr16(REG_PWM_DUTY, 255); // Brightness 127
cpm219 4:03932ce8a04e 123 //#endif
JackB 10:6a81aeca25e3 124 Wr8(REG_GPIO_DIR, 0x82); //| Rd8(REG_GPIO_DIR));
JackB 10:6a81aeca25e3 125 Wr8(REG_GPIO, 0x080); //| Rd8(REG_GPIO));
cpm219 0:2d0ef4830603 126
JackB 10:6a81aeca25e3 127 Wr32(RAM_DL, CLEAR(1, 1, 1));
JackB 10:6a81aeca25e3 128 Wr32(RAM_DL+4, DISPLAY());
JackB 10:6a81aeca25e3 129 Wr32(REG_DLSWAP, 1);
cpm219 0:2d0ef4830603 130
JackB 10:6a81aeca25e3 131 Wr16(REG_PCLK, DispPCLK);
cpm219 0:2d0ef4830603 132
JackB 10:6a81aeca25e3 133 /* Touch configuration - configure the resistance value to 1200 */
JackB 10:6a81aeca25e3 134 /* This value is specific to customer requirement and derived by experiment */
JackB 10:6a81aeca25e3 135 // Wr16(REG_TOUCH_RZTHRESH,2400);
JackB 10:6a81aeca25e3 136 Wr16(REG_TOUCH_RZTHRESH, 0xFFFF);
cpm219 0:2d0ef4830603 137 }
cpm219 0:2d0ef4830603 138
cpm219 0:2d0ef4830603 139 /* API to initialize the SPI interface */
JackB 10:6a81aeca25e3 140 ft_bool_t FT813::Init()
cpm219 0:2d0ef4830603 141 {
JackB 10:6a81aeca25e3 142 // This is done in the constructor
cpm219 0:2d0ef4830603 143 return 1;
cpm219 0:2d0ef4830603 144 }
cpm219 0:2d0ef4830603 145
JackB 10:6a81aeca25e3 146 ft_bool_t FT813::Open()
cpm219 0:2d0ef4830603 147 {
cpm219 0:2d0ef4830603 148 cmd_fifo_wp = dl_buff_wp = 0;
cpm219 0:2d0ef4830603 149 status = OPENED;
cpm219 0:2d0ef4830603 150 return 1;
cpm219 0:2d0ef4830603 151 }
cpm219 0:2d0ef4830603 152
JackB 10:6a81aeca25e3 153 ft_void_t FT813::Close()
cpm219 0:2d0ef4830603 154 {
cpm219 0:2d0ef4830603 155 status = CLOSED;
cpm219 0:2d0ef4830603 156 }
cpm219 0:2d0ef4830603 157
JackB 10:6a81aeca25e3 158 ft_void_t FT813::DeInit()
cpm219 0:2d0ef4830603 159 {
cpm219 0:2d0ef4830603 160 }
cpm219 0:2d0ef4830603 161
cpm219 0:2d0ef4830603 162 /*The APIs for reading/writing transfer continuously only with small buffer system*/
JackB 10:6a81aeca25e3 163 ft_void_t FT813::StartTransfer(FT_GPU_TRANSFERDIR_T rw, ft_uint32_t addr)
cpm219 0:2d0ef4830603 164 {
JackB 10:6a81aeca25e3 165 if (FT_GPU_READ == rw) {
cpm219 0:2d0ef4830603 166 _ss = 0; // cs low
cpm219 0:2d0ef4830603 167 _spi.write(addr >> 16);
cpm219 0:2d0ef4830603 168 _spi.write(addr >> 8);
cpm219 0:2d0ef4830603 169 _spi.write(addr & 0xff);
cpm219 0:2d0ef4830603 170 _spi.write(0); //Dummy Read Byte
cpm219 0:2d0ef4830603 171 status = READING;
JackB 10:6a81aeca25e3 172 } else {
cpm219 0:2d0ef4830603 173 _ss = 0; // cs low
cpm219 0:2d0ef4830603 174 _spi.write(0x80 | (addr >> 16));
cpm219 0:2d0ef4830603 175 _spi.write(addr >> 8);
cpm219 0:2d0ef4830603 176 _spi.write(addr & 0xff);
cpm219 0:2d0ef4830603 177 status = WRITING;
cpm219 0:2d0ef4830603 178 }
cpm219 0:2d0ef4830603 179 }
cpm219 0:2d0ef4830603 180
cpm219 0:2d0ef4830603 181
cpm219 0:2d0ef4830603 182 /*The APIs for writing transfer continuously only*/
JackB 10:6a81aeca25e3 183 ft_void_t FT813::StartCmdTransfer(FT_GPU_TRANSFERDIR_T rw, ft_uint16_t count)
cpm219 0:2d0ef4830603 184 {
JackB 10:6a81aeca25e3 185 StartTransfer(rw, cmd_fifo_wp + RAM_CMD);
cpm219 0:2d0ef4830603 186 }
cpm219 0:2d0ef4830603 187
JackB 10:6a81aeca25e3 188 ft_uint8_t FT813::TransferString(const ft_char8_t *string)
cpm219 0:2d0ef4830603 189 {
cpm219 0:2d0ef4830603 190 ft_uint16_t length = strlen(string);
JackB 10:6a81aeca25e3 191 while(length --) {
JackB 10:6a81aeca25e3 192 Transfer8(*string);
JackB 10:6a81aeca25e3 193 string++;
cpm219 0:2d0ef4830603 194 }
cpm219 0:2d0ef4830603 195 //Append one null as ending flag
JackB 10:6a81aeca25e3 196 Transfer8(0);
cpm219 0:2d0ef4830603 197 return(1);
cpm219 0:2d0ef4830603 198 }
cpm219 0:2d0ef4830603 199
cpm219 0:2d0ef4830603 200
JackB 10:6a81aeca25e3 201 ft_uint8_t FT813::Transfer8(ft_uint8_t value)
cpm219 0:2d0ef4830603 202 {
cpm219 0:2d0ef4830603 203 return _spi.write(value);
cpm219 0:2d0ef4830603 204 }
cpm219 0:2d0ef4830603 205
cpm219 0:2d0ef4830603 206
JackB 10:6a81aeca25e3 207 ft_uint16_t FT813::Transfer16(ft_uint16_t value)
cpm219 0:2d0ef4830603 208 {
cpm219 0:2d0ef4830603 209 ft_uint16_t retVal = 0;
cpm219 0:2d0ef4830603 210
JackB 10:6a81aeca25e3 211 if (status == WRITING) {
JackB 10:6a81aeca25e3 212 Transfer8(value & 0xFF);//LSB first
JackB 10:6a81aeca25e3 213 Transfer8((value >> 8) & 0xFF);
JackB 10:6a81aeca25e3 214 } else {
JackB 10:6a81aeca25e3 215 retVal = Transfer8(0);
JackB 10:6a81aeca25e3 216 retVal |= (ft_uint16_t)Transfer8(0) << 8;
cpm219 0:2d0ef4830603 217 }
cpm219 0:2d0ef4830603 218
cpm219 0:2d0ef4830603 219 return retVal;
cpm219 0:2d0ef4830603 220 }
cpm219 0:2d0ef4830603 221
JackB 10:6a81aeca25e3 222 ft_uint32_t FT813::Transfer32(ft_uint32_t value)
cpm219 0:2d0ef4830603 223 {
cpm219 0:2d0ef4830603 224 ft_uint32_t retVal = 0;
JackB 10:6a81aeca25e3 225 if (status == WRITING) {
JackB 10:6a81aeca25e3 226 Transfer16(value & 0xFFFF);//LSB first
JackB 10:6a81aeca25e3 227 Transfer16((value >> 16) & 0xFFFF);
JackB 10:6a81aeca25e3 228 } else {
JackB 10:6a81aeca25e3 229 retVal = Transfer16(0);
JackB 10:6a81aeca25e3 230 retVal |= (ft_uint32_t)Transfer16(0) << 16;
cpm219 0:2d0ef4830603 231 }
cpm219 0:2d0ef4830603 232 return retVal;
cpm219 0:2d0ef4830603 233 }
cpm219 0:2d0ef4830603 234
JackB 10:6a81aeca25e3 235 ft_void_t FT813::EndTransfer()
cpm219 0:2d0ef4830603 236 {
cpm219 0:2d0ef4830603 237 _ss = 1;
cpm219 0:2d0ef4830603 238 status = OPENED;
cpm219 0:2d0ef4830603 239 }
cpm219 0:2d0ef4830603 240
JackB 10:6a81aeca25e3 241 ft_uint8_t FT813::Rd8(ft_uint32_t addr)
cpm219 0:2d0ef4830603 242 {
cpm219 0:2d0ef4830603 243 ft_uint8_t value;
JackB 10:6a81aeca25e3 244 StartTransfer(FT_GPU_READ, addr);
JackB 10:6a81aeca25e3 245 value = Transfer8(0);
JackB 10:6a81aeca25e3 246 EndTransfer();
cpm219 0:2d0ef4830603 247 return value;
cpm219 0:2d0ef4830603 248 }
JackB 10:6a81aeca25e3 249
JackB 10:6a81aeca25e3 250 ft_uint16_t FT813::Rd16(ft_uint32_t addr)
cpm219 0:2d0ef4830603 251 {
cpm219 0:2d0ef4830603 252 ft_uint16_t value;
JackB 10:6a81aeca25e3 253 StartTransfer(FT_GPU_READ, addr);
JackB 10:6a81aeca25e3 254 value = Transfer16(0);
JackB 10:6a81aeca25e3 255 EndTransfer();
cpm219 0:2d0ef4830603 256 return value;
cpm219 0:2d0ef4830603 257 }
JackB 10:6a81aeca25e3 258
JackB 10:6a81aeca25e3 259 ft_uint32_t FT813::Rd32(ft_uint32_t addr)
cpm219 0:2d0ef4830603 260 {
cpm219 0:2d0ef4830603 261 ft_uint32_t value;
JackB 10:6a81aeca25e3 262 StartTransfer(FT_GPU_READ, addr);
JackB 10:6a81aeca25e3 263 value = Transfer32(0);
JackB 10:6a81aeca25e3 264 EndTransfer();
cpm219 0:2d0ef4830603 265 return value;
cpm219 0:2d0ef4830603 266 }
cpm219 0:2d0ef4830603 267
JackB 10:6a81aeca25e3 268 ft_void_t FT813::Wr8(ft_uint32_t addr, ft_uint8_t v)
cpm219 0:2d0ef4830603 269 {
JackB 10:6a81aeca25e3 270 // StartTransfer(FT_GPU_WRITE, addr);
JackB 10:6a81aeca25e3 271 // if (FT_GPU_READ == rw) { // if (FT_GPU_READ == FT_GPU_WRITE)
JackB 10:6a81aeca25e3 272 // _ss = 0; // cs low
JackB 10:6a81aeca25e3 273 // _spi.write(addr >> 16);
JackB 10:6a81aeca25e3 274 // _spi.write(addr >> 8);
JackB 10:6a81aeca25e3 275 // _spi.write(addr & 0xff);
JackB 10:6a81aeca25e3 276 // _spi.write(0); //Dummy Read Byte
JackB 10:6a81aeca25e3 277 // status = READING;
JackB 10:6a81aeca25e3 278 // } else {
JackB 10:6a81aeca25e3 279 _ss = 0; // cs low
JackB 10:6a81aeca25e3 280 _spi.write(0x80 | (addr >> 16));
JackB 10:6a81aeca25e3 281 _spi.write(addr >> 8);
JackB 10:6a81aeca25e3 282 _spi.write(addr & 0xff);
JackB 10:6a81aeca25e3 283 status = WRITING;
JackB 10:6a81aeca25e3 284 // }
JackB 10:6a81aeca25e3 285
JackB 10:6a81aeca25e3 286 // Transfer8(v);
JackB 10:6a81aeca25e3 287 _spi.write(v);
JackB 10:6a81aeca25e3 288 // EndTransfer();
JackB 10:6a81aeca25e3 289 _ss = 1;
JackB 10:6a81aeca25e3 290 status = OPENED;
cpm219 0:2d0ef4830603 291 }
cpm219 0:2d0ef4830603 292
JackB 10:6a81aeca25e3 293 ft_void_t FT813::Wr16(ft_uint32_t addr, ft_uint16_t v)
JackB 10:6a81aeca25e3 294 {
JackB 10:6a81aeca25e3 295 StartTransfer(FT_GPU_WRITE, addr);
JackB 10:6a81aeca25e3 296 Transfer16(v);
JackB 10:6a81aeca25e3 297 EndTransfer();
JackB 10:6a81aeca25e3 298 }
JackB 10:6a81aeca25e3 299
JackB 10:6a81aeca25e3 300 ft_void_t FT813::Wr32(ft_uint32_t addr, ft_uint32_t v)
JackB 10:6a81aeca25e3 301 {
JackB 10:6a81aeca25e3 302 StartTransfer(FT_GPU_WRITE, addr);
JackB 10:6a81aeca25e3 303 Transfer32(v);
JackB 10:6a81aeca25e3 304 EndTransfer();
JackB 10:6a81aeca25e3 305 }
JackB 10:6a81aeca25e3 306
JackB 10:6a81aeca25e3 307 ft_void_t FT813::HostCommand(ft_uint8_t cmd)
cpm219 0:2d0ef4830603 308 {
cpm219 0:2d0ef4830603 309 _ss = 0;
cpm219 0:2d0ef4830603 310 _spi.write(cmd);
cpm219 0:2d0ef4830603 311 _spi.write(0);
cpm219 0:2d0ef4830603 312 _spi.write(0);
cpm219 0:2d0ef4830603 313 _ss = 1;
cpm219 0:2d0ef4830603 314 }
cpm219 0:2d0ef4830603 315
JackB 10:6a81aeca25e3 316 ft_void_t FT813::ClockSelect(FT_GPU_PLL_SOURCE_T pllsource)
cpm219 0:2d0ef4830603 317 {
JackB 10:6a81aeca25e3 318 HostCommand(pllsource);
cpm219 0:2d0ef4830603 319 }
cpm219 0:2d0ef4830603 320
JackB 10:6a81aeca25e3 321 ft_void_t FT813::PLL_FreqSelect(FT_GPU_PLL_FREQ_T freq)
cpm219 0:2d0ef4830603 322 {
JackB 10:6a81aeca25e3 323 HostCommand(freq);
cpm219 0:2d0ef4830603 324 }
cpm219 0:2d0ef4830603 325
JackB 10:6a81aeca25e3 326 ft_void_t FT813::PowerModeSwitch(FT_GPU_POWER_MODE_T pwrmode)
cpm219 0:2d0ef4830603 327 {
JackB 10:6a81aeca25e3 328 HostCommand(pwrmode);
cpm219 0:2d0ef4830603 329 }
cpm219 0:2d0ef4830603 330
JackB 10:6a81aeca25e3 331 ft_void_t FT813::CoreReset()
cpm219 0:2d0ef4830603 332 {
JackB 10:6a81aeca25e3 333 HostCommand(0x68);
cpm219 0:2d0ef4830603 334 }
cpm219 0:2d0ef4830603 335
JackB 10:6a81aeca25e3 336 ft_void_t FT813::Updatecmdfifo(ft_uint16_t count)
cpm219 0:2d0ef4830603 337 {
JackB 10:6a81aeca25e3 338 cmd_fifo_wp = (cmd_fifo_wp + count) & 4095;
cpm219 0:2d0ef4830603 339 //4 byte alignment
JackB 10:6a81aeca25e3 340 cmd_fifo_wp = (cmd_fifo_wp + 3) & 0xffc;
JackB 10:6a81aeca25e3 341 Wr16(REG_CMD_WRITE, cmd_fifo_wp);
cpm219 0:2d0ef4830603 342 }
cpm219 0:2d0ef4830603 343
JackB 10:6a81aeca25e3 344 ft_uint16_t FT813::fifo_Freespace()
cpm219 0:2d0ef4830603 345 {
cpm219 0:2d0ef4830603 346 ft_uint16_t fullness,retval;
cpm219 0:2d0ef4830603 347
JackB 10:6a81aeca25e3 348 fullness = (cmd_fifo_wp - Rd16(REG_CMD_READ)) & 4095;
cpm219 0:2d0ef4830603 349 retval = (FT_CMD_FIFO_SIZE - 4) - fullness;
cpm219 0:2d0ef4830603 350 return (retval);
cpm219 0:2d0ef4830603 351 }
cpm219 0:2d0ef4830603 352
JackB 10:6a81aeca25e3 353 ft_void_t FT813::WrCmdBuf(ft_uint8_t *buffer, ft_uint16_t count)
cpm219 0:2d0ef4830603 354 {
cpm219 0:2d0ef4830603 355 ft_uint32_t length =0, SizeTransfered = 0;
cpm219 0:2d0ef4830603 356
JackB 10:6a81aeca25e3 357 #define MAX_CMD_FIFO_TRANSFER fifo_Freespace()
cpm219 0:2d0ef4830603 358 do {
cpm219 0:2d0ef4830603 359 length = count;
JackB 10:6a81aeca25e3 360 if (length > MAX_CMD_FIFO_TRANSFER) {
cpm219 0:2d0ef4830603 361 length = MAX_CMD_FIFO_TRANSFER;
cpm219 0:2d0ef4830603 362 }
JackB 10:6a81aeca25e3 363 CheckCmdBuffer(length);
cpm219 0:2d0ef4830603 364
JackB 10:6a81aeca25e3 365 StartCmdTransfer(FT_GPU_WRITE, length);
cpm219 0:2d0ef4830603 366
JackB 10:6a81aeca25e3 367 SizeTransfered = 0;
cpm219 0:2d0ef4830603 368 while (length--) {
JackB 10:6a81aeca25e3 369 // Transfer8(*buffer);
JackB 10:6a81aeca25e3 370 _spi.write(*buffer);
JackB 10:6a81aeca25e3 371 buffer++;
JackB 10:6a81aeca25e3 372 SizeTransfered++;
cpm219 0:2d0ef4830603 373 }
JackB 10:6a81aeca25e3 374 length = SizeTransfered;
cpm219 0:2d0ef4830603 375
JackB 10:6a81aeca25e3 376 EndTransfer();
JackB 10:6a81aeca25e3 377 Updatecmdfifo(length);
cpm219 0:2d0ef4830603 378
JackB 10:6a81aeca25e3 379 WaitCmdfifo_empty();
cpm219 0:2d0ef4830603 380
cpm219 0:2d0ef4830603 381 count -= length;
JackB 10:6a81aeca25e3 382 } while (count > 0);
cpm219 0:2d0ef4830603 383 }
cpm219 0:2d0ef4830603 384
JackB 10:6a81aeca25e3 385 ft_void_t FT813::WrCmdBufFromFlash(FT_PROGMEM ft_prog_uchar8_t *buffer, ft_uint16_t count)
cpm219 0:2d0ef4830603 386 {
cpm219 0:2d0ef4830603 387 ft_uint32_t length =0, SizeTransfered = 0;
cpm219 0:2d0ef4830603 388
JackB 10:6a81aeca25e3 389 #define MAX_CMD_FIFO_TRANSFER fifo_Freespace()
cpm219 0:2d0ef4830603 390 do {
cpm219 0:2d0ef4830603 391 length = count;
JackB 10:6a81aeca25e3 392 if (length > MAX_CMD_FIFO_TRANSFER) {
cpm219 0:2d0ef4830603 393 length = MAX_CMD_FIFO_TRANSFER;
cpm219 0:2d0ef4830603 394 }
JackB 10:6a81aeca25e3 395 CheckCmdBuffer(length);
cpm219 0:2d0ef4830603 396
JackB 10:6a81aeca25e3 397 StartCmdTransfer(FT_GPU_WRITE,length);
cpm219 0:2d0ef4830603 398
JackB 10:6a81aeca25e3 399 SizeTransfered = 0;
cpm219 0:2d0ef4830603 400 while (length--) {
JackB 10:6a81aeca25e3 401 Transfer8(ft_pgm_read_byte_near(buffer));
cpm219 0:2d0ef4830603 402 buffer++;
JackB 10:6a81aeca25e3 403 SizeTransfered++;
cpm219 0:2d0ef4830603 404 }
JackB 10:6a81aeca25e3 405 length = SizeTransfered;
cpm219 0:2d0ef4830603 406
JackB 10:6a81aeca25e3 407 EndTransfer();
JackB 10:6a81aeca25e3 408 Updatecmdfifo(length);
cpm219 0:2d0ef4830603 409
JackB 10:6a81aeca25e3 410 WaitCmdfifo_empty();
cpm219 0:2d0ef4830603 411
cpm219 0:2d0ef4830603 412 count -= length;
JackB 10:6a81aeca25e3 413 } while (count > 0);
cpm219 0:2d0ef4830603 414 }
cpm219 0:2d0ef4830603 415
JackB 10:6a81aeca25e3 416 ft_void_t FT813::CheckCmdBuffer(ft_uint16_t count)
cpm219 0:2d0ef4830603 417 {
cpm219 0:2d0ef4830603 418 ft_uint16_t getfreespace;
JackB 10:6a81aeca25e3 419 do {
JackB 10:6a81aeca25e3 420 getfreespace = fifo_Freespace();
JackB 10:6a81aeca25e3 421 } while(getfreespace < count);
cpm219 0:2d0ef4830603 422 }
cpm219 0:2d0ef4830603 423
JackB 10:6a81aeca25e3 424 ft_void_t FT813::WaitCmdfifo_empty()
cpm219 0:2d0ef4830603 425 {
JackB 10:6a81aeca25e3 426 while(Rd16(REG_CMD_READ) != Rd16(REG_CMD_WRITE));
cpm219 0:2d0ef4830603 427
JackB 10:6a81aeca25e3 428 cmd_fifo_wp = Rd16(REG_CMD_WRITE);
cpm219 0:2d0ef4830603 429 }
cpm219 0:2d0ef4830603 430
JackB 10:6a81aeca25e3 431 ft_void_t FT813::WaitLogo_Finish()
cpm219 0:2d0ef4830603 432 {
JackB 10:6a81aeca25e3 433 ft_int16_t cmdrdptr, cmdwrptr;
cpm219 0:2d0ef4830603 434
JackB 10:6a81aeca25e3 435 do {
JackB 10:6a81aeca25e3 436 cmdrdptr = Rd16(REG_CMD_READ);
JackB 10:6a81aeca25e3 437 cmdwrptr = Rd16(REG_CMD_WRITE);
JackB 10:6a81aeca25e3 438 } while ((cmdwrptr != cmdrdptr) || (cmdrdptr != 0));
JackB 10:6a81aeca25e3 439 cmd_fifo_wp = 0;
cpm219 0:2d0ef4830603 440 }
cpm219 0:2d0ef4830603 441
JackB 10:6a81aeca25e3 442 ft_void_t FT813::ResetCmdFifo()
cpm219 0:2d0ef4830603 443 {
cpm219 0:2d0ef4830603 444 cmd_fifo_wp = 0;
cpm219 0:2d0ef4830603 445 }
cpm219 0:2d0ef4830603 446
JackB 10:6a81aeca25e3 447 ft_void_t FT813::WrCmd32(ft_uint32_t cmd)
cpm219 0:2d0ef4830603 448 {
JackB 10:6a81aeca25e3 449 CheckCmdBuffer(sizeof(cmd));
cpm219 0:2d0ef4830603 450
JackB 10:6a81aeca25e3 451 Wr32(RAM_CMD + cmd_fifo_wp, cmd);
cpm219 0:2d0ef4830603 452
JackB 10:6a81aeca25e3 453 Updatecmdfifo(sizeof(cmd));
cpm219 0:2d0ef4830603 454 }
cpm219 0:2d0ef4830603 455
JackB 10:6a81aeca25e3 456 ft_void_t FT813::ResetDLBuffer()
cpm219 0:2d0ef4830603 457 {
JackB 10:6a81aeca25e3 458 dl_buff_wp = 0;
cpm219 0:2d0ef4830603 459 }
cpm219 0:2d0ef4830603 460
JackB 10:6a81aeca25e3 461 /* Toggle PD_N pin of FT813 board for a power cycle*/
JackB 10:6a81aeca25e3 462 ft_void_t FT813::Powercycle(ft_bool_t up)
cpm219 0:2d0ef4830603 463 {
cpm219 0:2d0ef4830603 464 if (up)
cpm219 0:2d0ef4830603 465 {
JackB 10:6a81aeca25e3 466 //Toggle PD_N from low to high for power up switch
JackB 10:6a81aeca25e3 467 _pd = 0;
JackB 10:6a81aeca25e3 468 Sleep(20);
cpm219 0:2d0ef4830603 469
JackB 10:6a81aeca25e3 470 _pd = 1;
JackB 10:6a81aeca25e3 471 Sleep(20);
JackB 10:6a81aeca25e3 472 } else {
JackB 10:6a81aeca25e3 473 //Toggle PD_N from high to low for power down switch
JackB 10:6a81aeca25e3 474 _pd = 1;
JackB 10:6a81aeca25e3 475 Sleep(20);
cpm219 0:2d0ef4830603 476
JackB 10:6a81aeca25e3 477 _pd = 0;
JackB 10:6a81aeca25e3 478 Sleep(20);
cpm219 0:2d0ef4830603 479 }
cpm219 0:2d0ef4830603 480 }
cpm219 0:2d0ef4830603 481
JackB 10:6a81aeca25e3 482 ft_void_t FT813::WrMemFromFlash(ft_uint32_t addr, const ft_prog_uchar8_t *buffer, ft_uint32_t length)
cpm219 0:2d0ef4830603 483 {
cpm219 0:2d0ef4830603 484 //ft_uint32_t SizeTransfered = 0;
cpm219 0:2d0ef4830603 485
JackB 10:6a81aeca25e3 486 StartTransfer(FT_GPU_WRITE,addr);
cpm219 0:2d0ef4830603 487
cpm219 0:2d0ef4830603 488 while (length--) {
JackB 10:6a81aeca25e3 489 Transfer8(ft_pgm_read_byte_near(buffer));
cpm219 0:2d0ef4830603 490 buffer++;
cpm219 0:2d0ef4830603 491 }
cpm219 0:2d0ef4830603 492
JackB 10:6a81aeca25e3 493 EndTransfer();
cpm219 0:2d0ef4830603 494 }
cpm219 0:2d0ef4830603 495
JackB 10:6a81aeca25e3 496 ft_void_t FT813::WrMem(ft_uint32_t addr, const ft_uint8_t *buffer, ft_uint32_t length)
cpm219 0:2d0ef4830603 497 {
cpm219 0:2d0ef4830603 498 //ft_uint32_t SizeTransfered = 0;
cpm219 0:2d0ef4830603 499
JackB 10:6a81aeca25e3 500 StartTransfer(FT_GPU_WRITE,addr);
cpm219 0:2d0ef4830603 501
cpm219 0:2d0ef4830603 502 while (length--) {
JackB 10:6a81aeca25e3 503 Transfer8(*buffer);
cpm219 0:2d0ef4830603 504 buffer++;
cpm219 0:2d0ef4830603 505 }
cpm219 0:2d0ef4830603 506
JackB 10:6a81aeca25e3 507 EndTransfer();
cpm219 0:2d0ef4830603 508 }
cpm219 0:2d0ef4830603 509
JackB 10:6a81aeca25e3 510 ft_void_t FT813::RdMem(ft_uint32_t addr, ft_uint8_t *buffer, ft_uint32_t length)
cpm219 0:2d0ef4830603 511 {
cpm219 0:2d0ef4830603 512 //ft_uint32_t SizeTransfered = 0;
cpm219 0:2d0ef4830603 513
JackB 10:6a81aeca25e3 514 StartTransfer(FT_GPU_READ,addr);
cpm219 0:2d0ef4830603 515
cpm219 0:2d0ef4830603 516 while (length--) {
JackB 10:6a81aeca25e3 517 *buffer = Transfer8(0);
cpm219 0:2d0ef4830603 518 buffer++;
cpm219 0:2d0ef4830603 519 }
cpm219 0:2d0ef4830603 520
JackB 10:6a81aeca25e3 521 EndTransfer();
cpm219 0:2d0ef4830603 522 }
cpm219 0:2d0ef4830603 523
JackB 10:6a81aeca25e3 524 ft_int32_t FT813::Dec2Ascii(ft_char8_t *pSrc, ft_int32_t value)
cpm219 0:2d0ef4830603 525 {
cpm219 0:2d0ef4830603 526 ft_int16_t Length;
JackB 10:6a81aeca25e3 527 ft_char8_t *pdst, charval;
JackB 10:6a81aeca25e3 528 ft_int32_t CurrVal = value, tmpval,i;
JackB 10:6a81aeca25e3 529 ft_char8_t tmparray[16], idx = 0;
cpm219 0:2d0ef4830603 530
cpm219 0:2d0ef4830603 531 Length = strlen(pSrc);
cpm219 0:2d0ef4830603 532 pdst = pSrc + Length;
cpm219 0:2d0ef4830603 533
JackB 10:6a81aeca25e3 534 if(0 == value) {
cpm219 0:2d0ef4830603 535 *pdst++ = '0';
cpm219 0:2d0ef4830603 536 *pdst++ = '\0';
cpm219 0:2d0ef4830603 537 return 0;
cpm219 0:2d0ef4830603 538 }
cpm219 0:2d0ef4830603 539
JackB 10:6a81aeca25e3 540 if(CurrVal < 0) {
cpm219 0:2d0ef4830603 541 *pdst++ = '-';
cpm219 0:2d0ef4830603 542 CurrVal = - CurrVal;
cpm219 0:2d0ef4830603 543 }
cpm219 0:2d0ef4830603 544 /* insert the value */
JackB 10:6a81aeca25e3 545 while(CurrVal > 0) {
cpm219 0:2d0ef4830603 546 tmpval = CurrVal;
cpm219 0:2d0ef4830603 547 CurrVal /= 10;
cpm219 0:2d0ef4830603 548 tmpval = tmpval - CurrVal*10;
cpm219 0:2d0ef4830603 549 charval = '0' + tmpval;
cpm219 0:2d0ef4830603 550 tmparray[idx++] = charval;
cpm219 0:2d0ef4830603 551 }
cpm219 0:2d0ef4830603 552
JackB 10:6a81aeca25e3 553 for(i = 0; i < idx; i++) {
cpm219 0:2d0ef4830603 554 *pdst++ = tmparray[idx - i - 1];
cpm219 0:2d0ef4830603 555 }
cpm219 0:2d0ef4830603 556 *pdst++ = '\0';
cpm219 0:2d0ef4830603 557
cpm219 0:2d0ef4830603 558 return 0;
cpm219 0:2d0ef4830603 559 }
cpm219 0:2d0ef4830603 560
JackB 10:6a81aeca25e3 561 ft_void_t FT813::Sleep(ft_uint16_t ms)
cpm219 0:2d0ef4830603 562 {
cpm219 0:2d0ef4830603 563 wait_ms(ms);
cpm219 0:2d0ef4830603 564 }
cpm219 0:2d0ef4830603 565
JackB 10:6a81aeca25e3 566 ft_void_t FT813::Sound_ON()
JackB 10:6a81aeca25e3 567 {
JackB 10:6a81aeca25e3 568 Wr8(REG_GPIO, 0x02 | Rd8(REG_GPIO));
cpm219 0:2d0ef4830603 569 }
cpm219 0:2d0ef4830603 570
JackB 10:6a81aeca25e3 571 ft_void_t FT813::Sound_OFF()
JackB 10:6a81aeca25e3 572 {
JackB 10:6a81aeca25e3 573 Wr8(REG_GPIO, 0xFD & Rd8(REG_GPIO));
cpm219 0:2d0ef4830603 574 }