WIZNet W5500 with additional enhancements

Fork of WIZnetInterface by WIZnet

Files at this revision

API Documentation at this revision

Comitter:
Helmut Tschemernjak
Date:
Thu Oct 12 12:19:11 2017 +0200
Parent:
37:018436dccfcd
Commit message:
Enable Interrupts for all sockets by default.
Added a Soft-Reset in the reset() functions which works perfect
when no Reset line is connected.

Changed in this revision

EthernetInterface.cpp Show annotated file Show diff for this revision Revisions of this file
arch/ext/W5500.cpp Show annotated file Show diff for this revision Revisions of this file
arch/ext/W5500.h Show annotated file Show diff for this revision Revisions of this file
--- a/EthernetInterface.cpp	Wed Oct 11 14:25:44 2017 +0200
+++ b/EthernetInterface.cpp	Thu Oct 12 12:19:11 2017 +0200
@@ -56,11 +56,13 @@
 int EthernetInterface::init(uint8_t *mac)
 {
     dhcp = true;
-    //
-    for (int i =0; i < 6; i++) this->mac[i] = mac[i];
-    //
+
+    for (int i =0; i < 6; i++)
+        this->mac[i] = mac[i];
+
     reset();
     setmac();
+    setSIMR(0xff); // enable interrupts for all sockets
     return 0;
 }
 
@@ -82,7 +84,7 @@
     // @Jul. 8. 2014 add code. should be called to write chip.
     setmac();
     setip();
-    
+    setSIMR(0xff); // enable interrupts for all sockets
     return 0;
 }
 
--- a/arch/ext/W5500.cpp	Wed Oct 11 14:25:44 2017 +0200
+++ b/arch/ext/W5500.cpp	Thu Oct 12 12:19:11 2017 +0200
@@ -166,6 +166,7 @@
 	// hw reset
     reset_pin = 1;
     reset_pin = 0;
+    setMR(1<<7); // soft reset the hardware reset is connected.
     wait_us(500); // 500us (w5500)
     reset_pin = 1;
     wait_ms(400); // 400ms (w5500)
--- a/arch/ext/W5500.h	Wed Oct 11 14:25:44 2017 +0200
+++ b/arch/ext/W5500.h	Thu Oct 12 12:19:11 2017 +0200
@@ -103,10 +103,10 @@
 #define Sn_MR_BCASTB  0x40
 #define Sn_MR_MULTI   0x80
 
-#define Sn_IR_SENDOK                 0x10
 
 //Sn_IR values
 
+#define Sn_IR_SENDOK                 0x10
 #define Sn_IR_TIMEOUT                0x08
 #define Sn_IR_RECV                   0x04
 #define Sn_IR_DISCON                 0x02