mGTFTini.h

00001 // --------------------------------------------------------
00002 //  mGTFTini.h (c) CopYright 2013-2014 Goji.
00003 // --------------------------------------------------------
00004 
00005 DigitalOut TFT_RD(TFT_pin_RD);
00006 DigitalOut TFT_WR(TFT_pin_WR);
00007 DigitalOut TFT_CS(TFT_pin_CS);
00008 DigitalOut TFT_RS(TFT_pin_RS);
00009 DigitalOut TFT_RESET(TFT_pin_RESET);
00010 
00011 #define TFT_RESET_0     TFT_RESET = 0
00012 #define TFT_RESET_1     TFT_RESET = 1
00013 #define TFT_RS_0        TFT_RS = 0
00014 #define TFT_RS_1        TFT_RS = 1
00015 #define TFT_WR_0        TFT_WR = 0
00016 #define TFT_WR_1        TFT_WR = 1
00017 #define TFT_CS_0        TFT_CS = 0
00018 #define TFT_CS_1        TFT_CS = 1
00019 #define TFT_RD_0        TFT_RD = 0
00020 #define TFT_RD_1        TFT_RD = 1
00021 
00022 TFT_INFO TFT_info = {
00023     TFT_MIN_X,
00024     TFT_MAX_X,
00025     TFT_MIN_Y,
00026     TFT_MAX_Y,
00027     TPC_XNON,
00028     TPC_XMIN,
00029     TPC_XMAX,
00030     TPC_YNON,
00031     TPC_YMIN,
00032     TPC_YMAX
00033 };
00034 
00035 
00036 //---------------------------------------------------------------------
00037 #if defined(ILI9325)
00038 //---------------------------------------------------------------------
00039 uint16_t TFT_Init_table[] = {
00040     // http://www.ilitek.com ILI9325 Application Notes
00041     // - Set internal timing ------------ //
00042     0xE3, 0x3008,    // Set internal timing
00043     0xE7, 0x0012,
00044     0xEF, 0x1231,
00045 
00046     // - Start Initial Sequence --------- //
00047     0x01, 0x0100,    // set SS and SM bit
00048     0x02, 0x0700,    // set 1 line inversion
00049     0x03, 0x1038,    // set GRAM write direction and BGR=1.
00050     0x04, 0x0000,    // Resize register
00051     0x08, 0x0207,    // set the back porch and front porch
00052     0x09, 0x0000,    // set non-display area refresh cycle ISC[3:0]
00053     0x0A, 0x0000,    // FMARK function
00054     0x0C, 0x0000,    // RGB interface setting
00055     0x0D, 0x0000,    // Frame marker Position
00056     0x0F, 0x0000,    // RGB interface polarity
00057 
00058     // - Power On sequence -------------- //
00059     0x10, 0x0000,    // SAP, BT[3:0], AP, DSTB, SLP, STB
00060     0x11, 0x0007,    // DC1[2:0], DC0[2:0], VC[2:0]
00061     0x12, 0x0000,    // VREG1OUT voltage
00062     0x13, 0x0000,    // VDV[4:0] for VCOM amplitude
00063       WW,    200,
00064 
00065     0x10, 0x1490,    // SAP, BT[3:0], AP, DSTB, SLP, STB
00066     0x11, 0x0227,    // DC1[2:0], DC0[2:0], VC[2:0]
00067       WW,     50,
00068 
00069     0x12, 0x001C,    // External reference voltage Vci, Vci x 1.80
00070     0x07, 0x0001,
00071       WW,     50,
00072 
00073     0x13, 0x1A00,    // Power Control 4: VREG1OUT x 1.14
00074     0x29, 0x0025,    // Power Control 7: VREG1OUT x 0.870
00075     0x2B, 0x000D,    // Frame Rate Control: 8 fps
00076       WW,     50,
00077 
00078     0x20, 0x0000,
00079     0x21, 0x013F,
00080 
00081     // - Adjust the Gamma Curve --------- //
00082     0x30, 0x0000,
00083     0x31, 0x0506,
00084     0x32, 0x0104,
00085     0x35, 0x0207,
00086     0x36, 0x000F,
00087     0x37, 0x0306,
00088     0x38, 0x0102,
00089     0x39, 0x0707,
00090     0x3C, 0x0702,
00091     0x3D, 0x1604,
00092 
00093     // - Set GRAM area ------------------ //
00094     0x50, 0x0000,           // Horizontal GRAM Start Address
00095     0x51, TFT_MAX_Y - 1,    // Horizontal GRAM End Address
00096     0x52, 0x0000,           // Vertical GRAM Start Address
00097     0x53, TFT_MAX_X - 1,    // Vertical GRAM Start Address
00098 
00099     0x60, 0xA700,           // Gate Scan Line
00100     0x61, 0x0001,           // NDL,VLE, REV
00101     0x6A, 0x0000,           // set scrolling line
00102 
00103     // - Partial Display Control ---------//
00104     0x80, 0x0000,
00105     0x81, 0x0000,
00106     0x82, 0x0000,
00107     0x83, 0x0000,
00108     0x84, 0x0000,
00109     0x85, 0x0000,
00110 
00111     // - Panel Control -------------------//
00112     0x90, 0x0010,
00113     0x92, 0x0600,
00114     0x93, 0x0003,
00115     0x95, 0x0110,
00116     0x97, 0x0000,
00117     0x98, 0x0000,
00118 
00119     // - 262K ccode and display ON ------ //
00120     0x07, 0x0133,
00121       WW,      0
00122 };
00123 
00124 //---------------------------------------------------------------------
00125 #elif defined(ST7783)
00126 //---------------------------------------------------------------------
00127 uint16_t TFT_Init_table[] = {
00128     0x01, 0x0100,
00129     0x02, 0x0700,
00130     0x03, 0x1038,
00131     0x04, 0x0000,
00132 
00133     0x08, 0x0302,
00134     0x09, 0x0008,
00135     0x0A, 0x0008,
00136 
00137     0x10, 0x0790,
00138     0x11, 0x0005,
00139     0x12, 0x0000,
00140     0x13, 0x0000,
00141       WW,    100,
00142 
00143     0x10, 0x12B0,
00144     0x11, 0x0007,
00145       WW,    100,
00146 
00147     0x12, 0x008C,
00148     0x13, 0x1700,
00149       WW,    100,
00150 
00151     0x29, 0x0222,
00152       WW,    100,
00153 
00154     0x30, 0x0000,
00155     0x31, 0x0405,
00156     0x32, 0x0203,
00157     0x35, 0x0004,
00158     0x36, 0x0B07,
00159     0x37, 0x0000,
00160     0x38, 0x0405,
00161     0x39, 0x0203,
00162     0x3C, 0x0004,
00163     0x3D, 0x0B07,
00164 
00165     0x50, 0x0000,           // Horizontal GRAM Start Address
00166     0x51, TFT_MAX_Y - 1,    // Horizontal GRAM End Address
00167     0x52, 0x0000,           // Vertical GRAM Start Address
00168     0x53, TFT_MAX_X - 1,    // Vertical GRAM Start Address
00169 
00170     0x60, 0x2700,
00171     0x61, 0x0001,
00172     0x6A, 0x0033,
00173     0x90, 0x0033,
00174     0x07, 0x0133,
00175       WW,      0
00176 };
00177 
00178 #else
00179   #error "TFT Hardware not defined."
00180 #endif
00181 
00182 
00183 #define BIT1(n)         (1ul<<n)
00184 #define BIT3(n)         (3ul<<n)
00185 #define BIT7(n)         (7ul<<n)
00186 
00187 void TFT_init()
00188 {
00189 //  mTFT_SETUP_IO();
00190 
00191     TFT_CS_1;
00192     TFT_RD_1;
00193     TFT_WR_1;
00194 
00195     TFT_RESET_0; wait_ms(20);
00196     TFT_RESET_1; wait_ms(50);
00197     
00198     TFT_CS_0;
00199     for (int i = 0; ; i += 2) {
00200         if (TFT_Init_table[i] == WW) {          // Delay or Exit
00201             if (TFT_Init_table[i + 1] == 0)     // Exit(End of Init Table)
00202                 break;                          // ..
00203             else
00204                 wait_ms(TFT_Init_table[i + 1]);// Delay
00205         } else
00206             TFT_wr_index_data(TFT_Init_table[i], TFT_Init_table[i + 1]);
00207     }
00208     TFT_setOrientation(TFT_HV_HORZ);
00209     TFT_setWindow(TFT_info.xMIN, TFT_info.yMIN, TFT_info.xMAX, TFT_info.yMAX);
00210 }
00211 
00212 
00213 #if defined(_ARCH_PRO)
00214 void TFT_wr_regs(uint8_t regv)
00215 {
00216   #if defined(aitendo26) || defined(mcufriend24)
00217     // dbit  76543210 - data bit
00218     // pin#  76543298 - Digital pin# in Arduino
00219     // port# 22220000 - Port# in ARCH Pro
00220     // bit#  54325410 - Bit#  in ARCH Pro
00221     LPC_GPIO0->FIOCLR = BIT1( 1)|BIT1( 0)|BIT1( 5)|BIT1( 4);    // All low
00222     LPC_GPIO2->FIOCLR = BIT1( 5)|BIT1( 4)|BIT1( 3)|BIT1( 2);    // ..    
00223     LPC_GPIO0->FIOSET = (regv & (BIT1( 3)|BIT1( 2))) << 2 | (regv & (BIT1( 1)|BIT1( 0)));
00224     LPC_GPIO2->FIOSET = (regv & (BIT1( 7)|BIT1( 6)|BIT1( 5)|BIT1( 4))) >> 2;
00225   #endif
00226 }
00227 #else
00228 
00229 // Can't use too slow
00230 BusOut  TFTBus(D8, D9, D2, D3, D4, D5, D6, D7);
00231 #define TFT_wr_regs(regv)   TFTBus = (regv)
00232 
00233 #endif