Gonzalo Matarrubia / Mbed LPC1549 mod

This repo contains the libraries of Mbed for LPC1549 with following changes: - IAP commands. - EEPROM write and read. - UART write and read (public) - CAN can_s -> LPC_C_CAN0_Type *can

mbed/TARGET_LPC1549/core_ca_mmu.h@0:820a69dfd200, 2015-04-14 (annotated)

Committer:
gmatarrubia
Date:
Tue Apr 14 15:00:13 2015 +0200
Revision:
0:820a69dfd200
Initial repo. IAP commands, EEPROM write/read, UART write/read, CAN

Who changed what in which revision?

UserRevisionLine numberNew contents of line
gmatarrubia 0:820a69dfd200 1 ;/**************************************************************************//**
gmatarrubia 0:820a69dfd200 2 ; * @file core_ca_mmu.h
gmatarrubia 0:820a69dfd200 3 ; * @brief MMU Startup File for
gmatarrubia 0:820a69dfd200 4 ; * VE_A9_MP Device Series
gmatarrubia 0:820a69dfd200 5 ; * @version V1.01
gmatarrubia 0:820a69dfd200 6 ; * @date 25 March 2013
gmatarrubia 0:820a69dfd200 7 ; *
gmatarrubia 0:820a69dfd200 8 ; * @note
gmatarrubia 0:820a69dfd200 9 ; *
gmatarrubia 0:820a69dfd200 10 ; ******************************************************************************/
gmatarrubia 0:820a69dfd200 11 ;/* Copyright (c) 2012 ARM LIMITED
gmatarrubia 0:820a69dfd200 12 ;
gmatarrubia 0:820a69dfd200 13 ; All rights reserved.
gmatarrubia 0:820a69dfd200 14 ; Redistribution and use in source and binary forms, with or without
gmatarrubia 0:820a69dfd200 15 ; modification, are permitted provided that the following conditions are met:
gmatarrubia 0:820a69dfd200 16 ; - Redistributions of source code must retain the above copyright
gmatarrubia 0:820a69dfd200 17 ; notice, this list of conditions and the following disclaimer.
gmatarrubia 0:820a69dfd200 18 ; - Redistributions in binary form must reproduce the above copyright
gmatarrubia 0:820a69dfd200 19 ; notice, this list of conditions and the following disclaimer in the
gmatarrubia 0:820a69dfd200 20 ; documentation and/or other materials provided with the distribution.
gmatarrubia 0:820a69dfd200 21 ; - Neither the name of ARM nor the names of its contributors may be used
gmatarrubia 0:820a69dfd200 22 ; to endorse or promote products derived from this software without
gmatarrubia 0:820a69dfd200 23 ; specific prior written permission.
gmatarrubia 0:820a69dfd200 24 ; *
gmatarrubia 0:820a69dfd200 25 ; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
gmatarrubia 0:820a69dfd200 26 ; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
gmatarrubia 0:820a69dfd200 27 ; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
gmatarrubia 0:820a69dfd200 28 ; ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
gmatarrubia 0:820a69dfd200 29 ; LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
gmatarrubia 0:820a69dfd200 30 ; CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
gmatarrubia 0:820a69dfd200 31 ; SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
gmatarrubia 0:820a69dfd200 32 ; INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
gmatarrubia 0:820a69dfd200 33 ; CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
gmatarrubia 0:820a69dfd200 34 ; ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
gmatarrubia 0:820a69dfd200 35 ; POSSIBILITY OF SUCH DAMAGE.
gmatarrubia 0:820a69dfd200 36 ; ---------------------------------------------------------------------------*/
gmatarrubia 0:820a69dfd200 37
gmatarrubia 0:820a69dfd200 38 #ifdef __cplusplus
gmatarrubia 0:820a69dfd200 39 extern "C" {
gmatarrubia 0:820a69dfd200 40 #endif
gmatarrubia 0:820a69dfd200 41
gmatarrubia 0:820a69dfd200 42 #ifndef _MMU_FUNC_H
gmatarrubia 0:820a69dfd200 43 #define _MMU_FUNC_H
gmatarrubia 0:820a69dfd200 44
gmatarrubia 0:820a69dfd200 45 #define SECTION_DESCRIPTOR (0x2)
gmatarrubia 0:820a69dfd200 46 #define SECTION_MASK (0xFFFFFFFC)
gmatarrubia 0:820a69dfd200 47
gmatarrubia 0:820a69dfd200 48 #define SECTION_TEXCB_MASK (0xFFFF8FF3)
gmatarrubia 0:820a69dfd200 49 #define SECTION_B_SHIFT (2)
gmatarrubia 0:820a69dfd200 50 #define SECTION_C_SHIFT (3)
gmatarrubia 0:820a69dfd200 51 #define SECTION_TEX0_SHIFT (12)
gmatarrubia 0:820a69dfd200 52 #define SECTION_TEX1_SHIFT (13)
gmatarrubia 0:820a69dfd200 53 #define SECTION_TEX2_SHIFT (14)
gmatarrubia 0:820a69dfd200 54
gmatarrubia 0:820a69dfd200 55 #define SECTION_XN_MASK (0xFFFFFFEF)
gmatarrubia 0:820a69dfd200 56 #define SECTION_XN_SHIFT (4)
gmatarrubia 0:820a69dfd200 57
gmatarrubia 0:820a69dfd200 58 #define SECTION_DOMAIN_MASK (0xFFFFFE1F)
gmatarrubia 0:820a69dfd200 59 #define SECTION_DOMAIN_SHIFT (5)
gmatarrubia 0:820a69dfd200 60
gmatarrubia 0:820a69dfd200 61 #define SECTION_P_MASK (0xFFFFFDFF)
gmatarrubia 0:820a69dfd200 62 #define SECTION_P_SHIFT (9)
gmatarrubia 0:820a69dfd200 63
gmatarrubia 0:820a69dfd200 64 #define SECTION_AP_MASK (0xFFFF73FF)
gmatarrubia 0:820a69dfd200 65 #define SECTION_AP_SHIFT (10)
gmatarrubia 0:820a69dfd200 66 #define SECTION_AP2_SHIFT (15)
gmatarrubia 0:820a69dfd200 67
gmatarrubia 0:820a69dfd200 68 #define SECTION_S_MASK (0xFFFEFFFF)
gmatarrubia 0:820a69dfd200 69 #define SECTION_S_SHIFT (16)
gmatarrubia 0:820a69dfd200 70
gmatarrubia 0:820a69dfd200 71 #define SECTION_NG_MASK (0xFFFDFFFF)
gmatarrubia 0:820a69dfd200 72 #define SECTION_NG_SHIFT (17)
gmatarrubia 0:820a69dfd200 73
gmatarrubia 0:820a69dfd200 74 #define SECTION_NS_MASK (0xFFF7FFFF)
gmatarrubia 0:820a69dfd200 75 #define SECTION_NS_SHIFT (19)
gmatarrubia 0:820a69dfd200 76
gmatarrubia 0:820a69dfd200 77
gmatarrubia 0:820a69dfd200 78 #define PAGE_L1_DESCRIPTOR (0x1)
gmatarrubia 0:820a69dfd200 79 #define PAGE_L1_MASK (0xFFFFFFFC)
gmatarrubia 0:820a69dfd200 80
gmatarrubia 0:820a69dfd200 81 #define PAGE_L2_4K_DESC (0x2)
gmatarrubia 0:820a69dfd200 82 #define PAGE_L2_4K_MASK (0xFFFFFFFD)
gmatarrubia 0:820a69dfd200 83
gmatarrubia 0:820a69dfd200 84 #define PAGE_L2_64K_DESC (0x1)
gmatarrubia 0:820a69dfd200 85 #define PAGE_L2_64K_MASK (0xFFFFFFFC)
gmatarrubia 0:820a69dfd200 86
gmatarrubia 0:820a69dfd200 87 #define PAGE_4K_TEXCB_MASK (0xFFFFFE33)
gmatarrubia 0:820a69dfd200 88 #define PAGE_4K_B_SHIFT (2)
gmatarrubia 0:820a69dfd200 89 #define PAGE_4K_C_SHIFT (3)
gmatarrubia 0:820a69dfd200 90 #define PAGE_4K_TEX0_SHIFT (6)
gmatarrubia 0:820a69dfd200 91 #define PAGE_4K_TEX1_SHIFT (7)
gmatarrubia 0:820a69dfd200 92 #define PAGE_4K_TEX2_SHIFT (8)
gmatarrubia 0:820a69dfd200 93
gmatarrubia 0:820a69dfd200 94 #define PAGE_64K_TEXCB_MASK (0xFFFF8FF3)
gmatarrubia 0:820a69dfd200 95 #define PAGE_64K_B_SHIFT (2)
gmatarrubia 0:820a69dfd200 96 #define PAGE_64K_C_SHIFT (3)
gmatarrubia 0:820a69dfd200 97 #define PAGE_64K_TEX0_SHIFT (12)
gmatarrubia 0:820a69dfd200 98 #define PAGE_64K_TEX1_SHIFT (13)
gmatarrubia 0:820a69dfd200 99 #define PAGE_64K_TEX2_SHIFT (14)
gmatarrubia 0:820a69dfd200 100
gmatarrubia 0:820a69dfd200 101 #define PAGE_TEXCB_MASK (0xFFFF8FF3)
gmatarrubia 0:820a69dfd200 102 #define PAGE_B_SHIFT (2)
gmatarrubia 0:820a69dfd200 103 #define PAGE_C_SHIFT (3)
gmatarrubia 0:820a69dfd200 104 #define PAGE_TEX_SHIFT (12)
gmatarrubia 0:820a69dfd200 105
gmatarrubia 0:820a69dfd200 106 #define PAGE_XN_4K_MASK (0xFFFFFFFE)
gmatarrubia 0:820a69dfd200 107 #define PAGE_XN_4K_SHIFT (0)
gmatarrubia 0:820a69dfd200 108 #define PAGE_XN_64K_MASK (0xFFFF7FFF)
gmatarrubia 0:820a69dfd200 109 #define PAGE_XN_64K_SHIFT (15)
gmatarrubia 0:820a69dfd200 110
gmatarrubia 0:820a69dfd200 111
gmatarrubia 0:820a69dfd200 112 #define PAGE_DOMAIN_MASK (0xFFFFFE1F)
gmatarrubia 0:820a69dfd200 113 #define PAGE_DOMAIN_SHIFT (5)
gmatarrubia 0:820a69dfd200 114
gmatarrubia 0:820a69dfd200 115 #define PAGE_P_MASK (0xFFFFFDFF)
gmatarrubia 0:820a69dfd200 116 #define PAGE_P_SHIFT (9)
gmatarrubia 0:820a69dfd200 117
gmatarrubia 0:820a69dfd200 118 #define PAGE_AP_MASK (0xFFFFFDCF)
gmatarrubia 0:820a69dfd200 119 #define PAGE_AP_SHIFT (4)
gmatarrubia 0:820a69dfd200 120 #define PAGE_AP2_SHIFT (9)
gmatarrubia 0:820a69dfd200 121
gmatarrubia 0:820a69dfd200 122 #define PAGE_S_MASK (0xFFFFFBFF)
gmatarrubia 0:820a69dfd200 123 #define PAGE_S_SHIFT (10)
gmatarrubia 0:820a69dfd200 124
gmatarrubia 0:820a69dfd200 125 #define PAGE_NG_MASK (0xFFFFF7FF)
gmatarrubia 0:820a69dfd200 126 #define PAGE_NG_SHIFT (11)
gmatarrubia 0:820a69dfd200 127
gmatarrubia 0:820a69dfd200 128 #define PAGE_NS_MASK (0xFFFFFFF7)
gmatarrubia 0:820a69dfd200 129 #define PAGE_NS_SHIFT (3)
gmatarrubia 0:820a69dfd200 130
gmatarrubia 0:820a69dfd200 131 #define OFFSET_1M (0x00100000)
gmatarrubia 0:820a69dfd200 132 #define OFFSET_64K (0x00010000)
gmatarrubia 0:820a69dfd200 133 #define OFFSET_4K (0x00001000)
gmatarrubia 0:820a69dfd200 134
gmatarrubia 0:820a69dfd200 135 #define DESCRIPTOR_FAULT (0x00000000)
gmatarrubia 0:820a69dfd200 136
gmatarrubia 0:820a69dfd200 137 /* ########################### MMU Function Access ########################### */
gmatarrubia 0:820a69dfd200 138 /** \ingroup MMU_FunctionInterface
gmatarrubia 0:820a69dfd200 139 \defgroup MMU_Functions MMU Functions Interface
gmatarrubia 0:820a69dfd200 140 @{
gmatarrubia 0:820a69dfd200 141 */
gmatarrubia 0:820a69dfd200 142
gmatarrubia 0:820a69dfd200 143 /* Attributes enumerations */
gmatarrubia 0:820a69dfd200 144
gmatarrubia 0:820a69dfd200 145 /* Region size attributes */
gmatarrubia 0:820a69dfd200 146 typedef enum
gmatarrubia 0:820a69dfd200 147 {
gmatarrubia 0:820a69dfd200 148 SECTION,
gmatarrubia 0:820a69dfd200 149 PAGE_4k,
gmatarrubia 0:820a69dfd200 150 PAGE_64k,
gmatarrubia 0:820a69dfd200 151 } mmu_region_size_Type;
gmatarrubia 0:820a69dfd200 152
gmatarrubia 0:820a69dfd200 153 /* Region type attributes */
gmatarrubia 0:820a69dfd200 154 typedef enum
gmatarrubia 0:820a69dfd200 155 {
gmatarrubia 0:820a69dfd200 156 NORMAL,
gmatarrubia 0:820a69dfd200 157 DEVICE,
gmatarrubia 0:820a69dfd200 158 SHARED_DEVICE,
gmatarrubia 0:820a69dfd200 159 NON_SHARED_DEVICE,
gmatarrubia 0:820a69dfd200 160 STRONGLY_ORDERED
gmatarrubia 0:820a69dfd200 161 } mmu_memory_Type;
gmatarrubia 0:820a69dfd200 162
gmatarrubia 0:820a69dfd200 163 /* Region cacheability attributes */
gmatarrubia 0:820a69dfd200 164 typedef enum
gmatarrubia 0:820a69dfd200 165 {
gmatarrubia 0:820a69dfd200 166 NON_CACHEABLE,
gmatarrubia 0:820a69dfd200 167 WB_WA,
gmatarrubia 0:820a69dfd200 168 WT,
gmatarrubia 0:820a69dfd200 169 WB_NO_WA,
gmatarrubia 0:820a69dfd200 170 } mmu_cacheability_Type;
gmatarrubia 0:820a69dfd200 171
gmatarrubia 0:820a69dfd200 172 /* Region parity check attributes */
gmatarrubia 0:820a69dfd200 173 typedef enum
gmatarrubia 0:820a69dfd200 174 {
gmatarrubia 0:820a69dfd200 175 ECC_DISABLED,
gmatarrubia 0:820a69dfd200 176 ECC_ENABLED,
gmatarrubia 0:820a69dfd200 177 } mmu_ecc_check_Type;
gmatarrubia 0:820a69dfd200 178
gmatarrubia 0:820a69dfd200 179 /* Region execution attributes */
gmatarrubia 0:820a69dfd200 180 typedef enum
gmatarrubia 0:820a69dfd200 181 {
gmatarrubia 0:820a69dfd200 182 EXECUTE,
gmatarrubia 0:820a69dfd200 183 NON_EXECUTE,
gmatarrubia 0:820a69dfd200 184 } mmu_execute_Type;
gmatarrubia 0:820a69dfd200 185
gmatarrubia 0:820a69dfd200 186 /* Region global attributes */
gmatarrubia 0:820a69dfd200 187 typedef enum
gmatarrubia 0:820a69dfd200 188 {
gmatarrubia 0:820a69dfd200 189 GLOBAL,
gmatarrubia 0:820a69dfd200 190 NON_GLOBAL,
gmatarrubia 0:820a69dfd200 191 } mmu_global_Type;
gmatarrubia 0:820a69dfd200 192
gmatarrubia 0:820a69dfd200 193 /* Region shareability attributes */
gmatarrubia 0:820a69dfd200 194 typedef enum
gmatarrubia 0:820a69dfd200 195 {
gmatarrubia 0:820a69dfd200 196 NON_SHARED,
gmatarrubia 0:820a69dfd200 197 SHARED,
gmatarrubia 0:820a69dfd200 198 } mmu_shared_Type;
gmatarrubia 0:820a69dfd200 199
gmatarrubia 0:820a69dfd200 200 /* Region security attributes */
gmatarrubia 0:820a69dfd200 201 typedef enum
gmatarrubia 0:820a69dfd200 202 {
gmatarrubia 0:820a69dfd200 203 SECURE,
gmatarrubia 0:820a69dfd200 204 NON_SECURE,
gmatarrubia 0:820a69dfd200 205 } mmu_secure_Type;
gmatarrubia 0:820a69dfd200 206
gmatarrubia 0:820a69dfd200 207 /* Region access attributes */
gmatarrubia 0:820a69dfd200 208 typedef enum
gmatarrubia 0:820a69dfd200 209 {
gmatarrubia 0:820a69dfd200 210 NO_ACCESS,
gmatarrubia 0:820a69dfd200 211 RW,
gmatarrubia 0:820a69dfd200 212 READ,
gmatarrubia 0:820a69dfd200 213 } mmu_access_Type;
gmatarrubia 0:820a69dfd200 214
gmatarrubia 0:820a69dfd200 215 /* Memory Region definition */
gmatarrubia 0:820a69dfd200 216 typedef struct RegionStruct {
gmatarrubia 0:820a69dfd200 217 mmu_region_size_Type rg_t;
gmatarrubia 0:820a69dfd200 218 mmu_memory_Type mem_t;
gmatarrubia 0:820a69dfd200 219 uint8_t domain;
gmatarrubia 0:820a69dfd200 220 mmu_cacheability_Type inner_norm_t;
gmatarrubia 0:820a69dfd200 221 mmu_cacheability_Type outer_norm_t;
gmatarrubia 0:820a69dfd200 222 mmu_ecc_check_Type e_t;
gmatarrubia 0:820a69dfd200 223 mmu_execute_Type xn_t;
gmatarrubia 0:820a69dfd200 224 mmu_global_Type g_t;
gmatarrubia 0:820a69dfd200 225 mmu_secure_Type sec_t;
gmatarrubia 0:820a69dfd200 226 mmu_access_Type priv_t;
gmatarrubia 0:820a69dfd200 227 mmu_access_Type user_t;
gmatarrubia 0:820a69dfd200 228 mmu_shared_Type sh_t;
gmatarrubia 0:820a69dfd200 229
gmatarrubia 0:820a69dfd200 230 } mmu_region_attributes_Type;
gmatarrubia 0:820a69dfd200 231
gmatarrubia 0:820a69dfd200 232 /** \brief Set section execution-never attribute
gmatarrubia 0:820a69dfd200 233
gmatarrubia 0:820a69dfd200 234 The function sets section execution-never attribute
gmatarrubia 0:820a69dfd200 235
gmatarrubia 0:820a69dfd200 236 \param [out] descriptor_l1 L1 descriptor.
gmatarrubia 0:820a69dfd200 237 \param [in] xn Section execution-never attribute : EXECUTE , NON_EXECUTE.
gmatarrubia 0:820a69dfd200 238
gmatarrubia 0:820a69dfd200 239 \return 0
gmatarrubia 0:820a69dfd200 240 */
gmatarrubia 0:820a69dfd200 241 __STATIC_INLINE int __xn_section(uint32_t *descriptor_l1, mmu_execute_Type xn)
gmatarrubia 0:820a69dfd200 242 {
gmatarrubia 0:820a69dfd200 243 *descriptor_l1 &= SECTION_XN_MASK;
gmatarrubia 0:820a69dfd200 244 *descriptor_l1 |= ((xn & 0x1) << SECTION_XN_SHIFT);
gmatarrubia 0:820a69dfd200 245 return 0;
gmatarrubia 0:820a69dfd200 246 }
gmatarrubia 0:820a69dfd200 247
gmatarrubia 0:820a69dfd200 248 /** \brief Set section domain
gmatarrubia 0:820a69dfd200 249
gmatarrubia 0:820a69dfd200 250 The function sets section domain
gmatarrubia 0:820a69dfd200 251
gmatarrubia 0:820a69dfd200 252 \param [out] descriptor_l1 L1 descriptor.
gmatarrubia 0:820a69dfd200 253 \param [in] domain Section domain
gmatarrubia 0:820a69dfd200 254
gmatarrubia 0:820a69dfd200 255 \return 0
gmatarrubia 0:820a69dfd200 256 */
gmatarrubia 0:820a69dfd200 257 __STATIC_INLINE int __domain_section(uint32_t *descriptor_l1, uint8_t domain)
gmatarrubia 0:820a69dfd200 258 {
gmatarrubia 0:820a69dfd200 259 *descriptor_l1 &= SECTION_DOMAIN_MASK;
gmatarrubia 0:820a69dfd200 260 *descriptor_l1 |= ((domain & 0xF) << SECTION_DOMAIN_SHIFT);
gmatarrubia 0:820a69dfd200 261 return 0;
gmatarrubia 0:820a69dfd200 262 }
gmatarrubia 0:820a69dfd200 263
gmatarrubia 0:820a69dfd200 264 /** \brief Set section parity check
gmatarrubia 0:820a69dfd200 265
gmatarrubia 0:820a69dfd200 266 The function sets section parity check
gmatarrubia 0:820a69dfd200 267
gmatarrubia 0:820a69dfd200 268 \param [out] descriptor_l1 L1 descriptor.
gmatarrubia 0:820a69dfd200 269 \param [in] p_bit Parity check: ECC_DISABLED, ECC_ENABLED
gmatarrubia 0:820a69dfd200 270
gmatarrubia 0:820a69dfd200 271 \return 0
gmatarrubia 0:820a69dfd200 272 */
gmatarrubia 0:820a69dfd200 273 __STATIC_INLINE int __p_section(uint32_t *descriptor_l1, mmu_ecc_check_Type p_bit)
gmatarrubia 0:820a69dfd200 274 {
gmatarrubia 0:820a69dfd200 275 *descriptor_l1 &= SECTION_P_MASK;
gmatarrubia 0:820a69dfd200 276 *descriptor_l1 |= ((p_bit & 0x1) << SECTION_P_SHIFT);
gmatarrubia 0:820a69dfd200 277 return 0;
gmatarrubia 0:820a69dfd200 278 }
gmatarrubia 0:820a69dfd200 279
gmatarrubia 0:820a69dfd200 280 /** \brief Set section access privileges
gmatarrubia 0:820a69dfd200 281
gmatarrubia 0:820a69dfd200 282 The function sets section access privileges
gmatarrubia 0:820a69dfd200 283
gmatarrubia 0:820a69dfd200 284 \param [out] descriptor_l1 L1 descriptor.
gmatarrubia 0:820a69dfd200 285 \param [in] user User Level Access: NO_ACCESS, RW, READ
gmatarrubia 0:820a69dfd200 286 \param [in] priv Privilege Level Access: NO_ACCESS, RW, READ
gmatarrubia 0:820a69dfd200 287 \param [in] afe Access flag enable
gmatarrubia 0:820a69dfd200 288
gmatarrubia 0:820a69dfd200 289 \return 0
gmatarrubia 0:820a69dfd200 290 */
gmatarrubia 0:820a69dfd200 291 __STATIC_INLINE int __ap_section(uint32_t *descriptor_l1, mmu_access_Type user, mmu_access_Type priv, uint32_t afe)
gmatarrubia 0:820a69dfd200 292 {
gmatarrubia 0:820a69dfd200 293 uint32_t ap = 0;
gmatarrubia 0:820a69dfd200 294
gmatarrubia 0:820a69dfd200 295 if (afe == 0) { //full access
gmatarrubia 0:820a69dfd200 296 if ((priv == NO_ACCESS) && (user == NO_ACCESS)) { ap = 0x0; }
gmatarrubia 0:820a69dfd200 297 else if ((priv == RW) && (user == NO_ACCESS)) { ap = 0x1; }
gmatarrubia 0:820a69dfd200 298 else if ((priv == RW) && (user == READ)) { ap = 0x2; }
gmatarrubia 0:820a69dfd200 299 else if ((priv == RW) && (user == RW)) { ap = 0x3; }
gmatarrubia 0:820a69dfd200 300 else if ((priv == READ) && (user == NO_ACCESS)) { ap = 0x5; }
gmatarrubia 0:820a69dfd200 301 else if ((priv == READ) && (user == READ)) { ap = 0x6; }
gmatarrubia 0:820a69dfd200 302 }
gmatarrubia 0:820a69dfd200 303
gmatarrubia 0:820a69dfd200 304 else { //Simplified access
gmatarrubia 0:820a69dfd200 305 if ((priv == RW) && (user == NO_ACCESS)) { ap = 0x1; }
gmatarrubia 0:820a69dfd200 306 else if ((priv == RW) && (user == RW)) { ap = 0x3; }
gmatarrubia 0:820a69dfd200 307 else if ((priv == READ) && (user == NO_ACCESS)) { ap = 0x5; }
gmatarrubia 0:820a69dfd200 308 else if ((priv == READ) && (user == READ)) { ap = 0x7; }
gmatarrubia 0:820a69dfd200 309 }
gmatarrubia 0:820a69dfd200 310
gmatarrubia 0:820a69dfd200 311 *descriptor_l1 &= SECTION_AP_MASK;
gmatarrubia 0:820a69dfd200 312 *descriptor_l1 |= (ap & 0x3) << SECTION_AP_SHIFT;
gmatarrubia 0:820a69dfd200 313 *descriptor_l1 |= ((ap & 0x4)>>2) << SECTION_AP2_SHIFT;
gmatarrubia 0:820a69dfd200 314
gmatarrubia 0:820a69dfd200 315 return 0;
gmatarrubia 0:820a69dfd200 316 }
gmatarrubia 0:820a69dfd200 317
gmatarrubia 0:820a69dfd200 318 /** \brief Set section shareability
gmatarrubia 0:820a69dfd200 319
gmatarrubia 0:820a69dfd200 320 The function sets section shareability
gmatarrubia 0:820a69dfd200 321
gmatarrubia 0:820a69dfd200 322 \param [out] descriptor_l1 L1 descriptor.
gmatarrubia 0:820a69dfd200 323 \param [in] s_bit Section shareability: NON_SHARED, SHARED
gmatarrubia 0:820a69dfd200 324
gmatarrubia 0:820a69dfd200 325 \return 0
gmatarrubia 0:820a69dfd200 326 */
gmatarrubia 0:820a69dfd200 327 __STATIC_INLINE int __shared_section(uint32_t *descriptor_l1, mmu_shared_Type s_bit)
gmatarrubia 0:820a69dfd200 328 {
gmatarrubia 0:820a69dfd200 329 *descriptor_l1 &= SECTION_S_MASK;
gmatarrubia 0:820a69dfd200 330 *descriptor_l1 |= ((s_bit & 0x1) << SECTION_S_SHIFT);
gmatarrubia 0:820a69dfd200 331 return 0;
gmatarrubia 0:820a69dfd200 332 }
gmatarrubia 0:820a69dfd200 333
gmatarrubia 0:820a69dfd200 334 /** \brief Set section Global attribute
gmatarrubia 0:820a69dfd200 335
gmatarrubia 0:820a69dfd200 336 The function sets section Global attribute
gmatarrubia 0:820a69dfd200 337
gmatarrubia 0:820a69dfd200 338 \param [out] descriptor_l1 L1 descriptor.
gmatarrubia 0:820a69dfd200 339 \param [in] g_bit Section attribute: GLOBAL, NON_GLOBAL
gmatarrubia 0:820a69dfd200 340
gmatarrubia 0:820a69dfd200 341 \return 0
gmatarrubia 0:820a69dfd200 342 */
gmatarrubia 0:820a69dfd200 343 __STATIC_INLINE int __global_section(uint32_t *descriptor_l1, mmu_global_Type g_bit)
gmatarrubia 0:820a69dfd200 344 {
gmatarrubia 0:820a69dfd200 345 *descriptor_l1 &= SECTION_NG_MASK;
gmatarrubia 0:820a69dfd200 346 *descriptor_l1 |= ((g_bit & 0x1) << SECTION_NG_SHIFT);
gmatarrubia 0:820a69dfd200 347 return 0;
gmatarrubia 0:820a69dfd200 348 }
gmatarrubia 0:820a69dfd200 349
gmatarrubia 0:820a69dfd200 350 /** \brief Set section Security attribute
gmatarrubia 0:820a69dfd200 351
gmatarrubia 0:820a69dfd200 352 The function sets section Global attribute
gmatarrubia 0:820a69dfd200 353
gmatarrubia 0:820a69dfd200 354 \param [out] descriptor_l1 L1 descriptor.
gmatarrubia 0:820a69dfd200 355 \param [in] s_bit Section Security attribute: SECURE, NON_SECURE
gmatarrubia 0:820a69dfd200 356
gmatarrubia 0:820a69dfd200 357 \return 0
gmatarrubia 0:820a69dfd200 358 */
gmatarrubia 0:820a69dfd200 359 __STATIC_INLINE int __secure_section(uint32_t *descriptor_l1, mmu_secure_Type s_bit)
gmatarrubia 0:820a69dfd200 360 {
gmatarrubia 0:820a69dfd200 361 *descriptor_l1 &= SECTION_NS_MASK;
gmatarrubia 0:820a69dfd200 362 *descriptor_l1 |= ((s_bit & 0x1) << SECTION_NS_SHIFT);
gmatarrubia 0:820a69dfd200 363 return 0;
gmatarrubia 0:820a69dfd200 364 }
gmatarrubia 0:820a69dfd200 365
gmatarrubia 0:820a69dfd200 366 /* Page 4k or 64k */
gmatarrubia 0:820a69dfd200 367 /** \brief Set 4k/64k page execution-never attribute
gmatarrubia 0:820a69dfd200 368
gmatarrubia 0:820a69dfd200 369 The function sets 4k/64k page execution-never attribute
gmatarrubia 0:820a69dfd200 370
gmatarrubia 0:820a69dfd200 371 \param [out] descriptor_l2 L2 descriptor.
gmatarrubia 0:820a69dfd200 372 \param [in] xn Page execution-never attribute : EXECUTE , NON_EXECUTE.
gmatarrubia 0:820a69dfd200 373 \param [in] page Page size: PAGE_4k, PAGE_64k,
gmatarrubia 0:820a69dfd200 374
gmatarrubia 0:820a69dfd200 375 \return 0
gmatarrubia 0:820a69dfd200 376 */
gmatarrubia 0:820a69dfd200 377 __STATIC_INLINE int __xn_page(uint32_t *descriptor_l2, mmu_execute_Type xn, mmu_region_size_Type page)
gmatarrubia 0:820a69dfd200 378 {
gmatarrubia 0:820a69dfd200 379 if (page == PAGE_4k)
gmatarrubia 0:820a69dfd200 380 {
gmatarrubia 0:820a69dfd200 381 *descriptor_l2 &= PAGE_XN_4K_MASK;
gmatarrubia 0:820a69dfd200 382 *descriptor_l2 |= ((xn & 0x1) << PAGE_XN_4K_SHIFT);
gmatarrubia 0:820a69dfd200 383 }
gmatarrubia 0:820a69dfd200 384 else
gmatarrubia 0:820a69dfd200 385 {
gmatarrubia 0:820a69dfd200 386 *descriptor_l2 &= PAGE_XN_64K_MASK;
gmatarrubia 0:820a69dfd200 387 *descriptor_l2 |= ((xn & 0x1) << PAGE_XN_64K_SHIFT);
gmatarrubia 0:820a69dfd200 388 }
gmatarrubia 0:820a69dfd200 389 return 0;
gmatarrubia 0:820a69dfd200 390 }
gmatarrubia 0:820a69dfd200 391
gmatarrubia 0:820a69dfd200 392 /** \brief Set 4k/64k page domain
gmatarrubia 0:820a69dfd200 393
gmatarrubia 0:820a69dfd200 394 The function sets 4k/64k page domain
gmatarrubia 0:820a69dfd200 395
gmatarrubia 0:820a69dfd200 396 \param [out] descriptor_l1 L1 descriptor.
gmatarrubia 0:820a69dfd200 397 \param [in] domain Page domain
gmatarrubia 0:820a69dfd200 398
gmatarrubia 0:820a69dfd200 399 \return 0
gmatarrubia 0:820a69dfd200 400 */
gmatarrubia 0:820a69dfd200 401 __STATIC_INLINE int __domain_page(uint32_t *descriptor_l1, uint8_t domain)
gmatarrubia 0:820a69dfd200 402 {
gmatarrubia 0:820a69dfd200 403 *descriptor_l1 &= PAGE_DOMAIN_MASK;
gmatarrubia 0:820a69dfd200 404 *descriptor_l1 |= ((domain & 0xf) << PAGE_DOMAIN_SHIFT);
gmatarrubia 0:820a69dfd200 405 return 0;
gmatarrubia 0:820a69dfd200 406 }
gmatarrubia 0:820a69dfd200 407
gmatarrubia 0:820a69dfd200 408 /** \brief Set 4k/64k page parity check
gmatarrubia 0:820a69dfd200 409
gmatarrubia 0:820a69dfd200 410 The function sets 4k/64k page parity check
gmatarrubia 0:820a69dfd200 411
gmatarrubia 0:820a69dfd200 412 \param [out] descriptor_l1 L1 descriptor.
gmatarrubia 0:820a69dfd200 413 \param [in] p_bit Parity check: ECC_DISABLED, ECC_ENABLED
gmatarrubia 0:820a69dfd200 414
gmatarrubia 0:820a69dfd200 415 \return 0
gmatarrubia 0:820a69dfd200 416 */
gmatarrubia 0:820a69dfd200 417 __STATIC_INLINE int __p_page(uint32_t *descriptor_l1, mmu_ecc_check_Type p_bit)
gmatarrubia 0:820a69dfd200 418 {
gmatarrubia 0:820a69dfd200 419 *descriptor_l1 &= SECTION_P_MASK;
gmatarrubia 0:820a69dfd200 420 *descriptor_l1 |= ((p_bit & 0x1) << SECTION_P_SHIFT);
gmatarrubia 0:820a69dfd200 421 return 0;
gmatarrubia 0:820a69dfd200 422 }
gmatarrubia 0:820a69dfd200 423
gmatarrubia 0:820a69dfd200 424 /** \brief Set 4k/64k page access privileges
gmatarrubia 0:820a69dfd200 425
gmatarrubia 0:820a69dfd200 426 The function sets 4k/64k page access privileges
gmatarrubia 0:820a69dfd200 427
gmatarrubia 0:820a69dfd200 428 \param [out] descriptor_l2 L2 descriptor.
gmatarrubia 0:820a69dfd200 429 \param [in] user User Level Access: NO_ACCESS, RW, READ
gmatarrubia 0:820a69dfd200 430 \param [in] priv Privilege Level Access: NO_ACCESS, RW, READ
gmatarrubia 0:820a69dfd200 431 \param [in] afe Access flag enable
gmatarrubia 0:820a69dfd200 432
gmatarrubia 0:820a69dfd200 433 \return 0
gmatarrubia 0:820a69dfd200 434 */
gmatarrubia 0:820a69dfd200 435 __STATIC_INLINE int __ap_page(uint32_t *descriptor_l2, mmu_access_Type user, mmu_access_Type priv, uint32_t afe)
gmatarrubia 0:820a69dfd200 436 {
gmatarrubia 0:820a69dfd200 437 uint32_t ap = 0;
gmatarrubia 0:820a69dfd200 438
gmatarrubia 0:820a69dfd200 439 if (afe == 0) { //full access
gmatarrubia 0:820a69dfd200 440 if ((priv == NO_ACCESS) && (user == NO_ACCESS)) { ap = 0x0; }
gmatarrubia 0:820a69dfd200 441 else if ((priv == RW) && (user == NO_ACCESS)) { ap = 0x1; }
gmatarrubia 0:820a69dfd200 442 else if ((priv == RW) && (user == READ)) { ap = 0x2; }
gmatarrubia 0:820a69dfd200 443 else if ((priv == RW) && (user == RW)) { ap = 0x3; }
gmatarrubia 0:820a69dfd200 444 else if ((priv == READ) && (user == NO_ACCESS)) { ap = 0x5; }
gmatarrubia 0:820a69dfd200 445 else if ((priv == READ) && (user == READ)) { ap = 0x6; }
gmatarrubia 0:820a69dfd200 446 }
gmatarrubia 0:820a69dfd200 447
gmatarrubia 0:820a69dfd200 448 else { //Simplified access
gmatarrubia 0:820a69dfd200 449 if ((priv == RW) && (user == NO_ACCESS)) { ap = 0x1; }
gmatarrubia 0:820a69dfd200 450 else if ((priv == RW) && (user == RW)) { ap = 0x3; }
gmatarrubia 0:820a69dfd200 451 else if ((priv == READ) && (user == NO_ACCESS)) { ap = 0x5; }
gmatarrubia 0:820a69dfd200 452 else if ((priv == READ) && (user == READ)) { ap = 0x7; }
gmatarrubia 0:820a69dfd200 453 }
gmatarrubia 0:820a69dfd200 454
gmatarrubia 0:820a69dfd200 455 *descriptor_l2 &= PAGE_AP_MASK;
gmatarrubia 0:820a69dfd200 456 *descriptor_l2 |= (ap & 0x3) << PAGE_AP_SHIFT;
gmatarrubia 0:820a69dfd200 457 *descriptor_l2 |= ((ap & 0x4)>>2) << PAGE_AP2_SHIFT;
gmatarrubia 0:820a69dfd200 458
gmatarrubia 0:820a69dfd200 459 return 0;
gmatarrubia 0:820a69dfd200 460 }
gmatarrubia 0:820a69dfd200 461
gmatarrubia 0:820a69dfd200 462 /** \brief Set 4k/64k page shareability
gmatarrubia 0:820a69dfd200 463
gmatarrubia 0:820a69dfd200 464 The function sets 4k/64k page shareability
gmatarrubia 0:820a69dfd200 465
gmatarrubia 0:820a69dfd200 466 \param [out] descriptor_l2 L2 descriptor.
gmatarrubia 0:820a69dfd200 467 \param [in] s_bit 4k/64k page shareability: NON_SHARED, SHARED
gmatarrubia 0:820a69dfd200 468
gmatarrubia 0:820a69dfd200 469 \return 0
gmatarrubia 0:820a69dfd200 470 */
gmatarrubia 0:820a69dfd200 471 __STATIC_INLINE int __shared_page(uint32_t *descriptor_l2, mmu_shared_Type s_bit)
gmatarrubia 0:820a69dfd200 472 {
gmatarrubia 0:820a69dfd200 473 *descriptor_l2 &= PAGE_S_MASK;
gmatarrubia 0:820a69dfd200 474 *descriptor_l2 |= ((s_bit & 0x1) << PAGE_S_SHIFT);
gmatarrubia 0:820a69dfd200 475 return 0;
gmatarrubia 0:820a69dfd200 476 }
gmatarrubia 0:820a69dfd200 477
gmatarrubia 0:820a69dfd200 478 /** \brief Set 4k/64k page Global attribute
gmatarrubia 0:820a69dfd200 479
gmatarrubia 0:820a69dfd200 480 The function sets 4k/64k page Global attribute
gmatarrubia 0:820a69dfd200 481
gmatarrubia 0:820a69dfd200 482 \param [out] descriptor_l2 L2 descriptor.
gmatarrubia 0:820a69dfd200 483 \param [in] g_bit 4k/64k page attribute: GLOBAL, NON_GLOBAL
gmatarrubia 0:820a69dfd200 484
gmatarrubia 0:820a69dfd200 485 \return 0
gmatarrubia 0:820a69dfd200 486 */
gmatarrubia 0:820a69dfd200 487 __STATIC_INLINE int __global_page(uint32_t *descriptor_l2, mmu_global_Type g_bit)
gmatarrubia 0:820a69dfd200 488 {
gmatarrubia 0:820a69dfd200 489 *descriptor_l2 &= PAGE_NG_MASK;
gmatarrubia 0:820a69dfd200 490 *descriptor_l2 |= ((g_bit & 0x1) << PAGE_NG_SHIFT);
gmatarrubia 0:820a69dfd200 491 return 0;
gmatarrubia 0:820a69dfd200 492 }
gmatarrubia 0:820a69dfd200 493
gmatarrubia 0:820a69dfd200 494 /** \brief Set 4k/64k page Security attribute
gmatarrubia 0:820a69dfd200 495
gmatarrubia 0:820a69dfd200 496 The function sets 4k/64k page Global attribute
gmatarrubia 0:820a69dfd200 497
gmatarrubia 0:820a69dfd200 498 \param [out] descriptor_l1 L1 descriptor.
gmatarrubia 0:820a69dfd200 499 \param [in] s_bit 4k/64k page Security attribute: SECURE, NON_SECURE
gmatarrubia 0:820a69dfd200 500
gmatarrubia 0:820a69dfd200 501 \return 0
gmatarrubia 0:820a69dfd200 502 */
gmatarrubia 0:820a69dfd200 503 __STATIC_INLINE int __secure_page(uint32_t *descriptor_l1, mmu_secure_Type s_bit)
gmatarrubia 0:820a69dfd200 504 {
gmatarrubia 0:820a69dfd200 505 *descriptor_l1 &= PAGE_NS_MASK;
gmatarrubia 0:820a69dfd200 506 *descriptor_l1 |= ((s_bit & 0x1) << PAGE_NS_SHIFT);
gmatarrubia 0:820a69dfd200 507 return 0;
gmatarrubia 0:820a69dfd200 508 }
gmatarrubia 0:820a69dfd200 509
gmatarrubia 0:820a69dfd200 510
gmatarrubia 0:820a69dfd200 511 /** \brief Set Section memory attributes
gmatarrubia 0:820a69dfd200 512
gmatarrubia 0:820a69dfd200 513 The function sets section memory attributes
gmatarrubia 0:820a69dfd200 514
gmatarrubia 0:820a69dfd200 515 \param [out] descriptor_l1 L1 descriptor.
gmatarrubia 0:820a69dfd200 516 \param [in] mem Section memory type: NORMAL, DEVICE, SHARED_DEVICE, NON_SHARED_DEVICE, STRONGLY_ORDERED
gmatarrubia 0:820a69dfd200 517 \param [in] outer Outer cacheability: NON_CACHEABLE, WB_WA, WT, WB_NO_WA,
gmatarrubia 0:820a69dfd200 518 \param [in] inner Inner cacheability: NON_CACHEABLE, WB_WA, WT, WB_NO_WA,
gmatarrubia 0:820a69dfd200 519
gmatarrubia 0:820a69dfd200 520 \return 0
gmatarrubia 0:820a69dfd200 521 */
gmatarrubia 0:820a69dfd200 522 __STATIC_INLINE int __memory_section(uint32_t *descriptor_l1, mmu_memory_Type mem, mmu_cacheability_Type outer, mmu_cacheability_Type inner)
gmatarrubia 0:820a69dfd200 523 {
gmatarrubia 0:820a69dfd200 524 *descriptor_l1 &= SECTION_TEXCB_MASK;
gmatarrubia 0:820a69dfd200 525
gmatarrubia 0:820a69dfd200 526 if (STRONGLY_ORDERED == mem)
gmatarrubia 0:820a69dfd200 527 {
gmatarrubia 0:820a69dfd200 528 return 0;
gmatarrubia 0:820a69dfd200 529 }
gmatarrubia 0:820a69dfd200 530 else if (SHARED_DEVICE == mem)
gmatarrubia 0:820a69dfd200 531 {
gmatarrubia 0:820a69dfd200 532 *descriptor_l1 |= (1 << SECTION_B_SHIFT);
gmatarrubia 0:820a69dfd200 533 }
gmatarrubia 0:820a69dfd200 534 else if (NON_SHARED_DEVICE == mem)
gmatarrubia 0:820a69dfd200 535 {
gmatarrubia 0:820a69dfd200 536 *descriptor_l1 |= (1 << SECTION_TEX1_SHIFT);
gmatarrubia 0:820a69dfd200 537 }
gmatarrubia 0:820a69dfd200 538 else if (NORMAL == mem)
gmatarrubia 0:820a69dfd200 539 {
gmatarrubia 0:820a69dfd200 540 *descriptor_l1 |= 1 << SECTION_TEX2_SHIFT;
gmatarrubia 0:820a69dfd200 541 switch(inner)
gmatarrubia 0:820a69dfd200 542 {
gmatarrubia 0:820a69dfd200 543 case NON_CACHEABLE:
gmatarrubia 0:820a69dfd200 544 break;
gmatarrubia 0:820a69dfd200 545 case WB_WA:
gmatarrubia 0:820a69dfd200 546 *descriptor_l1 |= (1 << SECTION_B_SHIFT);
gmatarrubia 0:820a69dfd200 547 break;
gmatarrubia 0:820a69dfd200 548 case WT:
gmatarrubia 0:820a69dfd200 549 *descriptor_l1 |= 1 << SECTION_C_SHIFT;
gmatarrubia 0:820a69dfd200 550 break;
gmatarrubia 0:820a69dfd200 551 case WB_NO_WA:
gmatarrubia 0:820a69dfd200 552 *descriptor_l1 |= (1 << SECTION_B_SHIFT) | (1 << SECTION_C_SHIFT);
gmatarrubia 0:820a69dfd200 553 break;
gmatarrubia 0:820a69dfd200 554 }
gmatarrubia 0:820a69dfd200 555 switch(outer)
gmatarrubia 0:820a69dfd200 556 {
gmatarrubia 0:820a69dfd200 557 case NON_CACHEABLE:
gmatarrubia 0:820a69dfd200 558 break;
gmatarrubia 0:820a69dfd200 559 case WB_WA:
gmatarrubia 0:820a69dfd200 560 *descriptor_l1 |= (1 << SECTION_TEX0_SHIFT);
gmatarrubia 0:820a69dfd200 561 break;
gmatarrubia 0:820a69dfd200 562 case WT:
gmatarrubia 0:820a69dfd200 563 *descriptor_l1 |= 1 << SECTION_TEX1_SHIFT;
gmatarrubia 0:820a69dfd200 564 break;
gmatarrubia 0:820a69dfd200 565 case WB_NO_WA:
gmatarrubia 0:820a69dfd200 566 *descriptor_l1 |= (1 << SECTION_TEX0_SHIFT) | (1 << SECTION_TEX0_SHIFT);
gmatarrubia 0:820a69dfd200 567 break;
gmatarrubia 0:820a69dfd200 568 }
gmatarrubia 0:820a69dfd200 569 }
gmatarrubia 0:820a69dfd200 570
gmatarrubia 0:820a69dfd200 571 return 0;
gmatarrubia 0:820a69dfd200 572 }
gmatarrubia 0:820a69dfd200 573
gmatarrubia 0:820a69dfd200 574 /** \brief Set 4k/64k page memory attributes
gmatarrubia 0:820a69dfd200 575
gmatarrubia 0:820a69dfd200 576 The function sets 4k/64k page memory attributes
gmatarrubia 0:820a69dfd200 577
gmatarrubia 0:820a69dfd200 578 \param [out] descriptor_l2 L2 descriptor.
gmatarrubia 0:820a69dfd200 579 \param [in] mem 4k/64k page memory type: NORMAL, DEVICE, SHARED_DEVICE, NON_SHARED_DEVICE, STRONGLY_ORDERED
gmatarrubia 0:820a69dfd200 580 \param [in] outer Outer cacheability: NON_CACHEABLE, WB_WA, WT, WB_NO_WA,
gmatarrubia 0:820a69dfd200 581 \param [in] inner Inner cacheability: NON_CACHEABLE, WB_WA, WT, WB_NO_WA,
gmatarrubia 0:820a69dfd200 582
gmatarrubia 0:820a69dfd200 583 \return 0
gmatarrubia 0:820a69dfd200 584 */
gmatarrubia 0:820a69dfd200 585 __STATIC_INLINE int __memory_page(uint32_t *descriptor_l2, mmu_memory_Type mem, mmu_cacheability_Type outer, mmu_cacheability_Type inner, mmu_region_size_Type page)
gmatarrubia 0:820a69dfd200 586 {
gmatarrubia 0:820a69dfd200 587 *descriptor_l2 &= PAGE_4K_TEXCB_MASK;
gmatarrubia 0:820a69dfd200 588
gmatarrubia 0:820a69dfd200 589 if (page == PAGE_64k)
gmatarrubia 0:820a69dfd200 590 {
gmatarrubia 0:820a69dfd200 591 //same as section
gmatarrubia 0:820a69dfd200 592 __memory_section(descriptor_l2, mem, outer, inner);
gmatarrubia 0:820a69dfd200 593 }
gmatarrubia 0:820a69dfd200 594 else
gmatarrubia 0:820a69dfd200 595 {
gmatarrubia 0:820a69dfd200 596 if (STRONGLY_ORDERED == mem)
gmatarrubia 0:820a69dfd200 597 {
gmatarrubia 0:820a69dfd200 598 return 0;
gmatarrubia 0:820a69dfd200 599 }
gmatarrubia 0:820a69dfd200 600 else if (SHARED_DEVICE == mem)
gmatarrubia 0:820a69dfd200 601 {
gmatarrubia 0:820a69dfd200 602 *descriptor_l2 |= (1 << PAGE_4K_B_SHIFT);
gmatarrubia 0:820a69dfd200 603 }
gmatarrubia 0:820a69dfd200 604 else if (NON_SHARED_DEVICE == mem)
gmatarrubia 0:820a69dfd200 605 {
gmatarrubia 0:820a69dfd200 606 *descriptor_l2 |= (1 << PAGE_4K_TEX1_SHIFT);
gmatarrubia 0:820a69dfd200 607 }
gmatarrubia 0:820a69dfd200 608 else if (NORMAL == mem)
gmatarrubia 0:820a69dfd200 609 {
gmatarrubia 0:820a69dfd200 610 *descriptor_l2 |= 1 << PAGE_4K_TEX2_SHIFT;
gmatarrubia 0:820a69dfd200 611 switch(inner)
gmatarrubia 0:820a69dfd200 612 {
gmatarrubia 0:820a69dfd200 613 case NON_CACHEABLE:
gmatarrubia 0:820a69dfd200 614 break;
gmatarrubia 0:820a69dfd200 615 case WB_WA:
gmatarrubia 0:820a69dfd200 616 *descriptor_l2 |= (1 << PAGE_4K_B_SHIFT);
gmatarrubia 0:820a69dfd200 617 break;
gmatarrubia 0:820a69dfd200 618 case WT:
gmatarrubia 0:820a69dfd200 619 *descriptor_l2 |= 1 << PAGE_4K_C_SHIFT;
gmatarrubia 0:820a69dfd200 620 break;
gmatarrubia 0:820a69dfd200 621 case WB_NO_WA:
gmatarrubia 0:820a69dfd200 622 *descriptor_l2 |= (1 << PAGE_4K_B_SHIFT) | (1 << PAGE_4K_C_SHIFT);
gmatarrubia 0:820a69dfd200 623 break;
gmatarrubia 0:820a69dfd200 624 }
gmatarrubia 0:820a69dfd200 625 switch(outer)
gmatarrubia 0:820a69dfd200 626 {
gmatarrubia 0:820a69dfd200 627 case NON_CACHEABLE:
gmatarrubia 0:820a69dfd200 628 break;
gmatarrubia 0:820a69dfd200 629 case WB_WA:
gmatarrubia 0:820a69dfd200 630 *descriptor_l2 |= (1 << PAGE_4K_TEX0_SHIFT);
gmatarrubia 0:820a69dfd200 631 break;
gmatarrubia 0:820a69dfd200 632 case WT:
gmatarrubia 0:820a69dfd200 633 *descriptor_l2 |= 1 << PAGE_4K_TEX1_SHIFT;
gmatarrubia 0:820a69dfd200 634 break;
gmatarrubia 0:820a69dfd200 635 case WB_NO_WA:
gmatarrubia 0:820a69dfd200 636 *descriptor_l2 |= (1 << PAGE_4K_TEX0_SHIFT) | (1 << PAGE_4K_TEX0_SHIFT);
gmatarrubia 0:820a69dfd200 637 break;
gmatarrubia 0:820a69dfd200 638 }
gmatarrubia 0:820a69dfd200 639 }
gmatarrubia 0:820a69dfd200 640 }
gmatarrubia 0:820a69dfd200 641
gmatarrubia 0:820a69dfd200 642 return 0;
gmatarrubia 0:820a69dfd200 643 }
gmatarrubia 0:820a69dfd200 644
gmatarrubia 0:820a69dfd200 645 /** \brief Create a L1 section descriptor
gmatarrubia 0:820a69dfd200 646
gmatarrubia 0:820a69dfd200 647 The function creates a section descriptor.
gmatarrubia 0:820a69dfd200 648
gmatarrubia 0:820a69dfd200 649 Assumptions:
gmatarrubia 0:820a69dfd200 650 - 16MB super sections not suported
gmatarrubia 0:820a69dfd200 651 - TEX remap disabled, so memory type and attributes are described directly by bits in the descriptor
gmatarrubia 0:820a69dfd200 652 - Functions always return 0
gmatarrubia 0:820a69dfd200 653
gmatarrubia 0:820a69dfd200 654 \param [out] descriptor L1 descriptor
gmatarrubia 0:820a69dfd200 655 \param [out] descriptor2 L2 descriptor
gmatarrubia 0:820a69dfd200 656 \param [in] reg Section attributes
gmatarrubia 0:820a69dfd200 657
gmatarrubia 0:820a69dfd200 658 \return 0
gmatarrubia 0:820a69dfd200 659 */
gmatarrubia 0:820a69dfd200 660 __STATIC_INLINE int __get_section_descriptor(uint32_t *descriptor, mmu_region_attributes_Type reg)
gmatarrubia 0:820a69dfd200 661 {
gmatarrubia 0:820a69dfd200 662 *descriptor = 0;
gmatarrubia 0:820a69dfd200 663
gmatarrubia 0:820a69dfd200 664 __memory_section(descriptor, reg.mem_t, reg.outer_norm_t, reg.inner_norm_t);
gmatarrubia 0:820a69dfd200 665 __xn_section(descriptor,reg.xn_t);
gmatarrubia 0:820a69dfd200 666 __domain_section(descriptor, reg.domain);
gmatarrubia 0:820a69dfd200 667 __p_section(descriptor, reg.e_t);
gmatarrubia 0:820a69dfd200 668 __ap_section(descriptor, reg.priv_t, reg.user_t, 1);
gmatarrubia 0:820a69dfd200 669 __shared_section(descriptor,reg.sh_t);
gmatarrubia 0:820a69dfd200 670 __global_section(descriptor,reg.g_t);
gmatarrubia 0:820a69dfd200 671 __secure_section(descriptor,reg.sec_t);
gmatarrubia 0:820a69dfd200 672 *descriptor &= SECTION_MASK;
gmatarrubia 0:820a69dfd200 673 *descriptor |= SECTION_DESCRIPTOR;
gmatarrubia 0:820a69dfd200 674
gmatarrubia 0:820a69dfd200 675 return 0;
gmatarrubia 0:820a69dfd200 676
gmatarrubia 0:820a69dfd200 677 }
gmatarrubia 0:820a69dfd200 678
gmatarrubia 0:820a69dfd200 679
gmatarrubia 0:820a69dfd200 680 /** \brief Create a L1 and L2 4k/64k page descriptor
gmatarrubia 0:820a69dfd200 681
gmatarrubia 0:820a69dfd200 682 The function creates a 4k/64k page descriptor.
gmatarrubia 0:820a69dfd200 683 Assumptions:
gmatarrubia 0:820a69dfd200 684 - TEX remap disabled, so memory type and attributes are described directly by bits in the descriptor
gmatarrubia 0:820a69dfd200 685 - Functions always return 0
gmatarrubia 0:820a69dfd200 686
gmatarrubia 0:820a69dfd200 687 \param [out] descriptor L1 descriptor
gmatarrubia 0:820a69dfd200 688 \param [out] descriptor2 L2 descriptor
gmatarrubia 0:820a69dfd200 689 \param [in] reg 4k/64k page attributes
gmatarrubia 0:820a69dfd200 690
gmatarrubia 0:820a69dfd200 691 \return 0
gmatarrubia 0:820a69dfd200 692 */
gmatarrubia 0:820a69dfd200 693 __STATIC_INLINE int __get_page_descriptor(uint32_t *descriptor, uint32_t *descriptor2, mmu_region_attributes_Type reg)
gmatarrubia 0:820a69dfd200 694 {
gmatarrubia 0:820a69dfd200 695 *descriptor = 0;
gmatarrubia 0:820a69dfd200 696 *descriptor2 = 0;
gmatarrubia 0:820a69dfd200 697
gmatarrubia 0:820a69dfd200 698 switch (reg.rg_t)
gmatarrubia 0:820a69dfd200 699 {
gmatarrubia 0:820a69dfd200 700 case PAGE_4k:
gmatarrubia 0:820a69dfd200 701 __memory_page(descriptor2, reg.mem_t, reg.outer_norm_t, reg.inner_norm_t, PAGE_4k);
gmatarrubia 0:820a69dfd200 702 __xn_page(descriptor2, reg.xn_t, PAGE_4k);
gmatarrubia 0:820a69dfd200 703 __domain_page(descriptor, reg.domain);
gmatarrubia 0:820a69dfd200 704 __p_page(descriptor, reg.e_t);
gmatarrubia 0:820a69dfd200 705 __ap_page(descriptor2, reg.priv_t, reg.user_t, 1);
gmatarrubia 0:820a69dfd200 706 __shared_page(descriptor2,reg.sh_t);
gmatarrubia 0:820a69dfd200 707 __global_page(descriptor2,reg.g_t);
gmatarrubia 0:820a69dfd200 708 __secure_page(descriptor,reg.sec_t);
gmatarrubia 0:820a69dfd200 709 *descriptor &= PAGE_L1_MASK;
gmatarrubia 0:820a69dfd200 710 *descriptor |= PAGE_L1_DESCRIPTOR;
gmatarrubia 0:820a69dfd200 711 *descriptor2 &= PAGE_L2_4K_MASK;
gmatarrubia 0:820a69dfd200 712 *descriptor2 |= PAGE_L2_4K_DESC;
gmatarrubia 0:820a69dfd200 713 break;
gmatarrubia 0:820a69dfd200 714
gmatarrubia 0:820a69dfd200 715 case PAGE_64k:
gmatarrubia 0:820a69dfd200 716 __memory_page(descriptor2, reg.mem_t, reg.outer_norm_t, reg.inner_norm_t, PAGE_64k);
gmatarrubia 0:820a69dfd200 717 __xn_page(descriptor2, reg.xn_t, PAGE_64k);
gmatarrubia 0:820a69dfd200 718 __domain_page(descriptor, reg.domain);
gmatarrubia 0:820a69dfd200 719 __p_page(descriptor, reg.e_t);
gmatarrubia 0:820a69dfd200 720 __ap_page(descriptor2, reg.priv_t, reg.user_t, 1);
gmatarrubia 0:820a69dfd200 721 __shared_page(descriptor2,reg.sh_t);
gmatarrubia 0:820a69dfd200 722 __global_page(descriptor2,reg.g_t);
gmatarrubia 0:820a69dfd200 723 __secure_page(descriptor,reg.sec_t);
gmatarrubia 0:820a69dfd200 724 *descriptor &= PAGE_L1_MASK;
gmatarrubia 0:820a69dfd200 725 *descriptor |= PAGE_L1_DESCRIPTOR;
gmatarrubia 0:820a69dfd200 726 *descriptor2 &= PAGE_L2_64K_MASK;
gmatarrubia 0:820a69dfd200 727 *descriptor2 |= PAGE_L2_64K_DESC;
gmatarrubia 0:820a69dfd200 728 break;
gmatarrubia 0:820a69dfd200 729
gmatarrubia 0:820a69dfd200 730 case SECTION:
gmatarrubia 0:820a69dfd200 731 //error
gmatarrubia 0:820a69dfd200 732 break;
gmatarrubia 0:820a69dfd200 733
gmatarrubia 0:820a69dfd200 734 }
gmatarrubia 0:820a69dfd200 735
gmatarrubia 0:820a69dfd200 736 return 0;
gmatarrubia 0:820a69dfd200 737
gmatarrubia 0:820a69dfd200 738 }
gmatarrubia 0:820a69dfd200 739
gmatarrubia 0:820a69dfd200 740 /** \brief Create a 1MB Section
gmatarrubia 0:820a69dfd200 741
gmatarrubia 0:820a69dfd200 742 \param [in] ttb Translation table base address
gmatarrubia 0:820a69dfd200 743 \param [in] base_address Section base address
gmatarrubia 0:820a69dfd200 744 \param [in] count Number of sections to create
gmatarrubia 0:820a69dfd200 745 \param [in] descriptor_l1 L1 descriptor (region attributes)
gmatarrubia 0:820a69dfd200 746
gmatarrubia 0:820a69dfd200 747 */
gmatarrubia 0:820a69dfd200 748 __STATIC_INLINE void __TTSection(uint32_t *ttb, uint32_t base_address, uint32_t count, uint32_t descriptor_l1)
gmatarrubia 0:820a69dfd200 749 {
gmatarrubia 0:820a69dfd200 750 uint32_t offset;
gmatarrubia 0:820a69dfd200 751 uint32_t entry;
gmatarrubia 0:820a69dfd200 752 uint32_t i;
gmatarrubia 0:820a69dfd200 753
gmatarrubia 0:820a69dfd200 754 offset = base_address >> 20;
gmatarrubia 0:820a69dfd200 755 entry = (base_address & 0xFFF00000) | descriptor_l1;
gmatarrubia 0:820a69dfd200 756
gmatarrubia 0:820a69dfd200 757 //4 bytes aligned
gmatarrubia 0:820a69dfd200 758 ttb = ttb + offset;
gmatarrubia 0:820a69dfd200 759
gmatarrubia 0:820a69dfd200 760 for (i = 0; i < count; i++ )
gmatarrubia 0:820a69dfd200 761 {
gmatarrubia 0:820a69dfd200 762 //4 bytes aligned
gmatarrubia 0:820a69dfd200 763 *ttb++ = entry;
gmatarrubia 0:820a69dfd200 764 entry += OFFSET_1M;
gmatarrubia 0:820a69dfd200 765 }
gmatarrubia 0:820a69dfd200 766 }
gmatarrubia 0:820a69dfd200 767
gmatarrubia 0:820a69dfd200 768 /** \brief Create a 4k page entry
gmatarrubia 0:820a69dfd200 769
gmatarrubia 0:820a69dfd200 770 \param [in] ttb L1 table base address
gmatarrubia 0:820a69dfd200 771 \param [in] base_address 4k base address
gmatarrubia 0:820a69dfd200 772 \param [in] count Number of 4k pages to create
gmatarrubia 0:820a69dfd200 773 \param [in] descriptor_l1 L1 descriptor (region attributes)
gmatarrubia 0:820a69dfd200 774 \param [in] ttb_l2 L2 table base address
gmatarrubia 0:820a69dfd200 775 \param [in] descriptor_l2 L2 descriptor (region attributes)
gmatarrubia 0:820a69dfd200 776
gmatarrubia 0:820a69dfd200 777 */
gmatarrubia 0:820a69dfd200 778 __STATIC_INLINE void __TTPage_4k(uint32_t *ttb, uint32_t base_address, uint32_t count, uint32_t descriptor_l1, uint32_t *ttb_l2, uint32_t descriptor_l2 )
gmatarrubia 0:820a69dfd200 779 {
gmatarrubia 0:820a69dfd200 780
gmatarrubia 0:820a69dfd200 781 uint32_t offset, offset2;
gmatarrubia 0:820a69dfd200 782 uint32_t entry, entry2;
gmatarrubia 0:820a69dfd200 783 uint32_t i;
gmatarrubia 0:820a69dfd200 784
gmatarrubia 0:820a69dfd200 785
gmatarrubia 0:820a69dfd200 786 offset = base_address >> 20;
gmatarrubia 0:820a69dfd200 787 entry = ((int)ttb_l2 & 0xFFFFFC00) | descriptor_l1;
gmatarrubia 0:820a69dfd200 788
gmatarrubia 0:820a69dfd200 789 //4 bytes aligned
gmatarrubia 0:820a69dfd200 790 ttb += offset;
gmatarrubia 0:820a69dfd200 791 //create l1_entry
gmatarrubia 0:820a69dfd200 792 *ttb = entry;
gmatarrubia 0:820a69dfd200 793
gmatarrubia 0:820a69dfd200 794 offset2 = (base_address & 0xff000) >> 12;
gmatarrubia 0:820a69dfd200 795 ttb_l2 += offset2;
gmatarrubia 0:820a69dfd200 796 entry2 = (base_address & 0xFFFFF000) | descriptor_l2;
gmatarrubia 0:820a69dfd200 797 for (i = 0; i < count; i++ )
gmatarrubia 0:820a69dfd200 798 {
gmatarrubia 0:820a69dfd200 799 //4 bytes aligned
gmatarrubia 0:820a69dfd200 800 *ttb_l2++ = entry2;
gmatarrubia 0:820a69dfd200 801 entry2 += OFFSET_4K;
gmatarrubia 0:820a69dfd200 802 }
gmatarrubia 0:820a69dfd200 803 }
gmatarrubia 0:820a69dfd200 804
gmatarrubia 0:820a69dfd200 805 /** \brief Create a 64k page entry
gmatarrubia 0:820a69dfd200 806
gmatarrubia 0:820a69dfd200 807 \param [in] ttb L1 table base address
gmatarrubia 0:820a69dfd200 808 \param [in] base_address 64k base address
gmatarrubia 0:820a69dfd200 809 \param [in] count Number of 64k pages to create
gmatarrubia 0:820a69dfd200 810 \param [in] descriptor_l1 L1 descriptor (region attributes)
gmatarrubia 0:820a69dfd200 811 \param [in] ttb_l2 L2 table base address
gmatarrubia 0:820a69dfd200 812 \param [in] descriptor_l2 L2 descriptor (region attributes)
gmatarrubia 0:820a69dfd200 813
gmatarrubia 0:820a69dfd200 814 */
gmatarrubia 0:820a69dfd200 815 __STATIC_INLINE void __TTPage_64k(uint32_t *ttb, uint32_t base_address, uint32_t count, uint32_t descriptor_l1, uint32_t *ttb_l2, uint32_t descriptor_l2 )
gmatarrubia 0:820a69dfd200 816 {
gmatarrubia 0:820a69dfd200 817 uint32_t offset, offset2;
gmatarrubia 0:820a69dfd200 818 uint32_t entry, entry2;
gmatarrubia 0:820a69dfd200 819 uint32_t i,j;
gmatarrubia 0:820a69dfd200 820
gmatarrubia 0:820a69dfd200 821
gmatarrubia 0:820a69dfd200 822 offset = base_address >> 20;
gmatarrubia 0:820a69dfd200 823 entry = ((int)ttb_l2 & 0xFFFFFC00) | descriptor_l1;
gmatarrubia 0:820a69dfd200 824
gmatarrubia 0:820a69dfd200 825 //4 bytes aligned
gmatarrubia 0:820a69dfd200 826 ttb += offset;
gmatarrubia 0:820a69dfd200 827 //create l1_entry
gmatarrubia 0:820a69dfd200 828 *ttb = entry;
gmatarrubia 0:820a69dfd200 829
gmatarrubia 0:820a69dfd200 830 offset2 = (base_address & 0xff000) >> 12;
gmatarrubia 0:820a69dfd200 831 ttb_l2 += offset2;
gmatarrubia 0:820a69dfd200 832 entry2 = (base_address & 0xFFFF0000) | descriptor_l2;
gmatarrubia 0:820a69dfd200 833 for (i = 0; i < count; i++ )
gmatarrubia 0:820a69dfd200 834 {
gmatarrubia 0:820a69dfd200 835 //create 16 entries
gmatarrubia 0:820a69dfd200 836 for (j = 0; j < 16; j++)
gmatarrubia 0:820a69dfd200 837 //4 bytes aligned
gmatarrubia 0:820a69dfd200 838 *ttb_l2++ = entry2;
gmatarrubia 0:820a69dfd200 839 entry2 += OFFSET_64K;
gmatarrubia 0:820a69dfd200 840 }
gmatarrubia 0:820a69dfd200 841 }
gmatarrubia 0:820a69dfd200 842
gmatarrubia 0:820a69dfd200 843 /*@} end of MMU_Functions */
gmatarrubia 0:820a69dfd200 844 #endif
gmatarrubia 0:820a69dfd200 845
gmatarrubia 0:820a69dfd200 846 #ifdef __cplusplus
gmatarrubia 0:820a69dfd200 847 }
gmatarrubia 0:820a69dfd200 848 #endif