Giorgos Tsapparellas
/
SX1272Lib
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Dependents: LoRaWAN_mbed_lmic_agriculture_app
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sx1272Regs-Fsk.h
00001 /* 00002 / _____) _ | | 00003 ( (____ _____ ____ _| |_ _____ ____| |__ 00004 \____ \| ___ | (_ _) ___ |/ ___) _ \ 00005 _____) ) ____| | | || |_| ____( (___| | | | 00006 (______/|_____)_|_|_| \__)_____)\____)_| |_| 00007 (C) 2015 Semtech 00008 00009 Description: SX1272 FSK modem registers and bits definitions 00010 00011 License: Revised BSD License, see LICENSE.TXT file include in the project 00012 00013 Maintainer: Miguel Luis and Gregory Cristian 00014 ///////////////////////////////////////////////////////////////////////////// 00015 00016 Used by Giorgos Tsapparellas for Internet of Things (IoT) smart monitoring 00017 device for agriculture using LoRaWAN technology. 00018 00019 Date of issued copy: 20 January 2018 00020 00021 Modifications: 00022 - No external modifications of the existing "AS IT IS" software. 00023 */ 00024 #ifndef __SX1272_REGS_FSK_H__ 00025 #define __SX1272_REGS_FSK_H__ 00026 00027 /*! 00028 * ============================================================================ 00029 * SX1272 Internal registers Address 00030 * ============================================================================ 00031 */ 00032 #define REG_FIFO 0x00 00033 // Common settings 00034 #define REG_OPMODE 0x01 00035 #define REG_BITRATEMSB 0x02 00036 #define REG_BITRATELSB 0x03 00037 #define REG_FDEVMSB 0x04 00038 #define REG_FDEVLSB 0x05 00039 #define REG_FRFMSB 0x06 00040 #define REG_FRFMID 0x07 00041 #define REG_FRFLSB 0x08 00042 // Tx settings 00043 #define REG_PACONFIG 0x09 00044 #define REG_PARAMP 0x0A 00045 #define REG_OCP 0x0B 00046 // Rx settings 00047 #define REG_LNA 0x0C 00048 #define REG_RXCONFIG 0x0D 00049 #define REG_RSSICONFIG 0x0E 00050 #define REG_RSSICOLLISION 0x0F 00051 #define REG_RSSITHRESH 0x10 00052 #define REG_RSSIVALUE 0x11 00053 #define REG_RXBW 0x12 00054 #define REG_AFCBW 0x13 00055 #define REG_OOKPEAK 0x14 00056 #define REG_OOKFIX 0x15 00057 #define REG_OOKAVG 0x16 00058 #define REG_RES17 0x17 00059 #define REG_RES18 0x18 00060 #define REG_RES19 0x19 00061 #define REG_AFCFEI 0x1A 00062 #define REG_AFCMSB 0x1B 00063 #define REG_AFCLSB 0x1C 00064 #define REG_FEIMSB 0x1D 00065 #define REG_FEILSB 0x1E 00066 #define REG_PREAMBLEDETECT 0x1F 00067 #define REG_RXTIMEOUT1 0x20 00068 #define REG_RXTIMEOUT2 0x21 00069 #define REG_RXTIMEOUT3 0x22 00070 #define REG_RXDELAY 0x23 00071 // Oscillator settings 00072 #define REG_OSC 0x24 00073 // Packet handler settings 00074 #define REG_PREAMBLEMSB 0x25 00075 #define REG_PREAMBLELSB 0x26 00076 #define REG_SYNCCONFIG 0x27 00077 #define REG_SYNCVALUE1 0x28 00078 #define REG_SYNCVALUE2 0x29 00079 #define REG_SYNCVALUE3 0x2A 00080 #define REG_SYNCVALUE4 0x2B 00081 #define REG_SYNCVALUE5 0x2C 00082 #define REG_SYNCVALUE6 0x2D 00083 #define REG_SYNCVALUE7 0x2E 00084 #define REG_SYNCVALUE8 0x2F 00085 #define REG_PACKETCONFIG1 0x30 00086 #define REG_PACKETCONFIG2 0x31 00087 #define REG_PAYLOADLENGTH 0x32 00088 #define REG_NODEADRS 0x33 00089 #define REG_BROADCASTADRS 0x34 00090 #define REG_FIFOTHRESH 0x35 00091 // SM settings 00092 #define REG_SEQCONFIG1 0x36 00093 #define REG_SEQCONFIG2 0x37 00094 #define REG_TIMERRESOL 0x38 00095 #define REG_TIMER1COEF 0x39 00096 #define REG_TIMER2COEF 0x3A 00097 // Service settings 00098 #define REG_IMAGECAL 0x3B 00099 #define REG_TEMP 0x3C 00100 #define REG_LOWBAT 0x3D 00101 // Status 00102 #define REG_IRQFLAGS1 0x3E 00103 #define REG_IRQFLAGS2 0x3F 00104 // I/O settings 00105 #define REG_DIOMAPPING1 0x40 00106 #define REG_DIOMAPPING2 0x41 00107 // Version 00108 #define REG_VERSION 0x42 00109 // Additional settings 00110 #define REG_AGCREF 0x43 00111 #define REG_AGCTHRESH1 0x44 00112 #define REG_AGCTHRESH2 0x45 00113 #define REG_AGCTHRESH3 0x46 00114 #define REG_PLLHOP 0x4B 00115 #define REG_TCXO 0x58 00116 #define REG_PADAC 0x5A 00117 #define REG_PLL 0x5C 00118 #define REG_PLLLOWPN 0x5E 00119 #define REG_FORMERTEMP 0x6C 00120 #define REG_BITRATEFRAC 0x70 00121 00122 /*! 00123 * ============================================================================ 00124 * SX1272 FSK bits control definition 00125 * ============================================================================ 00126 */ 00127 00128 /*! 00129 * RegFifo 00130 */ 00131 00132 /*! 00133 * RegOpMode 00134 */ 00135 #define RF_OPMODE_LONGRANGEMODE_MASK 0x7F 00136 #define RF_OPMODE_LONGRANGEMODE_OFF 0x00 00137 #define RF_OPMODE_LONGRANGEMODE_ON 0x80 00138 00139 #define RF_OPMODE_MODULATIONTYPE_MASK 0x9F 00140 #define RF_OPMODE_MODULATIONTYPE_FSK 0x00 // Default 00141 #define RF_OPMODE_MODULATIONTYPE_OOK 0x20 00142 00143 #define RF_OPMODE_MODULATIONSHAPING_MASK 0xE7 00144 #define RF_OPMODE_MODULATIONSHAPING_00 0x00 // Default 00145 #define RF_OPMODE_MODULATIONSHAPING_01 0x08 00146 #define RF_OPMODE_MODULATIONSHAPING_10 0x10 00147 #define RF_OPMODE_MODULATIONSHAPING_11 0x18 00148 00149 #define RF_OPMODE_MASK 0xF8 00150 #define RF_OPMODE_SLEEP 0x00 00151 #define RF_OPMODE_STANDBY 0x01 // Default 00152 #define RF_OPMODE_SYNTHESIZER_TX 0x02 00153 #define RF_OPMODE_TRANSMITTER 0x03 00154 #define RF_OPMODE_SYNTHESIZER_RX 0x04 00155 #define RF_OPMODE_RECEIVER 0x05 00156 00157 /*! 00158 * RegBitRate (bits/sec) 00159 */ 00160 #define RF_BITRATEMSB_1200_BPS 0x68 00161 #define RF_BITRATELSB_1200_BPS 0x2B 00162 #define RF_BITRATEMSB_2400_BPS 0x34 00163 #define RF_BITRATELSB_2400_BPS 0x15 00164 #define RF_BITRATEMSB_4800_BPS 0x1A // Default 00165 #define RF_BITRATELSB_4800_BPS 0x0B // Default 00166 #define RF_BITRATEMSB_9600_BPS 0x0D 00167 #define RF_BITRATELSB_9600_BPS 0x05 00168 #define RF_BITRATEMSB_15000_BPS 0x08 00169 #define RF_BITRATELSB_15000_BPS 0x55 00170 #define RF_BITRATEMSB_19200_BPS 0x06 00171 #define RF_BITRATELSB_19200_BPS 0x83 00172 #define RF_BITRATEMSB_38400_BPS 0x03 00173 #define RF_BITRATELSB_38400_BPS 0x41 00174 #define RF_BITRATEMSB_76800_BPS 0x01 00175 #define RF_BITRATELSB_76800_BPS 0xA1 00176 #define RF_BITRATEMSB_153600_BPS 0x00 00177 #define RF_BITRATELSB_153600_BPS 0xD0 00178 #define RF_BITRATEMSB_57600_BPS 0x02 00179 #define RF_BITRATELSB_57600_BPS 0x2C 00180 #define RF_BITRATEMSB_115200_BPS 0x01 00181 #define RF_BITRATELSB_115200_BPS 0x16 00182 #define RF_BITRATEMSB_12500_BPS 0x0A 00183 #define RF_BITRATELSB_12500_BPS 0x00 00184 #define RF_BITRATEMSB_25000_BPS 0x05 00185 #define RF_BITRATELSB_25000_BPS 0x00 00186 #define RF_BITRATEMSB_50000_BPS 0x02 00187 #define RF_BITRATELSB_50000_BPS 0x80 00188 #define RF_BITRATEMSB_100000_BPS 0x01 00189 #define RF_BITRATELSB_100000_BPS 0x40 00190 #define RF_BITRATEMSB_150000_BPS 0x00 00191 #define RF_BITRATELSB_150000_BPS 0xD5 00192 #define RF_BITRATEMSB_200000_BPS 0x00 00193 #define RF_BITRATELSB_200000_BPS 0xA0 00194 #define RF_BITRATEMSB_250000_BPS 0x00 00195 #define RF_BITRATELSB_250000_BPS 0x80 00196 #define RF_BITRATEMSB_32768_BPS 0x03 00197 #define RF_BITRATELSB_32768_BPS 0xD1 00198 00199 /*! 00200 * RegFdev (Hz) 00201 */ 00202 #define RF_FDEVMSB_2000_HZ 0x00 00203 #define RF_FDEVLSB_2000_HZ 0x21 00204 #define RF_FDEVMSB_5000_HZ 0x00 // Default 00205 #define RF_FDEVLSB_5000_HZ 0x52 // Default 00206 #define RF_FDEVMSB_10000_HZ 0x00 00207 #define RF_FDEVLSB_10000_HZ 0xA4 00208 #define RF_FDEVMSB_15000_HZ 0x00 00209 #define RF_FDEVLSB_15000_HZ 0xF6 00210 #define RF_FDEVMSB_20000_HZ 0x01 00211 #define RF_FDEVLSB_20000_HZ 0x48 00212 #define RF_FDEVMSB_25000_HZ 0x01 00213 #define RF_FDEVLSB_25000_HZ 0x9A 00214 #define RF_FDEVMSB_30000_HZ 0x01 00215 #define RF_FDEVLSB_30000_HZ 0xEC 00216 #define RF_FDEVMSB_35000_HZ 0x02 00217 #define RF_FDEVLSB_35000_HZ 0x3D 00218 #define RF_FDEVMSB_40000_HZ 0x02 00219 #define RF_FDEVLSB_40000_HZ 0x8F 00220 #define RF_FDEVMSB_45000_HZ 0x02 00221 #define RF_FDEVLSB_45000_HZ 0xE1 00222 #define RF_FDEVMSB_50000_HZ 0x03 00223 #define RF_FDEVLSB_50000_HZ 0x33 00224 #define RF_FDEVMSB_55000_HZ 0x03 00225 #define RF_FDEVLSB_55000_HZ 0x85 00226 #define RF_FDEVMSB_60000_HZ 0x03 00227 #define RF_FDEVLSB_60000_HZ 0xD7 00228 #define RF_FDEVMSB_65000_HZ 0x04 00229 #define RF_FDEVLSB_65000_HZ 0x29 00230 #define RF_FDEVMSB_70000_HZ 0x04 00231 #define RF_FDEVLSB_70000_HZ 0x7B 00232 #define RF_FDEVMSB_75000_HZ 0x04 00233 #define RF_FDEVLSB_75000_HZ 0xCD 00234 #define RF_FDEVMSB_80000_HZ 0x05 00235 #define RF_FDEVLSB_80000_HZ 0x1F 00236 #define RF_FDEVMSB_85000_HZ 0x05 00237 #define RF_FDEVLSB_85000_HZ 0x71 00238 #define RF_FDEVMSB_90000_HZ 0x05 00239 #define RF_FDEVLSB_90000_HZ 0xC3 00240 #define RF_FDEVMSB_95000_HZ 0x06 00241 #define RF_FDEVLSB_95000_HZ 0x14 00242 #define RF_FDEVMSB_100000_HZ 0x06 00243 #define RF_FDEVLSB_100000_HZ 0x66 00244 #define RF_FDEVMSB_110000_HZ 0x07 00245 #define RF_FDEVLSB_110000_HZ 0x0A 00246 #define RF_FDEVMSB_120000_HZ 0x07 00247 #define RF_FDEVLSB_120000_HZ 0xAE 00248 #define RF_FDEVMSB_130000_HZ 0x08 00249 #define RF_FDEVLSB_130000_HZ 0x52 00250 #define RF_FDEVMSB_140000_HZ 0x08 00251 #define RF_FDEVLSB_140000_HZ 0xF6 00252 #define RF_FDEVMSB_150000_HZ 0x09 00253 #define RF_FDEVLSB_150000_HZ 0x9A 00254 #define RF_FDEVMSB_160000_HZ 0x0A 00255 #define RF_FDEVLSB_160000_HZ 0x3D 00256 #define RF_FDEVMSB_170000_HZ 0x0A 00257 #define RF_FDEVLSB_170000_HZ 0xE1 00258 #define RF_FDEVMSB_180000_HZ 0x0B 00259 #define RF_FDEVLSB_180000_HZ 0x85 00260 #define RF_FDEVMSB_190000_HZ 0x0C 00261 #define RF_FDEVLSB_190000_HZ 0x29 00262 #define RF_FDEVMSB_200000_HZ 0x0C 00263 #define RF_FDEVLSB_200000_HZ 0xCD 00264 00265 /*! 00266 * RegFrf (MHz) 00267 */ 00268 #define RF_FRFMSB_863_MHZ 0xD7 00269 #define RF_FRFMID_863_MHZ 0xC0 00270 #define RF_FRFLSB_863_MHZ 0x00 00271 #define RF_FRFMSB_864_MHZ 0xD8 00272 #define RF_FRFMID_864_MHZ 0x00 00273 #define RF_FRFLSB_864_MHZ 0x00 00274 #define RF_FRFMSB_865_MHZ 0xD8 00275 #define RF_FRFMID_865_MHZ 0x40 00276 #define RF_FRFLSB_865_MHZ 0x00 00277 #define RF_FRFMSB_866_MHZ 0xD8 00278 #define RF_FRFMID_866_MHZ 0x80 00279 #define RF_FRFLSB_866_MHZ 0x00 00280 #define RF_FRFMSB_867_MHZ 0xD8 00281 #define RF_FRFMID_867_MHZ 0xC0 00282 #define RF_FRFLSB_867_MHZ 0x00 00283 #define RF_FRFMSB_868_MHZ 0xD9 00284 #define RF_FRFMID_868_MHZ 0x00 00285 #define RF_FRFLSB_868_MHZ 0x00 00286 #define RF_FRFMSB_869_MHZ 0xD9 00287 #define RF_FRFMID_869_MHZ 0x40 00288 #define RF_FRFLSB_869_MHZ 0x00 00289 #define RF_FRFMSB_870_MHZ 0xD9 00290 #define RF_FRFMID_870_MHZ 0x80 00291 #define RF_FRFLSB_870_MHZ 0x00 00292 00293 #define RF_FRFMSB_902_MHZ 0xE1 00294 #define RF_FRFMID_902_MHZ 0x80 00295 #define RF_FRFLSB_902_MHZ 0x00 00296 #define RF_FRFMSB_903_MHZ 0xE1 00297 #define RF_FRFMID_903_MHZ 0xC0 00298 #define RF_FRFLSB_903_MHZ 0x00 00299 #define RF_FRFMSB_904_MHZ 0xE2 00300 #define RF_FRFMID_904_MHZ 0x00 00301 #define RF_FRFLSB_904_MHZ 0x00 00302 #define RF_FRFMSB_905_MHZ 0xE2 00303 #define RF_FRFMID_905_MHZ 0x40 00304 #define RF_FRFLSB_905_MHZ 0x00 00305 #define RF_FRFMSB_906_MHZ 0xE2 00306 #define RF_FRFMID_906_MHZ 0x80 00307 #define RF_FRFLSB_906_MHZ 0x00 00308 #define RF_FRFMSB_907_MHZ 0xE2 00309 #define RF_FRFMID_907_MHZ 0xC0 00310 #define RF_FRFLSB_907_MHZ 0x00 00311 #define RF_FRFMSB_908_MHZ 0xE3 00312 #define RF_FRFMID_908_MHZ 0x00 00313 #define RF_FRFLSB_908_MHZ 0x00 00314 #define RF_FRFMSB_909_MHZ 0xE3 00315 #define RF_FRFMID_909_MHZ 0x40 00316 #define RF_FRFLSB_909_MHZ 0x00 00317 #define RF_FRFMSB_910_MHZ 0xE3 00318 #define RF_FRFMID_910_MHZ 0x80 00319 #define RF_FRFLSB_910_MHZ 0x00 00320 #define RF_FRFMSB_911_MHZ 0xE3 00321 #define RF_FRFMID_911_MHZ 0xC0 00322 #define RF_FRFLSB_911_MHZ 0x00 00323 #define RF_FRFMSB_912_MHZ 0xE4 00324 #define RF_FRFMID_912_MHZ 0x00 00325 #define RF_FRFLSB_912_MHZ 0x00 00326 #define RF_FRFMSB_913_MHZ 0xE4 00327 #define RF_FRFMID_913_MHZ 0x40 00328 #define RF_FRFLSB_913_MHZ 0x00 00329 #define RF_FRFMSB_914_MHZ 0xE4 00330 #define RF_FRFMID_914_MHZ 0x80 00331 #define RF_FRFLSB_914_MHZ 0x00 00332 #define RF_FRFMSB_915_MHZ 0xE4 // Default 00333 #define RF_FRFMID_915_MHZ 0xC0 // Default 00334 #define RF_FRFLSB_915_MHZ 0x00 // Default 00335 #define RF_FRFMSB_916_MHZ 0xE5 00336 #define RF_FRFMID_916_MHZ 0x00 00337 #define RF_FRFLSB_916_MHZ 0x00 00338 #define RF_FRFMSB_917_MHZ 0xE5 00339 #define RF_FRFMID_917_MHZ 0x40 00340 #define RF_FRFLSB_917_MHZ 0x00 00341 #define RF_FRFMSB_918_MHZ 0xE5 00342 #define RF_FRFMID_918_MHZ 0x80 00343 #define RF_FRFLSB_918_MHZ 0x00 00344 #define RF_FRFMSB_919_MHZ 0xE5 00345 #define RF_FRFMID_919_MHZ 0xC0 00346 #define RF_FRFLSB_919_MHZ 0x00 00347 #define RF_FRFMSB_920_MHZ 0xE6 00348 #define RF_FRFMID_920_MHZ 0x00 00349 #define RF_FRFLSB_920_MHZ 0x00 00350 #define RF_FRFMSB_921_MHZ 0xE6 00351 #define RF_FRFMID_921_MHZ 0x40 00352 #define RF_FRFLSB_921_MHZ 0x00 00353 #define RF_FRFMSB_922_MHZ 0xE6 00354 #define RF_FRFMID_922_MHZ 0x80 00355 #define RF_FRFLSB_922_MHZ 0x00 00356 #define RF_FRFMSB_923_MHZ 0xE6 00357 #define RF_FRFMID_923_MHZ 0xC0 00358 #define RF_FRFLSB_923_MHZ 0x00 00359 #define RF_FRFMSB_924_MHZ 0xE7 00360 #define RF_FRFMID_924_MHZ 0x00 00361 #define RF_FRFLSB_924_MHZ 0x00 00362 #define RF_FRFMSB_925_MHZ 0xE7 00363 #define RF_FRFMID_925_MHZ 0x40 00364 #define RF_FRFLSB_925_MHZ 0x00 00365 #define RF_FRFMSB_926_MHZ 0xE7 00366 #define RF_FRFMID_926_MHZ 0x80 00367 #define RF_FRFLSB_926_MHZ 0x00 00368 #define RF_FRFMSB_927_MHZ 0xE7 00369 #define RF_FRFMID_927_MHZ 0xC0 00370 #define RF_FRFLSB_927_MHZ 0x00 00371 #define RF_FRFMSB_928_MHZ 0xE8 00372 #define RF_FRFMID_928_MHZ 0x00 00373 #define RF_FRFLSB_928_MHZ 0x00 00374 00375 /*! 00376 * RegPaConfig 00377 */ 00378 #define RF_PACONFIG_PASELECT_MASK 0x7F 00379 #define RF_PACONFIG_PASELECT_PABOOST 0x80 00380 #define RF_PACONFIG_PASELECT_RFO 0x00 // Default 00381 00382 #define RF_PACONFIG_OUTPUTPOWER_MASK 0xF0 00383 00384 /*! 00385 * RegPaRamp 00386 */ 00387 #define RF_PARAMP_LOWPNTXPLL_MASK 0xEF 00388 #define RF_PARAMP_LOWPNTXPLL_OFF 0x10 // Default 00389 #define RF_PARAMP_LOWPNTXPLL_ON 0x00 00390 00391 #define RF_PARAMP_MASK 0xF0 00392 #define RF_PARAMP_3400_US 0x00 00393 #define RF_PARAMP_2000_US 0x01 00394 #define RF_PARAMP_1000_US 0x02 00395 #define RF_PARAMP_0500_US 0x03 00396 #define RF_PARAMP_0250_US 0x04 00397 #define RF_PARAMP_0125_US 0x05 00398 #define RF_PARAMP_0100_US 0x06 00399 #define RF_PARAMP_0062_US 0x07 00400 #define RF_PARAMP_0050_US 0x08 00401 #define RF_PARAMP_0040_US 0x09 // Default 00402 #define RF_PARAMP_0031_US 0x0A 00403 #define RF_PARAMP_0025_US 0x0B 00404 #define RF_PARAMP_0020_US 0x0C 00405 #define RF_PARAMP_0015_US 0x0D 00406 #define RF_PARAMP_0012_US 0x0E 00407 #define RF_PARAMP_0010_US 0x0F 00408 00409 /*! 00410 * RegOcp 00411 */ 00412 #define RF_OCP_MASK 0xDF 00413 #define RF_OCP_ON 0x20 // Default 00414 #define RF_OCP_OFF 0x00 00415 00416 #define RF_OCP_TRIM_MASK 0xE0 00417 #define RF_OCP_TRIM_045_MA 0x00 00418 #define RF_OCP_TRIM_050_MA 0x01 00419 #define RF_OCP_TRIM_055_MA 0x02 00420 #define RF_OCP_TRIM_060_MA 0x03 00421 #define RF_OCP_TRIM_065_MA 0x04 00422 #define RF_OCP_TRIM_070_MA 0x05 00423 #define RF_OCP_TRIM_075_MA 0x06 00424 #define RF_OCP_TRIM_080_MA 0x07 00425 #define RF_OCP_TRIM_085_MA 0x08 00426 #define RF_OCP_TRIM_090_MA 0x09 00427 #define RF_OCP_TRIM_095_MA 0x0A 00428 #define RF_OCP_TRIM_100_MA 0x0B // Default 00429 #define RF_OCP_TRIM_105_MA 0x0C 00430 #define RF_OCP_TRIM_110_MA 0x0D 00431 #define RF_OCP_TRIM_115_MA 0x0E 00432 #define RF_OCP_TRIM_120_MA 0x0F 00433 #define RF_OCP_TRIM_130_MA 0x10 00434 #define RF_OCP_TRIM_140_MA 0x11 00435 #define RF_OCP_TRIM_150_MA 0x12 00436 #define RF_OCP_TRIM_160_MA 0x13 00437 #define RF_OCP_TRIM_170_MA 0x14 00438 #define RF_OCP_TRIM_180_MA 0x15 00439 #define RF_OCP_TRIM_190_MA 0x16 00440 #define RF_OCP_TRIM_200_MA 0x17 00441 #define RF_OCP_TRIM_210_MA 0x18 00442 #define RF_OCP_TRIM_220_MA 0x19 00443 #define RF_OCP_TRIM_230_MA 0x1A 00444 #define RF_OCP_TRIM_240_MA 0x1B 00445 00446 /*! 00447 * RegLna 00448 */ 00449 #define RF_LNA_GAIN_MASK 0x1F 00450 #define RF_LNA_GAIN_G1 0x20 // Default 00451 #define RF_LNA_GAIN_G2 0x40 00452 #define RF_LNA_GAIN_G3 0x60 00453 #define RF_LNA_GAIN_G4 0x80 00454 #define RF_LNA_GAIN_G5 0xA0 00455 #define RF_LNA_GAIN_G6 0xC0 00456 00457 #define RF_LNA_BOOST_MASK 0xFC 00458 #define RF_LNA_BOOST_OFF 0x00 // Default 00459 #define RF_LNA_BOOST_ON 0x03 00460 00461 /*! 00462 * RegRxConfig 00463 */ 00464 #define RF_RXCONFIG_RESTARTRXONCOLLISION_MASK 0x7F 00465 #define RF_RXCONFIG_RESTARTRXONCOLLISION_ON 0x80 00466 #define RF_RXCONFIG_RESTARTRXONCOLLISION_OFF 0x00 // Default 00467 00468 #define RF_RXCONFIG_RESTARTRXWITHOUTPLLLOCK 0x40 // Write only 00469 00470 #define RF_RXCONFIG_RESTARTRXWITHPLLLOCK 0x20 // Write only 00471 00472 #define RF_RXCONFIG_AFCAUTO_MASK 0xEF 00473 #define RF_RXCONFIG_AFCAUTO_ON 0x10 00474 #define RF_RXCONFIG_AFCAUTO_OFF 0x00 // Default 00475 00476 #define RF_RXCONFIG_AGCAUTO_MASK 0xF7 00477 #define RF_RXCONFIG_AGCAUTO_ON 0x08 // Default 00478 #define RF_RXCONFIG_AGCAUTO_OFF 0x00 00479 00480 #define RF_RXCONFIG_RXTRIGER_MASK 0xF8 00481 #define RF_RXCONFIG_RXTRIGER_OFF 0x00 00482 #define RF_RXCONFIG_RXTRIGER_RSSI 0x01 00483 #define RF_RXCONFIG_RXTRIGER_PREAMBLEDETECT 0x06 // Default 00484 #define RF_RXCONFIG_RXTRIGER_RSSI_PREAMBLEDETECT 0x07 00485 00486 /*! 00487 * RegRssiConfig 00488 */ 00489 #define RF_RSSICONFIG_OFFSET_MASK 0x07 00490 #define RF_RSSICONFIG_OFFSET_P_00_DB 0x00 // Default 00491 #define RF_RSSICONFIG_OFFSET_P_01_DB 0x08 00492 #define RF_RSSICONFIG_OFFSET_P_02_DB 0x10 00493 #define RF_RSSICONFIG_OFFSET_P_03_DB 0x18 00494 #define RF_RSSICONFIG_OFFSET_P_04_DB 0x20 00495 #define RF_RSSICONFIG_OFFSET_P_05_DB 0x28 00496 #define RF_RSSICONFIG_OFFSET_P_06_DB 0x30 00497 #define RF_RSSICONFIG_OFFSET_P_07_DB 0x38 00498 #define RF_RSSICONFIG_OFFSET_P_08_DB 0x40 00499 #define RF_RSSICONFIG_OFFSET_P_09_DB 0x48 00500 #define RF_RSSICONFIG_OFFSET_P_10_DB 0x50 00501 #define RF_RSSICONFIG_OFFSET_P_11_DB 0x58 00502 #define RF_RSSICONFIG_OFFSET_P_12_DB 0x60 00503 #define RF_RSSICONFIG_OFFSET_P_13_DB 0x68 00504 #define RF_RSSICONFIG_OFFSET_P_14_DB 0x70 00505 #define RF_RSSICONFIG_OFFSET_P_15_DB 0x78 00506 #define RF_RSSICONFIG_OFFSET_M_16_DB 0x80 00507 #define RF_RSSICONFIG_OFFSET_M_15_DB 0x88 00508 #define RF_RSSICONFIG_OFFSET_M_14_DB 0x90 00509 #define RF_RSSICONFIG_OFFSET_M_13_DB 0x98 00510 #define RF_RSSICONFIG_OFFSET_M_12_DB 0xA0 00511 #define RF_RSSICONFIG_OFFSET_M_11_DB 0xA8 00512 #define RF_RSSICONFIG_OFFSET_M_10_DB 0xB0 00513 #define RF_RSSICONFIG_OFFSET_M_09_DB 0xB8 00514 #define RF_RSSICONFIG_OFFSET_M_08_DB 0xC0 00515 #define RF_RSSICONFIG_OFFSET_M_07_DB 0xC8 00516 #define RF_RSSICONFIG_OFFSET_M_06_DB 0xD0 00517 #define RF_RSSICONFIG_OFFSET_M_05_DB 0xD8 00518 #define RF_RSSICONFIG_OFFSET_M_04_DB 0xE0 00519 #define RF_RSSICONFIG_OFFSET_M_03_DB 0xE8 00520 #define RF_RSSICONFIG_OFFSET_M_02_DB 0xF0 00521 #define RF_RSSICONFIG_OFFSET_M_01_DB 0xF8 00522 00523 #define RF_RSSICONFIG_SMOOTHING_MASK 0xF8 00524 #define RF_RSSICONFIG_SMOOTHING_2 0x00 00525 #define RF_RSSICONFIG_SMOOTHING_4 0x01 00526 #define RF_RSSICONFIG_SMOOTHING_8 0x02 // Default 00527 #define RF_RSSICONFIG_SMOOTHING_16 0x03 00528 #define RF_RSSICONFIG_SMOOTHING_32 0x04 00529 #define RF_RSSICONFIG_SMOOTHING_64 0x05 00530 #define RF_RSSICONFIG_SMOOTHING_128 0x06 00531 #define RF_RSSICONFIG_SMOOTHING_256 0x07 00532 00533 /*! 00534 * RegRssiCollision 00535 */ 00536 #define RF_RSSICOLISION_THRESHOLD 0x0A // Default 00537 00538 /*! 00539 * RegRssiThresh 00540 */ 00541 #define RF_RSSITHRESH_THRESHOLD 0xFF // Default 00542 00543 /*! 00544 * RegRssiValue (Read Only) 00545 */ 00546 00547 /*! 00548 * RegRxBw 00549 */ 00550 #define RF_RXBW_MANT_MASK 0xE7 00551 #define RF_RXBW_MANT_16 0x00 00552 #define RF_RXBW_MANT_20 0x08 00553 #define RF_RXBW_MANT_24 0x10 // Default 00554 00555 #define RF_RXBW_EXP_MASK 0xF8 00556 #define RF_RXBW_EXP_0 0x00 00557 #define RF_RXBW_EXP_1 0x01 00558 #define RF_RXBW_EXP_2 0x02 00559 #define RF_RXBW_EXP_3 0x03 00560 #define RF_RXBW_EXP_4 0x04 00561 #define RF_RXBW_EXP_5 0x05 // Default 00562 #define RF_RXBW_EXP_6 0x06 00563 #define RF_RXBW_EXP_7 0x07 00564 00565 /*! 00566 * RegAfcBw 00567 */ 00568 #define RF_AFCBW_MANTAFC_MASK 0xE7 00569 #define RF_AFCBW_MANTAFC_16 0x00 00570 #define RF_AFCBW_MANTAFC_20 0x08 // Default 00571 #define RF_AFCBW_MANTAFC_24 0x10 00572 00573 #define RF_AFCBW_EXPAFC_MASK 0xF8 00574 #define RF_AFCBW_EXPAFC_0 0x00 00575 #define RF_AFCBW_EXPAFC_1 0x01 00576 #define RF_AFCBW_EXPAFC_2 0x02 00577 #define RF_AFCBW_EXPAFC_3 0x03 // Default 00578 #define RF_AFCBW_EXPAFC_4 0x04 00579 #define RF_AFCBW_EXPAFC_5 0x05 00580 #define RF_AFCBW_EXPAFC_6 0x06 00581 #define RF_AFCBW_EXPAFC_7 0x07 00582 00583 /*! 00584 * RegOokPeak 00585 */ 00586 #define RF_OOKPEAK_BITSYNC_MASK 0xDF // Default 00587 #define RF_OOKPEAK_BITSYNC_ON 0x20 // Default 00588 #define RF_OOKPEAK_BITSYNC_OFF 0x00 00589 00590 #define RF_OOKPEAK_OOKTHRESHTYPE_MASK 0xE7 00591 #define RF_OOKPEAK_OOKTHRESHTYPE_FIXED 0x00 00592 #define RF_OOKPEAK_OOKTHRESHTYPE_PEAK 0x08 // Default 00593 #define RF_OOKPEAK_OOKTHRESHTYPE_AVERAGE 0x10 00594 00595 #define RF_OOKPEAK_OOKPEAKTHRESHSTEP_MASK 0xF8 00596 #define RF_OOKPEAK_OOKPEAKTHRESHSTEP_0_5_DB 0x00 // Default 00597 #define RF_OOKPEAK_OOKPEAKTHRESHSTEP_1_0_DB 0x01 00598 #define RF_OOKPEAK_OOKPEAKTHRESHSTEP_1_5_DB 0x02 00599 #define RF_OOKPEAK_OOKPEAKTHRESHSTEP_2_0_DB 0x03 00600 #define RF_OOKPEAK_OOKPEAKTHRESHSTEP_3_0_DB 0x04 00601 #define RF_OOKPEAK_OOKPEAKTHRESHSTEP_4_0_DB 0x05 00602 #define RF_OOKPEAK_OOKPEAKTHRESHSTEP_5_0_DB 0x06 00603 #define RF_OOKPEAK_OOKPEAKTHRESHSTEP_6_0_DB 0x07 00604 00605 /*! 00606 * RegOokFix 00607 */ 00608 #define RF_OOKFIX_OOKFIXEDTHRESHOLD 0x0C // Default 00609 00610 /*! 00611 * RegOokAvg 00612 */ 00613 #define RF_OOKAVG_OOKPEAKTHRESHDEC_MASK 0x1F 00614 #define RF_OOKAVG_OOKPEAKTHRESHDEC_000 0x00 // Default 00615 #define RF_OOKAVG_OOKPEAKTHRESHDEC_001 0x20 00616 #define RF_OOKAVG_OOKPEAKTHRESHDEC_010 0x40 00617 #define RF_OOKAVG_OOKPEAKTHRESHDEC_011 0x60 00618 #define RF_OOKAVG_OOKPEAKTHRESHDEC_100 0x80 00619 #define RF_OOKAVG_OOKPEAKTHRESHDEC_101 0xA0 00620 #define RF_OOKAVG_OOKPEAKTHRESHDEC_110 0xC0 00621 #define RF_OOKAVG_OOKPEAKTHRESHDEC_111 0xE0 00622 00623 #define RF_OOKAVG_AVERAGEOFFSET_MASK 0xF3 00624 #define RF_OOKAVG_AVERAGEOFFSET_0_DB 0x00 // Default 00625 #define RF_OOKAVG_AVERAGEOFFSET_2_DB 0x04 00626 #define RF_OOKAVG_AVERAGEOFFSET_4_DB 0x08 00627 #define RF_OOKAVG_AVERAGEOFFSET_6_DB 0x0C 00628 00629 #define RF_OOKAVG_OOKAVERAGETHRESHFILT_MASK 0xFC 00630 #define RF_OOKAVG_OOKAVERAGETHRESHFILT_00 0x00 00631 #define RF_OOKAVG_OOKAVERAGETHRESHFILT_01 0x01 00632 #define RF_OOKAVG_OOKAVERAGETHRESHFILT_10 0x02 // Default 00633 #define RF_OOKAVG_OOKAVERAGETHRESHFILT_11 0x03 00634 00635 /*! 00636 * RegAfcFei 00637 */ 00638 #define RF_AFCFEI_AGCSTART 0x10 00639 00640 #define RF_AFCFEI_AFCCLEAR 0x02 00641 00642 #define RF_AFCFEI_AFCAUTOCLEAR_MASK 0xFE 00643 #define RF_AFCFEI_AFCAUTOCLEAR_ON 0x01 00644 #define RF_AFCFEI_AFCAUTOCLEAR_OFF 0x00 // Default 00645 00646 /*! 00647 * RegAfcMsb (Read Only) 00648 */ 00649 00650 /*! 00651 * RegAfcLsb (Read Only) 00652 */ 00653 00654 /*! 00655 * RegFeiMsb (Read Only) 00656 */ 00657 00658 /*! 00659 * RegFeiLsb (Read Only) 00660 */ 00661 00662 /*! 00663 * RegPreambleDetect 00664 */ 00665 #define RF_PREAMBLEDETECT_DETECTOR_MASK 0x7F 00666 #define RF_PREAMBLEDETECT_DETECTOR_ON 0x80 // Default 00667 #define RF_PREAMBLEDETECT_DETECTOR_OFF 0x00 00668 00669 #define RF_PREAMBLEDETECT_DETECTORSIZE_MASK 0x9F 00670 #define RF_PREAMBLEDETECT_DETECTORSIZE_1 0x00 00671 #define RF_PREAMBLEDETECT_DETECTORSIZE_2 0x20 // Default 00672 #define RF_PREAMBLEDETECT_DETECTORSIZE_3 0x40 00673 #define RF_PREAMBLEDETECT_DETECTORSIZE_4 0x60 00674 00675 #define RF_PREAMBLEDETECT_DETECTORTOL_MASK 0xE0 00676 #define RF_PREAMBLEDETECT_DETECTORTOL_0 0x00 00677 #define RF_PREAMBLEDETECT_DETECTORTOL_1 0x01 00678 #define RF_PREAMBLEDETECT_DETECTORTOL_2 0x02 00679 #define RF_PREAMBLEDETECT_DETECTORTOL_3 0x03 00680 #define RF_PREAMBLEDETECT_DETECTORTOL_4 0x04 00681 #define RF_PREAMBLEDETECT_DETECTORTOL_5 0x05 00682 #define RF_PREAMBLEDETECT_DETECTORTOL_6 0x06 00683 #define RF_PREAMBLEDETECT_DETECTORTOL_7 0x07 00684 #define RF_PREAMBLEDETECT_DETECTORTOL_8 0x08 00685 #define RF_PREAMBLEDETECT_DETECTORTOL_9 0x09 00686 #define RF_PREAMBLEDETECT_DETECTORTOL_10 0x0A // Default 00687 #define RF_PREAMBLEDETECT_DETECTORTOL_11 0x0B 00688 #define RF_PREAMBLEDETECT_DETECTORTOL_12 0x0C 00689 #define RF_PREAMBLEDETECT_DETECTORTOL_13 0x0D 00690 #define RF_PREAMBLEDETECT_DETECTORTOL_14 0x0E 00691 #define RF_PREAMBLEDETECT_DETECTORTOL_15 0x0F 00692 #define RF_PREAMBLEDETECT_DETECTORTOL_16 0x10 00693 #define RF_PREAMBLEDETECT_DETECTORTOL_17 0x11 00694 #define RF_PREAMBLEDETECT_DETECTORTOL_18 0x12 00695 #define RF_PREAMBLEDETECT_DETECTORTOL_19 0x13 00696 #define RF_PREAMBLEDETECT_DETECTORTOL_20 0x14 00697 #define RF_PREAMBLEDETECT_DETECTORTOL_21 0x15 00698 #define RF_PREAMBLEDETECT_DETECTORTOL_22 0x16 00699 #define RF_PREAMBLEDETECT_DETECTORTOL_23 0x17 00700 #define RF_PREAMBLEDETECT_DETECTORTOL_24 0x18 00701 #define RF_PREAMBLEDETECT_DETECTORTOL_25 0x19 00702 #define RF_PREAMBLEDETECT_DETECTORTOL_26 0x1A 00703 #define RF_PREAMBLEDETECT_DETECTORTOL_27 0x1B 00704 #define RF_PREAMBLEDETECT_DETECTORTOL_28 0x1C 00705 #define RF_PREAMBLEDETECT_DETECTORTOL_29 0x1D 00706 #define RF_PREAMBLEDETECT_DETECTORTOL_30 0x1E 00707 #define RF_PREAMBLEDETECT_DETECTORTOL_31 0x1F 00708 00709 /*! 00710 * RegRxTimeout1 00711 */ 00712 #define RF_RXTIMEOUT1_TIMEOUTRXRSSI 0x00 // Default 00713 00714 /*! 00715 * RegRxTimeout2 00716 */ 00717 #define RF_RXTIMEOUT2_TIMEOUTRXPREAMBLE 0x00 // Default 00718 00719 /*! 00720 * RegRxTimeout3 00721 */ 00722 #define RF_RXTIMEOUT3_TIMEOUTSIGNALSYNC 0x00 // Default 00723 00724 /*! 00725 * RegRxDelay 00726 */ 00727 #define RF_RXDELAY_INTERPACKETRXDELAY 0x00 // Default 00728 00729 /*! 00730 * RegOsc 00731 */ 00732 #define RF_OSC_RCCALSTART 0x08 00733 00734 #define RF_OSC_CLKOUT_MASK 0xF8 00735 #define RF_OSC_CLKOUT_32_MHZ 0x00 00736 #define RF_OSC_CLKOUT_16_MHZ 0x01 00737 #define RF_OSC_CLKOUT_8_MHZ 0x02 00738 #define RF_OSC_CLKOUT_4_MHZ 0x03 00739 #define RF_OSC_CLKOUT_2_MHZ 0x04 00740 #define RF_OSC_CLKOUT_1_MHZ 0x05 00741 #define RF_OSC_CLKOUT_RC 0x06 00742 #define RF_OSC_CLKOUT_OFF 0x07 // Default 00743 00744 /*! 00745 * RegPreambleMsb/RegPreambleLsb 00746 */ 00747 #define RF_PREAMBLEMSB_SIZE 0x00 // Default 00748 #define RF_PREAMBLELSB_SIZE 0x03 // Default 00749 00750 /*! 00751 * RegSyncConfig 00752 */ 00753 #define RF_SYNCCONFIG_AUTORESTARTRXMODE_MASK 0x3F 00754 #define RF_SYNCCONFIG_AUTORESTARTRXMODE_WAITPLL_ON 0x80 // Default 00755 #define RF_SYNCCONFIG_AUTORESTARTRXMODE_WAITPLL_OFF 0x40 00756 #define RF_SYNCCONFIG_AUTORESTARTRXMODE_OFF 0x00 00757 00758 00759 #define RF_SYNCCONFIG_PREAMBLEPOLARITY_MASK 0xDF 00760 #define RF_SYNCCONFIG_PREAMBLEPOLARITY_55 0x20 00761 #define RF_SYNCCONFIG_PREAMBLEPOLARITY_AA 0x00 // Default 00762 00763 #define RF_SYNCCONFIG_SYNC_MASK 0xEF 00764 #define RF_SYNCCONFIG_SYNC_ON 0x10 // Default 00765 #define RF_SYNCCONFIG_SYNC_OFF 0x00 00766 00767 #define RF_SYNCCONFIG_FIFOFILLCONDITION_MASK 0xF7 00768 #define RF_SYNCCONFIG_FIFOFILLCONDITION_AUTO 0x00 // Default 00769 #define RF_SYNCCONFIG_FIFOFILLCONDITION_MANUAL 0x08 00770 00771 #define RF_SYNCCONFIG_SYNCSIZE_MASK 0xF8 00772 #define RF_SYNCCONFIG_SYNCSIZE_1 0x00 00773 #define RF_SYNCCONFIG_SYNCSIZE_2 0x01 00774 #define RF_SYNCCONFIG_SYNCSIZE_3 0x02 00775 #define RF_SYNCCONFIG_SYNCSIZE_4 0x03 // Default 00776 #define RF_SYNCCONFIG_SYNCSIZE_5 0x04 00777 #define RF_SYNCCONFIG_SYNCSIZE_6 0x05 00778 #define RF_SYNCCONFIG_SYNCSIZE_7 0x06 00779 #define RF_SYNCCONFIG_SYNCSIZE_8 0x07 00780 00781 /*! 00782 * RegSyncValue1-8 00783 */ 00784 #define RF_SYNCVALUE1_SYNCVALUE 0x01 // Default 00785 #define RF_SYNCVALUE2_SYNCVALUE 0x01 // Default 00786 #define RF_SYNCVALUE3_SYNCVALUE 0x01 // Default 00787 #define RF_SYNCVALUE4_SYNCVALUE 0x01 // Default 00788 #define RF_SYNCVALUE5_SYNCVALUE 0x01 // Default 00789 #define RF_SYNCVALUE6_SYNCVALUE 0x01 // Default 00790 #define RF_SYNCVALUE7_SYNCVALUE 0x01 // Default 00791 #define RF_SYNCVALUE8_SYNCVALUE 0x01 // Default 00792 00793 /*! 00794 * RegPacketConfig1 00795 */ 00796 #define RF_PACKETCONFIG1_PACKETFORMAT_MASK 0x7F 00797 #define RF_PACKETCONFIG1_PACKETFORMAT_FIXED 0x00 00798 #define RF_PACKETCONFIG1_PACKETFORMAT_VARIABLE 0x80 // Default 00799 00800 #define RF_PACKETCONFIG1_DCFREE_MASK 0x9F 00801 #define RF_PACKETCONFIG1_DCFREE_OFF 0x00 // Default 00802 #define RF_PACKETCONFIG1_DCFREE_MANCHESTER 0x20 00803 #define RF_PACKETCONFIG1_DCFREE_WHITENING 0x40 00804 00805 #define RF_PACKETCONFIG1_CRC_MASK 0xEF 00806 #define RF_PACKETCONFIG1_CRC_ON 0x10 // Default 00807 #define RF_PACKETCONFIG1_CRC_OFF 0x00 00808 00809 #define RF_PACKETCONFIG1_CRCAUTOCLEAR_MASK 0xF7 00810 #define RF_PACKETCONFIG1_CRCAUTOCLEAR_ON 0x00 // Default 00811 #define RF_PACKETCONFIG1_CRCAUTOCLEAR_OFF 0x08 00812 00813 #define RF_PACKETCONFIG1_ADDRSFILTERING_MASK 0xF9 00814 #define RF_PACKETCONFIG1_ADDRSFILTERING_OFF 0x00 // Default 00815 #define RF_PACKETCONFIG1_ADDRSFILTERING_NODE 0x02 00816 #define RF_PACKETCONFIG1_ADDRSFILTERING_NODEBROADCAST 0x04 00817 00818 #define RF_PACKETCONFIG1_CRCWHITENINGTYPE_MASK 0xFE 00819 #define RF_PACKETCONFIG1_CRCWHITENINGTYPE_CCITT 0x00 // Default 00820 #define RF_PACKETCONFIG1_CRCWHITENINGTYPE_IBM 0x01 00821 00822 /*! 00823 * RegPacketConfig2 00824 */ 00825 #define RF_PACKETCONFIG2_DATAMODE_MASK 0xBF 00826 #define RF_PACKETCONFIG2_DATAMODE_CONTINUOUS 0x00 00827 #define RF_PACKETCONFIG2_DATAMODE_PACKET 0x40 // Default 00828 00829 #define RF_PACKETCONFIG2_IOHOME_MASK 0xDF 00830 #define RF_PACKETCONFIG2_IOHOME_ON 0x20 00831 #define RF_PACKETCONFIG2_IOHOME_OFF 0x00 // Default 00832 00833 #define RF_PACKETCONFIG2_BEACON_MASK 0xF7 00834 #define RF_PACKETCONFIG2_BEACON_ON 0x08 00835 #define RF_PACKETCONFIG2_BEACON_OFF 0x00 // Default 00836 00837 #define RF_PACKETCONFIG2_PAYLOADLENGTH_MSB_MASK 0xF8 00838 00839 /*! 00840 * RegPayloadLength 00841 */ 00842 #define RF_PAYLOADLENGTH_LENGTH 0x40 // Default 00843 00844 /*! 00845 * RegNodeAdrs 00846 */ 00847 #define RF_NODEADDRESS_ADDRESS 0x00 00848 00849 /*! 00850 * RegBroadcastAdrs 00851 */ 00852 #define RF_BROADCASTADDRESS_ADDRESS 0x00 00853 00854 /*! 00855 * RegFifoThresh 00856 */ 00857 #define RF_FIFOTHRESH_TXSTARTCONDITION_MASK 0x7F 00858 #define RF_FIFOTHRESH_TXSTARTCONDITION_FIFOTHRESH 0x00 00859 #define RF_FIFOTHRESH_TXSTARTCONDITION_FIFONOTEMPTY 0x80 // Default 00860 00861 #define RF_FIFOTHRESH_FIFOTHRESHOLD_MASK 0xC0 00862 #define RF_FIFOTHRESH_FIFOTHRESHOLD_THRESHOLD 0x0F // Default 00863 00864 /*! 00865 * RegSeqConfig1 00866 */ 00867 #define RF_SEQCONFIG1_SEQUENCER_START 0x80 00868 00869 #define RF_SEQCONFIG1_SEQUENCER_STOP 0x40 00870 00871 #define RF_SEQCONFIG1_IDLEMODE_MASK 0xDF 00872 #define RF_SEQCONFIG1_IDLEMODE_SLEEP 0x20 00873 #define RF_SEQCONFIG1_IDLEMODE_STANDBY 0x00 // Default 00874 00875 #define RF_SEQCONFIG1_FROMSTART_MASK 0xE7 00876 #define RF_SEQCONFIG1_FROMSTART_TOLPS 0x00 // Default 00877 #define RF_SEQCONFIG1_FROMSTART_TORX 0x08 00878 #define RF_SEQCONFIG1_FROMSTART_TOTX 0x10 00879 #define RF_SEQCONFIG1_FROMSTART_TOTX_ONFIFOLEVEL 0x18 00880 00881 #define RF_SEQCONFIG1_LPS_MASK 0xFB 00882 #define RF_SEQCONFIG1_LPS_SEQUENCER_OFF 0x00 // Default 00883 #define RF_SEQCONFIG1_LPS_IDLE 0x04 00884 00885 #define RF_SEQCONFIG1_FROMIDLE_MASK 0xFD 00886 #define RF_SEQCONFIG1_FROMIDLE_TOTX 0x00 // Default 00887 #define RF_SEQCONFIG1_FROMIDLE_TORX 0x02 00888 00889 #define RF_SEQCONFIG1_FROMTX_MASK 0xFE 00890 #define RF_SEQCONFIG1_FROMTX_TOLPS 0x00 // Default 00891 #define RF_SEQCONFIG1_FROMTX_TORX 0x01 00892 00893 /*! 00894 * RegSeqConfig2 00895 */ 00896 #define RF_SEQCONFIG2_FROMRX_MASK 0x1F 00897 #define RF_SEQCONFIG2_FROMRX_TOUNUSED_000 0x00 // Default 00898 #define RF_SEQCONFIG2_FROMRX_TORXPKT_ONPLDRDY 0x20 00899 #define RF_SEQCONFIG2_FROMRX_TOLPS_ONPLDRDY 0x40 00900 #define RF_SEQCONFIG2_FROMRX_TORXPKT_ONCRCOK 0x60 00901 #define RF_SEQCONFIG2_FROMRX_TOSEQUENCEROFF_ONRSSI 0x80 00902 #define RF_SEQCONFIG2_FROMRX_TOSEQUENCEROFF_ONSYNC 0xA0 00903 #define RF_SEQCONFIG2_FROMRX_TOSEQUENCEROFF_ONPREAMBLE 0xC0 00904 #define RF_SEQCONFIG2_FROMRX_TOUNUSED_111 0xE0 00905 00906 #define RF_SEQCONFIG2_FROMRXTIMEOUT_MASK 0xE7 00907 #define RF_SEQCONFIG2_FROMRXTIMEOUT_TORXRESTART 0x00 // Default 00908 #define RF_SEQCONFIG2_FROMRXTIMEOUT_TOTX 0x08 00909 #define RF_SEQCONFIG2_FROMRXTIMEOUT_TOLPS 0x10 00910 #define RF_SEQCONFIG2_FROMRXTIMEOUT_TOSEQUENCEROFF 0x18 00911 00912 #define RF_SEQCONFIG2_FROMRXPKT_MASK 0xF8 00913 #define RF_SEQCONFIG2_FROMRXPKT_TOSEQUENCEROFF 0x00 // Default 00914 #define RF_SEQCONFIG2_FROMRXPKT_TOTX_ONFIFOEMPTY 0x01 00915 #define RF_SEQCONFIG2_FROMRXPKT_TOLPS 0x02 00916 #define RF_SEQCONFIG2_FROMRXPKT_TOSYNTHESIZERRX 0x03 00917 #define RF_SEQCONFIG2_FROMRXPKT_TORX 0x04 00918 00919 /*! 00920 * RegTimerResol 00921 */ 00922 #define RF_TIMERRESOL_TIMER1RESOL_MASK 0xF3 00923 #define RF_TIMERRESOL_TIMER1RESOL_OFF 0x00 // Default 00924 #define RF_TIMERRESOL_TIMER1RESOL_000064_US 0x04 00925 #define RF_TIMERRESOL_TIMER1RESOL_004100_US 0x08 00926 #define RF_TIMERRESOL_TIMER1RESOL_262000_US 0x0C 00927 00928 #define RF_TIMERRESOL_TIMER2RESOL_MASK 0xFC 00929 #define RF_TIMERRESOL_TIMER2RESOL_OFF 0x00 // Default 00930 #define RF_TIMERRESOL_TIMER2RESOL_000064_US 0x01 00931 #define RF_TIMERRESOL_TIMER2RESOL_004100_US 0x02 00932 #define RF_TIMERRESOL_TIMER2RESOL_262000_US 0x03 00933 00934 /*! 00935 * RegTimer1Coef 00936 */ 00937 #define RF_TIMER1COEF_TIMER1COEFFICIENT 0xF5 // Default 00938 00939 /*! 00940 * RegTimer2Coef 00941 */ 00942 #define RF_TIMER2COEF_TIMER2COEFFICIENT 0x20 // Default 00943 00944 /*! 00945 * RegImageCal 00946 */ 00947 #define RF_IMAGECAL_AUTOIMAGECAL_MASK 0x7F 00948 #define RF_IMAGECAL_AUTOIMAGECAL_ON 0x80 00949 #define RF_IMAGECAL_AUTOIMAGECAL_OFF 0x00 // Default 00950 00951 #define RF_IMAGECAL_IMAGECAL_MASK 0xBF 00952 #define RF_IMAGECAL_IMAGECAL_START 0x40 00953 00954 #define RF_IMAGECAL_IMAGECAL_RUNNING 0x20 00955 #define RF_IMAGECAL_IMAGECAL_DONE 0x00 // Default 00956 00957 #define RF_IMAGECAL_TEMPCHANGE_HIGHER 0x08 00958 #define RF_IMAGECAL_TEMPCHANGE_LOWER 0x00 00959 00960 #define RF_IMAGECAL_TEMPTHRESHOLD_MASK 0xF9 00961 #define RF_IMAGECAL_TEMPTHRESHOLD_05 0x00 00962 #define RF_IMAGECAL_TEMPTHRESHOLD_10 0x02 // Default 00963 #define RF_IMAGECAL_TEMPTHRESHOLD_15 0x04 00964 #define RF_IMAGECAL_TEMPTHRESHOLD_20 0x06 00965 00966 #define RF_IMAGECAL_TEMPMONITOR_MASK 0xFE 00967 #define RF_IMAGECAL_TEMPMONITOR_ON 0x00 // Default 00968 #define RF_IMAGECAL_TEMPMONITOR_OFF 0x01 00969 00970 /*! 00971 * RegTemp (Read Only) 00972 */ 00973 00974 /*! 00975 * RegLowBat 00976 */ 00977 #define RF_LOWBAT_MASK 0xF7 00978 #define RF_LOWBAT_ON 0x08 00979 #define RF_LOWBAT_OFF 0x00 // Default 00980 00981 #define RF_LOWBAT_TRIM_MASK 0xF8 00982 #define RF_LOWBAT_TRIM_1695 0x00 00983 #define RF_LOWBAT_TRIM_1764 0x01 00984 #define RF_LOWBAT_TRIM_1835 0x02 // Default 00985 #define RF_LOWBAT_TRIM_1905 0x03 00986 #define RF_LOWBAT_TRIM_1976 0x04 00987 #define RF_LOWBAT_TRIM_2045 0x05 00988 #define RF_LOWBAT_TRIM_2116 0x06 00989 #define RF_LOWBAT_TRIM_2185 0x07 00990 00991 /*! 00992 * RegIrqFlags1 00993 */ 00994 #define RF_IRQFLAGS1_MODEREADY 0x80 00995 00996 #define RF_IRQFLAGS1_RXREADY 0x40 00997 00998 #define RF_IRQFLAGS1_TXREADY 0x20 00999 01000 #define RF_IRQFLAGS1_PLLLOCK 0x10 01001 01002 #define RF_IRQFLAGS1_RSSI 0x08 01003 01004 #define RF_IRQFLAGS1_TIMEOUT 0x04 01005 01006 #define RF_IRQFLAGS1_PREAMBLEDETECT 0x02 01007 01008 #define RF_IRQFLAGS1_SYNCADDRESSMATCH 0x01 01009 01010 /*! 01011 * RegIrqFlags2 01012 */ 01013 #define RF_IRQFLAGS2_FIFOFULL 0x80 01014 01015 #define RF_IRQFLAGS2_FIFOEMPTY 0x40 01016 01017 #define RF_IRQFLAGS2_FIFOLEVEL 0x20 01018 01019 #define RF_IRQFLAGS2_FIFOOVERRUN 0x10 01020 01021 #define RF_IRQFLAGS2_PACKETSENT 0x08 01022 01023 #define RF_IRQFLAGS2_PAYLOADREADY 0x04 01024 01025 #define RF_IRQFLAGS2_CRCOK 0x02 01026 01027 #define RF_IRQFLAGS2_LOWBAT 0x01 01028 01029 /*! 01030 * RegDioMapping1 01031 */ 01032 #define RF_DIOMAPPING1_DIO0_MASK 0x3F 01033 #define RF_DIOMAPPING1_DIO0_00 0x00 // Default 01034 #define RF_DIOMAPPING1_DIO0_01 0x40 01035 #define RF_DIOMAPPING1_DIO0_10 0x80 01036 #define RF_DIOMAPPING1_DIO0_11 0xC0 01037 01038 #define RF_DIOMAPPING1_DIO1_MASK 0xCF 01039 #define RF_DIOMAPPING1_DIO1_00 0x00 // Default 01040 #define RF_DIOMAPPING1_DIO1_01 0x10 01041 #define RF_DIOMAPPING1_DIO1_10 0x20 01042 #define RF_DIOMAPPING1_DIO1_11 0x30 01043 01044 #define RF_DIOMAPPING1_DIO2_MASK 0xF3 01045 #define RF_DIOMAPPING1_DIO2_00 0x00 // Default 01046 #define RF_DIOMAPPING1_DIO2_01 0x04 01047 #define RF_DIOMAPPING1_DIO2_10 0x08 01048 #define RF_DIOMAPPING1_DIO2_11 0x0C 01049 01050 #define RF_DIOMAPPING1_DIO3_MASK 0xFC 01051 #define RF_DIOMAPPING1_DIO3_00 0x00 // Default 01052 #define RF_DIOMAPPING1_DIO3_01 0x01 01053 #define RF_DIOMAPPING1_DIO3_10 0x02 01054 #define RF_DIOMAPPING1_DIO3_11 0x03 01055 01056 /*! 01057 * RegDioMapping2 01058 */ 01059 #define RF_DIOMAPPING2_DIO4_MASK 0x3F 01060 #define RF_DIOMAPPING2_DIO4_00 0x00 // Default 01061 #define RF_DIOMAPPING2_DIO4_01 0x40 01062 #define RF_DIOMAPPING2_DIO4_10 0x80 01063 #define RF_DIOMAPPING2_DIO4_11 0xC0 01064 01065 #define RF_DIOMAPPING2_DIO5_MASK 0xCF 01066 #define RF_DIOMAPPING2_DIO5_00 0x00 // Default 01067 #define RF_DIOMAPPING2_DIO5_01 0x10 01068 #define RF_DIOMAPPING2_DIO5_10 0x20 01069 #define RF_DIOMAPPING2_DIO5_11 0x30 01070 01071 #define RF_DIOMAPPING2_MAP_MASK 0xFE 01072 #define RF_DIOMAPPING2_MAP_PREAMBLEDETECT 0x01 01073 #define RF_DIOMAPPING2_MAP_RSSI 0x00 // Default 01074 01075 /*! 01076 * RegVersion (Read Only) 01077 */ 01078 01079 /*! 01080 * RegAgcRef 01081 */ 01082 01083 /*! 01084 * RegAgcThresh1 01085 */ 01086 01087 /*! 01088 * RegAgcThresh2 01089 */ 01090 01091 /*! 01092 * RegAgcThresh3 01093 */ 01094 01095 /*! 01096 * RegPllHop 01097 */ 01098 #define RF_PLLHOP_FASTHOP_MASK 0x7F 01099 #define RF_PLLHOP_FASTHOP_ON 0x80 01100 #define RF_PLLHOP_FASTHOP_OFF 0x00 // Default 01101 01102 /*! 01103 * RegTcxo 01104 */ 01105 #define RF_TCXO_TCXOINPUT_MASK 0xEF 01106 #define RF_TCXO_TCXOINPUT_ON 0x10 01107 #define RF_TCXO_TCXOINPUT_OFF 0x00 // Default 01108 01109 /*! 01110 * RegPaDac 01111 */ 01112 #define RF_PADAC_20DBM_MASK 0xF8 01113 #define RF_PADAC_20DBM_ON 0x07 01114 #define RF_PADAC_20DBM_OFF 0x04 // Default 01115 01116 /*! 01117 * RegPll 01118 */ 01119 #define RF_PLL_BANDWIDTH_MASK 0x3F 01120 #define RF_PLL_BANDWIDTH_75 0x00 01121 #define RF_PLL_BANDWIDTH_150 0x40 01122 #define RF_PLL_BANDWIDTH_225 0x80 01123 #define RF_PLL_BANDWIDTH_300 0xC0 // Default 01124 01125 /*! 01126 * RegPllLowPn 01127 */ 01128 #define RF_PLLLOWPN_BANDWIDTH_MASK 0x3F 01129 #define RF_PLLLOWPN_BANDWIDTH_75 0x00 01130 #define RF_PLLLOWPN_BANDWIDTH_150 0x40 01131 #define RF_PLLLOWPN_BANDWIDTH_225 0x80 01132 #define RF_PLLLOWPN_BANDWIDTH_300 0xC0 // Default 01133 01134 /*! 01135 * RegFormerTemp 01136 */ 01137 01138 /*! 01139 * RegBitrateFrac 01140 */ 01141 #define RF_BITRATEFRAC_MASK 0xF0 01142 01143 #endif // __SX1272_REGS_FSK_H__
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