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mbed-STM32L452
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targets/TARGET_STM/TARGET_STM32L0/device/stm32l0xx_ll_pwr.h@158:b23ee177fd68, 2017-02-14 (annotated)
- Committer:
- Kojto
- Date:
- Tue Feb 14 14:44:10 2017 +0000
- Revision:
- 158:b23ee177fd68
This updates the lib to the mbed lib v136
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| Kojto | 158:b23ee177fd68 | 1 | /** |
| Kojto | 158:b23ee177fd68 | 2 | ****************************************************************************** |
| Kojto | 158:b23ee177fd68 | 3 | * @file stm32l0xx_ll_pwr.h |
| Kojto | 158:b23ee177fd68 | 4 | * @author MCD Application Team |
| Kojto | 158:b23ee177fd68 | 5 | * @version V1.7.0 |
| Kojto | 158:b23ee177fd68 | 6 | * @date 31-May-2016 |
| Kojto | 158:b23ee177fd68 | 7 | * @brief Header file of PWR LL module. |
| Kojto | 158:b23ee177fd68 | 8 | ****************************************************************************** |
| Kojto | 158:b23ee177fd68 | 9 | * @attention |
| Kojto | 158:b23ee177fd68 | 10 | * |
| Kojto | 158:b23ee177fd68 | 11 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
| Kojto | 158:b23ee177fd68 | 12 | * |
| Kojto | 158:b23ee177fd68 | 13 | * Redistribution and use in source and binary forms, with or without modification, |
| Kojto | 158:b23ee177fd68 | 14 | * are permitted provided that the following conditions are met: |
| Kojto | 158:b23ee177fd68 | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
| Kojto | 158:b23ee177fd68 | 16 | * this list of conditions and the following disclaimer. |
| Kojto | 158:b23ee177fd68 | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| Kojto | 158:b23ee177fd68 | 18 | * this list of conditions and the following disclaimer in the documentation |
| Kojto | 158:b23ee177fd68 | 19 | * and/or other materials provided with the distribution. |
| Kojto | 158:b23ee177fd68 | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| Kojto | 158:b23ee177fd68 | 21 | * may be used to endorse or promote products derived from this software |
| Kojto | 158:b23ee177fd68 | 22 | * without specific prior written permission. |
| Kojto | 158:b23ee177fd68 | 23 | * |
| Kojto | 158:b23ee177fd68 | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| Kojto | 158:b23ee177fd68 | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| Kojto | 158:b23ee177fd68 | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| Kojto | 158:b23ee177fd68 | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| Kojto | 158:b23ee177fd68 | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| Kojto | 158:b23ee177fd68 | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| Kojto | 158:b23ee177fd68 | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| Kojto | 158:b23ee177fd68 | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| Kojto | 158:b23ee177fd68 | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| Kojto | 158:b23ee177fd68 | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| Kojto | 158:b23ee177fd68 | 34 | * |
| Kojto | 158:b23ee177fd68 | 35 | ****************************************************************************** |
| Kojto | 158:b23ee177fd68 | 36 | */ |
| Kojto | 158:b23ee177fd68 | 37 | |
| Kojto | 158:b23ee177fd68 | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| Kojto | 158:b23ee177fd68 | 39 | #ifndef __STM32L0xx_LL_PWR_H |
| Kojto | 158:b23ee177fd68 | 40 | #define __STM32L0xx_LL_PWR_H |
| Kojto | 158:b23ee177fd68 | 41 | |
| Kojto | 158:b23ee177fd68 | 42 | #ifdef __cplusplus |
| Kojto | 158:b23ee177fd68 | 43 | extern "C" { |
| Kojto | 158:b23ee177fd68 | 44 | #endif |
| Kojto | 158:b23ee177fd68 | 45 | |
| Kojto | 158:b23ee177fd68 | 46 | /* Includes ------------------------------------------------------------------*/ |
| Kojto | 158:b23ee177fd68 | 47 | #include "stm32l0xx.h" |
| Kojto | 158:b23ee177fd68 | 48 | |
| Kojto | 158:b23ee177fd68 | 49 | /** @addtogroup STM32L0xx_LL_Driver |
| Kojto | 158:b23ee177fd68 | 50 | * @{ |
| Kojto | 158:b23ee177fd68 | 51 | */ |
| Kojto | 158:b23ee177fd68 | 52 | |
| Kojto | 158:b23ee177fd68 | 53 | #if defined(PWR) |
| Kojto | 158:b23ee177fd68 | 54 | |
| Kojto | 158:b23ee177fd68 | 55 | /** @defgroup PWR_LL PWR |
| Kojto | 158:b23ee177fd68 | 56 | * @{ |
| Kojto | 158:b23ee177fd68 | 57 | */ |
| Kojto | 158:b23ee177fd68 | 58 | |
| Kojto | 158:b23ee177fd68 | 59 | /* Private types -------------------------------------------------------------*/ |
| Kojto | 158:b23ee177fd68 | 60 | /* Private variables ---------------------------------------------------------*/ |
| Kojto | 158:b23ee177fd68 | 61 | |
| Kojto | 158:b23ee177fd68 | 62 | /* Private constants ---------------------------------------------------------*/ |
| Kojto | 158:b23ee177fd68 | 63 | |
| Kojto | 158:b23ee177fd68 | 64 | /* Private macros ------------------------------------------------------------*/ |
| Kojto | 158:b23ee177fd68 | 65 | |
| Kojto | 158:b23ee177fd68 | 66 | /* Exported types ------------------------------------------------------------*/ |
| Kojto | 158:b23ee177fd68 | 67 | /* Exported constants --------------------------------------------------------*/ |
| Kojto | 158:b23ee177fd68 | 68 | /** @defgroup PWR_LL_Exported_Constants PWR Exported Constants |
| Kojto | 158:b23ee177fd68 | 69 | * @{ |
| Kojto | 158:b23ee177fd68 | 70 | */ |
| Kojto | 158:b23ee177fd68 | 71 | |
| Kojto | 158:b23ee177fd68 | 72 | /** @defgroup PWR_LL_EC_CLEAR_FLAG Clear Flags Defines |
| Kojto | 158:b23ee177fd68 | 73 | * @brief Flags defines which can be used with LL_PWR_WriteReg function |
| Kojto | 158:b23ee177fd68 | 74 | * @{ |
| Kojto | 158:b23ee177fd68 | 75 | */ |
| Kojto | 158:b23ee177fd68 | 76 | #define LL_PWR_CR_CSBF PWR_CR_CSBF /*!< Clear standby flag */ |
| Kojto | 158:b23ee177fd68 | 77 | #define LL_PWR_CR_CWUF PWR_CR_CWUF /*!< Clear wakeup flag */ |
| Kojto | 158:b23ee177fd68 | 78 | /** |
| Kojto | 158:b23ee177fd68 | 79 | * @} |
| Kojto | 158:b23ee177fd68 | 80 | */ |
| Kojto | 158:b23ee177fd68 | 81 | |
| Kojto | 158:b23ee177fd68 | 82 | /** @defgroup PWR_LL_EC_GET_FLAG Get Flags Defines |
| Kojto | 158:b23ee177fd68 | 83 | * @brief Flags defines which can be used with LL_PWR_ReadReg function |
| Kojto | 158:b23ee177fd68 | 84 | * @{ |
| Kojto | 158:b23ee177fd68 | 85 | */ |
| Kojto | 158:b23ee177fd68 | 86 | #define LL_PWR_CSR_WUF PWR_CSR_WUF /*!< Wakeup flag */ |
| Kojto | 158:b23ee177fd68 | 87 | #define LL_PWR_CSR_SBF PWR_CSR_SBF /*!< Standby flag */ |
| Kojto | 158:b23ee177fd68 | 88 | #if defined (PWR_PVD_SUPPORT) |
| Kojto | 158:b23ee177fd68 | 89 | #define LL_PWR_CSR_PVDO PWR_CSR_PVDO /*!< Power voltage detector output flag */ |
| Kojto | 158:b23ee177fd68 | 90 | #endif |
| Kojto | 158:b23ee177fd68 | 91 | #if defined (PWR_CSR_VREFINTRDYF) |
| Kojto | 158:b23ee177fd68 | 92 | #define LL_PWR_CSR_VREFINTRDYF PWR_CSR_VREFINTRDYF /*!< VREFINT ready flag */ |
| Kojto | 158:b23ee177fd68 | 93 | #endif |
| Kojto | 158:b23ee177fd68 | 94 | #define LL_PWR_CSR_VOSF PWR_CSR_VOSF /*!< Voltage scaling select flag */ |
| Kojto | 158:b23ee177fd68 | 95 | #define LL_PWR_CSR_REGLPF PWR_CSR_REGLPF /*!< Regulator low power flag */ |
| Kojto | 158:b23ee177fd68 | 96 | #define LL_PWR_CSR_EWUP1 PWR_CSR_EWUP1 /*!< Enable WKUP pin 1 */ |
| Kojto | 158:b23ee177fd68 | 97 | #define LL_PWR_CSR_EWUP2 PWR_CSR_EWUP2 /*!< Enable WKUP pin 2 */ |
| Kojto | 158:b23ee177fd68 | 98 | #if defined (PWR_CSR_EWUP3) |
| Kojto | 158:b23ee177fd68 | 99 | #define LL_PWR_CSR_EWUP3 PWR_CSR_EWUP3 /*!< Enable WKUP pin 3 */ |
| Kojto | 158:b23ee177fd68 | 100 | #endif /* PWR_CSR_EWUP3 */ |
| Kojto | 158:b23ee177fd68 | 101 | /** |
| Kojto | 158:b23ee177fd68 | 102 | * @} |
| Kojto | 158:b23ee177fd68 | 103 | */ |
| Kojto | 158:b23ee177fd68 | 104 | |
| Kojto | 158:b23ee177fd68 | 105 | /** @defgroup PWR_LL_EC_REGU_VOLTAGE Regulator Voltage |
| Kojto | 158:b23ee177fd68 | 106 | * @{ |
| Kojto | 158:b23ee177fd68 | 107 | */ |
| Kojto | 158:b23ee177fd68 | 108 | #define LL_PWR_REGU_VOLTAGE_SCALE1 (PWR_CR_VOS_0) /*!< 1.8V (range 1) */ |
| Kojto | 158:b23ee177fd68 | 109 | #define LL_PWR_REGU_VOLTAGE_SCALE2 (PWR_CR_VOS_1) /*!< 1.5V (range 2) */ |
| Kojto | 158:b23ee177fd68 | 110 | #define LL_PWR_REGU_VOLTAGE_SCALE3 (PWR_CR_VOS_0 | PWR_CR_VOS_1) /*!< 1.2V (range 3) */ |
| Kojto | 158:b23ee177fd68 | 111 | /** |
| Kojto | 158:b23ee177fd68 | 112 | * @} |
| Kojto | 158:b23ee177fd68 | 113 | */ |
| Kojto | 158:b23ee177fd68 | 114 | |
| Kojto | 158:b23ee177fd68 | 115 | /** @defgroup PWR_LL_EC_MODE_PWR Mode Power |
| Kojto | 158:b23ee177fd68 | 116 | * @{ |
| Kojto | 158:b23ee177fd68 | 117 | */ |
| Kojto | 158:b23ee177fd68 | 118 | #define LL_PWR_MODE_STOP ((uint32_t)0x00000000U) /*!< Enter Stop mode when the CPU enters deepsleep */ |
| Kojto | 158:b23ee177fd68 | 119 | #define LL_PWR_MODE_STANDBY (PWR_CR_PDDS) /*!< Enter Standby mode when the CPU enters deepsleep */ |
| Kojto | 158:b23ee177fd68 | 120 | /** |
| Kojto | 158:b23ee177fd68 | 121 | * @} |
| Kojto | 158:b23ee177fd68 | 122 | */ |
| Kojto | 158:b23ee177fd68 | 123 | |
| Kojto | 158:b23ee177fd68 | 124 | /** @defgroup PWR_LL_EC_REGU_MODE_LP_MODES Regulator Mode In Low Power Modes |
| Kojto | 158:b23ee177fd68 | 125 | * @{ |
| Kojto | 158:b23ee177fd68 | 126 | */ |
| Kojto | 158:b23ee177fd68 | 127 | #define LL_PWR_REGU_LPMODES_MAIN ((uint32_t)0x00000000U) /*!< Voltage regulator in main mode during deepsleep/sleep/low-power run mode */ |
| Kojto | 158:b23ee177fd68 | 128 | #define LL_PWR_REGU_LPMODES_LOW_POWER (PWR_CR_LPSDSR) /*!< Voltage regulator in low-power mode during deepsleep/sleep/low-power run mode */ |
| Kojto | 158:b23ee177fd68 | 129 | /** |
| Kojto | 158:b23ee177fd68 | 130 | * @} |
| Kojto | 158:b23ee177fd68 | 131 | */ |
| Kojto | 158:b23ee177fd68 | 132 | |
| Kojto | 158:b23ee177fd68 | 133 | #if defined(PWR_CR_LPDS) |
| Kojto | 158:b23ee177fd68 | 134 | /** @defgroup PWR_LL_EC_REGU_MODE_DS_MODE Regulator Mode In Deep Sleep Mode |
| Kojto | 158:b23ee177fd68 | 135 | * @{ |
| Kojto | 158:b23ee177fd68 | 136 | */ |
| Kojto | 158:b23ee177fd68 | 137 | #define LL_PWR_REGU_DSMODE_MAIN ((uint32_t)0x00000000U) /*!< Voltage regulator in main mode during deepsleep mode when PWR_CR_LPSDSR = 0 */ |
| Kojto | 158:b23ee177fd68 | 138 | #define LL_PWR_REGU_DSMODE_LOW_POWER (PWR_CR_LPDS) /*!< Voltage regulator in low-power mode during deepsleep mode when PWR_CR_LPSDSR = 0 */ |
| Kojto | 158:b23ee177fd68 | 139 | /** |
| Kojto | 158:b23ee177fd68 | 140 | * @} |
| Kojto | 158:b23ee177fd68 | 141 | */ |
| Kojto | 158:b23ee177fd68 | 142 | #endif /* PWR_CR_LPDS */ |
| Kojto | 158:b23ee177fd68 | 143 | |
| Kojto | 158:b23ee177fd68 | 144 | #if defined (PWR_PVD_SUPPORT) |
| Kojto | 158:b23ee177fd68 | 145 | /** @defgroup PWR_LL_EC_PVDLEVEL Power Voltage Detector Level |
| Kojto | 158:b23ee177fd68 | 146 | * @{ |
| Kojto | 158:b23ee177fd68 | 147 | */ |
| Kojto | 158:b23ee177fd68 | 148 | #define LL_PWR_PVDLEVEL_0 (PWR_CR_PLS_LEV0) /*!< Voltage threshold detected by PVD 1.9 V */ |
| Kojto | 158:b23ee177fd68 | 149 | #define LL_PWR_PVDLEVEL_1 (PWR_CR_PLS_LEV1) /*!< Voltage threshold detected by PVD 2.1 V */ |
| Kojto | 158:b23ee177fd68 | 150 | #define LL_PWR_PVDLEVEL_2 (PWR_CR_PLS_LEV2) /*!< Voltage threshold detected by PVD 2.3 V */ |
| Kojto | 158:b23ee177fd68 | 151 | #define LL_PWR_PVDLEVEL_3 (PWR_CR_PLS_LEV3) /*!< Voltage threshold detected by PVD 2.5 V */ |
| Kojto | 158:b23ee177fd68 | 152 | #define LL_PWR_PVDLEVEL_4 (PWR_CR_PLS_LEV4) /*!< Voltage threshold detected by PVD 2.7 V */ |
| Kojto | 158:b23ee177fd68 | 153 | #define LL_PWR_PVDLEVEL_5 (PWR_CR_PLS_LEV5) /*!< Voltage threshold detected by PVD 2.9 V */ |
| Kojto | 158:b23ee177fd68 | 154 | #define LL_PWR_PVDLEVEL_6 (PWR_CR_PLS_LEV6) /*!< Voltage threshold detected by PVD 3.1 V */ |
| Kojto | 158:b23ee177fd68 | 155 | #define LL_PWR_PVDLEVEL_7 (PWR_CR_PLS_LEV7) /*!< External input analog voltage (Compare internally to VREFINT) */ |
| Kojto | 158:b23ee177fd68 | 156 | /** |
| Kojto | 158:b23ee177fd68 | 157 | * @} |
| Kojto | 158:b23ee177fd68 | 158 | */ |
| Kojto | 158:b23ee177fd68 | 159 | #endif |
| Kojto | 158:b23ee177fd68 | 160 | |
| Kojto | 158:b23ee177fd68 | 161 | /** @defgroup PWR_LL_EC_WAKEUP_PIN Wakeup Pins |
| Kojto | 158:b23ee177fd68 | 162 | * @{ |
| Kojto | 158:b23ee177fd68 | 163 | */ |
| Kojto | 158:b23ee177fd68 | 164 | #define LL_PWR_WAKEUP_PIN1 (PWR_CSR_EWUP1) /*!< WKUP pin 1 : PA0 */ |
| Kojto | 158:b23ee177fd68 | 165 | #define LL_PWR_WAKEUP_PIN2 (PWR_CSR_EWUP2) /*!< WKUP pin 2 : PC13 */ |
| Kojto | 158:b23ee177fd68 | 166 | #if defined (PWR_CSR_EWUP3) |
| Kojto | 158:b23ee177fd68 | 167 | #define LL_PWR_WAKEUP_PIN3 (PWR_CSR_EWUP3) /*!< WKUP pin 3 : PE6 or PA2 according to device */ |
| Kojto | 158:b23ee177fd68 | 168 | #endif /* PWR_CSR_EWUP3 */ |
| Kojto | 158:b23ee177fd68 | 169 | /** |
| Kojto | 158:b23ee177fd68 | 170 | * @} |
| Kojto | 158:b23ee177fd68 | 171 | */ |
| Kojto | 158:b23ee177fd68 | 172 | |
| Kojto | 158:b23ee177fd68 | 173 | /** |
| Kojto | 158:b23ee177fd68 | 174 | * @} |
| Kojto | 158:b23ee177fd68 | 175 | */ |
| Kojto | 158:b23ee177fd68 | 176 | |
| Kojto | 158:b23ee177fd68 | 177 | |
| Kojto | 158:b23ee177fd68 | 178 | /* Exported macro ------------------------------------------------------------*/ |
| Kojto | 158:b23ee177fd68 | 179 | /** @defgroup PWR_LL_Exported_Macros PWR Exported Macros |
| Kojto | 158:b23ee177fd68 | 180 | * @{ |
| Kojto | 158:b23ee177fd68 | 181 | */ |
| Kojto | 158:b23ee177fd68 | 182 | |
| Kojto | 158:b23ee177fd68 | 183 | /** @defgroup PWR_LL_EM_WRITE_READ Common write and read registers Macros |
| Kojto | 158:b23ee177fd68 | 184 | * @{ |
| Kojto | 158:b23ee177fd68 | 185 | */ |
| Kojto | 158:b23ee177fd68 | 186 | |
| Kojto | 158:b23ee177fd68 | 187 | /** |
| Kojto | 158:b23ee177fd68 | 188 | * @brief Write a value in PWR register |
| Kojto | 158:b23ee177fd68 | 189 | * @param __REG__ Register to be written |
| Kojto | 158:b23ee177fd68 | 190 | * @param __VALUE__ Value to be written in the register |
| Kojto | 158:b23ee177fd68 | 191 | * @retval None |
| Kojto | 158:b23ee177fd68 | 192 | */ |
| Kojto | 158:b23ee177fd68 | 193 | #define LL_PWR_WriteReg(__REG__, __VALUE__) WRITE_REG(PWR->__REG__, (__VALUE__)) |
| Kojto | 158:b23ee177fd68 | 194 | |
| Kojto | 158:b23ee177fd68 | 195 | /** |
| Kojto | 158:b23ee177fd68 | 196 | * @brief Read a value in PWR register |
| Kojto | 158:b23ee177fd68 | 197 | * @param __REG__ Register to be read |
| Kojto | 158:b23ee177fd68 | 198 | * @retval Register value |
| Kojto | 158:b23ee177fd68 | 199 | */ |
| Kojto | 158:b23ee177fd68 | 200 | #define LL_PWR_ReadReg(__REG__) READ_REG(PWR->__REG__) |
| Kojto | 158:b23ee177fd68 | 201 | /** |
| Kojto | 158:b23ee177fd68 | 202 | * @} |
| Kojto | 158:b23ee177fd68 | 203 | */ |
| Kojto | 158:b23ee177fd68 | 204 | |
| Kojto | 158:b23ee177fd68 | 205 | /** |
| Kojto | 158:b23ee177fd68 | 206 | * @} |
| Kojto | 158:b23ee177fd68 | 207 | */ |
| Kojto | 158:b23ee177fd68 | 208 | |
| Kojto | 158:b23ee177fd68 | 209 | |
| Kojto | 158:b23ee177fd68 | 210 | /* Exported functions --------------------------------------------------------*/ |
| Kojto | 158:b23ee177fd68 | 211 | /** @defgroup PWR_LL_Exported_Functions PWR Exported Functions |
| Kojto | 158:b23ee177fd68 | 212 | * @{ |
| Kojto | 158:b23ee177fd68 | 213 | */ |
| Kojto | 158:b23ee177fd68 | 214 | |
| Kojto | 158:b23ee177fd68 | 215 | /** @defgroup PWR_LL_EF_Configuration Configuration |
| Kojto | 158:b23ee177fd68 | 216 | * @{ |
| Kojto | 158:b23ee177fd68 | 217 | */ |
| Kojto | 158:b23ee177fd68 | 218 | |
| Kojto | 158:b23ee177fd68 | 219 | /** |
| Kojto | 158:b23ee177fd68 | 220 | * @brief Switch the regulator from main mode to low-power mode |
| Kojto | 158:b23ee177fd68 | 221 | * @rmtoll CR LPRUN LL_PWR_EnableLowPowerRunMode |
| Kojto | 158:b23ee177fd68 | 222 | * @note Remind to set the regulator to low power before enabling |
| Kojto | 158:b23ee177fd68 | 223 | * LowPower run mode (bit @ref LL_PWR_REGU_LPMODES_LOW_POWER). |
| Kojto | 158:b23ee177fd68 | 224 | * @retval None |
| Kojto | 158:b23ee177fd68 | 225 | */ |
| Kojto | 158:b23ee177fd68 | 226 | __STATIC_INLINE void LL_PWR_EnableLowPowerRunMode(void) |
| Kojto | 158:b23ee177fd68 | 227 | { |
| Kojto | 158:b23ee177fd68 | 228 | SET_BIT(PWR->CR, PWR_CR_LPRUN); |
| Kojto | 158:b23ee177fd68 | 229 | } |
| Kojto | 158:b23ee177fd68 | 230 | |
| Kojto | 158:b23ee177fd68 | 231 | /** |
| Kojto | 158:b23ee177fd68 | 232 | * @brief Switch the regulator from low-power mode to main mode |
| Kojto | 158:b23ee177fd68 | 233 | * @rmtoll CR LPRUN LL_PWR_DisableLowPowerRunMode |
| Kojto | 158:b23ee177fd68 | 234 | * @retval None |
| Kojto | 158:b23ee177fd68 | 235 | */ |
| Kojto | 158:b23ee177fd68 | 236 | __STATIC_INLINE void LL_PWR_DisableLowPowerRunMode(void) |
| Kojto | 158:b23ee177fd68 | 237 | { |
| Kojto | 158:b23ee177fd68 | 238 | CLEAR_BIT(PWR->CR, PWR_CR_LPRUN); |
| Kojto | 158:b23ee177fd68 | 239 | } |
| Kojto | 158:b23ee177fd68 | 240 | |
| Kojto | 158:b23ee177fd68 | 241 | /** |
| Kojto | 158:b23ee177fd68 | 242 | * @brief Check if the regulator is in low-power mode |
| Kojto | 158:b23ee177fd68 | 243 | * @rmtoll CR LPRUN LL_PWR_IsEnabledLowPowerRunMode |
| Kojto | 158:b23ee177fd68 | 244 | * @retval State of bit (1 or 0). |
| Kojto | 158:b23ee177fd68 | 245 | */ |
| Kojto | 158:b23ee177fd68 | 246 | __STATIC_INLINE uint32_t LL_PWR_IsEnabledLowPowerRunMode(void) |
| Kojto | 158:b23ee177fd68 | 247 | { |
| Kojto | 158:b23ee177fd68 | 248 | return (READ_BIT(PWR->CR, PWR_CR_LPRUN) == (PWR_CR_LPRUN)); |
| Kojto | 158:b23ee177fd68 | 249 | } |
| Kojto | 158:b23ee177fd68 | 250 | |
| Kojto | 158:b23ee177fd68 | 251 | /** |
| Kojto | 158:b23ee177fd68 | 252 | * @brief Set voltage regulator to low-power and switch from |
| Kojto | 158:b23ee177fd68 | 253 | * run main mode to run low-power mode. |
| Kojto | 158:b23ee177fd68 | 254 | * @rmtoll CR LPSDSR LL_PWR_EnterLowPowerRunMode\n |
| Kojto | 158:b23ee177fd68 | 255 | * CR LPRUN LL_PWR_EnterLowPowerRunMode |
| Kojto | 158:b23ee177fd68 | 256 | * @note This "high level" function is introduced to provide functional |
| Kojto | 158:b23ee177fd68 | 257 | * compatibility with other families. Notice that the two registers |
| Kojto | 158:b23ee177fd68 | 258 | * have to be written sequentially, so this function is not atomic. |
| Kojto | 158:b23ee177fd68 | 259 | * To assure atomicity you can call separately the following functions: |
| Kojto | 158:b23ee177fd68 | 260 | * - @ref LL_PWR_SetRegulModeLP(@ref LL_PWR_REGU_LPMODES_LOW_POWER); |
| Kojto | 158:b23ee177fd68 | 261 | * - @ref LL_PWR_EnableLowPowerRunMode(); |
| Kojto | 158:b23ee177fd68 | 262 | * @retval None |
| Kojto | 158:b23ee177fd68 | 263 | */ |
| Kojto | 158:b23ee177fd68 | 264 | __STATIC_INLINE void LL_PWR_EnterLowPowerRunMode(void) |
| Kojto | 158:b23ee177fd68 | 265 | { |
| Kojto | 158:b23ee177fd68 | 266 | SET_BIT(PWR->CR, PWR_CR_LPSDSR); /* => LL_PWR_SetRegulModeLP(LL_PWR_REGU_LPMODES_LOW_POWER) */ |
| Kojto | 158:b23ee177fd68 | 267 | SET_BIT(PWR->CR, PWR_CR_LPRUN); /* => LL_PWR_EnableLowPowerRunMode() */ |
| Kojto | 158:b23ee177fd68 | 268 | } |
| Kojto | 158:b23ee177fd68 | 269 | |
| Kojto | 158:b23ee177fd68 | 270 | /** |
| Kojto | 158:b23ee177fd68 | 271 | * @brief Set voltage regulator to main and switch from |
| Kojto | 158:b23ee177fd68 | 272 | * run main mode to low-power mode. |
| Kojto | 158:b23ee177fd68 | 273 | * @rmtoll CR LPSDSR LL_PWR_ExitLowPowerRunMode\n |
| Kojto | 158:b23ee177fd68 | 274 | * CR LPRUN LL_PWR_ExitLowPowerRunMode |
| Kojto | 158:b23ee177fd68 | 275 | * @note This "high level" function is introduced to provide functional |
| Kojto | 158:b23ee177fd68 | 276 | * compatibility with other families. Notice that the two registers |
| Kojto | 158:b23ee177fd68 | 277 | * have to be written sequentially, so this function is not atomic. |
| Kojto | 158:b23ee177fd68 | 278 | * To assure atomicity you can call separately the following functions: |
| Kojto | 158:b23ee177fd68 | 279 | * - @ref LL_PWR_DisableLowPowerRunMode(); |
| Kojto | 158:b23ee177fd68 | 280 | * - @ref LL_PWR_SetRegulModeLP(@ref LL_PWR_REGU_LPMODES_MAIN); |
| Kojto | 158:b23ee177fd68 | 281 | * @retval None |
| Kojto | 158:b23ee177fd68 | 282 | */ |
| Kojto | 158:b23ee177fd68 | 283 | __STATIC_INLINE void LL_PWR_ExitLowPowerRunMode(void) |
| Kojto | 158:b23ee177fd68 | 284 | { |
| Kojto | 158:b23ee177fd68 | 285 | CLEAR_BIT(PWR->CR, PWR_CR_LPRUN); /* => LL_PWR_DisableLowPowerRunMode() */ |
| Kojto | 158:b23ee177fd68 | 286 | CLEAR_BIT(PWR->CR, PWR_CR_LPSDSR); /* => LL_PWR_SetRegulModeLP(LL_PWR_REGU_LPMODES_MAIN) */ |
| Kojto | 158:b23ee177fd68 | 287 | } |
| Kojto | 158:b23ee177fd68 | 288 | |
| Kojto | 158:b23ee177fd68 | 289 | /** |
| Kojto | 158:b23ee177fd68 | 290 | * @brief Set the main internal regulator output voltage |
| Kojto | 158:b23ee177fd68 | 291 | * @rmtoll CR VOS LL_PWR_SetRegulVoltageScaling |
| Kojto | 158:b23ee177fd68 | 292 | * @param VoltageScaling This parameter can be one of the following values: |
| Kojto | 158:b23ee177fd68 | 293 | * @arg @ref LL_PWR_REGU_VOLTAGE_SCALE1 |
| Kojto | 158:b23ee177fd68 | 294 | * @arg @ref LL_PWR_REGU_VOLTAGE_SCALE2 |
| Kojto | 158:b23ee177fd68 | 295 | * @arg @ref LL_PWR_REGU_VOLTAGE_SCALE3 |
| Kojto | 158:b23ee177fd68 | 296 | * @retval None |
| Kojto | 158:b23ee177fd68 | 297 | */ |
| Kojto | 158:b23ee177fd68 | 298 | __STATIC_INLINE void LL_PWR_SetRegulVoltageScaling(uint32_t VoltageScaling) |
| Kojto | 158:b23ee177fd68 | 299 | { |
| Kojto | 158:b23ee177fd68 | 300 | MODIFY_REG(PWR->CR, PWR_CR_VOS, VoltageScaling); |
| Kojto | 158:b23ee177fd68 | 301 | } |
| Kojto | 158:b23ee177fd68 | 302 | |
| Kojto | 158:b23ee177fd68 | 303 | /** |
| Kojto | 158:b23ee177fd68 | 304 | * @brief Get the main internal regulator output voltage |
| Kojto | 158:b23ee177fd68 | 305 | * @rmtoll CR VOS LL_PWR_GetRegulVoltageScaling |
| Kojto | 158:b23ee177fd68 | 306 | * @retval Returned value can be one of the following values: |
| Kojto | 158:b23ee177fd68 | 307 | * @arg @ref LL_PWR_REGU_VOLTAGE_SCALE1 |
| Kojto | 158:b23ee177fd68 | 308 | * @arg @ref LL_PWR_REGU_VOLTAGE_SCALE2 |
| Kojto | 158:b23ee177fd68 | 309 | * @arg @ref LL_PWR_REGU_VOLTAGE_SCALE3 |
| Kojto | 158:b23ee177fd68 | 310 | */ |
| Kojto | 158:b23ee177fd68 | 311 | __STATIC_INLINE uint32_t LL_PWR_GetRegulVoltageScaling(void) |
| Kojto | 158:b23ee177fd68 | 312 | { |
| Kojto | 158:b23ee177fd68 | 313 | return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_VOS)); |
| Kojto | 158:b23ee177fd68 | 314 | } |
| Kojto | 158:b23ee177fd68 | 315 | |
| Kojto | 158:b23ee177fd68 | 316 | /** |
| Kojto | 158:b23ee177fd68 | 317 | * @brief Enable access to the backup domain |
| Kojto | 158:b23ee177fd68 | 318 | * @rmtoll CR DBP LL_PWR_EnableBkUpAccess |
| Kojto | 158:b23ee177fd68 | 319 | * @retval None |
| Kojto | 158:b23ee177fd68 | 320 | */ |
| Kojto | 158:b23ee177fd68 | 321 | __STATIC_INLINE void LL_PWR_EnableBkUpAccess(void) |
| Kojto | 158:b23ee177fd68 | 322 | { |
| Kojto | 158:b23ee177fd68 | 323 | SET_BIT(PWR->CR, PWR_CR_DBP); |
| Kojto | 158:b23ee177fd68 | 324 | } |
| Kojto | 158:b23ee177fd68 | 325 | |
| Kojto | 158:b23ee177fd68 | 326 | /** |
| Kojto | 158:b23ee177fd68 | 327 | * @brief Disable access to the backup domain |
| Kojto | 158:b23ee177fd68 | 328 | * @rmtoll CR DBP LL_PWR_DisableBkUpAccess |
| Kojto | 158:b23ee177fd68 | 329 | * @retval None |
| Kojto | 158:b23ee177fd68 | 330 | */ |
| Kojto | 158:b23ee177fd68 | 331 | __STATIC_INLINE void LL_PWR_DisableBkUpAccess(void) |
| Kojto | 158:b23ee177fd68 | 332 | { |
| Kojto | 158:b23ee177fd68 | 333 | CLEAR_BIT(PWR->CR, PWR_CR_DBP); |
| Kojto | 158:b23ee177fd68 | 334 | } |
| Kojto | 158:b23ee177fd68 | 335 | |
| Kojto | 158:b23ee177fd68 | 336 | /** |
| Kojto | 158:b23ee177fd68 | 337 | * @brief Check if the backup domain is enabled |
| Kojto | 158:b23ee177fd68 | 338 | * @rmtoll CR DBP LL_PWR_IsEnabledBkUpAccess |
| Kojto | 158:b23ee177fd68 | 339 | * @retval State of bit (1 or 0). |
| Kojto | 158:b23ee177fd68 | 340 | */ |
| Kojto | 158:b23ee177fd68 | 341 | __STATIC_INLINE uint32_t LL_PWR_IsEnabledBkUpAccess(void) |
| Kojto | 158:b23ee177fd68 | 342 | { |
| Kojto | 158:b23ee177fd68 | 343 | return (READ_BIT(PWR->CR, PWR_CR_DBP) == (PWR_CR_DBP)); |
| Kojto | 158:b23ee177fd68 | 344 | } |
| Kojto | 158:b23ee177fd68 | 345 | |
| Kojto | 158:b23ee177fd68 | 346 | /** |
| Kojto | 158:b23ee177fd68 | 347 | * @brief Set voltage regulator mode during low power modes |
| Kojto | 158:b23ee177fd68 | 348 | * @rmtoll CR LPSDSR LL_PWR_SetRegulModeLP |
| Kojto | 158:b23ee177fd68 | 349 | * @param RegulMode This parameter can be one of the following values: |
| Kojto | 158:b23ee177fd68 | 350 | * @arg @ref LL_PWR_REGU_LPMODES_MAIN |
| Kojto | 158:b23ee177fd68 | 351 | * @arg @ref LL_PWR_REGU_LPMODES_LOW_POWER |
| Kojto | 158:b23ee177fd68 | 352 | * @retval None |
| Kojto | 158:b23ee177fd68 | 353 | */ |
| Kojto | 158:b23ee177fd68 | 354 | __STATIC_INLINE void LL_PWR_SetRegulModeLP(uint32_t RegulMode) |
| Kojto | 158:b23ee177fd68 | 355 | { |
| Kojto | 158:b23ee177fd68 | 356 | MODIFY_REG(PWR->CR, PWR_CR_LPSDSR, RegulMode); |
| Kojto | 158:b23ee177fd68 | 357 | } |
| Kojto | 158:b23ee177fd68 | 358 | |
| Kojto | 158:b23ee177fd68 | 359 | /** |
| Kojto | 158:b23ee177fd68 | 360 | * @brief Get voltage regulator mode during low power modes |
| Kojto | 158:b23ee177fd68 | 361 | * @rmtoll CR LPSDSR LL_PWR_GetRegulModeLP |
| Kojto | 158:b23ee177fd68 | 362 | * @retval Returned value can be one of the following values: |
| Kojto | 158:b23ee177fd68 | 363 | * @arg @ref LL_PWR_REGU_LPMODES_MAIN |
| Kojto | 158:b23ee177fd68 | 364 | * @arg @ref LL_PWR_REGU_LPMODES_LOW_POWER |
| Kojto | 158:b23ee177fd68 | 365 | */ |
| Kojto | 158:b23ee177fd68 | 366 | __STATIC_INLINE uint32_t LL_PWR_GetRegulModeLP(void) |
| Kojto | 158:b23ee177fd68 | 367 | { |
| Kojto | 158:b23ee177fd68 | 368 | return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_LPSDSR)); |
| Kojto | 158:b23ee177fd68 | 369 | } |
| Kojto | 158:b23ee177fd68 | 370 | |
| Kojto | 158:b23ee177fd68 | 371 | #if defined(PWR_CR_LPDS) |
| Kojto | 158:b23ee177fd68 | 372 | /** |
| Kojto | 158:b23ee177fd68 | 373 | * @brief Set voltage regulator mode during deep sleep mode |
| Kojto | 158:b23ee177fd68 | 374 | * @rmtoll CR LPDS LL_PWR_SetRegulModeDS |
| Kojto | 158:b23ee177fd68 | 375 | * @param RegulMode This parameter can be one of the following values: |
| Kojto | 158:b23ee177fd68 | 376 | * @arg @ref LL_PWR_REGU_DSMODE_MAIN |
| Kojto | 158:b23ee177fd68 | 377 | * @arg @ref LL_PWR_REGU_DSMODE_LOW_POWER |
| Kojto | 158:b23ee177fd68 | 378 | * @retval None |
| Kojto | 158:b23ee177fd68 | 379 | */ |
| Kojto | 158:b23ee177fd68 | 380 | __STATIC_INLINE void LL_PWR_SetRegulModeDS(uint32_t RegulMode) |
| Kojto | 158:b23ee177fd68 | 381 | { |
| Kojto | 158:b23ee177fd68 | 382 | MODIFY_REG(PWR->CR, PWR_CR_LPDS, RegulMode); |
| Kojto | 158:b23ee177fd68 | 383 | } |
| Kojto | 158:b23ee177fd68 | 384 | |
| Kojto | 158:b23ee177fd68 | 385 | /** |
| Kojto | 158:b23ee177fd68 | 386 | * @brief Get voltage regulator mode during deep sleep mode |
| Kojto | 158:b23ee177fd68 | 387 | * @rmtoll CR LPDS LL_PWR_GetRegulModeDS |
| Kojto | 158:b23ee177fd68 | 388 | * @retval Returned value can be one of the following values: |
| Kojto | 158:b23ee177fd68 | 389 | * @arg @ref LL_PWR_REGU_DSMODE_MAIN |
| Kojto | 158:b23ee177fd68 | 390 | * @arg @ref LL_PWR_REGU_DSMODE_LOW_POWER |
| Kojto | 158:b23ee177fd68 | 391 | */ |
| Kojto | 158:b23ee177fd68 | 392 | __STATIC_INLINE uint32_t LL_PWR_GetRegulModeDS(void) |
| Kojto | 158:b23ee177fd68 | 393 | { |
| Kojto | 158:b23ee177fd68 | 394 | return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_LPDS)); |
| Kojto | 158:b23ee177fd68 | 395 | } |
| Kojto | 158:b23ee177fd68 | 396 | #endif /* PWR_CR_LPDS */ |
| Kojto | 158:b23ee177fd68 | 397 | |
| Kojto | 158:b23ee177fd68 | 398 | /** |
| Kojto | 158:b23ee177fd68 | 399 | * @brief Set power down mode when CPU enters deepsleep |
| Kojto | 158:b23ee177fd68 | 400 | * @rmtoll CR PDDS LL_PWR_SetPowerMode |
| Kojto | 158:b23ee177fd68 | 401 | * @param PDMode This parameter can be one of the following values: |
| Kojto | 158:b23ee177fd68 | 402 | * @arg @ref LL_PWR_MODE_STOP |
| Kojto | 158:b23ee177fd68 | 403 | * @arg @ref LL_PWR_MODE_STANDBY |
| Kojto | 158:b23ee177fd68 | 404 | * @note Set the regulator to low power (bit @ref LL_PWR_REGU_LPMODES_LOW_POWER) |
| Kojto | 158:b23ee177fd68 | 405 | * before setting MODE_STOP. If the regulator remains in "main mode", |
| Kojto | 158:b23ee177fd68 | 406 | * it consumes more power without providing any additional feature. |
| Kojto | 158:b23ee177fd68 | 407 | * In MODE_STANDBY the regulator is automatically off. |
| Kojto | 158:b23ee177fd68 | 408 | * @retval None |
| Kojto | 158:b23ee177fd68 | 409 | */ |
| Kojto | 158:b23ee177fd68 | 410 | __STATIC_INLINE void LL_PWR_SetPowerMode(uint32_t PDMode) |
| Kojto | 158:b23ee177fd68 | 411 | { |
| Kojto | 158:b23ee177fd68 | 412 | MODIFY_REG(PWR->CR, PWR_CR_PDDS, PDMode); |
| Kojto | 158:b23ee177fd68 | 413 | } |
| Kojto | 158:b23ee177fd68 | 414 | |
| Kojto | 158:b23ee177fd68 | 415 | /** |
| Kojto | 158:b23ee177fd68 | 416 | * @brief Get power down mode when CPU enters deepsleep |
| Kojto | 158:b23ee177fd68 | 417 | * @rmtoll CR PDDS LL_PWR_GetPowerMode |
| Kojto | 158:b23ee177fd68 | 418 | * @retval Returned value can be one of the following values: |
| Kojto | 158:b23ee177fd68 | 419 | * @arg @ref LL_PWR_MODE_STOP |
| Kojto | 158:b23ee177fd68 | 420 | * @arg @ref LL_PWR_MODE_STANDBY |
| Kojto | 158:b23ee177fd68 | 421 | */ |
| Kojto | 158:b23ee177fd68 | 422 | __STATIC_INLINE uint32_t LL_PWR_GetPowerMode(void) |
| Kojto | 158:b23ee177fd68 | 423 | { |
| Kojto | 158:b23ee177fd68 | 424 | return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_PDDS)); |
| Kojto | 158:b23ee177fd68 | 425 | } |
| Kojto | 158:b23ee177fd68 | 426 | |
| Kojto | 158:b23ee177fd68 | 427 | #if defined (PWR_PVD_SUPPORT) |
| Kojto | 158:b23ee177fd68 | 428 | /** |
| Kojto | 158:b23ee177fd68 | 429 | * @brief Configure the voltage threshold detected by the Power Voltage Detector |
| Kojto | 158:b23ee177fd68 | 430 | * @rmtoll CR PLS LL_PWR_SetPVDLevel |
| Kojto | 158:b23ee177fd68 | 431 | * @param PVDLevel This parameter can be one of the following values: |
| Kojto | 158:b23ee177fd68 | 432 | * @arg @ref LL_PWR_PVDLEVEL_0 |
| Kojto | 158:b23ee177fd68 | 433 | * @arg @ref LL_PWR_PVDLEVEL_1 |
| Kojto | 158:b23ee177fd68 | 434 | * @arg @ref LL_PWR_PVDLEVEL_2 |
| Kojto | 158:b23ee177fd68 | 435 | * @arg @ref LL_PWR_PVDLEVEL_3 |
| Kojto | 158:b23ee177fd68 | 436 | * @arg @ref LL_PWR_PVDLEVEL_4 |
| Kojto | 158:b23ee177fd68 | 437 | * @arg @ref LL_PWR_PVDLEVEL_5 |
| Kojto | 158:b23ee177fd68 | 438 | * @arg @ref LL_PWR_PVDLEVEL_6 |
| Kojto | 158:b23ee177fd68 | 439 | * @arg @ref LL_PWR_PVDLEVEL_7 |
| Kojto | 158:b23ee177fd68 | 440 | * @retval None |
| Kojto | 158:b23ee177fd68 | 441 | */ |
| Kojto | 158:b23ee177fd68 | 442 | __STATIC_INLINE void LL_PWR_SetPVDLevel(uint32_t PVDLevel) |
| Kojto | 158:b23ee177fd68 | 443 | { |
| Kojto | 158:b23ee177fd68 | 444 | MODIFY_REG(PWR->CR, PWR_CR_PLS, PVDLevel); |
| Kojto | 158:b23ee177fd68 | 445 | } |
| Kojto | 158:b23ee177fd68 | 446 | |
| Kojto | 158:b23ee177fd68 | 447 | /** |
| Kojto | 158:b23ee177fd68 | 448 | * @brief Get the voltage threshold detection |
| Kojto | 158:b23ee177fd68 | 449 | * @rmtoll CR PLS LL_PWR_GetPVDLevel |
| Kojto | 158:b23ee177fd68 | 450 | * @retval Returned value can be one of the following values: |
| Kojto | 158:b23ee177fd68 | 451 | * @arg @ref LL_PWR_PVDLEVEL_0 |
| Kojto | 158:b23ee177fd68 | 452 | * @arg @ref LL_PWR_PVDLEVEL_1 |
| Kojto | 158:b23ee177fd68 | 453 | * @arg @ref LL_PWR_PVDLEVEL_2 |
| Kojto | 158:b23ee177fd68 | 454 | * @arg @ref LL_PWR_PVDLEVEL_3 |
| Kojto | 158:b23ee177fd68 | 455 | * @arg @ref LL_PWR_PVDLEVEL_4 |
| Kojto | 158:b23ee177fd68 | 456 | * @arg @ref LL_PWR_PVDLEVEL_5 |
| Kojto | 158:b23ee177fd68 | 457 | * @arg @ref LL_PWR_PVDLEVEL_6 |
| Kojto | 158:b23ee177fd68 | 458 | * @arg @ref LL_PWR_PVDLEVEL_7 |
| Kojto | 158:b23ee177fd68 | 459 | */ |
| Kojto | 158:b23ee177fd68 | 460 | __STATIC_INLINE uint32_t LL_PWR_GetPVDLevel(void) |
| Kojto | 158:b23ee177fd68 | 461 | { |
| Kojto | 158:b23ee177fd68 | 462 | return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_PLS)); |
| Kojto | 158:b23ee177fd68 | 463 | } |
| Kojto | 158:b23ee177fd68 | 464 | |
| Kojto | 158:b23ee177fd68 | 465 | /** |
| Kojto | 158:b23ee177fd68 | 466 | * @brief Enable Power Voltage Detector |
| Kojto | 158:b23ee177fd68 | 467 | * @rmtoll CR PVDE LL_PWR_EnablePVD |
| Kojto | 158:b23ee177fd68 | 468 | * @retval None |
| Kojto | 158:b23ee177fd68 | 469 | */ |
| Kojto | 158:b23ee177fd68 | 470 | __STATIC_INLINE void LL_PWR_EnablePVD(void) |
| Kojto | 158:b23ee177fd68 | 471 | { |
| Kojto | 158:b23ee177fd68 | 472 | SET_BIT(PWR->CR, PWR_CR_PVDE); |
| Kojto | 158:b23ee177fd68 | 473 | } |
| Kojto | 158:b23ee177fd68 | 474 | |
| Kojto | 158:b23ee177fd68 | 475 | /** |
| Kojto | 158:b23ee177fd68 | 476 | * @brief Disable Power Voltage Detector |
| Kojto | 158:b23ee177fd68 | 477 | * @rmtoll CR PVDE LL_PWR_DisablePVD |
| Kojto | 158:b23ee177fd68 | 478 | * @retval None |
| Kojto | 158:b23ee177fd68 | 479 | */ |
| Kojto | 158:b23ee177fd68 | 480 | __STATIC_INLINE void LL_PWR_DisablePVD(void) |
| Kojto | 158:b23ee177fd68 | 481 | { |
| Kojto | 158:b23ee177fd68 | 482 | CLEAR_BIT(PWR->CR, PWR_CR_PVDE); |
| Kojto | 158:b23ee177fd68 | 483 | } |
| Kojto | 158:b23ee177fd68 | 484 | |
| Kojto | 158:b23ee177fd68 | 485 | /** |
| Kojto | 158:b23ee177fd68 | 486 | * @brief Check if Power Voltage Detector is enabled |
| Kojto | 158:b23ee177fd68 | 487 | * @rmtoll CR PVDE LL_PWR_IsEnabledPVD |
| Kojto | 158:b23ee177fd68 | 488 | * @retval State of bit (1 or 0). |
| Kojto | 158:b23ee177fd68 | 489 | */ |
| Kojto | 158:b23ee177fd68 | 490 | __STATIC_INLINE uint32_t LL_PWR_IsEnabledPVD(void) |
| Kojto | 158:b23ee177fd68 | 491 | { |
| Kojto | 158:b23ee177fd68 | 492 | return (READ_BIT(PWR->CR, PWR_CR_PVDE) == (PWR_CR_PVDE)); |
| Kojto | 158:b23ee177fd68 | 493 | } |
| Kojto | 158:b23ee177fd68 | 494 | #endif |
| Kojto | 158:b23ee177fd68 | 495 | |
| Kojto | 158:b23ee177fd68 | 496 | /** |
| Kojto | 158:b23ee177fd68 | 497 | * @brief Enable the WakeUp PINx functionality |
| Kojto | 158:b23ee177fd68 | 498 | * @rmtoll CSR EWUP1 LL_PWR_EnableWakeUpPin\n |
| Kojto | 158:b23ee177fd68 | 499 | * CSR EWUP2 LL_PWR_EnableWakeUpPin\n |
| Kojto | 158:b23ee177fd68 | 500 | * CSR EWUP3 LL_PWR_EnableWakeUpPin |
| Kojto | 158:b23ee177fd68 | 501 | * @param WakeUpPin This parameter can be one of the following values: |
| Kojto | 158:b23ee177fd68 | 502 | * @arg @ref LL_PWR_WAKEUP_PIN1 |
| Kojto | 158:b23ee177fd68 | 503 | * @arg @ref LL_PWR_WAKEUP_PIN2 |
| Kojto | 158:b23ee177fd68 | 504 | * @arg @ref LL_PWR_WAKEUP_PIN3 (*) |
| Kojto | 158:b23ee177fd68 | 505 | * |
| Kojto | 158:b23ee177fd68 | 506 | * (*) not available on all devices |
| Kojto | 158:b23ee177fd68 | 507 | * @retval None |
| Kojto | 158:b23ee177fd68 | 508 | */ |
| Kojto | 158:b23ee177fd68 | 509 | __STATIC_INLINE void LL_PWR_EnableWakeUpPin(uint32_t WakeUpPin) |
| Kojto | 158:b23ee177fd68 | 510 | { |
| Kojto | 158:b23ee177fd68 | 511 | SET_BIT(PWR->CSR, WakeUpPin); |
| Kojto | 158:b23ee177fd68 | 512 | } |
| Kojto | 158:b23ee177fd68 | 513 | |
| Kojto | 158:b23ee177fd68 | 514 | /** |
| Kojto | 158:b23ee177fd68 | 515 | * @brief Disable the WakeUp PINx functionality |
| Kojto | 158:b23ee177fd68 | 516 | * @rmtoll CSR EWUP1 LL_PWR_DisableWakeUpPin\n |
| Kojto | 158:b23ee177fd68 | 517 | * CSR EWUP2 LL_PWR_DisableWakeUpPin\n |
| Kojto | 158:b23ee177fd68 | 518 | * CSR EWUP3 LL_PWR_DisableWakeUpPin |
| Kojto | 158:b23ee177fd68 | 519 | * @param WakeUpPin This parameter can be one of the following values: |
| Kojto | 158:b23ee177fd68 | 520 | * @arg @ref LL_PWR_WAKEUP_PIN1 |
| Kojto | 158:b23ee177fd68 | 521 | * @arg @ref LL_PWR_WAKEUP_PIN2 |
| Kojto | 158:b23ee177fd68 | 522 | * @arg @ref LL_PWR_WAKEUP_PIN3 (*) |
| Kojto | 158:b23ee177fd68 | 523 | * |
| Kojto | 158:b23ee177fd68 | 524 | * (*) not available on all devices |
| Kojto | 158:b23ee177fd68 | 525 | * @retval None |
| Kojto | 158:b23ee177fd68 | 526 | */ |
| Kojto | 158:b23ee177fd68 | 527 | __STATIC_INLINE void LL_PWR_DisableWakeUpPin(uint32_t WakeUpPin) |
| Kojto | 158:b23ee177fd68 | 528 | { |
| Kojto | 158:b23ee177fd68 | 529 | CLEAR_BIT(PWR->CSR, WakeUpPin); |
| Kojto | 158:b23ee177fd68 | 530 | } |
| Kojto | 158:b23ee177fd68 | 531 | |
| Kojto | 158:b23ee177fd68 | 532 | /** |
| Kojto | 158:b23ee177fd68 | 533 | * @brief Check if the WakeUp PINx functionality is enabled |
| Kojto | 158:b23ee177fd68 | 534 | * @rmtoll CSR EWUP1 LL_PWR_IsEnabledWakeUpPin\n |
| Kojto | 158:b23ee177fd68 | 535 | * CSR EWUP2 LL_PWR_IsEnabledWakeUpPin\n |
| Kojto | 158:b23ee177fd68 | 536 | * CSR EWUP3 LL_PWR_IsEnabledWakeUpPin |
| Kojto | 158:b23ee177fd68 | 537 | * @param WakeUpPin This parameter can be one of the following values: |
| Kojto | 158:b23ee177fd68 | 538 | * @arg @ref LL_PWR_WAKEUP_PIN1 |
| Kojto | 158:b23ee177fd68 | 539 | * @arg @ref LL_PWR_WAKEUP_PIN2 |
| Kojto | 158:b23ee177fd68 | 540 | * @arg @ref LL_PWR_WAKEUP_PIN3 (*) |
| Kojto | 158:b23ee177fd68 | 541 | * |
| Kojto | 158:b23ee177fd68 | 542 | * (*) not available on all devices |
| Kojto | 158:b23ee177fd68 | 543 | * @retval State of bit (1 or 0). |
| Kojto | 158:b23ee177fd68 | 544 | */ |
| Kojto | 158:b23ee177fd68 | 545 | __STATIC_INLINE uint32_t LL_PWR_IsEnabledWakeUpPin(uint32_t WakeUpPin) |
| Kojto | 158:b23ee177fd68 | 546 | { |
| Kojto | 158:b23ee177fd68 | 547 | return (READ_BIT(PWR->CSR, WakeUpPin) == (WakeUpPin)); |
| Kojto | 158:b23ee177fd68 | 548 | } |
| Kojto | 158:b23ee177fd68 | 549 | |
| Kojto | 158:b23ee177fd68 | 550 | /** |
| Kojto | 158:b23ee177fd68 | 551 | * @brief Enable ultra low-power mode by enabling VREFINT switch off in low-power modes |
| Kojto | 158:b23ee177fd68 | 552 | * @rmtoll CR ULP LL_PWR_EnableUltraLowPower |
| Kojto | 158:b23ee177fd68 | 553 | * @retval None |
| Kojto | 158:b23ee177fd68 | 554 | */ |
| Kojto | 158:b23ee177fd68 | 555 | __STATIC_INLINE void LL_PWR_EnableUltraLowPower(void) |
| Kojto | 158:b23ee177fd68 | 556 | { |
| Kojto | 158:b23ee177fd68 | 557 | SET_BIT(PWR->CR, PWR_CR_ULP); |
| Kojto | 158:b23ee177fd68 | 558 | } |
| Kojto | 158:b23ee177fd68 | 559 | |
| Kojto | 158:b23ee177fd68 | 560 | /** |
| Kojto | 158:b23ee177fd68 | 561 | * @brief Disable ultra low-power mode by disabling VREFINT switch off in low-power modes |
| Kojto | 158:b23ee177fd68 | 562 | * @rmtoll CR ULP LL_PWR_DisableUltraLowPower |
| Kojto | 158:b23ee177fd68 | 563 | * @retval None |
| Kojto | 158:b23ee177fd68 | 564 | */ |
| Kojto | 158:b23ee177fd68 | 565 | __STATIC_INLINE void LL_PWR_DisableUltraLowPower(void) |
| Kojto | 158:b23ee177fd68 | 566 | { |
| Kojto | 158:b23ee177fd68 | 567 | CLEAR_BIT(PWR->CR, PWR_CR_ULP); |
| Kojto | 158:b23ee177fd68 | 568 | } |
| Kojto | 158:b23ee177fd68 | 569 | |
| Kojto | 158:b23ee177fd68 | 570 | /** |
| Kojto | 158:b23ee177fd68 | 571 | * @brief Check if ultra low-power mode is enabled by checking if VREFINT switch off in low-power modes is enabled |
| Kojto | 158:b23ee177fd68 | 572 | * @rmtoll CR ULP LL_PWR_IsEnabledUltraLowPower |
| Kojto | 158:b23ee177fd68 | 573 | * @retval State of bit (1 or 0). |
| Kojto | 158:b23ee177fd68 | 574 | */ |
| Kojto | 158:b23ee177fd68 | 575 | __STATIC_INLINE uint32_t LL_PWR_IsEnabledUltraLowPower(void) |
| Kojto | 158:b23ee177fd68 | 576 | { |
| Kojto | 158:b23ee177fd68 | 577 | return (READ_BIT(PWR->CR, PWR_CR_ULP) == (PWR_CR_ULP)); |
| Kojto | 158:b23ee177fd68 | 578 | } |
| Kojto | 158:b23ee177fd68 | 579 | |
| Kojto | 158:b23ee177fd68 | 580 | /** |
| Kojto | 158:b23ee177fd68 | 581 | * @brief Enable fast wakeup by ignoring VREFINT startup time when exiting from low-power mode |
| Kojto | 158:b23ee177fd68 | 582 | * @rmtoll CR FWU LL_PWR_EnableFastWakeUp |
| Kojto | 158:b23ee177fd68 | 583 | * @note Works in conjunction with ultra low power mode. |
| Kojto | 158:b23ee177fd68 | 584 | * @retval None |
| Kojto | 158:b23ee177fd68 | 585 | */ |
| Kojto | 158:b23ee177fd68 | 586 | __STATIC_INLINE void LL_PWR_EnableFastWakeUp(void) |
| Kojto | 158:b23ee177fd68 | 587 | { |
| Kojto | 158:b23ee177fd68 | 588 | SET_BIT(PWR->CR, PWR_CR_FWU); |
| Kojto | 158:b23ee177fd68 | 589 | } |
| Kojto | 158:b23ee177fd68 | 590 | |
| Kojto | 158:b23ee177fd68 | 591 | /** |
| Kojto | 158:b23ee177fd68 | 592 | * @brief Disable fast wakeup by waiting VREFINT startup time when exiting from low-power mode |
| Kojto | 158:b23ee177fd68 | 593 | * @rmtoll CR FWU LL_PWR_DisableFastWakeUp |
| Kojto | 158:b23ee177fd68 | 594 | * @note Works in conjunction with ultra low power mode. |
| Kojto | 158:b23ee177fd68 | 595 | * @retval None |
| Kojto | 158:b23ee177fd68 | 596 | */ |
| Kojto | 158:b23ee177fd68 | 597 | __STATIC_INLINE void LL_PWR_DisableFastWakeUp(void) |
| Kojto | 158:b23ee177fd68 | 598 | { |
| Kojto | 158:b23ee177fd68 | 599 | CLEAR_BIT(PWR->CR, PWR_CR_FWU); |
| Kojto | 158:b23ee177fd68 | 600 | } |
| Kojto | 158:b23ee177fd68 | 601 | |
| Kojto | 158:b23ee177fd68 | 602 | /** |
| Kojto | 158:b23ee177fd68 | 603 | * @brief Check if fast wakeup is enabled by checking if VREFINT startup time when exiting from low-power mode is ignored |
| Kojto | 158:b23ee177fd68 | 604 | * @rmtoll CR FWU LL_PWR_IsEnabledFastWakeUp |
| Kojto | 158:b23ee177fd68 | 605 | * @retval State of bit (1 or 0). |
| Kojto | 158:b23ee177fd68 | 606 | */ |
| Kojto | 158:b23ee177fd68 | 607 | __STATIC_INLINE uint32_t LL_PWR_IsEnabledFastWakeUp(void) |
| Kojto | 158:b23ee177fd68 | 608 | { |
| Kojto | 158:b23ee177fd68 | 609 | return (READ_BIT(PWR->CR, PWR_CR_FWU) == (PWR_CR_FWU)); |
| Kojto | 158:b23ee177fd68 | 610 | } |
| Kojto | 158:b23ee177fd68 | 611 | |
| Kojto | 158:b23ee177fd68 | 612 | /** |
| Kojto | 158:b23ee177fd68 | 613 | * @brief Enable non-volatile memory (Flash and EEPROM) keeping off feature when exiting from low-power mode |
| Kojto | 158:b23ee177fd68 | 614 | * @rmtoll CR DS_EE_KOFF LL_PWR_EnableNVMKeptOff |
| Kojto | 158:b23ee177fd68 | 615 | * @note When enabled, after entering low-power mode (Stop or Standby only), if RUN_PD of FLASH_ACR register |
| Kojto | 158:b23ee177fd68 | 616 | * is also set, the Flash memory will not be woken up when exiting from deepsleep mode. |
| Kojto | 158:b23ee177fd68 | 617 | * When enabled, the EEPROM will not be woken up when exiting from low-power mode (if the bit RUN_PD is set) |
| Kojto | 158:b23ee177fd68 | 618 | * @retval None |
| Kojto | 158:b23ee177fd68 | 619 | */ |
| Kojto | 158:b23ee177fd68 | 620 | __STATIC_INLINE void LL_PWR_EnableNVMKeptOff(void) |
| Kojto | 158:b23ee177fd68 | 621 | { |
| Kojto | 158:b23ee177fd68 | 622 | SET_BIT(PWR->CR, PWR_CR_DSEEKOFF); |
| Kojto | 158:b23ee177fd68 | 623 | } |
| Kojto | 158:b23ee177fd68 | 624 | |
| Kojto | 158:b23ee177fd68 | 625 | /** |
| Kojto | 158:b23ee177fd68 | 626 | * @brief Disable non-volatile memory (Flash and EEPROM) keeping off feature when exiting from low-power mode |
| Kojto | 158:b23ee177fd68 | 627 | * @rmtoll CR DS_EE_KOFF LL_PWR_DisableNVMKeptOff |
| Kojto | 158:b23ee177fd68 | 628 | * @note When disabled, Flash memory is woken up when exiting from deepsleep mode even if the bit RUN_PD is set |
| Kojto | 158:b23ee177fd68 | 629 | * @retval None |
| Kojto | 158:b23ee177fd68 | 630 | */ |
| Kojto | 158:b23ee177fd68 | 631 | __STATIC_INLINE void LL_PWR_DisableNVMKeptOff(void) |
| Kojto | 158:b23ee177fd68 | 632 | { |
| Kojto | 158:b23ee177fd68 | 633 | CLEAR_BIT(PWR->CR, PWR_CR_DSEEKOFF); |
| Kojto | 158:b23ee177fd68 | 634 | } |
| Kojto | 158:b23ee177fd68 | 635 | |
| Kojto | 158:b23ee177fd68 | 636 | /** |
| Kojto | 158:b23ee177fd68 | 637 | * @brief Check if non-volatile memory (Flash and EEPROM) keeping off feature when exiting from low-power mode is enabled |
| Kojto | 158:b23ee177fd68 | 638 | * @rmtoll CR DS_EE_KOFF LL_PWR_IsEnabledNVMKeptOff |
| Kojto | 158:b23ee177fd68 | 639 | * @retval State of bit (1 or 0). |
| Kojto | 158:b23ee177fd68 | 640 | */ |
| Kojto | 158:b23ee177fd68 | 641 | __STATIC_INLINE uint32_t LL_PWR_IsEnabledNVMKeptOff(void) |
| Kojto | 158:b23ee177fd68 | 642 | { |
| Kojto | 158:b23ee177fd68 | 643 | return (READ_BIT(PWR->CR, PWR_CR_DSEEKOFF) == (PWR_CR_DSEEKOFF)); |
| Kojto | 158:b23ee177fd68 | 644 | } |
| Kojto | 158:b23ee177fd68 | 645 | |
| Kojto | 158:b23ee177fd68 | 646 | /** |
| Kojto | 158:b23ee177fd68 | 647 | * @} |
| Kojto | 158:b23ee177fd68 | 648 | */ |
| Kojto | 158:b23ee177fd68 | 649 | |
| Kojto | 158:b23ee177fd68 | 650 | /** @defgroup PWR_LL_EF_FLAG_Management FLAG_Management |
| Kojto | 158:b23ee177fd68 | 651 | * @{ |
| Kojto | 158:b23ee177fd68 | 652 | */ |
| Kojto | 158:b23ee177fd68 | 653 | |
| Kojto | 158:b23ee177fd68 | 654 | /** |
| Kojto | 158:b23ee177fd68 | 655 | * @brief Get Wake-up Flag |
| Kojto | 158:b23ee177fd68 | 656 | * @rmtoll CSR WUF LL_PWR_IsActiveFlag_WU |
| Kojto | 158:b23ee177fd68 | 657 | * @retval State of bit (1 or 0). |
| Kojto | 158:b23ee177fd68 | 658 | */ |
| Kojto | 158:b23ee177fd68 | 659 | __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_WU(void) |
| Kojto | 158:b23ee177fd68 | 660 | { |
| Kojto | 158:b23ee177fd68 | 661 | return (READ_BIT(PWR->CSR, PWR_CSR_WUF) == (PWR_CSR_WUF)); |
| Kojto | 158:b23ee177fd68 | 662 | } |
| Kojto | 158:b23ee177fd68 | 663 | |
| Kojto | 158:b23ee177fd68 | 664 | /** |
| Kojto | 158:b23ee177fd68 | 665 | * @brief Get Standby Flag |
| Kojto | 158:b23ee177fd68 | 666 | * @rmtoll CSR SBF LL_PWR_IsActiveFlag_SB |
| Kojto | 158:b23ee177fd68 | 667 | * @retval State of bit (1 or 0). |
| Kojto | 158:b23ee177fd68 | 668 | */ |
| Kojto | 158:b23ee177fd68 | 669 | __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_SB(void) |
| Kojto | 158:b23ee177fd68 | 670 | { |
| Kojto | 158:b23ee177fd68 | 671 | return (READ_BIT(PWR->CSR, PWR_CSR_SBF) == (PWR_CSR_SBF)); |
| Kojto | 158:b23ee177fd68 | 672 | } |
| Kojto | 158:b23ee177fd68 | 673 | |
| Kojto | 158:b23ee177fd68 | 674 | #if defined (PWR_PVD_SUPPORT) |
| Kojto | 158:b23ee177fd68 | 675 | /** |
| Kojto | 158:b23ee177fd68 | 676 | * @brief Indicate whether VDD voltage is below the selected PVD threshold |
| Kojto | 158:b23ee177fd68 | 677 | * @rmtoll CSR PVDO LL_PWR_IsActiveFlag_PVDO |
| Kojto | 158:b23ee177fd68 | 678 | * @retval State of bit (1 or 0). |
| Kojto | 158:b23ee177fd68 | 679 | */ |
| Kojto | 158:b23ee177fd68 | 680 | __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_PVDO(void) |
| Kojto | 158:b23ee177fd68 | 681 | { |
| Kojto | 158:b23ee177fd68 | 682 | return (READ_BIT(PWR->CSR, PWR_CSR_PVDO) == (PWR_CSR_PVDO)); |
| Kojto | 158:b23ee177fd68 | 683 | } |
| Kojto | 158:b23ee177fd68 | 684 | #endif |
| Kojto | 158:b23ee177fd68 | 685 | |
| Kojto | 158:b23ee177fd68 | 686 | #if defined (PWR_CSR_VREFINTRDYF) |
| Kojto | 158:b23ee177fd68 | 687 | /** |
| Kojto | 158:b23ee177fd68 | 688 | * @brief Get Internal Reference VrefInt Flag |
| Kojto | 158:b23ee177fd68 | 689 | * @rmtoll CSR VREFINTRDYF LL_PWR_IsActiveFlag_VREFINTRDY |
| Kojto | 158:b23ee177fd68 | 690 | * @retval State of bit (1 or 0). |
| Kojto | 158:b23ee177fd68 | 691 | */ |
| Kojto | 158:b23ee177fd68 | 692 | __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_VREFINTRDY(void) |
| Kojto | 158:b23ee177fd68 | 693 | { |
| Kojto | 158:b23ee177fd68 | 694 | return (READ_BIT(PWR->CSR, PWR_CSR_VREFINTRDYF) == (PWR_CSR_VREFINTRDYF)); |
| Kojto | 158:b23ee177fd68 | 695 | } |
| Kojto | 158:b23ee177fd68 | 696 | #endif |
| Kojto | 158:b23ee177fd68 | 697 | |
| Kojto | 158:b23ee177fd68 | 698 | /** |
| Kojto | 158:b23ee177fd68 | 699 | * @brief Indicate whether the regulator is ready in the selected voltage range or if its output voltage is still changing to the required voltage level |
| Kojto | 158:b23ee177fd68 | 700 | * @rmtoll CSR VOSF LL_PWR_IsActiveFlag_VOSF |
| Kojto | 158:b23ee177fd68 | 701 | * @retval State of bit (1 or 0). |
| Kojto | 158:b23ee177fd68 | 702 | */ |
| Kojto | 158:b23ee177fd68 | 703 | __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_VOSF(void) |
| Kojto | 158:b23ee177fd68 | 704 | { |
| Kojto | 158:b23ee177fd68 | 705 | return (READ_BIT(PWR->CSR, PWR_CSR_VOSF) == (PWR_CSR_VOSF)); |
| Kojto | 158:b23ee177fd68 | 706 | } |
| Kojto | 158:b23ee177fd68 | 707 | |
| Kojto | 158:b23ee177fd68 | 708 | /** |
| Kojto | 158:b23ee177fd68 | 709 | * @brief Indicate whether the regulator is ready in main mode or is in low-power mode |
| Kojto | 158:b23ee177fd68 | 710 | * @rmtoll CSR REGLPF LL_PWR_IsActiveFlag_REGLPF |
| Kojto | 158:b23ee177fd68 | 711 | * @note Take care, return value "0" means the regulator is ready. Return value "1" means the output voltage range is still changing. |
| Kojto | 158:b23ee177fd68 | 712 | * @retval State of bit (1 or 0). |
| Kojto | 158:b23ee177fd68 | 713 | */ |
| Kojto | 158:b23ee177fd68 | 714 | __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_REGLPF(void) |
| Kojto | 158:b23ee177fd68 | 715 | { |
| Kojto | 158:b23ee177fd68 | 716 | return (READ_BIT(PWR->CSR, PWR_CSR_REGLPF) == (PWR_CSR_REGLPF)); |
| Kojto | 158:b23ee177fd68 | 717 | } |
| Kojto | 158:b23ee177fd68 | 718 | |
| Kojto | 158:b23ee177fd68 | 719 | /** |
| Kojto | 158:b23ee177fd68 | 720 | * @brief Clear Standby Flag |
| Kojto | 158:b23ee177fd68 | 721 | * @rmtoll CR CSBF LL_PWR_ClearFlag_SB |
| Kojto | 158:b23ee177fd68 | 722 | * @retval None |
| Kojto | 158:b23ee177fd68 | 723 | */ |
| Kojto | 158:b23ee177fd68 | 724 | __STATIC_INLINE void LL_PWR_ClearFlag_SB(void) |
| Kojto | 158:b23ee177fd68 | 725 | { |
| Kojto | 158:b23ee177fd68 | 726 | SET_BIT(PWR->CR, PWR_CR_CSBF); |
| Kojto | 158:b23ee177fd68 | 727 | } |
| Kojto | 158:b23ee177fd68 | 728 | |
| Kojto | 158:b23ee177fd68 | 729 | /** |
| Kojto | 158:b23ee177fd68 | 730 | * @brief Clear Wake-up Flags |
| Kojto | 158:b23ee177fd68 | 731 | * @rmtoll CR CWUF LL_PWR_ClearFlag_WU |
| Kojto | 158:b23ee177fd68 | 732 | * @retval None |
| Kojto | 158:b23ee177fd68 | 733 | */ |
| Kojto | 158:b23ee177fd68 | 734 | __STATIC_INLINE void LL_PWR_ClearFlag_WU(void) |
| Kojto | 158:b23ee177fd68 | 735 | { |
| Kojto | 158:b23ee177fd68 | 736 | SET_BIT(PWR->CR, PWR_CR_CWUF); |
| Kojto | 158:b23ee177fd68 | 737 | } |
| Kojto | 158:b23ee177fd68 | 738 | |
| Kojto | 158:b23ee177fd68 | 739 | |
| Kojto | 158:b23ee177fd68 | 740 | #if defined(USE_FULL_LL_DRIVER) |
| Kojto | 158:b23ee177fd68 | 741 | /** @defgroup PWR_LL_EF_Init De-initialization function |
| Kojto | 158:b23ee177fd68 | 742 | * @{ |
| Kojto | 158:b23ee177fd68 | 743 | */ |
| Kojto | 158:b23ee177fd68 | 744 | ErrorStatus LL_PWR_DeInit(void); |
| Kojto | 158:b23ee177fd68 | 745 | /** |
| Kojto | 158:b23ee177fd68 | 746 | * @} |
| Kojto | 158:b23ee177fd68 | 747 | */ |
| Kojto | 158:b23ee177fd68 | 748 | #endif /* USE_FULL_LL_DRIVER */ |
| Kojto | 158:b23ee177fd68 | 749 | |
| Kojto | 158:b23ee177fd68 | 750 | /** |
| Kojto | 158:b23ee177fd68 | 751 | * @} |
| Kojto | 158:b23ee177fd68 | 752 | */ |
| Kojto | 158:b23ee177fd68 | 753 | |
| Kojto | 158:b23ee177fd68 | 754 | /** |
| Kojto | 158:b23ee177fd68 | 755 | * @} |
| Kojto | 158:b23ee177fd68 | 756 | */ |
| Kojto | 158:b23ee177fd68 | 757 | |
| Kojto | 158:b23ee177fd68 | 758 | /** |
| Kojto | 158:b23ee177fd68 | 759 | * @} |
| Kojto | 158:b23ee177fd68 | 760 | */ |
| Kojto | 158:b23ee177fd68 | 761 | |
| Kojto | 158:b23ee177fd68 | 762 | #endif /* defined(PWR) */ |
| Kojto | 158:b23ee177fd68 | 763 | |
| Kojto | 158:b23ee177fd68 | 764 | /** |
| Kojto | 158:b23ee177fd68 | 765 | * @} |
| Kojto | 158:b23ee177fd68 | 766 | */ |
| Kojto | 158:b23ee177fd68 | 767 | |
| Kojto | 158:b23ee177fd68 | 768 | #ifdef __cplusplus |
| Kojto | 158:b23ee177fd68 | 769 | } |
| Kojto | 158:b23ee177fd68 | 770 | #endif |
| Kojto | 158:b23ee177fd68 | 771 | |
| Kojto | 158:b23ee177fd68 | 772 | #endif /* __STM32L0xx_LL_PWR_H */ |
| Kojto | 158:b23ee177fd68 | 773 | |
| Kojto | 158:b23ee177fd68 | 774 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |