Frederick Huang / mbed-STM32L452

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Dependents:   STM32L452_Nucleo_ticker

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targets/TARGET_STM/TARGET_STM32L0/device/stm32l0xx_hal_lptim.h@182:59ec31722650, 2017-12-15 (annotated)

Committer:
Frederick_H
Date:
Fri Dec 15 08:17:23 2017 +0000
Revision:
182:59ec31722650
Parent:
151:5eaa88a5bcc7 
Modify hal_tick.h of TARGET_STM32L476xG

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file stm32l0xx_hal_lptim.h
<> 144:ef7eb2e8f9f7 4 * @author MCD Application Team
<> 151:5eaa88a5bcc7 5 * @version V1.7.0
<> 151:5eaa88a5bcc7 6 * @date 31-May-2016
<> 144:ef7eb2e8f9f7 7 * @brief Header file of LPTIM HAL module.
<> 144:ef7eb2e8f9f7 8 ******************************************************************************
<> 144:ef7eb2e8f9f7 9 * @attention
<> 144:ef7eb2e8f9f7 10 *
<> 144:ef7eb2e8f9f7 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 144:ef7eb2e8f9f7 12 *
<> 144:ef7eb2e8f9f7 13 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 14 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 15 * 1. Redistributions of source code must retain the above copyright notice,
<> 144:ef7eb2e8f9f7 16 * this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 18 * this list of conditions and the following disclaimer in the documentation
<> 144:ef7eb2e8f9f7 19 * and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 144:ef7eb2e8f9f7 21 * may be used to endorse or promote products derived from this software
<> 144:ef7eb2e8f9f7 22 * without specific prior written permission.
<> 144:ef7eb2e8f9f7 23 *
<> 144:ef7eb2e8f9f7 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 34 *
<> 144:ef7eb2e8f9f7 35 ******************************************************************************
<> 144:ef7eb2e8f9f7 36 */
<> 144:ef7eb2e8f9f7 37
<> 144:ef7eb2e8f9f7 38 /* Define to prevent recursive inclusion -------------------------------------*/
<> 144:ef7eb2e8f9f7 39 #ifndef __STM32L0xx_HAL_LPTIM_H
<> 144:ef7eb2e8f9f7 40 #define __STM32L0xx_HAL_LPTIM_H
<> 144:ef7eb2e8f9f7 41
<> 144:ef7eb2e8f9f7 42 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 43 extern "C" {
<> 144:ef7eb2e8f9f7 44 #endif
<> 144:ef7eb2e8f9f7 45
<> 144:ef7eb2e8f9f7 46 /* Includes ------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 47 #include "stm32l0xx_hal_def.h"
<> 144:ef7eb2e8f9f7 48
<> 144:ef7eb2e8f9f7 49 /** @addtogroup STM32L0xx_HAL_Driver
<> 144:ef7eb2e8f9f7 50 * @{
<> 144:ef7eb2e8f9f7 51 */
<> 144:ef7eb2e8f9f7 52
<> 144:ef7eb2e8f9f7 53 /** @defgroup LPTIM LPTIM (Low power timer)
<> 144:ef7eb2e8f9f7 54 * @{
<> 144:ef7eb2e8f9f7 55 */
<> 144:ef7eb2e8f9f7 56
<> 144:ef7eb2e8f9f7 57 /* Exported types ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 58 /** @defgroup LPTIM_Exported_Types LPTIM Exported Types
<> 144:ef7eb2e8f9f7 59 * @{
<> 144:ef7eb2e8f9f7 60 */
<> 144:ef7eb2e8f9f7 61
<> 144:ef7eb2e8f9f7 62 /** @defgroup LPTIM_Clock_Configuration LPTIM Clock configuration structure
<> 144:ef7eb2e8f9f7 63 * @{
<> 144:ef7eb2e8f9f7 64 */
<> 151:5eaa88a5bcc7 65 #define LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT ((uint32_t)EXTI_IMR_IM29) /*!< External interrupt line 29 Connected to the LPTIM EXTI Line */
<> 151:5eaa88a5bcc7 66
<> 144:ef7eb2e8f9f7 67 /**
<> 144:ef7eb2e8f9f7 68 * @brief LPTIM Clock configuration definition
<> 144:ef7eb2e8f9f7 69 */
<> 144:ef7eb2e8f9f7 70 typedef struct
<> 144:ef7eb2e8f9f7 71 {
<> 144:ef7eb2e8f9f7 72 uint32_t Source; /*!< Selects the clock source.
<> 144:ef7eb2e8f9f7 73 This parameter can be a value of @ref LPTIM_Clock_Source */
<> 144:ef7eb2e8f9f7 74
<> 144:ef7eb2e8f9f7 75 uint32_t Prescaler; /*!< Specifies the counter clock Prescaler.
<> 144:ef7eb2e8f9f7 76 This parameter can be a value of @ref LPTIM_Clock_Prescaler */
<> 144:ef7eb2e8f9f7 77
<> 144:ef7eb2e8f9f7 78 }LPTIM_ClockConfigTypeDef;
<> 144:ef7eb2e8f9f7 79 /**
<> 144:ef7eb2e8f9f7 80 * @}
<> 144:ef7eb2e8f9f7 81 */
<> 144:ef7eb2e8f9f7 82
<> 144:ef7eb2e8f9f7 83 /** @defgroup LPTIM_ULPClock_Configuration LPTIM ULP Clock configuration structure
<> 144:ef7eb2e8f9f7 84 * @{
<> 144:ef7eb2e8f9f7 85 */
<> 144:ef7eb2e8f9f7 86 /**
<> 144:ef7eb2e8f9f7 87 * @brief LPTIM ULP Clock configuration definition
<> 144:ef7eb2e8f9f7 88 */
<> 144:ef7eb2e8f9f7 89 typedef struct
<> 144:ef7eb2e8f9f7 90 {
<> 144:ef7eb2e8f9f7 91 uint32_t Polarity; /*!< Selects the polarity of the active edge for the counter unit
<> 144:ef7eb2e8f9f7 92 if the ULPTIM input is selected.
<> 144:ef7eb2e8f9f7 93 Note: This parameter is used only when Ultra low power clock source is used.
<> 144:ef7eb2e8f9f7 94 Note: If the polarity is configured on 'both edges', an auxiliary clock
<> 144:ef7eb2e8f9f7 95 (one of the Low power oscillator) must be active.
<> 144:ef7eb2e8f9f7 96 This parameter can be a value of @ref LPTIM_Clock_Polarity */
<> 144:ef7eb2e8f9f7 97
<> 144:ef7eb2e8f9f7 98 uint32_t SampleTime; /*!< Selects the clock sampling time to configure the clock glitch filter.
<> 144:ef7eb2e8f9f7 99 Note: This parameter is used only when Ultra low power clock source is used.
<> 144:ef7eb2e8f9f7 100 This parameter can be a value of @ref LPTIM_Clock_Sample_Time */
<> 144:ef7eb2e8f9f7 101
<> 144:ef7eb2e8f9f7 102 }LPTIM_ULPClockConfigTypeDef;
<> 144:ef7eb2e8f9f7 103 /**
<> 144:ef7eb2e8f9f7 104 * @}
<> 144:ef7eb2e8f9f7 105 */
<> 144:ef7eb2e8f9f7 106
<> 144:ef7eb2e8f9f7 107 /** @defgroup LPTIM_Trigger_Configuration LPTIM Trigger configuration structure
<> 144:ef7eb2e8f9f7 108 * @{
<> 144:ef7eb2e8f9f7 109 */
<> 144:ef7eb2e8f9f7 110 /**
<> 144:ef7eb2e8f9f7 111 * @brief LPTIM Trigger configuration structure
<> 144:ef7eb2e8f9f7 112 */
<> 144:ef7eb2e8f9f7 113 typedef struct
<> 144:ef7eb2e8f9f7 114 {
<> 144:ef7eb2e8f9f7 115 uint32_t Source; /*!< Selects the Trigger source.
<> 151:5eaa88a5bcc7 116 This parameter can be a value of @ref LPTIMEx_Trigger_Source */
<> 144:ef7eb2e8f9f7 117
<> 144:ef7eb2e8f9f7 118 uint32_t ActiveEdge; /*!< Selects the Trigger active edge.
<> 144:ef7eb2e8f9f7 119 Note: This parameter is used only when an external trigger is used.
<> 144:ef7eb2e8f9f7 120 This parameter can be a value of @ref LPTIM_External_Trigger_Polarity */
<> 144:ef7eb2e8f9f7 121
<> 144:ef7eb2e8f9f7 122 uint32_t SampleTime; /*!< Selects the trigger sampling time to configure the clock glitch filter.
<> 144:ef7eb2e8f9f7 123 Note: This parameter is used only when an external trigger is used.
<> 144:ef7eb2e8f9f7 124 This parameter can be a value of @ref LPTIM_Trigger_Sample_Time */
<> 144:ef7eb2e8f9f7 125 }LPTIM_TriggerConfigTypeDef;
<> 144:ef7eb2e8f9f7 126 /**
<> 144:ef7eb2e8f9f7 127 * @}
<> 144:ef7eb2e8f9f7 128 */
<> 144:ef7eb2e8f9f7 129
<> 144:ef7eb2e8f9f7 130 /** @defgroup LPTIM_Init_Configuration LPTIM Initialization configuration structure
<> 144:ef7eb2e8f9f7 131 * @{
<> 144:ef7eb2e8f9f7 132 */
<> 144:ef7eb2e8f9f7 133 /**
<> 144:ef7eb2e8f9f7 134 * @brief LPTIM Initialization Structure definition
<> 144:ef7eb2e8f9f7 135 */
<> 144:ef7eb2e8f9f7 136 typedef struct
<> 144:ef7eb2e8f9f7 137 {
<> 144:ef7eb2e8f9f7 138 LPTIM_ClockConfigTypeDef Clock; /*!< Specifies the clock parameters */
<> 144:ef7eb2e8f9f7 139
<> 144:ef7eb2e8f9f7 140 LPTIM_ULPClockConfigTypeDef UltraLowPowerClock; /*!< Specifies the Ultra Low Power clock parameters */
<> 144:ef7eb2e8f9f7 141
<> 144:ef7eb2e8f9f7 142 LPTIM_TriggerConfigTypeDef Trigger; /*!< Specifies the Trigger parameters */
<> 144:ef7eb2e8f9f7 143
<> 144:ef7eb2e8f9f7 144 uint32_t OutputPolarity; /*!< Specifies the Output polarity.
<> 144:ef7eb2e8f9f7 145 This parameter can be a value of @ref LPTIM_Output_Polarity */
<> 144:ef7eb2e8f9f7 146
<> 144:ef7eb2e8f9f7 147 uint32_t UpdateMode; /*!< Specifies whether the update of the autorelaod and the compare
<> 144:ef7eb2e8f9f7 148 values is done immediately or after the end of current period.
<> 144:ef7eb2e8f9f7 149 This parameter can be a value of @ref LPTIM_Updating_Mode */
<> 144:ef7eb2e8f9f7 150
<> 144:ef7eb2e8f9f7 151 uint32_t CounterSource; /*!< Specifies whether the counter is incremented each internal event
<> 144:ef7eb2e8f9f7 152 or each external event.
<> 144:ef7eb2e8f9f7 153 This parameter can be a value of @ref LPTIM_Counter_Source */
<> 144:ef7eb2e8f9f7 154
<> 144:ef7eb2e8f9f7 155 }LPTIM_InitTypeDef;
<> 144:ef7eb2e8f9f7 156 /**
<> 144:ef7eb2e8f9f7 157 * @}
<> 144:ef7eb2e8f9f7 158 */
<> 144:ef7eb2e8f9f7 159 /** @defgroup LPTIM_State_structure LPTIM state definition
<> 144:ef7eb2e8f9f7 160 * @{
<> 144:ef7eb2e8f9f7 161 */
<> 144:ef7eb2e8f9f7 162 /**
<> 144:ef7eb2e8f9f7 163 * @brief HAL LPTIM State structure definition
<> 144:ef7eb2e8f9f7 164 */
<> 144:ef7eb2e8f9f7 165 typedef enum __HAL_LPTIM_StateTypeDef
<> 144:ef7eb2e8f9f7 166 {
<> 151:5eaa88a5bcc7 167 HAL_LPTIM_STATE_RESET = 0x00U, /*!< Peripheral not yet initialized or disabled */
<> 151:5eaa88a5bcc7 168 HAL_LPTIM_STATE_READY = 0x01U, /*!< Peripheral Initialized and ready for use */
<> 151:5eaa88a5bcc7 169 HAL_LPTIM_STATE_BUSY = 0x02U, /*!< An internal process is ongoing */
<> 151:5eaa88a5bcc7 170 HAL_LPTIM_STATE_TIMEOUT = 0x03U, /*!< Timeout state */
<> 151:5eaa88a5bcc7 171 HAL_LPTIM_STATE_ERROR = 0x04U /*!< Internal Process is ongoing */
<> 144:ef7eb2e8f9f7 172 }HAL_LPTIM_StateTypeDef;
<> 144:ef7eb2e8f9f7 173 /**
<> 144:ef7eb2e8f9f7 174 * @}
<> 144:ef7eb2e8f9f7 175 */
<> 144:ef7eb2e8f9f7 176
<> 144:ef7eb2e8f9f7 177 /** @defgroup LPTIM_Handle LPTIM handler
<> 144:ef7eb2e8f9f7 178 * @{
<> 144:ef7eb2e8f9f7 179 */
<> 144:ef7eb2e8f9f7 180 /**
<> 144:ef7eb2e8f9f7 181 * @brief LPTIM handle Structure definition
<> 144:ef7eb2e8f9f7 182 */
<> 144:ef7eb2e8f9f7 183 typedef struct
<> 144:ef7eb2e8f9f7 184 {
<> 144:ef7eb2e8f9f7 185 LPTIM_TypeDef *Instance; /*!< Register base address */
<> 144:ef7eb2e8f9f7 186
<> 144:ef7eb2e8f9f7 187 LPTIM_InitTypeDef Init; /*!< LPTIM required parameters */
<> 144:ef7eb2e8f9f7 188
<> 144:ef7eb2e8f9f7 189 HAL_StatusTypeDef Status; /*!< LPTIM peripheral status */
<> 144:ef7eb2e8f9f7 190
<> 144:ef7eb2e8f9f7 191 HAL_LockTypeDef Lock; /*!< LPTIM locking object */
<> 144:ef7eb2e8f9f7 192
<> 144:ef7eb2e8f9f7 193 __IO HAL_LPTIM_StateTypeDef State; /*!< LPTIM peripheral state */
<> 144:ef7eb2e8f9f7 194
<> 144:ef7eb2e8f9f7 195 }LPTIM_HandleTypeDef;
<> 144:ef7eb2e8f9f7 196
<> 144:ef7eb2e8f9f7 197 /**
<> 144:ef7eb2e8f9f7 198 * @}
<> 144:ef7eb2e8f9f7 199 */
<> 144:ef7eb2e8f9f7 200 /**
<> 144:ef7eb2e8f9f7 201 * @}
<> 144:ef7eb2e8f9f7 202 */
<> 144:ef7eb2e8f9f7 203
<> 144:ef7eb2e8f9f7 204 /* Exported constants --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 205
<> 144:ef7eb2e8f9f7 206 /** @defgroup LPTIM_Exported_Constants LPTIM Exported constants
<> 144:ef7eb2e8f9f7 207 * @{
<> 144:ef7eb2e8f9f7 208 */
<> 144:ef7eb2e8f9f7 209
<> 144:ef7eb2e8f9f7 210 /* Check autoreload value */
<> 151:5eaa88a5bcc7 211 #define IS_LPTIM_AUTORELOAD(__AUTORELOAD__) ((__AUTORELOAD__) <= 0x0000FFFFU)
<> 144:ef7eb2e8f9f7 212
<> 144:ef7eb2e8f9f7 213 /* Check compare value */
<> 151:5eaa88a5bcc7 214 #define IS_LPTIM_COMPARE(__COMPARE__) ((__COMPARE__) <= 0x0000FFFFU)
<> 144:ef7eb2e8f9f7 215
<> 144:ef7eb2e8f9f7 216 /** @defgroup LPTIM_Clock_Source Clock source
<> 144:ef7eb2e8f9f7 217 * @{
<> 144:ef7eb2e8f9f7 218 */
<> 151:5eaa88a5bcc7 219 #define LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC ((uint32_t)0x00U)
<> 144:ef7eb2e8f9f7 220 #define LPTIM_CLOCKSOURCE_ULPTIM LPTIM_CFGR_CKSEL
<> 144:ef7eb2e8f9f7 221 /**
<> 144:ef7eb2e8f9f7 222 * @}
<> 144:ef7eb2e8f9f7 223 */
<> 144:ef7eb2e8f9f7 224 #define IS_LPTIM_CLOCK_SOURCE(__SOURCE__) (((__SOURCE__) == LPTIM_CLOCKSOURCE_ULPTIM) || \
<> 144:ef7eb2e8f9f7 225 ((__SOURCE__) == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC))
<> 144:ef7eb2e8f9f7 226
<> 144:ef7eb2e8f9f7 227
<> 144:ef7eb2e8f9f7 228 /** @defgroup LPTIM_Clock_Prescaler Prescaler
<> 144:ef7eb2e8f9f7 229 * @{
<> 144:ef7eb2e8f9f7 230 */
<> 151:5eaa88a5bcc7 231 #define LPTIM_PRESCALER_DIV1 ((uint32_t)0x000000U)
<> 144:ef7eb2e8f9f7 232 #define LPTIM_PRESCALER_DIV2 LPTIM_CFGR_PRESC_0
<> 144:ef7eb2e8f9f7 233 #define LPTIM_PRESCALER_DIV4 LPTIM_CFGR_PRESC_1
<> 144:ef7eb2e8f9f7 234 #define LPTIM_PRESCALER_DIV8 ((uint32_t)(LPTIM_CFGR_PRESC_0 | LPTIM_CFGR_PRESC_1))
<> 144:ef7eb2e8f9f7 235 #define LPTIM_PRESCALER_DIV16 LPTIM_CFGR_PRESC_2
<> 144:ef7eb2e8f9f7 236 #define LPTIM_PRESCALER_DIV32 ((uint32_t)(LPTIM_CFGR_PRESC_0 | LPTIM_CFGR_PRESC_2))
<> 144:ef7eb2e8f9f7 237 #define LPTIM_PRESCALER_DIV64 ((uint32_t)(LPTIM_CFGR_PRESC_1 | LPTIM_CFGR_PRESC_2))
<> 144:ef7eb2e8f9f7 238 #define LPTIM_PRESCALER_DIV128 ((uint32_t)LPTIM_CFGR_PRESC)
<> 144:ef7eb2e8f9f7 239 /**
<> 144:ef7eb2e8f9f7 240 * @}
<> 144:ef7eb2e8f9f7 241 */
<> 144:ef7eb2e8f9f7 242
<> 144:ef7eb2e8f9f7 243 #define IS_LPTIM_CLOCK_PRESCALER(__PRESCALER__) (((__PRESCALER__) == LPTIM_PRESCALER_DIV1 ) || \
<> 144:ef7eb2e8f9f7 244 ((__PRESCALER__) == LPTIM_PRESCALER_DIV2 ) || \
<> 144:ef7eb2e8f9f7 245 ((__PRESCALER__) == LPTIM_PRESCALER_DIV4 ) || \
<> 144:ef7eb2e8f9f7 246 ((__PRESCALER__) == LPTIM_PRESCALER_DIV8 ) || \
<> 144:ef7eb2e8f9f7 247 ((__PRESCALER__) == LPTIM_PRESCALER_DIV16 ) || \
<> 144:ef7eb2e8f9f7 248 ((__PRESCALER__) == LPTIM_PRESCALER_DIV32 ) || \
<> 144:ef7eb2e8f9f7 249 ((__PRESCALER__) == LPTIM_PRESCALER_DIV64 ) || \
<> 144:ef7eb2e8f9f7 250 ((__PRESCALER__) == LPTIM_PRESCALER_DIV128))
<> 144:ef7eb2e8f9f7 251
<> 144:ef7eb2e8f9f7 252 #define IS_LPTIM_CLOCK_PRESCALERDIV1(__PRESCALER__) ((__PRESCALER__) == LPTIM_PRESCALER_DIV1)
<> 144:ef7eb2e8f9f7 253
<> 144:ef7eb2e8f9f7 254
<> 144:ef7eb2e8f9f7 255 /** @defgroup LPTIM_Output_Polarity Output polarity
<> 144:ef7eb2e8f9f7 256 * @{
<> 144:ef7eb2e8f9f7 257 */
<> 151:5eaa88a5bcc7 258 #define LPTIM_OUTPUTPOLARITY_HIGH ((uint32_t)0x00000000U)
<> 144:ef7eb2e8f9f7 259 #define LPTIM_OUTPUTPOLARITY_LOW (LPTIM_CFGR_WAVPOL)
<> 144:ef7eb2e8f9f7 260 /**
<> 144:ef7eb2e8f9f7 261 * @}
<> 144:ef7eb2e8f9f7 262 */
<> 144:ef7eb2e8f9f7 263 #define IS_LPTIM_OUTPUT_POLARITY(__POLARITY__) (((__POLARITY__) == LPTIM_OUTPUTPOLARITY_LOW ) || \
<> 144:ef7eb2e8f9f7 264 ((__POLARITY__) == LPTIM_OUTPUTPOLARITY_HIGH))
<> 144:ef7eb2e8f9f7 265
<> 144:ef7eb2e8f9f7 266 /** @defgroup LPTIM_Clock_Sample_Time Clock sample time
<> 144:ef7eb2e8f9f7 267 * @{
<> 144:ef7eb2e8f9f7 268 */
<> 151:5eaa88a5bcc7 269 #define LPTIM_CLOCKSAMPLETIME_DIRECTTRANSITION ((uint32_t)0x00000000U)
<> 144:ef7eb2e8f9f7 270 #define LPTIM_CLOCKSAMPLETIME_2TRANSITIONS LPTIM_CFGR_CKFLT_0
<> 144:ef7eb2e8f9f7 271 #define LPTIM_CLOCKSAMPLETIME_4TRANSITIONS LPTIM_CFGR_CKFLT_1
<> 144:ef7eb2e8f9f7 272 #define LPTIM_CLOCKSAMPLETIME_8TRANSITIONS LPTIM_CFGR_CKFLT
<> 144:ef7eb2e8f9f7 273 /**
<> 144:ef7eb2e8f9f7 274 * @}
<> 144:ef7eb2e8f9f7 275 */
<> 144:ef7eb2e8f9f7 276 #define IS_LPTIM_CLOCK_SAMPLE_TIME(__SAMPLETIME__) (((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_DIRECTTRANSITION) || \
<> 144:ef7eb2e8f9f7 277 ((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_2TRANSITIONS) || \
<> 144:ef7eb2e8f9f7 278 ((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_4TRANSITIONS) || \
<> 144:ef7eb2e8f9f7 279 ((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_8TRANSITIONS))
<> 144:ef7eb2e8f9f7 280
<> 144:ef7eb2e8f9f7 281 /** @defgroup LPTIM_Clock_Polarity Clock polarity
<> 144:ef7eb2e8f9f7 282 * @{
<> 144:ef7eb2e8f9f7 283 */
<> 151:5eaa88a5bcc7 284 #define LPTIM_CLOCKPOLARITY_RISING ((uint32_t)0x00000000U)
<> 144:ef7eb2e8f9f7 285 #define LPTIM_CLOCKPOLARITY_FALLING LPTIM_CFGR_CKPOL_0
<> 144:ef7eb2e8f9f7 286 #define LPTIM_CLOCKPOLARITY_RISING_FALLING LPTIM_CFGR_CKPOL_1
<> 144:ef7eb2e8f9f7 287 /**
<> 144:ef7eb2e8f9f7 288 * @}
<> 144:ef7eb2e8f9f7 289 */
<> 144:ef7eb2e8f9f7 290
<> 144:ef7eb2e8f9f7 291 #define IS_LPTIM_CLOCK_POLARITY(__POLARITY__) (((__POLARITY__) == LPTIM_CLOCKPOLARITY_RISING) || \
<> 144:ef7eb2e8f9f7 292 ((__POLARITY__) == LPTIM_CLOCKPOLARITY_FALLING) || \
<> 144:ef7eb2e8f9f7 293 ((__POLARITY__) == LPTIM_CLOCKPOLARITY_RISING_FALLING))
<> 144:ef7eb2e8f9f7 294
<> 144:ef7eb2e8f9f7 295 /** @defgroup LPTIM_External_Trigger_Polarity Trigger polarity
<> 144:ef7eb2e8f9f7 296 * @{
<> 144:ef7eb2e8f9f7 297 */
<> 144:ef7eb2e8f9f7 298 #define LPTIM_ACTIVEEDGE_RISING LPTIM_CFGR_TRIGEN_0
<> 144:ef7eb2e8f9f7 299 #define LPTIM_ACTIVEEDGE_FALLING LPTIM_CFGR_TRIGEN_1
<> 144:ef7eb2e8f9f7 300 #define LPTIM_ACTIVEEDGE_RISING_FALLING LPTIM_CFGR_TRIGEN
<> 144:ef7eb2e8f9f7 301 /**
<> 144:ef7eb2e8f9f7 302 * @}
<> 144:ef7eb2e8f9f7 303 */
<> 144:ef7eb2e8f9f7 304 #define IS_LPTIM_EXT_TRG_POLARITY(__POLAR__) (((__POLAR__) == LPTIM_ACTIVEEDGE_RISING ) || \
<> 144:ef7eb2e8f9f7 305 ((__POLAR__) == LPTIM_ACTIVEEDGE_FALLING ) || \
<> 144:ef7eb2e8f9f7 306 ((__POLAR__) == LPTIM_ACTIVEEDGE_RISING_FALLING ))
<> 144:ef7eb2e8f9f7 307
<> 144:ef7eb2e8f9f7 308 /** @defgroup LPTIM_Trigger_Sample_Time Trigger sample time
<> 144:ef7eb2e8f9f7 309 * @{
<> 144:ef7eb2e8f9f7 310 */
<> 151:5eaa88a5bcc7 311 #define LPTIM_TRIGSAMPLETIME_DIRECTTRANSITION ((uint32_t)0x00000000U)
<> 144:ef7eb2e8f9f7 312 #define LPTIM_TRIGSAMPLETIME_2TRANSITIONS LPTIM_CFGR_TRGFLT_0
<> 144:ef7eb2e8f9f7 313 #define LPTIM_TRIGSAMPLETIME_4TRANSITIONS LPTIM_CFGR_TRGFLT_1
<> 144:ef7eb2e8f9f7 314 #define LPTIM_TRIGSAMPLETIME_8TRANSITIONS LPTIM_CFGR_TRGFLT
<> 144:ef7eb2e8f9f7 315 /**
<> 144:ef7eb2e8f9f7 316 * @}
<> 144:ef7eb2e8f9f7 317 */
<> 144:ef7eb2e8f9f7 318 #define IS_LPTIM_TRIG_SAMPLE_TIME(__SAMPLETIME__) (((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_DIRECTTRANSITION ) || \
<> 144:ef7eb2e8f9f7 319 ((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_2TRANSITIONS ) || \
<> 144:ef7eb2e8f9f7 320 ((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_4TRANSITIONS ) || \
<> 144:ef7eb2e8f9f7 321 ((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_8TRANSITIONS ))
<> 144:ef7eb2e8f9f7 322
<> 144:ef7eb2e8f9f7 323
<> 144:ef7eb2e8f9f7 324 /** @defgroup LPTIM_Updating_Mode Updating mode
<> 144:ef7eb2e8f9f7 325 * @{
<> 144:ef7eb2e8f9f7 326 */
<> 144:ef7eb2e8f9f7 327
<> 151:5eaa88a5bcc7 328 #define LPTIM_UPDATE_IMMEDIATE ((uint32_t)0x00000000U)
<> 144:ef7eb2e8f9f7 329 #define LPTIM_UPDATE_ENDOFPERIOD LPTIM_CFGR_PRELOAD
<> 144:ef7eb2e8f9f7 330 /**
<> 144:ef7eb2e8f9f7 331 * @}
<> 144:ef7eb2e8f9f7 332 */
<> 144:ef7eb2e8f9f7 333 #define IS_LPTIM_UPDATE_MODE(__MODE__) (((__MODE__) == LPTIM_UPDATE_IMMEDIATE) || \
<> 144:ef7eb2e8f9f7 334 ((__MODE__) == LPTIM_UPDATE_ENDOFPERIOD))
<> 144:ef7eb2e8f9f7 335
<> 144:ef7eb2e8f9f7 336
<> 144:ef7eb2e8f9f7 337
<> 144:ef7eb2e8f9f7 338 /** @defgroup LPTIM_Counter_Source Counter source
<> 144:ef7eb2e8f9f7 339 * @{
<> 144:ef7eb2e8f9f7 340 */
<> 151:5eaa88a5bcc7 341 #define LPTIM_COUNTERSOURCE_INTERNAL ((uint32_t)0x00000000U)
<> 144:ef7eb2e8f9f7 342 #define LPTIM_COUNTERSOURCE_EXTERNAL LPTIM_CFGR_COUNTMODE
<> 144:ef7eb2e8f9f7 343 /**
<> 144:ef7eb2e8f9f7 344 * @}
<> 144:ef7eb2e8f9f7 345 */
<> 144:ef7eb2e8f9f7 346 #define IS_LPTIM_COUNTER_SOURCE(__SOURCE__) (((__SOURCE__) == LPTIM_COUNTERSOURCE_INTERNAL) || \
<> 144:ef7eb2e8f9f7 347 ((__SOURCE__) == LPTIM_COUNTERSOURCE_EXTERNAL))
<> 144:ef7eb2e8f9f7 348
<> 144:ef7eb2e8f9f7 349
<> 144:ef7eb2e8f9f7 350
<> 144:ef7eb2e8f9f7 351 /* Check for period value */
<> 151:5eaa88a5bcc7 352 #define IS_LPTIM_PERIOD(__PERIOD__) ((__PERIOD__) <= 0x0000FFFFU)
<> 144:ef7eb2e8f9f7 353
<> 144:ef7eb2e8f9f7 354 /* Check for pulse value */
<> 151:5eaa88a5bcc7 355 #define IS_LPTIM_PULSE(__PULSE__) ((__PULSE__) <= 0x0000FFFFU)
<> 144:ef7eb2e8f9f7 356
<> 144:ef7eb2e8f9f7 357 /** @defgroup LPTIM_Flag_Definition Flag definition
<> 144:ef7eb2e8f9f7 358 * @{
<> 144:ef7eb2e8f9f7 359 */
<> 144:ef7eb2e8f9f7 360 #define LPTIM_FLAG_DOWN LPTIM_ISR_DOWN
<> 144:ef7eb2e8f9f7 361 #define LPTIM_FLAG_UP LPTIM_ISR_UP
<> 144:ef7eb2e8f9f7 362 #define LPTIM_FLAG_ARROK LPTIM_ISR_ARROK
<> 144:ef7eb2e8f9f7 363 #define LPTIM_FLAG_CMPOK LPTIM_ISR_CMPOK
<> 144:ef7eb2e8f9f7 364 #define LPTIM_FLAG_EXTTRIG LPTIM_ISR_EXTTRIG
<> 144:ef7eb2e8f9f7 365 #define LPTIM_FLAG_ARRM LPTIM_ISR_ARRM
<> 144:ef7eb2e8f9f7 366 #define LPTIM_FLAG_CMPM LPTIM_ISR_CMPM
<> 144:ef7eb2e8f9f7 367 /**
<> 144:ef7eb2e8f9f7 368 * @}
<> 144:ef7eb2e8f9f7 369 */
<> 144:ef7eb2e8f9f7 370
<> 144:ef7eb2e8f9f7 371 /** @defgroup LPTIM_Interrupts_Definition Interrupts definition
<> 144:ef7eb2e8f9f7 372 * @{
<> 144:ef7eb2e8f9f7 373 */
<> 144:ef7eb2e8f9f7 374 #define LPTIM_IT_DOWN LPTIM_IER_DOWNIE
<> 144:ef7eb2e8f9f7 375 #define LPTIM_IT_UP LPTIM_IER_UPIE
<> 144:ef7eb2e8f9f7 376 #define LPTIM_IT_ARROK LPTIM_IER_ARROKIE
<> 144:ef7eb2e8f9f7 377 #define LPTIM_IT_CMPOK LPTIM_IER_CMPOKIE
<> 144:ef7eb2e8f9f7 378 #define LPTIM_IT_EXTTRIG LPTIM_IER_EXTTRIGIE
<> 144:ef7eb2e8f9f7 379 #define LPTIM_IT_ARRM LPTIM_IER_ARRMIE
<> 144:ef7eb2e8f9f7 380 #define LPTIM_IT_CMPM LPTIM_IER_CMPMIE
<> 144:ef7eb2e8f9f7 381 /**
<> 144:ef7eb2e8f9f7 382 * @}
<> 144:ef7eb2e8f9f7 383 */
<> 144:ef7eb2e8f9f7 384
<> 144:ef7eb2e8f9f7 385 /**
<> 144:ef7eb2e8f9f7 386 * @}
<> 144:ef7eb2e8f9f7 387 */
<> 144:ef7eb2e8f9f7 388
<> 144:ef7eb2e8f9f7 389 /* Exported macro ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 390
<> 144:ef7eb2e8f9f7 391 /** @defgroup LPTIM_Exported_Macros LPTIM Exported Macros
<> 144:ef7eb2e8f9f7 392 * @{
<> 144:ef7eb2e8f9f7 393 */
<> 144:ef7eb2e8f9f7 394
<> 144:ef7eb2e8f9f7 395 /** @brief Reset LPTIM handle state
<> 144:ef7eb2e8f9f7 396 * @param __HANDLE__: LPTIM handle
<> 144:ef7eb2e8f9f7 397 * @retval None
<> 144:ef7eb2e8f9f7 398 */
<> 144:ef7eb2e8f9f7 399 #define __HAL_LPTIM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_LPTIM_STATE_RESET)
<> 144:ef7eb2e8f9f7 400
<> 144:ef7eb2e8f9f7 401 /**
<> 144:ef7eb2e8f9f7 402 * @brief Enable/Disable the LPTIM peripheral.
<> 144:ef7eb2e8f9f7 403 * @param __HANDLE__: LPTIM handle
<> 144:ef7eb2e8f9f7 404 * @retval None
<> 144:ef7eb2e8f9f7 405 */
<> 144:ef7eb2e8f9f7 406 #define __HAL_LPTIM_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= (LPTIM_CR_ENABLE))
<> 144:ef7eb2e8f9f7 407 #define __HAL_LPTIM_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(LPTIM_CR_ENABLE))
<> 144:ef7eb2e8f9f7 408
<> 144:ef7eb2e8f9f7 409 /**
<> 144:ef7eb2e8f9f7 410 * @brief Starts the LPTIM peripheral in Continuous or in single mode.
<> 144:ef7eb2e8f9f7 411 * @param __HANDLE__: DMA handle
<> 144:ef7eb2e8f9f7 412 * @retval None
<> 144:ef7eb2e8f9f7 413 */
<> 144:ef7eb2e8f9f7 414 #define __HAL_LPTIM_START_CONTINUOUS(__HANDLE__) ((__HANDLE__)->Instance->CR |= LPTIM_CR_CNTSTRT)
<> 144:ef7eb2e8f9f7 415 #define __HAL_LPTIM_START_SINGLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= LPTIM_CR_SNGSTRT)
<> 144:ef7eb2e8f9f7 416
<> 144:ef7eb2e8f9f7 417
<> 144:ef7eb2e8f9f7 418 /**
<> 144:ef7eb2e8f9f7 419 * @brief Writes the passed parameter in the Autoreload register.
<> 144:ef7eb2e8f9f7 420 * @param __HANDLE__: LPTIM handle
<> 144:ef7eb2e8f9f7 421 * @param __VALUE__ : Autoreload value
<> 144:ef7eb2e8f9f7 422 * @retval None
<> 144:ef7eb2e8f9f7 423 */
<> 144:ef7eb2e8f9f7 424 #define __HAL_LPTIM_AUTORELOAD_SET(__HANDLE__ , __VALUE__) ((__HANDLE__)->Instance->ARR = (__VALUE__))
<> 144:ef7eb2e8f9f7 425
<> 144:ef7eb2e8f9f7 426 /**
<> 144:ef7eb2e8f9f7 427 * @brief Writes the passed parameter in the Compare register.
<> 144:ef7eb2e8f9f7 428 * @param __HANDLE__: LPTIM handle
<> 144:ef7eb2e8f9f7 429 * @param __VALUE__ : Compare value
<> 144:ef7eb2e8f9f7 430 * @retval None
<> 144:ef7eb2e8f9f7 431 */
<> 144:ef7eb2e8f9f7 432 #define __HAL_LPTIM_COMPARE_SET(__HANDLE__ , __VALUE__) ((__HANDLE__)->Instance->CMP = (__VALUE__))
<> 144:ef7eb2e8f9f7 433
<> 144:ef7eb2e8f9f7 434 /**
<> 144:ef7eb2e8f9f7 435 * @brief Checks whether the specified LPTIM flag is set or not.
<> 144:ef7eb2e8f9f7 436 * @param __HANDLE__: LPTIM handle
<> 144:ef7eb2e8f9f7 437 * @param __FLAG__ : LPTIM flag to check
<> 144:ef7eb2e8f9f7 438 * This parameter can be a value of:
<> 144:ef7eb2e8f9f7 439 * @arg LPTIM_FLAG_DOWN : Counter direction change up Flag.
<> 144:ef7eb2e8f9f7 440 * @arg LPTIM_FLAG_UP : Counter direction change down to up Flag.
<> 144:ef7eb2e8f9f7 441 * @arg LPTIM_FLAG_ARROK : Autoreload register update OK Flag.
<> 144:ef7eb2e8f9f7 442 * @arg LPTIM_FLAG_CMPOK : Compare register update OK Flag.
<> 144:ef7eb2e8f9f7 443 * @arg LPTIM_FLAG_EXTTRIG : External trigger edge event Flag.
<> 144:ef7eb2e8f9f7 444 * @arg LPTIM_FLAG_ARRM : Autoreload match Flag.
<> 144:ef7eb2e8f9f7 445 * @arg LPTIM_FLAG_CMPM : Compare match Flag.
<> 144:ef7eb2e8f9f7 446 * @retval The state of the specified flag (SET or RESET).
<> 144:ef7eb2e8f9f7 447 */
<> 144:ef7eb2e8f9f7 448 #define __HAL_LPTIM_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR &(__FLAG__)) == (__FLAG__))
<> 144:ef7eb2e8f9f7 449
<> 144:ef7eb2e8f9f7 450 /**
<> 144:ef7eb2e8f9f7 451 * @brief Clears the specified LPTIM flag.
<> 144:ef7eb2e8f9f7 452 * @param __HANDLE__: LPTIM handle.
<> 144:ef7eb2e8f9f7 453 * @param __FLAG__ : LPTIM flag to clear.
<> 144:ef7eb2e8f9f7 454 * This parameter can be a value of:
<> 144:ef7eb2e8f9f7 455 * @arg LPTIM_FLAG_DOWN : Counter direction change up Flag.
<> 144:ef7eb2e8f9f7 456 * @arg LPTIM_FLAG_UP : Counter direction change down to up Flag.
<> 144:ef7eb2e8f9f7 457 * @arg LPTIM_FLAG_ARROK : Autoreload register update OK Flag.
<> 144:ef7eb2e8f9f7 458 * @arg LPTIM_FLAG_CMPOK : Compare register update OK Flag.
<> 144:ef7eb2e8f9f7 459 * @arg LPTIM_FLAG_EXTTRIG : External trigger edge event Flag.
<> 144:ef7eb2e8f9f7 460 * @arg LPTIM_FLAG_ARRM : Autoreload match Flag.
<> 144:ef7eb2e8f9f7 461 * @arg LPTIM_FLAG_CMPM : Compare match Flag.
<> 144:ef7eb2e8f9f7 462 * @retval None.
<> 144:ef7eb2e8f9f7 463 */
<> 144:ef7eb2e8f9f7 464 #define __HAL_LPTIM_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__))
<> 144:ef7eb2e8f9f7 465
<> 144:ef7eb2e8f9f7 466 /**
<> 144:ef7eb2e8f9f7 467 * @brief Enable the specified LPTIM interrupt.
<> 144:ef7eb2e8f9f7 468 * @param __HANDLE__ : LPTIM handle.
<> 144:ef7eb2e8f9f7 469 * @param __INTERRUPT__ : LPTIM interrupt to set.
<> 144:ef7eb2e8f9f7 470 * This parameter can be a value of:
<> 144:ef7eb2e8f9f7 471 * @arg LPTIM_IT_DOWN : Counter direction change up Interrupt.
<> 144:ef7eb2e8f9f7 472 * @arg LPTIM_IT_UP : Counter direction change down to up Interrupt.
<> 144:ef7eb2e8f9f7 473 * @arg LPTIM_IT_ARROK : Autoreload register update OK Interrupt.
<> 144:ef7eb2e8f9f7 474 * @arg LPTIM_IT_CMPOK : Compare register update OK Interrupt.
<> 144:ef7eb2e8f9f7 475 * @arg LPTIM_IT_EXTTRIG : External trigger edge event Interrupt.
<> 144:ef7eb2e8f9f7 476 * @arg LPTIM_IT_ARRM : Autoreload match Interrupt.
<> 144:ef7eb2e8f9f7 477 * @arg LPTIM_IT_CMPM : Compare match Interrupt.
<> 144:ef7eb2e8f9f7 478 * @retval None.
<> 144:ef7eb2e8f9f7 479 */
<> 144:ef7eb2e8f9f7 480 #define __HAL_LPTIM_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER |= (__INTERRUPT__))
<> 144:ef7eb2e8f9f7 481
<> 144:ef7eb2e8f9f7 482 /**
<> 144:ef7eb2e8f9f7 483 * @brief Disable the specified LPTIM interrupt.
<> 144:ef7eb2e8f9f7 484 * @param __HANDLE__ : LPTIM handle.
<> 144:ef7eb2e8f9f7 485 * @param __INTERRUPT__ : LPTIM interrupt to set.
<> 144:ef7eb2e8f9f7 486 * This parameter can be a value of:
<> 144:ef7eb2e8f9f7 487 * @arg LPTIM_IT_DOWN : Counter direction change up Interrupt.
<> 144:ef7eb2e8f9f7 488 * @arg LPTIM_IT_UP : Counter direction change down to up Interrupt.
<> 144:ef7eb2e8f9f7 489 * @arg LPTIM_IT_ARROK : Autoreload register update OK Interrupt.
<> 144:ef7eb2e8f9f7 490 * @arg LPTIM_IT_CMPOK : Compare register update OK Interrupt.
<> 144:ef7eb2e8f9f7 491 * @arg LPTIM_IT_EXTTRIG : External trigger edge event Interrupt.
<> 144:ef7eb2e8f9f7 492 * @arg LPTIM_IT_ARRM : Autoreload match Interrupt.
<> 144:ef7eb2e8f9f7 493 * @arg LPTIM_IT_CMPM : Compare match Interrupt.
<> 144:ef7eb2e8f9f7 494 * @retval None.
<> 144:ef7eb2e8f9f7 495 */
<> 144:ef7eb2e8f9f7 496 #define __HAL_LPTIM_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER &= (~(__INTERRUPT__)))
<> 144:ef7eb2e8f9f7 497
<> 144:ef7eb2e8f9f7 498 /**
<> 144:ef7eb2e8f9f7 499 * @brief Checks whether the specified LPTIM interrupt is set or not.
<> 144:ef7eb2e8f9f7 500 * @param __HANDLE__ : LPTIM handle.
<> 144:ef7eb2e8f9f7 501 * @param __INTERRUPT__ : LPTIM interrupt to check.
<> 144:ef7eb2e8f9f7 502 * This parameter can be a value of:
<> 144:ef7eb2e8f9f7 503 * @arg LPTIM_IT_DOWN : Counter direction change up Interrupt.
<> 144:ef7eb2e8f9f7 504 * @arg LPTIM_IT_UP : Counter direction change down to up Interrupt.
<> 144:ef7eb2e8f9f7 505 * @arg LPTIM_IT_ARROK : Autoreload register update OK Interrupt.
<> 144:ef7eb2e8f9f7 506 * @arg LPTIM_IT_CMPOK : Compare register update OK Interrupt.
<> 144:ef7eb2e8f9f7 507 * @arg LPTIM_IT_EXTTRIG : External trigger edge event Interrupt.
<> 144:ef7eb2e8f9f7 508 * @arg LPTIM_IT_ARRM : Autoreload match Interrupt.
<> 144:ef7eb2e8f9f7 509 * @arg LPTIM_IT_CMPM : Compare match Interrupt.
<> 144:ef7eb2e8f9f7 510 * @retval Interrupt status.
<> 144:ef7eb2e8f9f7 511 */
<> 144:ef7eb2e8f9f7 512
<> 144:ef7eb2e8f9f7 513 #define __HAL_LPTIM_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IER & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
<> 144:ef7eb2e8f9f7 514
<> 144:ef7eb2e8f9f7 515 /**
<> 151:5eaa88a5bcc7 516 * @brief Enable interrupt on the LPTIM Wake-up Timer associated Exti line.
<> 151:5eaa88a5bcc7 517 * @retval None
<> 151:5eaa88a5bcc7 518 */
<> 151:5eaa88a5bcc7 519 #define __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_IT() (EXTI->IMR |= LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT)
<> 151:5eaa88a5bcc7 520
<> 151:5eaa88a5bcc7 521 /**
<> 151:5eaa88a5bcc7 522 * @brief Disable interrupt on the LPTIM Wake-up Timer associated Exti line.
<> 151:5eaa88a5bcc7 523 * @retval None
<> 151:5eaa88a5bcc7 524 */
<> 151:5eaa88a5bcc7 525 #define __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_IT() (EXTI->IMR &= ~(LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT))
<> 151:5eaa88a5bcc7 526
<> 151:5eaa88a5bcc7 527 /**
<> 151:5eaa88a5bcc7 528 * @brief Enable event on the LPTIM Wake-up Timer associated Exti line.
<> 151:5eaa88a5bcc7 529 * @retval None.
<> 151:5eaa88a5bcc7 530 */
<> 151:5eaa88a5bcc7 531 #define __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_EVENT() (EXTI->EMR |= LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT)
<> 151:5eaa88a5bcc7 532
<> 151:5eaa88a5bcc7 533 /**
<> 151:5eaa88a5bcc7 534 * @brief Disable event on the LPTIM Wake-up Timer associated Exti line.
<> 151:5eaa88a5bcc7 535 * @retval None.
<> 151:5eaa88a5bcc7 536 */
<> 151:5eaa88a5bcc7 537 #define __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_EVENT() (EXTI->EMR &= ~(LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT))
<> 151:5eaa88a5bcc7 538
<> 151:5eaa88a5bcc7 539 /**
<> 151:5eaa88a5bcc7 540 * @brief Enable falling edge trigger on the LPTIM Wake-up Timer associated Exti line.
<> 151:5eaa88a5bcc7 541 * @retval None.
<> 151:5eaa88a5bcc7 542 */
<> 151:5eaa88a5bcc7 543 #define __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_FALLING_EDGE() (EXTI->FTSR |= LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT)
<> 151:5eaa88a5bcc7 544
<> 151:5eaa88a5bcc7 545 /**
<> 151:5eaa88a5bcc7 546 * @brief Disable falling edge trigger on the LPTIM Wake-up Timer associated Exti line.
<> 151:5eaa88a5bcc7 547 * @retval None.
<> 151:5eaa88a5bcc7 548 */
<> 151:5eaa88a5bcc7 549 #define __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_FALLING_EDGE() (EXTI->FTSR &= ~(LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT))
<> 151:5eaa88a5bcc7 550
<> 151:5eaa88a5bcc7 551 /**
<> 151:5eaa88a5bcc7 552 * @brief Enable rising edge trigger on the LPTIM Wake-up Timer associated Exti line.
<> 151:5eaa88a5bcc7 553 * @retval None.
<> 151:5eaa88a5bcc7 554 */
<> 151:5eaa88a5bcc7 555 #define __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_RISING_EDGE() (EXTI->RTSR |= LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT)
<> 151:5eaa88a5bcc7 556
<> 151:5eaa88a5bcc7 557 /**
<> 151:5eaa88a5bcc7 558 * @brief Disable rising edge trigger on the LPTIM Wake-up Timer associated Exti line.
<> 151:5eaa88a5bcc7 559 * @retval None.
<> 151:5eaa88a5bcc7 560 */
<> 151:5eaa88a5bcc7 561 #define __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_RISING_EDGE() (EXTI->RTSR &= ~(LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT))
<> 151:5eaa88a5bcc7 562
<> 151:5eaa88a5bcc7 563 /**
<> 151:5eaa88a5bcc7 564 * @brief Enable rising & falling edge trigger on the LPTIM Wake-up Timer associated Exti line.
<> 151:5eaa88a5bcc7 565 * @retval None.
<> 151:5eaa88a5bcc7 566 */
<> 151:5eaa88a5bcc7 567 #define __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_RISING_FALLING_EDGE() do{__HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_RISING_EDGE();\
<> 151:5eaa88a5bcc7 568 __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_FALLING_EDGE();\
<> 151:5eaa88a5bcc7 569 }while(0)
<> 151:5eaa88a5bcc7 570
<> 151:5eaa88a5bcc7 571 /**
<> 151:5eaa88a5bcc7 572 * @brief Disable rising & falling edge trigger on the LPTIM Wake-up Timer associated Exti line.
<> 151:5eaa88a5bcc7 573 * @retval None.
<> 151:5eaa88a5bcc7 574 */
<> 151:5eaa88a5bcc7 575 #define __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_RISING_FALLING_EDGE() do{__HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_RISING_EDGE();\
<> 151:5eaa88a5bcc7 576 __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_FALLING_EDGE();\
<> 151:5eaa88a5bcc7 577 }while(0)
<> 151:5eaa88a5bcc7 578
<> 151:5eaa88a5bcc7 579 /**
<> 151:5eaa88a5bcc7 580 * @brief Check whether the LPTIM Wake-up Timer associated Exti line interrupt flag is set or not.
<> 151:5eaa88a5bcc7 581 * @retval Line Status.
<> 151:5eaa88a5bcc7 582 */
<> 151:5eaa88a5bcc7 583 #define __HAL_LPTIM_WAKEUPTIMER_EXTI_GET_FLAG() (EXTI->PR & LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT)
<> 151:5eaa88a5bcc7 584
<> 151:5eaa88a5bcc7 585 /**
<> 151:5eaa88a5bcc7 586 * @brief Clear the LPTIM Wake-up Timer associated Exti line flag.
<> 151:5eaa88a5bcc7 587 * @retval None.
<> 151:5eaa88a5bcc7 588 */
<> 151:5eaa88a5bcc7 589 #define __HAL_LPTIM_WAKEUPTIMER_EXTI_CLEAR_FLAG() (EXTI->PR = LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT)
<> 151:5eaa88a5bcc7 590
<> 151:5eaa88a5bcc7 591 /**
<> 151:5eaa88a5bcc7 592 * @brief Generate a Software interrupt on the LPTIM Wake-up Timer associated Exti line.
<> 151:5eaa88a5bcc7 593 * @retval None.
<> 151:5eaa88a5bcc7 594 */
<> 151:5eaa88a5bcc7 595 #define __HAL_LPTIM_WAKEUPTIMER_EXTI_GENERATE_SWIT() (EXTI->SWIER |= LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT)
<> 151:5eaa88a5bcc7 596
<> 151:5eaa88a5bcc7 597 /**
<> 144:ef7eb2e8f9f7 598 * @}
<> 144:ef7eb2e8f9f7 599 */
<> 144:ef7eb2e8f9f7 600
<> 144:ef7eb2e8f9f7 601
<> 144:ef7eb2e8f9f7 602 /* Include LPTIM HAL Extension module */
<> 144:ef7eb2e8f9f7 603 #include "stm32l0xx_hal_lptim_ex.h"
<> 144:ef7eb2e8f9f7 604
<> 144:ef7eb2e8f9f7 605 /* Exported functions --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 606
<> 144:ef7eb2e8f9f7 607 /** @defgroup LPTIM_Exported_Functions LPTIM Exported Functions
<> 144:ef7eb2e8f9f7 608 * @{
<> 144:ef7eb2e8f9f7 609 */
<> 144:ef7eb2e8f9f7 610 /* Initialization/de-initialization functions ********************************/
<> 144:ef7eb2e8f9f7 611
<> 144:ef7eb2e8f9f7 612 /** @defgroup LPTIM_Exported_Functions_Group1 Initialization/de-initialization functions
<> 144:ef7eb2e8f9f7 613 * @{
<> 144:ef7eb2e8f9f7 614 */
<> 144:ef7eb2e8f9f7 615 HAL_StatusTypeDef HAL_LPTIM_Init(LPTIM_HandleTypeDef *hlptim);
<> 144:ef7eb2e8f9f7 616 HAL_StatusTypeDef HAL_LPTIM_DeInit(LPTIM_HandleTypeDef *hlptim);
<> 144:ef7eb2e8f9f7 617
<> 144:ef7eb2e8f9f7 618
<> 144:ef7eb2e8f9f7 619 /* MSP functions *************************************************************/
<> 144:ef7eb2e8f9f7 620
<> 144:ef7eb2e8f9f7 621 void HAL_LPTIM_MspInit(LPTIM_HandleTypeDef *hlptim);
<> 144:ef7eb2e8f9f7 622 void HAL_LPTIM_MspDeInit(LPTIM_HandleTypeDef *hlptim);
<> 144:ef7eb2e8f9f7 623
<> 144:ef7eb2e8f9f7 624 /**
<> 144:ef7eb2e8f9f7 625 * @}
<> 144:ef7eb2e8f9f7 626 */
<> 144:ef7eb2e8f9f7 627
<> 144:ef7eb2e8f9f7 628 /* Start/Stop operation functions *********************************************/
<> 144:ef7eb2e8f9f7 629
<> 144:ef7eb2e8f9f7 630 /** @defgroup LPTIM_Exported_Functions_Group2 LPTIM Start-Stop operation functions
<> 144:ef7eb2e8f9f7 631 * @{
<> 144:ef7eb2e8f9f7 632 */
<> 144:ef7eb2e8f9f7 633
<> 144:ef7eb2e8f9f7 634 /* ################################# PWM Mode ################################*/
<> 144:ef7eb2e8f9f7 635 /* Blocking mode: Polling */
<> 144:ef7eb2e8f9f7 636 HAL_StatusTypeDef HAL_LPTIM_PWM_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse);
<> 144:ef7eb2e8f9f7 637 HAL_StatusTypeDef HAL_LPTIM_PWM_Stop(LPTIM_HandleTypeDef *hlptim);
<> 144:ef7eb2e8f9f7 638 /* Non-Blocking mode: Interrupt */
<> 144:ef7eb2e8f9f7 639 HAL_StatusTypeDef HAL_LPTIM_PWM_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse);
<> 144:ef7eb2e8f9f7 640 HAL_StatusTypeDef HAL_LPTIM_PWM_Stop_IT(LPTIM_HandleTypeDef *hlptim);
<> 144:ef7eb2e8f9f7 641
<> 144:ef7eb2e8f9f7 642 /* ############################# One Pulse Mode ##############################*/
<> 144:ef7eb2e8f9f7 643 /* Blocking mode: Polling */
<> 144:ef7eb2e8f9f7 644 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse);
<> 144:ef7eb2e8f9f7 645 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop(LPTIM_HandleTypeDef *hlptim);
<> 144:ef7eb2e8f9f7 646 /* Non-Blocking mode: Interrupt */
<> 144:ef7eb2e8f9f7 647 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse);
<> 144:ef7eb2e8f9f7 648 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop_IT(LPTIM_HandleTypeDef *hlptim);
<> 144:ef7eb2e8f9f7 649
<> 144:ef7eb2e8f9f7 650 /* ############################## Set once Mode ##############################*/
<> 144:ef7eb2e8f9f7 651 /* Blocking mode: Polling */
<> 144:ef7eb2e8f9f7 652 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse);
<> 144:ef7eb2e8f9f7 653 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop(LPTIM_HandleTypeDef *hlptim);
<> 144:ef7eb2e8f9f7 654 /* Non-Blocking mode: Interrupt */
<> 144:ef7eb2e8f9f7 655 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse);
<> 144:ef7eb2e8f9f7 656 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop_IT(LPTIM_HandleTypeDef *hlptim);
<> 144:ef7eb2e8f9f7 657
<> 144:ef7eb2e8f9f7 658 /* ############################### Encoder Mode ##############################*/
<> 144:ef7eb2e8f9f7 659 /* Blocking mode: Polling */
<> 144:ef7eb2e8f9f7 660 HAL_StatusTypeDef HAL_LPTIM_Encoder_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period);
<> 144:ef7eb2e8f9f7 661 HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop(LPTIM_HandleTypeDef *hlptim);
<> 144:ef7eb2e8f9f7 662 /* Non-Blocking mode: Interrupt */
<> 144:ef7eb2e8f9f7 663 HAL_StatusTypeDef HAL_LPTIM_Encoder_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period);
<> 144:ef7eb2e8f9f7 664 HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop_IT(LPTIM_HandleTypeDef *hlptim);
<> 144:ef7eb2e8f9f7 665
<> 144:ef7eb2e8f9f7 666 /* ############################# Time out Mode ##############################*/
<> 144:ef7eb2e8f9f7 667 /* Blocking mode: Polling */
<> 144:ef7eb2e8f9f7 668 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout);
<> 144:ef7eb2e8f9f7 669 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop(LPTIM_HandleTypeDef *hlptim);
<> 144:ef7eb2e8f9f7 670 /* Non-Blocking mode: Interrupt */
<> 144:ef7eb2e8f9f7 671 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout);
<> 144:ef7eb2e8f9f7 672 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop_IT(LPTIM_HandleTypeDef *hlptim);
<> 144:ef7eb2e8f9f7 673
<> 144:ef7eb2e8f9f7 674 /* ############################## Counter Mode ###############################*/
<> 144:ef7eb2e8f9f7 675 /* Blocking mode: Polling */
<> 144:ef7eb2e8f9f7 676 HAL_StatusTypeDef HAL_LPTIM_Counter_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period);
<> 144:ef7eb2e8f9f7 677 HAL_StatusTypeDef HAL_LPTIM_Counter_Stop(LPTIM_HandleTypeDef *hlptim);
<> 144:ef7eb2e8f9f7 678 /* Non-Blocking mode: Interrupt */
<> 144:ef7eb2e8f9f7 679 HAL_StatusTypeDef HAL_LPTIM_Counter_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period);
<> 144:ef7eb2e8f9f7 680 HAL_StatusTypeDef HAL_LPTIM_Counter_Stop_IT(LPTIM_HandleTypeDef *hlptim);
<> 144:ef7eb2e8f9f7 681
<> 144:ef7eb2e8f9f7 682 /**
<> 144:ef7eb2e8f9f7 683 * @}
<> 144:ef7eb2e8f9f7 684 */
<> 144:ef7eb2e8f9f7 685
<> 144:ef7eb2e8f9f7 686 /* Reading operation functions ************************************************/
<> 144:ef7eb2e8f9f7 687
<> 144:ef7eb2e8f9f7 688 /** @defgroup LPTIM_Exported_Functions_Group3 LPTIM Read operation functions
<> 144:ef7eb2e8f9f7 689 * @{
<> 144:ef7eb2e8f9f7 690 */
<> 144:ef7eb2e8f9f7 691 uint32_t HAL_LPTIM_ReadCounter(LPTIM_HandleTypeDef *hlptim);
<> 144:ef7eb2e8f9f7 692 uint32_t HAL_LPTIM_ReadAutoReload(LPTIM_HandleTypeDef *hlptim);
<> 144:ef7eb2e8f9f7 693 uint32_t HAL_LPTIM_ReadCompare(LPTIM_HandleTypeDef *hlptim);
<> 144:ef7eb2e8f9f7 694 /**
<> 144:ef7eb2e8f9f7 695 * @}
<> 144:ef7eb2e8f9f7 696 */
<> 144:ef7eb2e8f9f7 697
<> 144:ef7eb2e8f9f7 698 /* LPTIM IRQ functions *******************************************************/
<> 144:ef7eb2e8f9f7 699 /** @defgroup LPTIM_Exported_Functions_Group4 LPTIM IRQ handler
<> 144:ef7eb2e8f9f7 700 * @{
<> 144:ef7eb2e8f9f7 701 */
<> 144:ef7eb2e8f9f7 702 void HAL_LPTIM_IRQHandler(LPTIM_HandleTypeDef *hlptim);
<> 144:ef7eb2e8f9f7 703
<> 144:ef7eb2e8f9f7 704 /* CallBack functions ********************************************************/
<> 144:ef7eb2e8f9f7 705 void HAL_LPTIM_CompareMatchCallback(LPTIM_HandleTypeDef *hlptim);
<> 144:ef7eb2e8f9f7 706 void HAL_LPTIM_AutoReloadMatchCallback(LPTIM_HandleTypeDef *hlptim);
<> 144:ef7eb2e8f9f7 707 void HAL_LPTIM_TriggerCallback(LPTIM_HandleTypeDef *hlptim);
<> 144:ef7eb2e8f9f7 708 void HAL_LPTIM_CompareWriteCallback(LPTIM_HandleTypeDef *hlptim);
<> 144:ef7eb2e8f9f7 709 void HAL_LPTIM_AutoReloadWriteCallback(LPTIM_HandleTypeDef *hlptim);
<> 144:ef7eb2e8f9f7 710 void HAL_LPTIM_DirectionUpCallback(LPTIM_HandleTypeDef *hlptim);
<> 144:ef7eb2e8f9f7 711 void HAL_LPTIM_DirectionDownCallback(LPTIM_HandleTypeDef *hlptim);
<> 144:ef7eb2e8f9f7 712 /**
<> 144:ef7eb2e8f9f7 713 * @}
<> 144:ef7eb2e8f9f7 714 */
<> 144:ef7eb2e8f9f7 715 /* Peripheral State functions ************************************************/
<> 144:ef7eb2e8f9f7 716 /** @defgroup LPTIM_Exported_Functions_Group5 Peripheral State functions
<> 144:ef7eb2e8f9f7 717 * @{
<> 144:ef7eb2e8f9f7 718 */
<> 144:ef7eb2e8f9f7 719
<> 144:ef7eb2e8f9f7 720 HAL_LPTIM_StateTypeDef HAL_LPTIM_GetState(LPTIM_HandleTypeDef *hlptim);
<> 144:ef7eb2e8f9f7 721
<> 144:ef7eb2e8f9f7 722 /**
<> 144:ef7eb2e8f9f7 723 * @}
<> 144:ef7eb2e8f9f7 724 */
<> 144:ef7eb2e8f9f7 725
<> 144:ef7eb2e8f9f7 726 /**
<> 144:ef7eb2e8f9f7 727 * @}
<> 144:ef7eb2e8f9f7 728 */
<> 144:ef7eb2e8f9f7 729
<> 144:ef7eb2e8f9f7 730 /**
<> 144:ef7eb2e8f9f7 731 * @}
<> 144:ef7eb2e8f9f7 732 */
<> 144:ef7eb2e8f9f7 733
<> 144:ef7eb2e8f9f7 734 /**
<> 144:ef7eb2e8f9f7 735 * @}
<> 144:ef7eb2e8f9f7 736 */
<> 144:ef7eb2e8f9f7 737
<> 144:ef7eb2e8f9f7 738 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 739 }
<> 144:ef7eb2e8f9f7 740 #endif
<> 144:ef7eb2e8f9f7 741
<> 144:ef7eb2e8f9f7 742 #endif /* __STM32L0xx_HAL_LPTIM_H */
<> 144:ef7eb2e8f9f7 743
<> 144:ef7eb2e8f9f7 744 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
<> 144:ef7eb2e8f9f7 745