mbed-STM32L452

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targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_rtc.c@182:59ec31722650, 2017-12-15 (annotated)

Committer:: Frederick_H
Date:: Fri Dec 15 08:17:23 2017 +0000
Revision:: 182:59ec31722650
Parent:: 167:e84263d55307

Modify hal_tick.h of TARGET_STM32L476xG

Who changed what in which revision?

User	Revision	Line number	New contents of line
<>	144:ef7eb2e8f9f7	1	/**
<>	144:ef7eb2e8f9f7	2	******************************************************************************
<>	144:ef7eb2e8f9f7	3	* @file stm32f4xx_hal_rtc.c
<>	144:ef7eb2e8f9f7	4	* @author MCD Application Team
AnnaBridge	167:e84263d55307	5	* @version V1.7.1
AnnaBridge	167:e84263d55307	6	* @date 14-April-2017
<>	144:ef7eb2e8f9f7	7	* @brief RTC HAL module driver.
<>	144:ef7eb2e8f9f7	8	* This file provides firmware functions to manage the following
<>	144:ef7eb2e8f9f7	9	* functionalities of the Real Time Clock (RTC) peripheral:
<>	144:ef7eb2e8f9f7	10	* + Initialization and de-initialization functions
<>	144:ef7eb2e8f9f7	11	* + RTC Time and Date functions
<>	144:ef7eb2e8f9f7	12	* + RTC Alarm functions
<>	144:ef7eb2e8f9f7	13	* + Peripheral Control functions
<>	144:ef7eb2e8f9f7	14	* + Peripheral State functions
<>	144:ef7eb2e8f9f7	15	*
<>	144:ef7eb2e8f9f7	16	@verbatim
<>	144:ef7eb2e8f9f7	17	==============================================================================
<>	144:ef7eb2e8f9f7	18	##### Backup Domain Operating Condition #####
<>	144:ef7eb2e8f9f7	19	==============================================================================
<>	144:ef7eb2e8f9f7	20	[..] The real-time clock (RTC), the RTC backup registers, and the backup
<>	144:ef7eb2e8f9f7	21	SRAM (BKP SRAM) can be powered from the VBAT voltage when the main
<>	144:ef7eb2e8f9f7	22	VDD supply is powered off.
<>	144:ef7eb2e8f9f7	23	To retain the content of the RTC backup registers, backup SRAM, and supply
<>	144:ef7eb2e8f9f7	24	the RTC when VDD is turned off, VBAT pin can be connected to an optional
<>	144:ef7eb2e8f9f7	25	standby voltage supplied by a battery or by another source.
<>	144:ef7eb2e8f9f7	26
<>	144:ef7eb2e8f9f7	27	[..] To allow the RTC operating even when the main digital supply (VDD) is turned
<>	144:ef7eb2e8f9f7	28	off, the VBAT pin powers the following blocks:
<>	144:ef7eb2e8f9f7	29	(#) The RTC
<>	144:ef7eb2e8f9f7	30	(#) The LSE oscillator
<>	144:ef7eb2e8f9f7	31	(#) The backup SRAM when the low power backup regulator is enabled
<>	144:ef7eb2e8f9f7	32	(#) PC13 to PC15 I/Os, plus PI8 I/O (when available)
<>	144:ef7eb2e8f9f7	33
<>	144:ef7eb2e8f9f7	34	[..] When the backup domain is supplied by VDD (analog switch connected to VDD),
<>	144:ef7eb2e8f9f7	35	the following pins are available:
<>	144:ef7eb2e8f9f7	36	(#) PC14 and PC15 can be used as either GPIO or LSE pins
<>	144:ef7eb2e8f9f7	37	(#) PC13 can be used as a GPIO or as the RTC_AF1 pin
<>	144:ef7eb2e8f9f7	38	(#) PI8 can be used as a GPIO or as the RTC_AF2 pin
<>	144:ef7eb2e8f9f7	39
<>	144:ef7eb2e8f9f7	40	[..] When the backup domain is supplied by VBAT (analog switch connected to VBAT
<>	144:ef7eb2e8f9f7	41	because VDD is not present), the following pins are available:
<>	144:ef7eb2e8f9f7	42	(#) PC14 and PC15 can be used as LSE pins only
<>	144:ef7eb2e8f9f7	43	(#) PC13 can be used as the RTC_AF1 pin
<>	144:ef7eb2e8f9f7	44	(#) PI8 can be used as the RTC_AF2 pin
<>	144:ef7eb2e8f9f7	45
<>	144:ef7eb2e8f9f7	46	##### Backup Domain Reset #####
<>	144:ef7eb2e8f9f7	47	==================================================================
<>	144:ef7eb2e8f9f7	48	[..] The backup domain reset sets all RTC registers and the RCC_BDCR register
<>	144:ef7eb2e8f9f7	49	to their reset values. The BKPSRAM is not affected by this reset. The only
<>	144:ef7eb2e8f9f7	50	way to reset the BKPSRAM is through the Flash interface by requesting
<>	144:ef7eb2e8f9f7	51	a protection level change from 1 to 0.
<>	144:ef7eb2e8f9f7	52	[..] A backup domain reset is generated when one of the following events occurs:
<>	144:ef7eb2e8f9f7	53	(#) Software reset, triggered by setting the BDRST bit in the
<>	144:ef7eb2e8f9f7	54	RCC Backup domain control register (RCC_BDCR).
<>	144:ef7eb2e8f9f7	55	(#) VDD or VBAT power on, if both supplies have previously been powered off.
<>	144:ef7eb2e8f9f7	56
<>	144:ef7eb2e8f9f7	57	##### Backup Domain Access #####
<>	144:ef7eb2e8f9f7	58	==================================================================
<>	144:ef7eb2e8f9f7	59	[..] After reset, the backup domain (RTC registers, RTC backup data
<>	144:ef7eb2e8f9f7	60	registers and backup SRAM) is protected against possible unwanted write
<>	144:ef7eb2e8f9f7	61	accesses.
<>	144:ef7eb2e8f9f7	62	[..] To enable access to the RTC Domain and RTC registers, proceed as follows:
<>	144:ef7eb2e8f9f7	63	(+) Enable the Power Controller (PWR) APB1 interface clock using the
<>	144:ef7eb2e8f9f7	64	__HAL_RCC_PWR_CLK_ENABLE() function.
<>	144:ef7eb2e8f9f7	65	(+) Enable access to RTC domain using the HAL_PWR_EnableBkUpAccess() function.
<>	144:ef7eb2e8f9f7	66	(+) Select the RTC clock source using the __HAL_RCC_RTC_CONFIG() function.
<>	144:ef7eb2e8f9f7	67	(+) Enable RTC Clock using the __HAL_RCC_RTC_ENABLE() function.
<>	144:ef7eb2e8f9f7	68
<>	144:ef7eb2e8f9f7	69
<>	144:ef7eb2e8f9f7	70	##### How to use this driver #####
<>	144:ef7eb2e8f9f7	71	==================================================================
<>	144:ef7eb2e8f9f7	72	[..]
<>	144:ef7eb2e8f9f7	73	(+) Enable the RTC domain access (see description in the section above).
<>	144:ef7eb2e8f9f7	74	(+) Configure the RTC Prescaler (Asynchronous and Synchronous) and RTC hour
<>	144:ef7eb2e8f9f7	75	format using the HAL_RTC_Init() function.
<>	144:ef7eb2e8f9f7	76
<>	144:ef7eb2e8f9f7	77	* Time and Date configuration *
<>	144:ef7eb2e8f9f7	78	===================================
<>	144:ef7eb2e8f9f7	79	[..]
<>	144:ef7eb2e8f9f7	80	(+) To configure the RTC Calendar (Time and Date) use the HAL_RTC_SetTime()
<>	144:ef7eb2e8f9f7	81	and HAL_RTC_SetDate() functions.
<>	144:ef7eb2e8f9f7	82	(+) To read the RTC Calendar, use the HAL_RTC_GetTime() and HAL_RTC_GetDate() functions.
<>	144:ef7eb2e8f9f7	83
<>	144:ef7eb2e8f9f7	84	* Alarm configuration *
<>	144:ef7eb2e8f9f7	85	===========================
<>	144:ef7eb2e8f9f7	86	[..]
<>	144:ef7eb2e8f9f7	87	(+) To configure the RTC Alarm use the HAL_RTC_SetAlarm() function.
<>	144:ef7eb2e8f9f7	88	You can also configure the RTC Alarm with interrupt mode using the HAL_RTC_SetAlarm_IT() function.
<>	144:ef7eb2e8f9f7	89	(+) To read the RTC Alarm, use the HAL_RTC_GetAlarm() function.
<>	144:ef7eb2e8f9f7	90
<>	144:ef7eb2e8f9f7	91	##### RTC and low power modes #####
<>	144:ef7eb2e8f9f7	92	==================================================================
<>	144:ef7eb2e8f9f7	93	[..] The MCU can be woken up from a low power mode by an RTC alternate
<>	144:ef7eb2e8f9f7	94	function.
<>	144:ef7eb2e8f9f7	95	[..] The RTC alternate functions are the RTC alarms (Alarm A and Alarm B),
<>	144:ef7eb2e8f9f7	96	RTC wake-up, RTC tamper event detection and RTC time stamp event detection.
<>	144:ef7eb2e8f9f7	97	These RTC alternate functions can wake up the system from the Stop and
<>	144:ef7eb2e8f9f7	98	Standby low power modes.
<>	144:ef7eb2e8f9f7	99	[..] The system can also wake up from low power modes without depending
<>	144:ef7eb2e8f9f7	100	on an external interrupt (Auto-wake-up mode), by using the RTC alarm
<>	144:ef7eb2e8f9f7	101	or the RTC wake-up events.
<>	144:ef7eb2e8f9f7	102	[..] The RTC provides a programmable time base for waking up from the
<>	144:ef7eb2e8f9f7	103	Stop or Standby mode at regular intervals.
<>	144:ef7eb2e8f9f7	104	Wake-up from STOP and STANDBY modes is possible only when the RTC clock source
<>	144:ef7eb2e8f9f7	105	is LSE or LSI.
<>	144:ef7eb2e8f9f7	106
<>	144:ef7eb2e8f9f7	107	@endverbatim
<>	144:ef7eb2e8f9f7	108	******************************************************************************
<>	144:ef7eb2e8f9f7	109	* @attention
<>	144:ef7eb2e8f9f7	110	*
AnnaBridge	167:e84263d55307	111	* <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
<>	144:ef7eb2e8f9f7	112	*
<>	144:ef7eb2e8f9f7	113	* Redistribution and use in source and binary forms, with or without modification,
<>	144:ef7eb2e8f9f7	114	* are permitted provided that the following conditions are met:
<>	144:ef7eb2e8f9f7	115	* 1. Redistributions of source code must retain the above copyright notice,
<>	144:ef7eb2e8f9f7	116	* this list of conditions and the following disclaimer.
<>	144:ef7eb2e8f9f7	117	* 2. Redistributions in binary form must reproduce the above copyright notice,
<>	144:ef7eb2e8f9f7	118	* this list of conditions and the following disclaimer in the documentation
<>	144:ef7eb2e8f9f7	119	* and/or other materials provided with the distribution.
<>	144:ef7eb2e8f9f7	120	* 3. Neither the name of STMicroelectronics nor the names of its contributors
<>	144:ef7eb2e8f9f7	121	* may be used to endorse or promote products derived from this software
<>	144:ef7eb2e8f9f7	122	* without specific prior written permission.
<>	144:ef7eb2e8f9f7	123	*
<>	144:ef7eb2e8f9f7	124	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<>	144:ef7eb2e8f9f7	125	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<>	144:ef7eb2e8f9f7	126	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<>	144:ef7eb2e8f9f7	127	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<>	144:ef7eb2e8f9f7	128	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<>	144:ef7eb2e8f9f7	129	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<>	144:ef7eb2e8f9f7	130	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<>	144:ef7eb2e8f9f7	131	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<>	144:ef7eb2e8f9f7	132	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<>	144:ef7eb2e8f9f7	133	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<>	144:ef7eb2e8f9f7	134	*
<>	144:ef7eb2e8f9f7	135	******************************************************************************
<>	144:ef7eb2e8f9f7	136	*/
<>	144:ef7eb2e8f9f7	137
<>	144:ef7eb2e8f9f7	138	/* Includes ------------------------------------------------------------------*/
<>	144:ef7eb2e8f9f7	139	#include "stm32f4xx_hal.h"
<>	144:ef7eb2e8f9f7	140
<>	144:ef7eb2e8f9f7	141	/** @addtogroup STM32F4xx_HAL_Driver
<>	144:ef7eb2e8f9f7	142	* @{
<>	144:ef7eb2e8f9f7	143	*/
<>	144:ef7eb2e8f9f7	144
<>	144:ef7eb2e8f9f7	145	/** @defgroup RTC RTC
<>	144:ef7eb2e8f9f7	146	* @brief RTC HAL module driver
<>	144:ef7eb2e8f9f7	147	* @{
<>	144:ef7eb2e8f9f7	148	*/
<>	144:ef7eb2e8f9f7	149
<>	144:ef7eb2e8f9f7	150	#ifdef HAL_RTC_MODULE_ENABLED
<>	144:ef7eb2e8f9f7	151
<>	144:ef7eb2e8f9f7	152	/* Private typedef -----------------------------------------------------------*/
<>	144:ef7eb2e8f9f7	153	/* Private define ------------------------------------------------------------*/
<>	144:ef7eb2e8f9f7	154	/* Private macro -------------------------------------------------------------*/
<>	144:ef7eb2e8f9f7	155	/* Private variables ---------------------------------------------------------*/
<>	144:ef7eb2e8f9f7	156	/* Private function prototypes -----------------------------------------------*/
<>	144:ef7eb2e8f9f7	157	/* Private functions ---------------------------------------------------------*/
<>	144:ef7eb2e8f9f7	158
<>	144:ef7eb2e8f9f7	159	/** @defgroup RTC_Exported_Functions RTC Exported Functions
<>	144:ef7eb2e8f9f7	160	* @{
<>	144:ef7eb2e8f9f7	161	*/
<>	144:ef7eb2e8f9f7	162
<>	144:ef7eb2e8f9f7	163	/** @defgroup RTC_Exported_Functions_Group1 Initialization and de-initialization functions
<>	144:ef7eb2e8f9f7	164	* @brief Initialization and Configuration functions
<>	144:ef7eb2e8f9f7	165	*
<>	144:ef7eb2e8f9f7	166	@verbatim
<>	144:ef7eb2e8f9f7	167	===============================================================================
<>	144:ef7eb2e8f9f7	168	##### Initialization and de-initialization functions #####
<>	144:ef7eb2e8f9f7	169	===============================================================================
<>	144:ef7eb2e8f9f7	170	[..] This section provides functions allowing to initialize and configure the
<>	144:ef7eb2e8f9f7	171	RTC Prescaler (Synchronous and Asynchronous), RTC Hour format, disable
<>	144:ef7eb2e8f9f7	172	RTC registers Write protection, enter and exit the RTC initialization mode,
<>	144:ef7eb2e8f9f7	173	RTC registers synchronization check and reference clock detection enable.
<>	144:ef7eb2e8f9f7	174	(#) The RTC Prescaler is programmed to generate the RTC 1Hz time base.
<>	144:ef7eb2e8f9f7	175	It is split into 2 programmable prescalers to minimize power consumption.
<>	144:ef7eb2e8f9f7	176	(++) A 7-bit asynchronous prescaler and a 13-bit synchronous prescaler.
<>	144:ef7eb2e8f9f7	177	(++) When both prescalers are used, it is recommended to configure the
<>	144:ef7eb2e8f9f7	178	asynchronous prescaler to a high value to minimize power consumption.
<>	144:ef7eb2e8f9f7	179	(#) All RTC registers are Write protected. Writing to the RTC registers
<>	144:ef7eb2e8f9f7	180	is enabled by writing a key into the Write Protection register, RTC_WPR.
<>	144:ef7eb2e8f9f7	181	(#) To configure the RTC Calendar, user application should enter
<>	144:ef7eb2e8f9f7	182	initialization mode. In this mode, the calendar counter is stopped
<>	144:ef7eb2e8f9f7	183	and its value can be updated. When the initialization sequence is
<>	144:ef7eb2e8f9f7	184	complete, the calendar restarts counting after 4 RTCCLK cycles.
<>	144:ef7eb2e8f9f7	185	(#) To read the calendar through the shadow registers after Calendar
<>	144:ef7eb2e8f9f7	186	initialization, calendar update or after wake-up from low power modes
<>	144:ef7eb2e8f9f7	187	the software must first clear the RSF flag. The software must then
<>	144:ef7eb2e8f9f7	188	wait until it is set again before reading the calendar, which means
<>	144:ef7eb2e8f9f7	189	that the calendar registers have been correctly copied into the
<>	144:ef7eb2e8f9f7	190	RTC_TR and RTC_DR shadow registers.The HAL_RTC_WaitForSynchro() function
<>	144:ef7eb2e8f9f7	191	implements the above software sequence (RSF clear and RSF check).
<>	144:ef7eb2e8f9f7	192
<>	144:ef7eb2e8f9f7	193	@endverbatim
<>	144:ef7eb2e8f9f7	194	* @{
<>	144:ef7eb2e8f9f7	195	*/
<>	144:ef7eb2e8f9f7	196
<>	144:ef7eb2e8f9f7	197	/**
<>	144:ef7eb2e8f9f7	198	* @brief Initializes the RTC peripheral
<>	144:ef7eb2e8f9f7	199	* @param hrtc: pointer to a RTC_HandleTypeDef structure that contains
<>	144:ef7eb2e8f9f7	200	* the configuration information for RTC.
<>	144:ef7eb2e8f9f7	201	* @retval HAL status
<>	144:ef7eb2e8f9f7	202	*/
<>	144:ef7eb2e8f9f7	203	HAL_StatusTypeDef HAL_RTC_Init(RTC_HandleTypeDef *hrtc)
<>	144:ef7eb2e8f9f7	204	{
<>	144:ef7eb2e8f9f7	205	/* Check the RTC peripheral state */
<>	144:ef7eb2e8f9f7	206	if(hrtc == NULL)
<>	144:ef7eb2e8f9f7	207	{
<>	144:ef7eb2e8f9f7	208	return HAL_ERROR;
<>	144:ef7eb2e8f9f7	209	}
<>	144:ef7eb2e8f9f7	210
<>	144:ef7eb2e8f9f7	211	/* Check the parameters */
<>	144:ef7eb2e8f9f7	212	assert_param(IS_RTC_HOUR_FORMAT(hrtc->Init.HourFormat));
<>	144:ef7eb2e8f9f7	213	assert_param(IS_RTC_ASYNCH_PREDIV(hrtc->Init.AsynchPrediv));
<>	144:ef7eb2e8f9f7	214	assert_param(IS_RTC_SYNCH_PREDIV(hrtc->Init.SynchPrediv));
<>	144:ef7eb2e8f9f7	215	assert_param (IS_RTC_OUTPUT(hrtc->Init.OutPut));
<>	144:ef7eb2e8f9f7	216	assert_param (IS_RTC_OUTPUT_POL(hrtc->Init.OutPutPolarity));
<>	144:ef7eb2e8f9f7	217	assert_param(IS_RTC_OUTPUT_TYPE(hrtc->Init.OutPutType));
<>	144:ef7eb2e8f9f7	218
<>	144:ef7eb2e8f9f7	219	if(hrtc->State == HAL_RTC_STATE_RESET)
<>	144:ef7eb2e8f9f7	220	{
<>	144:ef7eb2e8f9f7	221	/* Allocate lock resource and initialize it */
<>	144:ef7eb2e8f9f7	222	hrtc->Lock = HAL_UNLOCKED;
<>	144:ef7eb2e8f9f7	223	/* Initialize RTC MSP */
<>	144:ef7eb2e8f9f7	224	HAL_RTC_MspInit(hrtc);
<>	144:ef7eb2e8f9f7	225	}
<>	144:ef7eb2e8f9f7	226
<>	144:ef7eb2e8f9f7	227	/* Set RTC state */
<>	144:ef7eb2e8f9f7	228	hrtc->State = HAL_RTC_STATE_BUSY;
<>	144:ef7eb2e8f9f7	229
<>	144:ef7eb2e8f9f7	230	/* Disable the write protection for RTC registers */
<>	144:ef7eb2e8f9f7	231	__HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
<>	144:ef7eb2e8f9f7	232
<>	144:ef7eb2e8f9f7	233	/* Set Initialization mode */
<>	144:ef7eb2e8f9f7	234	if(RTC_EnterInitMode(hrtc) != HAL_OK)
<>	144:ef7eb2e8f9f7	235	{
<>	144:ef7eb2e8f9f7	236	/* Enable the write protection for RTC registers */
<>	144:ef7eb2e8f9f7	237	__HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<>	144:ef7eb2e8f9f7	238
<>	144:ef7eb2e8f9f7	239	/* Set RTC state */
<>	144:ef7eb2e8f9f7	240	hrtc->State = HAL_RTC_STATE_ERROR;
<>	144:ef7eb2e8f9f7	241
<>	144:ef7eb2e8f9f7	242	return HAL_ERROR;
<>	144:ef7eb2e8f9f7	243	}
<>	144:ef7eb2e8f9f7	244	else
<>	144:ef7eb2e8f9f7	245	{
<>	144:ef7eb2e8f9f7	246	/* Clear RTC_CR FMT, OSEL and POL Bits */
<>	144:ef7eb2e8f9f7	247	hrtc->Instance->CR &= ((uint32_t)~(RTC_CR_FMT \| RTC_CR_OSEL \| RTC_CR_POL));
<>	144:ef7eb2e8f9f7	248	/* Set RTC_CR register */
<>	144:ef7eb2e8f9f7	249	hrtc->Instance->CR \|= (uint32_t)(hrtc->Init.HourFormat \| hrtc->Init.OutPut \| hrtc->Init.OutPutPolarity);
<>	144:ef7eb2e8f9f7	250
<>	144:ef7eb2e8f9f7	251	/* Configure the RTC PRER */
<>	144:ef7eb2e8f9f7	252	hrtc->Instance->PRER = (uint32_t)(hrtc->Init.SynchPrediv);
<>	144:ef7eb2e8f9f7	253	hrtc->Instance->PRER \|= (uint32_t)(hrtc->Init.AsynchPrediv << 16U);
<>	144:ef7eb2e8f9f7	254
<>	144:ef7eb2e8f9f7	255	/* Exit Initialization mode */
<>	144:ef7eb2e8f9f7	256	hrtc->Instance->ISR &= (uint32_t)~RTC_ISR_INIT;
<>	144:ef7eb2e8f9f7	257
<>	144:ef7eb2e8f9f7	258	hrtc->Instance->TAFCR &= (uint32_t)~RTC_TAFCR_ALARMOUTTYPE;
<>	144:ef7eb2e8f9f7	259	hrtc->Instance->TAFCR \|= (uint32_t)(hrtc->Init.OutPutType);
<>	144:ef7eb2e8f9f7	260
<>	144:ef7eb2e8f9f7	261	/* Enable the write protection for RTC registers */
<>	144:ef7eb2e8f9f7	262	__HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<>	144:ef7eb2e8f9f7	263
<>	144:ef7eb2e8f9f7	264	/* Set RTC state */
<>	144:ef7eb2e8f9f7	265	hrtc->State = HAL_RTC_STATE_READY;
<>	144:ef7eb2e8f9f7	266
<>	144:ef7eb2e8f9f7	267	return HAL_OK;
<>	144:ef7eb2e8f9f7	268	}
<>	144:ef7eb2e8f9f7	269	}
<>	144:ef7eb2e8f9f7	270
<>	144:ef7eb2e8f9f7	271	/**
<>	144:ef7eb2e8f9f7	272	* @brief DeInitializes the RTC peripheral
<>	144:ef7eb2e8f9f7	273	* @param hrtc: pointer to a RTC_HandleTypeDef structure that contains
<>	144:ef7eb2e8f9f7	274	* the configuration information for RTC.
<>	144:ef7eb2e8f9f7	275	* @note This function doesn't reset the RTC Backup Data registers.
<>	144:ef7eb2e8f9f7	276	* @retval HAL status
<>	144:ef7eb2e8f9f7	277	*/
<>	144:ef7eb2e8f9f7	278	HAL_StatusTypeDef HAL_RTC_DeInit(RTC_HandleTypeDef *hrtc)
<>	144:ef7eb2e8f9f7	279	{
<>	144:ef7eb2e8f9f7	280	uint32_t tickstart = 0U;
<>	144:ef7eb2e8f9f7	281
<>	144:ef7eb2e8f9f7	282	/* Set RTC state */
<>	144:ef7eb2e8f9f7	283	hrtc->State = HAL_RTC_STATE_BUSY;
<>	144:ef7eb2e8f9f7	284
<>	144:ef7eb2e8f9f7	285	/* Disable the write protection for RTC registers */
<>	144:ef7eb2e8f9f7	286	__HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
<>	144:ef7eb2e8f9f7	287
<>	144:ef7eb2e8f9f7	288	/* Set Initialization mode */
<>	144:ef7eb2e8f9f7	289	if(RTC_EnterInitMode(hrtc) != HAL_OK)
<>	144:ef7eb2e8f9f7	290	{
<>	144:ef7eb2e8f9f7	291	/* Enable the write protection for RTC registers */
<>	144:ef7eb2e8f9f7	292	__HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<>	144:ef7eb2e8f9f7	293
<>	144:ef7eb2e8f9f7	294	/* Set RTC state */
<>	144:ef7eb2e8f9f7	295	hrtc->State = HAL_RTC_STATE_ERROR;
<>	144:ef7eb2e8f9f7	296
<>	144:ef7eb2e8f9f7	297	return HAL_ERROR;
<>	144:ef7eb2e8f9f7	298	}
<>	144:ef7eb2e8f9f7	299	else
<>	144:ef7eb2e8f9f7	300	{
<>	144:ef7eb2e8f9f7	301	/* Reset TR, DR and CR registers */
AnnaBridge	167:e84263d55307	302	hrtc->Instance->TR = 0x00000000U;
AnnaBridge	167:e84263d55307	303	hrtc->Instance->DR = 0x00002101U;
<>	144:ef7eb2e8f9f7	304	/* Reset All CR bits except CR[2:0] */
AnnaBridge	167:e84263d55307	305	hrtc->Instance->CR &= 0x00000007U;
<>	144:ef7eb2e8f9f7	306
<>	144:ef7eb2e8f9f7	307	/* Get tick */
<>	144:ef7eb2e8f9f7	308	tickstart = HAL_GetTick();
<>	144:ef7eb2e8f9f7	309
<>	144:ef7eb2e8f9f7	310	/* Wait till WUTWF flag is set and if Time out is reached exit */
<>	144:ef7eb2e8f9f7	311	while(((hrtc->Instance->ISR) & RTC_ISR_WUTWF) == (uint32_t)RESET)
<>	144:ef7eb2e8f9f7	312	{
<>	144:ef7eb2e8f9f7	313	if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE)
<>	144:ef7eb2e8f9f7	314	{
<>	144:ef7eb2e8f9f7	315	/* Enable the write protection for RTC registers */
<>	144:ef7eb2e8f9f7	316	__HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<>	144:ef7eb2e8f9f7	317
<>	144:ef7eb2e8f9f7	318	/* Set RTC state */
<>	144:ef7eb2e8f9f7	319	hrtc->State = HAL_RTC_STATE_TIMEOUT;
<>	144:ef7eb2e8f9f7	320
<>	144:ef7eb2e8f9f7	321	return HAL_TIMEOUT;
<>	144:ef7eb2e8f9f7	322	}
<>	144:ef7eb2e8f9f7	323	}
<>	144:ef7eb2e8f9f7	324
<>	144:ef7eb2e8f9f7	325	/* Reset all RTC CR register bits */
AnnaBridge	167:e84263d55307	326	hrtc->Instance->CR &= 0x00000000U;
AnnaBridge	167:e84263d55307	327	hrtc->Instance->WUTR = 0x0000FFFFU;
AnnaBridge	167:e84263d55307	328	hrtc->Instance->PRER = 0x007F00FFU;
AnnaBridge	167:e84263d55307	329	hrtc->Instance->CALIBR = 0x00000000U;
AnnaBridge	167:e84263d55307	330	hrtc->Instance->ALRMAR = 0x00000000U;
AnnaBridge	167:e84263d55307	331	hrtc->Instance->ALRMBR = 0x00000000U;
AnnaBridge	167:e84263d55307	332	hrtc->Instance->SHIFTR = 0x00000000U;
AnnaBridge	167:e84263d55307	333	hrtc->Instance->CALR = 0x00000000U;
AnnaBridge	167:e84263d55307	334	hrtc->Instance->ALRMASSR = 0x00000000U;
AnnaBridge	167:e84263d55307	335	hrtc->Instance->ALRMBSSR = 0x00000000U;
<>	144:ef7eb2e8f9f7	336
<>	144:ef7eb2e8f9f7	337	/* Reset ISR register and exit initialization mode */
AnnaBridge	167:e84263d55307	338	hrtc->Instance->ISR = 0x00000000U;
<>	144:ef7eb2e8f9f7	339
<>	144:ef7eb2e8f9f7	340	/* Reset Tamper and alternate functions configuration register */
<>	144:ef7eb2e8f9f7	341	hrtc->Instance->TAFCR = 0x00000000U;
<>	144:ef7eb2e8f9f7	342
<>	144:ef7eb2e8f9f7	343	/* If RTC_CR_BYPSHAD bit = 0, wait for synchro else this check is not needed */
<>	144:ef7eb2e8f9f7	344	if((hrtc->Instance->CR & RTC_CR_BYPSHAD) == RESET)
<>	144:ef7eb2e8f9f7	345	{
<>	144:ef7eb2e8f9f7	346	if(HAL_RTC_WaitForSynchro(hrtc) != HAL_OK)
<>	144:ef7eb2e8f9f7	347	{
<>	144:ef7eb2e8f9f7	348	/* Enable the write protection for RTC registers */
<>	144:ef7eb2e8f9f7	349	__HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<>	144:ef7eb2e8f9f7	350
<>	144:ef7eb2e8f9f7	351	hrtc->State = HAL_RTC_STATE_ERROR;
<>	144:ef7eb2e8f9f7	352
<>	144:ef7eb2e8f9f7	353	return HAL_ERROR;
<>	144:ef7eb2e8f9f7	354	}
<>	144:ef7eb2e8f9f7	355	}
<>	144:ef7eb2e8f9f7	356	}
<>	144:ef7eb2e8f9f7	357
<>	144:ef7eb2e8f9f7	358	/* Enable the write protection for RTC registers */
<>	144:ef7eb2e8f9f7	359	__HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<>	144:ef7eb2e8f9f7	360
<>	144:ef7eb2e8f9f7	361	/* De-Initialize RTC MSP */
<>	144:ef7eb2e8f9f7	362	HAL_RTC_MspDeInit(hrtc);
<>	144:ef7eb2e8f9f7	363
<>	144:ef7eb2e8f9f7	364	hrtc->State = HAL_RTC_STATE_RESET;
<>	144:ef7eb2e8f9f7	365
<>	144:ef7eb2e8f9f7	366	/* Release Lock */
<>	144:ef7eb2e8f9f7	367	__HAL_UNLOCK(hrtc);
<>	144:ef7eb2e8f9f7	368
<>	144:ef7eb2e8f9f7	369	return HAL_OK;
<>	144:ef7eb2e8f9f7	370	}
<>	144:ef7eb2e8f9f7	371
<>	144:ef7eb2e8f9f7	372	/**
<>	144:ef7eb2e8f9f7	373	* @brief Initializes the RTC MSP.
<>	144:ef7eb2e8f9f7	374	* @param hrtc: pointer to a RTC_HandleTypeDef structure that contains
<>	144:ef7eb2e8f9f7	375	* the configuration information for RTC.
<>	144:ef7eb2e8f9f7	376	* @retval None
<>	144:ef7eb2e8f9f7	377	*/
<>	144:ef7eb2e8f9f7	378	__weak void HAL_RTC_MspInit(RTC_HandleTypeDef* hrtc)
<>	144:ef7eb2e8f9f7	379	{
<>	144:ef7eb2e8f9f7	380	/* Prevent unused argument(s) compilation warning */
<>	144:ef7eb2e8f9f7	381	UNUSED(hrtc);
<>	144:ef7eb2e8f9f7	382	/* NOTE : This function Should not be modified, when the callback is needed,
<>	144:ef7eb2e8f9f7	383	the HAL_RTC_MspInit could be implemented in the user file
<>	144:ef7eb2e8f9f7	384	*/
<>	144:ef7eb2e8f9f7	385	}
<>	144:ef7eb2e8f9f7	386
<>	144:ef7eb2e8f9f7	387	/**
<>	144:ef7eb2e8f9f7	388	* @brief DeInitializes the RTC MSP.
<>	144:ef7eb2e8f9f7	389	* @param hrtc: pointer to a RTC_HandleTypeDef structure that contains
<>	144:ef7eb2e8f9f7	390	* the configuration information for RTC.
<>	144:ef7eb2e8f9f7	391	* @retval None
<>	144:ef7eb2e8f9f7	392	*/
<>	144:ef7eb2e8f9f7	393	__weak void HAL_RTC_MspDeInit(RTC_HandleTypeDef* hrtc)
<>	144:ef7eb2e8f9f7	394	{
<>	144:ef7eb2e8f9f7	395	/* Prevent unused argument(s) compilation warning */
<>	144:ef7eb2e8f9f7	396	UNUSED(hrtc);
<>	144:ef7eb2e8f9f7	397	/* NOTE : This function Should not be modified, when the callback is needed,
<>	144:ef7eb2e8f9f7	398	the HAL_RTC_MspDeInit could be implemented in the user file
<>	144:ef7eb2e8f9f7	399	*/
<>	144:ef7eb2e8f9f7	400	}
<>	144:ef7eb2e8f9f7	401
<>	144:ef7eb2e8f9f7	402	/**
<>	144:ef7eb2e8f9f7	403	* @}
<>	144:ef7eb2e8f9f7	404	*/
<>	144:ef7eb2e8f9f7	405
<>	144:ef7eb2e8f9f7	406	/** @defgroup RTC_Exported_Functions_Group2 RTC Time and Date functions
<>	144:ef7eb2e8f9f7	407	* @brief RTC Time and Date functions
<>	144:ef7eb2e8f9f7	408	*
<>	144:ef7eb2e8f9f7	409	@verbatim
<>	144:ef7eb2e8f9f7	410	===============================================================================
<>	144:ef7eb2e8f9f7	411	##### RTC Time and Date functions #####
<>	144:ef7eb2e8f9f7	412	===============================================================================
<>	144:ef7eb2e8f9f7	413
<>	144:ef7eb2e8f9f7	414	[..] This section provides functions allowing to configure Time and Date features
<>	144:ef7eb2e8f9f7	415
<>	144:ef7eb2e8f9f7	416	@endverbatim
<>	144:ef7eb2e8f9f7	417	* @{
<>	144:ef7eb2e8f9f7	418	*/
<>	144:ef7eb2e8f9f7	419
<>	144:ef7eb2e8f9f7	420	/**
<>	144:ef7eb2e8f9f7	421	* @brief Sets RTC current time.
<>	144:ef7eb2e8f9f7	422	* @param hrtc: pointer to a RTC_HandleTypeDef structure that contains
<>	144:ef7eb2e8f9f7	423	* the configuration information for RTC.
<>	144:ef7eb2e8f9f7	424	* @param sTime: Pointer to Time structure
<>	144:ef7eb2e8f9f7	425	* @param Format: Specifies the format of the entered parameters.
<>	144:ef7eb2e8f9f7	426	* This parameter can be one of the following values:
<>	144:ef7eb2e8f9f7	427	* @arg RTC_FORMAT_BIN: Binary data format
<>	144:ef7eb2e8f9f7	428	* @arg RTC_FORMAT_BCD: BCD data format
<>	144:ef7eb2e8f9f7	429	* @retval HAL status
<>	144:ef7eb2e8f9f7	430	*/
<>	144:ef7eb2e8f9f7	431	HAL_StatusTypeDef HAL_RTC_SetTime(RTC_HandleTypeDef hrtc, RTC_TimeTypeDef sTime, uint32_t Format)
<>	144:ef7eb2e8f9f7	432	{
<>	144:ef7eb2e8f9f7	433	uint32_t tmpreg = 0U;
<>	144:ef7eb2e8f9f7	434
<>	144:ef7eb2e8f9f7	435	/* Check the parameters */
<>	144:ef7eb2e8f9f7	436	assert_param(IS_RTC_FORMAT(Format));
<>	144:ef7eb2e8f9f7	437	assert_param(IS_RTC_DAYLIGHT_SAVING(sTime->DayLightSaving));
<>	144:ef7eb2e8f9f7	438	assert_param(IS_RTC_STORE_OPERATION(sTime->StoreOperation));
<>	144:ef7eb2e8f9f7	439
<>	144:ef7eb2e8f9f7	440	/* Process Locked */
<>	144:ef7eb2e8f9f7	441	__HAL_LOCK(hrtc);
<>	144:ef7eb2e8f9f7	442
<>	144:ef7eb2e8f9f7	443	hrtc->State = HAL_RTC_STATE_BUSY;
<>	144:ef7eb2e8f9f7	444
<>	144:ef7eb2e8f9f7	445	if(Format == RTC_FORMAT_BIN)
<>	144:ef7eb2e8f9f7	446	{
<>	144:ef7eb2e8f9f7	447	if((hrtc->Instance->CR & RTC_CR_FMT) != (uint32_t)RESET)
<>	144:ef7eb2e8f9f7	448	{
<>	144:ef7eb2e8f9f7	449	assert_param(IS_RTC_HOUR12(sTime->Hours));
<>	144:ef7eb2e8f9f7	450	assert_param(IS_RTC_HOURFORMAT12(sTime->TimeFormat));
<>	144:ef7eb2e8f9f7	451	}
<>	144:ef7eb2e8f9f7	452	else
<>	144:ef7eb2e8f9f7	453	{
<>	144:ef7eb2e8f9f7	454	sTime->TimeFormat = 0x00U;
<>	144:ef7eb2e8f9f7	455	assert_param(IS_RTC_HOUR24(sTime->Hours));
<>	144:ef7eb2e8f9f7	456	}
<>	144:ef7eb2e8f9f7	457	assert_param(IS_RTC_MINUTES(sTime->Minutes));
<>	144:ef7eb2e8f9f7	458	assert_param(IS_RTC_SECONDS(sTime->Seconds));
<>	144:ef7eb2e8f9f7	459
<>	144:ef7eb2e8f9f7	460	tmpreg = (uint32_t)(((uint32_t)RTC_ByteToBcd2(sTime->Hours) << 16U) \| \
<>	144:ef7eb2e8f9f7	461	((uint32_t)RTC_ByteToBcd2(sTime->Minutes) << 8U) \| \
<>	144:ef7eb2e8f9f7	462	((uint32_t)RTC_ByteToBcd2(sTime->Seconds)) \| \
<>	144:ef7eb2e8f9f7	463	(((uint32_t)sTime->TimeFormat) << 16U));
<>	144:ef7eb2e8f9f7	464	}
<>	144:ef7eb2e8f9f7	465	else
<>	144:ef7eb2e8f9f7	466	{
<>	144:ef7eb2e8f9f7	467	if((hrtc->Instance->CR & RTC_CR_FMT) != (uint32_t)RESET)
<>	144:ef7eb2e8f9f7	468	{
<>	144:ef7eb2e8f9f7	469	tmpreg = RTC_Bcd2ToByte(sTime->Hours);
<>	144:ef7eb2e8f9f7	470	assert_param(IS_RTC_HOUR12(tmpreg));
<>	144:ef7eb2e8f9f7	471	assert_param(IS_RTC_HOURFORMAT12(sTime->TimeFormat));
<>	144:ef7eb2e8f9f7	472	}
<>	144:ef7eb2e8f9f7	473	else
<>	144:ef7eb2e8f9f7	474	{
<>	144:ef7eb2e8f9f7	475	sTime->TimeFormat = 0x00U;
<>	144:ef7eb2e8f9f7	476	assert_param(IS_RTC_HOUR24(RTC_Bcd2ToByte(sTime->Hours)));
<>	144:ef7eb2e8f9f7	477	}
<>	144:ef7eb2e8f9f7	478	assert_param(IS_RTC_MINUTES(RTC_Bcd2ToByte(sTime->Minutes)));
<>	144:ef7eb2e8f9f7	479	assert_param(IS_RTC_SECONDS(RTC_Bcd2ToByte(sTime->Seconds)));
<>	144:ef7eb2e8f9f7	480	tmpreg = (((uint32_t)(sTime->Hours) << 16U) \| \
<>	144:ef7eb2e8f9f7	481	((uint32_t)(sTime->Minutes) << 8U) \| \
<>	144:ef7eb2e8f9f7	482	((uint32_t)sTime->Seconds) \| \
<>	144:ef7eb2e8f9f7	483	((uint32_t)(sTime->TimeFormat) << 16U));
<>	144:ef7eb2e8f9f7	484	}
<>	144:ef7eb2e8f9f7	485
<>	144:ef7eb2e8f9f7	486	/* Disable the write protection for RTC registers */
<>	144:ef7eb2e8f9f7	487	__HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
<>	144:ef7eb2e8f9f7	488
<>	144:ef7eb2e8f9f7	489	/* Set Initialization mode */
<>	144:ef7eb2e8f9f7	490	if(RTC_EnterInitMode(hrtc) != HAL_OK)
<>	144:ef7eb2e8f9f7	491	{
<>	144:ef7eb2e8f9f7	492	/* Enable the write protection for RTC registers */
<>	144:ef7eb2e8f9f7	493	__HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<>	144:ef7eb2e8f9f7	494
<>	144:ef7eb2e8f9f7	495	/* Set RTC state */
<>	144:ef7eb2e8f9f7	496	hrtc->State = HAL_RTC_STATE_ERROR;
<>	144:ef7eb2e8f9f7	497
<>	144:ef7eb2e8f9f7	498	/* Process Unlocked */
<>	144:ef7eb2e8f9f7	499	__HAL_UNLOCK(hrtc);
<>	144:ef7eb2e8f9f7	500
<>	144:ef7eb2e8f9f7	501	return HAL_ERROR;
<>	144:ef7eb2e8f9f7	502	}
<>	144:ef7eb2e8f9f7	503	else
<>	144:ef7eb2e8f9f7	504	{
<>	144:ef7eb2e8f9f7	505	/* Set the RTC_TR register */
<>	144:ef7eb2e8f9f7	506	hrtc->Instance->TR = (uint32_t)(tmpreg & RTC_TR_RESERVED_MASK);
<>	144:ef7eb2e8f9f7	507
<>	144:ef7eb2e8f9f7	508	/* Clear the bits to be configured */
<>	144:ef7eb2e8f9f7	509	hrtc->Instance->CR &= (uint32_t)~RTC_CR_BCK;
<>	144:ef7eb2e8f9f7	510
<>	144:ef7eb2e8f9f7	511	/* Configure the RTC_CR register */
<>	144:ef7eb2e8f9f7	512	hrtc->Instance->CR \|= (uint32_t)(sTime->DayLightSaving \| sTime->StoreOperation);
<>	144:ef7eb2e8f9f7	513
<>	144:ef7eb2e8f9f7	514	/* Exit Initialization mode */
<>	144:ef7eb2e8f9f7	515	hrtc->Instance->ISR &= (uint32_t)~RTC_ISR_INIT;
<>	144:ef7eb2e8f9f7	516
<>	144:ef7eb2e8f9f7	517	/* If CR_BYPSHAD bit = 0, wait for synchro else this check is not needed */
<>	144:ef7eb2e8f9f7	518	if((hrtc->Instance->CR & RTC_CR_BYPSHAD) == RESET)
<>	144:ef7eb2e8f9f7	519	{
<>	144:ef7eb2e8f9f7	520	if(HAL_RTC_WaitForSynchro(hrtc) != HAL_OK)
<>	144:ef7eb2e8f9f7	521	{
<>	144:ef7eb2e8f9f7	522	/* Enable the write protection for RTC registers */
<>	144:ef7eb2e8f9f7	523	__HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<>	144:ef7eb2e8f9f7	524
<>	144:ef7eb2e8f9f7	525	hrtc->State = HAL_RTC_STATE_ERROR;
<>	144:ef7eb2e8f9f7	526
<>	144:ef7eb2e8f9f7	527	/* Process Unlocked */
<>	144:ef7eb2e8f9f7	528	__HAL_UNLOCK(hrtc);
<>	144:ef7eb2e8f9f7	529
<>	144:ef7eb2e8f9f7	530	return HAL_ERROR;
<>	144:ef7eb2e8f9f7	531	}
<>	144:ef7eb2e8f9f7	532	}
<>	144:ef7eb2e8f9f7	533
<>	144:ef7eb2e8f9f7	534	/* Enable the write protection for RTC registers */
<>	144:ef7eb2e8f9f7	535	__HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<>	144:ef7eb2e8f9f7	536
<>	144:ef7eb2e8f9f7	537	hrtc->State = HAL_RTC_STATE_READY;
<>	144:ef7eb2e8f9f7	538
<>	144:ef7eb2e8f9f7	539	__HAL_UNLOCK(hrtc);
<>	144:ef7eb2e8f9f7	540
<>	144:ef7eb2e8f9f7	541	return HAL_OK;
<>	144:ef7eb2e8f9f7	542	}
<>	144:ef7eb2e8f9f7	543	}
<>	144:ef7eb2e8f9f7	544
<>	144:ef7eb2e8f9f7	545	/**
<>	144:ef7eb2e8f9f7	546	* @brief Gets RTC current time.
<>	144:ef7eb2e8f9f7	547	* @param hrtc: pointer to a RTC_HandleTypeDef structure that contains
<>	144:ef7eb2e8f9f7	548	* the configuration information for RTC.
<>	144:ef7eb2e8f9f7	549	* @param sTime: Pointer to Time structure
<>	144:ef7eb2e8f9f7	550	* @param Format: Specifies the format of the entered parameters.
<>	144:ef7eb2e8f9f7	551	* This parameter can be one of the following values:
<>	144:ef7eb2e8f9f7	552	* @arg RTC_FORMAT_BIN: Binary data format
<>	144:ef7eb2e8f9f7	553	* @arg RTC_FORMAT_BCD: BCD data format
<>	144:ef7eb2e8f9f7	554	* @note You can use SubSeconds and SecondFraction (sTime structure fields returned) to convert SubSeconds
<>	144:ef7eb2e8f9f7	555	* value in second fraction ratio with time unit following generic formula:
<>	144:ef7eb2e8f9f7	556	* Second fraction ratio * time_unit= [(SecondFraction-SubSeconds)/(SecondFraction+1)] * time_unit
<>	144:ef7eb2e8f9f7	557	* This conversion can be performed only if no shift operation is pending (ie. SHFP=0) when PREDIV_S >= SS
<>	144:ef7eb2e8f9f7	558	* @note You must call HAL_RTC_GetDate() after HAL_RTC_GetTime() to unlock the values
<>	144:ef7eb2e8f9f7	559	* in the higher-order calendar shadow registers to ensure consistency between the time and date values.
<>	144:ef7eb2e8f9f7	560	* Reading RTC current time locks the values in calendar shadow registers until current date is read.
<>	144:ef7eb2e8f9f7	561	* @retval HAL status
<>	144:ef7eb2e8f9f7	562	*/
<>	144:ef7eb2e8f9f7	563	HAL_StatusTypeDef HAL_RTC_GetTime(RTC_HandleTypeDef hrtc, RTC_TimeTypeDef sTime, uint32_t Format)
<>	144:ef7eb2e8f9f7	564	{
<>	144:ef7eb2e8f9f7	565	uint32_t tmpreg = 0U;
<>	144:ef7eb2e8f9f7	566
<>	144:ef7eb2e8f9f7	567	/* Check the parameters */
<>	144:ef7eb2e8f9f7	568	assert_param(IS_RTC_FORMAT(Format));
<>	144:ef7eb2e8f9f7	569
<>	144:ef7eb2e8f9f7	570	/* Get subseconds structure field from the corresponding register */
<>	144:ef7eb2e8f9f7	571	sTime->SubSeconds = (uint32_t)(hrtc->Instance->SSR);
<>	144:ef7eb2e8f9f7	572
<>	144:ef7eb2e8f9f7	573	/* Get SecondFraction structure field from the corresponding register field*/
<>	144:ef7eb2e8f9f7	574	sTime->SecondFraction = (uint32_t)(hrtc->Instance->PRER & RTC_PRER_PREDIV_S);
<>	144:ef7eb2e8f9f7	575
<>	144:ef7eb2e8f9f7	576	/* Get the TR register */
<>	144:ef7eb2e8f9f7	577	tmpreg = (uint32_t)(hrtc->Instance->TR & RTC_TR_RESERVED_MASK);
<>	144:ef7eb2e8f9f7	578
<>	144:ef7eb2e8f9f7	579	/* Fill the structure fields with the read parameters */
<>	144:ef7eb2e8f9f7	580	sTime->Hours = (uint8_t)((tmpreg & (RTC_TR_HT \| RTC_TR_HU)) >> 16U);
AnnaBridge	167:e84263d55307	581	sTime->Minutes = (uint8_t)((tmpreg & (RTC_TR_MNT \| RTC_TR_MNU)) >> 8U);
<>	144:ef7eb2e8f9f7	582	sTime->Seconds = (uint8_t)(tmpreg & (RTC_TR_ST \| RTC_TR_SU));
<>	144:ef7eb2e8f9f7	583	sTime->TimeFormat = (uint8_t)((tmpreg & (RTC_TR_PM)) >> 16U);
<>	144:ef7eb2e8f9f7	584
<>	144:ef7eb2e8f9f7	585	/* Check the input parameters format */
<>	144:ef7eb2e8f9f7	586	if(Format == RTC_FORMAT_BIN)
<>	144:ef7eb2e8f9f7	587	{
<>	144:ef7eb2e8f9f7	588	/* Convert the time structure parameters to Binary format */
<>	144:ef7eb2e8f9f7	589	sTime->Hours = (uint8_t)RTC_Bcd2ToByte(sTime->Hours);
<>	144:ef7eb2e8f9f7	590	sTime->Minutes = (uint8_t)RTC_Bcd2ToByte(sTime->Minutes);
<>	144:ef7eb2e8f9f7	591	sTime->Seconds = (uint8_t)RTC_Bcd2ToByte(sTime->Seconds);
<>	144:ef7eb2e8f9f7	592	}
<>	144:ef7eb2e8f9f7	593
<>	144:ef7eb2e8f9f7	594	return HAL_OK;
<>	144:ef7eb2e8f9f7	595	}
<>	144:ef7eb2e8f9f7	596
<>	144:ef7eb2e8f9f7	597	/**
<>	144:ef7eb2e8f9f7	598	* @brief Sets RTC current date.
<>	144:ef7eb2e8f9f7	599	* @param hrtc: pointer to a RTC_HandleTypeDef structure that contains
<>	144:ef7eb2e8f9f7	600	* the configuration information for RTC.
<>	144:ef7eb2e8f9f7	601	* @param sDate: Pointer to date structure
<>	144:ef7eb2e8f9f7	602	* @param Format: specifies the format of the entered parameters.
<>	144:ef7eb2e8f9f7	603	* This parameter can be one of the following values:
<>	144:ef7eb2e8f9f7	604	* @arg RTC_FORMAT_BIN: Binary data format
<>	144:ef7eb2e8f9f7	605	* @arg RTC_FORMAT_BCD: BCD data format
<>	144:ef7eb2e8f9f7	606	* @retval HAL status
<>	144:ef7eb2e8f9f7	607	*/
<>	144:ef7eb2e8f9f7	608	HAL_StatusTypeDef HAL_RTC_SetDate(RTC_HandleTypeDef hrtc, RTC_DateTypeDef sDate, uint32_t Format)
<>	144:ef7eb2e8f9f7	609	{
<>	144:ef7eb2e8f9f7	610	uint32_t datetmpreg = 0U;
<>	144:ef7eb2e8f9f7	611
<>	144:ef7eb2e8f9f7	612	/* Check the parameters */
<>	144:ef7eb2e8f9f7	613	assert_param(IS_RTC_FORMAT(Format));
<>	144:ef7eb2e8f9f7	614
<>	144:ef7eb2e8f9f7	615	/* Process Locked */
<>	144:ef7eb2e8f9f7	616	__HAL_LOCK(hrtc);
<>	144:ef7eb2e8f9f7	617
<>	144:ef7eb2e8f9f7	618	hrtc->State = HAL_RTC_STATE_BUSY;
<>	144:ef7eb2e8f9f7	619
<>	144:ef7eb2e8f9f7	620	if((Format == RTC_FORMAT_BIN) && ((sDate->Month & 0x10U) == 0x10U))
<>	144:ef7eb2e8f9f7	621	{
<>	144:ef7eb2e8f9f7	622	sDate->Month = (uint8_t)((sDate->Month & (uint8_t)~(0x10U)) + (uint8_t)0x0AU);
<>	144:ef7eb2e8f9f7	623	}
<>	144:ef7eb2e8f9f7	624
<>	144:ef7eb2e8f9f7	625	assert_param(IS_RTC_WEEKDAY(sDate->WeekDay));
<>	144:ef7eb2e8f9f7	626
<>	144:ef7eb2e8f9f7	627	if(Format == RTC_FORMAT_BIN)
<>	144:ef7eb2e8f9f7	628	{
<>	144:ef7eb2e8f9f7	629	assert_param(IS_RTC_YEAR(sDate->Year));
<>	144:ef7eb2e8f9f7	630	assert_param(IS_RTC_MONTH(sDate->Month));
<>	144:ef7eb2e8f9f7	631	assert_param(IS_RTC_DATE(sDate->Date));
<>	144:ef7eb2e8f9f7	632
<>	144:ef7eb2e8f9f7	633	datetmpreg = (((uint32_t)RTC_ByteToBcd2(sDate->Year) << 16U) \| \
<>	144:ef7eb2e8f9f7	634	((uint32_t)RTC_ByteToBcd2(sDate->Month) << 8U) \| \
<>	144:ef7eb2e8f9f7	635	((uint32_t)RTC_ByteToBcd2(sDate->Date)) \| \
<>	144:ef7eb2e8f9f7	636	((uint32_t)sDate->WeekDay << 13U));
<>	144:ef7eb2e8f9f7	637	}
<>	144:ef7eb2e8f9f7	638	else
<>	144:ef7eb2e8f9f7	639	{
<>	144:ef7eb2e8f9f7	640	assert_param(IS_RTC_YEAR(RTC_Bcd2ToByte(sDate->Year)));
<>	144:ef7eb2e8f9f7	641	datetmpreg = RTC_Bcd2ToByte(sDate->Month);
<>	144:ef7eb2e8f9f7	642	assert_param(IS_RTC_MONTH(datetmpreg));
<>	144:ef7eb2e8f9f7	643	datetmpreg = RTC_Bcd2ToByte(sDate->Date);
<>	144:ef7eb2e8f9f7	644	assert_param(IS_RTC_DATE(datetmpreg));
<>	144:ef7eb2e8f9f7	645
<>	144:ef7eb2e8f9f7	646	datetmpreg = ((((uint32_t)sDate->Year) << 16U) \| \
<>	144:ef7eb2e8f9f7	647	(((uint32_t)sDate->Month) << 8U) \| \
<>	144:ef7eb2e8f9f7	648	((uint32_t)sDate->Date) \| \
<>	144:ef7eb2e8f9f7	649	(((uint32_t)sDate->WeekDay) << 13U));
<>	144:ef7eb2e8f9f7	650	}
<>	144:ef7eb2e8f9f7	651
<>	144:ef7eb2e8f9f7	652	/* Disable the write protection for RTC registers */
<>	144:ef7eb2e8f9f7	653	__HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
<>	144:ef7eb2e8f9f7	654
<>	144:ef7eb2e8f9f7	655	/* Set Initialization mode */
<>	144:ef7eb2e8f9f7	656	if(RTC_EnterInitMode(hrtc) != HAL_OK)
<>	144:ef7eb2e8f9f7	657	{
<>	144:ef7eb2e8f9f7	658	/* Enable the write protection for RTC registers */
<>	144:ef7eb2e8f9f7	659	__HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<>	144:ef7eb2e8f9f7	660
<>	144:ef7eb2e8f9f7	661	/* Set RTC state*/
<>	144:ef7eb2e8f9f7	662	hrtc->State = HAL_RTC_STATE_ERROR;
<>	144:ef7eb2e8f9f7	663
<>	144:ef7eb2e8f9f7	664	/* Process Unlocked */
<>	144:ef7eb2e8f9f7	665	__HAL_UNLOCK(hrtc);
<>	144:ef7eb2e8f9f7	666
<>	144:ef7eb2e8f9f7	667	return HAL_ERROR;
<>	144:ef7eb2e8f9f7	668	}
<>	144:ef7eb2e8f9f7	669	else
<>	144:ef7eb2e8f9f7	670	{
<>	144:ef7eb2e8f9f7	671	/* Set the RTC_DR register */
<>	144:ef7eb2e8f9f7	672	hrtc->Instance->DR = (uint32_t)(datetmpreg & RTC_DR_RESERVED_MASK);
<>	144:ef7eb2e8f9f7	673
<>	144:ef7eb2e8f9f7	674	/* Exit Initialization mode */
<>	144:ef7eb2e8f9f7	675	hrtc->Instance->ISR &= (uint32_t)~RTC_ISR_INIT;
<>	144:ef7eb2e8f9f7	676
<>	144:ef7eb2e8f9f7	677	/* If CR_BYPSHAD bit = 0, wait for synchro else this check is not needed */
<>	144:ef7eb2e8f9f7	678	if((hrtc->Instance->CR & RTC_CR_BYPSHAD) == RESET)
<>	144:ef7eb2e8f9f7	679	{
<>	144:ef7eb2e8f9f7	680	if(HAL_RTC_WaitForSynchro(hrtc) != HAL_OK)
<>	144:ef7eb2e8f9f7	681	{
<>	144:ef7eb2e8f9f7	682	/* Enable the write protection for RTC registers */
<>	144:ef7eb2e8f9f7	683	__HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<>	144:ef7eb2e8f9f7	684
<>	144:ef7eb2e8f9f7	685	hrtc->State = HAL_RTC_STATE_ERROR;
<>	144:ef7eb2e8f9f7	686
<>	144:ef7eb2e8f9f7	687	/* Process Unlocked */
<>	144:ef7eb2e8f9f7	688	__HAL_UNLOCK(hrtc);
<>	144:ef7eb2e8f9f7	689
<>	144:ef7eb2e8f9f7	690	return HAL_ERROR;
<>	144:ef7eb2e8f9f7	691	}
<>	144:ef7eb2e8f9f7	692	}
<>	144:ef7eb2e8f9f7	693
<>	144:ef7eb2e8f9f7	694	/* Enable the write protection for RTC registers */
<>	144:ef7eb2e8f9f7	695	__HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<>	144:ef7eb2e8f9f7	696
<>	144:ef7eb2e8f9f7	697	hrtc->State = HAL_RTC_STATE_READY ;
<>	144:ef7eb2e8f9f7	698
<>	144:ef7eb2e8f9f7	699	/* Process Unlocked */
<>	144:ef7eb2e8f9f7	700	__HAL_UNLOCK(hrtc);
<>	144:ef7eb2e8f9f7	701
<>	144:ef7eb2e8f9f7	702	return HAL_OK;
<>	144:ef7eb2e8f9f7	703	}
<>	144:ef7eb2e8f9f7	704	}
<>	144:ef7eb2e8f9f7	705
<>	144:ef7eb2e8f9f7	706	/**
<>	144:ef7eb2e8f9f7	707	* @brief Gets RTC current date.
<>	144:ef7eb2e8f9f7	708	* @param hrtc: pointer to a RTC_HandleTypeDef structure that contains
<>	144:ef7eb2e8f9f7	709	* the configuration information for RTC.
<>	144:ef7eb2e8f9f7	710	* @param sDate: Pointer to Date structure
<>	144:ef7eb2e8f9f7	711	* @param Format: Specifies the format of the entered parameters.
<>	144:ef7eb2e8f9f7	712	* This parameter can be one of the following values:
<>	144:ef7eb2e8f9f7	713	* @arg RTC_FORMAT_BIN: Binary data format
<>	144:ef7eb2e8f9f7	714	* @arg RTC_FORMAT_BCD: BCD data format
<>	144:ef7eb2e8f9f7	715	* @note You must call HAL_RTC_GetDate() after HAL_RTC_GetTime() to unlock the values
<>	144:ef7eb2e8f9f7	716	* in the higher-order calendar shadow registers to ensure consistency between the time and date values.
<>	144:ef7eb2e8f9f7	717	* Reading RTC current time locks the values in calendar shadow registers until Current date is read.
<>	144:ef7eb2e8f9f7	718	* @retval HAL status
<>	144:ef7eb2e8f9f7	719	*/
<>	144:ef7eb2e8f9f7	720	HAL_StatusTypeDef HAL_RTC_GetDate(RTC_HandleTypeDef hrtc, RTC_DateTypeDef sDate, uint32_t Format)
<>	144:ef7eb2e8f9f7	721	{
<>	144:ef7eb2e8f9f7	722	uint32_t datetmpreg = 0U;
<>	144:ef7eb2e8f9f7	723
<>	144:ef7eb2e8f9f7	724	/* Check the parameters */
<>	144:ef7eb2e8f9f7	725	assert_param(IS_RTC_FORMAT(Format));
<>	144:ef7eb2e8f9f7	726
<>	144:ef7eb2e8f9f7	727	/* Get the DR register */
<>	144:ef7eb2e8f9f7	728	datetmpreg = (uint32_t)(hrtc->Instance->DR & RTC_DR_RESERVED_MASK);
<>	144:ef7eb2e8f9f7	729
<>	144:ef7eb2e8f9f7	730	/* Fill the structure fields with the read parameters */
<>	144:ef7eb2e8f9f7	731	sDate->Year = (uint8_t)((datetmpreg & (RTC_DR_YT \| RTC_DR_YU)) >> 16U);
<>	144:ef7eb2e8f9f7	732	sDate->Month = (uint8_t)((datetmpreg & (RTC_DR_MT \| RTC_DR_MU)) >> 8U);
<>	144:ef7eb2e8f9f7	733	sDate->Date = (uint8_t)(datetmpreg & (RTC_DR_DT \| RTC_DR_DU));
<>	144:ef7eb2e8f9f7	734	sDate->WeekDay = (uint8_t)((datetmpreg & (RTC_DR_WDU)) >> 13U);
<>	144:ef7eb2e8f9f7	735
<>	144:ef7eb2e8f9f7	736	/* Check the input parameters format */
<>	144:ef7eb2e8f9f7	737	if(Format == RTC_FORMAT_BIN)
<>	144:ef7eb2e8f9f7	738	{
<>	144:ef7eb2e8f9f7	739	/* Convert the date structure parameters to Binary format */
<>	144:ef7eb2e8f9f7	740	sDate->Year = (uint8_t)RTC_Bcd2ToByte(sDate->Year);
<>	144:ef7eb2e8f9f7	741	sDate->Month = (uint8_t)RTC_Bcd2ToByte(sDate->Month);
<>	144:ef7eb2e8f9f7	742	sDate->Date = (uint8_t)RTC_Bcd2ToByte(sDate->Date);
<>	144:ef7eb2e8f9f7	743	}
<>	144:ef7eb2e8f9f7	744	return HAL_OK;
<>	144:ef7eb2e8f9f7	745	}
<>	144:ef7eb2e8f9f7	746
<>	144:ef7eb2e8f9f7	747	/**
<>	144:ef7eb2e8f9f7	748	* @}
<>	144:ef7eb2e8f9f7	749	*/
<>	144:ef7eb2e8f9f7	750
<>	144:ef7eb2e8f9f7	751	/** @defgroup RTC_Exported_Functions_Group3 RTC Alarm functions
<>	144:ef7eb2e8f9f7	752	* @brief RTC Alarm functions
<>	144:ef7eb2e8f9f7	753	*
<>	144:ef7eb2e8f9f7	754	@verbatim
<>	144:ef7eb2e8f9f7	755	===============================================================================
<>	144:ef7eb2e8f9f7	756	##### RTC Alarm functions #####
<>	144:ef7eb2e8f9f7	757	===============================================================================
<>	144:ef7eb2e8f9f7	758
<>	144:ef7eb2e8f9f7	759	[..] This section provides functions allowing to configure Alarm feature
<>	144:ef7eb2e8f9f7	760
<>	144:ef7eb2e8f9f7	761	@endverbatim
<>	144:ef7eb2e8f9f7	762	* @{
<>	144:ef7eb2e8f9f7	763	*/
<>	144:ef7eb2e8f9f7	764	/**
<>	144:ef7eb2e8f9f7	765	* @brief Sets the specified RTC Alarm.
<>	144:ef7eb2e8f9f7	766	* @param hrtc: pointer to a RTC_HandleTypeDef structure that contains
<>	144:ef7eb2e8f9f7	767	* the configuration information for RTC.
<>	144:ef7eb2e8f9f7	768	* @param sAlarm: Pointer to Alarm structure
<>	144:ef7eb2e8f9f7	769	* @param Format: Specifies the format of the entered parameters.
<>	144:ef7eb2e8f9f7	770	* This parameter can be one of the following values:
<>	144:ef7eb2e8f9f7	771	* @arg RTC_FORMAT_BIN: Binary data format
<>	144:ef7eb2e8f9f7	772	* @arg RTC_FORMAT_BCD: BCD data format
<>	144:ef7eb2e8f9f7	773	* @retval HAL status
<>	144:ef7eb2e8f9f7	774	*/
<>	144:ef7eb2e8f9f7	775	HAL_StatusTypeDef HAL_RTC_SetAlarm(RTC_HandleTypeDef hrtc, RTC_AlarmTypeDef sAlarm, uint32_t Format)
<>	144:ef7eb2e8f9f7	776	{
<>	144:ef7eb2e8f9f7	777	uint32_t tickstart = 0U;
<>	144:ef7eb2e8f9f7	778	uint32_t tmpreg = 0U, subsecondtmpreg = 0U;
<>	144:ef7eb2e8f9f7	779
<>	144:ef7eb2e8f9f7	780	/* Check the parameters */
<>	144:ef7eb2e8f9f7	781	assert_param(IS_RTC_FORMAT(Format));
<>	144:ef7eb2e8f9f7	782	assert_param(IS_RTC_ALARM(sAlarm->Alarm));
<>	144:ef7eb2e8f9f7	783	assert_param(IS_RTC_ALARM_MASK(sAlarm->AlarmMask));
<>	144:ef7eb2e8f9f7	784	assert_param(IS_RTC_ALARM_DATE_WEEKDAY_SEL(sAlarm->AlarmDateWeekDaySel));
<>	144:ef7eb2e8f9f7	785	assert_param(IS_RTC_ALARM_SUB_SECOND_VALUE(sAlarm->AlarmTime.SubSeconds));
<>	144:ef7eb2e8f9f7	786	assert_param(IS_RTC_ALARM_SUB_SECOND_MASK(sAlarm->AlarmSubSecondMask));
<>	144:ef7eb2e8f9f7	787
<>	144:ef7eb2e8f9f7	788	/* Process Locked */
<>	144:ef7eb2e8f9f7	789	__HAL_LOCK(hrtc);
<>	144:ef7eb2e8f9f7	790
<>	144:ef7eb2e8f9f7	791	hrtc->State = HAL_RTC_STATE_BUSY;
<>	144:ef7eb2e8f9f7	792
<>	144:ef7eb2e8f9f7	793	if(Format == RTC_FORMAT_BIN)
<>	144:ef7eb2e8f9f7	794	{
<>	144:ef7eb2e8f9f7	795	if((hrtc->Instance->CR & RTC_CR_FMT) != (uint32_t)RESET)
<>	144:ef7eb2e8f9f7	796	{
<>	144:ef7eb2e8f9f7	797	assert_param(IS_RTC_HOUR12(sAlarm->AlarmTime.Hours));
<>	144:ef7eb2e8f9f7	798	assert_param(IS_RTC_HOURFORMAT12(sAlarm->AlarmTime.TimeFormat));
<>	144:ef7eb2e8f9f7	799	}
<>	144:ef7eb2e8f9f7	800	else
<>	144:ef7eb2e8f9f7	801	{
<>	144:ef7eb2e8f9f7	802	sAlarm->AlarmTime.TimeFormat = 0x00U;
<>	144:ef7eb2e8f9f7	803	assert_param(IS_RTC_HOUR24(sAlarm->AlarmTime.Hours));
<>	144:ef7eb2e8f9f7	804	}
<>	144:ef7eb2e8f9f7	805	assert_param(IS_RTC_MINUTES(sAlarm->AlarmTime.Minutes));
<>	144:ef7eb2e8f9f7	806	assert_param(IS_RTC_SECONDS(sAlarm->AlarmTime.Seconds));
<>	144:ef7eb2e8f9f7	807
<>	144:ef7eb2e8f9f7	808	if(sAlarm->AlarmDateWeekDaySel == RTC_ALARMDATEWEEKDAYSEL_DATE)
<>	144:ef7eb2e8f9f7	809	{
<>	144:ef7eb2e8f9f7	810	assert_param(IS_RTC_ALARM_DATE_WEEKDAY_DATE(sAlarm->AlarmDateWeekDay));
<>	144:ef7eb2e8f9f7	811	}
<>	144:ef7eb2e8f9f7	812	else
<>	144:ef7eb2e8f9f7	813	{
<>	144:ef7eb2e8f9f7	814	assert_param(IS_RTC_ALARM_DATE_WEEKDAY_WEEKDAY(sAlarm->AlarmDateWeekDay));
<>	144:ef7eb2e8f9f7	815	}
<>	144:ef7eb2e8f9f7	816
<>	144:ef7eb2e8f9f7	817	tmpreg = (((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Hours) << 16U) \| \
<>	144:ef7eb2e8f9f7	818	((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Minutes) << 8U) \| \
<>	144:ef7eb2e8f9f7	819	((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Seconds)) \| \
<>	144:ef7eb2e8f9f7	820	((uint32_t)(sAlarm->AlarmTime.TimeFormat) << 16U) \| \
<>	144:ef7eb2e8f9f7	821	((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmDateWeekDay) << 24U) \| \
<>	144:ef7eb2e8f9f7	822	((uint32_t)sAlarm->AlarmDateWeekDaySel) \| \
<>	144:ef7eb2e8f9f7	823	((uint32_t)sAlarm->AlarmMask));
<>	144:ef7eb2e8f9f7	824	}
<>	144:ef7eb2e8f9f7	825	else
<>	144:ef7eb2e8f9f7	826	{
<>	144:ef7eb2e8f9f7	827	if((hrtc->Instance->CR & RTC_CR_FMT) != (uint32_t)RESET)
<>	144:ef7eb2e8f9f7	828	{
<>	144:ef7eb2e8f9f7	829	tmpreg = RTC_Bcd2ToByte(sAlarm->AlarmTime.Hours);
<>	144:ef7eb2e8f9f7	830	assert_param(IS_RTC_HOUR12(tmpreg));
<>	144:ef7eb2e8f9f7	831	assert_param(IS_RTC_HOURFORMAT12(sAlarm->AlarmTime.TimeFormat));
<>	144:ef7eb2e8f9f7	832	}
<>	144:ef7eb2e8f9f7	833	else
<>	144:ef7eb2e8f9f7	834	{
<>	144:ef7eb2e8f9f7	835	sAlarm->AlarmTime.TimeFormat = 0x00U;
<>	144:ef7eb2e8f9f7	836	assert_param(IS_RTC_HOUR24(RTC_Bcd2ToByte(sAlarm->AlarmTime.Hours)));
<>	144:ef7eb2e8f9f7	837	}
<>	144:ef7eb2e8f9f7	838
<>	144:ef7eb2e8f9f7	839	assert_param(IS_RTC_MINUTES(RTC_Bcd2ToByte(sAlarm->AlarmTime.Minutes)));
<>	144:ef7eb2e8f9f7	840	assert_param(IS_RTC_SECONDS(RTC_Bcd2ToByte(sAlarm->AlarmTime.Seconds)));
<>	144:ef7eb2e8f9f7	841
<>	144:ef7eb2e8f9f7	842	if(sAlarm->AlarmDateWeekDaySel == RTC_ALARMDATEWEEKDAYSEL_DATE)
<>	144:ef7eb2e8f9f7	843	{
<>	144:ef7eb2e8f9f7	844	tmpreg = RTC_Bcd2ToByte(sAlarm->AlarmDateWeekDay);
<>	144:ef7eb2e8f9f7	845	assert_param(IS_RTC_ALARM_DATE_WEEKDAY_DATE(tmpreg));
<>	144:ef7eb2e8f9f7	846	}
<>	144:ef7eb2e8f9f7	847	else
<>	144:ef7eb2e8f9f7	848	{
<>	144:ef7eb2e8f9f7	849	tmpreg = RTC_Bcd2ToByte(sAlarm->AlarmDateWeekDay);
<>	144:ef7eb2e8f9f7	850	assert_param(IS_RTC_ALARM_DATE_WEEKDAY_WEEKDAY(tmpreg));
<>	144:ef7eb2e8f9f7	851	}
<>	144:ef7eb2e8f9f7	852
<>	144:ef7eb2e8f9f7	853	tmpreg = (((uint32_t)(sAlarm->AlarmTime.Hours) << 16U) \| \
<>	144:ef7eb2e8f9f7	854	((uint32_t)(sAlarm->AlarmTime.Minutes) << 8U) \| \
<>	144:ef7eb2e8f9f7	855	((uint32_t) sAlarm->AlarmTime.Seconds) \| \
<>	144:ef7eb2e8f9f7	856	((uint32_t)(sAlarm->AlarmTime.TimeFormat) << 16U) \| \
<>	144:ef7eb2e8f9f7	857	((uint32_t)(sAlarm->AlarmDateWeekDay) << 24U) \| \
<>	144:ef7eb2e8f9f7	858	((uint32_t)sAlarm->AlarmDateWeekDaySel) \| \
<>	144:ef7eb2e8f9f7	859	((uint32_t)sAlarm->AlarmMask));
<>	144:ef7eb2e8f9f7	860	}
<>	144:ef7eb2e8f9f7	861
<>	144:ef7eb2e8f9f7	862	/* Configure the Alarm A or Alarm B Sub Second registers */
<>	144:ef7eb2e8f9f7	863	subsecondtmpreg = (uint32_t)((uint32_t)(sAlarm->AlarmTime.SubSeconds) \| (uint32_t)(sAlarm->AlarmSubSecondMask));
<>	144:ef7eb2e8f9f7	864
<>	144:ef7eb2e8f9f7	865	/* Disable the write protection for RTC registers */
<>	144:ef7eb2e8f9f7	866	__HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
<>	144:ef7eb2e8f9f7	867
<>	144:ef7eb2e8f9f7	868	/* Configure the Alarm register */
<>	144:ef7eb2e8f9f7	869	if(sAlarm->Alarm == RTC_ALARM_A)
<>	144:ef7eb2e8f9f7	870	{
<>	144:ef7eb2e8f9f7	871	/* Disable the Alarm A interrupt */
<>	144:ef7eb2e8f9f7	872	__HAL_RTC_ALARMA_DISABLE(hrtc);
<>	144:ef7eb2e8f9f7	873
<>	144:ef7eb2e8f9f7	874	/* In case of interrupt mode is used, the interrupt source must disabled */
<>	144:ef7eb2e8f9f7	875	__HAL_RTC_ALARM_DISABLE_IT(hrtc, RTC_IT_ALRA);
<>	144:ef7eb2e8f9f7	876
<>	144:ef7eb2e8f9f7	877	/* Get tick */
<>	144:ef7eb2e8f9f7	878	tickstart = HAL_GetTick();
<>	144:ef7eb2e8f9f7	879
<>	144:ef7eb2e8f9f7	880	/* Wait till RTC ALRAWF flag is set and if Time out is reached exit */
<>	144:ef7eb2e8f9f7	881	while(__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRAWF) == RESET)
<>	144:ef7eb2e8f9f7	882	{
<>	144:ef7eb2e8f9f7	883	if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE)
<>	144:ef7eb2e8f9f7	884	{
<>	144:ef7eb2e8f9f7	885	/* Enable the write protection for RTC registers */
<>	144:ef7eb2e8f9f7	886	__HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<>	144:ef7eb2e8f9f7	887
<>	144:ef7eb2e8f9f7	888	hrtc->State = HAL_RTC_STATE_TIMEOUT;
<>	144:ef7eb2e8f9f7	889
<>	144:ef7eb2e8f9f7	890	/* Process Unlocked */
<>	144:ef7eb2e8f9f7	891	__HAL_UNLOCK(hrtc);
<>	144:ef7eb2e8f9f7	892
<>	144:ef7eb2e8f9f7	893	return HAL_TIMEOUT;
<>	144:ef7eb2e8f9f7	894	}
<>	144:ef7eb2e8f9f7	895	}
<>	144:ef7eb2e8f9f7	896
<>	144:ef7eb2e8f9f7	897	hrtc->Instance->ALRMAR = (uint32_t)tmpreg;
<>	144:ef7eb2e8f9f7	898	/* Configure the Alarm A Sub Second register */
<>	144:ef7eb2e8f9f7	899	hrtc->Instance->ALRMASSR = subsecondtmpreg;
<>	144:ef7eb2e8f9f7	900	/* Configure the Alarm state: Enable Alarm */
<>	144:ef7eb2e8f9f7	901	__HAL_RTC_ALARMA_ENABLE(hrtc);
<>	144:ef7eb2e8f9f7	902	}
<>	144:ef7eb2e8f9f7	903	else
<>	144:ef7eb2e8f9f7	904	{
<>	144:ef7eb2e8f9f7	905	/* Disable the Alarm B interrupt */
<>	144:ef7eb2e8f9f7	906	__HAL_RTC_ALARMB_DISABLE(hrtc);
<>	144:ef7eb2e8f9f7	907
<>	144:ef7eb2e8f9f7	908	/* In case of interrupt mode is used, the interrupt source must disabled */
<>	144:ef7eb2e8f9f7	909	__HAL_RTC_ALARM_DISABLE_IT(hrtc, RTC_IT_ALRB);
<>	144:ef7eb2e8f9f7	910
<>	144:ef7eb2e8f9f7	911	/* Get tick */
<>	144:ef7eb2e8f9f7	912	tickstart = HAL_GetTick();
<>	144:ef7eb2e8f9f7	913
<>	144:ef7eb2e8f9f7	914	/* Wait till RTC ALRBWF flag is set and if Time out is reached exit */
<>	144:ef7eb2e8f9f7	915	while(__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRBWF) == RESET)
<>	144:ef7eb2e8f9f7	916	{
<>	144:ef7eb2e8f9f7	917	if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE)
<>	144:ef7eb2e8f9f7	918	{
<>	144:ef7eb2e8f9f7	919	/* Enable the write protection for RTC registers */
<>	144:ef7eb2e8f9f7	920	__HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<>	144:ef7eb2e8f9f7	921
<>	144:ef7eb2e8f9f7	922	hrtc->State = HAL_RTC_STATE_TIMEOUT;
<>	144:ef7eb2e8f9f7	923
<>	144:ef7eb2e8f9f7	924	/* Process Unlocked */
<>	144:ef7eb2e8f9f7	925	__HAL_UNLOCK(hrtc);
<>	144:ef7eb2e8f9f7	926
<>	144:ef7eb2e8f9f7	927	return HAL_TIMEOUT;
<>	144:ef7eb2e8f9f7	928	}
<>	144:ef7eb2e8f9f7	929	}
<>	144:ef7eb2e8f9f7	930
<>	144:ef7eb2e8f9f7	931	hrtc->Instance->ALRMBR = (uint32_t)tmpreg;
<>	144:ef7eb2e8f9f7	932	/* Configure the Alarm B Sub Second register */
<>	144:ef7eb2e8f9f7	933	hrtc->Instance->ALRMBSSR = subsecondtmpreg;
<>	144:ef7eb2e8f9f7	934	/* Configure the Alarm state: Enable Alarm */
<>	144:ef7eb2e8f9f7	935	__HAL_RTC_ALARMB_ENABLE(hrtc);
<>	144:ef7eb2e8f9f7	936	}
<>	144:ef7eb2e8f9f7	937
<>	144:ef7eb2e8f9f7	938	/* Enable the write protection for RTC registers */
<>	144:ef7eb2e8f9f7	939	__HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<>	144:ef7eb2e8f9f7	940
<>	144:ef7eb2e8f9f7	941	/* Change RTC state */
<>	144:ef7eb2e8f9f7	942	hrtc->State = HAL_RTC_STATE_READY;
<>	144:ef7eb2e8f9f7	943
<>	144:ef7eb2e8f9f7	944	/* Process Unlocked */
<>	144:ef7eb2e8f9f7	945	__HAL_UNLOCK(hrtc);
<>	144:ef7eb2e8f9f7	946
<>	144:ef7eb2e8f9f7	947	return HAL_OK;
<>	144:ef7eb2e8f9f7	948	}
<>	144:ef7eb2e8f9f7	949
<>	144:ef7eb2e8f9f7	950	/**
<>	144:ef7eb2e8f9f7	951	* @brief Sets the specified RTC Alarm with Interrupt
<>	144:ef7eb2e8f9f7	952	* @param hrtc: pointer to a RTC_HandleTypeDef structure that contains
<>	144:ef7eb2e8f9f7	953	* the configuration information for RTC.
<>	144:ef7eb2e8f9f7	954	* @param sAlarm: Pointer to Alarm structure
<>	144:ef7eb2e8f9f7	955	* @param Format: Specifies the format of the entered parameters.
<>	144:ef7eb2e8f9f7	956	* This parameter can be one of the following values:
<>	144:ef7eb2e8f9f7	957	* @arg RTC_FORMAT_BIN: Binary data format
<>	144:ef7eb2e8f9f7	958	* @arg RTC_FORMAT_BCD: BCD data format
<>	144:ef7eb2e8f9f7	959	* @retval HAL status
<>	144:ef7eb2e8f9f7	960	*/
<>	144:ef7eb2e8f9f7	961	HAL_StatusTypeDef HAL_RTC_SetAlarm_IT(RTC_HandleTypeDef hrtc, RTC_AlarmTypeDef sAlarm, uint32_t Format)
<>	144:ef7eb2e8f9f7	962	{
<>	144:ef7eb2e8f9f7	963	uint32_t tmpreg = 0U, subsecondtmpreg = 0U;
<>	144:ef7eb2e8f9f7	964	__IO uint32_t count = RTC_TIMEOUT_VALUE * (SystemCoreClock / 32U / 1000U) ;
<>	144:ef7eb2e8f9f7	965
<>	144:ef7eb2e8f9f7	966	/* Check the parameters */
<>	144:ef7eb2e8f9f7	967	assert_param(IS_RTC_FORMAT(Format));
<>	144:ef7eb2e8f9f7	968	assert_param(IS_RTC_ALARM(sAlarm->Alarm));
<>	144:ef7eb2e8f9f7	969	assert_param(IS_RTC_ALARM_MASK(sAlarm->AlarmMask));
<>	144:ef7eb2e8f9f7	970	assert_param(IS_RTC_ALARM_DATE_WEEKDAY_SEL(sAlarm->AlarmDateWeekDaySel));
<>	144:ef7eb2e8f9f7	971	assert_param(IS_RTC_ALARM_SUB_SECOND_VALUE(sAlarm->AlarmTime.SubSeconds));
<>	144:ef7eb2e8f9f7	972	assert_param(IS_RTC_ALARM_SUB_SECOND_MASK(sAlarm->AlarmSubSecondMask));
<>	144:ef7eb2e8f9f7	973
<>	144:ef7eb2e8f9f7	974	/* Process Locked */
<>	144:ef7eb2e8f9f7	975	__HAL_LOCK(hrtc);
<>	144:ef7eb2e8f9f7	976
<>	144:ef7eb2e8f9f7	977	hrtc->State = HAL_RTC_STATE_BUSY;
<>	144:ef7eb2e8f9f7	978
<>	144:ef7eb2e8f9f7	979	if(Format == RTC_FORMAT_BIN)
<>	144:ef7eb2e8f9f7	980	{
<>	144:ef7eb2e8f9f7	981	if((hrtc->Instance->CR & RTC_CR_FMT) != (uint32_t)RESET)
<>	144:ef7eb2e8f9f7	982	{
<>	144:ef7eb2e8f9f7	983	assert_param(IS_RTC_HOUR12(sAlarm->AlarmTime.Hours));
<>	144:ef7eb2e8f9f7	984	assert_param(IS_RTC_HOURFORMAT12(sAlarm->AlarmTime.TimeFormat));
<>	144:ef7eb2e8f9f7	985	}
<>	144:ef7eb2e8f9f7	986	else
<>	144:ef7eb2e8f9f7	987	{
<>	144:ef7eb2e8f9f7	988	sAlarm->AlarmTime.TimeFormat = 0x00U;
<>	144:ef7eb2e8f9f7	989	assert_param(IS_RTC_HOUR24(sAlarm->AlarmTime.Hours));
<>	144:ef7eb2e8f9f7	990	}
<>	144:ef7eb2e8f9f7	991	assert_param(IS_RTC_MINUTES(sAlarm->AlarmTime.Minutes));
<>	144:ef7eb2e8f9f7	992	assert_param(IS_RTC_SECONDS(sAlarm->AlarmTime.Seconds));
<>	144:ef7eb2e8f9f7	993
<>	144:ef7eb2e8f9f7	994	if(sAlarm->AlarmDateWeekDaySel == RTC_ALARMDATEWEEKDAYSEL_DATE)
<>	144:ef7eb2e8f9f7	995	{
<>	144:ef7eb2e8f9f7	996	assert_param(IS_RTC_ALARM_DATE_WEEKDAY_DATE(sAlarm->AlarmDateWeekDay));
<>	144:ef7eb2e8f9f7	997	}
<>	144:ef7eb2e8f9f7	998	else
<>	144:ef7eb2e8f9f7	999	{
<>	144:ef7eb2e8f9f7	1000	assert_param(IS_RTC_ALARM_DATE_WEEKDAY_WEEKDAY(sAlarm->AlarmDateWeekDay));
<>	144:ef7eb2e8f9f7	1001	}
<>	144:ef7eb2e8f9f7	1002	tmpreg = (((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Hours) << 16U) \| \
<>	144:ef7eb2e8f9f7	1003	((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Minutes) << 8U) \| \
<>	144:ef7eb2e8f9f7	1004	((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmTime.Seconds)) \| \
<>	144:ef7eb2e8f9f7	1005	((uint32_t)(sAlarm->AlarmTime.TimeFormat) << 16U) \| \
<>	144:ef7eb2e8f9f7	1006	((uint32_t)RTC_ByteToBcd2(sAlarm->AlarmDateWeekDay) << 24U) \| \
<>	144:ef7eb2e8f9f7	1007	((uint32_t)sAlarm->AlarmDateWeekDaySel) \| \
<>	144:ef7eb2e8f9f7	1008	((uint32_t)sAlarm->AlarmMask));
<>	144:ef7eb2e8f9f7	1009	}
<>	144:ef7eb2e8f9f7	1010	else
<>	144:ef7eb2e8f9f7	1011	{
<>	144:ef7eb2e8f9f7	1012	if((hrtc->Instance->CR & RTC_CR_FMT) != (uint32_t)RESET)
<>	144:ef7eb2e8f9f7	1013	{
<>	144:ef7eb2e8f9f7	1014	tmpreg = RTC_Bcd2ToByte(sAlarm->AlarmTime.Hours);
<>	144:ef7eb2e8f9f7	1015	assert_param(IS_RTC_HOUR12(tmpreg));
<>	144:ef7eb2e8f9f7	1016	assert_param(IS_RTC_HOURFORMAT12(sAlarm->AlarmTime.TimeFormat));
<>	144:ef7eb2e8f9f7	1017	}
<>	144:ef7eb2e8f9f7	1018	else
<>	144:ef7eb2e8f9f7	1019	{
<>	144:ef7eb2e8f9f7	1020	sAlarm->AlarmTime.TimeFormat = 0x00U;
<>	144:ef7eb2e8f9f7	1021	assert_param(IS_RTC_HOUR24(RTC_Bcd2ToByte(sAlarm->AlarmTime.Hours)));
<>	144:ef7eb2e8f9f7	1022	}
<>	144:ef7eb2e8f9f7	1023
<>	144:ef7eb2e8f9f7	1024	assert_param(IS_RTC_MINUTES(RTC_Bcd2ToByte(sAlarm->AlarmTime.Minutes)));
<>	144:ef7eb2e8f9f7	1025	assert_param(IS_RTC_SECONDS(RTC_Bcd2ToByte(sAlarm->AlarmTime.Seconds)));
<>	144:ef7eb2e8f9f7	1026
<>	144:ef7eb2e8f9f7	1027	if(sAlarm->AlarmDateWeekDaySel == RTC_ALARMDATEWEEKDAYSEL_DATE)
<>	144:ef7eb2e8f9f7	1028	{
<>	144:ef7eb2e8f9f7	1029	tmpreg = RTC_Bcd2ToByte(sAlarm->AlarmDateWeekDay);
<>	144:ef7eb2e8f9f7	1030	assert_param(IS_RTC_ALARM_DATE_WEEKDAY_DATE(tmpreg));
<>	144:ef7eb2e8f9f7	1031	}
<>	144:ef7eb2e8f9f7	1032	else
<>	144:ef7eb2e8f9f7	1033	{
<>	144:ef7eb2e8f9f7	1034	tmpreg = RTC_Bcd2ToByte(sAlarm->AlarmDateWeekDay);
<>	144:ef7eb2e8f9f7	1035	assert_param(IS_RTC_ALARM_DATE_WEEKDAY_WEEKDAY(tmpreg));
<>	144:ef7eb2e8f9f7	1036	}
<>	144:ef7eb2e8f9f7	1037	tmpreg = (((uint32_t)(sAlarm->AlarmTime.Hours) << 16U) \| \
<>	144:ef7eb2e8f9f7	1038	((uint32_t)(sAlarm->AlarmTime.Minutes) << 8U) \| \
<>	144:ef7eb2e8f9f7	1039	((uint32_t) sAlarm->AlarmTime.Seconds) \| \
<>	144:ef7eb2e8f9f7	1040	((uint32_t)(sAlarm->AlarmTime.TimeFormat) << 16U) \| \
<>	144:ef7eb2e8f9f7	1041	((uint32_t)(sAlarm->AlarmDateWeekDay) << 24U) \| \
<>	144:ef7eb2e8f9f7	1042	((uint32_t)sAlarm->AlarmDateWeekDaySel) \| \
<>	144:ef7eb2e8f9f7	1043	((uint32_t)sAlarm->AlarmMask));
<>	144:ef7eb2e8f9f7	1044	}
<>	144:ef7eb2e8f9f7	1045	/* Configure the Alarm A or Alarm B Sub Second registers */
<>	144:ef7eb2e8f9f7	1046	subsecondtmpreg = (uint32_t)((uint32_t)(sAlarm->AlarmTime.SubSeconds) \| (uint32_t)(sAlarm->AlarmSubSecondMask));
<>	144:ef7eb2e8f9f7	1047
<>	144:ef7eb2e8f9f7	1048	/* Disable the write protection for RTC registers */
<>	144:ef7eb2e8f9f7	1049	__HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
<>	144:ef7eb2e8f9f7	1050
<>	144:ef7eb2e8f9f7	1051	/* Configure the Alarm register */
<>	144:ef7eb2e8f9f7	1052	if(sAlarm->Alarm == RTC_ALARM_A)
<>	144:ef7eb2e8f9f7	1053	{
<>	144:ef7eb2e8f9f7	1054	/* Disable the Alarm A interrupt */
<>	144:ef7eb2e8f9f7	1055	__HAL_RTC_ALARMA_DISABLE(hrtc);
<>	144:ef7eb2e8f9f7	1056
<>	144:ef7eb2e8f9f7	1057	/* Clear flag alarm A */
<>	144:ef7eb2e8f9f7	1058	__HAL_RTC_ALARM_CLEAR_FLAG(hrtc, RTC_FLAG_ALRAF);
<>	144:ef7eb2e8f9f7	1059
<>	144:ef7eb2e8f9f7	1060	/* Wait till RTC ALRAWF flag is set and if Time out is reached exit */
<>	144:ef7eb2e8f9f7	1061	do
<>	144:ef7eb2e8f9f7	1062	{
AnnaBridge	167:e84263d55307	1063	if (count-- == 0U)
<>	144:ef7eb2e8f9f7	1064	{
<>	144:ef7eb2e8f9f7	1065	/* Enable the write protection for RTC registers */
<>	144:ef7eb2e8f9f7	1066	__HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<>	144:ef7eb2e8f9f7	1067
<>	144:ef7eb2e8f9f7	1068	hrtc->State = HAL_RTC_STATE_TIMEOUT;
<>	144:ef7eb2e8f9f7	1069
<>	144:ef7eb2e8f9f7	1070	/* Process Unlocked */
<>	144:ef7eb2e8f9f7	1071	__HAL_UNLOCK(hrtc);
<>	144:ef7eb2e8f9f7	1072
<>	144:ef7eb2e8f9f7	1073	return HAL_TIMEOUT;
<>	144:ef7eb2e8f9f7	1074	}
<>	144:ef7eb2e8f9f7	1075	}
<>	144:ef7eb2e8f9f7	1076	while (__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRAWF) == RESET);
<>	144:ef7eb2e8f9f7	1077
<>	144:ef7eb2e8f9f7	1078	hrtc->Instance->ALRMAR = (uint32_t)tmpreg;
<>	144:ef7eb2e8f9f7	1079	/* Configure the Alarm A Sub Second register */
<>	144:ef7eb2e8f9f7	1080	hrtc->Instance->ALRMASSR = subsecondtmpreg;
<>	144:ef7eb2e8f9f7	1081	/* Configure the Alarm state: Enable Alarm */
<>	144:ef7eb2e8f9f7	1082	__HAL_RTC_ALARMA_ENABLE(hrtc);
<>	144:ef7eb2e8f9f7	1083	/* Configure the Alarm interrupt */
<>	144:ef7eb2e8f9f7	1084	__HAL_RTC_ALARM_ENABLE_IT(hrtc,RTC_IT_ALRA);
<>	144:ef7eb2e8f9f7	1085	}
<>	144:ef7eb2e8f9f7	1086	else
<>	144:ef7eb2e8f9f7	1087	{
<>	144:ef7eb2e8f9f7	1088	/* Disable the Alarm B interrupt */
<>	144:ef7eb2e8f9f7	1089	__HAL_RTC_ALARMB_DISABLE(hrtc);
<>	144:ef7eb2e8f9f7	1090
<>	144:ef7eb2e8f9f7	1091	/* Clear flag alarm B */
<>	144:ef7eb2e8f9f7	1092	__HAL_RTC_ALARM_CLEAR_FLAG(hrtc, RTC_FLAG_ALRBF);
<>	144:ef7eb2e8f9f7	1093
<>	144:ef7eb2e8f9f7	1094	/* Wait till RTC ALRBWF flag is set and if Time out is reached exit */
<>	144:ef7eb2e8f9f7	1095	do
<>	144:ef7eb2e8f9f7	1096	{
AnnaBridge	167:e84263d55307	1097	if (count-- == 0U)
<>	144:ef7eb2e8f9f7	1098	{
<>	144:ef7eb2e8f9f7	1099	/* Enable the write protection for RTC registers */
<>	144:ef7eb2e8f9f7	1100	__HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<>	144:ef7eb2e8f9f7	1101
<>	144:ef7eb2e8f9f7	1102	hrtc->State = HAL_RTC_STATE_TIMEOUT;
<>	144:ef7eb2e8f9f7	1103
<>	144:ef7eb2e8f9f7	1104	/* Process Unlocked */
<>	144:ef7eb2e8f9f7	1105	__HAL_UNLOCK(hrtc);
<>	144:ef7eb2e8f9f7	1106
<>	144:ef7eb2e8f9f7	1107	return HAL_TIMEOUT;
<>	144:ef7eb2e8f9f7	1108	}
<>	144:ef7eb2e8f9f7	1109	}
<>	144:ef7eb2e8f9f7	1110	while (__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRBWF) == RESET);
<>	144:ef7eb2e8f9f7	1111
<>	144:ef7eb2e8f9f7	1112	hrtc->Instance->ALRMBR = (uint32_t)tmpreg;
<>	144:ef7eb2e8f9f7	1113	/* Configure the Alarm B Sub Second register */
<>	144:ef7eb2e8f9f7	1114	hrtc->Instance->ALRMBSSR = subsecondtmpreg;
<>	144:ef7eb2e8f9f7	1115	/* Configure the Alarm state: Enable Alarm */
<>	144:ef7eb2e8f9f7	1116	__HAL_RTC_ALARMB_ENABLE(hrtc);
<>	144:ef7eb2e8f9f7	1117	/* Configure the Alarm interrupt */
<>	144:ef7eb2e8f9f7	1118	__HAL_RTC_ALARM_ENABLE_IT(hrtc, RTC_IT_ALRB);
<>	144:ef7eb2e8f9f7	1119	}
<>	144:ef7eb2e8f9f7	1120
<>	144:ef7eb2e8f9f7	1121	/* RTC Alarm Interrupt Configuration: EXTI configuration */
<>	144:ef7eb2e8f9f7	1122	__HAL_RTC_ALARM_EXTI_ENABLE_IT();
<>	144:ef7eb2e8f9f7	1123
<>	144:ef7eb2e8f9f7	1124	EXTI->RTSR \|= RTC_EXTI_LINE_ALARM_EVENT;
<>	144:ef7eb2e8f9f7	1125
<>	144:ef7eb2e8f9f7	1126	/* Enable the write protection for RTC registers */
<>	144:ef7eb2e8f9f7	1127	__HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<>	144:ef7eb2e8f9f7	1128
<>	144:ef7eb2e8f9f7	1129	hrtc->State = HAL_RTC_STATE_READY;
<>	144:ef7eb2e8f9f7	1130
<>	144:ef7eb2e8f9f7	1131	/* Process Unlocked */
<>	144:ef7eb2e8f9f7	1132	__HAL_UNLOCK(hrtc);
<>	144:ef7eb2e8f9f7	1133
<>	144:ef7eb2e8f9f7	1134	return HAL_OK;
<>	144:ef7eb2e8f9f7	1135	}
<>	144:ef7eb2e8f9f7	1136
<>	144:ef7eb2e8f9f7	1137	/**
<>	144:ef7eb2e8f9f7	1138	* @brief Deactivate the specified RTC Alarm
<>	144:ef7eb2e8f9f7	1139	* @param hrtc: pointer to a RTC_HandleTypeDef structure that contains
<>	144:ef7eb2e8f9f7	1140	* the configuration information for RTC.
<>	144:ef7eb2e8f9f7	1141	* @param Alarm: Specifies the Alarm.
<>	144:ef7eb2e8f9f7	1142	* This parameter can be one of the following values:
<>	144:ef7eb2e8f9f7	1143	* @arg RTC_ALARM_A: AlarmA
<>	144:ef7eb2e8f9f7	1144	* @arg RTC_ALARM_B: AlarmB
<>	144:ef7eb2e8f9f7	1145	* @retval HAL status
<>	144:ef7eb2e8f9f7	1146	*/
<>	144:ef7eb2e8f9f7	1147	HAL_StatusTypeDef HAL_RTC_DeactivateAlarm(RTC_HandleTypeDef *hrtc, uint32_t Alarm)
<>	144:ef7eb2e8f9f7	1148	{
<>	144:ef7eb2e8f9f7	1149	uint32_t tickstart = 0U;
<>	144:ef7eb2e8f9f7	1150
<>	144:ef7eb2e8f9f7	1151	/* Check the parameters */
<>	144:ef7eb2e8f9f7	1152	assert_param(IS_RTC_ALARM(Alarm));
<>	144:ef7eb2e8f9f7	1153
<>	144:ef7eb2e8f9f7	1154	/* Process Locked */
<>	144:ef7eb2e8f9f7	1155	__HAL_LOCK(hrtc);
<>	144:ef7eb2e8f9f7	1156
<>	144:ef7eb2e8f9f7	1157	hrtc->State = HAL_RTC_STATE_BUSY;
<>	144:ef7eb2e8f9f7	1158
<>	144:ef7eb2e8f9f7	1159	/* Disable the write protection for RTC registers */
<>	144:ef7eb2e8f9f7	1160	__HAL_RTC_WRITEPROTECTION_DISABLE(hrtc);
<>	144:ef7eb2e8f9f7	1161
<>	144:ef7eb2e8f9f7	1162	if(Alarm == RTC_ALARM_A)
<>	144:ef7eb2e8f9f7	1163	{
<>	144:ef7eb2e8f9f7	1164	/* AlarmA */
<>	144:ef7eb2e8f9f7	1165	__HAL_RTC_ALARMA_DISABLE(hrtc);
<>	144:ef7eb2e8f9f7	1166
<>	144:ef7eb2e8f9f7	1167	/* In case of interrupt mode is used, the interrupt source must disabled */
<>	144:ef7eb2e8f9f7	1168	__HAL_RTC_ALARM_DISABLE_IT(hrtc, RTC_IT_ALRA);
<>	144:ef7eb2e8f9f7	1169
<>	144:ef7eb2e8f9f7	1170	/* Get tick */
<>	144:ef7eb2e8f9f7	1171	tickstart = HAL_GetTick();
<>	144:ef7eb2e8f9f7	1172
<>	144:ef7eb2e8f9f7	1173	/* Wait till RTC ALRxWF flag is set and if Time out is reached exit */
<>	144:ef7eb2e8f9f7	1174	while(__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRAWF) == RESET)
<>	144:ef7eb2e8f9f7	1175	{
<>	144:ef7eb2e8f9f7	1176	if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE)
<>	144:ef7eb2e8f9f7	1177	{
<>	144:ef7eb2e8f9f7	1178	/* Enable the write protection for RTC registers */
<>	144:ef7eb2e8f9f7	1179	__HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<>	144:ef7eb2e8f9f7	1180
<>	144:ef7eb2e8f9f7	1181	hrtc->State = HAL_RTC_STATE_TIMEOUT;
<>	144:ef7eb2e8f9f7	1182
<>	144:ef7eb2e8f9f7	1183	/* Process Unlocked */
<>	144:ef7eb2e8f9f7	1184	__HAL_UNLOCK(hrtc);
<>	144:ef7eb2e8f9f7	1185
<>	144:ef7eb2e8f9f7	1186	return HAL_TIMEOUT;
<>	144:ef7eb2e8f9f7	1187	}
<>	144:ef7eb2e8f9f7	1188	}
<>	144:ef7eb2e8f9f7	1189	}
<>	144:ef7eb2e8f9f7	1190	else
<>	144:ef7eb2e8f9f7	1191	{
<>	144:ef7eb2e8f9f7	1192	/* AlarmB */
<>	144:ef7eb2e8f9f7	1193	__HAL_RTC_ALARMB_DISABLE(hrtc);
<>	144:ef7eb2e8f9f7	1194
<>	144:ef7eb2e8f9f7	1195	/* In case of interrupt mode is used, the interrupt source must disabled */
<>	144:ef7eb2e8f9f7	1196	__HAL_RTC_ALARM_DISABLE_IT(hrtc,RTC_IT_ALRB);
<>	144:ef7eb2e8f9f7	1197
<>	144:ef7eb2e8f9f7	1198	/* Get tick */
<>	144:ef7eb2e8f9f7	1199	tickstart = HAL_GetTick();
<>	144:ef7eb2e8f9f7	1200
<>	144:ef7eb2e8f9f7	1201	/* Wait till RTC ALRxWF flag is set and if Time out is reached exit */
<>	144:ef7eb2e8f9f7	1202	while(__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRBWF) == RESET)
<>	144:ef7eb2e8f9f7	1203	{
<>	144:ef7eb2e8f9f7	1204	if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE)
<>	144:ef7eb2e8f9f7	1205	{
<>	144:ef7eb2e8f9f7	1206	/* Enable the write protection for RTC registers */
<>	144:ef7eb2e8f9f7	1207	__HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<>	144:ef7eb2e8f9f7	1208
<>	144:ef7eb2e8f9f7	1209	hrtc->State = HAL_RTC_STATE_TIMEOUT;
<>	144:ef7eb2e8f9f7	1210
<>	144:ef7eb2e8f9f7	1211	/* Process Unlocked */
<>	144:ef7eb2e8f9f7	1212	__HAL_UNLOCK(hrtc);
<>	144:ef7eb2e8f9f7	1213
<>	144:ef7eb2e8f9f7	1214	return HAL_TIMEOUT;
<>	144:ef7eb2e8f9f7	1215	}
<>	144:ef7eb2e8f9f7	1216	}
<>	144:ef7eb2e8f9f7	1217	}
<>	144:ef7eb2e8f9f7	1218	/* Enable the write protection for RTC registers */
<>	144:ef7eb2e8f9f7	1219	__HAL_RTC_WRITEPROTECTION_ENABLE(hrtc);
<>	144:ef7eb2e8f9f7	1220
<>	144:ef7eb2e8f9f7	1221	hrtc->State = HAL_RTC_STATE_READY;
<>	144:ef7eb2e8f9f7	1222
<>	144:ef7eb2e8f9f7	1223	/* Process Unlocked */
<>	144:ef7eb2e8f9f7	1224	__HAL_UNLOCK(hrtc);
<>	144:ef7eb2e8f9f7	1225
<>	144:ef7eb2e8f9f7	1226	return HAL_OK;
<>	144:ef7eb2e8f9f7	1227	}
<>	144:ef7eb2e8f9f7	1228
<>	144:ef7eb2e8f9f7	1229	/**
<>	144:ef7eb2e8f9f7	1230	* @brief Gets the RTC Alarm value and masks.
<>	144:ef7eb2e8f9f7	1231	* @param hrtc: pointer to a RTC_HandleTypeDef structure that contains
<>	144:ef7eb2e8f9f7	1232	* the configuration information for RTC.
<>	144:ef7eb2e8f9f7	1233	* @param sAlarm: Pointer to Date structure
<>	144:ef7eb2e8f9f7	1234	* @param Alarm: Specifies the Alarm.
<>	144:ef7eb2e8f9f7	1235	* This parameter can be one of the following values:
<>	144:ef7eb2e8f9f7	1236	* @arg RTC_ALARM_A: AlarmA
<>	144:ef7eb2e8f9f7	1237	* @arg RTC_ALARM_B: AlarmB
<>	144:ef7eb2e8f9f7	1238	* @param Format: Specifies the format of the entered parameters.
<>	144:ef7eb2e8f9f7	1239	* This parameter can be one of the following values:
<>	144:ef7eb2e8f9f7	1240	* @arg RTC_FORMAT_BIN: Binary data format
<>	144:ef7eb2e8f9f7	1241	* @arg RTC_FORMAT_BCD: BCD data format
<>	144:ef7eb2e8f9f7	1242	* @retval HAL status
<>	144:ef7eb2e8f9f7	1243	*/
<>	144:ef7eb2e8f9f7	1244	HAL_StatusTypeDef HAL_RTC_GetAlarm(RTC_HandleTypeDef hrtc, RTC_AlarmTypeDef sAlarm, uint32_t Alarm, uint32_t Format)
<>	144:ef7eb2e8f9f7	1245	{
<>	144:ef7eb2e8f9f7	1246	uint32_t tmpreg = 0U, subsecondtmpreg = 0U;
<>	144:ef7eb2e8f9f7	1247
<>	144:ef7eb2e8f9f7	1248	/* Check the parameters */
<>	144:ef7eb2e8f9f7	1249	assert_param(IS_RTC_FORMAT(Format));
<>	144:ef7eb2e8f9f7	1250	assert_param(IS_RTC_ALARM(Alarm));
<>	144:ef7eb2e8f9f7	1251
<>	144:ef7eb2e8f9f7	1252	if(Alarm == RTC_ALARM_A)
<>	144:ef7eb2e8f9f7	1253	{
<>	144:ef7eb2e8f9f7	1254	/* AlarmA */
<>	144:ef7eb2e8f9f7	1255	sAlarm->Alarm = RTC_ALARM_A;
<>	144:ef7eb2e8f9f7	1256
<>	144:ef7eb2e8f9f7	1257	tmpreg = (uint32_t)(hrtc->Instance->ALRMAR);
<>	144:ef7eb2e8f9f7	1258	subsecondtmpreg = (uint32_t)((hrtc->Instance->ALRMASSR ) & RTC_ALRMASSR_SS);
<>	144:ef7eb2e8f9f7	1259	}
<>	144:ef7eb2e8f9f7	1260	else
<>	144:ef7eb2e8f9f7	1261	{
<>	144:ef7eb2e8f9f7	1262	sAlarm->Alarm = RTC_ALARM_B;
<>	144:ef7eb2e8f9f7	1263
<>	144:ef7eb2e8f9f7	1264	tmpreg = (uint32_t)(hrtc->Instance->ALRMBR);
<>	144:ef7eb2e8f9f7	1265	subsecondtmpreg = (uint32_t)((hrtc->Instance->ALRMBSSR) & RTC_ALRMBSSR_SS);
<>	144:ef7eb2e8f9f7	1266	}
<>	144:ef7eb2e8f9f7	1267
<>	144:ef7eb2e8f9f7	1268	/* Fill the structure with the read parameters */
<>	144:ef7eb2e8f9f7	1269	sAlarm->AlarmTime.Hours = (uint32_t)((tmpreg & (RTC_ALRMAR_HT \| RTC_ALRMAR_HU)) >> 16U);
<>	144:ef7eb2e8f9f7	1270	sAlarm->AlarmTime.Minutes = (uint32_t)((tmpreg & (RTC_ALRMAR_MNT \| RTC_ALRMAR_MNU)) >> 8U);
<>	144:ef7eb2e8f9f7	1271	sAlarm->AlarmTime.Seconds = (uint32_t)(tmpreg & (RTC_ALRMAR_ST \| RTC_ALRMAR_SU));
<>	144:ef7eb2e8f9f7	1272	sAlarm->AlarmTime.TimeFormat = (uint32_t)((tmpreg & RTC_ALRMAR_PM) >> 16U);
<>	144:ef7eb2e8f9f7	1273	sAlarm->AlarmTime.SubSeconds = (uint32_t) subsecondtmpreg;
<>	144:ef7eb2e8f9f7	1274	sAlarm->AlarmDateWeekDay = (uint32_t)((tmpreg & (RTC_ALRMAR_DT \| RTC_ALRMAR_DU)) >> 24U);
<>	144:ef7eb2e8f9f7	1275	sAlarm->AlarmDateWeekDaySel = (uint32_t)(tmpreg & RTC_ALRMAR_WDSEL);
<>	144:ef7eb2e8f9f7	1276	sAlarm->AlarmMask = (uint32_t)(tmpreg & RTC_ALARMMASK_ALL);
<>	144:ef7eb2e8f9f7	1277
<>	144:ef7eb2e8f9f7	1278	if(Format == RTC_FORMAT_BIN)
<>	144:ef7eb2e8f9f7	1279	{
<>	144:ef7eb2e8f9f7	1280	sAlarm->AlarmTime.Hours = RTC_Bcd2ToByte(sAlarm->AlarmTime.Hours);
<>	144:ef7eb2e8f9f7	1281	sAlarm->AlarmTime.Minutes = RTC_Bcd2ToByte(sAlarm->AlarmTime.Minutes);
<>	144:ef7eb2e8f9f7	1282	sAlarm->AlarmTime.Seconds = RTC_Bcd2ToByte(sAlarm->AlarmTime.Seconds);
<>	144:ef7eb2e8f9f7	1283	sAlarm->AlarmDateWeekDay = RTC_Bcd2ToByte(sAlarm->AlarmDateWeekDay);
<>	144:ef7eb2e8f9f7	1284	}
<>	144:ef7eb2e8f9f7	1285
<>	144:ef7eb2e8f9f7	1286	return HAL_OK;
<>	144:ef7eb2e8f9f7	1287	}
<>	144:ef7eb2e8f9f7	1288
<>	144:ef7eb2e8f9f7	1289	/**
<>	144:ef7eb2e8f9f7	1290	* @brief This function handles Alarm interrupt request.
<>	144:ef7eb2e8f9f7	1291	* @param hrtc: pointer to a RTC_HandleTypeDef structure that contains
<>	144:ef7eb2e8f9f7	1292	* the configuration information for RTC.
<>	144:ef7eb2e8f9f7	1293	* @retval None
<>	144:ef7eb2e8f9f7	1294	*/
<>	144:ef7eb2e8f9f7	1295	void HAL_RTC_AlarmIRQHandler(RTC_HandleTypeDef* hrtc)
<>	144:ef7eb2e8f9f7	1296	{
<>	144:ef7eb2e8f9f7	1297	if(__HAL_RTC_ALARM_GET_IT(hrtc, RTC_IT_ALRA))
<>	144:ef7eb2e8f9f7	1298	{
<>	144:ef7eb2e8f9f7	1299	/* Get the status of the Interrupt */
<>	144:ef7eb2e8f9f7	1300	if((uint32_t)(hrtc->Instance->CR & RTC_IT_ALRA) != (uint32_t)RESET)
<>	144:ef7eb2e8f9f7	1301	{
<>	144:ef7eb2e8f9f7	1302	/* AlarmA callback */
<>	144:ef7eb2e8f9f7	1303	HAL_RTC_AlarmAEventCallback(hrtc);
<>	144:ef7eb2e8f9f7	1304
<>	144:ef7eb2e8f9f7	1305	/* Clear the Alarm interrupt pending bit */
<>	144:ef7eb2e8f9f7	1306	__HAL_RTC_ALARM_CLEAR_FLAG(hrtc,RTC_FLAG_ALRAF);
<>	144:ef7eb2e8f9f7	1307	}
<>	144:ef7eb2e8f9f7	1308	}
<>	144:ef7eb2e8f9f7	1309
<>	144:ef7eb2e8f9f7	1310	if(__HAL_RTC_ALARM_GET_IT(hrtc, RTC_IT_ALRB))
<>	144:ef7eb2e8f9f7	1311	{
<>	144:ef7eb2e8f9f7	1312	/* Get the status of the Interrupt */
<>	144:ef7eb2e8f9f7	1313	if((uint32_t)(hrtc->Instance->CR & RTC_IT_ALRB) != (uint32_t)RESET)
<>	144:ef7eb2e8f9f7	1314	{
<>	144:ef7eb2e8f9f7	1315	/* AlarmB callback */
<>	144:ef7eb2e8f9f7	1316	HAL_RTCEx_AlarmBEventCallback(hrtc);
<>	144:ef7eb2e8f9f7	1317
<>	144:ef7eb2e8f9f7	1318	/* Clear the Alarm interrupt pending bit */
<>	144:ef7eb2e8f9f7	1319	__HAL_RTC_ALARM_CLEAR_FLAG(hrtc,RTC_FLAG_ALRBF);
<>	144:ef7eb2e8f9f7	1320	}
<>	144:ef7eb2e8f9f7	1321	}
<>	144:ef7eb2e8f9f7	1322
<>	144:ef7eb2e8f9f7	1323	/* Clear the EXTI's line Flag for RTC Alarm */
<>	144:ef7eb2e8f9f7	1324	__HAL_RTC_ALARM_EXTI_CLEAR_FLAG();
<>	144:ef7eb2e8f9f7	1325
<>	144:ef7eb2e8f9f7	1326	/* Change RTC state */
<>	144:ef7eb2e8f9f7	1327	hrtc->State = HAL_RTC_STATE_READY;
<>	144:ef7eb2e8f9f7	1328	}
<>	144:ef7eb2e8f9f7	1329
<>	144:ef7eb2e8f9f7	1330	/**
<>	144:ef7eb2e8f9f7	1331	* @brief Alarm A callback.
<>	144:ef7eb2e8f9f7	1332	* @param hrtc: pointer to a RTC_HandleTypeDef structure that contains
<>	144:ef7eb2e8f9f7	1333	* the configuration information for RTC.
<>	144:ef7eb2e8f9f7	1334	* @retval None
<>	144:ef7eb2e8f9f7	1335	*/
<>	144:ef7eb2e8f9f7	1336	__weak void HAL_RTC_AlarmAEventCallback(RTC_HandleTypeDef *hrtc)
<>	144:ef7eb2e8f9f7	1337	{
<>	144:ef7eb2e8f9f7	1338	/* Prevent unused argument(s) compilation warning */
<>	144:ef7eb2e8f9f7	1339	UNUSED(hrtc);
<>	144:ef7eb2e8f9f7	1340	/* NOTE : This function Should not be modified, when the callback is needed,
<>	144:ef7eb2e8f9f7	1341	the HAL_RTC_AlarmAEventCallback could be implemented in the user file
<>	144:ef7eb2e8f9f7	1342	*/
<>	144:ef7eb2e8f9f7	1343	}
<>	144:ef7eb2e8f9f7	1344
<>	144:ef7eb2e8f9f7	1345	/**
<>	144:ef7eb2e8f9f7	1346	* @brief This function handles AlarmA Polling request.
<>	144:ef7eb2e8f9f7	1347	* @param hrtc: pointer to a RTC_HandleTypeDef structure that contains
<>	144:ef7eb2e8f9f7	1348	* the configuration information for RTC.
<>	144:ef7eb2e8f9f7	1349	* @param Timeout: Timeout duration
<>	144:ef7eb2e8f9f7	1350	* @retval HAL status
<>	144:ef7eb2e8f9f7	1351	*/
<>	144:ef7eb2e8f9f7	1352	HAL_StatusTypeDef HAL_RTC_PollForAlarmAEvent(RTC_HandleTypeDef *hrtc, uint32_t Timeout)
<>	144:ef7eb2e8f9f7	1353	{
<>	144:ef7eb2e8f9f7	1354	uint32_t tickstart = 0U;
<>	144:ef7eb2e8f9f7	1355
<>	144:ef7eb2e8f9f7	1356	/* Get tick */
<>	144:ef7eb2e8f9f7	1357	tickstart = HAL_GetTick();
<>	144:ef7eb2e8f9f7	1358
<>	144:ef7eb2e8f9f7	1359	while(__HAL_RTC_ALARM_GET_FLAG(hrtc, RTC_FLAG_ALRAF) == RESET)
<>	144:ef7eb2e8f9f7	1360	{
<>	144:ef7eb2e8f9f7	1361	if(Timeout != HAL_MAX_DELAY)
<>	144:ef7eb2e8f9f7	1362	{
<>	144:ef7eb2e8f9f7	1363	if((Timeout == 0U)\|\|((HAL_GetTick() - tickstart ) > Timeout))
<>	144:ef7eb2e8f9f7	1364	{
<>	144:ef7eb2e8f9f7	1365	hrtc->State = HAL_RTC_STATE_TIMEOUT;
<>	144:ef7eb2e8f9f7	1366	return HAL_TIMEOUT;
<>	144:ef7eb2e8f9f7	1367	}
<>	144:ef7eb2e8f9f7	1368	}
<>	144:ef7eb2e8f9f7	1369	}
<>	144:ef7eb2e8f9f7	1370
<>	144:ef7eb2e8f9f7	1371	/* Clear the Alarm interrupt pending bit */
<>	144:ef7eb2e8f9f7	1372	__HAL_RTC_ALARM_CLEAR_FLAG(hrtc, RTC_FLAG_ALRAF);
<>	144:ef7eb2e8f9f7	1373
<>	144:ef7eb2e8f9f7	1374	/* Change RTC state */
<>	144:ef7eb2e8f9f7	1375	hrtc->State = HAL_RTC_STATE_READY;
<>	144:ef7eb2e8f9f7	1376
<>	144:ef7eb2e8f9f7	1377	return HAL_OK;
<>	144:ef7eb2e8f9f7	1378	}
<>	144:ef7eb2e8f9f7	1379
<>	144:ef7eb2e8f9f7	1380	/**
<>	144:ef7eb2e8f9f7	1381	* @}
<>	144:ef7eb2e8f9f7	1382	*/
<>	144:ef7eb2e8f9f7	1383
<>	144:ef7eb2e8f9f7	1384	/** @defgroup RTC_Exported_Functions_Group4 Peripheral Control functions
<>	144:ef7eb2e8f9f7	1385	* @brief Peripheral Control functions
<>	144:ef7eb2e8f9f7	1386	*
<>	144:ef7eb2e8f9f7	1387	@verbatim
<>	144:ef7eb2e8f9f7	1388	===============================================================================
<>	144:ef7eb2e8f9f7	1389	##### Peripheral Control functions #####
<>	144:ef7eb2e8f9f7	1390	===============================================================================
<>	144:ef7eb2e8f9f7	1391	[..]
<>	144:ef7eb2e8f9f7	1392	This subsection provides functions allowing to
<>	144:ef7eb2e8f9f7	1393	(+) Wait for RTC Time and Date Synchronization
<>	144:ef7eb2e8f9f7	1394
<>	144:ef7eb2e8f9f7	1395	@endverbatim
<>	144:ef7eb2e8f9f7	1396	* @{
<>	144:ef7eb2e8f9f7	1397	*/
<>	144:ef7eb2e8f9f7	1398
<>	144:ef7eb2e8f9f7	1399	/**
<>	144:ef7eb2e8f9f7	1400	* @brief Waits until the RTC Time and Date registers (RTC_TR and RTC_DR) are
<>	144:ef7eb2e8f9f7	1401	* synchronized with RTC APB clock.
<>	144:ef7eb2e8f9f7	1402	* @note The RTC Resynchronization mode is write protected, use the
<>	144:ef7eb2e8f9f7	1403	* __HAL_RTC_WRITEPROTECTION_DISABLE() before calling this function.
<>	144:ef7eb2e8f9f7	1404	* @note To read the calendar through the shadow registers after Calendar
<>	144:ef7eb2e8f9f7	1405	* initialization, calendar update or after wake-up from low power modes
<>	144:ef7eb2e8f9f7	1406	* the software must first clear the RSF flag.
<>	144:ef7eb2e8f9f7	1407	* The software must then wait until it is set again before reading
<>	144:ef7eb2e8f9f7	1408	* the calendar, which means that the calendar registers have been
<>	144:ef7eb2e8f9f7	1409	* correctly copied into the RTC_TR and RTC_DR shadow registers.
<>	144:ef7eb2e8f9f7	1410	* @param hrtc: pointer to a RTC_HandleTypeDef structure that contains
<>	144:ef7eb2e8f9f7	1411	* the configuration information for RTC.
<>	144:ef7eb2e8f9f7	1412	* @retval HAL status
<>	144:ef7eb2e8f9f7	1413	*/
<>	144:ef7eb2e8f9f7	1414	HAL_StatusTypeDef HAL_RTC_WaitForSynchro(RTC_HandleTypeDef* hrtc)
<>	144:ef7eb2e8f9f7	1415	{
<>	144:ef7eb2e8f9f7	1416	uint32_t tickstart = 0U;
<>	144:ef7eb2e8f9f7	1417
<>	144:ef7eb2e8f9f7	1418	/* Clear RSF flag */
<>	144:ef7eb2e8f9f7	1419	hrtc->Instance->ISR &= (uint32_t)RTC_RSF_MASK;
<>	144:ef7eb2e8f9f7	1420
<>	144:ef7eb2e8f9f7	1421	/* Get tick */
<>	144:ef7eb2e8f9f7	1422	tickstart = HAL_GetTick();
<>	144:ef7eb2e8f9f7	1423
<>	144:ef7eb2e8f9f7	1424	/* Wait the registers to be synchronised */
<>	144:ef7eb2e8f9f7	1425	while((hrtc->Instance->ISR & RTC_ISR_RSF) == (uint32_t)RESET)
<>	144:ef7eb2e8f9f7	1426	{
<>	144:ef7eb2e8f9f7	1427	if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE)
<>	144:ef7eb2e8f9f7	1428	{
<>	144:ef7eb2e8f9f7	1429	return HAL_TIMEOUT;
<>	144:ef7eb2e8f9f7	1430	}
<>	144:ef7eb2e8f9f7	1431	}
<>	144:ef7eb2e8f9f7	1432
<>	144:ef7eb2e8f9f7	1433	return HAL_OK;
<>	144:ef7eb2e8f9f7	1434	}
<>	144:ef7eb2e8f9f7	1435
<>	144:ef7eb2e8f9f7	1436	/**
<>	144:ef7eb2e8f9f7	1437	* @}
<>	144:ef7eb2e8f9f7	1438	*/
<>	144:ef7eb2e8f9f7	1439
<>	144:ef7eb2e8f9f7	1440	/** @defgroup RTC_Exported_Functions_Group5 Peripheral State functions
<>	144:ef7eb2e8f9f7	1441	* @brief Peripheral State functions
<>	144:ef7eb2e8f9f7	1442	*
<>	144:ef7eb2e8f9f7	1443	@verbatim
<>	144:ef7eb2e8f9f7	1444	===============================================================================
<>	144:ef7eb2e8f9f7	1445	##### Peripheral State functions #####
<>	144:ef7eb2e8f9f7	1446	===============================================================================
<>	144:ef7eb2e8f9f7	1447	[..]
<>	144:ef7eb2e8f9f7	1448	This subsection provides functions allowing to
<>	144:ef7eb2e8f9f7	1449	(+) Get RTC state
<>	144:ef7eb2e8f9f7	1450
<>	144:ef7eb2e8f9f7	1451	@endverbatim
<>	144:ef7eb2e8f9f7	1452	* @{
<>	144:ef7eb2e8f9f7	1453	*/
<>	144:ef7eb2e8f9f7	1454	/**
<>	144:ef7eb2e8f9f7	1455	* @brief Returns the RTC state.
<>	144:ef7eb2e8f9f7	1456	* @param hrtc: pointer to a RTC_HandleTypeDef structure that contains
<>	144:ef7eb2e8f9f7	1457	* the configuration information for RTC.
<>	144:ef7eb2e8f9f7	1458	* @retval HAL state
<>	144:ef7eb2e8f9f7	1459	*/
<>	144:ef7eb2e8f9f7	1460	HAL_RTCStateTypeDef HAL_RTC_GetState(RTC_HandleTypeDef* hrtc)
<>	144:ef7eb2e8f9f7	1461	{
<>	144:ef7eb2e8f9f7	1462	return hrtc->State;
<>	144:ef7eb2e8f9f7	1463	}
<>	144:ef7eb2e8f9f7	1464
<>	144:ef7eb2e8f9f7	1465	/**
<>	144:ef7eb2e8f9f7	1466	* @}
<>	144:ef7eb2e8f9f7	1467	*/
<>	144:ef7eb2e8f9f7	1468
<>	144:ef7eb2e8f9f7	1469	/**
<>	144:ef7eb2e8f9f7	1470	* @brief Enters the RTC Initialization mode.
<>	144:ef7eb2e8f9f7	1471	* @note The RTC Initialization mode is write protected, use the
<>	144:ef7eb2e8f9f7	1472	* __HAL_RTC_WRITEPROTECTION_DISABLE() before calling this function.
<>	144:ef7eb2e8f9f7	1473	* @param hrtc: pointer to a RTC_HandleTypeDef structure that contains
<>	144:ef7eb2e8f9f7	1474	* the configuration information for RTC.
<>	144:ef7eb2e8f9f7	1475	* @retval HAL status
<>	144:ef7eb2e8f9f7	1476	*/
<>	144:ef7eb2e8f9f7	1477	HAL_StatusTypeDef RTC_EnterInitMode(RTC_HandleTypeDef* hrtc)
<>	144:ef7eb2e8f9f7	1478	{
<>	144:ef7eb2e8f9f7	1479	uint32_t tickstart = 0U;
<>	144:ef7eb2e8f9f7	1480
<>	144:ef7eb2e8f9f7	1481	/* Check if the Initialization mode is set */
<>	144:ef7eb2e8f9f7	1482	if((hrtc->Instance->ISR & RTC_ISR_INITF) == (uint32_t)RESET)
<>	144:ef7eb2e8f9f7	1483	{
<>	144:ef7eb2e8f9f7	1484	/* Set the Initialization mode */
<>	144:ef7eb2e8f9f7	1485	hrtc->Instance->ISR = (uint32_t)RTC_INIT_MASK;
<>	144:ef7eb2e8f9f7	1486
<>	144:ef7eb2e8f9f7	1487	/* Get tick */
<>	144:ef7eb2e8f9f7	1488	tickstart = HAL_GetTick();
<>	144:ef7eb2e8f9f7	1489
<>	144:ef7eb2e8f9f7	1490	/* Wait till RTC is in INIT state and if Time out is reached exit */
<>	144:ef7eb2e8f9f7	1491	while((hrtc->Instance->ISR & RTC_ISR_INITF) == (uint32_t)RESET)
<>	144:ef7eb2e8f9f7	1492	{
<>	144:ef7eb2e8f9f7	1493	if((HAL_GetTick() - tickstart ) > RTC_TIMEOUT_VALUE)
<>	144:ef7eb2e8f9f7	1494	{
<>	144:ef7eb2e8f9f7	1495	return HAL_TIMEOUT;
<>	144:ef7eb2e8f9f7	1496	}
<>	144:ef7eb2e8f9f7	1497	}
<>	144:ef7eb2e8f9f7	1498	}
<>	144:ef7eb2e8f9f7	1499
<>	144:ef7eb2e8f9f7	1500	return HAL_OK;
<>	144:ef7eb2e8f9f7	1501	}
<>	144:ef7eb2e8f9f7	1502
<>	144:ef7eb2e8f9f7	1503
<>	144:ef7eb2e8f9f7	1504	/**
<>	144:ef7eb2e8f9f7	1505	* @brief Converts a 2 digit decimal to BCD format.
<>	144:ef7eb2e8f9f7	1506	* @param Value: Byte to be converted
<>	144:ef7eb2e8f9f7	1507	* @retval Converted byte
<>	144:ef7eb2e8f9f7	1508	*/
<>	144:ef7eb2e8f9f7	1509	uint8_t RTC_ByteToBcd2(uint8_t Value)
<>	144:ef7eb2e8f9f7	1510	{
<>	144:ef7eb2e8f9f7	1511	uint32_t bcdhigh = 0U;
<>	144:ef7eb2e8f9f7	1512
<>	144:ef7eb2e8f9f7	1513	while(Value >= 10U)
<>	144:ef7eb2e8f9f7	1514	{
<>	144:ef7eb2e8f9f7	1515	bcdhigh++;
<>	144:ef7eb2e8f9f7	1516	Value -= 10U;
<>	144:ef7eb2e8f9f7	1517	}
<>	144:ef7eb2e8f9f7	1518
<>	144:ef7eb2e8f9f7	1519	return ((uint8_t)(bcdhigh << 4U) \| Value);
<>	144:ef7eb2e8f9f7	1520	}
<>	144:ef7eb2e8f9f7	1521
<>	144:ef7eb2e8f9f7	1522	/**
<>	144:ef7eb2e8f9f7	1523	* @brief Converts from 2 digit BCD to Binary.
<>	144:ef7eb2e8f9f7	1524	* @param Value: BCD value to be converted
<>	144:ef7eb2e8f9f7	1525	* @retval Converted word
<>	144:ef7eb2e8f9f7	1526	*/
<>	144:ef7eb2e8f9f7	1527	uint8_t RTC_Bcd2ToByte(uint8_t Value)
<>	144:ef7eb2e8f9f7	1528	{
<>	144:ef7eb2e8f9f7	1529	uint32_t tmp = 0U;
AnnaBridge	167:e84263d55307	1530	tmp = ((uint8_t)(Value & (uint8_t)0xF0) >> (uint8_t)0x4) * 10;
AnnaBridge	167:e84263d55307	1531	return (tmp + (Value & (uint8_t)0x0F));
<>	144:ef7eb2e8f9f7	1532	}
<>	144:ef7eb2e8f9f7	1533
<>	144:ef7eb2e8f9f7	1534	/**
<>	144:ef7eb2e8f9f7	1535	* @}
<>	144:ef7eb2e8f9f7	1536	*/
<>	144:ef7eb2e8f9f7	1537
<>	144:ef7eb2e8f9f7	1538	#endif /* HAL_RTC_MODULE_ENABLED */
<>	144:ef7eb2e8f9f7	1539	/**
<>	144:ef7eb2e8f9f7	1540	* @}
<>	144:ef7eb2e8f9f7	1541	*/
<>	144:ef7eb2e8f9f7	1542
<>	144:ef7eb2e8f9f7	1543	/**
<>	144:ef7eb2e8f9f7	1544	* @}
<>	144:ef7eb2e8f9f7	1545	*/
<>	144:ef7eb2e8f9f7	1546
<>	144:ef7eb2e8f9f7	1547	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/

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Type:	Library
Created:	15 Dec 2017
Imports:	11
Forks:	0
Commits:	183
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