Felipe Velazquez / SMARTES_lib

SMARTEST lib for MPS2

Dependents:   MSP2_LCD_HOLA

core_cmFunc.h@0:f1a413971403, 2018-08-23 (annotated)

Committer:
FelipeVR
Date:
Thu Aug 23 13:39:38 2018 +0000
Revision:
0:f1a413971403
SMARTEST LCD

Who changed what in which revision?

UserRevisionLine numberNew contents of line
FelipeVR 0:f1a413971403 1 /**************************************************************************//**
FelipeVR 0:f1a413971403 2 * @file core_cmFunc.h
FelipeVR 0:f1a413971403 3 * @brief CMSIS Cortex-M Core Function Access Header File
FelipeVR 0:f1a413971403 4 * @version V3.20
FelipeVR 0:f1a413971403 5 * @date 25. February 2013
FelipeVR 0:f1a413971403 6 *
FelipeVR 0:f1a413971403 7 * @note
FelipeVR 0:f1a413971403 8 *
FelipeVR 0:f1a413971403 9 ******************************************************************************/
FelipeVR 0:f1a413971403 10 /* Copyright (c) 2009-2013 ARM LIMITED
FelipeVR 0:f1a413971403 11
FelipeVR 0:f1a413971403 12 All rights reserved.
FelipeVR 0:f1a413971403 13 Redistribution and use in source and binary forms, with or without
FelipeVR 0:f1a413971403 14 modification, are permitted provided that the following conditions are met:
FelipeVR 0:f1a413971403 15 - Redistributions of source code must retain the above copyright
FelipeVR 0:f1a413971403 16 notice, this list of conditions and the following disclaimer.
FelipeVR 0:f1a413971403 17 - Redistributions in binary form must reproduce the above copyright
FelipeVR 0:f1a413971403 18 notice, this list of conditions and the following disclaimer in the
FelipeVR 0:f1a413971403 19 documentation and/or other materials provided with the distribution.
FelipeVR 0:f1a413971403 20 - Neither the name of ARM nor the names of its contributors may be used
FelipeVR 0:f1a413971403 21 to endorse or promote products derived from this software without
FelipeVR 0:f1a413971403 22 specific prior written permission.
FelipeVR 0:f1a413971403 23 *
FelipeVR 0:f1a413971403 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
FelipeVR 0:f1a413971403 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
FelipeVR 0:f1a413971403 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
FelipeVR 0:f1a413971403 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
FelipeVR 0:f1a413971403 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
FelipeVR 0:f1a413971403 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
FelipeVR 0:f1a413971403 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
FelipeVR 0:f1a413971403 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
FelipeVR 0:f1a413971403 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
FelipeVR 0:f1a413971403 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
FelipeVR 0:f1a413971403 34 POSSIBILITY OF SUCH DAMAGE.
FelipeVR 0:f1a413971403 35 ---------------------------------------------------------------------------*/
FelipeVR 0:f1a413971403 36
FelipeVR 0:f1a413971403 37
FelipeVR 0:f1a413971403 38 #ifndef __CORE_CMFUNC_H
FelipeVR 0:f1a413971403 39 #define __CORE_CMFUNC_H
FelipeVR 0:f1a413971403 40
FelipeVR 0:f1a413971403 41
FelipeVR 0:f1a413971403 42 /* ########################### Core Function Access ########################### */
FelipeVR 0:f1a413971403 43 /** \ingroup CMSIS_Core_FunctionInterface
FelipeVR 0:f1a413971403 44 \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
FelipeVR 0:f1a413971403 45 @{
FelipeVR 0:f1a413971403 46 */
FelipeVR 0:f1a413971403 47
FelipeVR 0:f1a413971403 48 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
FelipeVR 0:f1a413971403 49 /* ARM armcc specific functions */
FelipeVR 0:f1a413971403 50
FelipeVR 0:f1a413971403 51 #if (__ARMCC_VERSION < 400677)
FelipeVR 0:f1a413971403 52 #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
FelipeVR 0:f1a413971403 53 #endif
FelipeVR 0:f1a413971403 54
FelipeVR 0:f1a413971403 55 /* intrinsic void __enable_irq(); */
FelipeVR 0:f1a413971403 56 /* intrinsic void __disable_irq(); */
FelipeVR 0:f1a413971403 57
FelipeVR 0:f1a413971403 58 /** \brief Get Control Register
FelipeVR 0:f1a413971403 59
FelipeVR 0:f1a413971403 60 This function returns the content of the Control Register.
FelipeVR 0:f1a413971403 61
FelipeVR 0:f1a413971403 62 \return Control Register value
FelipeVR 0:f1a413971403 63 */
FelipeVR 0:f1a413971403 64 __STATIC_INLINE uint32_t __get_CONTROL(void)
FelipeVR 0:f1a413971403 65 {
FelipeVR 0:f1a413971403 66 register uint32_t __regControl __ASM("control");
FelipeVR 0:f1a413971403 67 return(__regControl);
FelipeVR 0:f1a413971403 68 }
FelipeVR 0:f1a413971403 69
FelipeVR 0:f1a413971403 70
FelipeVR 0:f1a413971403 71 /** \brief Set Control Register
FelipeVR 0:f1a413971403 72
FelipeVR 0:f1a413971403 73 This function writes the given value to the Control Register.
FelipeVR 0:f1a413971403 74
FelipeVR 0:f1a413971403 75 \param [in] control Control Register value to set
FelipeVR 0:f1a413971403 76 */
FelipeVR 0:f1a413971403 77 __STATIC_INLINE void __set_CONTROL(uint32_t control)
FelipeVR 0:f1a413971403 78 {
FelipeVR 0:f1a413971403 79 register uint32_t __regControl __ASM("control");
FelipeVR 0:f1a413971403 80 __regControl = control;
FelipeVR 0:f1a413971403 81 }
FelipeVR 0:f1a413971403 82
FelipeVR 0:f1a413971403 83
FelipeVR 0:f1a413971403 84 /** \brief Get IPSR Register
FelipeVR 0:f1a413971403 85
FelipeVR 0:f1a413971403 86 This function returns the content of the IPSR Register.
FelipeVR 0:f1a413971403 87
FelipeVR 0:f1a413971403 88 \return IPSR Register value
FelipeVR 0:f1a413971403 89 */
FelipeVR 0:f1a413971403 90 __STATIC_INLINE uint32_t __get_IPSR(void)
FelipeVR 0:f1a413971403 91 {
FelipeVR 0:f1a413971403 92 register uint32_t __regIPSR __ASM("ipsr");
FelipeVR 0:f1a413971403 93 return(__regIPSR);
FelipeVR 0:f1a413971403 94 }
FelipeVR 0:f1a413971403 95
FelipeVR 0:f1a413971403 96
FelipeVR 0:f1a413971403 97 /** \brief Get APSR Register
FelipeVR 0:f1a413971403 98
FelipeVR 0:f1a413971403 99 This function returns the content of the APSR Register.
FelipeVR 0:f1a413971403 100
FelipeVR 0:f1a413971403 101 \return APSR Register value
FelipeVR 0:f1a413971403 102 */
FelipeVR 0:f1a413971403 103 __STATIC_INLINE uint32_t __get_APSR(void)
FelipeVR 0:f1a413971403 104 {
FelipeVR 0:f1a413971403 105 register uint32_t __regAPSR __ASM("apsr");
FelipeVR 0:f1a413971403 106 return(__regAPSR);
FelipeVR 0:f1a413971403 107 }
FelipeVR 0:f1a413971403 108
FelipeVR 0:f1a413971403 109
FelipeVR 0:f1a413971403 110 /** \brief Get xPSR Register
FelipeVR 0:f1a413971403 111
FelipeVR 0:f1a413971403 112 This function returns the content of the xPSR Register.
FelipeVR 0:f1a413971403 113
FelipeVR 0:f1a413971403 114 \return xPSR Register value
FelipeVR 0:f1a413971403 115 */
FelipeVR 0:f1a413971403 116 __STATIC_INLINE uint32_t __get_xPSR(void)
FelipeVR 0:f1a413971403 117 {
FelipeVR 0:f1a413971403 118 register uint32_t __regXPSR __ASM("xpsr");
FelipeVR 0:f1a413971403 119 return(__regXPSR);
FelipeVR 0:f1a413971403 120 }
FelipeVR 0:f1a413971403 121
FelipeVR 0:f1a413971403 122
FelipeVR 0:f1a413971403 123 /** \brief Get Process Stack Pointer
FelipeVR 0:f1a413971403 124
FelipeVR 0:f1a413971403 125 This function returns the current value of the Process Stack Pointer (PSP).
FelipeVR 0:f1a413971403 126
FelipeVR 0:f1a413971403 127 \return PSP Register value
FelipeVR 0:f1a413971403 128 */
FelipeVR 0:f1a413971403 129 __STATIC_INLINE uint32_t __get_PSP(void)
FelipeVR 0:f1a413971403 130 {
FelipeVR 0:f1a413971403 131 register uint32_t __regProcessStackPointer __ASM("psp");
FelipeVR 0:f1a413971403 132 return(__regProcessStackPointer);
FelipeVR 0:f1a413971403 133 }
FelipeVR 0:f1a413971403 134
FelipeVR 0:f1a413971403 135
FelipeVR 0:f1a413971403 136 /** \brief Set Process Stack Pointer
FelipeVR 0:f1a413971403 137
FelipeVR 0:f1a413971403 138 This function assigns the given value to the Process Stack Pointer (PSP).
FelipeVR 0:f1a413971403 139
FelipeVR 0:f1a413971403 140 \param [in] topOfProcStack Process Stack Pointer value to set
FelipeVR 0:f1a413971403 141 */
FelipeVR 0:f1a413971403 142 __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
FelipeVR 0:f1a413971403 143 {
FelipeVR 0:f1a413971403 144 register uint32_t __regProcessStackPointer __ASM("psp");
FelipeVR 0:f1a413971403 145 __regProcessStackPointer = topOfProcStack;
FelipeVR 0:f1a413971403 146 }
FelipeVR 0:f1a413971403 147
FelipeVR 0:f1a413971403 148
FelipeVR 0:f1a413971403 149 /** \brief Get Main Stack Pointer
FelipeVR 0:f1a413971403 150
FelipeVR 0:f1a413971403 151 This function returns the current value of the Main Stack Pointer (MSP).
FelipeVR 0:f1a413971403 152
FelipeVR 0:f1a413971403 153 \return MSP Register value
FelipeVR 0:f1a413971403 154 */
FelipeVR 0:f1a413971403 155 __STATIC_INLINE uint32_t __get_MSP(void)
FelipeVR 0:f1a413971403 156 {
FelipeVR 0:f1a413971403 157 register uint32_t __regMainStackPointer __ASM("msp");
FelipeVR 0:f1a413971403 158 return(__regMainStackPointer);
FelipeVR 0:f1a413971403 159 }
FelipeVR 0:f1a413971403 160
FelipeVR 0:f1a413971403 161
FelipeVR 0:f1a413971403 162 /** \brief Set Main Stack Pointer
FelipeVR 0:f1a413971403 163
FelipeVR 0:f1a413971403 164 This function assigns the given value to the Main Stack Pointer (MSP).
FelipeVR 0:f1a413971403 165
FelipeVR 0:f1a413971403 166 \param [in] topOfMainStack Main Stack Pointer value to set
FelipeVR 0:f1a413971403 167 */
FelipeVR 0:f1a413971403 168 __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
FelipeVR 0:f1a413971403 169 {
FelipeVR 0:f1a413971403 170 register uint32_t __regMainStackPointer __ASM("msp");
FelipeVR 0:f1a413971403 171 __regMainStackPointer = topOfMainStack;
FelipeVR 0:f1a413971403 172 }
FelipeVR 0:f1a413971403 173
FelipeVR 0:f1a413971403 174
FelipeVR 0:f1a413971403 175 /** \brief Get Priority Mask
FelipeVR 0:f1a413971403 176
FelipeVR 0:f1a413971403 177 This function returns the current state of the priority mask bit from the Priority Mask Register.
FelipeVR 0:f1a413971403 178
FelipeVR 0:f1a413971403 179 \return Priority Mask value
FelipeVR 0:f1a413971403 180 */
FelipeVR 0:f1a413971403 181 __STATIC_INLINE uint32_t __get_PRIMASK(void)
FelipeVR 0:f1a413971403 182 {
FelipeVR 0:f1a413971403 183 register uint32_t __regPriMask __ASM("primask");
FelipeVR 0:f1a413971403 184 return(__regPriMask);
FelipeVR 0:f1a413971403 185 }
FelipeVR 0:f1a413971403 186
FelipeVR 0:f1a413971403 187
FelipeVR 0:f1a413971403 188 /** \brief Set Priority Mask
FelipeVR 0:f1a413971403 189
FelipeVR 0:f1a413971403 190 This function assigns the given value to the Priority Mask Register.
FelipeVR 0:f1a413971403 191
FelipeVR 0:f1a413971403 192 \param [in] priMask Priority Mask
FelipeVR 0:f1a413971403 193 */
FelipeVR 0:f1a413971403 194 __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
FelipeVR 0:f1a413971403 195 {
FelipeVR 0:f1a413971403 196 register uint32_t __regPriMask __ASM("primask");
FelipeVR 0:f1a413971403 197 __regPriMask = (priMask);
FelipeVR 0:f1a413971403 198 }
FelipeVR 0:f1a413971403 199
FelipeVR 0:f1a413971403 200
FelipeVR 0:f1a413971403 201 #if (__CORTEX_M >= 0x03)
FelipeVR 0:f1a413971403 202
FelipeVR 0:f1a413971403 203 /** \brief Enable FIQ
FelipeVR 0:f1a413971403 204
FelipeVR 0:f1a413971403 205 This function enables FIQ interrupts by clearing the F-bit in the CPSR.
FelipeVR 0:f1a413971403 206 Can only be executed in Privileged modes.
FelipeVR 0:f1a413971403 207 */
FelipeVR 0:f1a413971403 208 #define __enable_fault_irq __enable_fiq
FelipeVR 0:f1a413971403 209
FelipeVR 0:f1a413971403 210
FelipeVR 0:f1a413971403 211 /** \brief Disable FIQ
FelipeVR 0:f1a413971403 212
FelipeVR 0:f1a413971403 213 This function disables FIQ interrupts by setting the F-bit in the CPSR.
FelipeVR 0:f1a413971403 214 Can only be executed in Privileged modes.
FelipeVR 0:f1a413971403 215 */
FelipeVR 0:f1a413971403 216 #define __disable_fault_irq __disable_fiq
FelipeVR 0:f1a413971403 217
FelipeVR 0:f1a413971403 218
FelipeVR 0:f1a413971403 219 /** \brief Get Base Priority
FelipeVR 0:f1a413971403 220
FelipeVR 0:f1a413971403 221 This function returns the current value of the Base Priority register.
FelipeVR 0:f1a413971403 222
FelipeVR 0:f1a413971403 223 \return Base Priority register value
FelipeVR 0:f1a413971403 224 */
FelipeVR 0:f1a413971403 225 __STATIC_INLINE uint32_t __get_BASEPRI(void)
FelipeVR 0:f1a413971403 226 {
FelipeVR 0:f1a413971403 227 register uint32_t __regBasePri __ASM("basepri");
FelipeVR 0:f1a413971403 228 return(__regBasePri);
FelipeVR 0:f1a413971403 229 }
FelipeVR 0:f1a413971403 230
FelipeVR 0:f1a413971403 231
FelipeVR 0:f1a413971403 232 /** \brief Set Base Priority
FelipeVR 0:f1a413971403 233
FelipeVR 0:f1a413971403 234 This function assigns the given value to the Base Priority register.
FelipeVR 0:f1a413971403 235
FelipeVR 0:f1a413971403 236 \param [in] basePri Base Priority value to set
FelipeVR 0:f1a413971403 237 */
FelipeVR 0:f1a413971403 238 __STATIC_INLINE void __set_BASEPRI(uint32_t basePri)
FelipeVR 0:f1a413971403 239 {
FelipeVR 0:f1a413971403 240 register uint32_t __regBasePri __ASM("basepri");
FelipeVR 0:f1a413971403 241 __regBasePri = (basePri & 0xff);
FelipeVR 0:f1a413971403 242 }
FelipeVR 0:f1a413971403 243
FelipeVR 0:f1a413971403 244
FelipeVR 0:f1a413971403 245 /** \brief Get Fault Mask
FelipeVR 0:f1a413971403 246
FelipeVR 0:f1a413971403 247 This function returns the current value of the Fault Mask register.
FelipeVR 0:f1a413971403 248
FelipeVR 0:f1a413971403 249 \return Fault Mask register value
FelipeVR 0:f1a413971403 250 */
FelipeVR 0:f1a413971403 251 __STATIC_INLINE uint32_t __get_FAULTMASK(void)
FelipeVR 0:f1a413971403 252 {
FelipeVR 0:f1a413971403 253 register uint32_t __regFaultMask __ASM("faultmask");
FelipeVR 0:f1a413971403 254 return(__regFaultMask);
FelipeVR 0:f1a413971403 255 }
FelipeVR 0:f1a413971403 256
FelipeVR 0:f1a413971403 257
FelipeVR 0:f1a413971403 258 /** \brief Set Fault Mask
FelipeVR 0:f1a413971403 259
FelipeVR 0:f1a413971403 260 This function assigns the given value to the Fault Mask register.
FelipeVR 0:f1a413971403 261
FelipeVR 0:f1a413971403 262 \param [in] faultMask Fault Mask value to set
FelipeVR 0:f1a413971403 263 */
FelipeVR 0:f1a413971403 264 __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
FelipeVR 0:f1a413971403 265 {
FelipeVR 0:f1a413971403 266 register uint32_t __regFaultMask __ASM("faultmask");
FelipeVR 0:f1a413971403 267 __regFaultMask = (faultMask & (uint32_t)1);
FelipeVR 0:f1a413971403 268 }
FelipeVR 0:f1a413971403 269
FelipeVR 0:f1a413971403 270 #endif /* (__CORTEX_M >= 0x03) */
FelipeVR 0:f1a413971403 271
FelipeVR 0:f1a413971403 272
FelipeVR 0:f1a413971403 273 #if (__CORTEX_M == 0x04)
FelipeVR 0:f1a413971403 274
FelipeVR 0:f1a413971403 275 /** \brief Get FPSCR
FelipeVR 0:f1a413971403 276
FelipeVR 0:f1a413971403 277 This function returns the current value of the Floating Point Status/Control register.
FelipeVR 0:f1a413971403 278
FelipeVR 0:f1a413971403 279 \return Floating Point Status/Control register value
FelipeVR 0:f1a413971403 280 */
FelipeVR 0:f1a413971403 281 __STATIC_INLINE uint32_t __get_FPSCR(void)
FelipeVR 0:f1a413971403 282 {
FelipeVR 0:f1a413971403 283 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
FelipeVR 0:f1a413971403 284 register uint32_t __regfpscr __ASM("fpscr");
FelipeVR 0:f1a413971403 285 return(__regfpscr);
FelipeVR 0:f1a413971403 286 #else
FelipeVR 0:f1a413971403 287 return(0);
FelipeVR 0:f1a413971403 288 #endif
FelipeVR 0:f1a413971403 289 }
FelipeVR 0:f1a413971403 290
FelipeVR 0:f1a413971403 291
FelipeVR 0:f1a413971403 292 /** \brief Set FPSCR
FelipeVR 0:f1a413971403 293
FelipeVR 0:f1a413971403 294 This function assigns the given value to the Floating Point Status/Control register.
FelipeVR 0:f1a413971403 295
FelipeVR 0:f1a413971403 296 \param [in] fpscr Floating Point Status/Control value to set
FelipeVR 0:f1a413971403 297 */
FelipeVR 0:f1a413971403 298 __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
FelipeVR 0:f1a413971403 299 {
FelipeVR 0:f1a413971403 300 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
FelipeVR 0:f1a413971403 301 register uint32_t __regfpscr __ASM("fpscr");
FelipeVR 0:f1a413971403 302 __regfpscr = (fpscr);
FelipeVR 0:f1a413971403 303 #endif
FelipeVR 0:f1a413971403 304 }
FelipeVR 0:f1a413971403 305
FelipeVR 0:f1a413971403 306 #endif /* (__CORTEX_M == 0x04) */
FelipeVR 0:f1a413971403 307
FelipeVR 0:f1a413971403 308
FelipeVR 0:f1a413971403 309 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
FelipeVR 0:f1a413971403 310 /* IAR iccarm specific functions */
FelipeVR 0:f1a413971403 311
FelipeVR 0:f1a413971403 312 #include <cmsis_iar.h>
FelipeVR 0:f1a413971403 313
FelipeVR 0:f1a413971403 314
FelipeVR 0:f1a413971403 315 #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
FelipeVR 0:f1a413971403 316 /* TI CCS specific functions */
FelipeVR 0:f1a413971403 317
FelipeVR 0:f1a413971403 318 #include <cmsis_ccs.h>
FelipeVR 0:f1a413971403 319
FelipeVR 0:f1a413971403 320
FelipeVR 0:f1a413971403 321 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
FelipeVR 0:f1a413971403 322 /* GNU gcc specific functions */
FelipeVR 0:f1a413971403 323
FelipeVR 0:f1a413971403 324 /** \brief Enable IRQ Interrupts
FelipeVR 0:f1a413971403 325
FelipeVR 0:f1a413971403 326 This function enables IRQ interrupts by clearing the I-bit in the CPSR.
FelipeVR 0:f1a413971403 327 Can only be executed in Privileged modes.
FelipeVR 0:f1a413971403 328 */
FelipeVR 0:f1a413971403 329 __attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_irq(void)
FelipeVR 0:f1a413971403 330 {
FelipeVR 0:f1a413971403 331 __ASM volatile ("cpsie i" : : : "memory");
FelipeVR 0:f1a413971403 332 }
FelipeVR 0:f1a413971403 333
FelipeVR 0:f1a413971403 334
FelipeVR 0:f1a413971403 335 /** \brief Disable IRQ Interrupts
FelipeVR 0:f1a413971403 336
FelipeVR 0:f1a413971403 337 This function disables IRQ interrupts by setting the I-bit in the CPSR.
FelipeVR 0:f1a413971403 338 Can only be executed in Privileged modes.
FelipeVR 0:f1a413971403 339 */
FelipeVR 0:f1a413971403 340 __attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_irq(void)
FelipeVR 0:f1a413971403 341 {
FelipeVR 0:f1a413971403 342 __ASM volatile ("cpsid i" : : : "memory");
FelipeVR 0:f1a413971403 343 }
FelipeVR 0:f1a413971403 344
FelipeVR 0:f1a413971403 345
FelipeVR 0:f1a413971403 346 /** \brief Get Control Register
FelipeVR 0:f1a413971403 347
FelipeVR 0:f1a413971403 348 This function returns the content of the Control Register.
FelipeVR 0:f1a413971403 349
FelipeVR 0:f1a413971403 350 \return Control Register value
FelipeVR 0:f1a413971403 351 */
FelipeVR 0:f1a413971403 352 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_CONTROL(void)
FelipeVR 0:f1a413971403 353 {
FelipeVR 0:f1a413971403 354 uint32_t result;
FelipeVR 0:f1a413971403 355
FelipeVR 0:f1a413971403 356 __ASM volatile ("MRS %0, control" : "=r" (result) );
FelipeVR 0:f1a413971403 357 return(result);
FelipeVR 0:f1a413971403 358 }
FelipeVR 0:f1a413971403 359
FelipeVR 0:f1a413971403 360
FelipeVR 0:f1a413971403 361 /** \brief Set Control Register
FelipeVR 0:f1a413971403 362
FelipeVR 0:f1a413971403 363 This function writes the given value to the Control Register.
FelipeVR 0:f1a413971403 364
FelipeVR 0:f1a413971403 365 \param [in] control Control Register value to set
FelipeVR 0:f1a413971403 366 */
FelipeVR 0:f1a413971403 367 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_CONTROL(uint32_t control)
FelipeVR 0:f1a413971403 368 {
FelipeVR 0:f1a413971403 369 __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
FelipeVR 0:f1a413971403 370 }
FelipeVR 0:f1a413971403 371
FelipeVR 0:f1a413971403 372
FelipeVR 0:f1a413971403 373 /** \brief Get IPSR Register
FelipeVR 0:f1a413971403 374
FelipeVR 0:f1a413971403 375 This function returns the content of the IPSR Register.
FelipeVR 0:f1a413971403 376
FelipeVR 0:f1a413971403 377 \return IPSR Register value
FelipeVR 0:f1a413971403 378 */
FelipeVR 0:f1a413971403 379 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_IPSR(void)
FelipeVR 0:f1a413971403 380 {
FelipeVR 0:f1a413971403 381 uint32_t result;
FelipeVR 0:f1a413971403 382
FelipeVR 0:f1a413971403 383 __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
FelipeVR 0:f1a413971403 384 return(result);
FelipeVR 0:f1a413971403 385 }
FelipeVR 0:f1a413971403 386
FelipeVR 0:f1a413971403 387
FelipeVR 0:f1a413971403 388 /** \brief Get APSR Register
FelipeVR 0:f1a413971403 389
FelipeVR 0:f1a413971403 390 This function returns the content of the APSR Register.
FelipeVR 0:f1a413971403 391
FelipeVR 0:f1a413971403 392 \return APSR Register value
FelipeVR 0:f1a413971403 393 */
FelipeVR 0:f1a413971403 394 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_APSR(void)
FelipeVR 0:f1a413971403 395 {
FelipeVR 0:f1a413971403 396 uint32_t result;
FelipeVR 0:f1a413971403 397
FelipeVR 0:f1a413971403 398 __ASM volatile ("MRS %0, apsr" : "=r" (result) );
FelipeVR 0:f1a413971403 399 return(result);
FelipeVR 0:f1a413971403 400 }
FelipeVR 0:f1a413971403 401
FelipeVR 0:f1a413971403 402
FelipeVR 0:f1a413971403 403 /** \brief Get xPSR Register
FelipeVR 0:f1a413971403 404
FelipeVR 0:f1a413971403 405 This function returns the content of the xPSR Register.
FelipeVR 0:f1a413971403 406
FelipeVR 0:f1a413971403 407 \return xPSR Register value
FelipeVR 0:f1a413971403 408 */
FelipeVR 0:f1a413971403 409 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_xPSR(void)
FelipeVR 0:f1a413971403 410 {
FelipeVR 0:f1a413971403 411 uint32_t result;
FelipeVR 0:f1a413971403 412
FelipeVR 0:f1a413971403 413 __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
FelipeVR 0:f1a413971403 414 return(result);
FelipeVR 0:f1a413971403 415 }
FelipeVR 0:f1a413971403 416
FelipeVR 0:f1a413971403 417
FelipeVR 0:f1a413971403 418 /** \brief Get Process Stack Pointer
FelipeVR 0:f1a413971403 419
FelipeVR 0:f1a413971403 420 This function returns the current value of the Process Stack Pointer (PSP).
FelipeVR 0:f1a413971403 421
FelipeVR 0:f1a413971403 422 \return PSP Register value
FelipeVR 0:f1a413971403 423 */
FelipeVR 0:f1a413971403 424 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PSP(void)
FelipeVR 0:f1a413971403 425 {
FelipeVR 0:f1a413971403 426 register uint32_t result;
FelipeVR 0:f1a413971403 427
FelipeVR 0:f1a413971403 428 __ASM volatile ("MRS %0, psp\n" : "=r" (result) );
FelipeVR 0:f1a413971403 429 return(result);
FelipeVR 0:f1a413971403 430 }
FelipeVR 0:f1a413971403 431
FelipeVR 0:f1a413971403 432
FelipeVR 0:f1a413971403 433 /** \brief Set Process Stack Pointer
FelipeVR 0:f1a413971403 434
FelipeVR 0:f1a413971403 435 This function assigns the given value to the Process Stack Pointer (PSP).
FelipeVR 0:f1a413971403 436
FelipeVR 0:f1a413971403 437 \param [in] topOfProcStack Process Stack Pointer value to set
FelipeVR 0:f1a413971403 438 */
FelipeVR 0:f1a413971403 439 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
FelipeVR 0:f1a413971403 440 {
FelipeVR 0:f1a413971403 441 __ASM volatile ("MSR psp, %0\n" : : "r" (topOfProcStack) : "sp");
FelipeVR 0:f1a413971403 442 }
FelipeVR 0:f1a413971403 443
FelipeVR 0:f1a413971403 444
FelipeVR 0:f1a413971403 445 /** \brief Get Main Stack Pointer
FelipeVR 0:f1a413971403 446
FelipeVR 0:f1a413971403 447 This function returns the current value of the Main Stack Pointer (MSP).
FelipeVR 0:f1a413971403 448
FelipeVR 0:f1a413971403 449 \return MSP Register value
FelipeVR 0:f1a413971403 450 */
FelipeVR 0:f1a413971403 451 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_MSP(void)
FelipeVR 0:f1a413971403 452 {
FelipeVR 0:f1a413971403 453 register uint32_t result;
FelipeVR 0:f1a413971403 454
FelipeVR 0:f1a413971403 455 __ASM volatile ("MRS %0, msp\n" : "=r" (result) );
FelipeVR 0:f1a413971403 456 return(result);
FelipeVR 0:f1a413971403 457 }
FelipeVR 0:f1a413971403 458
FelipeVR 0:f1a413971403 459
FelipeVR 0:f1a413971403 460 /** \brief Set Main Stack Pointer
FelipeVR 0:f1a413971403 461
FelipeVR 0:f1a413971403 462 This function assigns the given value to the Main Stack Pointer (MSP).
FelipeVR 0:f1a413971403 463
FelipeVR 0:f1a413971403 464 \param [in] topOfMainStack Main Stack Pointer value to set
FelipeVR 0:f1a413971403 465 */
FelipeVR 0:f1a413971403 466 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
FelipeVR 0:f1a413971403 467 {
FelipeVR 0:f1a413971403 468 __ASM volatile ("MSR msp, %0\n" : : "r" (topOfMainStack) : "sp");
FelipeVR 0:f1a413971403 469 }
FelipeVR 0:f1a413971403 470
FelipeVR 0:f1a413971403 471
FelipeVR 0:f1a413971403 472 /** \brief Get Priority Mask
FelipeVR 0:f1a413971403 473
FelipeVR 0:f1a413971403 474 This function returns the current state of the priority mask bit from the Priority Mask Register.
FelipeVR 0:f1a413971403 475
FelipeVR 0:f1a413971403 476 \return Priority Mask value
FelipeVR 0:f1a413971403 477 */
FelipeVR 0:f1a413971403 478 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PRIMASK(void)
FelipeVR 0:f1a413971403 479 {
FelipeVR 0:f1a413971403 480 uint32_t result;
FelipeVR 0:f1a413971403 481
FelipeVR 0:f1a413971403 482 __ASM volatile ("MRS %0, primask" : "=r" (result) );
FelipeVR 0:f1a413971403 483 return(result);
FelipeVR 0:f1a413971403 484 }
FelipeVR 0:f1a413971403 485
FelipeVR 0:f1a413971403 486
FelipeVR 0:f1a413971403 487 /** \brief Set Priority Mask
FelipeVR 0:f1a413971403 488
FelipeVR 0:f1a413971403 489 This function assigns the given value to the Priority Mask Register.
FelipeVR 0:f1a413971403 490
FelipeVR 0:f1a413971403 491 \param [in] priMask Priority Mask
FelipeVR 0:f1a413971403 492 */
FelipeVR 0:f1a413971403 493 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
FelipeVR 0:f1a413971403 494 {
FelipeVR 0:f1a413971403 495 __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
FelipeVR 0:f1a413971403 496 }
FelipeVR 0:f1a413971403 497
FelipeVR 0:f1a413971403 498
FelipeVR 0:f1a413971403 499 #if (__CORTEX_M >= 0x03)
FelipeVR 0:f1a413971403 500
FelipeVR 0:f1a413971403 501 /** \brief Enable FIQ
FelipeVR 0:f1a413971403 502
FelipeVR 0:f1a413971403 503 This function enables FIQ interrupts by clearing the F-bit in the CPSR.
FelipeVR 0:f1a413971403 504 Can only be executed in Privileged modes.
FelipeVR 0:f1a413971403 505 */
FelipeVR 0:f1a413971403 506 __attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_fault_irq(void)
FelipeVR 0:f1a413971403 507 {
FelipeVR 0:f1a413971403 508 __ASM volatile ("cpsie f" : : : "memory");
FelipeVR 0:f1a413971403 509 }
FelipeVR 0:f1a413971403 510
FelipeVR 0:f1a413971403 511
FelipeVR 0:f1a413971403 512 /** \brief Disable FIQ
FelipeVR 0:f1a413971403 513
FelipeVR 0:f1a413971403 514 This function disables FIQ interrupts by setting the F-bit in the CPSR.
FelipeVR 0:f1a413971403 515 Can only be executed in Privileged modes.
FelipeVR 0:f1a413971403 516 */
FelipeVR 0:f1a413971403 517 __attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_fault_irq(void)
FelipeVR 0:f1a413971403 518 {
FelipeVR 0:f1a413971403 519 __ASM volatile ("cpsid f" : : : "memory");
FelipeVR 0:f1a413971403 520 }
FelipeVR 0:f1a413971403 521
FelipeVR 0:f1a413971403 522
FelipeVR 0:f1a413971403 523 /** \brief Get Base Priority
FelipeVR 0:f1a413971403 524
FelipeVR 0:f1a413971403 525 This function returns the current value of the Base Priority register.
FelipeVR 0:f1a413971403 526
FelipeVR 0:f1a413971403 527 \return Base Priority register value
FelipeVR 0:f1a413971403 528 */
FelipeVR 0:f1a413971403 529 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_BASEPRI(void)
FelipeVR 0:f1a413971403 530 {
FelipeVR 0:f1a413971403 531 uint32_t result;
FelipeVR 0:f1a413971403 532
FelipeVR 0:f1a413971403 533 __ASM volatile ("MRS %0, basepri_max" : "=r" (result) );
FelipeVR 0:f1a413971403 534 return(result);
FelipeVR 0:f1a413971403 535 }
FelipeVR 0:f1a413971403 536
FelipeVR 0:f1a413971403 537
FelipeVR 0:f1a413971403 538 /** \brief Set Base Priority
FelipeVR 0:f1a413971403 539
FelipeVR 0:f1a413971403 540 This function assigns the given value to the Base Priority register.
FelipeVR 0:f1a413971403 541
FelipeVR 0:f1a413971403 542 \param [in] basePri Base Priority value to set
FelipeVR 0:f1a413971403 543 */
FelipeVR 0:f1a413971403 544 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI(uint32_t value)
FelipeVR 0:f1a413971403 545 {
FelipeVR 0:f1a413971403 546 __ASM volatile ("MSR basepri, %0" : : "r" (value) : "memory");
FelipeVR 0:f1a413971403 547 }
FelipeVR 0:f1a413971403 548
FelipeVR 0:f1a413971403 549
FelipeVR 0:f1a413971403 550 /** \brief Get Fault Mask
FelipeVR 0:f1a413971403 551
FelipeVR 0:f1a413971403 552 This function returns the current value of the Fault Mask register.
FelipeVR 0:f1a413971403 553
FelipeVR 0:f1a413971403 554 \return Fault Mask register value
FelipeVR 0:f1a413971403 555 */
FelipeVR 0:f1a413971403 556 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FAULTMASK(void)
FelipeVR 0:f1a413971403 557 {
FelipeVR 0:f1a413971403 558 uint32_t result;
FelipeVR 0:f1a413971403 559
FelipeVR 0:f1a413971403 560 __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
FelipeVR 0:f1a413971403 561 return(result);
FelipeVR 0:f1a413971403 562 }
FelipeVR 0:f1a413971403 563
FelipeVR 0:f1a413971403 564
FelipeVR 0:f1a413971403 565 /** \brief Set Fault Mask
FelipeVR 0:f1a413971403 566
FelipeVR 0:f1a413971403 567 This function assigns the given value to the Fault Mask register.
FelipeVR 0:f1a413971403 568
FelipeVR 0:f1a413971403 569 \param [in] faultMask Fault Mask value to set
FelipeVR 0:f1a413971403 570 */
FelipeVR 0:f1a413971403 571 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
FelipeVR 0:f1a413971403 572 {
FelipeVR 0:f1a413971403 573 __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
FelipeVR 0:f1a413971403 574 }
FelipeVR 0:f1a413971403 575
FelipeVR 0:f1a413971403 576 #endif /* (__CORTEX_M >= 0x03) */
FelipeVR 0:f1a413971403 577
FelipeVR 0:f1a413971403 578
FelipeVR 0:f1a413971403 579 #if (__CORTEX_M == 0x04)
FelipeVR 0:f1a413971403 580
FelipeVR 0:f1a413971403 581 /** \brief Get FPSCR
FelipeVR 0:f1a413971403 582
FelipeVR 0:f1a413971403 583 This function returns the current value of the Floating Point Status/Control register.
FelipeVR 0:f1a413971403 584
FelipeVR 0:f1a413971403 585 \return Floating Point Status/Control register value
FelipeVR 0:f1a413971403 586 */
FelipeVR 0:f1a413971403 587 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FPSCR(void)
FelipeVR 0:f1a413971403 588 {
FelipeVR 0:f1a413971403 589 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
FelipeVR 0:f1a413971403 590 uint32_t result;
FelipeVR 0:f1a413971403 591
FelipeVR 0:f1a413971403 592 /* Empty asm statement works as a scheduling barrier */
FelipeVR 0:f1a413971403 593 __ASM volatile ("");
FelipeVR 0:f1a413971403 594 __ASM volatile ("VMRS %0, fpscr" : "=r" (result) );
FelipeVR 0:f1a413971403 595 __ASM volatile ("");
FelipeVR 0:f1a413971403 596 return(result);
FelipeVR 0:f1a413971403 597 #else
FelipeVR 0:f1a413971403 598 return(0);
FelipeVR 0:f1a413971403 599 #endif
FelipeVR 0:f1a413971403 600 }
FelipeVR 0:f1a413971403 601
FelipeVR 0:f1a413971403 602
FelipeVR 0:f1a413971403 603 /** \brief Set FPSCR
FelipeVR 0:f1a413971403 604
FelipeVR 0:f1a413971403 605 This function assigns the given value to the Floating Point Status/Control register.
FelipeVR 0:f1a413971403 606
FelipeVR 0:f1a413971403 607 \param [in] fpscr Floating Point Status/Control value to set
FelipeVR 0:f1a413971403 608 */
FelipeVR 0:f1a413971403 609 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
FelipeVR 0:f1a413971403 610 {
FelipeVR 0:f1a413971403 611 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
FelipeVR 0:f1a413971403 612 /* Empty asm statement works as a scheduling barrier */
FelipeVR 0:f1a413971403 613 __ASM volatile ("");
FelipeVR 0:f1a413971403 614 __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc");
FelipeVR 0:f1a413971403 615 __ASM volatile ("");
FelipeVR 0:f1a413971403 616 #endif
FelipeVR 0:f1a413971403 617 }
FelipeVR 0:f1a413971403 618
FelipeVR 0:f1a413971403 619 #endif /* (__CORTEX_M == 0x04) */
FelipeVR 0:f1a413971403 620
FelipeVR 0:f1a413971403 621
FelipeVR 0:f1a413971403 622 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
FelipeVR 0:f1a413971403 623 /* TASKING carm specific functions */
FelipeVR 0:f1a413971403 624
FelipeVR 0:f1a413971403 625 /*
FelipeVR 0:f1a413971403 626 * The CMSIS functions have been implemented as intrinsics in the compiler.
FelipeVR 0:f1a413971403 627 * Please use "carm -?i" to get an up to date list of all instrinsics,
FelipeVR 0:f1a413971403 628 * Including the CMSIS ones.
FelipeVR 0:f1a413971403 629 */
FelipeVR 0:f1a413971403 630
FelipeVR 0:f1a413971403 631 #endif
FelipeVR 0:f1a413971403 632
FelipeVR 0:f1a413971403 633 /*@} end of CMSIS_Core_RegAccFunctions */
FelipeVR 0:f1a413971403 634
FelipeVR 0:f1a413971403 635
FelipeVR 0:f1a413971403 636 #endif /* __CORE_CMFUNC_H */