MCP2515.h

00001 #include "mbed.h"
00002 
00003 /*
00004 Created by: Kyle Crockett
00005 For MCP2515duino with 16MHz oscillator.
00006 CNFx register values.
00007 use preprocessor command "_XXkbps" 
00008 "XX" is the baud rate.
00009 
00010 10 kbps
00011 CNF1/BRGCON1    b'00110001'     0x31
00012 CNF2/BRGCON2    b'10111000'     0xB8
00013 CNF3/BRGCON3    b'00000101'     0x05
00014 
00015 20 kbps
00016 CNF1/BRGCON1    b'00011000'     0x18
00017 CNF2/BRGCON2    b'10111000'     0xB8
00018 CNF3/BRGCON3    b'00000101'     0x05
00019 
00020 50 kbps
00021 CNF1/BRGCON1    b'00001001'     0x09
00022 CNF2/BRGCON2    b'10111000'     0xB8
00023 CNF3/BRGCON3    b'00000101'     0x05
00024 
00025 100 kbps
00026 CNF1/BRGCON1    b'00000100'     0x04
00027 CNF2/BRGCON2    b'10111000'     0xB8
00028 CNF3/BRGCON3    b'00000101'     0x05
00029 
00030 125 kbps
00031 CNF1/BRGCON1    b'00000011'     0x03
00032 CNF2/BRGCON2    b'10111000'     0xB8
00033 CNF3/BRGCON3    b'00000101'     0x05
00034 
00035 250 kbps
00036 CNF1/BRGCON1    b'00000001'     0x01
00037 CNF2/BRGCON2    b'10111000'     0xB8
00038 CNF3/BRGCON3    b'00000101'     0x05
00039 
00040 500 kbps
00041 CNF1/BRGCON1    b'00000000'     0x00
00042 CNF2/BRGCON2    b'10111000'     0xB8
00043 CNF3/BRGCON3    b'00000101'     0x05
00044 
00045 800 kbps
00046 Not yet supported
00047 
00048 1000 kbps
00049 Settings added by Patrick Cruce(pcruce_at_igpp.ucla.edu)
00050 CNF1=b'10000000'=0x80 = SJW = 3 Tq. & BRP = 0
00051 CNF2=b'10010000'=0x90 = BLTMode = 1 & SAM = 0 & PS1 = 3 & PR = 1
00052 CNF3=b'00000010'=0x02 = SOF = 0  & WAKFIL = 0 & PS2 = 3
00053 
00054 */
00055 #ifndef MCP2515_h
00056 #define MCP2515_h
00057 
00058 #define SCK 13 //spi
00059 #define MISO 12
00060 #define MOSI 11
00061 #define SS 10
00062 #define RESET 2//reset pin
00063 
00064 #define RESET_REG 0xc0  
00065 #define READ 0x03 
00066 #define WRITE 0x02 //read and write comands for SPI
00067 
00068 #define READ_RX_BUF_0_ID 0x90
00069 #define READ_RX_BUF_0_DATA 0x92
00070 #define READ_RX_BUF_1_ID 0x94
00071 #define READ_RX_BUF_1_DATA 0x96 //SPI commands for reading MCP2515 RX buffers
00072 
00073 #define LOAD_TX_BUF_0_ID 0x40
00074 #define LOAD_TX_BUF_0_DATA 0x41
00075 #define LOAD_TX_BUF_1_ID 0x42
00076 #define LOAD_TX_BUF_1_DATA 0x43
00077 #define LOAD_TX_BUF_2_ID 0x44
00078 #define LOAD_TX_BUF_2_DATA 0x45 //SPI commands for loading MCP2515 TX buffers
00079 
00080 #define SEND_TX_BUF_0 0x81
00081 #define SEND_TX_BUF_1 0x82
00082 #define SEND_TX_BUF_2 0x83 //SPI commands for transmitting MCP2515 TX buffers
00083 
00084 #define READ_STATUS 0xA0
00085 #define RX_STATUS 0xB0
00086 #define BIT_MODIFY 0x05 //Other commands
00087 
00088 
00089 //Registers
00090 #define CNF0 0x2A
00091 #define CNF1 0x29
00092 #define CNF2 0x28
00093 #define TXB0CTRL 0x30 
00094 #define TXB1CTRL 0x40
00095 #define TXB2CTRL 0x50 //TRANSMIT BUFFER CONTROL REGISTER
00096 #define TXB0DLC 0x35 //Data length code registers
00097 #define TXB1DLC 0x45
00098 #define TXB2DLC 0x55
00099 #define MCP2515CTRL 0x0F //Mode control register
00100 #define MCP2515STAT 0x0E //Mode status register
00101 
00102 //------------------------------------------------------------------------------
00103 //Added for ram
00104 // Register Bit Masks
00105 // MCP2515STAT
00106 #define MODE_CONFIG     0x80
00107 #define MODE_LISTEN     0x60
00108 #define MODE_LOOPBACK   0x40
00109 #define MODE_SLEEP      0x20
00110 #define MODE_NORMAL     0x00
00111 
00112 //MCP2515 bus error counter
00113 #define TEC            0x1C
00114 #define REC            0x1D
00115 
00116 //Mask 0
00117 #define RXM0SIDH    0x20 //Mask0 normal ID high
00118 #define RXM0SIDL    0x21 //Mask0 normal ID low
00119 #define RXM0EID8    0x22 //Mask0 extended ID high
00120 #define RXM0EID0    0x23 //Mask0 extended ID low
00121 
00122 //Mask 1
00123 #define RXM1SIDH    0x24 //Mask1 normal ID high
00124 #define RXM1SIDL    0x25 //Mask1 normal ID low
00125 #define RXM1EID8    0x26 //Mask1 extended ID high
00126 #define RXM1EID0    0x27 //Mask1 extended ID low
00127 
00128 #define MCP2515INTE        0x2B //Interept permission
00129 #define MCP2515INTF        0x2C //Interept flag
00130 #define EFLG        0x2D //Error flag
00131 
00132 #define MASK_SID_ALL_HIT   0x0000 //Mask all
00133 #define MASK_SID_CPL_MATCH 0x07FF //Disable mask
00134 
00135 
00136 #define MCP2515_RTS         0x80
00137 #define MCP2515_READ_BUFFER 0x90
00138 #define MCP2515_LOAD_BUFFER 0X40
00139 
00140 //..............................................................................
00141 //test
00142 // MCP2515INTF
00143 #define RX0IF           0x01
00144 #define RX1IF           0x02
00145 #define TX0IF           0x04
00146 #define TX1IF           0x08
00147 #define TX2IF           0x10
00148 #define ERRIF           0x20
00149 #define WAKIF           0x40
00150 #define MERRF           0x80
00151 
00152 // Configuration Registers
00153 #define BFPCTRL         0x0C
00154 #define TXRTSCTRL       0x0D
00155 
00156 // TX Buffer 0
00157 #define TXB0CTRL        0x30
00158 #define TXB0SIDH        0x31
00159 #define TXB0SIDL        0x32
00160 #define TXB0EID8        0x33
00161 #define TXB0EID0        0x34
00162 #define TXB0DLC         0x35
00163 
00164 // TX Buffer 1
00165 #define TXB1CTRL        0x40
00166 #define TXB1SIDH        0x41
00167 #define TXB1SIDL        0x42
00168 #define TXB1EID8        0x43
00169 #define TXB1EID0        0x44
00170 #define TXB1DLC         0x45
00171 
00172 // TX Buffer 2
00173 #define TXB2CTRL        0x50
00174 #define TXB2SIDH        0x51
00175 #define TXB2SIDL        0x52
00176 #define TXB2EID8        0x53
00177 #define TXB2EID0        0x54
00178 #define TXB2DLC         0x55
00179 
00180 // RX Buffer 0
00181 #define RXB0CTRL        0x60
00182 #define RXB0SIDH        0x61
00183 #define RXB0SIDL        0x62
00184 #define RXB0EID8        0x63
00185 #define RXB0EID0        0x64
00186 #define RXB0DLC         0x65
00187 
00188 // RX Buffer 1
00189 #define RXB1CTRL        0x70
00190 #define RXB1SIDH        0x71
00191 #define RXB1SIDL        0x72
00192 #define RXB1EID8        0x73
00193 #define RXB1EID0        0x74
00194 #define RXB1DLC         0x75
00195 
00196 // Buffer Bit Masks
00197 #define RXB0            0x00
00198 #define RXB1            0x02
00199 #define TXB0            0x01
00200 #define TXB1            0x02
00201 #define TXB2            0x04
00202 #define TXB_ALL                  TXB0 | TXB1 | TXB2
00203 
00204 #define RXB_RX_STDEXT   0x00
00205 #define RXB_RX_MASK     0x60
00206 #define RXB_BUKT_MASK   (1<<2)
00207 
00208 typedef unsigned char byte;
00209 
00210 enum MCP2515Mode {CONFIGURATION,NORMAL,SLEEP,LISTEN,LOOPBACK};
00211 
00212 class MCP2515
00213 {
00214 public:
00215     MCP2515(SPI& spi, PinName cs);
00216     //void begin();//sets up MCP2515
00217     void baudConfig(int bitRate);//sets up baud
00218 
00219     //Method added to enable testing in loopback mode.(pcruce_at_igpp.ucla.edu)
00220     void setMode(MCP2515Mode mode) ;//put MCP2515 controller in one of five modes
00221 
00222     void send_0();//request to transmit buffer X
00223     void send_1();
00224     void send_2();
00225 
00226     char readID_0();//read ID/DATA of recieve buffer X
00227     char readID_1();
00228 
00229     char readDATA_0();
00230     char readDATA_1();
00231 
00232     //extending MCP2515 data read to full frames(pcruce_at_igpp.ucla.edu)
00233     //data_out should be array of 8-bytes or frame length.
00234     void readDATA_ff_0(byte* length_out,byte *data_out,unsigned short *id_out);
00235     void readDATA_ff_1(byte* length_out,byte *data_out,unsigned short *id_out);
00236 
00237     //Adding MCP2515 to read status register(pcruce_at_igpp.ucla.edu)
00238     //MCP2515 be used to determine whether a frame was received.
00239     //(readStatus() & 0x80) == 0x80 means frame in buffer 0
00240     //(readStatus() & 0x40) == 0x40 means frame in buffer 1
00241     byte readStatus();
00242 
00243     void load_0(byte identifier, byte data);//load transmit buffer X
00244     void load_1(byte identifier, byte data);
00245     void load_2(byte identifier, byte data);
00246 
00247     //extending MCP2515 write to full frame(pcruce_at_igpp.ucla.edu)
00248     //Identifier should be a value between 0 and 2^11-1, longer identifiers will be truncated(ie does not support extended frames)
00249     void load_ff_0(byte length,unsigned short identifier,byte *data);
00250     void load_ff_1(byte length,unsigned short identifier,byte *data);
00251     void load_ff_2(byte length,unsigned short identifier,byte *data);
00252     
00253     //--------------------------------------------------------------------------
00254     //Added for ram
00255     void writeRegister(byte address, byte data);
00256     void readRegister(byte address, byte *data_out);
00257     void reset();
00258     byte readRXStatus();
00259     void bitModify(byte address, byte mask, byte data);
00260     void setMask(unsigned short identifier);
00261     void setMask_0(unsigned short identifier);
00262     void setMask_1(unsigned short identifier);
00263 private:
00264     DigitalOut cs;
00265     SPI &spi;  
00266 };
00267 
00268 #endif