UDA1344TS

NOTICE!

Notes on my work with this audio codec.
The audio codec is controlled by an L3 bus, which MBED doesn't supply, and will need emulated!

Manufacturer Product Page: link

Pinout


Codec PinMbed PinAudio PinPurpose
1040Vddd Digital Supply Voltage
111Vssd Digital Supply Ground
221GndVdda(DAC) DAC analog ground
2340Vssa(DAC) DAC analog supply voltage
24RingDAC output right
26TipDAC output left

Static Pin Mode Pinout

Codec PinMbed PinPurpose
8XMC1 Hold HIGH for static pin mode
21XMC2 Hold HIGH for static pin mode
9XMP1 Hold LOW for I2S
13XMP2 LOW=normal HIGH=mute
14XMP3 LOW=256fs HIGH=384fs - clock
15XMP4 Hold LOW for ADC power down
20XMP5 Hold HIGH for I2S

L3 Mode Pinout
(Assuming I can get the GPIO L3 emulator working right)

Codec PinMbed PinPurpose
8XMC1 Hold LOW for L3 mode
21XMC2 Hold LOW for L3 mode
9XMP1 ADC output overload detection
13XMP2 L3MODE
14XMP3 L3CLOCK
15XMP4 L3DATA
20XMP5 ADC input voltage selection LOW=0dB HIGH=6dB - gain

L3 Stuff


Address Mode
1 Byte... bit 72=address bit 10=Transfer type
000101 (UDA1344TS address) + XX
XX
00 = Data
10 = Status
01/11 = Not used

Data Mode
(After address 00010100 or 0x14)
Once transmitted, remains active until next Address Mode sent.

Data transfer of type 'status':
1 Byte transfer: 00ABCDEF

00ABCDEF
AB=System clock frequency

  • 00 = 512fs
  • 01 = 384fs
  • 10 = 256fs

CDE=Data input format

  • 000 = I2S-bus

F=DC filter 0/1 off/on

Data transfer of type 'data':
4 Byte transfer: 00ABCDEF 01ABCDEF 100ABCDE 110000AB

00ABCDEF
ABCDEF=volume control

  • 000001 = 0dB
  • 000010 = -1dB
  • 000011 = -2dB
    ...
  • 111100 = -59dB
  • 111110 = -60dB

01ABCDEF
ABCD = Bass boost

  • ABCDb -> Ad .. (floor(Ad*2,18) min dB / floor(Ad*2,24) max dB

EF=Treble

  • EFb -> Ad .. Ad*2 min/max dB

100ABCDE
AB = De-emphasis

  • 00 = None
  • 01 = 32kHz
  • 10 = 44.1
  • 11 = 48

C=Mute 0/1 off/on
DE=Filter mode (mode of DSP filters above)

  • 00 = Flat (all treated as 0dB)
  • 01/10 = Use min dB
  • 11 = Use max dB

110000AB
AB=Power control
A = ADC 0/1 off/on
B = DAC 0/1 off/on

L3 bus stuff and a whole transaction (for L3 emulator work)
L3MODE held HIGH during non-use
L3CLOCK held HIGH during non-use
L3DATA doesn't matter

address - data - address
address - data - data - data - data - address

Example 2 data byte transaction:

  1. L3MODE SET LOW (address mode)
  2. L3CLOCK SET HIGH
  3. L3DATA SET HIGH/LOW
  4. L3CLOCK LOW EDGE - L3DATA is read
  5. L3CLOCK SET HIGH
  6. Repeat last 4 steps until 8 bits written
  7. L3CLOCK SET HIGH
  8. L3MODE SET HIGH (data mode)
  9. L3CLOCK SET HIGH
  10. L3DATA SET HIGH/LOW
  11. L3CLOCK LOW EDGE - L3DATA is read
  12. L3CLOCK SET HIGH
  13. Repeat last 4 steps until 8 bits written
  14. L3MODE SET LOW (end data mode)
  15. L3MODE SET HIGH (data mode)
  16. L3CLOCK SET HIGH
  17. L3DATA SET HIGH/LOW
  18. L3CLOCK LOW EDGE - L3DATA is read
  19. L3CLOCK SET HIGH
  20. Repeat last 4 steps until 8 bits written
  21. L3MODE SET LOW (address mode)
  22. L3CLOCK SET HIGH
  23. L3DATA SET HIGH/LOW
  24. L3CLOCK LOW EDGE - L3DATA is read
  25. L3CLOCK SET HIGH
  26. Repeat last 4 steps until 8 bits written


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