UDA1344TS
NOTICE!
Notes on my work with this audio codec. 
The audio codec is controlled by an L3 bus, which MBED doesn't supply, and will need emulated!
Manufacturer Product Page: link
Pinout
| Codec Pin | Mbed Pin | Audio Pin | Purpose | 
|---|---|---|---|
| 10 | 40 | Vddd Digital Supply Voltage | |
| 11 | 1 | Vssd Digital Supply Ground | |
| 22 | 1 | Gnd | Vdda(DAC) DAC analog ground | 
| 23 | 40 | Vssa(DAC) DAC analog supply voltage | |
| 24 | Ring | DAC output right | |
| 26 | Tip | DAC output left | 
Static Pin Mode Pinout
| Codec Pin | Mbed Pin | Purpose | 
|---|---|---|
| 8 | X | MC1 Hold HIGH for static pin mode | 
| 21 | X | MC2 Hold HIGH for static pin mode | 
| 9 | X | MP1 Hold LOW for I2S | 
| 13 | X | MP2 LOW=normal HIGH=mute | 
| 14 | X | MP3 LOW=256fs HIGH=384fs - clock | 
| 15 | X | MP4 Hold LOW for ADC power down | 
| 20 | X | MP5 Hold HIGH for I2S | 
L3 Mode Pinout
(Assuming I can get the GPIO L3 emulator working right)
| Codec Pin | Mbed Pin | Purpose | 
|---|---|---|
| 8 | X | MC1 Hold LOW for L3 mode | 
| 21 | X | MC2 Hold LOW for L3 mode | 
| 9 | X | MP1 ADC output overload detection | 
| 13 | X | MP2 L3MODE | 
| 14 | X | MP3 L3CLOCK | 
| 15 | X | MP4 L3DATA | 
| 20 | X | MP5 ADC input voltage selection LOW=0dB HIGH=6dB - gain | 
L3 Stuff
Address Mode
1 Byte... bit 72=address bit 10=Transfer type
000101 (UDA1344TS address) + XX
XX
00 = Data
10 = Status
01/11 = Not used
Data Mode
(After address 00010100 or 0x14)
Once transmitted, remains active until next Address Mode sent.
Data transfer of type 'status':
1 Byte transfer: 00ABCDEF
00ABCDEF
AB=System clock frequency
- 00 = 512fs
 
- 01 = 384fs
 
- 10 = 256fs
CDE=Data input format
- 000 = I2S-bus
F=DC filter 0/1 off/on
Data transfer of type 'data':
4 Byte transfer: 00ABCDEF 01ABCDEF 100ABCDE 110000AB
00ABCDEF
ABCDEF=volume control 
- 000001 = 0dB
 
- 000010 = -1dB
 
- 000011 = -2dB
 ...
 
- 111100 = -59dB
 
- 111110 = -60dB
 
01ABCDEF
ABCD = Bass boost
- ABCDb -> Ad .. (floor(Ad*2,18) min dB / floor(Ad*2,24) max dB 
 
EF=Treble
- EFb -> Ad .. Ad*2 min/max dB
 
100ABCDE
AB = De-emphasis
- 00 = None
 
- 01 = 32kHz
 
- 10 = 44.1
 
- 11 = 48
 
C=Mute 0/1 off/on
DE=Filter mode (mode of DSP filters above)
- 00 = Flat (all treated as 0dB)
 
- 01/10 = Use min dB
 
- 11 = Use max dB
 
110000AB
AB=Power control
A = ADC 0/1 off/on
B = DAC 0/1 off/on
 L3 bus stuff and a whole transaction (for L3 emulator work)
L3MODE held HIGH during non-use
L3CLOCK held HIGH during non-use
L3DATA doesn't matter
address - data - address
address - data - data - data - data - address
Example 2 data byte transaction:
- L3MODE SET LOW (address mode)
- L3CLOCK SET HIGH
- L3DATA SET HIGH/LOW
- L3CLOCK LOW EDGE - L3DATA is read
- L3CLOCK SET HIGH
- Repeat last 4 steps until 8 bits written
- L3CLOCK SET HIGH
- L3MODE SET HIGH (data mode)
- L3CLOCK SET HIGH
- L3DATA SET HIGH/LOW
- L3CLOCK LOW EDGE - L3DATA is read
- L3CLOCK SET HIGH
- Repeat last 4 steps until 8 bits written
- L3MODE SET LOW (end data mode)
- L3MODE SET HIGH (data mode)
- L3CLOCK SET HIGH
- L3DATA SET HIGH/LOW
- L3CLOCK LOW EDGE - L3DATA is read
- L3CLOCK SET HIGH
- Repeat last 4 steps until 8 bits written
- L3MODE SET LOW (address mode)
- L3CLOCK SET HIGH
- L3DATA SET HIGH/LOW
- L3CLOCK LOW EDGE - L3DATA is read
- L3CLOCK SET HIGH
- Repeat last 4 steps until 8 bits written
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