stm32l4xx_ll_wwdg.h

00001 /**
00002   ******************************************************************************
00003   * @file    stm32l4xx_ll_wwdg.h
00004   * @author  MCD Application Team
00005   * @version V1.1.0
00006   * @date    16-September-2015
00007   * @brief   Header file of WWDG LL module.
00008   ******************************************************************************
00009   * @attention
00010   *
00011   * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
00012   *
00013   * Redistribution and use in source and binary forms, with or without modification,
00014   * are permitted provided that the following conditions are met:
00015   *   1. Redistributions of source code must retain the above copyright notice,
00016   *      this list of conditions and the following disclaimer.
00017   *   2. Redistributions in binary form must reproduce the above copyright notice,
00018   *      this list of conditions and the following disclaimer in the documentation
00019   *      and/or other materials provided with the distribution.
00020   *   3. Neither the name of STMicroelectronics nor the names of its contributors
00021   *      may be used to endorse or promote products derived from this software
00022   *      without specific prior written permission.
00023   *
00024   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
00025   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
00026   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
00027   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
00028   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
00029   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
00030   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
00031   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
00032   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
00033   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
00034   *
00035   ******************************************************************************
00036   */
00037 
00038 /* Define to prevent recursive inclusion -------------------------------------*/
00039 #ifndef __STM32L4xx_LL_WWDG_H
00040 #define __STM32L4xx_LL_WWDG_H
00041 
00042 #ifdef __cplusplus
00043 extern "C" {
00044 #endif
00045 
00046 /* Includes ------------------------------------------------------------------*/
00047 #include "stm32l4xx.h"
00048 
00049 /** @addtogroup STM32L4xx_LL_Driver
00050   * @{
00051   */
00052 
00053 #if defined (WWDG)
00054 
00055 /** @defgroup WWDG_LL WWDG
00056   * @{
00057   */
00058 
00059 /* Private types -------------------------------------------------------------*/
00060 /* Private variables ---------------------------------------------------------*/
00061 
00062 /* Private constants ---------------------------------------------------------*/
00063 
00064 /* Private macros ------------------------------------------------------------*/
00065 
00066 /* Exported types ------------------------------------------------------------*/
00067 /* Exported constants --------------------------------------------------------*/
00068 /** @defgroup WWDG_LL_Exported_Constants WWDG Exported Constants
00069   * @{
00070   */
00071 
00072 /** @defgroup WWDG_LL_EC_GET_FLAG Get Flags Defines
00073   * @brief    Flags defines which can be used with LL_WWDG_ReadReg function
00074   * @{
00075   */
00076 #define LL_WWDG_SR_EWIF                    WWDG_SR_EWIF
00077 /**
00078   * @}
00079   */
00080 
00081 /** @defgroup WWDG_LL_EC_IT IT Defines
00082   * @brief    IT defines which can be used with LL_WWDG_ReadReg and  LL_WWDG_WriteReg functions
00083   * @{
00084   */
00085 #define LL_WWDG_CFR_EWI                    WWDG_CFR_EWI
00086 /**
00087   * @}
00088   */
00089 
00090 /** @defgroup WWDG_LL_EC_PRESCALER  PRESCALER
00091 * @{
00092 */
00093 #define LL_WWDG_PRESCALER_1                (uint32_t)0x00000000                                    /*!< WWDG counter clock = (PCLK1/4096)/1 */ 
00094 #define LL_WWDG_PRESCALER_2                WWDG_CFR_WDGTB_0                                        /*!< WWDG counter clock = (PCLK1/4096)/2 */ 
00095 #define LL_WWDG_PRESCALER_4                WWDG_CFR_WDGTB_1                                        /*!< WWDG counter clock = (PCLK1/4096)/4 */ 
00096 #define LL_WWDG_PRESCALER_8                (WWDG_CFR_WDGTB_0 | WWDG_CFR_WDGTB_1)                   /*!< WWDG counter clock = (PCLK1/4096)/8 */ 
00097 /**
00098   * @}
00099   */
00100 
00101 /**
00102   * @}
00103   */
00104   
00105 /* Exported macro ------------------------------------------------------------*/
00106 /** @defgroup WWDG_LL_Exported_Macros WWDG Exported Macros
00107   * @{
00108   */
00109 /** @defgroup WWDG_LL_EM_WRITE_READ Common Write and read registers macros
00110   * @{
00111   */
00112 /**
00113   * @brief  Write a value in WWDG register
00114   * @param  __INSTANCE__ WWDG Instance
00115   * @param  __REG__ Register to be written
00116   * @param  __VALUE__ Value to be written in the register
00117   * @retval None
00118   */
00119 #define LL_WWDG_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
00120 
00121 /**
00122   * @brief  Read a value in WWDG register
00123   * @param  __INSTANCE__ WWDG Instance
00124   * @param  __REG__ Register to be read
00125   * @retval Register value
00126   */
00127 #define LL_WWDG_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
00128 /**
00129   * @}
00130   */
00131 
00132 
00133 /**
00134   * @}
00135   */
00136 
00137 /* Exported functions --------------------------------------------------------*/
00138 /** @defgroup WWDG_LL_Exported_Functions WWDG Exported Functions
00139   * @{
00140   */
00141 
00142 /** @defgroup WWDG_LL_EF_Configuration Configuration
00143   * @{
00144   */
00145 /**
00146   * @brief  Enable Window Watchdog. The watchdog is always disabled after a reset.
00147   *         It is enabled by setting the WDGA bit in the WWDG_CR register,
00148   *         then it cannot be disabled again except by a reset.
00149   *         This bit is set by software and only cleared by hardware after a reset.
00150   *         When WDGA = 1, the watchdog can generate a reset.
00151   * @rmtoll CR           WDGA          LL_WWDG_Enable
00152   * @param  WWDGx WWDG Instance
00153   * @retval None
00154   */
00155 __STATIC_INLINE void LL_WWDG_Enable(WWDG_TypeDef* WWDGx)
00156 {
00157   SET_BIT(WWDGx->CR, WWDG_CR_WDGA);
00158 }
00159 
00160 /**
00161   * @brief  Checks if Window Watchdog is enabled
00162   * @rmtoll CR           WDGA          LL_WWDG_IsEnabled
00163   * @param  WWDGx WWDG Instance
00164   * @retval State of bit (1 or 0).
00165   */
00166 __STATIC_INLINE uint32_t LL_WWDG_IsEnabled(WWDG_TypeDef* WWDGx)
00167 {
00168   return (READ_BIT(WWDGx->CR, WWDG_CR_WDGA) == (WWDG_CR_WDGA));
00169 }
00170 
00171 /**
00172   * @brief  Set the Watchdog counter value to provided value (7-bits b6-b0 value).
00173   *         When writing to the WWDG_CR register, always write 1 in the MSB b6 to avoid generating an immediate reset.
00174   *         This counter is decremented every (4096 x 2expWDGTB) PCLK cycles.
00175   *         A reset is produced when it rolls over from 0x40 to 0x3F (b6 becomes cleared)
00176   * @rmtoll CR           T             LL_WWDG_SetCounter
00177   * @param  WWDGx WWDG Instance
00178   * @param  Counter 0..0x7F (7 bit counter value)
00179   * @retval None
00180   */
00181 __STATIC_INLINE void LL_WWDG_SetCounter(WWDG_TypeDef* WWDGx, uint32_t Counter)
00182 {
00183   MODIFY_REG(WWDGx->CR, WWDG_CR_T, Counter);
00184 }
00185 
00186 /**
00187   * @brief  Return current Watchdog Counter Value (7 bits counter value)
00188   * @rmtoll CR           T             LL_WWDG_GetCounter
00189   * @param  WWDGx WWDG Instance
00190   * @retval 7 bit Watchdog Counter value
00191   */
00192 __STATIC_INLINE uint32_t LL_WWDG_GetCounter(WWDG_TypeDef* WWDGx)
00193 {
00194   return (uint32_t)(READ_BIT(WWDGx->CR, WWDG_CR_T));
00195 }
00196 
00197 /**
00198   * @brief  Set the time base of the prescaler (WDGTB).
00199   *         Prescaler is used to apply ratio on PCLK clock, so that Watchdog counter
00200   *         is decremented every (4096 x 2expWDGTB) PCLK cycles
00201   * @rmtoll CFR          WDGTB         LL_WWDG_SetPrescaler
00202   * @param  WWDGx WWDG Instance
00203   * @param  Prescaler This parameter can be one of the following values:
00204   *         @arg @ref LL_WWDG_PRESCALER_1
00205   *         @arg @ref LL_WWDG_PRESCALER_2
00206   *         @arg @ref LL_WWDG_PRESCALER_4
00207   *         @arg @ref LL_WWDG_PRESCALER_8
00208   * @retval None
00209   */
00210 __STATIC_INLINE void LL_WWDG_SetPrescaler(WWDG_TypeDef* WWDGx, uint32_t Prescaler)
00211 {
00212   MODIFY_REG(WWDGx->CFR, WWDG_CFR_WDGTB, Prescaler);
00213 }
00214 
00215 /**
00216   * @brief  Return current Watchdog Prescaler Value
00217   * @rmtoll CFR          WDGTB         LL_WWDG_GetPrescaler
00218   * @param  WWDGx WWDG Instance
00219   * @retval Returned value can be one of the following values:
00220   *         @arg @ref LL_WWDG_PRESCALER_1
00221   *         @arg @ref LL_WWDG_PRESCALER_2
00222   *         @arg @ref LL_WWDG_PRESCALER_4
00223   *         @arg @ref LL_WWDG_PRESCALER_8
00224   */
00225 __STATIC_INLINE uint32_t LL_WWDG_GetPrescaler(WWDG_TypeDef* WWDGx)
00226 {
00227   return (uint32_t)(READ_BIT(WWDGx->CFR, WWDG_CFR_WDGTB));
00228 }
00229 
00230 /**
00231   * @brief  Set the Watchdog Window value to be compared to the downcounter (7-bits b6-b0 value).
00232   *         This window value defines when write in the WWDG_CR register
00233   *         to program Watchdog counter is allowed.
00234   *         Watchdog counter value update must occur only when the counter value
00235   *         is lower than the Watchdog window register value.
00236   *         Otherwise, a MCU reset is generated if the 7-bit Watchdog counter value
00237   *         (in the control register) is refreshed before the downcounter has reached
00238   *         the watchdog window register value.
00239   * @rmtoll CFR          W             LL_WWDG_SetWindow
00240   * @param  WWDGx WWDG Instance
00241   * @param  Window 0..0x7F (7 bit Window value)
00242   * @retval None
00243   */
00244 __STATIC_INLINE void LL_WWDG_SetWindow(WWDG_TypeDef* WWDGx, uint32_t Window)
00245 {
00246   MODIFY_REG(WWDGx->CFR, WWDG_CFR_W, Window);
00247 }
00248 
00249 /**
00250   * @brief  Return current Watchdog Window Value (7 bits value)
00251   * @rmtoll CFR          W             LL_WWDG_GetWindow
00252   * @param  WWDGx WWDG Instance
00253   * @retval 7 bit Watchdog Window value
00254   */
00255 __STATIC_INLINE uint32_t LL_WWDG_GetWindow(WWDG_TypeDef* WWDGx)
00256 {
00257   return (uint32_t)(READ_BIT(WWDGx->CFR, WWDG_CFR_W));
00258 }
00259 
00260 /**
00261   * @}
00262   */
00263 
00264 /** @defgroup WWDG_LL_EF_FLAG_Management FLAG_Management
00265   * @{
00266   */
00267 /**
00268   * @brief  Indicates if the WWDG Early Wakeup Interrupt Flag is set or not.
00269   *         This bit is set by hardware when the counter has reached the value 0x40.
00270   *         It must be cleared by software by writing 0.
00271   *         A write of 1 has no effect. This bit is also set if the interrupt is not enabled.
00272   * @rmtoll SR           EWIF          LL_WWDG_IsActiveFlag_EWKUP
00273   * @param  WWDGx WWDG Instance
00274   * @retval State of bit (1 or 0).
00275   */
00276 __STATIC_INLINE uint32_t LL_WWDG_IsActiveFlag_EWKUP(WWDG_TypeDef* WWDGx)
00277 {
00278   return (READ_BIT(WWDGx->SR, WWDG_SR_EWIF) == (WWDG_SR_EWIF));
00279 }
00280 
00281 /**
00282   * @brief  Clear WWDG Early Wakeup Interrupt Flag (EWIF)
00283   * @rmtoll SR           EWIF          LL_WWDG_ClearFlag_EWKUP
00284   * @param  WWDGx WWDG Instance
00285   * @retval None
00286   */
00287 __STATIC_INLINE void LL_WWDG_ClearFlag_EWKUP(WWDG_TypeDef* WWDGx)
00288 {
00289   WRITE_REG(WWDGx->SR, ~WWDG_SR_EWIF);
00290 }
00291 
00292 /**
00293   * @}
00294   */
00295 
00296 /** @defgroup WWDG_LL_EF_IT_Management IT_Management
00297   * @{
00298   */
00299 /**
00300   * @brief  Enable the Early Wakeup Interrupt. When set, an interrupt occurs
00301   *         whenever the counter reaches the value 0x40.
00302   *         This interrupt is only cleared by hardware after a reset
00303   * @rmtoll CFR          EWI           LL_WWDG_EnableIT_EWKUP
00304   * @param  WWDGx WWDG Instance
00305   * @retval None
00306   */
00307 __STATIC_INLINE void LL_WWDG_EnableIT_EWKUP(WWDG_TypeDef* WWDGx)
00308 {
00309   SET_BIT(WWDGx->CFR, WWDG_CFR_EWI);
00310 }
00311 
00312 /**
00313   * @brief  Check if Early Wakeup Interrupt is enabled 
00314   * @rmtoll CFR          EWI           LL_WWDG_IsEnabledIT_EWKUP
00315   * @param  WWDGx WWDG Instance
00316   * @retval State of bit (1 or 0).
00317   */
00318 __STATIC_INLINE uint32_t LL_WWDG_IsEnabledIT_EWKUP(WWDG_TypeDef* WWDGx)
00319 {
00320   return (READ_BIT(WWDGx->CFR, WWDG_CFR_EWI) == (WWDG_CFR_EWI));
00321 }
00322 
00323 /**
00324   * @}
00325   */
00326 
00327 
00328 /**
00329   * @}
00330   */
00331 
00332 /**
00333   * @}
00334   */
00335 
00336 #endif /* WWDG */
00337 
00338 /**
00339   * @}
00340   */
00341 
00342 #ifdef __cplusplus
00343 }
00344 #endif
00345 
00346 #endif /* __STM32L4xx_LL_WWDG_H */
00347 
00348 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
00349