Eric Lewiston
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STM32L4xx_HAL_Driver
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stm32l4xx_hal_flash_ex.c
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00001 /** 00002 ****************************************************************************** 00003 * @file stm32l4xx_hal_flash_ex.c 00004 * @author MCD Application Team 00005 * @version V1.1.0 00006 * @date 16-September-2015 00007 * @brief Extended FLASH HAL module driver. 00008 * This file provides firmware functions to manage the following 00009 * functionalities of the FLASH extended peripheral: 00010 * + Extended programming operations functions 00011 * 00012 @verbatim 00013 ============================================================================== 00014 ##### Flash Extended features ##### 00015 ============================================================================== 00016 00017 [..] Comparing to other previous devices, the FLASH interface for STM32L4xx 00018 devices contains the following additional features 00019 00020 (+) Capacity up to 2 Mbyte with dual bank architecture supporting read-while-write 00021 capability (RWW) 00022 (+) Dual bank memory organization 00023 (+) PCROP protection for all banks 00024 00025 ##### How to use this driver ##### 00026 ============================================================================== 00027 [..] This driver provides functions to configure and program the FLASH memory 00028 of all STM32L4xx devices. It includes 00029 (#) Flash Memory Erase functions: 00030 (++) Lock and Unlock the FLASH interface using HAL_FLASH_Unlock() and 00031 HAL_FLASH_Lock() functions 00032 (++) Erase function: Erase page, erase all sectors 00033 (++) There are two modes of erase : 00034 (+++) Polling Mode using HAL_FLASHEx_Erase() 00035 (+++) Interrupt Mode using HAL_FLASHEx_Erase_IT() 00036 00037 (#) Option Bytes Programming function: Use HAL_FLASHEx_OBProgram() to : 00038 (++) Set/Reset the write protection 00039 (++) Set the Read protection Level 00040 (++) Program the user Option Bytes 00041 (++) Configure the PCROP protection 00042 00043 (#) Get Option Bytes Configuration function: Use HAL_FLASHEx_OBGetConfig() to : 00044 (++) Get the value of a write protection area 00045 (++) Know if the read protection is activated 00046 (++) Get the value of the user Option Bytes 00047 (++) Get the value of a PCROP area 00048 00049 @endverbatim 00050 ****************************************************************************** 00051 * @attention 00052 * 00053 * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> 00054 * 00055 * Redistribution and use in source and binary forms, with or without modification, 00056 * are permitted provided that the following conditions are met: 00057 * 1. Redistributions of source code must retain the above copyright notice, 00058 * this list of conditions and the following disclaimer. 00059 * 2. Redistributions in binary form must reproduce the above copyright notice, 00060 * this list of conditions and the following disclaimer in the documentation 00061 * and/or other materials provided with the distribution. 00062 * 3. Neither the name of STMicroelectronics nor the names of its contributors 00063 * may be used to endorse or promote products derived from this software 00064 * without specific prior written permission. 00065 * 00066 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 00067 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 00068 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 00069 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 00070 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 00071 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 00072 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 00073 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 00074 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 00075 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 00076 * 00077 ****************************************************************************** 00078 */ 00079 00080 /* Includes ------------------------------------------------------------------*/ 00081 #include "stm32l4xx_hal.h" 00082 #include "stm32l476xx.h" 00083 00084 /** @addtogroup STM32L4xx_HAL_Driver 00085 * @{ 00086 */ 00087 #define FLASH_OPTR_nRST_SHDW ((uint32_t)0x00004000) 00088 /** @defgroup FLASHEx FLASHEx 00089 * @brief FALSH Extended HAL module driver 00090 * @{ 00091 */ 00092 00093 #ifdef HAL_FLASH_MODULE_ENABLED 00094 00095 /* Private typedef -----------------------------------------------------------*/ 00096 /* Private define ------------------------------------------------------------*/ 00097 /* Private macro -------------------------------------------------------------*/ 00098 /* Private variables ---------------------------------------------------------*/ 00099 /** @defgroup FLASHEx_Private_Variables FLASHEx Private Variables 00100 * @{ 00101 */ 00102 extern FLASH_ProcessTypeDef pFlash; 00103 /** 00104 * @} 00105 */ 00106 00107 /* Private function prototypes -----------------------------------------------*/ 00108 /** @defgroup FLASHEx_Private_Functions FLASHEx Private Functions 00109 * @{ 00110 */ 00111 extern HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout); 00112 void FLASH_PageErase(uint32_t Page, uint32_t Banks); 00113 static void FLASH_MassErase(uint32_t Banks); 00114 void FLASH_FlushCaches(void); 00115 static HAL_StatusTypeDef FLASH_OB_WRPConfig(uint32_t WRPArea, uint32_t WRPStartOffset, uint32_t WRDPEndOffset); 00116 static HAL_StatusTypeDef FLASH_OB_RDPConfig(uint32_t RDPLevel); 00117 static HAL_StatusTypeDef FLASH_OB_UserConfig(uint32_t UserType, uint32_t UserConfig); 00118 static HAL_StatusTypeDef FLASH_OB_PCROPConfig(uint32_t PCROPConfig, uint32_t PCROPStartAddr, uint32_t PCROPEndAddr); 00119 static void FLASH_OB_GetWRP(uint32_t WRPArea, uint32_t * WRPStartOffset, uint32_t * WRDPEndOffset); 00120 static uint32_t FLASH_OB_GetRDP(void); 00121 static uint32_t FLASH_OB_GetUser(void); 00122 static void FLASH_OB_GetPCROP(uint32_t * PCROPConfig, uint32_t * PCROPStartAddr, uint32_t * PCROPEndAddr); 00123 /** 00124 * @} 00125 */ 00126 00127 /* Exported functions -------------------------------------------------------*/ 00128 /** @defgroup FLASHEx_Exported_Functions FLASH Extended Exported Functions 00129 * @{ 00130 */ 00131 00132 /** @defgroup FLASHEx_Exported_Functions_Group1 Extended IO operation functions 00133 * @brief Extended IO operation functions 00134 * 00135 @verbatim 00136 =============================================================================== 00137 ##### Extended programming operation functions ##### 00138 =============================================================================== 00139 [..] 00140 This subsection provides a set of functions allowing to manage the Extended FLASH 00141 programming operations Operations. 00142 00143 @endverbatim 00144 * @{ 00145 */ 00146 /** 00147 * @brief Perform a mass erase or erase the specified FLASH memory pages. 00148 * @param[in] pEraseInit: pointer to an FLASH_EraseInitTypeDef structure that 00149 * contains the configuration information for the erasing. 00150 * 00151 * @param[out] PageError : pointer to variable that contains the configuration 00152 * information on faulty page in case of error (0xFFFFFFFF means that all 00153 * the pages have been correctly erased) 00154 * 00155 * @retval HAL Status 00156 */ 00157 HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *PageError) 00158 { 00159 HAL_StatusTypeDef status = HAL_ERROR; 00160 uint32_t page_index = 0; 00161 00162 /* Process Locked */ 00163 __HAL_LOCK(&pFlash); 00164 00165 /* Check the parameters */ 00166 assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase)); 00167 00168 /* Wait for last operation to be completed */ 00169 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); 00170 00171 if (status == HAL_OK) 00172 { 00173 pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; 00174 00175 if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE) 00176 { 00177 /* Mass erase to be done */ 00178 FLASH_MassErase(pEraseInit->Banks); 00179 00180 /* Wait for last operation to be completed */ 00181 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); 00182 00183 /* If the erase operation is completed, disable the MER1 and MER2 Bits */ 00184 CLEAR_BIT(FLASH->CR, (FLASH_CR_MER1 | FLASH_CR_MER2)); 00185 } 00186 else 00187 { 00188 /*Initialization of PageError variable*/ 00189 *PageError = 0xFFFFFFFF; 00190 00191 for(page_index = pEraseInit->Page; page_index < (pEraseInit->Page + pEraseInit->NbPages); page_index++) 00192 { 00193 FLASH_PageErase(page_index, pEraseInit->Banks); 00194 00195 /* Wait for last operation to be completed */ 00196 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); 00197 00198 /* If the erase operation is completed, disable the PER Bit */ 00199 CLEAR_BIT(FLASH->CR, (FLASH_CR_PER | FLASH_CR_PNB)); 00200 00201 if (status != HAL_OK) 00202 { 00203 /* In case of error, stop erase procedure and return the faulty address */ 00204 *PageError = page_index; 00205 break; 00206 } 00207 } 00208 } 00209 00210 /* Flush the caches to be sure of the data consistency */ 00211 FLASH_FlushCaches(); 00212 } 00213 00214 /* Process Unlocked */ 00215 __HAL_UNLOCK(&pFlash); 00216 00217 return status; 00218 } 00219 00220 /** 00221 * @brief Perform a mass erase or erase the specified FLASH memory pages with interrupt enabled. 00222 * @param pEraseInit: pointer to an FLASH_EraseInitTypeDef structure that 00223 * contains the configuration information for the erasing. 00224 * 00225 * @retval HAL Status 00226 */ 00227 HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit) 00228 { 00229 HAL_StatusTypeDef status = HAL_OK; 00230 00231 /* Process Locked */ 00232 __HAL_LOCK(&pFlash); 00233 00234 /* Check the parameters */ 00235 assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase)); 00236 00237 pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; 00238 00239 /* Enable End of Operation and Error interrupts */ 00240 __HAL_FLASH_ENABLE_IT(FLASH_IT_EOP | FLASH_IT_OPERR); 00241 00242 pFlash.Bank = pEraseInit->Banks; 00243 00244 if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE) 00245 { 00246 /* Mass erase to be done */ 00247 pFlash.ProcedureOnGoing = FLASH_PROC_MASS_ERASE; 00248 FLASH_MassErase(pEraseInit->Banks); 00249 } 00250 else 00251 { 00252 /* Erase by page to be done */ 00253 pFlash.ProcedureOnGoing = FLASH_PROC_PAGE_ERASE; 00254 pFlash.NbPagesToErase = pEraseInit->NbPages; 00255 pFlash.Page = pEraseInit->Page; 00256 00257 /*Erase 1st page and wait for IT */ 00258 FLASH_PageErase(pEraseInit->Page, pEraseInit->Banks); 00259 } 00260 00261 return status; 00262 } 00263 00264 /** 00265 * @brief Program Option bytes. 00266 * @param pOBInit: pointer to an FLASH_OBInitStruct structure that 00267 * contains the configuration information for the programming. 00268 * 00269 * @retval HAL Status 00270 */ 00271 HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit) 00272 { 00273 HAL_StatusTypeDef status = HAL_ERROR; 00274 00275 /* Process Locked */ 00276 __HAL_LOCK(&pFlash); 00277 00278 /* Check the parameters */ 00279 assert_param(IS_OPTIONBYTE(pOBInit->OptionType)); 00280 00281 pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; 00282 00283 /* Write protection configuration */ 00284 if((pOBInit->OptionType & OPTIONBYTE_WRP) != RESET) 00285 { 00286 /* Configure of Write protection on the selected area */ 00287 status = FLASH_OB_WRPConfig(pOBInit->WRPArea, pOBInit->WRPStartOffset, pOBInit->WRPEndOffset); 00288 } 00289 00290 /* Read protection configuration */ 00291 if((pOBInit->OptionType & OPTIONBYTE_RDP) != RESET) 00292 { 00293 /* Configure the Read protection level */ 00294 status = FLASH_OB_RDPConfig(pOBInit->RDPLevel); 00295 } 00296 00297 /* User Configuration */ 00298 if((pOBInit->OptionType & OPTIONBYTE_USER) != RESET) 00299 { 00300 /* Configure the user option bytes */ 00301 status = FLASH_OB_UserConfig(pOBInit->USERType, pOBInit->USERConfig); 00302 } 00303 00304 /* PCROP Configuration */ 00305 if((pOBInit->OptionType & OPTIONBYTE_PCROP) != RESET) 00306 { 00307 /* Configure the Proprietary code readout protection */ 00308 status = FLASH_OB_PCROPConfig(pOBInit->PCROPConfig, pOBInit->PCROPStartAddr, pOBInit->PCROPEndAddr); 00309 } 00310 00311 /* Process Unlocked */ 00312 __HAL_UNLOCK(&pFlash); 00313 00314 return status; 00315 } 00316 00317 /** 00318 * @brief Get the Option bytes configuration. 00319 * @param pOBInit: pointer to an FLASH_OBInitStruct structure that contains the 00320 * configuration information. The fields pOBInit->WRPArea and 00321 * pOBInit->PCROPConfig should indicate which area is requested 00322 * for the WRP and PCROP 00323 * 00324 * @retval None 00325 */ 00326 void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit) 00327 { 00328 pOBInit->OptionType = (OPTIONBYTE_WRP | OPTIONBYTE_RDP | OPTIONBYTE_USER | OPTIONBYTE_PCROP); 00329 00330 /* Get write protection on the selected area */ 00331 FLASH_OB_GetWRP(pOBInit->WRPArea, &(pOBInit->WRPStartOffset), &(pOBInit->WRPEndOffset)); 00332 00333 /* Get Read protection level */ 00334 pOBInit->RDPLevel = FLASH_OB_GetRDP(); 00335 00336 /* Get the user option bytes */ 00337 pOBInit->USERConfig = FLASH_OB_GetUser(); 00338 00339 /* Get the Proprietary code readout protection */ 00340 FLASH_OB_GetPCROP(&(pOBInit->PCROPConfig), &(pOBInit->PCROPStartAddr), &(pOBInit->PCROPEndAddr)); 00341 00342 } 00343 00344 /** 00345 * @} 00346 */ 00347 00348 /** 00349 * @} 00350 */ 00351 00352 /* Private functions ---------------------------------------------------------*/ 00353 00354 /** @addtogroup FLASHEx_Private_Functions 00355 * @{ 00356 */ 00357 /** 00358 * @brief Mass erase of FLASH memory. 00359 * @param Banks: Banks to be erased 00360 * This parameter can be one of the following values: 00361 * @arg FLASH_BANK_1: Bank1 to be erased 00362 * @arg FLASH_BANK_2: Bank2 to be erased 00363 * @arg FLASH_BANK_BOTH: Bank1 and Bank2 to be erased 00364 * @retval None 00365 */ 00366 static void FLASH_MassErase(uint32_t Banks) 00367 { 00368 /* Check the parameters */ 00369 assert_param(IS_FLASH_BANK(Banks)); 00370 00371 /* Set the Mass Erase Bit for the bank 1 if requested */ 00372 if((Banks & FLASH_BANK_1) != RESET) 00373 { 00374 SET_BIT(FLASH->CR, FLASH_CR_MER1); 00375 } 00376 00377 /* Set the Mass Erase Bit for the bank 2 if requested */ 00378 if((Banks & FLASH_BANK_2) != RESET) 00379 { 00380 SET_BIT(FLASH->CR, FLASH_CR_MER2); 00381 } 00382 00383 /* Proceed to erase all sectors */ 00384 SET_BIT(FLASH->CR, FLASH_CR_STRT); 00385 } 00386 00387 /** 00388 * @brief Erase the specified FLASH memory page. 00389 * @param Page: FLASH page to erase 00390 * This parameter must be a value between 0 and (max number of pages in the bank - 1) 00391 * @param Banks: Bank(s) where the page will be erased 00392 * This parameter can be one or a combination of the following values: 00393 * @arg FLASH_BANK_1: Page in bank 1 to be erased 00394 * @arg FLASH_BANK_2: Page in bank 2 to be erased 00395 * @retval None 00396 */ 00397 void FLASH_PageErase(uint32_t Page, uint32_t Banks) 00398 { 00399 /* Check the parameters */ 00400 assert_param(IS_FLASH_PAGE(Page)); 00401 assert_param(IS_FLASH_BANK_EXCLUSIVE(Banks)); 00402 00403 if((Banks & FLASH_BANK_1) != RESET) 00404 { 00405 CLEAR_BIT(FLASH->CR, FLASH_CR_BKER); 00406 } 00407 else 00408 { 00409 SET_BIT(FLASH->CR, FLASH_CR_BKER); 00410 } 00411 00412 /* Proceed to erase the page */ 00413 MODIFY_REG(FLASH->CR, FLASH_CR_PNB, (Page << 3)); 00414 SET_BIT(FLASH->CR, FLASH_CR_PER); 00415 SET_BIT(FLASH->CR, FLASH_CR_STRT); 00416 } 00417 00418 /** 00419 * @brief Flush the instruction and data caches. 00420 * @retval None 00421 */ 00422 void FLASH_FlushCaches(void) 00423 { 00424 /* Flush instruction cache */ 00425 if(READ_BIT(FLASH->ACR, FLASH_ACR_ICEN) != RESET) 00426 { 00427 /* Disable instruction cache */ 00428 __HAL_FLASH_INSTRUCTION_CACHE_DISABLE(); 00429 /* Reset instruction cache */ 00430 __HAL_FLASH_INSTRUCTION_CACHE_RESET(); 00431 /* Enable instruction cache */ 00432 __HAL_FLASH_INSTRUCTION_CACHE_ENABLE(); 00433 } 00434 00435 /* Flush data cache */ 00436 if(READ_BIT(FLASH->ACR, FLASH_ACR_DCEN) != RESET) 00437 { 00438 /* Disable data cache */ 00439 __HAL_FLASH_DATA_CACHE_DISABLE(); 00440 /* Reset data cache */ 00441 __HAL_FLASH_DATA_CACHE_RESET(); 00442 /* Enable data cache */ 00443 __HAL_FLASH_DATA_CACHE_ENABLE(); 00444 } 00445 } 00446 00447 /** 00448 * @brief Configure the write protection of the desired pages. 00449 * 00450 * @note When the memory read protection level is selected (RDP level = 1), 00451 * it is not possible to program or erase Flash memory if the CPU debug 00452 * features are connected (JTAG or single wire) or boot code is being 00453 * executed from RAM or System flash, even if WRP is not activated. 00454 * @note To configure the WRP options, the option lock bit OPTLOCK must be 00455 * cleared with the call of the HAL_FLASH_OB_Unlock() function. 00456 * @note To validate the WRP options, the option bytes must be reloaded 00457 * through the call of the HAL_FLASH_OB_Launch() function. 00458 * 00459 * @param WRPArea: specifies the area to be configured. 00460 * This parameter can be one of the following values: 00461 * @arg OB_WRPAREA_BANK1_AREAA: Flash Bank 1 Area A 00462 * @arg OB_WRPAREA_BANK1_AREAB: Flash Bank 1 Area B 00463 * @arg OB_WRPAREA_BANK2_AREAA: Flash Bank 2 Area A 00464 * @arg OB_WRPAREA_BANK2_AREAB: Flash Bank 2 Area B 00465 * 00466 * @param WRPStartOffset: specifies the start page of the write protected area 00467 * This parameter can be page number between 0 and (max number of pages in the bank - 1) 00468 * 00469 * @param WRDPEndOffset: specifies the end page of the write protected area 00470 * This parameter can be page number between WRPStartOffset and (max number of pages in the bank - 1) 00471 * 00472 * @retval HAL Status 00473 */ 00474 static HAL_StatusTypeDef FLASH_OB_WRPConfig(uint32_t WRPArea, uint32_t WRPStartOffset, uint32_t WRDPEndOffset) 00475 { 00476 HAL_StatusTypeDef status = HAL_OK; 00477 00478 /* Check the parameters */ 00479 assert_param(IS_OB_WRPAREA(WRPArea)); 00480 assert_param(IS_FLASH_PAGE(WRPStartOffset)); 00481 assert_param(IS_FLASH_PAGE(WRDPEndOffset)); 00482 00483 /* Wait for last operation to be completed */ 00484 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); 00485 00486 if(status == HAL_OK) 00487 { 00488 /* Configure the write protected area */ 00489 if(WRPArea == OB_WRPAREA_BANK1_AREAA) 00490 { 00491 MODIFY_REG(FLASH->WRP1AR, (FLASH_WRP1AR_WRP1A_STRT | FLASH_WRP1AR_WRP1A_END), 00492 (WRPStartOffset | (WRDPEndOffset << 16))); 00493 } 00494 else if(WRPArea == OB_WRPAREA_BANK1_AREAB) 00495 { 00496 MODIFY_REG(FLASH->WRP1BR, (FLASH_WRP1BR_WRP1B_STRT | FLASH_WRP1BR_WRP1B_END), 00497 (WRPStartOffset | (WRDPEndOffset << 16))); 00498 } 00499 else if(WRPArea == OB_WRPAREA_BANK2_AREAA) 00500 { 00501 MODIFY_REG(FLASH->WRP2AR, (FLASH_WRP2AR_WRP2A_STRT | FLASH_WRP2AR_WRP2A_END), 00502 (WRPStartOffset | (WRDPEndOffset << 16))); 00503 } 00504 else if(WRPArea == OB_WRPAREA_BANK2_AREAB) 00505 { 00506 MODIFY_REG(FLASH->WRP2BR, (FLASH_WRP2BR_WRP2B_STRT | FLASH_WRP2BR_WRP2B_END), 00507 (WRPStartOffset | (WRDPEndOffset << 16))); 00508 } 00509 00510 /* Set OPTSTRT Bit */ 00511 SET_BIT(FLASH->CR, FLASH_CR_OPTSTRT); 00512 00513 /* Wait for last operation to be completed */ 00514 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); 00515 00516 /* If the option byte program operation is completed, disable the OPTSTRT Bit */ 00517 CLEAR_BIT(FLASH->CR, FLASH_CR_OPTSTRT); 00518 } 00519 00520 return status; 00521 } 00522 00523 /** 00524 * @brief Set the read protection level. 00525 * 00526 * @note To configure the RDP level, the option lock bit OPTLOCK must be 00527 * cleared with the call of the HAL_FLASH_OB_Unlock() function. 00528 * @note To validate the RDP level, the option bytes must be reloaded 00529 * through the call of the HAL_FLASH_OB_Launch() function. 00530 * @note !!! Warning : When enabling OB_RDP level 2 it's no more possible 00531 * to go back to level 1 or 0 !!! 00532 * 00533 * @param RDPLevel: specifies the read protection level. 00534 * This parameter can be one of the following values: 00535 * @arg OB_RDP_LEVEL_0: No protection 00536 * @arg OB_RDP_LEVEL_1: Read protection of the memory 00537 * @arg OB_RDP_LEVEL_2: Full chip protection 00538 * 00539 * @retval HAL status 00540 */ 00541 static HAL_StatusTypeDef FLASH_OB_RDPConfig(uint32_t RDPLevel) 00542 { 00543 HAL_StatusTypeDef status = HAL_OK; 00544 00545 /* Check the parameters */ 00546 assert_param(IS_OB_RDP_LEVEL(RDPLevel)); 00547 00548 /* Wait for last operation to be completed */ 00549 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); 00550 00551 if(status == HAL_OK) 00552 { 00553 /* Configure the RDP level in the option bytes register */ 00554 MODIFY_REG(FLASH->OPTR, FLASH_OPTR_RDP, RDPLevel); 00555 00556 /* Set OPTSTRT Bit */ 00557 SET_BIT(FLASH->CR, FLASH_CR_OPTSTRT); 00558 00559 /* Wait for last operation to be completed */ 00560 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); 00561 00562 /* If the option byte program operation is completed, disable the OPTSTRT Bit */ 00563 CLEAR_BIT(FLASH->CR, FLASH_CR_OPTSTRT); 00564 } 00565 00566 return status; 00567 } 00568 00569 /** 00570 * @brief Program the FLASH User Option Byte. 00571 * 00572 * @note To configure the user option bytes, the option lock bit OPTLOCK must 00573 * be cleared with the call of the HAL_FLASH_OB_Unlock() function. 00574 * @note To validate the user option bytes, the option bytes must be reloaded 00575 * through the call of the HAL_FLASH_OB_Launch() function. 00576 * 00577 * @param UserType: The FLASH User Option Bytes to be modified 00578 * @param UserConfig: The FLASH User Option Bytes values: 00579 * BOR_LEV(Bit8-10), nRST_STOP(Bit12), nRST_STDBY(Bit13), IWDG_SW(Bit16), 00580 * IWDG_STOP(Bit17), IWDG_STDBY(Bit18), WWDG_SW(Bit19), BFB2(Bit20), 00581 * DUALBANK(Bit21), nBOOT1(Bit23), SRAM2_PE(Bit24) and SRAM2_RST(Bit25). 00582 * 00583 * @retval HAL status 00584 */ 00585 static HAL_StatusTypeDef FLASH_OB_UserConfig(uint32_t UserType, uint32_t UserConfig) 00586 { 00587 uint32_t optr_reg_val = 0; 00588 uint32_t optr_reg_mask = 0; 00589 HAL_StatusTypeDef status = HAL_OK; 00590 00591 /* Check the parameters */ 00592 assert_param(IS_OB_USER_TYPE(UserType)); 00593 00594 /* Wait for last operation to be completed */ 00595 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); 00596 00597 if(status == HAL_OK) 00598 { 00599 if((UserType & OB_USER_BOR_LEV) != RESET) 00600 { 00601 /* BOR level option byte should be modified */ 00602 assert_param(IS_OB_USER_BOR_LEVEL(UserConfig & FLASH_OPTR_BOR_LEV)); 00603 00604 /* Set value and mask for BOR level option byte */ 00605 optr_reg_val |= (UserConfig & FLASH_OPTR_BOR_LEV); 00606 optr_reg_mask |= FLASH_OPTR_BOR_LEV; 00607 } 00608 00609 if((UserType & OB_USER_nRST_STOP) != RESET) 00610 { 00611 /* nRST_STOP option byte should be modified */ 00612 assert_param(IS_OB_USER_STOP(UserConfig & FLASH_OPTR_nRST_STOP)); 00613 00614 /* Set value and mask for nRST_STOP option byte */ 00615 optr_reg_val |= (UserConfig & FLASH_OPTR_nRST_STOP); 00616 optr_reg_mask |= FLASH_OPTR_nRST_STOP; 00617 } 00618 00619 if((UserType & OB_USER_nRST_STDBY) != RESET) 00620 { 00621 /* nRST_STDBY option byte should be modified */ 00622 assert_param(IS_OB_USER_STANDBY(UserConfig & FLASH_OPTR_nRST_STDBY)); 00623 00624 /* Set value and mask for nRST_STDBY option byte */ 00625 optr_reg_val |= (UserConfig & FLASH_OPTR_nRST_STDBY); 00626 optr_reg_mask |= FLASH_OPTR_nRST_STDBY; 00627 } 00628 00629 if((UserType & OB_USER_nRST_SHDW) != RESET) 00630 { 00631 /* nRST_SHDW option byte should be modified */ 00632 assert_param(IS_OB_USER_SHUTDOWN(UserConfig & FLASH_OPTR_nRST_SHDW)); 00633 00634 /* Set value and mask for nRST_SHDW option byte */ 00635 optr_reg_val |= (UserConfig & FLASH_OPTR_nRST_SHDW); 00636 optr_reg_mask |= FLASH_OPTR_nRST_SHDW; 00637 } 00638 00639 if((UserType & OB_USER_IWDG_SW) != RESET) 00640 { 00641 /* IWDG_SW option byte should be modified */ 00642 assert_param(IS_OB_USER_IWDG(UserConfig & FLASH_OPTR_IWDG_SW)); 00643 00644 /* Set value and mask for IWDG_SW option byte */ 00645 optr_reg_val |= (UserConfig & FLASH_OPTR_IWDG_SW); 00646 optr_reg_mask |= FLASH_OPTR_IWDG_SW; 00647 } 00648 00649 if((UserType & OB_USER_IWDG_STOP) != RESET) 00650 { 00651 /* IWDG_STOP option byte should be modified */ 00652 assert_param(IS_OB_USER_IWDG_STOP(UserConfig & FLASH_OPTR_IWDG_STOP)); 00653 00654 /* Set value and mask for IWDG_STOP option byte */ 00655 optr_reg_val |= (UserConfig & FLASH_OPTR_IWDG_STOP); 00656 optr_reg_mask |= FLASH_OPTR_IWDG_STOP; 00657 } 00658 00659 if((UserType & OB_USER_IWDG_STDBY) != RESET) 00660 { 00661 /* IWDG_STDBY option byte should be modified */ 00662 assert_param(IS_OB_USER_IWDG_STDBY(UserConfig & FLASH_OPTR_IWDG_STDBY)); 00663 00664 /* Set value and mask for IWDG_STDBY option byte */ 00665 optr_reg_val |= (UserConfig & FLASH_OPTR_IWDG_STDBY); 00666 optr_reg_mask |= FLASH_OPTR_IWDG_STDBY; 00667 } 00668 00669 if((UserType & OB_USER_WWDG_SW) != RESET) 00670 { 00671 /* WWDG_SW option byte should be modified */ 00672 assert_param(IS_OB_USER_WWDG(UserConfig & FLASH_OPTR_WWDG_SW)); 00673 00674 /* Set value and mask for WWDG_SW option byte */ 00675 optr_reg_val |= (UserConfig & FLASH_OPTR_WWDG_SW); 00676 optr_reg_mask |= FLASH_OPTR_WWDG_SW; 00677 } 00678 00679 if((UserType & OB_USER_BFB2) != RESET) 00680 { 00681 /* BFB2 option byte should be modified */ 00682 assert_param(IS_OB_USER_BFB2(UserConfig & FLASH_OPTR_BFB2)); 00683 00684 /* Set value and mask for BFB2 option byte */ 00685 optr_reg_val |= (UserConfig & FLASH_OPTR_BFB2); 00686 optr_reg_mask |= FLASH_OPTR_BFB2; 00687 } 00688 00689 if((UserType & OB_USER_DUALBANK) != RESET) 00690 { 00691 /* DUALBANK option byte should be modified */ 00692 assert_param(IS_OB_USER_DUALBANK(UserConfig & FLASH_OPTR_DUALBANK)); 00693 00694 /* Set value and mask for DUALBANK option byte */ 00695 optr_reg_val |= (UserConfig & FLASH_OPTR_DUALBANK); 00696 optr_reg_mask |= FLASH_OPTR_DUALBANK; 00697 } 00698 00699 if((UserType & OB_USER_nBOOT1) != RESET) 00700 { 00701 /* nBOOT1 option byte should be modified */ 00702 assert_param(IS_OB_USER_BOOT1(UserConfig & FLASH_OPTR_nBOOT1)); 00703 00704 /* Set value and mask for nBOOT1 option byte */ 00705 optr_reg_val |= (UserConfig & FLASH_OPTR_nBOOT1); 00706 optr_reg_mask |= FLASH_OPTR_nBOOT1; 00707 } 00708 00709 if((UserType & OB_USER_SRAM2_PE) != RESET) 00710 { 00711 /* SRAM2_PE option byte should be modified */ 00712 assert_param(IS_OB_USER_SRAM2_PARITY(UserConfig & FLASH_OPTR_SRAM2_PE)); 00713 00714 /* Set value and mask for SRAM2_PE option byte */ 00715 optr_reg_val |= (UserConfig & FLASH_OPTR_SRAM2_PE); 00716 optr_reg_mask |= FLASH_OPTR_SRAM2_PE; 00717 } 00718 00719 if((UserType & OB_USER_SRAM2_RST) != RESET) 00720 { 00721 /* SRAM2_RST option byte should be modified */ 00722 assert_param(IS_OB_USER_SRAM2_RST(UserConfig & FLASH_OPTR_SRAM2_RST)); 00723 00724 /* Set value and mask for SRAM2_RST option byte */ 00725 optr_reg_val |= (UserConfig & FLASH_OPTR_SRAM2_RST); 00726 optr_reg_mask |= FLASH_OPTR_SRAM2_RST; 00727 } 00728 00729 /* Configure the option bytes register */ 00730 MODIFY_REG(FLASH->OPTR, optr_reg_mask, optr_reg_val); 00731 00732 /* Set OPTSTRT Bit */ 00733 SET_BIT(FLASH->CR, FLASH_CR_OPTSTRT); 00734 00735 /* Wait for last operation to be completed */ 00736 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); 00737 00738 /* If the option byte program operation is completed, disable the OPTSTRT Bit */ 00739 CLEAR_BIT(FLASH->CR, FLASH_CR_OPTSTRT); 00740 } 00741 00742 return status; 00743 } 00744 00745 /** 00746 * @brief Configure the Proprietary code readout protection of the desired addresses. 00747 * 00748 * @note To configure the PCROP options, the option lock bit OPTLOCK must be 00749 * cleared with the call of the HAL_FLASH_OB_Unlock() function. 00750 * @note To validate the PCROP options, the option bytes must be reloaded 00751 * through the call of the HAL_FLASH_OB_Launch() function. 00752 * 00753 * @param PCROPConfig: specifies the configuration (Bank to be configured and PCROP_RDP option). 00754 * This parameter must be a combination of FLASH_BANK_1 or FLASH_BANK_2 00755 * with OB_PCROP_RDP_NOT_ERASE or OB_PCROP_RDP_ERASE 00756 * 00757 * @param PCROPStartAddr: specifies the start address of the Proprietary code readout protection 00758 * This parameter can be an address between begin and end of the bank 00759 * 00760 * @param PCROPEndAddr: specifies the end address of the Proprietary code readout protection 00761 * This parameter can be an address between PCROPStartAddr and end of the bank 00762 * 00763 * @retval HAL Status 00764 */ 00765 static HAL_StatusTypeDef FLASH_OB_PCROPConfig(uint32_t PCROPConfig, uint32_t PCROPStartAddr, uint32_t PCROPEndAddr) 00766 { 00767 HAL_StatusTypeDef status = HAL_OK; 00768 uint32_t reg_value = 0; 00769 uint32_t bank1_addr, bank2_addr; 00770 00771 /* Check the parameters */ 00772 assert_param(IS_FLASH_BANK_EXCLUSIVE(PCROPConfig & FLASH_BANK_BOTH)); 00773 assert_param(IS_OB_PCROP_RDP(PCROPConfig & FLASH_PCROP1ER_PCROP_RDP)); 00774 assert_param(IS_FLASH_MAIN_MEM_ADDRESS(PCROPStartAddr)); 00775 assert_param(IS_FLASH_MAIN_MEM_ADDRESS(PCROPEndAddr)); 00776 00777 /* Wait for last operation to be completed */ 00778 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); 00779 00780 if(status == HAL_OK) 00781 { 00782 /* Get the information about the bank swapping */ 00783 if (READ_BIT(SYSCFG->MEMRMP, SYSCFG_MEMRMP_FB_MODE) == 0) 00784 { 00785 bank1_addr = FLASH_BASE; 00786 bank2_addr = FLASH_BASE + FLASH_BANK_SIZE; 00787 } 00788 else 00789 { 00790 bank1_addr = FLASH_BASE + FLASH_BANK_SIZE; 00791 bank2_addr = FLASH_BASE; 00792 } 00793 00794 /* Configure the Proprietary code readout protection */ 00795 if((PCROPConfig & FLASH_BANK_BOTH) == FLASH_BANK_1) 00796 { 00797 reg_value = ((PCROPStartAddr - bank1_addr) >> 3); 00798 MODIFY_REG(FLASH->PCROP1SR, FLASH_PCROP1SR_PCROP1_STRT, reg_value); 00799 00800 reg_value = ((PCROPEndAddr - bank1_addr) >> 3); 00801 MODIFY_REG(FLASH->PCROP1ER, FLASH_PCROP1ER_PCROP1_END, reg_value); 00802 } 00803 else if((PCROPConfig & FLASH_BANK_BOTH) == FLASH_BANK_2) 00804 { 00805 reg_value = ((PCROPStartAddr - bank2_addr) >> 3); 00806 MODIFY_REG(FLASH->PCROP2SR, FLASH_PCROP2SR_PCROP2_STRT, reg_value); 00807 00808 reg_value = ((PCROPEndAddr - bank2_addr) >> 3); 00809 MODIFY_REG(FLASH->PCROP2ER, FLASH_PCROP2ER_PCROP2_END, reg_value); 00810 } 00811 00812 MODIFY_REG(FLASH->PCROP1ER, FLASH_PCROP1ER_PCROP_RDP, (PCROPConfig & FLASH_PCROP1ER_PCROP_RDP)); 00813 00814 /* Set OPTSTRT Bit */ 00815 SET_BIT(FLASH->CR, FLASH_CR_OPTSTRT); 00816 00817 /* Wait for last operation to be completed */ 00818 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); 00819 00820 /* If the option byte program operation is completed, disable the OPTSTRT Bit */ 00821 CLEAR_BIT(FLASH->CR, FLASH_CR_OPTSTRT); 00822 } 00823 00824 return status; 00825 } 00826 00827 /** 00828 * @brief Return the FLASH Write Protection Option Bytes value. 00829 * 00830 * @param[in] WRPArea: specifies the area to be returned. 00831 * This parameter can be one of the following values: 00832 * @arg OB_WRPAREA_BANK1_AREAA: Flash Bank 1 Area A 00833 * @arg OB_WRPAREA_BANK1_AREAB: Flash Bank 1 Area B 00834 * @arg OB_WRPAREA_BANK2_AREAA: Flash Bank 2 Area A 00835 * @arg OB_WRPAREA_BANK2_AREAB: Flash Bank 2 Area B 00836 * 00837 * @param[out] WRPStartOffset: specifies the address where to copied the start page 00838 * of the write protected area 00839 * 00840 * @param[out] WRDPEndOffset: specifies the address where to copied the end page of 00841 * the write protected area 00842 * 00843 * @retval None 00844 */ 00845 static void FLASH_OB_GetWRP(uint32_t WRPArea, uint32_t * WRPStartOffset, uint32_t * WRDPEndOffset) 00846 { 00847 /* Check the parameters */ 00848 assert_param(IS_OB_WRPAREA(WRPArea)); 00849 00850 /* Get the configuration of the write protected area */ 00851 if(WRPArea == OB_WRPAREA_BANK1_AREAA) 00852 { 00853 *WRPStartOffset = READ_BIT(FLASH->WRP1AR, FLASH_WRP1AR_WRP1A_STRT); 00854 *WRDPEndOffset = (READ_BIT(FLASH->WRP1AR, FLASH_WRP1AR_WRP1A_END) >> 16); 00855 } 00856 else if(WRPArea == OB_WRPAREA_BANK1_AREAB) 00857 { 00858 *WRPStartOffset = READ_BIT(FLASH->WRP1BR, FLASH_WRP1BR_WRP1B_STRT); 00859 *WRDPEndOffset = (READ_BIT(FLASH->WRP1BR, FLASH_WRP1BR_WRP1B_END) >> 16); 00860 } 00861 else if(WRPArea == OB_WRPAREA_BANK2_AREAA) 00862 { 00863 *WRPStartOffset = READ_BIT(FLASH->WRP2AR, FLASH_WRP2AR_WRP2A_STRT); 00864 *WRDPEndOffset = (READ_BIT(FLASH->WRP2AR, FLASH_WRP2AR_WRP2A_END) >> 16); 00865 } 00866 else if(WRPArea == OB_WRPAREA_BANK2_AREAB) 00867 { 00868 *WRPStartOffset = READ_BIT(FLASH->WRP2BR, FLASH_WRP2BR_WRP2B_STRT); 00869 *WRDPEndOffset = (READ_BIT(FLASH->WRP2BR, FLASH_WRP2BR_WRP2B_END) >> 16); 00870 } 00871 } 00872 00873 /** 00874 * @brief Return the FLASH Read Protection level. 00875 * @retval FLASH ReadOut Protection Status: 00876 * This return value can be one of the following values: 00877 * @arg OB_RDP_LEVEL_0: No protection 00878 * @arg OB_RDP_LEVEL_1: Read protection of the memory 00879 * @arg OB_RDP_LEVEL_2: Full chip protection 00880 */ 00881 static uint32_t FLASH_OB_GetRDP(void) 00882 { 00883 if ((READ_BIT(FLASH->OPTR, FLASH_OPTR_RDP) != OB_RDP_LEVEL_0) && 00884 (READ_BIT(FLASH->OPTR, FLASH_OPTR_RDP) != OB_RDP_LEVEL_2)) 00885 { 00886 return (OB_RDP_LEVEL_1); 00887 } 00888 else 00889 { 00890 return (READ_BIT(FLASH->OPTR, FLASH_OPTR_RDP)); 00891 } 00892 } 00893 00894 /** 00895 * @brief Return the FLASH User Option Byte value. 00896 * @retval The FLASH User Option Bytes values: 00897 * BOR_LEV(Bit8-10), nRST_STOP(Bit12), nRST_STDBY(Bit13), nRST_SHDW(Bit14), 00898 * IWDG_SW(Bit16), IWDG_STOP(Bit17), IWDG_STDBY(Bit18), WWDG_SW(Bit19), 00899 * BFB2(Bit20), DUALBANK(Bit21), nBOOT1(Bit23), SRAM2_PE(Bit24) and SRAM2_RST(Bit25). 00900 */ 00901 static uint32_t FLASH_OB_GetUser(void) 00902 { 00903 uint32_t user_config = READ_REG(FLASH->OPTR); 00904 CLEAR_BIT(user_config, FLASH_OPTR_RDP); 00905 00906 return user_config; 00907 } 00908 00909 /** 00910 * @brief Return the FLASH Write Protection Option Bytes value. 00911 * 00912 * @param PCROPConfig [inout]: specifies the configuration (Bank to be configured and PCROP_RDP option). 00913 * This parameter must be a combination of FLASH_BANK_1 or FLASH_BANK_2 00914 * with OB_PCROP_RDP_NOT_ERASE or OB_PCROP_RDP_ERASE 00915 * 00916 * @param PCROPStartAddr [out]: specifies the address where to copied the start address 00917 * of the Proprietary code readout protection 00918 * 00919 * @param PCROPEndAddr [out]: specifies the address where to copied the end address of 00920 * the Proprietary code readout protection 00921 * 00922 * @retval None 00923 */ 00924 static void FLASH_OB_GetPCROP(uint32_t * PCROPConfig, uint32_t * PCROPStartAddr, uint32_t * PCROPEndAddr) 00925 { 00926 uint32_t reg_value = 0; 00927 uint32_t bank1_addr, bank2_addr; 00928 00929 /* Check the parameters */ 00930 assert_param(IS_FLASH_BANK_EXCLUSIVE((*PCROPConfig) & FLASH_BANK_BOTH)); 00931 00932 /* Get the information about the bank swapping */ 00933 if (READ_BIT(SYSCFG->MEMRMP, SYSCFG_MEMRMP_FB_MODE) == 0) 00934 { 00935 bank1_addr = FLASH_BASE; 00936 bank2_addr = FLASH_BASE + FLASH_BANK_SIZE; 00937 } 00938 else 00939 { 00940 bank1_addr = FLASH_BASE + FLASH_BANK_SIZE; 00941 bank2_addr = FLASH_BASE; 00942 } 00943 00944 if(((*PCROPConfig) & FLASH_BANK_BOTH) == FLASH_BANK_1) 00945 { 00946 reg_value = (READ_REG(FLASH->PCROP1SR) & FLASH_PCROP1SR_PCROP1_STRT); 00947 *PCROPStartAddr = (reg_value << 3) + bank1_addr; 00948 00949 reg_value = (READ_REG(FLASH->PCROP1ER) & FLASH_PCROP1ER_PCROP1_END); 00950 *PCROPEndAddr = (reg_value << 3) + bank1_addr; 00951 } 00952 else if(((*PCROPConfig) & FLASH_BANK_BOTH) == FLASH_BANK_2) 00953 { 00954 reg_value = (READ_REG(FLASH->PCROP2SR) & FLASH_PCROP2SR_PCROP2_STRT); 00955 *PCROPStartAddr = (reg_value << 3) + bank2_addr; 00956 00957 reg_value = (READ_REG(FLASH->PCROP2ER) & FLASH_PCROP2ER_PCROP2_END); 00958 *PCROPEndAddr = (reg_value << 3) + bank2_addr; 00959 } 00960 00961 *PCROPConfig |= (READ_REG(FLASH->PCROP1ER) & FLASH_PCROP1ER_PCROP_RDP); 00962 } 00963 /** 00964 * @} 00965 */ 00966 00967 /** 00968 * @} 00969 */ 00970 00971 #endif /* HAL_FLASH_MODULE_ENABLED */ 00972 00973 /** 00974 * @} 00975 */ 00976 00977 /** 00978 * @} 00979 */ 00980 00981 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 00982
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