Hal Drivers for L4
Dependents: BSP OneHopeOnePrayer FINAL_AUDIO_RECORD AudioDemo
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Revision 2:7aef7655b0a8, committed 2015-11-25
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- EricLew
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- Wed Nov 25 17:30:43 2015 +0000
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--- a/Inc/stm32l4xx_hal_adc.h Thu Nov 12 20:49:49 2015 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,1033 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_adc.h - * @author MCD Application Team - * @version V1.1.0 - * @date 16-September-2015 - * @brief Header file of ADC HAL module. - ****************************************************************************** - * @attention - * - * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_ADC_H -#define __STM32L4xx_ADC_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal_def.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @addtogroup ADC - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ -/** @defgroup ADC_Exported_Types ADC Exported Types - * @{ - */ - - -/** - * @brief ADC Regular Conversion Oversampling structure definition - */ -typedef struct -{ - uint32_t Ratio; /*!< Configures the oversampling ratio. - This parameter can be a value of @ref ADCEx_Oversampling_Ratio */ - - uint32_t RightBitShift; /*!< Configures the division coefficient for the Oversampler. - This parameter can be a value of @ref ADCEx_Right_Bit_Shift */ - - uint32_t TriggeredMode; /*!< Selects the regular triggered oversampling mode. - This parameter can be a value of @ref ADCEx_Triggered_Oversampling_Mode */ - - uint32_t OversamplingStopReset; /*!< Selects the regular oversampling mode. - The oversampling is either temporary stopped or reset upon an injected - sequence interruption. - If oversampling is enabled on both regular and injected groups, this parameter - is discarded and forced to setting "ADC_REGOVERSAMPLING_RESUMED_MODE" - (the oversampling buffer is zeroed during injection sequence). - This parameter can be a value of @ref ADCEx_Regular_Oversampling_Mode */ - -}ADC_OversamplingTypeDef; - - - - -/** - * @brief Structure definition of ADC initialization and regular group - * @note Parameters of this structure are shared within 2 scopes: - * - Scope entire ADC (affects regular and injected groups): ClockPrescaler and ClockDivider, Resolution, DataAlign, - * ScanConvMode, EOCSelection, LowPowerAutoWait. - * - Scope regular group: ContinuousConvMode, NbrOfConversion, DiscontinuousConvMode, NbrOfDiscConversion, ExternalTrigConvEdge, - * ExternalTrigConv, DMAContinuousRequests, Overrun, OversamplingMode, Oversampling. - * @note The setting of these parameters by function HAL_ADC_Init() is conditioned by ADC state. - * ADC state can be either: - * - For all parameters: ADC disabled - * - For all parameters except 'LowPowerAutoWait', 'DMAContinuousRequests' and 'Oversampling': ADC enabled without conversion on going on regular group. - * - For parameters 'LowPowerAutoWait' and 'DMAContinuousRequests': ADC enabled without conversion on going on regular and injected groups. - * If ADC is not in the appropriate state to modify some parameters, these parameters setting is bypassed - * without error reporting (as it can be the expected behaviour in case of intended action to update another parameter - * (which fulfills the ADC state condition) on the fly). - */ -typedef struct -{ - uint32_t ClockPrescaler; /*!< Selects ADC clock source (asynchronous System/PLLSAI1/PLLSAI2 clocks or synchronous AHB clock) as well as - the division factor applied to the clock. - This parameter can be a value of @ref ADC_ClockPrescaler. - Note: The clock is common for all the ADCs. - Note: In case of usage of channels on injected group, ADC frequency should be lower than AHB clock frequency /4 for resolution 12 or 10 bits, - AHB clock frequency /3 for resolution 8 bits, AHB clock frequency /2 for resolution 6 bits. - Note: In case of usage of the ADC dedicated PLL clock, this clock must be preliminarily enabled and prescaler set at RCC top level. - Note: In case of synchronous clock mode based on HCLK/1, the configuration must be enabled only if the AHB clock prescaler is set to 1 - and if the system clock has a 50% duty cycle. - Note: This parameter can be modified only if all ADCs are disabled. */ - - uint32_t Resolution; /*!< Configures the ADC resolution. - This parameter can be a value of @ref ADC_Resolution */ - - uint32_t DataAlign; /*!< Specifies ADC data alignment (right or left). - See reference manual for alignments formats versus resolutions. - This parameter can be a value of @ref ADC_Data_align */ - - uint32_t ScanConvMode; /*!< Configures the sequencer of regular and injected groups. - This parameter can be associated to parameter 'DiscontinuousConvMode' to have main sequence subdivided in successive parts. - If disabled: Conversion is performed in single mode (one channel converted, that defined in rank 1). - Parameters 'NbrOfConversion' and 'InjectedNbrOfConversion' are discarded (equivalent to set to 1). - If enabled: Conversions are performed in sequence mode (multiple ranks defined by 'NbrOfConversion' or'InjectedNbrOfConversion'). - Scan direction is upward: from rank 1 to rank 'n'. - This parameter can be a value of @ref ADC_Scan_mode */ - - uint32_t EOCSelection; /*!< Specifies which EOC (End Of Conversion) flag is used for conversion by polling and interruption: end of conversion of each rank or complete sequence. - This parameter can be a value of @ref ADC_EOCSelection. */ - - uint32_t LowPowerAutoWait; /*!< Selects the dynamic low power Auto Delay: new conversion start only when the previous - conversion (for regular group) or previous sequence (for injected group) has been processed by user software - (EOC bit cleared or DR read for regular conversions, JEOS cleared for injected conversions). - This feature automatically adapts the speed of ADC to the speed of the system that reads the data. Moreover, this avoids risk of overrun - for low frequency applications. - This parameter can be set to ENABLE or DISABLE. - Note: Do not use with interruption or DMA (HAL_ADC_Start_IT(), HAL_ADC_Start_DMA(), HAL_ADCEx_InjectedStart_IT()) when it is necessary - to clear immediately the EOC flag to free the IRQ vector sequencer. - Do use with polling: 1. Start conversion with HAL_ADC_Start() or HAL_ADCEx_InjectedStart(), 2. When conversion data is available: use - HAL_ADC_PollForConversion() to ensure that conversion is completed and HAL_ADC_GetValue() to retrieve conversion result and trig another - conversion. For injected conversion, resort to HAL_ADCEx_InjectedPollForConversion() then HAL_ADCEx_InjectedGetValue() */ - - uint32_t ContinuousConvMode; /*!< Specifies whether the conversion is performed in single mode (one conversion) or continuous mode for regular group, - after software start or external trigger occurred. - This parameter can be set to ENABLE or DISABLE. */ - - uint32_t NbrOfConversion; /*!< Specifies the number of ranks that will be converted within the regular group sequencer. - To use the regular group sequencer and convert several ranks, parameter 'ScanConvMode' must be enabled. - This parameter must be a number between Min_Data = 1 and Max_Data = 16. - Note: This parameter must be modified when no conversion is on going on regular group (ADC disabled, or ADC enabled without - continuous mode or external trigger that could launch a conversion). */ - - uint32_t DiscontinuousConvMode; /*!< Specifies whether the conversions sequence of regular group is performed in Complete-sequence/Discontinuous-sequence (main sequence - subdivided in successive parts). - Discontinuous mode is used only if sequencer is enabled (parameter 'ScanConvMode'). If sequencer is disabled, this parameter is discarded. - Discontinuous mode can be enabled only if continuous mode is disabled. - This parameter can be set to ENABLE or DISABLE. */ - - uint32_t NbrOfDiscConversion; /*!< Specifies the number of discontinuous conversions in which the main sequence of regular group (parameter NbrOfConversion) will be subdivided. - If parameter 'DiscontinuousConvMode' is disabled, this parameter is discarded. - This parameter must be a number between Min_Data = 1 and Max_Data = 8. */ - - uint32_t ExternalTrigConv; /*!< Selects the external event used to trigger the conversion start of regular group. - If set to ADC_SOFTWARE_START, external triggers are disabled and software trigger is used instead. - This parameter can be a value of @ref ADC_Regular_External_Trigger_Source. - Caution: external trigger source is common to ADCs. */ - - uint32_t ExternalTrigConvEdge; /*!< Selects the external trigger edge of regular group. - If set to ADC_EXTERNALTRIGCONVEDGE_NONE, external triggers are disabled and software trigger is used instead. - This parameter can be a value of @ref ADC_Regular_External_Trigger_Source_Edge */ - - uint32_t DMAContinuousRequests; /*!< Specifies whether the DMA requests are performed in one shot mode (DMA transfer stops when number of conversions is reached) - or in Continuous mode (DMA transfer unlimited, whatever number of conversions). - Note: In continuous mode, DMA must be configured in circular mode. Otherwise an overrun will be triggered when DMA buffer maximum pointer is reached. - This parameter can be set to ENABLE or DISABLE. - Note: This parameter must be modified when no conversion is on going on both regular and injected groups - (ADC disabled, or ADC enabled without continuous mode or external trigger that could launch a conversion). */ - - uint32_t Overrun; /*!< Select the behaviour in case of overrun: data overwritten or preserved (default). - This parameter applies to regular group only. - This parameter can be a value of @ref ADC_Overrun. - Note: Case of overrun set to data preserved and usage with end on conversion interruption (HAL_Start_IT()): ADC IRQ handler has to clear - end of conversion flags, this induces the release of the preserved data. If needed, this data can be saved by user-developped function - HAL_ADC_ConvCpltCallback() (called before end of conversion flags clear). - Note: Error reporting with respect to the conversion mode: - - Usage with ADC conversion by polling for event or interruption: Error is reported only if overrun is set to data preserved. If overrun is set to data - overwritten, user can willingly not read all the converted data, this is not considered as an erroneous case. - - Usage with ADC conversion by DMA: Error is reported whatever overrun setting (DMA is expected to process all data from data register). */ - - uint32_t OversamplingMode; /*!< Specifies whether the oversampling feature is enabled or disabled. - This parameter can be set to ENABLE or DISABLE. - Note: This parameter can be modified only if there is no conversion is ongoing (both ADSTART and JADSTART cleared). */ - - ADC_OversamplingTypeDef Oversampling; /*!< Specifies the Oversampling parameters. - Caution: this setting overwrites the previous oversampling configuration if oversampling already enabled. - Note: This parameter can be modified only if there is no conversion is ongoing (both ADSTART and JADSTART cleared). */ -}ADC_InitTypeDef; - - -/** @defgroup ADC_States ADC States - * @{ - */ - -/** - * @brief HAL ADC state machine: ADC State bitfield definition - */ -/* States of ADC global scope */ -#define HAL_ADC_STATE_RESET ((uint32_t)0x00000000) /*!< ADC not yet initialized or disabled */ -#define HAL_ADC_STATE_READY ((uint32_t)0x00000001) /*!< ADC peripheral ready for use */ -#define HAL_ADC_STATE_BUSY_INTERNAL ((uint32_t)0x00000002) /*!< ADC is busy because of an internal process (initialization, calibration) */ -#define HAL_ADC_STATE_TIMEOUT ((uint32_t)0x00000004) /*!< TimeOut occurrence */ - -/* States of ADC errors */ -#define HAL_ADC_STATE_ERROR_INTERNAL ((uint32_t)0x00000010) /*!< Internal error occurrence */ -#define HAL_ADC_STATE_ERROR_CONFIG ((uint32_t)0x00000020) /*!< Configuration error occurrence */ -#define HAL_ADC_STATE_ERROR_DMA ((uint32_t)0x00000040) /*!< DMA error occurrence */ - -/* States of ADC regular group */ -#define HAL_ADC_STATE_REG_BUSY ((uint32_t)0x00000100) /*!< A regular conversion is ongoing or can occur (either by continuous mode, - external trigger, low power auto power-on, multimode ADC master control) */ -#define HAL_ADC_STATE_REG_EOC ((uint32_t)0x00000200) /*!< Regular conversion data available */ -#define HAL_ADC_STATE_REG_OVR ((uint32_t)0x00000400) /*!< Overrun occurrence */ -#define HAL_ADC_STATE_REG_EOSMP ((uint32_t)0x00000800) /*!< End Of Sampling flag raised */ - -/* States of ADC injected group */ -#define HAL_ADC_STATE_INJ_BUSY ((uint32_t)0x00001000) /*!< An injected conversion is ongoing or can occur (either by auto-injection mode, - external trigger, low power auto power-on, multimode ADC master control) */ -#define HAL_ADC_STATE_INJ_EOC ((uint32_t)0x00002000) /*!< Injected conversion data available */ -#define HAL_ADC_STATE_INJ_JQOVF ((uint32_t)0x00004000) /*!< Injected queue overflow occurrence */ - -/* States of ADC analog watchdogs */ -#define HAL_ADC_STATE_AWD1 ((uint32_t)0x00010000) /*!< Out-of-window occurrence of Analog Watchdog 1 */ -#define HAL_ADC_STATE_AWD2 ((uint32_t)0x00020000) /*!< Out-of-window occurrence of Analog Watchdog 2 */ -#define HAL_ADC_STATE_AWD3 ((uint32_t)0x00040000) /*!< Out-of-window occurrence of Analog Watchdog 3 */ - -/* States of ADC multi-mode */ -#define HAL_ADC_STATE_MULTIMODE_SLAVE ((uint32_t)0x00100000) /*!< ADC in multimode slave state, controlled by another ADC master */ - -/** - * @} - */ - -/** - * @brief ADC Injection Configuration - */ -typedef struct -{ - uint32_t ContextQueue; /*!< Injected channel configuration context: build-up over each - HAL_ADCEx_InjectedConfigChannel() call to finally initialize - JSQR register at HAL_ADCEx_InjectedConfigChannel() last call */ - - uint32_t ChannelCount; /*!< Number of channels in the injected sequence */ -}ADC_InjectionConfigTypeDef; - - - -/** - * @brief ADC handle Structure definition - */ -typedef struct -{ - ADC_TypeDef *Instance; /*!< Register base address */ - - ADC_InitTypeDef Init; /*!< ADC initialization parameters and regular conversions setting */ - - DMA_HandleTypeDef *DMA_Handle; /*!< Pointer DMA Handler */ - - HAL_LockTypeDef Lock; /*!< ADC locking object */ - - __IO uint32_t State; /*!< ADC communication state (bit-map of ADC states) */ - - __IO uint32_t ErrorCode; /*!< ADC Error code */ - - ADC_InjectionConfigTypeDef InjectionConfig ; /*!< ADC injected channel configuration build-up structure */ -}ADC_HandleTypeDef; - - - -/** - * @brief Structure definition of ADC channel for regular group - * @note The setting of these parameters with function HAL_ADC_ConfigChannel() is conditioned by ADC state. - * ADC state can be either: - * - For all parameters: ADC disabled (this is the only possible ADC state to modify parameter 'SingleDiff') - * - For all except parameters 'SamplingTime', 'Offset', 'OffsetNumber': ADC enabled without conversion on going on regular group. - * - For parameters 'SamplingTime', 'Offset', 'OffsetNumber': ADC enabled without conversion on going on regular and injected groups. - * If ADC is not in the appropriate state to modify some parameters, these parameters setting is bypassed - * without error reporting (as it can be the expected behaviour in case of intended action to update another parameter - * (which fulfills the ADC state condition) on the fly). - */ -typedef struct -{ - uint32_t Channel; /*!< Specifies the channel to configure into ADC regular group. - This parameter can be a value of @ref ADC_channels - Note: Depending on devices and ADC instances, some channels may not be available. Refer to device DataSheet for channels availability. */ - uint32_t Rank; /*!< Specifies the rank in the regular group sequencer. - This parameter can be a value of @ref ADCEx_regular_rank - Note: to disable a channel or change order of conversion sequencer, rank containing a previous channel setting can be overwritten by - the new channel setting (or parameter number of conversions adjusted) */ - uint32_t SamplingTime; /*!< Sampling time value to be set for the selected channel. - Unit: ADC clock cycles - Conversion time is the addition of sampling time and processing time (12.5 ADC clock cycles at ADC resolution 12 bits, 10.5 cycles at 10 bits, - 8.5 cycles at 8 bits, 6.5 cycles at 6 bits). - This parameter can be a value of @ref ADC_sampling_times - Caution: This parameter applies to a channel that can be used in a regular and/or injected group. - It overwrites the last setting. - Note: In case of usage of internal measurement channels (VrefInt/Vbat/TempSensor), - sampling time constraints must be respected (sampling time can be adjusted with respect to the ADC clock frequency and sampling time setting) - Refer to device DataSheet for timings values. */ - uint32_t SingleDiff; /*!< Selection of single-ended or differential input. - In differential mode: Differential measurement is carried out between the selected channel 'i' (positive input) and channel 'i+1' (negative input). - Only channel 'i' has to be configured, channel 'i+1' is configured automatically. - This parameter must be a value of @ref ADCEx_SingleDifferential - Caution: This parameter applies to a channel that can be used in a regular and/or injected group. - It overwrites the last setting. - Note: Refer to Reference Manual to ensure the selected channel is available in differential mode. - Note: When configuring a channel 'i' in differential mode, the channel 'i+1' is not usable separately. - Note: This parameter must be modified when ADC is disabled (before ADC start conversion or after ADC stop conversion). - If ADC is enabled, this parameter setting is bypassed without error reporting (as it can be the expected behaviour in case - of another parameter update on the fly) */ - uint32_t OffsetNumber; /*!< Selects the offset number - This parameter can be a value of @ref ADCEx_OffsetNumber - Caution: Only one offset is allowed per channel. This parameter overwrites the last setting. */ - uint32_t Offset; /*!< Defines the offset to be subtracted from the raw converted data. - Offset value must be a positive number. - Depending of ADC resolution selected (12, 10, 8 or 6 bits), this parameter must be a number between Min_Data = 0x000 and Max_Data = 0xFFF, - 0x3FF, 0xFF or 0x3F respectively. - Note: This parameter must be modified when no conversion is on going on both regular and injected groups (ADC disabled, or ADC enabled - without continuous mode or external trigger that could launch a conversion). */ -}ADC_ChannelConfTypeDef; - - -/** - * @brief Structure definition of ADC analog watchdog - * @note The setting of these parameters with function HAL_ADC_AnalogWDGConfig() is conditioned by ADC state. - * ADC state can be either: ADC disabled or ADC enabled without conversion on going on regular and injected groups. - */ -typedef struct -{ - uint32_t WatchdogNumber; /*!< Selects which ADC analog watchdog is applied to the selected channel. - For Analog Watchdog 1: Only 1 channel can be monitored (or overall group of channels by setting parameter 'WatchdogMode') - For Analog Watchdog 2 and 3: Several channels can be monitored (by successive calls of 'HAL_ADC_AnalogWDGConfig()' for each channel) - This parameter can be a value of @ref ADCEx_analog_watchdog_number. */ - uint32_t WatchdogMode; /*!< For Analog Watchdog 1: Configures the ADC analog watchdog mode: single channel/overall group of channels, regular/injected group. - For Analog Watchdog 2 and 3: There is no configuration for overall group of channels as AWD1. Set value 'ADC_ANALOGWATCHDOG_NONE' to reset - channels group programmed with parameter 'Channel', set any other value to program the channel(s) to be monitored. - This parameter can be a value of @ref ADCEx_analog_watchdog_mode. */ - uint32_t Channel; /*!< Selects which ADC channel to monitor by analog watchdog. - For Analog Watchdog 1: this parameter has an effect only if parameter 'WatchdogMode' is configured on single channel (only 1 channel can be monitored). - For Analog Watchdog 2 and 3: Several channels can be monitored (successive calls of HAL_ADC_AnalogWDGConfig() must be done, one for each channel. - Channels group reset can be done by setting WatchdogMode to 'ADC_ANALOGWATCHDOG_NONE'). - This parameter can be a value of @ref ADC_channels. */ - uint32_t ITMode; /*!< Specifies whether the analog watchdog is configured in interrupt or polling mode. - This parameter can be set to ENABLE or DISABLE */ - uint32_t HighThreshold; /*!< Configures the ADC analog watchdog High threshold value. - Depending of ADC resolution selected (12, 10, 8 or 6 bits), this parameter must be a number between Min_Data = 0x000 and Max_Data = 0xFFF, - 0x3FF, 0xFF or 0x3F respectively. - Note: Analog watchdog 2 and 3 are limited to a resolution of 8 bits: if ADC resolution is 12 bits - the 4 LSB are ignored, if ADC resolution is 10 bits the 2 LSB are ignored. */ - uint32_t LowThreshold; /*!< Configures the ADC analog watchdog Low threshold value. - Depending of ADC resolution selected (12, 10, 8 or 6 bits), this parameter must be a number between Min_Data = 0x000 and Max_Data = 0xFFF, 0x3FF, 0xFF or 0x3F respectively. - Note: Analog watchdog 2 and 3 are limited to a resolution of 8 bits: if ADC resolution is 12 bits - the 4 LSB are ignored, if ADC resolution is 10 bits the 2 LSB are ignored. */ -}ADC_AnalogWDGConfTypeDef; - - -/** - * @} - */ - -/* Exported constants --------------------------------------------------------*/ - -/** @defgroup ADC_Exported_Constants ADC Exported Constants - * @{ - */ - -/** @defgroup ADC_Error_Code ADC Error Code - * @{ - */ -#define HAL_ADC_ERROR_NONE ((uint32_t)0x00) /*!< No error */ -#define HAL_ADC_ERROR_INTERNAL ((uint32_t)0x01) /*!< ADC IP internal error: problem of - clocking, enable/disable, erroneous state */ -#define HAL_ADC_ERROR_OVR ((uint32_t)0x02) /*!< Overrun error */ -#define HAL_ADC_ERROR_DMA ((uint32_t)0x04) /*!< DMA transfer error */ -#define HAL_ADC_ERROR_JQOVF ((uint32_t)0x08) /*!< Injected context queue overflow error */ -/** - * @} - */ - -/** @defgroup ADC_ClockPrescaler ADC Clock Prescaler - * @{ - */ -#define ADC_CLOCK_SYNC_PCLK_DIV1 ((uint32_t)ADC_CCR_CKMODE_0) /*!< ADC synchronous clock derived from AHB clock not divided */ -#define ADC_CLOCK_SYNC_PCLK_DIV2 ((uint32_t)ADC_CCR_CKMODE_1) /*!< ADC synchronous clock derived from AHB clock divided by 2 */ -#define ADC_CLOCK_SYNC_PCLK_DIV4 ((uint32_t)ADC_CCR_CKMODE) /*!< ADC synchronous clock derived from AHB clock divided by 4 */ - -#define ADC_CLOCKPRESCALER_PCLK_DIV1 ADC_CLOCK_SYNC_PCLK_DIV1 /*!< Obsolete naming, kept for compatibility with some other devices */ -#define ADC_CLOCKPRESCALER_PCLK_DIV2 ADC_CLOCK_SYNC_PCLK_DIV2 /*!< Obsolete naming, kept for compatibility with some other devices */ -#define ADC_CLOCKPRESCALER_PCLK_DIV4 ADC_CLOCK_SYNC_PCLK_DIV4 /*!< Obsolete naming, kept for compatibility with some other devices */ - -#define ADC_CLOCK_ASYNC_DIV1 ((uint32_t)0x00000000) /*!< ADC asynchronous clock not divided */ -#define ADC_CLOCK_ASYNC_DIV2 ((uint32_t)ADC_CCR_PRESC_0) /*!< ADC asynchronous clock divided by 2 */ -#define ADC_CLOCK_ASYNC_DIV4 ((uint32_t)ADC_CCR_PRESC_1) /*!< ADC asynchronous clock divided by 4 */ -#define ADC_CLOCK_ASYNC_DIV6 ((uint32_t)(ADC_CCR_PRESC_1|ADC_CCR_PRESC_0)) /*!< ADC asynchronous clock divided by 6 */ -#define ADC_CLOCK_ASYNC_DIV8 ((uint32_t)(ADC_CCR_PRESC_2)) /*!< ADC asynchronous clock divided by 8 */ -#define ADC_CLOCK_ASYNC_DIV10 ((uint32_t)(ADC_CCR_PRESC_2|ADC_CCR_PRESC_0)) /*!< ADC asynchronous clock divided by 10 */ -#define ADC_CLOCK_ASYNC_DIV12 ((uint32_t)(ADC_CCR_PRESC_2|ADC_CCR_PRESC_1)) /*!< ADC asynchronous clock divided by 12 */ -#define ADC_CLOCK_ASYNC_DIV16 ((uint32_t)(ADC_CCR_PRESC_2|ADC_CCR_PRESC_1|ADC_CCR_PRESC_0)) /*!< ADC asynchronous clock divided by 16 */ -#define ADC_CLOCK_ASYNC_DIV32 ((uint32_t)(ADC_CCR_PRESC_3)) /*!< ADC asynchronous clock divided by 32 */ -#define ADC_CLOCK_ASYNC_DIV64 ((uint32_t)(ADC_CCR_PRESC_3|ADC_CCR_PRESC_0)) /*!< ADC asynchronous clock divided by 64 */ -#define ADC_CLOCK_ASYNC_DIV128 ((uint32_t)(ADC_CCR_PRESC_3|ADC_CCR_PRESC_1)) /*!< ADC asynchronous clock divided by 128 */ -#define ADC_CLOCK_ASYNC_DIV256 ((uint32_t)(ADC_CCR_PRESC_3|ADC_CCR_PRESC_1|ADC_CCR_PRESC_0)) /*!< ADC asynchronous clock divided by 256 */ -/** - * @} - */ - - -/** @defgroup ADC_Resolution ADC Resolution - * @{ - */ -#define ADC_RESOLUTION_12B ((uint32_t)0x00000000) /*!< ADC 12-bit resolution */ -#define ADC_RESOLUTION_10B ((uint32_t)ADC_CFGR_RES_0) /*!< ADC 10-bit resolution */ -#define ADC_RESOLUTION_8B ((uint32_t)ADC_CFGR_RES_1) /*!< ADC 8-bit resolution */ -#define ADC_RESOLUTION_6B ((uint32_t)ADC_CFGR_RES) /*!< ADC 6-bit resolution */ -/** - * @} - */ - -/** @defgroup ADC_Data_align ADC Data Alignment - * @{ - */ -#define ADC_DATAALIGN_RIGHT ((uint32_t)0x00000000) /*!< Data right alignment */ -#define ADC_DATAALIGN_LEFT ((uint32_t)ADC_CFGR_ALIGN) /*!< Data left alignment */ -/** - * @} - */ - -/** @defgroup ADC_Scan_mode ADC Scan Mode - * @{ - */ -#define ADC_SCAN_DISABLE ((uint32_t)0x00000000) /*!< Scan mode disabled */ -#define ADC_SCAN_ENABLE ((uint32_t)0x00000001) /*!< Scan mode enabled */ -/** - * @} - */ - -/** @defgroup ADC_Regular_External_Trigger_Source_Edge ADC External Trigger Source Edge for Regular Group - * @{ - */ -#define ADC_EXTERNALTRIGCONVEDGE_NONE ((uint32_t)0x00000000) /*!< Regular conversions hardware trigger detection disabled */ -#define ADC_EXTERNALTRIGCONVEDGE_RISING ((uint32_t)ADC_CFGR_EXTEN_0) /*!< Regular conversions hardware trigger detection on the rising edge */ -#define ADC_EXTERNALTRIGCONVEDGE_FALLING ((uint32_t)ADC_CFGR_EXTEN_1) /*!< Regular conversions hardware trigger detection on the falling edge */ -#define ADC_EXTERNALTRIGCONVEDGE_RISINGFALLING ((uint32_t)ADC_CFGR_EXTEN) /*!< Regular conversions hardware trigger detection on both the rising and falling edges */ -/** - * @} - */ - -/** @defgroup ADC_Regular_External_Trigger_Source ADC External Trigger Source for Regular Group - * @{ - */ - -/* External triggers of ADC regular group */ -#define ADC_EXTERNALTRIG_T1_CC1 ((uint32_t)0x00000000) /*!< Event 0 triggers regular group conversion start */ -#define ADC_EXTERNALTRIG_T1_CC2 ((uint32_t)ADC_CFGR_EXTSEL_0) /*!< Event 1 triggers regular group conversion start */ -#define ADC_EXTERNALTRIG_T1_CC3 ((uint32_t)ADC_CFGR_EXTSEL_1) /*!< Event 2 triggers regular group conversion start */ -#define ADC_EXTERNALTRIG_T2_CC2 ((uint32_t)(ADC_CFGR_EXTSEL_1 | ADC_CFGR_EXTSEL_0)) /*!< Event 3 triggers regular group conversion start */ -#define ADC_EXTERNALTRIG_T3_TRGO ((uint32_t)ADC_CFGR_EXTSEL_2) /*!< Event 4 triggers regular group conversion start */ -#define ADC_EXTERNALTRIG_T4_CC4 ((uint32_t)(ADC_CFGR_EXTSEL_2 | ADC_CFGR_EXTSEL_0)) /*!< Event 5 triggers regular group conversion start */ -#define ADC_EXTERNALTRIG_EXT_IT11 ((uint32_t)(ADC_CFGR_EXTSEL_2 | ADC_CFGR_EXTSEL_1)) /*!< Event 6 triggers regular group conversion start */ -#define ADC_EXTERNALTRIG_T8_TRGO ((uint32_t)(ADC_CFGR_EXTSEL_2 | ADC_CFGR_EXTSEL_1 | ADC_CFGR_EXTSEL_0)) /*!< Event 7 triggers regular group conversion start */ -#define ADC_EXTERNALTRIG_T8_TRGO2 ((uint32_t) ADC_CFGR_EXTSEL_3) /*!< Event 8 triggers regular group conversion start */ -#define ADC_EXTERNALTRIG_T1_TRGO ((uint32_t)(ADC_CFGR_EXTSEL_3 | ADC_CFGR_EXTSEL_0)) /*!< Event 9 triggers regular group conversion start */ -#define ADC_EXTERNALTRIG_T1_TRGO2 ((uint32_t)(ADC_CFGR_EXTSEL_3 | ADC_CFGR_EXTSEL_1)) /*!< Event 10 triggers regular group conversion start */ -#define ADC_EXTERNALTRIG_T2_TRGO ((uint32_t)(ADC_CFGR_EXTSEL_3 | ADC_CFGR_EXTSEL_1 | ADC_CFGR_EXTSEL_0)) /*!< Event 11 triggers regular group conversion start */ -#define ADC_EXTERNALTRIG_T4_TRGO ((uint32_t)(ADC_CFGR_EXTSEL_3 | ADC_CFGR_EXTSEL_2)) /*!< Event 12 triggers regular group conversion start */ -#define ADC_EXTERNALTRIG_T6_TRGO ((uint32_t)(ADC_CFGR_EXTSEL_3 | ADC_CFGR_EXTSEL_2 | ADC_CFGR_EXTSEL_0)) /*!< Event 13 triggers regular group conversion start */ -#define ADC_EXTERNALTRIG_T15_TRGO ((uint32_t)(ADC_CFGR_EXTSEL_3 | ADC_CFGR_EXTSEL_2 | ADC_CFGR_EXTSEL_1)) /*!< Event 14 triggers regular group conversion start */ -#define ADC_EXTERNALTRIG_T3_CC4 ((uint32_t)ADC_CFGR_EXTSEL) /*!< Event 15 triggers regular group conversion start */ - -#define ADC_SOFTWARE_START ((uint32_t)0x00000001) /*!< Software triggers regular group conversion start */ -/** - * @} - */ - - -/** @defgroup ADC_EOCSelection ADC End of Regular Sequence/Conversion - * @{ - */ -#define ADC_EOC_SINGLE_CONV ((uint32_t) ADC_ISR_EOC) /*!< End of conversion flag */ -#define ADC_EOC_SEQ_CONV ((uint32_t) ADC_ISR_EOS) /*!< End of sequence flag */ -#define ADC_EOC_SINGLE_SEQ_CONV ((uint32_t)(ADC_ISR_EOC | ADC_ISR_EOS)) /*!< Reserved for future use */ -/** - * @} - */ - -/** @defgroup ADC_Overrun ADC overrun - * @{ - */ -#define ADC_OVR_DATA_PRESERVED ((uint32_t)0x00000000) /*!< Data preserved in case of overrun */ -#define ADC_OVR_DATA_OVERWRITTEN ((uint32_t)ADC_CFGR_OVRMOD) /*!< Data overwritten in case of overrun */ -/** - * @} - */ - -/** @defgroup ADC_channels ADC Channels - * @{ - */ -#define ADC_CHANNEL_0 ((uint32_t)(0x00000000)) /*!< ADC channel 0 */ -#define ADC_CHANNEL_1 ((uint32_t)(ADC_SQR3_SQ10_0)) /*!< ADC channel 1 */ -#define ADC_CHANNEL_2 ((uint32_t)(ADC_SQR3_SQ10_1)) /*!< ADC channel 2 */ -#define ADC_CHANNEL_3 ((uint32_t)(ADC_SQR3_SQ10_1 | ADC_SQR3_SQ10_0)) /*!< ADC channel 3 */ -#define ADC_CHANNEL_4 ((uint32_t)(ADC_SQR3_SQ10_2)) /*!< ADC channel 4 */ -#define ADC_CHANNEL_5 ((uint32_t)(ADC_SQR3_SQ10_2 | ADC_SQR3_SQ10_0)) /*!< ADC channel 5 */ -#define ADC_CHANNEL_6 ((uint32_t)(ADC_SQR3_SQ10_2 | ADC_SQR3_SQ10_1)) /*!< ADC channel 6 */ -#define ADC_CHANNEL_7 ((uint32_t)(ADC_SQR3_SQ10_2 | ADC_SQR3_SQ10_1 | ADC_SQR3_SQ10_0)) /*!< ADC channel 7 */ -#define ADC_CHANNEL_8 ((uint32_t)(ADC_SQR3_SQ10_3)) /*!< ADC channel 8 */ -#define ADC_CHANNEL_9 ((uint32_t)(ADC_SQR3_SQ10_3 | ADC_SQR3_SQ10_0)) /*!< ADC channel 9 */ -#define ADC_CHANNEL_10 ((uint32_t)(ADC_SQR3_SQ10_3 | ADC_SQR3_SQ10_1)) /*!< ADC channel 10 */ -#define ADC_CHANNEL_11 ((uint32_t)(ADC_SQR3_SQ10_3 | ADC_SQR3_SQ10_1 | ADC_SQR3_SQ10_0)) /*!< ADC channel 11 */ -#define ADC_CHANNEL_12 ((uint32_t)(ADC_SQR3_SQ10_3 | ADC_SQR3_SQ10_2)) /*!< ADC channel 12 */ -#define ADC_CHANNEL_13 ((uint32_t)(ADC_SQR3_SQ10_3 | ADC_SQR3_SQ10_2 | ADC_SQR3_SQ10_0)) /*!< ADC channel 13 */ -#define ADC_CHANNEL_14 ((uint32_t)(ADC_SQR3_SQ10_3 | ADC_SQR3_SQ10_2 | ADC_SQR3_SQ10_1)) /*!< ADC channel 14 */ -#define ADC_CHANNEL_15 ((uint32_t)(ADC_SQR3_SQ10_3 | ADC_SQR3_SQ10_2 | ADC_SQR3_SQ10_1 | ADC_SQR3_SQ10_0)) /*!< ADC channel 15 */ -#define ADC_CHANNEL_16 ((uint32_t)(ADC_SQR3_SQ10_4)) /*!< ADC channel 16 */ -#define ADC_CHANNEL_17 ((uint32_t)(ADC_SQR3_SQ10_4 | ADC_SQR3_SQ10_0)) /*!< ADC channel 17 */ -#define ADC_CHANNEL_18 ((uint32_t)(ADC_SQR3_SQ10_4 | ADC_SQR3_SQ10_1)) /*!< ADC channel 18 */ - -/* Note: VrefInt, TempSensor and Vbat internal channels are not available on all ADC's - (information present in Reference Manual) */ -#define ADC_CHANNEL_TEMPSENSOR ADC_CHANNEL_17 /*!< ADC temperature sensor channel */ -#define ADC_CHANNEL_VBAT ADC_CHANNEL_18 /*!< ADC Vbat channel */ -#define ADC_CHANNEL_VREFINT ADC_CHANNEL_0 /*!< ADC Vrefint channel */ -/** - * @} - */ - -/** @defgroup ADC_sampling_times ADC Sampling Times - * @{ - */ -#define ADC_SAMPLETIME_2CYCLE_5 ((uint32_t)0x00000000) /*!< Sampling time 2.5 ADC clock cycle */ -#define ADC_SAMPLETIME_6CYCLES_5 ((uint32_t)ADC_SMPR2_SMP10_0) /*!< Sampling time 6.5 ADC clock cycles */ -#define ADC_SAMPLETIME_12CYCLES_5 ((uint32_t)ADC_SMPR2_SMP10_1) /*!< Sampling time 12.5 ADC clock cycles */ -#define ADC_SAMPLETIME_24CYCLES_5 ((uint32_t)(ADC_SMPR2_SMP10_1 | ADC_SMPR2_SMP10_0)) /*!< Sampling time 24.5 ADC clock cycles */ -#define ADC_SAMPLETIME_47CYCLES_5 ((uint32_t)ADC_SMPR2_SMP10_2) /*!< Sampling time 47.5 ADC clock cycles */ -#define ADC_SAMPLETIME_92CYCLES_5 ((uint32_t)(ADC_SMPR2_SMP10_2 | ADC_SMPR2_SMP10_0)) /*!< Sampling time 92.5 ADC clock cycles */ -#define ADC_SAMPLETIME_247CYCLES_5 ((uint32_t)(ADC_SMPR2_SMP10_2 | ADC_SMPR2_SMP10_1)) /*!< Sampling time 247.5 ADC clock cycles */ -#define ADC_SAMPLETIME_640CYCLES_5 ((uint32_t)ADC_SMPR2_SMP10) /*!< Sampling time 640.5 ADC clock cycles */ -/** - * @} - */ - -/** - * @} - */ - -/* Private macros ------------------------------------------------------------*/ - -/** @defgroup ADC_Private_Macro ADC Private Macros - * @{ - */ - -/** - * @brief Test if conversion trigger of regular group is software start - * or external trigger. - * @param __HANDLE__: ADC handle. - * @retval SET (software start) or RESET (external trigger) - */ -#define ADC_IS_SOFTWARE_START_REGULAR(__HANDLE__) \ - (((__HANDLE__)->Instance->CFGR & ADC_CFGR_EXTEN) == RESET) - -/** - * @brief Return resolution bits in CFGR register RES[1:0] field. - * @param __HANDLE__: ADC handle. - * @retval 2-bit field RES of CFGR register. - */ -#define ADC_GET_RESOLUTION(__HANDLE__) (((__HANDLE__)->Instance->CFGR) & ADC_CFGR_RES) - -/** - * @brief Clear ADC error code (set it to no error code "HAL_ADC_ERROR_NONE"). - * @param __HANDLE__: ADC handle. - * @retval None - */ -#define ADC_CLEAR_ERRORCODE(__HANDLE__) ((__HANDLE__)->ErrorCode = HAL_ADC_ERROR_NONE) - -/** - * @brief Verification of ADC state: enabled or disabled. - * @param __HANDLE__: ADC handle. - * @retval SET (ADC enabled) or RESET (ADC disabled) - */ -#define ADC_IS_ENABLE(__HANDLE__) \ - (( ((((__HANDLE__)->Instance->CR) & (ADC_CR_ADEN | ADC_CR_ADDIS)) == ADC_CR_ADEN) && \ - ((((__HANDLE__)->Instance->ISR) & ADC_FLAG_RDY) == ADC_FLAG_RDY) \ - ) ? SET : RESET) - - -/** - * @brief Check if conversion is on going on regular group. - * @param __HANDLE__: ADC handle. - * @retval SET (conversion is on going) or RESET (no conversion is on going) - */ -#define ADC_IS_CONVERSION_ONGOING_REGULAR(__HANDLE__) \ - (( (((__HANDLE__)->Instance->CR) & ADC_CR_ADSTART) == RESET \ - ) ? RESET : SET) - - -/** - * @brief Simultaneously clear and set specific bits of the handle State. - * @note ADC_STATE_CLR_SET() macro is merely aliased to generic macro MODIFY_REG(), - * the first parameter is the ADC handle State, the second parameter is the - * bit field to clear, the third and last parameter is the bit field to set. - * @retval None - */ -#define ADC_STATE_CLR_SET MODIFY_REG - -/** - * @brief Verify that a given value is aligned with the ADC resolution range. - * @param __RESOLUTION__: ADC resolution (12, 10, 8 or 6 bits). - * @param __ADC_VALUE__: value checked against the resolution. - * @retval SET (__ADC_VALUE__ in line with __RESOLUTION__) or RESET (__ADC_VALUE__ not in line with __RESOLUTION__) - */ -#define IS_ADC_RANGE(__RESOLUTION__, __ADC_VALUE__) \ - ((((__RESOLUTION__) == ADC_RESOLUTION_12B) && ((__ADC_VALUE__) <= ((uint32_t)0x0FFF))) || \ - (((__RESOLUTION__) == ADC_RESOLUTION_10B) && ((__ADC_VALUE__) <= ((uint32_t)0x03FF))) || \ - (((__RESOLUTION__) == ADC_RESOLUTION_8B) && ((__ADC_VALUE__) <= ((uint32_t)0x00FF))) || \ - (((__RESOLUTION__) == ADC_RESOLUTION_6B) && ((__ADC_VALUE__) <= ((uint32_t)0x003F))) ) - - -/** - * @brief Verify the length of the scheduled regular conversions group. - * @param __LENGTH__: number of programmed conversions. - * @retval SET (__LENGTH__ is within the maximum number of possible programmable regular conversions) or RESET (__LENGTH__ is null or too large) - */ -#define IS_ADC_REGULAR_NB_CONV(__LENGTH__) (((__LENGTH__) >= ((uint32_t)1)) && ((__LENGTH__) <= ((uint32_t)16))) - - -/** - * @brief Verify the number of scheduled regular conversions in discontinuous mode. - * @param NUMBER: number of scheduled regular conversions in discontinuous mode. - * @retval SET (NUMBER is within the maximum number of regular conversions in discontinous mode) or RESET (NUMBER is null or too large) - */ -#define IS_ADC_REGULAR_DISCONT_NUMBER(NUMBER) (((NUMBER) >= ((uint32_t)1)) && ((NUMBER) <= ((uint32_t)8))) - - -/** - * @brief Verify the ADC clock setting. - * @param __ADC_CLOCK__: programmed ADC clock. - * @retval SET (__ADC_CLOCK__ is a valid value) or RESET (__ADC_CLOCK__ is invalid) - */ -#define IS_ADC_CLOCKPRESCALER(__ADC_CLOCK__) (((__ADC_CLOCK__) == ADC_CLOCK_SYNC_PCLK_DIV1) || \ - ((__ADC_CLOCK__) == ADC_CLOCK_SYNC_PCLK_DIV2) || \ - ((__ADC_CLOCK__) == ADC_CLOCK_SYNC_PCLK_DIV4) || \ - ((__ADC_CLOCK__) == ADC_CLOCK_ASYNC_DIV1) || \ - ((__ADC_CLOCK__) == ADC_CLOCK_ASYNC_DIV2) || \ - ((__ADC_CLOCK__) == ADC_CLOCK_ASYNC_DIV4) || \ - ((__ADC_CLOCK__) == ADC_CLOCK_ASYNC_DIV6) || \ - ((__ADC_CLOCK__) == ADC_CLOCK_ASYNC_DIV8) || \ - ((__ADC_CLOCK__) == ADC_CLOCK_ASYNC_DIV10) || \ - ((__ADC_CLOCK__) == ADC_CLOCK_ASYNC_DIV12) || \ - ((__ADC_CLOCK__) == ADC_CLOCK_ASYNC_DIV16) || \ - ((__ADC_CLOCK__) == ADC_CLOCK_ASYNC_DIV32) || \ - ((__ADC_CLOCK__) == ADC_CLOCK_ASYNC_DIV64) || \ - ((__ADC_CLOCK__) == ADC_CLOCK_ASYNC_DIV128) || \ - ((__ADC_CLOCK__) == ADC_CLOCK_ASYNC_DIV256) ) - - -/** - * @brief Verify the ADC resolution setting. - * @param __RESOLUTION__: programmed ADC resolution. - * @retval SET (__RESOLUTION__ is a valid value) or RESET (__RESOLUTION__ is invalid) - */ -#define IS_ADC_RESOLUTION(__RESOLUTION__) (((__RESOLUTION__) == ADC_RESOLUTION_12B) || \ - ((__RESOLUTION__) == ADC_RESOLUTION_10B) || \ - ((__RESOLUTION__) == ADC_RESOLUTION_8B) || \ - ((__RESOLUTION__) == ADC_RESOLUTION_6B) ) - -/** - * @brief Verify the ADC resolution setting when limited to 6 or 8 bits. - * @param __RESOLUTION__: programmed ADC resolution when limited to 6 or 8 bits. - * @retval SET (__RESOLUTION__ is a valid value) or RESET (__RESOLUTION__ is invalid) - */ -#define IS_ADC_RESOLUTION_8_6_BITS(__RESOLUTION__) (((__RESOLUTION__) == ADC_RESOLUTION_8B) || \ - ((__RESOLUTION__) == ADC_RESOLUTION_6B) ) - -/** - * @brief Verify the ADC converted data alignment. - * @param __ALIGN__: programmed ADC converted data alignment. - * @retval SET (__ALIGN__ is a valid value) or RESET (__ALIGN__ is invalid) - */ -#define IS_ADC_DATA_ALIGN(__ALIGN__) (((__ALIGN__) == ADC_DATAALIGN_RIGHT) || \ - ((__ALIGN__) == ADC_DATAALIGN_LEFT) ) - - -/** - * @brief Verify the ADC scan mode. - * @param __SCAN_MODE__: programmed ADC scan mode. - * @retval SET (__SCAN_MODE__ is valid) or RESET (__SCAN_MODE__ is invalid) - */ -#define IS_ADC_SCAN_MODE(__SCAN_MODE__) (((__SCAN_MODE__) == ADC_SCAN_DISABLE) || \ - ((__SCAN_MODE__) == ADC_SCAN_ENABLE) ) - -/** - * @brief Verify the ADC edge trigger setting for regular group. - * @param __EDGE__: programmed ADC edge trigger setting. - * @retval SET (__EDGE__ is a valid value) or RESET (__EDGE__ is invalid) - */ -#define IS_ADC_EXTTRIG_EDGE(__EDGE__) (((__EDGE__) == ADC_EXTERNALTRIGCONVEDGE_NONE) || \ - ((__EDGE__) == ADC_EXTERNALTRIGCONVEDGE_RISING) || \ - ((__EDGE__) == ADC_EXTERNALTRIGCONVEDGE_FALLING) || \ - ((__EDGE__) == ADC_EXTERNALTRIGCONVEDGE_RISINGFALLING) ) - - - -/** - * @brief Verify the ADC regular conversions external trigger. - * @param __REGTRIG__: programmed ADC regular conversions external trigger. - * @retval SET (__REGTRIG__ is a valid value) or RESET (__REGTRIG__ is invalid) - */ -#define IS_ADC_EXTTRIG(__REGTRIG__) (((__REGTRIG__) == ADC_EXTERNALTRIG_T1_CC1) || \ - ((__REGTRIG__) == ADC_EXTERNALTRIG_T1_CC2) || \ - ((__REGTRIG__) == ADC_EXTERNALTRIG_T1_CC3) || \ - ((__REGTRIG__) == ADC_EXTERNALTRIG_T2_CC2) || \ - ((__REGTRIG__) == ADC_EXTERNALTRIG_T3_TRGO) || \ - ((__REGTRIG__) == ADC_EXTERNALTRIG_T4_CC4) || \ - ((__REGTRIG__) == ADC_EXTERNALTRIG_EXT_IT11) || \ - ((__REGTRIG__) == ADC_EXTERNALTRIG_T8_TRGO) || \ - ((__REGTRIG__) == ADC_EXTERNALTRIG_T8_TRGO2) || \ - ((__REGTRIG__) == ADC_EXTERNALTRIG_T1_TRGO) || \ - ((__REGTRIG__) == ADC_EXTERNALTRIG_T1_TRGO2) || \ - ((__REGTRIG__) == ADC_EXTERNALTRIG_T2_TRGO) || \ - ((__REGTRIG__) == ADC_EXTERNALTRIG_T4_TRGO) || \ - ((__REGTRIG__) == ADC_EXTERNALTRIG_T6_TRGO) || \ - ((__REGTRIG__) == ADC_EXTERNALTRIG_T15_TRGO) || \ - ((__REGTRIG__) == ADC_EXTERNALTRIG_T3_CC4) || \ - \ - ((__REGTRIG__) == ADC_SOFTWARE_START) ) - - - -/** - * @brief Verify the ADC regular conversions check for converted data availability. - * @param __EOC_SELECTION__: converted data availability check. - * @retval SET (__EOC_SELECTION__ is a valid value) or RESET (__EOC_SELECTION__ is invalid) - */ -#define IS_ADC_EOC_SELECTION(__EOC_SELECTION__) (((__EOC_SELECTION__) == ADC_EOC_SINGLE_CONV) || \ - ((__EOC_SELECTION__) == ADC_EOC_SEQ_CONV) || \ - ((__EOC_SELECTION__) == ADC_EOC_SINGLE_SEQ_CONV) ) - -/** - * @brief Verify the ADC regular conversions overrun handling. - * @param __OVR__: ADC regular conversions overrun handling. - * @retval SET (__OVR__ is a valid value) or RESET (__OVR__ is invalid) - */ -#define IS_ADC_OVERRUN(__OVR__) (((__OVR__) == ADC_OVR_DATA_PRESERVED) || \ - ((__OVR__) == ADC_OVR_DATA_OVERWRITTEN) ) - -/** - * @brief Verify the ADC conversions sampling time. - * @param __TIME__: ADC conversions sampling time. - * @retval SET (__TIME__ is a valid value) or RESET (__TIME__ is invalid) - */ -#define IS_ADC_SAMPLE_TIME(__TIME__) (((__TIME__) == ADC_SAMPLETIME_2CYCLE_5) || \ - ((__TIME__) == ADC_SAMPLETIME_6CYCLES_5) || \ - ((__TIME__) == ADC_SAMPLETIME_12CYCLES_5) || \ - ((__TIME__) == ADC_SAMPLETIME_24CYCLES_5) || \ - ((__TIME__) == ADC_SAMPLETIME_47CYCLES_5) || \ - ((__TIME__) == ADC_SAMPLETIME_92CYCLES_5) || \ - ((__TIME__) == ADC_SAMPLETIME_247CYCLES_5) || \ - ((__TIME__) == ADC_SAMPLETIME_640CYCLES_5) ) -/** - * @} - */ - - -/* Private constants ---------------------------------------------------------*/ - -/** @defgroup ADC_Private_Constants ADC Private Constants - * @{ - */ - -/* Fixed timeout values for ADC conversion (including sampling time) */ -/* Maximum sampling time is 640.5 ADC clock cycle (SMPx[2:0] = 0b111 */ -/* Maximum conversion time is 12.5 + Maximum sampling time */ -/* or 12.5 + 640.5 = 653 ADC clock cycles */ -/* Minimum ADC Clock frequency is 0.14 MHz */ -/* Maximum conversion time is */ -/* 653 / 0.14 MHz = 4.66 ms */ -#define ADC_STOP_CONVERSION_TIMEOUT ((uint32_t) 5) /*!< ADC stop time-out value */ - -/* Delay for temperature sensor stabilization time. */ -/* Maximum delay is 120us (refer device datasheet, parameter tSTART). */ -/* Unit: us */ -#define ADC_TEMPSENSOR_DELAY_US ((uint32_t) 120) - -/** - * @} - */ - -/* Exported macros -----------------------------------------------------------*/ - -/** @defgroup ADC_Exported_Macro ADC Exported Macros - * @{ - */ - -/** @brief Reset ADC handle state. - * @param __HANDLE__: ADC handle. - * @retval None - */ -#define __HAL_ADC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_ADC_STATE_RESET) - - -/** @brief Check whether the specified ADC interrupt source is enabled or not. - * @param __HANDLE__: ADC handle. - * @param __INTERRUPT__: ADC interrupt source to check - * This parameter can be one of the following values: - * @arg ADC_IT_RDY, ADC Ready (ADRDY) interrupt source - * @arg ADC_IT_EOSMP, ADC End of Sampling interrupt source - * @arg ADC_IT_EOC, ADC End of Regular Conversion interrupt source - * @arg ADC_IT_EOS, ADC End of Regular sequence of Conversions interrupt source - * @arg ADC_IT_OVR, ADC overrun interrupt source - * @arg ADC_IT_JEOC, ADC End of Injected Conversion interrupt source - * @arg ADC_IT_JEOS, ADC End of Injected sequence of Conversions interrupt source - * @arg ADC_IT_AWD1, ADC Analog watchdog 1 interrupt source (main analog watchdog) - * @arg ADC_IT_AWD2, ADC Analog watchdog 2 interrupt source (additional analog watchdog) - * @arg ADC_IT_AWD3, ADC Analog watchdog 3 interrupt source (additional analog watchdog) - * @arg ADC_IT_JQOVF, ADC Injected Context Queue Overflow interrupt source. - * @retval State of interruption (SET or RESET) - */ -#define __HAL_ADC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) \ - (( ((__HANDLE__)->Instance->IER & (__INTERRUPT__)) == (__INTERRUPT__) \ - )? SET : RESET \ - ) - -/** - * @brief Enable an ADC interrupt. - * @param __HANDLE__: ADC handle. - * @param __INTERRUPT__: ADC Interrupt to enable - * This parameter can be one of the following values: - * @arg ADC_IT_RDY, ADC Ready (ADRDY) interrupt source - * @arg ADC_IT_EOSMP, ADC End of Sampling interrupt source - * @arg ADC_IT_EOC, ADC End of Regular Conversion interrupt source - * @arg ADC_IT_EOS, ADC End of Regular sequence of Conversions interrupt source - * @arg ADC_IT_OVR, ADC overrun interrupt source - * @arg ADC_IT_JEOC, ADC End of Injected Conversion interrupt source - * @arg ADC_IT_JEOS, ADC End of Injected sequence of Conversions interrupt source - * @arg ADC_IT_AWD1, ADC Analog watchdog 1 interrupt source (main analog watchdog) - * @arg ADC_IT_AWD2, ADC Analog watchdog 2 interrupt source (additional analog watchdog) - * @arg ADC_IT_AWD3, ADC Analog watchdog 3 interrupt source (additional analog watchdog) - * @arg ADC_IT_JQOVF, ADC Injected Context Queue Overflow interrupt source. - * @retval None - */ -#define __HAL_ADC_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) |= (__INTERRUPT__)) - -/** - * @brief Disable an ADC interrupt. - * @param __HANDLE__: ADC handle. - * @param __INTERRUPT__: ADC Interrupt to disable - * @arg ADC_IT_RDY, ADC Ready (ADRDY) interrupt source - * @arg ADC_IT_EOSMP, ADC End of Sampling interrupt source - * @arg ADC_IT_EOC, ADC End of Regular Conversion interrupt source - * @arg ADC_IT_EOS, ADC End of Regular sequence of Conversions interrupt source - * @arg ADC_IT_OVR, ADC overrun interrupt source - * @arg ADC_IT_JEOC, ADC End of Injected Conversion interrupt source - * @arg ADC_IT_JEOS, ADC End of Injected sequence of Conversions interrupt source - * @arg ADC_IT_AWD1, ADC Analog watchdog 1 interrupt source (main analog watchdog) - * @arg ADC_IT_AWD2, ADC Analog watchdog 2 interrupt source (additional analog watchdog) - * @arg ADC_IT_AWD3, ADC Analog watchdog 3 interrupt source (additional analog watchdog) - * @arg ADC_IT_JQOVF, ADC Injected Context Queue Overflow interrupt source. - * @retval None - */ -#define __HAL_ADC_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) &= ~(__INTERRUPT__)) - -/** - * @brief Check whether the specified ADC flag is set or not. - * @param __HANDLE__: ADC handle. - * @param __FLAG__: ADC flag to check - * This parameter can be one of the following values: - * @arg ADC_FLAG_RDY, ADC Ready (ADRDY) flag - * @arg ADC_FLAG_EOSMP, ADC End of Sampling flag - * @arg ADC_FLAG_EOC, ADC End of Regular Conversion flag - * @arg ADC_FLAG_EOS, ADC End of Regular sequence of Conversions flag - * @arg ADC_FLAG_OVR, ADC overrun flag - * @arg ADC_FLAG_JEOC, ADC End of Injected Conversion flag - * @arg ADC_FLAG_JEOS, ADC End of Injected sequence of Conversions flag - * @arg ADC_FLAG_AWD1, ADC Analog watchdog 1 flag (main analog watchdog) - * @arg ADC_FLAG_AWD2, ADC Analog watchdog 2 flag (additional analog watchdog) - * @arg ADC_FLAG_AWD3, ADC Analog watchdog 3 flag (additional analog watchdog) - * @arg ADC_FLAG_JQOVF, ADC Injected Context Queue Overflow flag. - * @retval The new state of __FLAG__ (TRUE or FALSE). - */ -#define __HAL_ADC_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->ISR) & (__FLAG__)) == (__FLAG__)) - -/** - * @brief Clear a specified ADC flag. - * @param __HANDLE__: ADC handle. - * @param __FLAG__: ADC flag to clear - * This parameter can be one of the following values: - * @arg ADC_FLAG_RDY, ADC Ready (ADRDY) flag - * @arg ADC_FLAG_EOSMP, ADC End of Sampling flag - * @arg ADC_FLAG_EOC, ADC End of Regular Conversion flag - * @arg ADC_FLAG_EOS, ADC End of Regular sequence of Conversions flag - * @arg ADC_FLAG_OVR, ADC overrun flag - * @arg ADC_FLAG_JEOC, ADC End of Injected Conversion flag - * @arg ADC_FLAG_JEOS, ADC End of Injected sequence of Conversions flag - * @arg ADC_FLAG_AWD1, ADC Analog watchdog 1 flag (main analog watchdog) - * @arg ADC_FLAG_AWD2, ADC Analog watchdog 2 flag (additional analog watchdog) - * @arg ADC_FLAG_AWD3, ADC Analog watchdog 3 flag (additional analog watchdog) - * @arg ADC_FLAG_JQOVF, ADC Injected Context Queue Overflow flag. - * @note Bit cleared bit by writing 1 (writing 0 has no effect on any bit of register ISR). - * @retval None - */ -#define __HAL_ADC_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR) = (__FLAG__)) - - -/** - * @} - */ - -/* Include ADC HAL Extended module */ -#include "stm32l4xx_hal_adc_ex.h" - -/* Exported functions --------------------------------------------------------*/ -/** @addtogroup ADC_Exported_Functions ADC Exported Functions - * @{ - */ - -/** @addtogroup ADC_Exported_Functions_Group1 Initialization and de-initialization functions - * @brief Initialization and Configuration functions - * @{ - */ -/* Initialization and de-initialization functions **********************************/ -HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc); -HAL_StatusTypeDef HAL_ADC_DeInit(ADC_HandleTypeDef *hadc); -void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc); -void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc); -/** - * @} - */ - -/** @addtogroup ADC_Exported_Functions_Group2 Input and Output operation functions - * @brief IO operation functions - * @{ - */ -/* Blocking mode: Polling */ -HAL_StatusTypeDef HAL_ADC_Start(ADC_HandleTypeDef* hadc); -HAL_StatusTypeDef HAL_ADC_Stop(ADC_HandleTypeDef* hadc); -HAL_StatusTypeDef HAL_ADC_PollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout); -HAL_StatusTypeDef HAL_ADC_PollForEvent(ADC_HandleTypeDef* hadc, uint32_t EventType, uint32_t Timeout); - -/* Non-blocking mode: Interruption */ -HAL_StatusTypeDef HAL_ADC_Start_IT(ADC_HandleTypeDef* hadc); -HAL_StatusTypeDef HAL_ADC_Stop_IT(ADC_HandleTypeDef* hadc); - -/* Non-blocking mode: DMA */ -HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length); -HAL_StatusTypeDef HAL_ADC_Stop_DMA(ADC_HandleTypeDef* hadc); - -/* ADC retrieve conversion value intended to be used with polling or interruption */ -uint32_t HAL_ADC_GetValue(ADC_HandleTypeDef* hadc); - -/* ADC IRQHandler and Callbacks used in non-blocking modes (Interruption and DMA) */ -void HAL_ADC_IRQHandler(ADC_HandleTypeDef* hadc); -void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc); -void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef* hadc); -void HAL_ADC_LevelOutOfWindowCallback(ADC_HandleTypeDef* hadc); -void HAL_ADC_ErrorCallback(ADC_HandleTypeDef *hadc); -/** - * @} - */ - -/** @addtogroup ADC_Exported_Functions_Group3 Peripheral Control functions - * @brief Peripheral Control functions - * @{ - */ -/* Peripheral Control functions ***********************************************/ -HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig); -HAL_StatusTypeDef HAL_ADC_AnalogWDGConfig(ADC_HandleTypeDef* hadc, ADC_AnalogWDGConfTypeDef* AnalogWDGConfig); -/** - * @} - */ - -/** @defgroup ADC_Exported_Functions_Group4 Peripheral State functions - * @brief ADC Peripheral State functions - * @{ - */ -/* Peripheral State functions *************************************************/ -uint32_t HAL_ADC_GetState(ADC_HandleTypeDef* hadc); -uint32_t HAL_ADC_GetError(ADC_HandleTypeDef *hadc); -/** - * @} - */ - -/** - * @} - */ - -/* Private functions -----------------------------------------------------------*/ -/** @addtogroup ADC_Private_Functions ADC Private Functions - * @{ - */ - -HAL_StatusTypeDef ADC_ConversionStop(ADC_HandleTypeDef* hadc, uint32_t ConversionGroup); -HAL_StatusTypeDef ADC_Enable(ADC_HandleTypeDef* hadc); -HAL_StatusTypeDef ADC_Disable(ADC_HandleTypeDef* hadc); -void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma); -void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma); -void ADC_DMAError(DMA_HandleTypeDef *hdma); - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /*__STM32L4xx_ADC_H */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ -
--- a/Inc/stm32l4xx_hal_adc_ex.h Thu Nov 12 20:49:49 2015 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,1444 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_adc_ex.h - * @author MCD Application Team - * @version V1.1.0 - * @date 16-September-2015 - * @brief Header file of ADC HAL extended module. - ****************************************************************************** - * @attention - * - * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_ADC_EX_H -#define __STM32L4xx_ADC_EX_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal_def.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @addtogroup ADCEx ADCEx - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ -/** @defgroup ADCEx_Exported_Types ADC Extended Exported Types - * @{ - */ - -/** - * @brief ADC Injected Conversion Oversampling structure definition - */ -typedef struct -{ - uint32_t Ratio; /*!< Configures the oversampling ratio. - This parameter can be a value of @ref ADCEx_Oversampling_Ratio */ - - uint32_t RightBitShift; /*!< Configures the division coefficient for the Oversampler. - This parameter can be a value of @ref ADCEx_Right_Bit_Shift */ -}ADC_InjOversamplingTypeDef; - - - -/** - * @brief Structure definition of ADC injected group and ADC channel for injected group - * @note Parameters of this structure are shared within 2 scopes: - * - Scope channel: InjectedChannel, InjectedRank, InjectedSamplingTime , InjectedSingleDiff, InjectedOffsetNumber, InjectedOffset - * - Scope injected group (affects all channels of injected group): InjectedNbrOfConversion, InjectedDiscontinuousConvMode, - * AutoInjectedConv, QueueInjectedContext, ExternalTrigInjecConvEdge, ExternalTrigInjecConv, InjecOversamplingMode, InjecOversampling. - * @note The setting of these parameters by function HAL_ADCEx_InjectedConfigChannel() is conditioned by ADC state. - * ADC state can be either: - * - For all parameters: ADC disabled (this is the only possible ADC state to modify parameter 'InjectedSingleDiff') - * - For parameters 'InjectedDiscontinuousConvMode', 'QueueInjectedContext', 'InjecOversampling': ADC enabled without conversion on going on injected group. - * - For parameters 'InjectedSamplingTime', 'InjectedOffset', 'InjectedOffsetNumber', 'AutoInjectedConv': ADC enabled without conversion on going on regular and injected groups. - * - For parameters 'InjectedChannel', 'InjectedRank', 'InjectedNbrOfConversion', 'ExternalTrigInjecConv', 'ExternalTrigInjecConvEdge': ADC enabled and while conversion on going - * on regular and injected groups. - * If ADC is not in the appropriate state to modify some parameters, these parameters setting is bypassed - * without error reporting (as it can be the expected behaviour in case of intended action to update another parameter (which fulfills the ADC state condition) on the fly). - */ -typedef struct -{ - uint32_t InjectedChannel; /*!< Configure the ADC injected channel. - This parameter can be a value of @ref ADC_channels - Note: Depending on devices and ADC instances, some channels may not be available. Refer to device DataSheet for channels availability. */ - uint32_t InjectedRank; /*!< The rank in the injected group sequencer. - This parameter must be a value of @ref ADCEx_injected_rank. - Note: to disable a channel or change order of conversion sequencer, rank containing a previous channel setting can be overwritten by - the new channel setting (or parameter number of conversions adjusted). */ - uint32_t InjectedSamplingTime; /*!< Sampling time value to be set for the selected channel. - Unit: ADC clock cycles. - Conversion time is the addition of sampling time and processing time (12.5 ADC clock cycles at ADC resolution 12 bits, 10.5 cycles at 10 bits, - 8.5 cycles at 8 bits, 6.5 cycles at 6 bits). - This parameter can be a value of @ref ADC_sampling_times. - Caution: This parameter applies to a channel that can be used in a regular and/or injected group. - It overwrites the last setting. - Note: In case of usage of internal measurement channels (VrefInt/Vbat/TempSensor), - sampling time constraints must be respected (sampling time can be adjusted with respect to the ADC clock frequency and sampling time - setting). Refer to device DataSheet for timings values. */ - uint32_t InjectedSingleDiff; /*!< Selection of single-ended or differential input. - In differential mode: Differential measurement is between the selected channel 'i' (positive input) and channel 'i+1' (negative input). - Only channel 'i' has to be configured, channel 'i+1' is configured automatically. - This parameter must be a value of @ref ADCEx_SingleDifferential. - Caution: This parameter applies to a channel that can be used in a regular and/or injected group. - It overwrites the last setting. - Note: Refer to Reference Manual to ensure the selected channel is available in differential mode. - Note: When configuring a channel 'i' in differential mode, the channel 'i+1' is not usable separately. - Note: This parameter must be modified when ADC is disabled (before ADC start conversion or after ADC stop conversion). - If ADC is enabled, this parameter setting is bypassed without error reporting (as it can be the expected behaviour in case - of another parameter update on the fly) */ - uint32_t InjectedOffsetNumber; /*!< Selects the offset number. - This parameter can be a value of @ref ADCEx_OffsetNumber. - Caution: Only one offset is allowed per channel. This parameter overwrites the last setting. */ - uint32_t InjectedOffset; /*!< Defines the offset to be subtracted from the raw converted data. - Offset value must be a positive number. - Depending of ADC resolution selected (12, 10, 8 or 6 bits), this parameter must be a number between Min_Data = 0x000 and Max_Data = 0xFFF, - 0x3FF, 0xFF or 0x3F respectively. - Note: This parameter must be modified when no conversion is on going on both regular and injected groups (ADC disabled, or ADC enabled - without continuous mode or external trigger that could launch a conversion). */ - uint32_t InjectedNbrOfConversion; /*!< Specifies the number of ranks that will be converted within the injected group sequencer. - To use the injected group sequencer and convert several ranks, parameter 'ScanConvMode' must be enabled. - This parameter must be a number between Min_Data = 1 and Max_Data = 4. - Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to - configure a channel on injected group can impact the configuration of other channels previously set. */ - uint32_t InjectedDiscontinuousConvMode; /*!< Specifies whether the conversions sequence of injected group is performed in Complete-sequence/Discontinuous-sequence (main sequence - subdivided in successive parts). - Discontinuous mode is used only if sequencer is enabled (parameter 'ScanConvMode'). If sequencer is disabled, this parameter is discarded. - Discontinuous mode can be enabled only if continuous mode is disabled. - This parameter can be set to ENABLE or DISABLE. - Note: This parameter must be modified when ADC is disabled (before ADC start conversion or after ADC stop conversion). - Note: For injected group, discontinuous mode converts the sequence channel by channel (only one channel at a time). - Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to - configure a channel on injected group can impact the configuration of other channels previously set. */ - uint32_t AutoInjectedConv; /*!< Enables or disables the selected ADC automatic injected group conversion after regular one - This parameter can be set to ENABLE or DISABLE. - Note: To use Automatic injected conversion, discontinuous mode must be disabled ('DiscontinuousConvMode' and 'InjectedDiscontinuousConvMode' set to DISABLE) - Note: To use Automatic injected conversion, injected group external triggers must be disabled. - Note: In case of DMA used with regular group: if DMA configured in normal mode (single shot) JAUTO will be stopped upon DMA transfer complete. - To maintain JAUTO always enabled, DMA must be configured in circular mode. - Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to - configure a channel on injected group can impact the configuration of other channels previously set. */ - uint32_t QueueInjectedContext; /*!< Specifies whether the context queue feature is enabled. - This parameter can be set to ENABLE or DISABLE. - If context queue is enabled, injected sequencer&channels configurations are queued on up to 2 contexts. If a - new injected context is set when queue is full, error is triggered by interruption and through function - 'HAL_ADCEx_InjectedQueueOverflowCallback'. - Caution: This feature request that the sequence is fully configured before injected conversion start. - Therefore, configure channels with as many calls to HAL_ADCEx_InjectedConfigChannel() as the 'InjectedNbrOfConversion' parameter. - Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to - configure a channel on injected group can impact the configuration of other channels previously set. - Note: This parameter must be modified when ADC is disabled (before ADC start conversion or after ADC stop conversion). */ - uint32_t ExternalTrigInjecConv; /*!< Selects the external event used to trigger the conversion start of injected group. - If set to ADC_INJECTED_SOFTWARE_START, external triggers are disabled and software trigger is used instead. - This parameter can be a value of @ref ADCEx_Injected_External_Trigger_Source. - Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to - configure a channel on injected group can impact the configuration of other channels previously set. */ - uint32_t ExternalTrigInjecConvEdge; /*!< Selects the external trigger edge of injected group. - This parameter can be a value of @ref ADCEx_Injected_External_Trigger_Source_Edge. - If trigger edge is set to ADC_EXTERNALTRIGINJECCONV_EDGE_NONE, external triggers are disabled and software trigger is used instead. - Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to - configure a channel on injected group can impact the configuration of other channels previously set. */ - - uint32_t InjecOversamplingMode; /*!< Specifies whether the oversampling feature is enabled or disabled. - This parameter can be set to ENABLE or DISABLE. - Note: This parameter can be modified only if there is no conversion is ongoing (both ADSTART and JADSTART cleared). */ - - ADC_InjOversamplingTypeDef InjecOversampling; /*!< Specifies the Oversampling parameters. - Caution: this setting overwrites the previous oversampling configuration if oversampling already enabled. - Note: This parameter can be modified only if there is no conversion is ongoing (both ADSTART and JADSTART cleared). */ -}ADC_InjectionConfTypeDef; - - -/** - * @brief Structure definition of ADC multimode - * @note The setting of these parameters by function HAL_ADCEx_MultiModeConfigChannel() is conditioned by ADCs state (both Master and Slave ADCs). - * Both Master and Slave ADCs must be disabled. - */ -typedef struct -{ - uint32_t Mode; /*!< Configures the ADC to operate in independent or multimode. - This parameter can be a value of @ref ADCEx_Common_mode. */ - uint32_t DMAAccessMode; /*!< Configures the DMA mode for multimode ADC: - selection whether 2 DMA channels (each ADC uses its own DMA channel) or 1 DMA channel (one DMA channel for both ADC, DMA of ADC master) - This parameter can be a value of @ref ADCEx_Direct_memory_access_mode_for_multimode. */ - uint32_t TwoSamplingDelay; /*!< Configures the Delay between 2 sampling phases. - This parameter can be a value of @ref ADCEx_delay_between_2_sampling_phases. - Delay range depends on selected resolution: - from 1 to 12 clock cycles for 12 bits, from 1 to 10 clock cycles for 10 bits, - from 1 to 8 clock cycles for 8 bits, from 1 to 6 clock cycles for 6 bits. */ -}ADC_MultiModeTypeDef; - -/** - * @} - */ - -/* Exported constants --------------------------------------------------------*/ - - /** @defgroup ADCEx_Exported_Constants ADC Extended Exported Constants - * @{ - */ - -/** @defgroup ADCEx_SingleDifferential ADC Extended Single-ended/Differential input mode - * @{ - */ -#define ADC_SINGLE_ENDED ((uint32_t)0x00000000) /*!< ADC channel set in single-ended input mode */ -#define ADC_DIFFERENTIAL_ENDED ((uint32_t)ADC_CR_ADCALDIF) /*!< ADC channel set in differential mode */ -/** - * @} - */ - -/** @defgroup ADCEx_OffsetNumber ADC Extended Offset Number - * @{ - */ -#define ADC_OFFSET_NONE ((uint32_t)0x00) /*!< No offset correction */ -#define ADC_OFFSET_1 ((uint32_t)0x01) /*!< Offset correction to apply to a first channel */ -#define ADC_OFFSET_2 ((uint32_t)0x02) /*!< Offset correction to apply to a second channel */ -#define ADC_OFFSET_3 ((uint32_t)0x03) /*!< Offset correction to apply to a third channel */ -#define ADC_OFFSET_4 ((uint32_t)0x04) /*!< Offset correction to apply to a fourth channel */ -/** - * @} - */ - -/** @defgroup ADCEx_regular_rank ADC Extended Regular Channel Rank - * @{ - */ -#define ADC_REGULAR_RANK_1 ((uint32_t)0x00000001) /*!< ADC regular conversion rank 1 */ -#define ADC_REGULAR_RANK_2 ((uint32_t)0x00000002) /*!< ADC regular conversion rank 2 */ -#define ADC_REGULAR_RANK_3 ((uint32_t)0x00000003) /*!< ADC regular conversion rank 3 */ -#define ADC_REGULAR_RANK_4 ((uint32_t)0x00000004) /*!< ADC regular conversion rank 4 */ -#define ADC_REGULAR_RANK_5 ((uint32_t)0x00000005) /*!< ADC regular conversion rank 5 */ -#define ADC_REGULAR_RANK_6 ((uint32_t)0x00000006) /*!< ADC regular conversion rank 6 */ -#define ADC_REGULAR_RANK_7 ((uint32_t)0x00000007) /*!< ADC regular conversion rank 7 */ -#define ADC_REGULAR_RANK_8 ((uint32_t)0x00000008) /*!< ADC regular conversion rank 8 */ -#define ADC_REGULAR_RANK_9 ((uint32_t)0x00000009) /*!< ADC regular conversion rank 9 */ -#define ADC_REGULAR_RANK_10 ((uint32_t)0x0000000A) /*!< ADC regular conversion rank 10 */ -#define ADC_REGULAR_RANK_11 ((uint32_t)0x0000000B) /*!< ADC regular conversion rank 11 */ -#define ADC_REGULAR_RANK_12 ((uint32_t)0x0000000C) /*!< ADC regular conversion rank 12 */ -#define ADC_REGULAR_RANK_13 ((uint32_t)0x0000000D) /*!< ADC regular conversion rank 13 */ -#define ADC_REGULAR_RANK_14 ((uint32_t)0x0000000E) /*!< ADC regular conversion rank 14 */ -#define ADC_REGULAR_RANK_15 ((uint32_t)0x0000000F) /*!< ADC regular conversion rank 15 */ -#define ADC_REGULAR_RANK_16 ((uint32_t)0x00000010) /*!< ADC regular conversion rank 16 */ -/** - * @} - */ - -/** @defgroup ADCEx_injected_rank ADC Extended Injected Channel Rank - * @{ - */ -#define ADC_INJECTED_RANK_1 ((uint32_t)0x00000001) /*!< ADC injected conversion rank 1 */ -#define ADC_INJECTED_RANK_2 ((uint32_t)0x00000002) /*!< ADC injected conversion rank 2 */ -#define ADC_INJECTED_RANK_3 ((uint32_t)0x00000003) /*!< ADC injected conversion rank 3 */ -#define ADC_INJECTED_RANK_4 ((uint32_t)0x00000004) /*!< ADC injected conversion rank 4 */ -/**injected - * @} - */ - -/** @defgroup ADCEx_Injected_External_Trigger_Source_Edge ADC External Trigger Source Edge for Injected Group - * @{ - */ -#define ADC_EXTERNALTRIGINJECCONV_EDGE_NONE ((uint32_t)0x00000000) /*!< Injected conversions hardware trigger detection disabled */ -#define ADC_EXTERNALTRIGINJECCONV_EDGE_RISING ((uint32_t)ADC_JSQR_JEXTEN_0) /*!< Injected conversions hardware trigger detection on the rising edge */ -#define ADC_EXTERNALTRIGINJECCONV_EDGE_FALLING ((uint32_t)ADC_JSQR_JEXTEN_1) /*!< Injected conversions hardware trigger detection on the falling edge */ -#define ADC_EXTERNALTRIGINJECCONV_EDGE_RISINGFALLING ((uint32_t)ADC_JSQR_JEXTEN) /*!< Injected conversions hardware trigger detection on both the rising and falling edges */ -/** - * @} - */ - -/** @defgroup ADCEx_Injected_External_Trigger_Source ADC Extended External Trigger Source for Injected Group - * @{ - */ -#define ADC_EXTERNALTRIGINJEC_T1_TRGO ((uint32_t)0x00000000) /*!< Event 0 triggers injected group conversion start */ -#define ADC_EXTERNALTRIGINJEC_T1_CC4 ((uint32_t)ADC_JSQR_JEXTSEL_0) /*!< Event 1 triggers injected group conversion start */ -#define ADC_EXTERNALTRIGINJEC_T2_TRGO ((uint32_t)ADC_JSQR_JEXTSEL_1) /*!< Event 2 triggers injected group conversion start */ -#define ADC_EXTERNALTRIGINJEC_T2_CC1 ((uint32_t)(ADC_JSQR_JEXTSEL_1 | ADC_JSQR_JEXTSEL_0)) /*!< Event 3 triggers injected group conversion start */ -#define ADC_EXTERNALTRIGINJEC_T3_CC4 ((uint32_t)ADC_JSQR_JEXTSEL_2) /*!< Event 4 triggers injected group conversion start */ -#define ADC_EXTERNALTRIGINJEC_T4_TRGO ((uint32_t)(ADC_JSQR_JEXTSEL_2 | ADC_JSQR_JEXTSEL_0)) /*!< Event 5 triggers injected group conversion start */ -#define ADC_EXTERNALTRIGINJEC_EXT_IT15 ((uint32_t)(ADC_JSQR_JEXTSEL_2 | ADC_JSQR_JEXTSEL_1)) /*!< Event 6 triggers injected group conversion start */ -#define ADC_EXTERNALTRIGINJEC_T8_CC4 ((uint32_t)(ADC_JSQR_JEXTSEL_2 | ADC_JSQR_JEXTSEL_1 | ADC_JSQR_JEXTSEL_0)) /*!< Event 7 triggers injected group conversion start */ -#define ADC_EXTERNALTRIGINJEC_T1_TRGO2 ((uint32_t)ADC_JSQR_JEXTSEL_3) /*!< Event 8 triggers injected group conversion start */ -#define ADC_EXTERNALTRIGINJEC_T8_TRGO ((uint32_t)(ADC_JSQR_JEXTSEL_3 | ADC_JSQR_JEXTSEL_0)) /*!< Event 9 triggers injected group conversion start */ -#define ADC_EXTERNALTRIGINJEC_T8_TRGO2 ((uint32_t)(ADC_JSQR_JEXTSEL_3 | ADC_JSQR_JEXTSEL_1)) /*!< Event 10 triggers injected group conversion start */ -#define ADC_EXTERNALTRIGINJEC_T3_CC3 ((uint32_t)(ADC_JSQR_JEXTSEL_3 | ADC_JSQR_JEXTSEL_1 | ADC_JSQR_JEXTSEL_0)) /*!< Event 11 triggers injected group conversion start */ -#define ADC_EXTERNALTRIGINJEC_T3_TRGO ((uint32_t)(ADC_JSQR_JEXTSEL_3 | ADC_JSQR_JEXTSEL_2)) /*!< Event 12 triggers injected group conversion start */ -#define ADC_EXTERNALTRIGINJEC_T3_CC1 ((uint32_t)(ADC_JSQR_JEXTSEL_3 | ADC_JSQR_JEXTSEL_2 | ADC_JSQR_JEXTSEL_0)) /*!< Event 13 triggers injected group conversion start */ -#define ADC_EXTERNALTRIGINJEC_T6_TRGO ((uint32_t)(ADC_JSQR_JEXTSEL_3 | ADC_JSQR_JEXTSEL_2 | ADC_JSQR_JEXTSEL_1)) /*!< Event 14 triggers injected group conversion start */ -#define ADC_EXTERNALTRIGINJEC_T15_TRGO ((uint32_t)ADC_JSQR_JEXTSEL) /*!< Event 15 triggers injected group conversion start */ - -#define ADC_INJECTED_SOFTWARE_START ((uint32_t)0x00000001) /*!< Software triggers injected group conversion start */ -/** - * @} - */ - -/** @defgroup ADCEx_Common_mode ADC Extended Dual ADC Mode - * @{ - */ -#define ADC_MODE_INDEPENDENT ((uint32_t)(0x00000000)) /*!< Independent ADC conversions mode */ -#define ADC_DUALMODE_REGSIMULT_INJECSIMULT ((uint32_t)(ADC_CCR_DUAL_0)) /*!< Combined regular simultaneous + injected simultaneous mode */ -#define ADC_DUALMODE_REGSIMULT_ALTERTRIG ((uint32_t)(ADC_CCR_DUAL_1)) /*!< Combined regular simultaneous + alternate trigger mode */ -#define ADC_DUALMODE_REGINTERL_INJECSIMULT ((uint32_t)(ADC_CCR_DUAL_1 | ADC_CCR_DUAL_0)) /*!< Combined Interleaved mode + injected simultaneous mode */ -#define ADC_DUALMODE_INJECSIMULT ((uint32_t)(ADC_CCR_DUAL_2 | ADC_CCR_DUAL_0)) /*!< Injected simultaneous mode only */ -#define ADC_DUALMODE_REGSIMULT ((uint32_t)(ADC_CCR_DUAL_2 | ADC_CCR_DUAL_1)) /*!< Regular simultaneous mode only */ -#define ADC_DUALMODE_INTERL ((uint32_t)(ADC_CCR_DUAL_2 | ADC_CCR_DUAL_1 | ADC_CCR_DUAL_0)) /*!< Interleaved mode only */ -#define ADC_DUALMODE_ALTERTRIG ((uint32_t)(ADC_CCR_DUAL_3 | ADC_CCR_DUAL_0)) /*!< Alternate trigger mode only */ -/** - * @} - */ - - -/** @defgroup ADCEx_Direct_memory_access_mode_for_multimode ADC Extended DMA Mode for Dual ADC Mode - * @{ - */ -#define ADC_DMAACCESSMODE_DISABLED ((uint32_t)0x00000000) /*!< DMA multimode disabled: each ADC uses its own DMA channel */ -#define ADC_DMAACCESSMODE_12_10_BITS ((uint32_t)ADC_CCR_MDMA_1) /*!< DMA multimode enabled (one DMA channel for both ADC, DMA of ADC master) for 12 and 10 bits resolution */ -#define ADC_DMAACCESSMODE_8_6_BITS ((uint32_t)ADC_CCR_MDMA) /*!< DMA multimode enabled (one DMA channel for both ADC, DMA of ADC master) for 8 and 6 bits resolution */ -/** - * @} - */ - -/** @defgroup ADCEx_delay_between_2_sampling_phases ADC Extended Delay Between 2 Sampling Phases - * @{ - */ -#define ADC_TWOSAMPLINGDELAY_1CYCLE ((uint32_t)(0x00000000)) /*!< 1 ADC clock cycle delay */ -#define ADC_TWOSAMPLINGDELAY_2CYCLES ((uint32_t)(ADC_CCR_DELAY_0)) /*!< 2 ADC clock cycles delay */ -#define ADC_TWOSAMPLINGDELAY_3CYCLES ((uint32_t)(ADC_CCR_DELAY_1)) /*!< 3 ADC clock cycles delay */ -#define ADC_TWOSAMPLINGDELAY_4CYCLES ((uint32_t)(ADC_CCR_DELAY_1 | ADC_CCR_DELAY_0)) /*!< 4 ADC clock cycles delay */ -#define ADC_TWOSAMPLINGDELAY_5CYCLES ((uint32_t)(ADC_CCR_DELAY_2)) /*!< 5 ADC clock cycles delay */ -#define ADC_TWOSAMPLINGDELAY_6CYCLES ((uint32_t)(ADC_CCR_DELAY_2 | ADC_CCR_DELAY_0)) /*!< 6 ADC clock cycles delay */ -#define ADC_TWOSAMPLINGDELAY_7CYCLES ((uint32_t)(ADC_CCR_DELAY_2 | ADC_CCR_DELAY_1)) /*!< 7 ADC clock cycles delay (lower for non 12-bit resolution) */ -#define ADC_TWOSAMPLINGDELAY_8CYCLES ((uint32_t)(ADC_CCR_DELAY_2 | ADC_CCR_DELAY_1 | ADC_CCR_DELAY_0)) /*!< 8 ADC clock cycles delay (lower for non 12-bit resolution) */ -#define ADC_TWOSAMPLINGDELAY_9CYCLES ((uint32_t)(ADC_CCR_DELAY_3)) /*!< 9 ADC clock cycles delay (lower for non 12-bit resolution) */ -#define ADC_TWOSAMPLINGDELAY_10CYCLES ((uint32_t)(ADC_CCR_DELAY_3 | ADC_CCR_DELAY_0)) /*!< 10 ADC clock cycles delay (lower for non 12-bit resolution) */ -#define ADC_TWOSAMPLINGDELAY_11CYCLES ((uint32_t)(ADC_CCR_DELAY_3 | ADC_CCR_DELAY_1)) /*!< 11 ADC clock cycles delay (lower for non 12-bit resolution) */ -#define ADC_TWOSAMPLINGDELAY_12CYCLES ((uint32_t)(ADC_CCR_DELAY_3 | ADC_CCR_DELAY_1 | ADC_CCR_DELAY_0)) /*!< 12 ADC clock cycles delay (lower for non 12-bit resolution) */ -/** - * @} - */ - -/** @defgroup ADCEx_analog_watchdog_number ADC Extended Analog Watchdog Selection - * @{ - */ -#define ADC_ANALOGWATCHDOG_1 ((uint32_t)0x00000001) /*!< Analog watchdog 1 selection */ -#define ADC_ANALOGWATCHDOG_2 ((uint32_t)0x00000002) /*!< Analog watchdog 2 selection */ -#define ADC_ANALOGWATCHDOG_3 ((uint32_t)0x00000003) /*!< Analog watchdog 3 selection */ -/** - * @} - */ - -/** @defgroup ADCEx_analog_watchdog_mode ADC Extended Analog Watchdog Mode - * @{ - */ -#define ADC_ANALOGWATCHDOG_NONE ((uint32_t) 0x00000000) /*!< No analog watchdog selected */ -#define ADC_ANALOGWATCHDOG_SINGLE_REG ((uint32_t)(ADC_CFGR_AWD1SGL | ADC_CFGR_AWD1EN)) /*!< Analog watchdog applied to a regular group single channel */ -#define ADC_ANALOGWATCHDOG_SINGLE_INJEC ((uint32_t)(ADC_CFGR_AWD1SGL | ADC_CFGR_JAWD1EN)) /*!< Analog watchdog applied to an injected group single channel */ -#define ADC_ANALOGWATCHDOG_SINGLE_REGINJEC ((uint32_t)(ADC_CFGR_AWD1SGL | ADC_CFGR_AWD1EN | ADC_CFGR_JAWD1EN)) /*!< Analog watchdog applied to a regular and injected groups single channel */ -#define ADC_ANALOGWATCHDOG_ALL_REG ((uint32_t) ADC_CFGR_AWD1EN) /*!< Analog watchdog applied to regular group all channels */ -#define ADC_ANALOGWATCHDOG_ALL_INJEC ((uint32_t) ADC_CFGR_JAWD1EN) /*!< Analog watchdog applied to injected group all channels */ -#define ADC_ANALOGWATCHDOG_ALL_REGINJEC ((uint32_t)(ADC_CFGR_AWD1EN | ADC_CFGR_JAWD1EN)) /*!< Analog watchdog applied to regular and injected groups all channels */ -/** - * @} - */ - -/** @defgroup ADCEx_conversion_group ADC Extended Conversion Group - * @{ - */ -#define ADC_REGULAR_GROUP ((uint32_t)(ADC_FLAG_EOC | ADC_FLAG_EOS)) /*!< ADC regular group selection */ -#define ADC_INJECTED_GROUP ((uint32_t)(ADC_FLAG_JEOC | ADC_FLAG_JEOS)) /*!< ADC injected group selection */ -#define ADC_REGULAR_INJECTED_GROUP ((uint32_t)(ADC_FLAG_EOC | ADC_FLAG_EOS | ADC_FLAG_JEOC | ADC_FLAG_JEOS)) /*!< ADC regular and injected groups selection */ -/** - * @} - */ - -/** @defgroup ADCEx_Event_type ADC Extended Event Type - * @{ - */ -#define ADC_EOSMP_EVENT ((uint32_t)ADC_FLAG_EOSMP) /*!< ADC End of Sampling event */ -#define ADC_AWD1_EVENT ((uint32_t)ADC_FLAG_AWD1) /*!< ADC Analog watchdog 1 event (main analog watchdog) */ -#define ADC_AWD2_EVENT ((uint32_t)ADC_FLAG_AWD2) /*!< ADC Analog watchdog 2 event (additional analog watchdog) */ -#define ADC_AWD3_EVENT ((uint32_t)ADC_FLAG_AWD3) /*!< ADC Analog watchdog 3 event (additional analog watchdog) */ -#define ADC_OVR_EVENT ((uint32_t)ADC_FLAG_OVR) /*!< ADC overrun event */ -#define ADC_JQOVF_EVENT ((uint32_t)ADC_FLAG_JQOVF) /*!< ADC Injected Context Queue Overflow event */ - -#define ADC_AWD_EVENT ADC_AWD1_EVENT /*!< ADC Analog watchdog 1 event: Naming for compatibility with other STM32 devices having only one analog watchdog */ -/** - * @} - */ - -/** @defgroup ADCEx_interrupts_definition ADC Extended Interrupts Definition - * @{ - */ -#define ADC_IT_RDY ADC_IER_ADRDY /*!< ADC Ready (ADRDY) interrupt source */ -#define ADC_IT_EOSMP ADC_IER_EOSMP /*!< ADC End of sampling interrupt source */ -#define ADC_IT_EOC ADC_IER_EOC /*!< ADC End of regular conversion interrupt source */ -#define ADC_IT_EOS ADC_IER_EOS /*!< ADC End of regular sequence of conversions interrupt source */ -#define ADC_IT_OVR ADC_IER_OVR /*!< ADC overrun interrupt source */ -#define ADC_IT_JEOC ADC_IER_JEOC /*!< ADC End of injected conversion interrupt source */ -#define ADC_IT_JEOS ADC_IER_JEOS /*!< ADC End of injected sequence of conversions interrupt source */ -#define ADC_IT_AWD1 ADC_IER_AWD1 /*!< ADC Analog watchdog 1 interrupt source (main analog watchdog) */ -#define ADC_IT_AWD2 ADC_IER_AWD2 /*!< ADC Analog watchdog 2 interrupt source (additional analog watchdog) */ -#define ADC_IT_AWD3 ADC_IER_AWD3 /*!< ADC Analog watchdog 3 interrupt source (additional analog watchdog) */ -#define ADC_IT_JQOVF ADC_IER_JQOVF /*!< ADC Injected Context Queue Overflow interrupt source */ - -#define ADC_IT_AWD ADC_IT_AWD1 /*!< ADC Analog watchdog 1 interrupt source: naming for compatibility with other STM32 devices having only one analog watchdog */ - -/** - * @} - */ - -/** @defgroup ADCEx_flags_definition ADC Extended Flags Definition - * @{ - */ -#define ADC_FLAG_RDY ADC_ISR_ADRDY /*!< ADC Ready (ADRDY) flag */ -#define ADC_FLAG_EOSMP ADC_ISR_EOSMP /*!< ADC End of Sampling flag */ -#define ADC_FLAG_EOC ADC_ISR_EOC /*!< ADC End of Regular Conversion flag */ -#define ADC_FLAG_EOS ADC_ISR_EOS /*!< ADC End of Regular sequence of Conversions flag */ -#define ADC_FLAG_OVR ADC_ISR_OVR /*!< ADC overrun flag */ -#define ADC_FLAG_JEOC ADC_ISR_JEOC /*!< ADC End of Injected Conversion flag */ -#define ADC_FLAG_JEOS ADC_ISR_JEOS /*!< ADC End of Injected sequence of Conversions flag */ -#define ADC_FLAG_AWD1 ADC_ISR_AWD1 /*!< ADC Analog watchdog 1 flag (main analog watchdog) */ -#define ADC_FLAG_AWD2 ADC_ISR_AWD2 /*!< ADC Analog watchdog 2 flag (additional analog watchdog) */ -#define ADC_FLAG_AWD3 ADC_ISR_AWD3 /*!< ADC Analog watchdog 3 flag (additional analog watchdog) */ -#define ADC_FLAG_JQOVF ADC_ISR_JQOVF /*!< ADC Injected Context Queue Overflow flag */ - -#define ADC_FLAG_AWD ADC_FLAG_AWD1 /*!< ADC Analog watchdog 1 flag: Naming for compatibility with other STM32 devices having only one analog watchdog */ - -#define ADC_FLAG_ALL (ADC_FLAG_RDY | ADC_FLAG_EOSMP | ADC_FLAG_EOC | ADC_FLAG_EOS | \ - ADC_FLAG_JEOC | ADC_FLAG_JEOS | ADC_FLAG_OVR | ADC_FLAG_AWD1 | \ - ADC_FLAG_AWD2 | ADC_FLAG_AWD3 | ADC_FLAG_JQOVF) /*!< ADC all flags */ - -/* Combination of all post-conversion flags bits: EOC/EOS, JEOC/JEOS, OVR, AWDx, JQOVF */ -#define ADC_FLAG_POSTCONV_ALL (ADC_FLAG_EOC | ADC_FLAG_EOS | ADC_FLAG_JEOC | ADC_FLAG_JEOS | \ - ADC_FLAG_OVR | ADC_FLAG_AWD1 | ADC_FLAG_AWD2 | ADC_FLAG_AWD3 | \ - ADC_FLAG_JQOVF) /*!< ADC post-conversion all flags */ - -/** - * @} - */ - - -/** @defgroup ADCEx_injected_rank ADC Extended Injected Channel Rank - * @{ - */ -#define ADC_INJECTED_RANK_1 ((uint32_t)0x00000001) /*!< ADC injected conversion rank 1 */ -#define ADC_INJECTED_RANK_2 ((uint32_t)0x00000002) /*!< ADC injected conversion rank 2 */ -#define ADC_INJECTED_RANK_3 ((uint32_t)0x00000003) /*!< ADC injected conversion rank 3 */ -#define ADC_INJECTED_RANK_4 ((uint32_t)0x00000004) /*!< ADC injected conversion rank 4 */ -/** - * @} - */ - - - -/** @defgroup ADCEx_Oversampling_Ratio ADC Extended Oversampling Ratio - * @{ - */ - -#define ADC_OVERSAMPLING_RATIO_2 ((uint32_t)0x00000000) /*!< ADC Oversampling ratio 2x */ -#define ADC_OVERSAMPLING_RATIO_4 ((uint32_t)ADC_CFGR2_OVSR_0) /*!< ADC Oversampling ratio 4x */ -#define ADC_OVERSAMPLING_RATIO_8 ((uint32_t)ADC_CFGR2_OVSR_1) /*!< ADC Oversampling ratio 8x */ -#define ADC_OVERSAMPLING_RATIO_16 ((uint32_t)(ADC_CFGR2_OVSR_1 | ADC_CFGR2_OVSR_0)) /*!< ADC Oversampling ratio 16x */ -#define ADC_OVERSAMPLING_RATIO_32 ((uint32_t)ADC_CFGR2_OVSR_2) /*!< ADC Oversampling ratio 32x */ -#define ADC_OVERSAMPLING_RATIO_64 ((uint32_t)(ADC_CFGR2_OVSR_2 | ADC_CFGR2_OVSR_0)) /*!< ADC Oversampling ratio 64x */ -#define ADC_OVERSAMPLING_RATIO_128 ((uint32_t)(ADC_CFGR2_OVSR_2 | ADC_CFGR2_OVSR_1)) /*!< ADC Oversampling ratio 128x */ -#define ADC_OVERSAMPLING_RATIO_256 ((uint32_t)(ADC_CFGR2_OVSR)) /*!< ADC Oversampling ratio 256x */ -/** - * @} - */ - -/** @defgroup ADCEx_Right_Bit_Shift ADC Extended Oversampling Right Shift - * @{ - */ -#define ADC_RIGHTBITSHIFT_NONE ((uint32_t)0x00000000) /*!< ADC No bit shift for oversampling */ -#define ADC_RIGHTBITSHIFT_1 ((uint32_t)ADC_CFGR2_OVSS_0) /*!< ADC 1 bit shift for oversampling */ -#define ADC_RIGHTBITSHIFT_2 ((uint32_t)ADC_CFGR2_OVSS_1) /*!< ADC 2 bits shift for oversampling */ -#define ADC_RIGHTBITSHIFT_3 ((uint32_t)(ADC_CFGR2_OVSS_1 | ADC_CFGR2_OVSS_0)) /*!< ADC 3 bits shift for oversampling */ -#define ADC_RIGHTBITSHIFT_4 ((uint32_t)ADC_CFGR2_OVSS_2) /*!< ADC 4 bits shift for oversampling */ -#define ADC_RIGHTBITSHIFT_5 ((uint32_t)(ADC_CFGR2_OVSS_2 | ADC_CFGR2_OVSS_0)) /*!< ADC 5 bits shift for oversampling */ -#define ADC_RIGHTBITSHIFT_6 ((uint32_t)(ADC_CFGR2_OVSS_2 | ADC_CFGR2_OVSS_1)) /*!< ADC 6 bits shift for oversampling */ -#define ADC_RIGHTBITSHIFT_7 ((uint32_t)(ADC_CFGR2_OVSS_2 | ADC_CFGR2_OVSS_1 | ADC_CFGR2_OVSS_0)) /*!< ADC 7 bits shift for oversampling */ -#define ADC_RIGHTBITSHIFT_8 ((uint32_t)ADC_CFGR2_OVSS_3) /*!< ADC 8 bits shift for oversampling */ -/** - * @} - */ - -/** @defgroup ADCEx_Triggered_Oversampling_Mode ADC Extended Triggered Regular Oversampling - * @{ - */ -#define ADC_TRIGGEREDMODE_SINGLE_TRIGGER ((uint32_t)0x00000000) /*!< A single trigger for all channel oversampled conversions */ -#define ADC_TRIGGEREDMODE_MULTI_TRIGGER ((uint32_t)ADC_CFGR2_TROVS) /*!< A trigger for each oversampled conversion */ -/** - * @} - */ - -/** @defgroup ADCEx_Regular_Oversampling_Mode ADC Extended Regular Oversampling Continued or Resumed Mode - * @{ - */ -#define ADC_REGOVERSAMPLING_CONTINUED_MODE ((uint32_t)0x00000000) /*!< Oversampling buffer maintained during injection sequence */ -#define ADC_REGOVERSAMPLING_RESUMED_MODE ((uint32_t)ADC_CFGR2_ROVSM) /*!< Oversampling buffer zeroed during injection sequence */ -/** - * @} - */ - -/** - * @} - */ - - - -/* Private macros -----------------------------------------------------------*/ - -/** @defgroup ADCEx_Private_Macro_internal_HAL_driver ADC Extended Private Macros - * @{ - */ - -/** - * @brief Test if conversion trigger of injected group is software start - * or external trigger. - * @param __HANDLE__: ADC handle. - * @retval SET (software start) or RESET (external trigger). - */ -#define ADC_IS_SOFTWARE_START_INJECTED(__HANDLE__) \ - (((__HANDLE__)->Instance->JSQR & ADC_JSQR_JEXTEN) == RESET) - -/** - * @brief Check if conversion is on going on regular or injected groups. - * @param __HANDLE__: ADC handle. - * @retval SET (conversion is on going) or RESET (no conversion is on going). - */ -#define ADC_IS_CONVERSION_ONGOING_REGULAR_INJECTED(__HANDLE__) \ - (( (((__HANDLE__)->Instance->CR) & (ADC_CR_ADSTART | ADC_CR_JADSTART)) == RESET \ - ) ? RESET : SET) - - -/** - * @brief Check if conversion is on going on injected group. - * @param __HANDLE__: ADC handle. - * @retval SET (conversion is on going) or RESET (no conversion is on going). - */ -#define ADC_IS_CONVERSION_ONGOING_INJECTED(__HANDLE__) \ - (( (((__HANDLE__)->Instance->CR) & ADC_CR_JADSTART) == RESET \ - ) ? RESET : SET) - - -/** - * @brief Check whether or not ADC is independent. - * @param __HANDLE__: ADC handle. - * @retval SET (ADC is independent) or RESET (ADC is not). - */ -#define ADC_IS_INDEPENDENT(__HANDLE__) \ - ( ( ( ((__HANDLE__)->Instance) == ADC3) \ - )? \ - SET \ - : \ - RESET \ - ) - - - -/** - * @brief Set the sample time for Channels numbers between 0 and 9. - * @param __SAMPLETIME__: Sample time parameter. - * @param __CHANNELNB__: Channel number. - * @retval None - */ -#define ADC_SMPR1(__SAMPLETIME__, __CHANNELNB__) ((__SAMPLETIME__) << (POSITION_VAL(ADC_SMPR1_SMP1) * (__CHANNELNB__))) - -/** - * @brief Set the sample time for Channels numbers between 10 and 18. - * @param __SAMPLETIME__: Sample time parameter. - * @param __CHANNELNB__: Channel number. - * @retval None - */ -#define ADC_SMPR2(__SAMPLETIME__, __CHANNELNB__) ((__SAMPLETIME__) << ((POSITION_VAL(ADC_SMPR2_SMP11) * ((__CHANNELNB__) - 10)))) - - -/** - * @brief Set the selected regular Channel rank for rank between 1 and 4. - * @param __CHANNELNB__: Channel number. - * @param __RANKNB__: Rank number. - * @retval None - */ -#define ADC_SQR1_RK(__CHANNELNB__, __RANKNB__) ((__CHANNELNB__) << (POSITION_VAL(ADC_SQR1_SQ1) * (__RANKNB__))) - -/** - * @brief Set the selected regular Channel rank for rank between 5 and 9. - * @param __CHANNELNB__: Channel number. - * @param __RANKNB__: Rank number. - * @retval None - */ -#define ADC_SQR2_RK(__CHANNELNB__, __RANKNB__) ((__CHANNELNB__) << (POSITION_VAL(ADC_SQR2_SQ6) * ((__RANKNB__) - 5))) - -/** - * @brief Set the selected regular Channel rank for rank between 10 and 14. - * @param __CHANNELNB__: Channel number. - * @param __RANKNB__: Rank number. - * @retval None - */ -#define ADC_SQR3_RK(__CHANNELNB__, __RANKNB__) ((__CHANNELNB__) << (POSITION_VAL(ADC_SQR3_SQ11) * ((__RANKNB__) - 10))) - -/** - * @brief Set the selected regular Channel rank for rank between 15 and 16. - * @param __CHANNELNB__: Channel number. - * @param __RANKNB__: Rank number. - * @retval None - */ -#define ADC_SQR4_RK(__CHANNELNB__, __RANKNB__) ((__CHANNELNB__) << (POSITION_VAL(ADC_SQR4_SQ16) * ((__RANKNB__) - 15))) - -/** - * @brief Set the selected injected Channel rank. - * @param __CHANNELNB__: Channel number. - * @param __RANKNB__: Rank number. - * @retval None - */ -#define ADC_JSQR_RK(__CHANNELNB__, __RANKNB__) ((__CHANNELNB__) << ((POSITION_VAL(ADC_JSQR_JSQ1)-2) * (__RANKNB__) +2)) - - -/** - * @brief Set the Analog Watchdog 1 channel. - * @param __CHANNEL__: channel to be monitored by Analog Watchdog 1. - * @retval None - */ -#define ADC_CFGR_SET_AWD1CH(__CHANNEL__) ((__CHANNEL__) << POSITION_VAL(ADC_CFGR_AWD1CH)) - -/** - * @brief Configure the channel number in Analog Watchdog 2 or 3. - * @param __CHANNEL__: ADC Channel - * @retval None - */ -#define ADC_CFGR_SET_AWD23CR(__CHANNEL__) (1U << (__CHANNEL__)) - -/** - * @brief Configure ADC injected context queue - * @param __INJECT_CONTEXT_QUEUE_MODE__: Injected context queue mode. - * @retval None - */ -#define ADC_CFGR_INJECT_CONTEXT_QUEUE(__INJECT_CONTEXT_QUEUE_MODE__) ((__INJECT_CONTEXT_QUEUE_MODE__) << POSITION_VAL(ADC_CFGR_JQM)) - -/** - * @brief Configure ADC discontinuous conversion mode for injected group - * @param __INJECT_DISCONTINUOUS_MODE__: Injected discontinuous mode. - * @retval None - */ -#define ADC_CFGR_INJECT_DISCCONTINUOUS(__INJECT_DISCONTINUOUS_MODE__) ((__INJECT_DISCONTINUOUS_MODE__) << POSITION_VAL(ADC_CFGR_JDISCEN)) - -/** - * @brief Configure ADC discontinuous conversion mode for regular group - * @param __REG_DISCONTINUOUS_MODE__: Regular discontinuous mode. - * @retval None - */ -#define ADC_CFGR_REG_DISCONTINUOUS(__REG_DISCONTINUOUS_MODE__) ((__REG_DISCONTINUOUS_MODE__) << POSITION_VAL(ADC_CFGR_DISCEN)) -/** - * @brief Configure the number of discontinuous conversions for regular group. - * @param __NBR_DISCONTINUOUS_CONV__: Number of discontinuous conversions. - * @retval None - */ -#define ADC_CFGR_DISCONTINUOUS_NUM(__NBR_DISCONTINUOUS_CONV__) (((__NBR_DISCONTINUOUS_CONV__) - 1) << POSITION_VAL(ADC_CFGR_DISCNUM)) - -/** - * @brief Configure the ADC auto delay mode. - * @param __AUTOWAIT__: Auto delay bit enable or disable. - * @retval None - */ -#define ADC_CFGR_AUTOWAIT(__AUTOWAIT__) ((__AUTOWAIT__) << POSITION_VAL(ADC_CFGR_AUTDLY)) - -/** - * @brief Configure ADC continuous conversion mode. - * @param __CONTINUOUS_MODE__: Continuous mode. - * @retval None - */ -#define ADC_CFGR_CONTINUOUS(__CONTINUOUS_MODE__) ((__CONTINUOUS_MODE__) << POSITION_VAL(ADC_CFGR_CONT)) - -/** - * @brief Configure the ADC DMA continuous request. - * @param __DMACONTREQ_MODE__: DMA continuous request mode. - * @retval None - */ -#define ADC_CFGR_DMACONTREQ(__DMACONTREQ_MODE__) ((__DMACONTREQ_MODE__) << POSITION_VAL(ADC_CFGR_DMACFG)) - - -/** - * @brief Configure the channel number into offset OFRx register. - * @param __CHANNEL__: ADC Channel. - * @retval None - */ -#define ADC_OFR_CHANNEL(__CHANNEL__) ((__CHANNEL__) << POSITION_VAL(ADC_OFR1_OFFSET1_CH)) - -/** - * @brief Configure the channel number into differential mode selection register. - * @param __CHANNEL__: ADC Channel. - * @retval None - */ -#define ADC_DIFSEL_CHANNEL(__CHANNEL__) (1U << (__CHANNEL__)) - -/** - * @brief Configure calibration factor in differential mode to be set into calibration register. - * @param __CALIBRATION_FACTOR__: Calibration factor value. - * @retval None - */ -#define ADC_CALFACT_DIFF_SET(__CALIBRATION_FACTOR__) (((__CALIBRATION_FACTOR__) & (ADC_CALFACT_CALFACT_D >> POSITION_VAL(ADC_CALFACT_CALFACT_D)) ) << POSITION_VAL(ADC_CALFACT_CALFACT_D)) -/** - * @brief Calibration factor in differential mode to be retrieved from calibration register. - * @param __CALIBRATION_FACTOR__: Calibration factor value. - * @retval None - */ -#define ADC_CALFACT_DIFF_GET(__CALIBRATION_FACTOR__) ((__CALIBRATION_FACTOR__) >> POSITION_VAL(ADC_CALFACT_CALFACT_D)) - -/** - * @brief Configure the analog watchdog high threshold into registers TR1, TR2 or TR3. - * @param __THRESHOLD__: Threshold value. - * @retval None - */ -#define ADC_TRX_HIGHTHRESHOLD(__THRESHOLD__) ((__THRESHOLD__) << 16) - -/** - * @brief Configure the ADC DMA continuous request for ADC multimode. - * @param __DMACONTREQ_MODE__: DMA continuous request mode. - * @retval None - */ -#define ADC_CCR_MULTI_DMACONTREQ(__DMACONTREQ_MODE__) ((__DMACONTREQ_MODE__) << POSITION_VAL(ADC_CCR_DMACFG)) - - -/** - * @brief Enable the ADC peripheral. - * @param __HANDLE__: ADC handle. - * @retval None - */ -#define ADC_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= ADC_CR_ADEN) - -/** - * @brief Verification of hardware constraints before ADC can be enabled. - * @param __HANDLE__: ADC handle. - * @retval SET (ADC can be enabled) or RESET (ADC cannot be enabled) - */ -#define ADC_ENABLING_CONDITIONS(__HANDLE__) \ - (( ( ((__HANDLE__)->Instance->CR) & \ - (ADC_CR_ADCAL | ADC_CR_JADSTP | ADC_CR_ADSTP | ADC_CR_JADSTART | \ - ADC_CR_ADSTART | ADC_CR_ADDIS | ADC_CR_ADEN ) \ - ) == RESET \ - ) ? SET : RESET) - -/** - * @brief Disable the ADC peripheral. - * @param __HANDLE__: ADC handle. - * @retval None - */ -#define ADC_DISABLE(__HANDLE__) \ - do{ \ - (__HANDLE__)->Instance->CR |= ADC_CR_ADDIS; \ - __HAL_ADC_CLEAR_FLAG((__HANDLE__), (ADC_FLAG_EOSMP | ADC_FLAG_RDY)); \ - } while(0) - -/** - * @brief Verification of hardware constraints before ADC can be disabled. - * @param __HANDLE__: ADC handle. - * @retval SET (ADC can be disabled) or RESET (ADC cannot be disabled) - */ -#define ADC_DISABLING_CONDITIONS(__HANDLE__) \ - (( ( ((__HANDLE__)->Instance->CR) & \ - (ADC_CR_JADSTART | ADC_CR_ADSTART | ADC_CR_ADEN)) == ADC_CR_ADEN \ - ) ? SET : RESET) - - -/** - * @brief Shift the offset with respect to the selected ADC resolution. - * @note Offset has to be left-aligned on bit 11, the LSB (right bits) are set to 0. - * If resolution 12 bits, no shift. - * If resolution 10 bits, shift of 2 ranks on the left. - * If resolution 8 bits, shift of 4 ranks on the left. - * If resolution 6 bits, shift of 6 ranks on the left. - * Therefore, shift = (12 - resolution) = 12 - (12- (((RES[1:0]) >> 3)*2)). - * @param __HANDLE__: ADC handle - * @param __OFFSET__: Value to be shifted - * @retval None - */ -#define ADC_OFFSET_SHIFT_RESOLUTION(__HANDLE__, __OFFSET__) \ - ((__OFFSET__) << ((((__HANDLE__)->Instance->CFGR & ADC_CFGR_RES) >> 3)*2)) - - -/** - * @brief Shift the AWD1 threshold with respect to the selected ADC resolution. - * @note Thresholds have to be left-aligned on bit 11, the LSB (right bits) are set to 0. - * If resolution 12 bits, no shift. - * If resolution 10 bits, shift of 2 ranks on the left. - * If resolution 8 bits, shift of 4 ranks on the left. - * If resolution 6 bits, shift of 6 ranks on the left. - * Therefore, shift = (12 - resolution) = 12 - (12- (((RES[1:0]) >> 3)*2)). - * @param __HANDLE__: ADC handle - * @param __THRESHOLD__: Value to be shifted - * @retval None - */ -#define ADC_AWD1THRESHOLD_SHIFT_RESOLUTION(__HANDLE__, __THRESHOLD__) \ - ((__THRESHOLD__) << ((((__HANDLE__)->Instance->CFGR & ADC_CFGR_RES) >> 3)*2)) - -/** - * @brief Shift the AWD2 and AWD3 threshold with respect to the selected ADC resolution. - * @note Thresholds have to be left-aligned on bit 7. - * If resolution 12 bits, shift of 4 ranks on the right (the 4 LSB are discarded). - * If resolution 10 bits, shift of 2 ranks on the right (the 2 LSB are discarded). - * If resolution 8 bits, no shift. - * If resolution 6 bits, shift of 2 ranks on the left (the 2 LSB are set to 0). - * @param __HANDLE__: ADC handle - * @param __THRESHOLD__: Value to be shifted - * @retval None - */ -#define ADC_AWD23THRESHOLD_SHIFT_RESOLUTION(__HANDLE__, __THRESHOLD__) \ - ( ((__HANDLE__)->Instance->CFGR & ADC_CFGR_RES) != (ADC_CFGR_RES_1 | ADC_CFGR_RES_0) ? \ - ((__THRESHOLD__) >> (4- ((((__HANDLE__)->Instance->CFGR & ADC_CFGR_RES) >> 3)*2))) : \ - (__THRESHOLD__) << 2 ) - - -/** - * @brief Report common register to ADC1, ADC2 and ADC3. - * @param __HANDLE__: ADC handle. - * @retval Common control register - */ -#define ADC_COMMON_REGISTER(__HANDLE__) (ADC123_COMMON) - - -/** - * @brief Report Master Instance. - * @param __HANDLE__: ADC handle. - * @note return same instance if ADC of input handle is independent ADC. - * @retval Master Instance - */ -#define ADC_MASTER_REGISTER(__HANDLE__) \ - ( ( ((((__HANDLE__)->Instance) == ADC1) || (((__HANDLE__)->Instance) == ADC3)) \ - )? \ - ((__HANDLE__)->Instance) \ - : \ - (ADC1) \ - ) - -/** - * @brief Clear Common Control Register. - * @param __HANDLE__: ADC handle. - * @retval None - */ -#define ADC_CLEAR_COMMON_CONTROL_REGISTER(__HANDLE__) CLEAR_BIT(ADC_COMMON_REGISTER(__HANDLE__)->CCR, ADC_CCR_CKMODE | \ - ADC_CCR_PRESC | \ - ADC_CCR_VBATEN | \ - ADC_CCR_TSEN | \ - ADC_CCR_VREFEN | \ - ADC_CCR_MDMA | \ - ADC_CCR_DMACFG | \ - ADC_CCR_DELAY | \ - ADC_CCR_DUAL ) - - -/** - * @brief Check whether or not dual conversions are enabled. - * @param __HANDLE__: ADC handle. - * @note Return RESET if ADC of input handle is independent ADC. - * @retval SET (dual regular conversions are enabled) or RESET (ADC is independent or no dual regular conversions are enabled) - */ -#define ADC_IS_DUAL_CONVERSION_ENABLE(__HANDLE__) \ - ( ( ((((__HANDLE__)->Instance) == ADC1) || (((__HANDLE__)->Instance) == ADC2)) \ - )? \ - ( ((ADC123_COMMON->CCR & ADC_CCR_DUAL) != ADC_MODE_INDEPENDENT) ) \ - : \ - RESET \ - ) - -/** - * @brief Check whether or not dual regular conversions are enabled. - * @param __HANDLE__: ADC handle. - * @retval SET (dual regular conversions are enabled) or RESET (ADC is independent or no dual regular conversions are enabled) - */ -#define ADC_IS_DUAL_REGULAR_CONVERSION_ENABLE(__HANDLE__) \ - ( ( ((((__HANDLE__)->Instance) == ADC1) || (((__HANDLE__)->Instance) == ADC2)) \ - )? \ - ( (((ADC_COMMON_REGISTER(__HANDLE__))->CCR & ADC_CCR_DUAL) != ADC_MODE_INDEPENDENT) && \ - (((ADC_COMMON_REGISTER(__HANDLE__))->CCR & ADC_CCR_DUAL) != ADC_DUALMODE_INJECSIMULT) && \ - (((ADC_COMMON_REGISTER(__HANDLE__))->CCR & ADC_CCR_DUAL) != ADC_DUALMODE_ALTERTRIG) ) \ - : \ - RESET \ - ) - - - -/** - * @brief Verification of condition for ADC start conversion: ADC must be in non-multimode or multimode with handle of ADC master. - * @param __HANDLE__: ADC handle. - * @retval SET (non-MultiMode or Master handle) or RESET (handle of Slave ADC in MultiMode) - */ -#define ADC_NONMULTIMODE_OR_MULTIMODEMASTER(__HANDLE__) \ - ( ( ((__HANDLE__)->Instance == ADC1) || ((__HANDLE__)->Instance == ADC3) \ - )? \ - SET \ - : \ - ((ADC123_COMMON->CCR & ADC_CCR_DUAL) == RESET) \ - ) - - -/** - * @brief Ensure ADC Instance is Independent or Master, or is not Slave ADC with dual regular conversions enabled. - * @param __HANDLE__: ADC handle. - * @retval SET (Independent or Master, or Slave without dual regular conversions enabled) or RESET (Slave ADC with dual regular conversions enabled) - */ -#define ADC_INDEPENDENT_OR_NONMULTIMODEREGULAR_SLAVE(__HANDLE__) \ - ( ( ((__HANDLE__)->Instance == ADC1) || ((__HANDLE__)->Instance == ADC3) \ - )? \ - SET \ - : \ - ( ((ADC123_COMMON->CCR & ADC_CCR_DUAL) == ADC_MODE_INDEPENDENT) || \ - ((ADC123_COMMON->CCR & ADC_CCR_DUAL) == ADC_DUALMODE_INJECSIMULT) || \ - ((ADC123_COMMON->CCR & ADC_CCR_DUAL) == ADC_DUALMODE_ALTERTRIG) )) - -/** - * @brief Ensure ADC Instance is Independent or Master, or is not Slave ADC with dual injected conversions enabled. - * @param __HANDLE__: ADC handle. - * @retval SET (non-MultiMode or Master, or Slave without dual injected conversions enabled) or RESET (Slave ADC with dual injected conversions enabled) - */ -#define ADC_INDEPENDENT_OR_NONMULTIMODEINJECTED_SLAVE(__HANDLE__) \ - ( ( ((__HANDLE__)->Instance == ADC1) || ((__HANDLE__)->Instance == ADC3) \ - )? \ - SET \ - : \ - ( ((ADC123_COMMON->CCR & ADC_CCR_DUAL) == ADC_MODE_INDEPENDENT) || \ - ((ADC123_COMMON->CCR & ADC_CCR_DUAL) == ADC_DUALMODE_REGSIMULT) || \ - ((ADC123_COMMON->CCR & ADC_CCR_DUAL) == ADC_DUALMODE_INTERL) )) - -/** - * @brief Verification of ADC state: enabled or disabled, directly checked on instance as input parameter. - * @param __INSTANCE__: ADC instance. - * @retval SET (ADC enabled) or RESET (ADC disabled) - */ -#define ADC_INSTANCE_IS_ENABLED(__INSTANCE__) \ - (( ((((__INSTANCE__)->CR) & (ADC_CR_ADEN | ADC_CR_ADDIS)) == ADC_CR_ADEN) && \ - ((((__INSTANCE__)->ISR) & ADC_FLAG_RDY) == ADC_FLAG_RDY) \ - ) ? SET : RESET) - -/** - * @brief Verification of enabled/disabled status of ADCs other than that associated to the input parameter handle. - * @param __HANDLE__: ADC handle. - * @retval SET (at least one other ADC is enabled) or RESET (no other ADC is enabled, all other ADCs are disabled) - */ -#define ADC_ANY_OTHER_ENABLED(__HANDLE__) \ - ( ( ((__HANDLE__)->Instance == ADC1) \ - )? \ - (ADC_INSTANCE_IS_ENABLED(ADC2)) || (ADC_INSTANCE_IS_ENABLED(ADC3)) \ - : \ - ( ( ((__HANDLE__)->Instance == ADC2) \ - )? \ - (ADC_INSTANCE_IS_ENABLED(ADC1)) || (ADC_INSTANCE_IS_ENABLED(ADC3)) \ - : \ - ADC_INSTANCE_IS_ENABLED(ADC1)) || (ADC_INSTANCE_IS_ENABLED(ADC2)) \ - ) \ - - - - -/** - * @brief Set handle instance of the ADC slave associated to the ADC master. - * @param __HANDLE_MASTER__: ADC master handle. - * @param __HANDLE_SLAVE__: ADC slave handle. - * @note if __HANDLE_MASTER__ is the handle of a slave ADC (ADC2) or an independent ADC (ADC3), __HANDLE_SLAVE__ instance is set to NULL. - * @retval None - */ -#define ADC_MULTI_SLAVE(__HANDLE_MASTER__, __HANDLE_SLAVE__) \ - ( (((__HANDLE_MASTER__)->Instance == ADC1)) ? ((__HANDLE_SLAVE__)->Instance = ADC2) : ((__HANDLE_SLAVE__)->Instance = NULL) ) - -/** - * @brief Check whether or not multimode is configured in DMA mode. - * @retval SET (multimode is configured in DMA mode) or RESET (DMA multimode is disabled) - */ -#define ADC_MULTIMODE_DMA_ENABLED() \ - ((READ_BIT(ADC123_COMMON->CCR, ADC_CCR_MDMA) == ADC_DMAACCESSMODE_12_10_BITS) \ - || (READ_BIT(ADC123_COMMON->CCR, ADC_CCR_MDMA) == ADC_DMAACCESSMODE_8_6_BITS)) - - -/** - * @brief Verify the ADC instance connected to the temperature sensor. - * @param __HANDLE__: ADC handle. - * @retval SET (ADC instance is valid) or RESET (ADC instance is invalid) - */ -/* The temperature sensor measurement path (channel 17) is available on ADC1 and ADC3 */ -#define ADC_TEMPERATURE_SENSOR_INSTANCE(__HANDLE__) ((((__HANDLE__)->Instance) == ADC1) || (((__HANDLE__)->Instance) == ADC3)) - -/** - * @brief Verify the ADC instance connected to the battery voltage VBAT. - * @param __HANDLE__: ADC handle. - * @retval SET (ADC instance is valid) or RESET (ADC instance is invalid) - */ -/* The battery voltage measurement path (channel 18) is available on ADC1 and ADC3 */ -#define ADC_BATTERY_VOLTAGE_INSTANCE(__HANDLE__) ((((__HANDLE__)->Instance) == ADC1) || (((__HANDLE__)->Instance) == ADC3)) - -/** - * @brief Verify the ADC instance connected to the internal voltage reference VREFINT. - * @param __HANDLE__: ADC handle. - * @retval SET (ADC instance is valid) or RESET (ADC instance is invalid) - */ -/* The internal voltage reference VREFINT measurement path (channel 0) is available on ADC1 */ -#define ADC_VREFINT_INSTANCE(__HANDLE__) (((__HANDLE__)->Instance) == ADC1) - - -/** - * @brief Verify the length of scheduled injected conversions group. - * @param __LENGTH__: number of programmed conversions. - * @retval SET (__LENGTH__ is within the maximum number of possible programmable injected conversions) or RESET (__LENGTH__ is null or too large) - */ -#define IS_ADC_INJECTED_NB_CONV(__LENGTH__) (((__LENGTH__) >= ((uint32_t)1)) && ((__LENGTH__) <= ((uint32_t)4))) - - -/** - * @brief Calibration factor size verification (7 bits maximum). - * @param __CALIBRATION_FACTOR__: Calibration factor value. - * @retval SET (__CALIBRATION_FACTOR__ is within the authorized size) or RESET (__CALIBRATION_FACTOR__ is too large) - */ -#define IS_ADC_CALFACT(__CALIBRATION_FACTOR__) ((__CALIBRATION_FACTOR__) <= ((uint32_t)0x7F)) - - -/** - * @brief Verify the ADC channel setting. - * @param __HANDLE__: ADC handle. - * @param __CHANNEL__: programmed ADC channel. - * @retval SET (__CHANNEL__ is valid) or RESET (__CHANNEL__ is invalid) - */ -#define IS_ADC_CHANNEL(__HANDLE__, __CHANNEL__) (((((__HANDLE__)->Instance) == ADC1) && \ - (((__CHANNEL__) == ADC_CHANNEL_VREFINT) || \ - ((__CHANNEL__) == ADC_CHANNEL_1) || \ - ((__CHANNEL__) == ADC_CHANNEL_2) || \ - ((__CHANNEL__) == ADC_CHANNEL_3) || \ - ((__CHANNEL__) == ADC_CHANNEL_4) || \ - ((__CHANNEL__) == ADC_CHANNEL_5) || \ - ((__CHANNEL__) == ADC_CHANNEL_6) || \ - ((__CHANNEL__) == ADC_CHANNEL_7) || \ - ((__CHANNEL__) == ADC_CHANNEL_8) || \ - ((__CHANNEL__) == ADC_CHANNEL_9) || \ - ((__CHANNEL__) == ADC_CHANNEL_10) || \ - ((__CHANNEL__) == ADC_CHANNEL_11) || \ - ((__CHANNEL__) == ADC_CHANNEL_12) || \ - ((__CHANNEL__) == ADC_CHANNEL_13) || \ - ((__CHANNEL__) == ADC_CHANNEL_14) || \ - ((__CHANNEL__) == ADC_CHANNEL_15) || \ - ((__CHANNEL__) == ADC_CHANNEL_16) || \ - ((__CHANNEL__) == ADC_CHANNEL_TEMPSENSOR) || \ - ((__CHANNEL__) == ADC_CHANNEL_VBAT))) || \ - ((((__HANDLE__)->Instance) == ADC2) && \ - (((__CHANNEL__) == ADC_CHANNEL_1) || \ - ((__CHANNEL__) == ADC_CHANNEL_2) || \ - ((__CHANNEL__) == ADC_CHANNEL_3) || \ - ((__CHANNEL__) == ADC_CHANNEL_4) || \ - ((__CHANNEL__) == ADC_CHANNEL_5) || \ - ((__CHANNEL__) == ADC_CHANNEL_6) || \ - ((__CHANNEL__) == ADC_CHANNEL_7) || \ - ((__CHANNEL__) == ADC_CHANNEL_8) || \ - ((__CHANNEL__) == ADC_CHANNEL_9) || \ - ((__CHANNEL__) == ADC_CHANNEL_10) || \ - ((__CHANNEL__) == ADC_CHANNEL_11) || \ - ((__CHANNEL__) == ADC_CHANNEL_12) || \ - ((__CHANNEL__) == ADC_CHANNEL_13) || \ - ((__CHANNEL__) == ADC_CHANNEL_14) || \ - ((__CHANNEL__) == ADC_CHANNEL_15) || \ - ((__CHANNEL__) == ADC_CHANNEL_16) || \ - ((__CHANNEL__) == ADC_CHANNEL_17) || \ - ((__CHANNEL__) == ADC_CHANNEL_18))) || \ - ((((__HANDLE__)->Instance) == ADC3) && \ - (((__CHANNEL__) == ADC_CHANNEL_1) || \ - ((__CHANNEL__) == ADC_CHANNEL_2) || \ - ((__CHANNEL__) == ADC_CHANNEL_3) || \ - ((__CHANNEL__) == ADC_CHANNEL_4) || \ - ((__CHANNEL__) == ADC_CHANNEL_6) || \ - ((__CHANNEL__) == ADC_CHANNEL_7) || \ - ((__CHANNEL__) == ADC_CHANNEL_8) || \ - ((__CHANNEL__) == ADC_CHANNEL_9) || \ - ((__CHANNEL__) == ADC_CHANNEL_10) || \ - ((__CHANNEL__) == ADC_CHANNEL_11) || \ - ((__CHANNEL__) == ADC_CHANNEL_12) || \ - ((__CHANNEL__) == ADC_CHANNEL_13) || \ - ((__CHANNEL__) == ADC_CHANNEL_14) || \ - ((__CHANNEL__) == ADC_CHANNEL_15) || \ - ((__CHANNEL__) == ADC_CHANNEL_TEMPSENSOR) || \ - ((__CHANNEL__) == ADC_CHANNEL_VBAT) ))) - - -/** - * @brief Verify the ADC channel setting in differential mode. - * @param __HANDLE__: ADC handle. - * @param __CHANNEL__: programmed ADC channel. - * @retval SET (__CHANNEL__ is valid) or RESET (__CHANNEL__ is invalid) - */ - /* For ADC1 and ADC2, channels 1 to 15 are available in differential mode, - channels 0, 16 to 18 can be only used in single-ended mode. - For ADC3, channels 1 to 3 and 6 to 12 are available in differential mode, - channels 4, 5 and 13 to 18 can only be used in single-ended mode. */ -#define IS_ADC_DIFF_CHANNEL(__HANDLE__, __CHANNEL__) ((((((__HANDLE__)->Instance) == ADC1) || \ - (((__HANDLE__)->Instance) == ADC2)) && \ - (((__CHANNEL__) == ADC_CHANNEL_1) || \ - ((__CHANNEL__) == ADC_CHANNEL_2) || \ - ((__CHANNEL__) == ADC_CHANNEL_3) || \ - ((__CHANNEL__) == ADC_CHANNEL_4) || \ - ((__CHANNEL__) == ADC_CHANNEL_5) || \ - ((__CHANNEL__) == ADC_CHANNEL_6) || \ - ((__CHANNEL__) == ADC_CHANNEL_7) || \ - ((__CHANNEL__) == ADC_CHANNEL_8) || \ - ((__CHANNEL__) == ADC_CHANNEL_9) || \ - ((__CHANNEL__) == ADC_CHANNEL_10) || \ - ((__CHANNEL__) == ADC_CHANNEL_11) || \ - ((__CHANNEL__) == ADC_CHANNEL_12) || \ - ((__CHANNEL__) == ADC_CHANNEL_13) || \ - ((__CHANNEL__) == ADC_CHANNEL_14) || \ - ((__CHANNEL__) == ADC_CHANNEL_15))) || \ - ((((__HANDLE__)->Instance) == ADC3) && \ - (((__CHANNEL__) == ADC_CHANNEL_1) || \ - ((__CHANNEL__) == ADC_CHANNEL_2) || \ - ((__CHANNEL__) == ADC_CHANNEL_3) || \ - ((__CHANNEL__) == ADC_CHANNEL_6) || \ - ((__CHANNEL__) == ADC_CHANNEL_7) || \ - ((__CHANNEL__) == ADC_CHANNEL_8) || \ - ((__CHANNEL__) == ADC_CHANNEL_9) || \ - ((__CHANNEL__) == ADC_CHANNEL_10) || \ - ((__CHANNEL__) == ADC_CHANNEL_11) || \ - ((__CHANNEL__) == ADC_CHANNEL_12)))) - -/** - * @brief Verify the ADC single-ended input or differential mode setting. - * @param __SING_DIFF__: programmed channel setting. - * @retval SET (__SING_DIFF__ is valid) or RESET (__SING_DIFF__ is invalid) - */ -#define IS_ADC_SINGLE_DIFFERENTIAL(__SING_DIFF__) (((__SING_DIFF__) == ADC_SINGLE_ENDED) || \ - ((__SING_DIFF__) == ADC_DIFFERENTIAL_ENDED) ) - - -/** - * @brief Verify the ADC offset management setting. - * @param __OFFSET_NUMBER__: ADC offset management. - * @retval SET (__OFFSET_NUMBER__ is valid) or RESET (__OFFSET_NUMBER__ is invalid) - */ -#define IS_ADC_OFFSET_NUMBER(__OFFSET_NUMBER__) (((__OFFSET_NUMBER__) == ADC_OFFSET_NONE) || \ - ((__OFFSET_NUMBER__) == ADC_OFFSET_1) || \ - ((__OFFSET_NUMBER__) == ADC_OFFSET_2) || \ - ((__OFFSET_NUMBER__) == ADC_OFFSET_3) || \ - ((__OFFSET_NUMBER__) == ADC_OFFSET_4) ) - -/** - * @brief Verify the ADC regular channel setting. - * @param __CHANNEL__: programmed ADC regular channel. - * @retval SET (__CHANNEL__ is valid) or RESET (__CHANNEL__ is invalid) - */ -#define IS_ADC_REGULAR_RANK(__CHANNEL__) (((__CHANNEL__) == ADC_REGULAR_RANK_1 ) || \ - ((__CHANNEL__) == ADC_REGULAR_RANK_2 ) || \ - ((__CHANNEL__) == ADC_REGULAR_RANK_3 ) || \ - ((__CHANNEL__) == ADC_REGULAR_RANK_4 ) || \ - ((__CHANNEL__) == ADC_REGULAR_RANK_5 ) || \ - ((__CHANNEL__) == ADC_REGULAR_RANK_6 ) || \ - ((__CHANNEL__) == ADC_REGULAR_RANK_7 ) || \ - ((__CHANNEL__) == ADC_REGULAR_RANK_8 ) || \ - ((__CHANNEL__) == ADC_REGULAR_RANK_9 ) || \ - ((__CHANNEL__) == ADC_REGULAR_RANK_10) || \ - ((__CHANNEL__) == ADC_REGULAR_RANK_11) || \ - ((__CHANNEL__) == ADC_REGULAR_RANK_12) || \ - ((__CHANNEL__) == ADC_REGULAR_RANK_13) || \ - ((__CHANNEL__) == ADC_REGULAR_RANK_14) || \ - ((__CHANNEL__) == ADC_REGULAR_RANK_15) || \ - ((__CHANNEL__) == ADC_REGULAR_RANK_16) ) - - -/** - * @brief Verify the ADC injected channel setting. - * @param __CHANNEL__: programmed ADC injected channel. - * @retval SET (__CHANNEL__ is valid) or RESET (__CHANNEL__ is invalid) - */ -#define IS_ADC_INJECTED_RANK(__CHANNEL__) (((__CHANNEL__) == ADC_INJECTED_RANK_1) || \ - ((__CHANNEL__) == ADC_INJECTED_RANK_2) || \ - ((__CHANNEL__) == ADC_INJECTED_RANK_3) || \ - ((__CHANNEL__) == ADC_INJECTED_RANK_4) ) - -/** - * @brief Verify the ADC edge trigger setting for injected group. - * @param __EDGE__: programmed ADC edge trigger setting. - * @retval SET (__EDGE__ is a valid value) or RESET (__EDGE__ is invalid) - */ -#define IS_ADC_EXTTRIGINJEC_EDGE(__EDGE__) (((__EDGE__) == ADC_EXTERNALTRIGINJECCONV_EDGE_NONE) || \ - ((__EDGE__) == ADC_EXTERNALTRIGINJECCONV_EDGE_RISING) || \ - ((__EDGE__) == ADC_EXTERNALTRIGINJECCONV_EDGE_FALLING) || \ - ((__EDGE__) == ADC_EXTERNALTRIGINJECCONV_EDGE_RISINGFALLING) ) - - -/** - * @brief Verify the ADC injected conversions external trigger. - * @param __INJTRIG__: programmed ADC injected conversions external trigger. - * @retval SET (__INJTRIG__ is a valid value) or RESET (__INJTRIG__ is invalid) - */ -#define IS_ADC_EXTTRIGINJEC(__INJTRIG__) (((__INJTRIG__) == ADC_EXTERNALTRIGINJEC_T1_TRGO) || \ - ((__INJTRIG__) == ADC_EXTERNALTRIGINJEC_T1_CC4) || \ - ((__INJTRIG__) == ADC_EXTERNALTRIGINJEC_T2_TRGO) || \ - ((__INJTRIG__) == ADC_EXTERNALTRIGINJEC_T2_CC1) || \ - ((__INJTRIG__) == ADC_EXTERNALTRIGINJEC_T3_CC4) || \ - ((__INJTRIG__) == ADC_EXTERNALTRIGINJEC_T4_TRGO) || \ - ((__INJTRIG__) == ADC_EXTERNALTRIGINJEC_EXT_IT15) || \ - ((__INJTRIG__) == ADC_EXTERNALTRIGINJEC_T8_CC4) || \ - ((__INJTRIG__) == ADC_EXTERNALTRIGINJEC_T1_TRGO2) || \ - ((__INJTRIG__) == ADC_EXTERNALTRIGINJEC_T8_TRGO) || \ - ((__INJTRIG__) == ADC_EXTERNALTRIGINJEC_T8_TRGO2) || \ - ((__INJTRIG__) == ADC_EXTERNALTRIGINJEC_T3_CC3) || \ - ((__INJTRIG__) == ADC_EXTERNALTRIGINJEC_T3_TRGO) || \ - ((__INJTRIG__) == ADC_EXTERNALTRIGINJEC_T3_CC1) || \ - ((__INJTRIG__) == ADC_EXTERNALTRIGINJEC_T6_TRGO) || \ - ((__INJTRIG__) == ADC_EXTERNALTRIGINJEC_T15_TRGO) || \ - \ - ((__INJTRIG__) == ADC_SOFTWARE_START) ) - - -/** - * @brief Verify the ADC multimode setting. - * @param __MODE__: programmed ADC multimode setting. - * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) - */ -#define IS_ADC_MULTIMODE(__MODE__) (((__MODE__) == ADC_MODE_INDEPENDENT) || \ - ((__MODE__) == ADC_DUALMODE_REGSIMULT_INJECSIMULT) || \ - ((__MODE__) == ADC_DUALMODE_REGSIMULT_ALTERTRIG) || \ - ((__MODE__) == ADC_DUALMODE_REGINTERL_INJECSIMULT) || \ - ((__MODE__) == ADC_DUALMODE_INJECSIMULT) || \ - ((__MODE__) == ADC_DUALMODE_REGSIMULT) || \ - ((__MODE__) == ADC_DUALMODE_INTERL) || \ - ((__MODE__) == ADC_DUALMODE_ALTERTRIG) ) - - -/** - * @brief Verify the ADC multimode DMA access setting. - * @param __MODE__: programmed ADC multimode DMA access setting. - * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) - */ -#define IS_ADC_DMA_ACCESS_MULTIMODE(__MODE__) (((__MODE__) == ADC_DMAACCESSMODE_DISABLED) || \ - ((__MODE__) == ADC_DMAACCESSMODE_12_10_BITS) || \ - ((__MODE__) == ADC_DMAACCESSMODE_8_6_BITS) ) - -/** - * @brief Verify the ADC multimode delay setting. - * @param __DELAY__: programmed ADC multimode delay setting. - * @retval SET (__DELAY__ is a valid value) or RESET (__DELAY__ is invalid) - */ -#define IS_ADC_SAMPLING_DELAY(__DELAY__) (((__DELAY__) == ADC_TWOSAMPLINGDELAY_1CYCLE) || \ - ((__DELAY__) == ADC_TWOSAMPLINGDELAY_2CYCLES) || \ - ((__DELAY__) == ADC_TWOSAMPLINGDELAY_3CYCLES) || \ - ((__DELAY__) == ADC_TWOSAMPLINGDELAY_4CYCLES) || \ - ((__DELAY__) == ADC_TWOSAMPLINGDELAY_5CYCLES) || \ - ((__DELAY__) == ADC_TWOSAMPLINGDELAY_6CYCLES) || \ - ((__DELAY__) == ADC_TWOSAMPLINGDELAY_7CYCLES) || \ - ((__DELAY__) == ADC_TWOSAMPLINGDELAY_8CYCLES) || \ - ((__DELAY__) == ADC_TWOSAMPLINGDELAY_9CYCLES) || \ - ((__DELAY__) == ADC_TWOSAMPLINGDELAY_10CYCLES) || \ - ((__DELAY__) == ADC_TWOSAMPLINGDELAY_11CYCLES) || \ - ((__DELAY__) == ADC_TWOSAMPLINGDELAY_12CYCLES) ) - - -/** - * @brief Verify the ADC analog watchdog setting. - * @param __WATCHDOG__: programmed ADC analog watchdog setting. - * @retval SET (__WATCHDOG__ is valid) or RESET (__WATCHDOG__ is invalid) - */ -#define IS_ADC_ANALOG_WATCHDOG_NUMBER(__WATCHDOG__) (((__WATCHDOG__) == ADC_ANALOGWATCHDOG_1) || \ - ((__WATCHDOG__) == ADC_ANALOGWATCHDOG_2) || \ - ((__WATCHDOG__) == ADC_ANALOGWATCHDOG_3) ) - -/** - * @brief Verify the ADC analog watchdog mode setting. - * @param __WATCHDOG_MODE__: programmed ADC analog watchdog mode setting. - * @retval SET (__WATCHDOG_MODE__ is valid) or RESET (__WATCHDOG_MODE__ is invalid) - */ -#define IS_ADC_ANALOG_WATCHDOG_MODE(__WATCHDOG_MODE__) (((__WATCHDOG_MODE__) == ADC_ANALOGWATCHDOG_NONE) || \ - ((__WATCHDOG_MODE__) == ADC_ANALOGWATCHDOG_SINGLE_REG) || \ - ((__WATCHDOG_MODE__) == ADC_ANALOGWATCHDOG_SINGLE_INJEC) || \ - ((__WATCHDOG_MODE__) == ADC_ANALOGWATCHDOG_SINGLE_REGINJEC) || \ - ((__WATCHDOG_MODE__) == ADC_ANALOGWATCHDOG_ALL_REG) || \ - ((__WATCHDOG_MODE__) == ADC_ANALOGWATCHDOG_ALL_INJEC) || \ - ((__WATCHDOG_MODE__) == ADC_ANALOGWATCHDOG_ALL_REGINJEC) ) - -/** - * @brief Verify the ADC conversion (regular or injected or both). - * @param __CONVERSION__: ADC conversion group. - * @retval SET (__CONVERSION__ is valid) or RESET (__CONVERSION__ is invalid) - */ -#define IS_ADC_CONVERSION_GROUP(__CONVERSION__) (((__CONVERSION__) == ADC_REGULAR_GROUP) || \ - ((__CONVERSION__) == ADC_INJECTED_GROUP) || \ - ((__CONVERSION__) == ADC_REGULAR_INJECTED_GROUP) ) - -/** - * @brief Verify the ADC event type. - * @param __EVENT__: ADC event. - * @retval SET (__EVENT__ is valid) or RESET (__EVENT__ is invalid) - */ -#define IS_ADC_EVENT_TYPE(__EVENT__) (((__EVENT__) == ADC_EOSMP_EVENT) || \ - ((__EVENT__) == ADC_AWD_EVENT) || \ - ((__EVENT__) == ADC_AWD2_EVENT) || \ - ((__EVENT__) == ADC_AWD3_EVENT) || \ - ((__EVENT__) == ADC_OVR_EVENT) || \ - ((__EVENT__) == ADC_JQOVF_EVENT) ) - -/** - * @brief Verify the ADC oversampling ratio. - * @param __RATIO__: programmed ADC oversampling ratio. - * @retval SET (__RATIO__ is a valid value) or RESET (__RATIO__ is invalid) - */ -#define IS_ADC_OVERSAMPLING_RATIO(__RATIO__) (((__RATIO__) == ADC_OVERSAMPLING_RATIO_2 ) || \ - ((__RATIO__) == ADC_OVERSAMPLING_RATIO_4 ) || \ - ((__RATIO__) == ADC_OVERSAMPLING_RATIO_8 ) || \ - ((__RATIO__) == ADC_OVERSAMPLING_RATIO_16 ) || \ - ((__RATIO__) == ADC_OVERSAMPLING_RATIO_32 ) || \ - ((__RATIO__) == ADC_OVERSAMPLING_RATIO_64 ) || \ - ((__RATIO__) == ADC_OVERSAMPLING_RATIO_128 ) || \ - ((__RATIO__) == ADC_OVERSAMPLING_RATIO_256 )) - -/** - * @brief Verify the ADC oversampling shift. - * @param __SHIFT__: programmed ADC oversampling shift. - * @retval SET (__SHIFT__ is a valid value) or RESET (__SHIFT__ is invalid) - */ -#define IS_ADC_RIGHT_BIT_SHIFT(__SHIFT__) (((__SHIFT__) == ADC_RIGHTBITSHIFT_NONE) || \ - ((__SHIFT__) == ADC_RIGHTBITSHIFT_1 ) || \ - ((__SHIFT__) == ADC_RIGHTBITSHIFT_2 ) || \ - ((__SHIFT__) == ADC_RIGHTBITSHIFT_3 ) || \ - ((__SHIFT__) == ADC_RIGHTBITSHIFT_4 ) || \ - ((__SHIFT__) == ADC_RIGHTBITSHIFT_5 ) || \ - ((__SHIFT__) == ADC_RIGHTBITSHIFT_6 ) || \ - ((__SHIFT__) == ADC_RIGHTBITSHIFT_7 ) || \ - ((__SHIFT__) == ADC_RIGHTBITSHIFT_8 )) - -/** - * @brief Verify the ADC oversampling triggered mode. - * @param __MODE__: programmed ADC oversampling triggered mode. - * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) - */ -#define IS_ADC_TRIGGERED_OVERSAMPLING_MODE(__MODE__) (((__MODE__) == ADC_TRIGGEREDMODE_SINGLE_TRIGGER) || \ - ((__MODE__) == ADC_TRIGGEREDMODE_MULTI_TRIGGER) ) - -/** - * @brief Verify the ADC oversampling regular conversion resumed or continued mode. - * @param __MODE__: programmed ADC oversampling regular conversion resumed or continued mode. - * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) - */ -#define IS_ADC_REGOVERSAMPLING_MODE(__MODE__) (((__MODE__) == ADC_REGOVERSAMPLING_CONTINUED_MODE) || \ - ((__MODE__) == ADC_REGOVERSAMPLING_RESUMED_MODE) ) - -/** - * @} - */ - - -/* Exported functions --------------------------------------------------------*/ -/** @addtogroup ADCEx_Exported_Functions ADC Extended Exported Functions - * @{ - */ - -/* Initialization/de-initialization functions *********************************/ - -/** @addtogroup ADCEx_Exported_Functions_Group1 Extended Input and Output operation functions - * @brief Extended IO operation functions - * @{ - */ -/* I/O operation functions ****************************************************/ - -/* ADC calibration */ - -HAL_StatusTypeDef HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef* hadc, uint32_t SingleDiff); -uint32_t HAL_ADCEx_Calibration_GetValue(ADC_HandleTypeDef *hadc, uint32_t SingleDiff); -HAL_StatusTypeDef HAL_ADCEx_Calibration_SetValue(ADC_HandleTypeDef *hadc, uint32_t SingleDiff, uint32_t CalibrationFactor); - - - -/* Blocking mode: Polling */ -HAL_StatusTypeDef HAL_ADCEx_InjectedStart(ADC_HandleTypeDef* hadc); -HAL_StatusTypeDef HAL_ADCEx_InjectedStop(ADC_HandleTypeDef* hadc); -HAL_StatusTypeDef HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout); - -/* Non-blocking mode: Interruption */ -HAL_StatusTypeDef HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef* hadc); -HAL_StatusTypeDef HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef* hadc); - - -/* ADC multimode */ -HAL_StatusTypeDef HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef *hadc, uint32_t *pData, uint32_t Length); -HAL_StatusTypeDef HAL_ADCEx_MultiModeStop_DMA(ADC_HandleTypeDef *hadc); -uint32_t HAL_ADCEx_MultiModeGetValue(ADC_HandleTypeDef *hadc); - - -/* ADC retrieve conversion value intended to be used with polling or interruption */ -uint32_t HAL_ADCEx_InjectedGetValue(ADC_HandleTypeDef* hadc, uint32_t InjectedRank); - -/* ADC IRQHandler and Callbacks used in non-blocking modes (Interruption) */ -void HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef* hadc); -void HAL_ADCEx_InjectedQueueOverflowCallback(ADC_HandleTypeDef* hadc); -void HAL_ADCEx_LevelOutOfWindow2Callback(ADC_HandleTypeDef* hadc); -void HAL_ADCEx_LevelOutOfWindow3Callback(ADC_HandleTypeDef* hadc); -void HAL_ADCEx_EndOfSamplingCallback(ADC_HandleTypeDef* hadc); - - -/* ADC Regular conversions stop */ -HAL_StatusTypeDef HAL_ADCEx_RegularStop(ADC_HandleTypeDef* hadc); -HAL_StatusTypeDef HAL_ADCEx_RegularStop_IT(ADC_HandleTypeDef* hadc); -HAL_StatusTypeDef HAL_ADCEx_RegularStop_DMA(ADC_HandleTypeDef* hadc); -HAL_StatusTypeDef HAL_ADCEx_RegularMultiModeStop_DMA(ADC_HandleTypeDef* hadc); - -/** - * @} - */ - -/** @addtogroup ADCEx_Exported_Functions_Group2 Extended Peripheral Control functions - * @brief Extended Peripheral Control functions - * @{ - */ -/* Peripheral Control functions ***********************************************/ -HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc,ADC_InjectionConfTypeDef* sConfigInjected); -HAL_StatusTypeDef HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef *hadc, ADC_MultiModeTypeDef *multimode); -HAL_StatusTypeDef HAL_ADCEx_EnableInjectedQueue(ADC_HandleTypeDef* hadc); -HAL_StatusTypeDef HAL_ADCEx_DisableInjectedQueue(ADC_HandleTypeDef* hadc); -HAL_StatusTypeDef HAL_ADCEx_DisableVoltageRegulator(ADC_HandleTypeDef* hadc); -HAL_StatusTypeDef HAL_ADCEx_EnterADCDeepPowerDownMode(ADC_HandleTypeDef* hadc); - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /*__STM32L4xx_ADC_EX_H */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ -
--- a/Inc/stm32l4xx_hal_can.h Thu Nov 12 20:49:49 2015 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,772 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_can.h - * @author MCD Application Team - * @version V1.1.0 - * @date 16-September-2015 - * @brief Header file of CAN HAL module. - ****************************************************************************** - * @attention - * - * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_CAN_H -#define __STM32L4xx_CAN_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal_def.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @addtogroup CAN - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ -/** @defgroup CAN_Exported_Types CAN Exported Types - * @{ - */ - -/** - * @brief HAL State structures definition - */ -typedef enum -{ - HAL_CAN_STATE_RESET = 0x00, /*!< CAN not yet initialized or disabled */ - HAL_CAN_STATE_READY = 0x01, /*!< CAN initialized and ready for use */ - HAL_CAN_STATE_BUSY = 0x02, /*!< CAN process is ongoing */ - HAL_CAN_STATE_BUSY_TX = 0x12, /*!< CAN process is ongoing */ - HAL_CAN_STATE_BUSY_RX = 0x22, /*!< CAN process is ongoing */ - HAL_CAN_STATE_BUSY_TX_RX = 0x32, /*!< CAN process is ongoing */ - HAL_CAN_STATE_TIMEOUT = 0x03, /*!< Timeout state */ - HAL_CAN_STATE_ERROR = 0x04 /*!< CAN error state */ - -}HAL_CAN_StateTypeDef; - -/** - * @brief CAN init structure definition - */ -typedef struct -{ - uint32_t Prescaler; /*!< Specifies the length of a time quantum. - This parameter must be a number between Min_Data = 1 and Max_Data = 1024 */ - - uint32_t Mode; /*!< Specifies the CAN operating mode. - This parameter can be a value of @ref CAN_operating_mode */ - - uint32_t SJW; /*!< Specifies the maximum number of time quanta - the CAN hardware is allowed to lengthen or - shorten a bit to perform resynchronization. - This parameter can be a value of @ref CAN_synchronisation_jump_width */ - - uint32_t BS1; /*!< Specifies the number of time quanta in Bit Segment 1. - This parameter can be a value of @ref CAN_time_quantum_in_bit_segment_1 */ - - uint32_t BS2; /*!< Specifies the number of time quanta in Bit Segment 2. - This parameter can be a value of @ref CAN_time_quantum_in_bit_segment_2 */ - - uint32_t TTCM; /*!< Enable or disable the time triggered communication mode. - This parameter can be set to ENABLE or DISABLE. */ - - uint32_t ABOM; /*!< Enable or disable the automatic bus-off management. - This parameter can be set to ENABLE or DISABLE */ - - uint32_t AWUM; /*!< Enable or disable the automatic wake-up mode. - This parameter can be set to ENABLE or DISABLE */ - - uint32_t NART; /*!< Enable or disable the non-automatic retransmission mode. - This parameter can be set to ENABLE or DISABLE */ - - uint32_t RFLM; /*!< Enable or disable the receive FIFO Locked mode. - This parameter can be set to ENABLE or DISABLE */ - - uint32_t TXFP; /*!< Enable or disable the transmit FIFO priority. - This parameter can be set to ENABLE or DISABLE */ -}CAN_InitTypeDef; - -/** - * @brief CAN filter configuration structure definition - */ -typedef struct -{ - uint32_t FilterIdHigh; /*!< Specifies the filter identification number (MSBs for a 32-bit - configuration, first one for a 16-bit configuration). - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */ - - uint32_t FilterIdLow; /*!< Specifies the filter identification number (LSBs for a 32-bit - configuration, second one for a 16-bit configuration). - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */ - - uint32_t FilterMaskIdHigh; /*!< Specifies the filter mask number or identification number, - according to the mode (MSBs for a 32-bit configuration, - first one for a 16-bit configuration). - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */ - - uint32_t FilterMaskIdLow; /*!< Specifies the filter mask number or identification number, - according to the mode (LSBs for a 32-bit configuration, - second one for a 16-bit configuration). - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */ - - uint32_t FilterFIFOAssignment; /*!< Specifies the FIFO (0 or 1) which will be assigned to the filter. - This parameter can be a value of @ref CAN_filter_FIFO */ - - uint32_t FilterNumber; /*!< Specifies the filter which will be initialized. - This parameter must be a number between Min_Data = 0 and Max_Data = 27 */ - - uint32_t FilterMode; /*!< Specifies the filter mode to be initialized. - This parameter can be a value of @ref CAN_filter_mode */ - - uint32_t FilterScale; /*!< Specifies the filter scale. - This parameter can be a value of @ref CAN_filter_scale */ - - uint32_t FilterActivation; /*!< Enable or disable the filter. - This parameter can be set to ENABLE or DISABLE */ - - uint32_t BankNumber; /*!< Select the start slave bank filter. - This parameter must be a number between Min_Data = 0 and Max_Data = 28 */ - -}CAN_FilterConfTypeDef; - -/** - * @brief CAN Tx message structure definition - */ -typedef struct -{ - uint32_t StdId; /*!< Specifies the standard identifier. - This parameter must be a number between Min_Data = 0 and Max_Data = 0x7FF */ - - uint32_t ExtId; /*!< Specifies the extended identifier. - This parameter must be a number between Min_Data = 0 and Max_Data = 0x1FFFFFFF */ - - uint32_t IDE; /*!< Specifies the type of identifier for the message that will be transmitted. - This parameter can be a value of @ref CAN_identifier_type */ - - uint32_t RTR; /*!< Specifies the type of frame for the message that will be transmitted. - This parameter can be a value of @ref CAN_remote_transmission_request */ - - uint32_t DLC; /*!< Specifies the length of the frame that will be transmitted. - This parameter must be a number between Min_Data = 0 and Max_Data = 8 */ - - uint8_t Data[8]; /*!< Contains the data to be transmitted. - This parameter must be a number between Min_Data = 0 and Max_Data = 0xFF */ - -}CanTxMsgTypeDef; - -/** - * @brief CAN Rx message structure definition - */ -typedef struct -{ - uint32_t StdId; /*!< Specifies the standard identifier. - This parameter must be a number between Min_Data = 0 and Max_Data = 0x7FF */ - - uint32_t ExtId; /*!< Specifies the extended identifier. - This parameter must be a number between Min_Data = 0 and Max_Data = 0x1FFFFFFF */ - - uint32_t IDE; /*!< Specifies the type of identifier for the message that will be received. - This parameter can be a value of @ref CAN_identifier_type */ - - uint32_t RTR; /*!< Specifies the type of frame for the received message. - This parameter can be a value of @ref CAN_remote_transmission_request */ - - uint32_t DLC; /*!< Specifies the length of the frame that will be received. - This parameter must be a number between Min_Data = 0 and Max_Data = 8 */ - - uint32_t Data[8]; /*!< Contains the data to be received. - This parameter must be a number between Min_Data = 0 and Max_Data = 0xFF */ - - uint32_t FMI; /*!< Specifies the index of the filter the message stored in the mailbox passes through. - This parameter must be a number between Min_Data = 0 and Max_Data = 0xFF */ - - uint32_t FIFONumber; /*!< Specifies the receive FIFO number. - This parameter can be CAN_FIFO0 or CAN_FIFO1 */ - -}CanRxMsgTypeDef; - -/** - * @brief CAN handle Structure definition - */ -typedef struct -{ - CAN_TypeDef *Instance; /*!< Register base address */ - - CAN_InitTypeDef Init; /*!< CAN required parameters */ - - CanTxMsgTypeDef* pTxMsg; /*!< Pointer to transmit structure */ - - CanRxMsgTypeDef* pRxMsg; /*!< Pointer to reception structure */ - - __IO HAL_CAN_StateTypeDef State; /*!< CAN communication state */ - - HAL_LockTypeDef Lock; /*!< CAN locking object */ - - __IO uint32_t ErrorCode; /*!< CAN Error code */ - -}CAN_HandleTypeDef; - -/** - * @} - */ - -/* Exported constants --------------------------------------------------------*/ -/** @defgroup CAN_Exported_Constants CAN Exported Constants - * @{ - */ - -/** @defgroup CAN_Error_Code CAN Error Code - * @{ - */ -#define HAL_CAN_ERROR_NONE ((uint32_t)0x00000000) /*!< No error */ -#define HAL_CAN_ERROR_EWG ((uint32_t)0x00000001) /*!< EWG error */ -#define HAL_CAN_ERROR_EPV ((uint32_t)0x00000002) /*!< EPV error */ -#define HAL_CAN_ERROR_BOF ((uint32_t)0x00000004) /*!< BOF error */ -#define HAL_CAN_ERROR_STF ((uint32_t)0x00000008) /*!< Stuff error */ -#define HAL_CAN_ERROR_FOR ((uint32_t)0x00000010) /*!< Form error */ -#define HAL_CAN_ERROR_ACK ((uint32_t)0x00000020) /*!< Acknowledgment error */ -#define HAL_CAN_ERROR_BR ((uint32_t)0x00000040) /*!< Bit recessive */ -#define HAL_CAN_ERROR_BD ((uint32_t)0x00000080) /*!< LEC dominant */ -#define HAL_CAN_ERROR_CRC ((uint32_t)0x00000100) /*!< LEC transfer error */ -/** - * @} - */ - -/** @defgroup CAN_InitStatus CAN initialization Status - * @{ - */ -#define CAN_INITSTATUS_FAILED ((uint32_t)0x00000000) /*!< CAN initialization failed */ -#define CAN_INITSTATUS_SUCCESS ((uint32_t)0x00000001) /*!< CAN initialization OK */ -/** - * @} - */ - -/** @defgroup CAN_operating_mode CAN Operating Mode - * @{ - */ -#define CAN_MODE_NORMAL ((uint32_t)0x00000000) /*!< Normal mode */ -#define CAN_MODE_LOOPBACK ((uint32_t)CAN_BTR_LBKM) /*!< Loopback mode */ -#define CAN_MODE_SILENT ((uint32_t)CAN_BTR_SILM) /*!< Silent mode */ -#define CAN_MODE_SILENT_LOOPBACK ((uint32_t)(CAN_BTR_LBKM | CAN_BTR_SILM)) /*!< Loopback combined with silent mode */ -/** - * @} - */ - - -/** @defgroup CAN_synchronisation_jump_width CAN Synchronization Jump Width - * @{ - */ -#define CAN_SJW_1TQ ((uint32_t)0x00000000) /*!< 1 time quantum */ -#define CAN_SJW_2TQ ((uint32_t)CAN_BTR_SJW_0) /*!< 2 time quantum */ -#define CAN_SJW_3TQ ((uint32_t)CAN_BTR_SJW_1) /*!< 3 time quantum */ -#define CAN_SJW_4TQ ((uint32_t)CAN_BTR_SJW) /*!< 4 time quantum */ -/** - * @} - */ - -/** @defgroup CAN_time_quantum_in_bit_segment_1 CAN Time Quantum in Bit Segment 1 - * @{ - */ -#define CAN_BS1_1TQ ((uint32_t)0x00000000) /*!< 1 time quantum */ -#define CAN_BS1_2TQ ((uint32_t)CAN_BTR_TS1_0) /*!< 2 time quantum */ -#define CAN_BS1_3TQ ((uint32_t)CAN_BTR_TS1_1) /*!< 3 time quantum */ -#define CAN_BS1_4TQ ((uint32_t)(CAN_BTR_TS1_1 | CAN_BTR_TS1_0)) /*!< 4 time quantum */ -#define CAN_BS1_5TQ ((uint32_t)CAN_BTR_TS1_2) /*!< 5 time quantum */ -#define CAN_BS1_6TQ ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_0)) /*!< 6 time quantum */ -#define CAN_BS1_7TQ ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_1)) /*!< 7 time quantum */ -#define CAN_BS1_8TQ ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_1 | CAN_BTR_TS1_0)) /*!< 8 time quantum */ -#define CAN_BS1_9TQ ((uint32_t)CAN_BTR_TS1_3) /*!< 9 time quantum */ -#define CAN_BS1_10TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_0)) /*!< 10 time quantum */ -#define CAN_BS1_11TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_1)) /*!< 11 time quantum */ -#define CAN_BS1_12TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_1 | CAN_BTR_TS1_0)) /*!< 12 time quantum */ -#define CAN_BS1_13TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2)) /*!< 13 time quantum */ -#define CAN_BS1_14TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2 | CAN_BTR_TS1_0)) /*!< 14 time quantum */ -#define CAN_BS1_15TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2 | CAN_BTR_TS1_1)) /*!< 15 time quantum */ -#define CAN_BS1_16TQ ((uint32_t)CAN_BTR_TS1) /*!< 16 time quantum */ -/** - * @} - */ - -/** @defgroup CAN_time_quantum_in_bit_segment_2 CAN Time Quantum in Bit Segment 2 - * @{ - */ -#define CAN_BS2_1TQ ((uint32_t)0x00000000) /*!< 1 time quantum */ -#define CAN_BS2_2TQ ((uint32_t)CAN_BTR_TS2_0) /*!< 2 time quantum */ -#define CAN_BS2_3TQ ((uint32_t)CAN_BTR_TS2_1) /*!< 3 time quantum */ -#define CAN_BS2_4TQ ((uint32_t)(CAN_BTR_TS2_1 | CAN_BTR_TS2_0)) /*!< 4 time quantum */ -#define CAN_BS2_5TQ ((uint32_t)CAN_BTR_TS2_2) /*!< 5 time quantum */ -#define CAN_BS2_6TQ ((uint32_t)(CAN_BTR_TS2_2 | CAN_BTR_TS2_0)) /*!< 6 time quantum */ -#define CAN_BS2_7TQ ((uint32_t)(CAN_BTR_TS2_2 | CAN_BTR_TS2_1)) /*!< 7 time quantum */ -#define CAN_BS2_8TQ ((uint32_t)CAN_BTR_TS2) /*!< 8 time quantum */ -/** - * @} - */ - -/** @defgroup CAN_filter_mode CAN Filter Mode - * @{ - */ -#define CAN_FILTERMODE_IDMASK ((uint8_t)0x00) /*!< Identifier mask mode */ -#define CAN_FILTERMODE_IDLIST ((uint8_t)0x01) /*!< Identifier list mode */ -/** - * @} - */ - -/** @defgroup CAN_filter_scale CAN Filter Scale - * @{ - */ -#define CAN_FILTERSCALE_16BIT ((uint8_t)0x00) /*!< Two 16-bit filters */ -#define CAN_FILTERSCALE_32BIT ((uint8_t)0x01) /*!< One 32-bit filter */ -/** - * @} - */ - -/** @defgroup CAN_filter_FIFO CAN Filter FIFO - * @{ - */ -#define CAN_FILTER_FIFO0 ((uint8_t)0x00) /*!< Filter FIFO 0 assignment for filter x */ -#define CAN_FILTER_FIFO1 ((uint8_t)0x01) /*!< Filter FIFO 1 assignment for filter x */ -/** - * @} - */ - -/** @defgroup CAN_identifier_type CAN Identifier Type - * @{ - */ -#define CAN_ID_STD ((uint32_t)0x00000000) /*!< Standard Id */ -#define CAN_ID_EXT ((uint32_t)0x00000004) /*!< Extended Id */ -/** - * @} - */ - -/** @defgroup CAN_remote_transmission_request CAN Remote Transmission Request - * @{ - */ -#define CAN_RTR_DATA ((uint32_t)0x00000000) /*!< Data frame */ -#define CAN_RTR_REMOTE ((uint32_t)0x00000002) /*!< Remote frame */ -/** - * @} - */ - -/** @defgroup CAN_receive_FIFO_number_constants CAN Receive FIFO Number - * @{ - */ -#define CAN_FIFO0 ((uint8_t)0x00) /*!< CAN FIFO 0 used to receive */ -#define CAN_FIFO1 ((uint8_t)0x01) /*!< CAN FIFO 1 used to receive */ -/** - * @} - */ - -/** @defgroup CAN_flags CAN Flags - * @{ - */ -/* If the flag is 0x3XXXXXXX, it means that it can be used with CAN_GetFlagStatus() - and CAN_ClearFlag() functions. */ -/* If the flag is 0x1XXXXXXX, it means that it can only be used with - CAN_GetFlagStatus() function. */ - -/* Transmit Flags */ -#define CAN_FLAG_RQCP0 ((uint32_t)0x00000500) /*!< Request MailBox0 flag */ -#define CAN_FLAG_RQCP1 ((uint32_t)0x00000508) /*!< Request MailBox1 flag */ -#define CAN_FLAG_RQCP2 ((uint32_t)0x00000510) /*!< Request MailBox2 flag */ -#define CAN_FLAG_TXOK0 ((uint32_t)0x00000501) /*!< Transmission OK MailBox0 flag */ -#define CAN_FLAG_TXOK1 ((uint32_t)0x00000509) /*!< Transmission OK MailBox1 flag */ -#define CAN_FLAG_TXOK2 ((uint32_t)0x00000511) /*!< Transmission OK MailBox2 flag */ -#define CAN_FLAG_TME0 ((uint32_t)0x0000051A) /*!< Transmit mailbox 0 empty flag */ -#define CAN_FLAG_TME1 ((uint32_t)0x0000051B) /*!< Transmit mailbox 0 empty flag */ -#define CAN_FLAG_TME2 ((uint32_t)0x0000051C) /*!< Transmit mailbox 0 empty flag */ - -/* Receive Flags */ -#define CAN_FLAG_FF0 ((uint32_t)0x00000203) /*!< FIFO 0 Full flag */ -#define CAN_FLAG_FOV0 ((uint32_t)0x00000204) /*!< FIFO 0 Overrun flag */ - -#define CAN_FLAG_FF1 ((uint32_t)0x00000403) /*!< FIFO 1 Full flag */ -#define CAN_FLAG_FOV1 ((uint32_t)0x00000404) /*!< FIFO 1 Overrun flag */ - -/* Operating Mode Flags */ -#define CAN_FLAG_WKU ((uint32_t)0x00000103) /*!< Wake up flag */ -#define CAN_FLAG_SLAK ((uint32_t)0x00000101) /*!< Sleep acknowledge flag */ -#define CAN_FLAG_SLAKI ((uint32_t)0x00000104) /*!< Sleep acknowledge flag */ -/* @note When SLAK interrupt is disabled (SLKIE=0), no polling on SLAKI is possible. - In this case the SLAK bit can be polled.*/ - -/* Error Flags */ -#define CAN_FLAG_EWG ((uint32_t)0x00000300) /*!< Error warning flag */ -#define CAN_FLAG_EPV ((uint32_t)0x00000301) /*!< Error passive flag */ -#define CAN_FLAG_BOF ((uint32_t)0x00000302) /*!< Bus-Off flag */ -/** - * @} - */ - -/** @defgroup CAN_interrupts CAN Interrupts - * @{ - */ -#define CAN_IT_TME ((uint32_t)CAN_IER_TMEIE) /*!< Transmit mailbox empty interrupt */ - -/* Receive Interrupts */ -#define CAN_IT_FMP0 ((uint32_t)CAN_IER_FMPIE0) /*!< FIFO 0 message pending interrupt */ -#define CAN_IT_FF0 ((uint32_t)CAN_IER_FFIE0) /*!< FIFO 0 full interrupt */ -#define CAN_IT_FOV0 ((uint32_t)CAN_IER_FOVIE0) /*!< FIFO 0 overrun interrupt */ -#define CAN_IT_FMP1 ((uint32_t)CAN_IER_FMPIE1) /*!< FIFO 1 message pending interrupt */ -#define CAN_IT_FF1 ((uint32_t)CAN_IER_FFIE1) /*!< FIFO 1 full interrupt */ -#define CAN_IT_FOV1 ((uint32_t)CAN_IER_FOVIE1) /*!< FIFO 1 overrun interrupt */ - -/* Operating Mode Interrupts */ -#define CAN_IT_WKU ((uint32_t)CAN_IER_WKUIE) /*!< Wake-up interrupt */ -#define CAN_IT_SLK ((uint32_t)CAN_IER_SLKIE) /*!< Sleep acknowledge interrupt */ - -/* Error Interrupts */ -#define CAN_IT_EWG ((uint32_t)CAN_IER_EWGIE) /*!< Error warning interrupt */ -#define CAN_IT_EPV ((uint32_t)CAN_IER_EPVIE) /*!< Error passive interrupt */ -#define CAN_IT_BOF ((uint32_t)CAN_IER_BOFIE) /*!< Bus-off interrupt */ -#define CAN_IT_LEC ((uint32_t)CAN_IER_LECIE) /*!< Last error code interrupt */ -#define CAN_IT_ERR ((uint32_t)CAN_IER_ERRIE) /*!< Error Interrupt */ - -/** - * @} - */ - -/* Mailboxes definition */ -#define CAN_TXMAILBOX_0 ((uint8_t)0x00) -#define CAN_TXMAILBOX_1 ((uint8_t)0x01) -#define CAN_TXMAILBOX_2 ((uint8_t)0x02) - -/** - * @} - */ - -/* Exported macros -----------------------------------------------------------*/ -/** @defgroup CAN_Exported_Macro CAN Exported Macros - * @{ - */ - -/** @brief Reset CAN handle state. - * @param __HANDLE__: CAN handle. - * @retval None - */ -#define __HAL_CAN_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_CAN_STATE_RESET) - -/** - * @brief Enable the specified CAN interrupt. - * @param __HANDLE__: CAN handle. - * @param __INTERRUPT__: CAN Interrupt. - * @retval None - */ -#define __HAL_CAN_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) |= (__INTERRUPT__)) - -/** - * @brief Disable the specified CAN interrupt. - * @param __HANDLE__: CAN handle. - * @param __INTERRUPT__: CAN Interrupt. - * @retval None - */ -#define __HAL_CAN_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) &= ~(__INTERRUPT__)) - -/** - * @brief Return the number of pending received messages. - * @param __HANDLE__: CAN handle. - * @param __FIFONUMBER__: Receive FIFO number, CAN_FIFO0 or CAN_FIFO1. - * @retval The number of pending message. - */ -#define __HAL_CAN_MSG_PENDING(__HANDLE__, __FIFONUMBER__) (((__FIFONUMBER__) == CAN_FIFO0)? \ -((uint8_t)((__HANDLE__)->Instance->RF0R&(uint32_t)0x03)) : ((uint8_t)((__HANDLE__)->Instance->RF1R&(uint32_t)0x03))) - -/** @brief Check whether the specified CAN flag is set or not. - * @param __HANDLE__: specifies the CAN Handle. - * @param __FLAG__: specifies the flag to check. - * This parameter can be one of the following values: - * @arg CAN_TSR_RQCP0: Request MailBox0 Flag - * @arg CAN_TSR_RQCP1: Request MailBox1 Flag - * @arg CAN_TSR_RQCP2: Request MailBox2 Flag - * @arg CAN_FLAG_TXOK0: Transmission OK MailBox0 Flag - * @arg CAN_FLAG_TXOK1: Transmission OK MailBox1 Flag - * @arg CAN_FLAG_TXOK2: Transmission OK MailBox2 Flag - * @arg CAN_FLAG_TME0: Transmit mailbox 0 empty Flag - * @arg CAN_FLAG_TME1: Transmit mailbox 1 empty Flag - * @arg CAN_FLAG_TME2: Transmit mailbox 2 empty Flag - * @arg CAN_FLAG_FMP0: FIFO 0 Message Pending Flag - * @arg CAN_FLAG_FF0: FIFO 0 Full Flag - * @arg CAN_FLAG_FOV0: FIFO 0 Overrun Flag - * @arg CAN_FLAG_FMP1: FIFO 1 Message Pending Flag - * @arg CAN_FLAG_FF1: FIFO 1 Full Flag - * @arg CAN_FLAG_FOV1: FIFO 1 Overrun Flag - * @arg CAN_FLAG_WKU: Wake up Flag - * @arg CAN_FLAG_SLAK: Sleep acknowledge Flag - * @arg CAN_FLAG_SLAKI: Sleep acknowledge Flag - * @arg CAN_FLAG_EWG: Error Warning Flag - * @arg CAN_FLAG_EPV: Error Passive Flag - * @arg CAN_FLAG_BOF: Bus-Off Flag - * @retval The new state of __FLAG__ (TRUE or FALSE). - */ -#define __HAL_CAN_GET_FLAG(__HANDLE__, __FLAG__) \ -((((__FLAG__) >> 8) == 5)? ((((__HANDLE__)->Instance->TSR) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \ - (((__FLAG__) >> 8) == 2)? ((((__HANDLE__)->Instance->RF0R) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \ - (((__FLAG__) >> 8) == 4)? ((((__HANDLE__)->Instance->RF1R) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \ - (((__FLAG__) >> 8) == 1)? ((((__HANDLE__)->Instance->MSR) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \ - ((((__HANDLE__)->Instance->ESR) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK)))) - -/** @brief Clear the specified CAN pending flag. - * @param __HANDLE__: specifies the CAN Handle. - * @param __FLAG__: specifies the flag to check. - * This parameter can be one of the following values: - * @arg CAN_TSR_RQCP0: Request MailBox0 Flag - * @arg CAN_TSR_RQCP1: Request MailBox1 Flag - * @arg CAN_TSR_RQCP2: Request MailBox2 Flag - * @arg CAN_FLAG_TXOK0: Transmission OK MailBox0 Flag - * @arg CAN_FLAG_TXOK1: Transmission OK MailBox1 Flag - * @arg CAN_FLAG_TXOK2: Transmission OK MailBox2 Flag - * @arg CAN_FLAG_TME0: Transmit mailbox 0 empty Flag - * @arg CAN_FLAG_TME1: Transmit mailbox 1 empty Flag - * @arg CAN_FLAG_TME2: Transmit mailbox 2 empty Flag - * @arg CAN_FLAG_FMP0: FIFO 0 Message Pending Flag - * @arg CAN_FLAG_FF0: FIFO 0 Full Flag - * @arg CAN_FLAG_FOV0: FIFO 0 Overrun Flag - * @arg CAN_FLAG_FMP1: FIFO 1 Message Pending Flag - * @arg CAN_FLAG_FF1: FIFO 1 Full Flag - * @arg CAN_FLAG_FOV1: FIFO 1 Overrun Flag - * @arg CAN_FLAG_WKU: Wake up Flag - * @arg CAN_FLAG_SLAKI: Sleep acknowledge Flag - * @retval The new state of __FLAG__ (TRUE or FALSE). - */ -#define __HAL_CAN_CLEAR_FLAG(__HANDLE__, __FLAG__) \ -((((__FLAG__) >> 8U) == 5)? (((__HANDLE__)->Instance->TSR) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): \ - (((__FLAG__) >> 8U) == 2)? (((__HANDLE__)->Instance->RF0R) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): \ - (((__FLAG__) >> 8U) == 4)? (((__HANDLE__)->Instance->RF1R) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): \ - (((__FLAG__) >> 8U) == 1)? (((__HANDLE__)->Instance->MSR) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): 0) - - -/** @brief Check whether the specified CAN interrupt source is enabled or not. - * @param __HANDLE__: specifies the CAN Handle. - * @param __INTERRUPT__: specifies the CAN interrupt source to check. - * This parameter can be one of the following values: - * @arg CAN_IT_TME: Transmit mailbox empty interrupt enable - * @arg CAN_IT_FMP0: FIFO0 message pending interrupt enable - * @arg CAN_IT_FMP1: FIFO1 message pending interrupt enable - * @retval The new state of __IT__ (TRUE or FALSE). - */ -#define __HAL_CAN_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IER & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) - -/** - * @brief Check the transmission status of a CAN Frame. - * @param __HANDLE__: specifies the CAN Handle. - * @param __TRANSMITMAILBOX__: the number of the mailbox that is used for transmission. - * @retval The new status of transmission (TRUE or FALSE). - */ -#define __HAL_CAN_TRANSMIT_STATUS(__HANDLE__, __TRANSMITMAILBOX__)\ -(((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_0)? ((((__HANDLE__)->Instance->TSR) & (CAN_TSR_RQCP0 | CAN_TSR_TXOK0 | CAN_TSR_TME0)) == (CAN_TSR_RQCP0 | CAN_TSR_TXOK0 | CAN_TSR_TME0)) :\ - ((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_1)? ((((__HANDLE__)->Instance->TSR) & (CAN_TSR_RQCP1 | CAN_TSR_TXOK1 | CAN_TSR_TME1)) == (CAN_TSR_RQCP1 | CAN_TSR_TXOK1 | CAN_TSR_TME1)) :\ - ((((__HANDLE__)->Instance->TSR) & (CAN_TSR_RQCP2 | CAN_TSR_TXOK2 | CAN_TSR_TME2)) == (CAN_TSR_RQCP2 | CAN_TSR_TXOK2 | CAN_TSR_TME2))) - - - -/** - * @brief Release the specified receive FIFO. - * @param __HANDLE__: CAN handle. - * @param __FIFONUMBER__: Receive FIFO number, CAN_FIFO0 or CAN_FIFO1. - * @retval None - */ -#define __HAL_CAN_FIFO_RELEASE(__HANDLE__, __FIFONUMBER__) (((__FIFONUMBER__) == CAN_FIFO0)? \ -((__HANDLE__)->Instance->RF0R |= CAN_RF0R_RFOM0) : ((__HANDLE__)->Instance->RF1R |= CAN_RF1R_RFOM1)) - -/** - * @brief Cancel a transmit request. - * @param __HANDLE__: specifies the CAN Handle. - * @param __TRANSMITMAILBOX__: the number of the mailbox that is used for transmission. - * @retval None - */ -#define __HAL_CAN_CANCEL_TRANSMIT(__HANDLE__, __TRANSMITMAILBOX__)\ -(((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_0)? ((__HANDLE__)->Instance->TSR |= CAN_TSR_ABRQ0) :\ - ((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_1)? ((__HANDLE__)->Instance->TSR |= CAN_TSR_ABRQ1) :\ - ((__HANDLE__)->Instance->TSR |= CAN_TSR_ABRQ2)) - -/** - * @brief Enable or disable the DBG Freeze for CAN. - * @param __HANDLE__: specifies the CAN Handle. - * @param __NEWSTATE__: new state of the CAN peripheral. - * This parameter can be: ENABLE (CAN reception/transmission is frozen - * during debug. Reception FIFO can still be accessed/controlled normally) - * or DISABLE (CAN is working during debug). - * @retval None - */ -#define __HAL_CAN_DBG_FREEZE(__HANDLE__, __NEWSTATE__) (((__NEWSTATE__) == ENABLE)? \ -((__HANDLE__)->Instance->MCR |= CAN_MCR_DBF) : ((__HANDLE__)->Instance->MCR &= ~CAN_MCR_DBF)) - -/** - * @} - */ - -/* Exported functions --------------------------------------------------------*/ -/** @addtogroup CAN_Exported_Functions CAN Exported Functions - * @{ - */ - -/** @defgroup CAN_Exported_Functions_Group1 Initialization and de-initialization functions - * @brief Initialization and Configuration functions - * @{ - */ -/* addtogroup and de-initialization functions *****************************/ -HAL_StatusTypeDef HAL_CAN_Init(CAN_HandleTypeDef* hcan); -HAL_StatusTypeDef HAL_CAN_ConfigFilter(CAN_HandleTypeDef* hcan, CAN_FilterConfTypeDef* sFilterConfig); -HAL_StatusTypeDef HAL_CAN_DeInit(CAN_HandleTypeDef* hcan); -void HAL_CAN_MspInit(CAN_HandleTypeDef* hcan); -void HAL_CAN_MspDeInit(CAN_HandleTypeDef* hcan); -/** - * @} - */ - -/** @addtogroup CAN_Exported_Functions_Group2 Input and Output operation functions - * @brief I/O operation functions - * @{ - */ -/* IO operation functions *****************************************************/ -HAL_StatusTypeDef HAL_CAN_Transmit(CAN_HandleTypeDef *hcan, uint32_t Timeout); -HAL_StatusTypeDef HAL_CAN_Transmit_IT(CAN_HandleTypeDef *hcan); -HAL_StatusTypeDef HAL_CAN_Receive(CAN_HandleTypeDef *hcan, uint8_t FIFONumber, uint32_t Timeout); -HAL_StatusTypeDef HAL_CAN_Receive_IT(CAN_HandleTypeDef *hcan, uint8_t FIFONumber); -HAL_StatusTypeDef HAL_CAN_Sleep(CAN_HandleTypeDef *hcan); -HAL_StatusTypeDef HAL_CAN_WakeUp(CAN_HandleTypeDef *hcan); -void HAL_CAN_IRQHandler(CAN_HandleTypeDef* hcan); -void HAL_CAN_TxCpltCallback(CAN_HandleTypeDef* hcan); -void HAL_CAN_RxCpltCallback(CAN_HandleTypeDef* hcan); -void HAL_CAN_ErrorCallback(CAN_HandleTypeDef *hcan); -/** - * @} - */ - -/** @addtogroup CAN_Exported_Functions_Group3 Peripheral State and Error functions - * @brief CAN Peripheral State functions - * @{ - */ -/* Peripheral State and Error functions ***************************************/ -uint32_t HAL_CAN_GetError(CAN_HandleTypeDef *hcan); -HAL_CAN_StateTypeDef HAL_CAN_GetState(CAN_HandleTypeDef* hcan); -/** - * @} - */ - -/** - * @} - */ - -/* Private types -------------------------------------------------------------*/ -/* Private constants ---------------------------------------------------------*/ -/** @defgroup CAN_Private_Constants CAN Private Constants - * @{ - */ -/** @defgroup CAN_transmit_constants CAN Transmit Constants - * @{ - */ -#define CAN_TXSTATUS_FAILED ((uint8_t)0x00) /*!< CAN transmission failed */ -#define CAN_TXSTATUS_OK ((uint8_t)0x01) /*!< CAN transmission succeeded */ -#define CAN_TXSTATUS_PENDING ((uint8_t)0x02) /*!< CAN transmission pending */ -#define CAN_TXSTATUS_NOMAILBOX ((uint8_t)0x04) /*!< CAN cell did not provide CAN_TxStatus_NoMailBox */ -/** - * @} - */ -#define CAN_FLAG_MASK ((uint32_t)0x000000FF) - - -/** - * @} - */ - -/* Private macros ------------------------------------------------------------*/ -/** @defgroup CAN_Private_Macros CAN Private Macros - * @{ - */ - -#define IS_CAN_MODE(MODE) (((MODE) == CAN_MODE_NORMAL) || \ - ((MODE) == CAN_MODE_LOOPBACK)|| \ - ((MODE) == CAN_MODE_SILENT) || \ - ((MODE) == CAN_MODE_SILENT_LOOPBACK)) - -#define IS_CAN_SJW(SJW) (((SJW) == CAN_SJW_1TQ) || ((SJW) == CAN_SJW_2TQ)|| \ - ((SJW) == CAN_SJW_3TQ) || ((SJW) == CAN_SJW_4TQ)) - -#define IS_CAN_BS1(BS1) ((BS1) <= CAN_BS1_16TQ) - -#define IS_CAN_BS2(BS2) ((BS2) <= CAN_BS2_8TQ) - -#define IS_CAN_PRESCALER(PRESCALER) (((PRESCALER) >= 1) && ((PRESCALER) <= 1024)) - -#define IS_CAN_FILTER_NUMBER(NUMBER) ((NUMBER) <= 27) - -#define IS_CAN_FILTER_MODE(MODE) (((MODE) == CAN_FILTERMODE_IDMASK) || \ - ((MODE) == CAN_FILTERMODE_IDLIST)) - -#define IS_CAN_FILTER_SCALE(SCALE) (((SCALE) == CAN_FILTERSCALE_16BIT) || \ - ((SCALE) == CAN_FILTERSCALE_32BIT)) - -#define IS_CAN_FILTER_FIFO(FIFO) (((FIFO) == CAN_FILTER_FIFO0) || \ - ((FIFO) == CAN_FILTER_FIFO1)) - -#define IS_CAN_BANKNUMBER(BANKNUMBER) ((BANKNUMBER) <= 28) - -#define IS_CAN_TRANSMITMAILBOX(TRANSMITMAILBOX) ((TRANSMITMAILBOX) <= ((uint8_t)0x02)) - -#define IS_CAN_STDID(STDID) ((STDID) <= ((uint32_t)0x7FF)) - -#define IS_CAN_EXTID(EXTID) ((EXTID) <= ((uint32_t)0x1FFFFFFF)) - -#define IS_CAN_DLC(DLC) ((DLC) <= ((uint8_t)0x08)) - -#define IS_CAN_IDTYPE(IDTYPE) (((IDTYPE) == CAN_ID_STD) || \ - ((IDTYPE) == CAN_ID_EXT)) - -#define IS_CAN_RTR(RTR) (((RTR) == CAN_RTR_DATA) || ((RTR) == CAN_RTR_REMOTE)) - -#define IS_CAN_FIFO(FIFO) (((FIFO) == CAN_FIFO0) || ((FIFO) == CAN_FIFO1)) - -/** - * @} - */ - -/* Private functions ---------------------------------------------------------*/ - -/** - * @} - */ - -/** - * @} - */ - - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32L4xx_CAN_H */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ -
--- a/Inc/stm32l4xx_hal_comp.h Thu Nov 12 20:49:49 2015 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,638 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_comp.h - * @author MCD Application Team - * @version V1.1.0 - * @date 16-September-2015 - * @brief Header file of COMP HAL module. - ****************************************************************************** - * @attention - * - * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_COMP_H -#define __STM32L4xx_HAL_COMP_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal_def.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @addtogroup COMP - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ -/** @defgroup COMP_Exported_Types COMP Exported Types - * @{ - */ - -/** - * @brief COMP Init structure definition - */ -typedef struct -{ - - uint32_t InvertingInput; /*!< Selects the inverting input of the comparator. - This parameter can be a value of @ref COMP_InvertingInput */ - - uint32_t NonInvertingInput; /*!< Selects the non inverting input of the comparator. - This parameter can be a value of @ref COMP_NonInvertingInput */ - - uint32_t OutputPol; /*!< Selects the output polarity of the comparator. - This parameter can be a value of @ref COMP_OutputPolarity */ - - uint32_t Hysteresis; /*!< Selects the hysteresis voltage of the comparator. - This parameter can be a value of @ref COMP_Hysteresis */ - - uint32_t BlankingSrce; /*!< Selects the output blanking source of the comparator. - This parameter can be a value of @ref COMP_BlankingSrce */ - - uint32_t Mode; /*!< Selects the operating consumption mode of the comparator - to adjust the speed/consumption. - This parameter can be a value of @ref COMP_Mode */ - - uint32_t WindowMode; /*!< Selects the window mode of the comparator 2. - This parameter can be a value of @ref COMP_WindowMode */ - - uint32_t TriggerMode; /*!< Selects the trigger mode of the comparator (interrupt mode). - This parameter can be a value of @ref COMP_TriggerMode */ - -}COMP_InitTypeDef; - -/** - * @brief HAL State structures definition - */ -typedef enum -{ - HAL_COMP_STATE_RESET = 0x00, /*!< COMP not yet initialized or disabled */ - HAL_COMP_STATE_READY = 0x01, /*!< COMP initialized and ready for use */ - HAL_COMP_STATE_READY_LOCKED = 0x11, /*!< COMP initialized but the configuration is locked */ - HAL_COMP_STATE_BUSY = 0x02, /*!< COMP is running */ - HAL_COMP_STATE_BUSY_LOCKED = 0x12 /*!< COMP is running and the configuration is locked */ -}HAL_COMP_StateTypeDef; - -/** - * @brief COMP Handle Structure definition - */ -typedef struct -{ - COMP_TypeDef *Instance; /*!< Register base address */ - COMP_InitTypeDef Init; /*!< COMP required parameters */ - HAL_LockTypeDef Lock; /*!< Locking object */ - __IO HAL_COMP_StateTypeDef State; /*!< COMP communication state */ -} COMP_HandleTypeDef; - -/** - * @} - */ - -/* Exported constants --------------------------------------------------------*/ -/** @defgroup COMP_Exported_Constants COMP Exported Constants - * @{ - */ - -/** @defgroup COMP_InvertingInput COMP Inverting Input - * @{ - */ -#define COMP_INVERTINGINPUT_1_4VREFINT ((uint32_t)0x00000000) /*!< 1/4 VREFINT connected to comparator inverting input (minus) */ -#define COMP_INVERTINGINPUT_1_2VREFINT COMP_CSR_INMSEL_0 /*!< 1/2 VREFINT connected to comparator inverting input (minus) */ -#define COMP_INVERTINGINPUT_3_4VREFINT COMP_CSR_INMSEL_1 /*!< 3/4 VREFINT connected to comparator inverting input (minus) */ -#define COMP_INVERTINGINPUT_VREFINT (COMP_CSR_INMSEL_1 | COMP_CSR_INMSEL_0) /*!< VREFINT connected to comparator1 inverting input (minus) */ -#define COMP_INVERTINGINPUT_DAC1 COMP_CSR_INMSEL_2 /*!< DAC_OUT1 connected to comparator inverting input (minus) */ -#define COMP_INVERTINGINPUT_DAC2 (COMP_CSR_INMSEL_2 | COMP_CSR_INMSEL_0) /*!< DAC_OUT2 connected to comparator inverting input (minus) */ -#define COMP_INVERTINGINPUT_IO1 (COMP_CSR_INMSEL_2 | COMP_CSR_INMSEL_1) /*!< IO1 connected to comparator inverting input (minus) */ -#define COMP_INVERTINGINPUT_IO2 COMP_CSR_INMSEL /*!< IO2 connected to comparator inverting input (minus) */ -/** - * @} - */ - -/** @defgroup COMP_NonInvertingInput COMP NonInverting Input - * @{ - */ -#define COMP_NONINVERTINGINPUT_IO1 ((uint32_t)0x00000000) /*!< IO1 connected to comparator non inverting input (plus) */ -#define COMP_NONINVERTINGINPUT_IO2 COMP_CSR_INPSEL_0 /*!< IO2 connected to comparator non inverting input (plus) */ -/** - * @} - */ - -/** @defgroup COMP_OutputPolarity COMP Output Polarity - * @{ - */ -#define COMP_OUTPUTPOL_NONINVERTED ((uint32_t)0x00000000) /*!< COMP output on GPIO isn't inverted */ -#define COMP_OUTPUTPOL_INVERTED COMP_CSR_POLARITY /*!< COMP output on GPIO is inverted */ -/** - * @} - */ - -/** @defgroup COMP_Mode COMP Mode - * @{ - */ -/* Please refer to the electrical characteristics in the device datasheet for - the power consumption values */ -#define COMP_MODE_HIGHSPEED ((uint32_t)0x00000000) /*!< High Speed */ -#define COMP_MODE_MEDIUMSPEED COMP_CSR_PWRMODE_0 /*!< Medium Speed */ -#define COMP_MODE_ULTRALOWPOWER COMP_CSR_PWRMODE /*!< Ultra-low power mode */ -/** - * @} - */ - -/** @defgroup COMP_Hysteresis COMP Hysteresis - * @{ - */ -#define COMP_HYSTERESIS_NONE ((uint32_t)0x00000000) /*!< No hysteresis */ -#define COMP_HYSTERESIS_LOW COMP_CSR_HYST_0 /*!< Hysteresis level low */ -#define COMP_HYSTERESIS_MEDIUM COMP_CSR_HYST_1 /*!< Hysteresis level medium */ -#define COMP_HYSTERESIS_HIGH COMP_CSR_HYST /*!< Hysteresis level high */ -/** - * @} - */ - -/** @defgroup COMP_BlankingSrce COMP Blanking Source - * @{ - */ -/* No blanking source can be selected for all comparators */ -#define COMP_BLANKINGSRCE_NONE ((uint32_t)0x00000000) /*!< No blanking source */ -/* Blanking source for COMP1 */ -#define COMP_BLANKINGSRCE_TIM1OC5 COMP_CSR_BLANKING_0 /*!< TIM1 OC5 selected as blanking source for comparator */ -#define COMP_BLANKINGSRCE_TIM2OC3 COMP_CSR_BLANKING_1 /*!< TIM2 OC3 selected as blanking source for comparator */ -#define COMP_BLANKINGSRCE_TIM3OC3 COMP_CSR_BLANKING_2 /*!< TIM3 OC3 selected as blanking source for comparator */ -/* Blanking source for COMP2 */ -#define COMP_BLANKINGSRCE_TIM3OC4 COMP_CSR_BLANKING_0 /*!< TIM3 OC4 selected as blanking source for comparator */ -#define COMP_BLANKINGSRCE_TIM8OC5 COMP_CSR_BLANKING_1 /*!< TIM8 OC5 selected as blanking source for comparator */ -#define COMP_BLANKINGSRCE_TIM15OC1 COMP_CSR_BLANKING_2 /*!< TIM15 OC1 selected as blanking source for comparator */ -/** - * @} - */ - -/** @defgroup COMP_WindowMode COMP Window Mode - * @{ - */ -#define COMP_WINDOWMODE_DISABLE ((uint32_t)0x00000000) /*!< Window mode disable: Input plus of Comparator 2 not connected to Comparator 1 */ -#define COMP_WINDOWMODE_ENABLE COMP_CSR_WINMODE /*!< Window mode enable: Input plus of Comparator 2 is connected to input plus of Comparator 1 */ -/** - * @} - */ - -/** @defgroup COMP_OutputLevel COMP Output Level - * @{ - */ -/* When output polarity is not inverted, comparator output is low when - the non-inverting input is at a lower voltage than the inverting input*/ -#define COMP_OUTPUTLEVEL_LOW ((uint32_t)0x00000000) -/* When output polarity is not inverted, comparator output is high when - the non-inverting input is at a higher voltage than the inverting input */ -#define COMP_OUTPUTLEVEL_HIGH COMP_CSR_VALUE -/** - * @} - */ - -/** @defgroup COMP_TriggerMode COMP Trigger Mode - * @{ - */ -#define COMP_TRIGGERMODE_NONE ((uint32_t)0x00000000) /*!< No External Interrupt trigger detection */ -#define COMP_TRIGGERMODE_IT_RISING ((uint32_t)0x00000001) /*!< External Interrupt Mode with Rising edge trigger detection */ -#define COMP_TRIGGERMODE_IT_FALLING ((uint32_t)0x00000002) /*!< External Interrupt Mode with Falling edge trigger detection */ -#define COMP_TRIGGERMODE_IT_RISING_FALLING ((uint32_t)0x00000003) /*!< External Interrupt Mode with Rising/Falling edge trigger detection */ -#define COMP_TRIGGERMODE_EVENT_RISING ((uint32_t)0x00000010) /*!< Event Mode with Rising edge trigger detection */ -#define COMP_TRIGGERMODE_EVENT_FALLING ((uint32_t)0x00000020) /*!< Event Mode with Falling edge trigger detection */ -#define COMP_TRIGGERMODE_EVENT_RISING_FALLING ((uint32_t)0x00000030) /*!< Event Mode with Rising/Falling edge trigger detection */ -/** - * @} - */ - -/** @defgroup COMP_Flag COMP Flag - * @{ - */ -#define COMP_FLAG_LOCK COMP_CSR_LOCK /*!< Lock flag */ - -/** - * @} - */ - -/** - * @} - */ - -/* Exported macros -----------------------------------------------------------*/ -/** @defgroup COMP_Exported_Macros COMP Exported Macros - * @{ - */ - -/** @brief Reset COMP handle state. - * @param __HANDLE__ COMP handle. - * @retval None - */ -#define __HAL_COMP_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_COMP_STATE_RESET) - -/** - * @brief Enable the specified comparator. - * @param __HANDLE__ COMP handle. - * @retval None - */ -#define __HAL_COMP_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CSR, COMP_CSR_EN) - -/** - * @brief Disable the specified comparator. - * @param __HANDLE__ COMP handle. - * @retval None - */ -#define __HAL_COMP_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CSR, COMP_CSR_EN) - -/** - * @brief Lock the specified comparator configuration. - * @param __HANDLE__ COMP handle. - * @retval None - */ -#define __HAL_COMP_LOCK(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CSR, COMP_CSR_LOCK) - -/** - * @brief Enable the COMP1 EXTI line rising edge trigger. - * @retval None - */ -#define __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR1, COMP_EXTI_LINE_COMP1) - -/** - * @brief Disable the COMP1 EXTI line rising edge trigger. - * @retval None - */ -#define __HAL_COMP_COMP1_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR1, COMP_EXTI_LINE_COMP1) - -/** - * @brief Enable the COMP1 EXTI line falling edge trigger. - * @retval None - */ -#define __HAL_COMP_COMP1_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR1, COMP_EXTI_LINE_COMP1) - -/** - * @brief Disable the COMP1 EXTI line falling edge trigger. - * @retval None - */ -#define __HAL_COMP_COMP1_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR1, COMP_EXTI_LINE_COMP1) - -/** - * @brief Enable the COMP1 EXTI line rising & falling edge trigger. - * @retval None - */ -#define __HAL_COMP_COMP1_EXTI_ENABLE_RISING_FALLING_EDGE() do { \ - __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE(); \ - __HAL_COMP_COMP1_EXTI_ENABLE_FALLING_EDGE(); \ - } while(0) - -/** - * @brief Disable the COMP1 EXTI line rising & falling edge trigger. - * @retval None - */ -#define __HAL_COMP_COMP1_EXTI_DISABLE_RISING_FALLING_EDGE() do { \ - __HAL_COMP_COMP1_EXTI_DISABLE_RISING_EDGE(); \ - __HAL_COMP_COMP1_EXTI_DISABLE_FALLING_EDGE(); \ - } while(0) - -/** - * @brief Enable the COMP1 EXTI line in interrupt mode. - * @retval None - */ -#define __HAL_COMP_COMP1_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR1, COMP_EXTI_LINE_COMP1) - -/** - * @brief Disable the COMP1 EXTI line in interrupt mode. - * @retval None - */ -#define __HAL_COMP_COMP1_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR1, COMP_EXTI_LINE_COMP1) - -/** - * @brief Generate a software interrupt on the COMP1 EXTI line. - * @retval None - */ -#define __HAL_COMP_COMP1_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER1, COMP_EXTI_LINE_COMP1) - -/** - * @brief Enable the COMP1 EXTI Line in event mode. - * @retval None - */ -#define __HAL_COMP_COMP1_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR1, COMP_EXTI_LINE_COMP1) - -/** - * @brief Disable the COMP1 EXTI Line in event mode. - * @retval None - */ -#define __HAL_COMP_COMP1_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR1, COMP_EXTI_LINE_COMP1) - -/** - * @brief Check whether the COMP1 EXTI line flag is set or not. - * @retval RESET or SET - */ -#define __HAL_COMP_COMP1_EXTI_GET_FLAG() READ_BIT(EXTI->PR1, COMP_EXTI_LINE_COMP1) - -/** - * @brief Clear the COMP1 EXTI flag. - * @retval None - */ -#define __HAL_COMP_COMP1_EXTI_CLEAR_FLAG() WRITE_REG(EXTI->PR1, COMP_EXTI_LINE_COMP1) - -/** - * @brief Enable the COMP2 EXTI line rising edge trigger. - * @retval None - */ -#define __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR1, COMP_EXTI_LINE_COMP2) - -/** - * @brief Disable the COMP2 EXTI line rising edge trigger. - * @retval None - */ -#define __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR1, COMP_EXTI_LINE_COMP2) - -/** - * @brief Enable the COMP2 EXTI line falling edge trigger. - * @retval None - */ -#define __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR1, COMP_EXTI_LINE_COMP2) - -/** - * @brief Disable the COMP2 EXTI line falling edge trigger. - * @retval None - */ -#define __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR1, COMP_EXTI_LINE_COMP2) - -/** - * @brief Enable the COMP2 EXTI line rising & falling edge trigger. - * @retval None - */ -#define __HAL_COMP_COMP2_EXTI_ENABLE_RISING_FALLING_EDGE() do { \ - __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE(); \ - __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE(); \ - } while(0) - -/** - * @brief Disable the COMP2 EXTI line rising & falling edge trigger. - * @retval None - */ -#define __HAL_COMP_COMP2_EXTI_DISABLE_RISING_FALLING_EDGE() do { \ - __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE(); \ - __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE(); \ - } while(0) - -/** - * @brief Enable the COMP2 EXTI line in interrupt mode. - * @retval None - */ -#define __HAL_COMP_COMP2_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR1, COMP_EXTI_LINE_COMP2) - -/** - * @brief Disable the COMP2 EXTI line in interrupt mode. - * @retval None - */ -#define __HAL_COMP_COMP2_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR1, COMP_EXTI_LINE_COMP2) - -/** - * @brief Generate a software interrupt on the COMP2 EXTI line. - * @retval None - */ -#define __HAL_COMP_COMP2_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER1, COMP_EXTI_LINE_COMP2) - -/** - * @brief Enable the COMP2 EXTI Line in event mode. - * @retval None - */ -#define __HAL_COMP_COMP2_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR1, COMP_EXTI_LINE_COMP2) - -/** - * @brief Disable the COMP2 EXTI Line in event mode. - * @retval None - */ -#define __HAL_COMP_COMP2_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR1, COMP_EXTI_LINE_COMP2) - -/** - * @brief Check whether the COMP2 EXTI line flag is set or not. - * @retval RESET or SET - */ -#define __HAL_COMP_COMP2_EXTI_GET_FLAG() READ_BIT(EXTI->PR1, COMP_EXTI_LINE_COMP2) - -/** - * @brief Clear the COMP2 EXTI flag. - * @retval None - */ -#define __HAL_COMP_COMP2_EXTI_CLEAR_FLAG() WRITE_REG(EXTI->PR1, COMP_EXTI_LINE_COMP2) - -/** @brief Check whether the specified COMP flag is set or not. - * @param __HANDLE__ specifies the COMP Handle. - * @param __FLAG__ specifies the flag to check. - * This parameter can be one of the following values: - * @arg @ref COMP_FLAG_LOCK lock flag - * @retval The new state of __FLAG__ (TRUE or FALSE). - */ -#define __HAL_COMP_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->CSR & (__FLAG__)) == (__FLAG__)) - -/** - * @} - */ - -/* Exported functions --------------------------------------------------------*/ -/** @addtogroup COMP_Exported_Functions - * @{ - */ - -/** @addtogroup COMP_Exported_Functions_Group1 - * @{ - */ -/* Initialization and de-initialization functions **********************************/ -HAL_StatusTypeDef HAL_COMP_Init(COMP_HandleTypeDef *hcomp); -HAL_StatusTypeDef HAL_COMP_DeInit (COMP_HandleTypeDef *hcomp); -void HAL_COMP_MspInit(COMP_HandleTypeDef *hcomp); -void HAL_COMP_MspDeInit(COMP_HandleTypeDef *hcomp); -/** - * @} - */ - -/* IO operation functions *****************************************************/ -/** @addtogroup COMP_Exported_Functions_Group2 - * @{ - */ -HAL_StatusTypeDef HAL_COMP_Start(COMP_HandleTypeDef *hcomp); -HAL_StatusTypeDef HAL_COMP_Stop(COMP_HandleTypeDef *hcomp); -HAL_StatusTypeDef HAL_COMP_Start_IT(COMP_HandleTypeDef *hcomp); -HAL_StatusTypeDef HAL_COMP_Stop_IT(COMP_HandleTypeDef *hcomp); -void HAL_COMP_IRQHandler(COMP_HandleTypeDef *hcomp); -/* Callback in Interrupt mode */ -void HAL_COMP_TriggerCallback(COMP_HandleTypeDef *hcomp); -/** - * @} - */ - -/* Peripheral Control functions ************************************************/ -/** @addtogroup COMP_Exported_Functions_Group3 - * @{ - */ -HAL_StatusTypeDef HAL_COMP_Lock(COMP_HandleTypeDef *hcomp); -uint32_t HAL_COMP_GetOutputLevel(COMP_HandleTypeDef *hcomp); -/** - * @} - */ - -/* Peripheral State functions **************************************************/ -/** @addtogroup COMP_Exported_Functions_Group4 - * @{ - */ -HAL_COMP_StateTypeDef HAL_COMP_GetState(COMP_HandleTypeDef *hcomp); -/** - * @} - */ - -/** - * @} - */ - -/* Private types -------------------------------------------------------------*/ -/* Private constants ---------------------------------------------------------*/ -/** @defgroup COMP_Private_Constants COMP Private Constants - * @{ - */ -/** @defgroup COMP_ExtiLine COMP EXTI Lines - * @{ - */ -#define COMP_EXTI_LINE_COMP1 ((uint32_t)0x00200000) /*!< EXTI line 21 connected to COMP1 output */ -#define COMP_EXTI_LINE_COMP2 ((uint32_t)0x00400000) /*!< EXTI line 22 connected to COMP2 output */ -/** - * @} - */ - -/** - * @} - */ - -/* Private macros ------------------------------------------------------------*/ -/** @defgroup COMP_Private_Macros COMP Private Macros - * @{ - */ -/** @defgroup COMP_GET_EXTI_LINE COMP Private macros to get EXTI line associated with Comparators - * @{ - */ -/** - * @brief Get the specified EXTI line for a comparator instance. - * @param __INSTANCE__ specifies the COMP instance. - * @retval value of @ref COMP_ExtiLine - */ -#define COMP_GET_EXTI_LINE(__INSTANCE__) (((__INSTANCE__) == COMP1) ? COMP_EXTI_LINE_COMP1 : \ - COMP_EXTI_LINE_COMP2) -/** - * @} - */ - -/** @defgroup COMP_IS_COMP_Definitions COMP Private macros to check input parameters - * @{ - */ - -#define IS_COMP_INVERTINGINPUT(__INPUT__) (((__INPUT__) == COMP_INVERTINGINPUT_1_4VREFINT) || \ - ((__INPUT__) == COMP_INVERTINGINPUT_1_2VREFINT) || \ - ((__INPUT__) == COMP_INVERTINGINPUT_3_4VREFINT) || \ - ((__INPUT__) == COMP_INVERTINGINPUT_VREFINT) || \ - ((__INPUT__) == COMP_INVERTINGINPUT_DAC1) || \ - ((__INPUT__) == COMP_INVERTINGINPUT_DAC2) || \ - ((__INPUT__) == COMP_INVERTINGINPUT_IO1) || \ - ((__INPUT__) == COMP_INVERTINGINPUT_IO2)) - -#define IS_COMP_NONINVERTINGINPUT(__INPUT__) (((__INPUT__) == COMP_NONINVERTINGINPUT_IO1) || \ - ((__INPUT__) == COMP_NONINVERTINGINPUT_IO2)) - -#define IS_COMP_OUTPUTPOL(__POL__) (((__POL__) == COMP_OUTPUTPOL_NONINVERTED) || \ - ((__POL__) == COMP_OUTPUTPOL_INVERTED)) - -#define IS_COMP_MODE(__MODE__) (((__MODE__) == COMP_MODE_HIGHSPEED) || \ - ((__MODE__) == COMP_MODE_MEDIUMSPEED) || \ - ((__MODE__) == COMP_MODE_ULTRALOWPOWER)) - -#define IS_COMP_HYSTERESIS(__HYSTERESIS__) (((__HYSTERESIS__) == COMP_HYSTERESIS_NONE) || \ - ((__HYSTERESIS__) == COMP_HYSTERESIS_LOW) || \ - ((__HYSTERESIS__) == COMP_HYSTERESIS_MEDIUM) || \ - ((__HYSTERESIS__) == COMP_HYSTERESIS_HIGH)) - -#define IS_COMP_BLANKINGSRCE(__SOURCE__) (((__SOURCE__) == COMP_BLANKINGSRCE_NONE) || \ - ((__SOURCE__) == COMP_BLANKINGSRCE_TIM1OC5) || \ - ((__SOURCE__) == COMP_BLANKINGSRCE_TIM2OC3) || \ - ((__SOURCE__) == COMP_BLANKINGSRCE_TIM3OC3) || \ - ((__SOURCE__) == COMP_BLANKINGSRCE_TIM3OC4) || \ - ((__SOURCE__) == COMP_BLANKINGSRCE_TIM8OC5) || \ - ((__SOURCE__) == COMP_BLANKINGSRCE_TIM15OC1)) - -#define IS_COMP_BLANKINGSRCE_INSTANCE(__INSTANCE__, __BLANKINGSRCE__) \ - ((((__INSTANCE__) == COMP1) && \ - (((__BLANKINGSRCE__) == COMP_BLANKINGSRCE_NONE) || \ - ((__BLANKINGSRCE__) == COMP_BLANKINGSRCE_TIM1OC5) || \ - ((__BLANKINGSRCE__) == COMP_BLANKINGSRCE_TIM2OC3) || \ - ((__BLANKINGSRCE__) == COMP_BLANKINGSRCE_TIM3OC3))) \ - || \ - (((__INSTANCE__) == COMP2) && \ - (((__BLANKINGSRCE__) == COMP_BLANKINGSRCE_NONE) || \ - ((__BLANKINGSRCE__) == COMP_BLANKINGSRCE_TIM3OC4) || \ - ((__BLANKINGSRCE__) == COMP_BLANKINGSRCE_TIM8OC5) || \ - ((__BLANKINGSRCE__) == COMP_BLANKINGSRCE_TIM15OC1)))) - -#define IS_COMP_WINDOWMODE(__WINDOWMODE__) (((__WINDOWMODE__) == COMP_WINDOWMODE_DISABLE) || \ - ((__WINDOWMODE__) == COMP_WINDOWMODE_ENABLE)) - -#define IS_COMP_TRIGGERMODE(__MODE__) (((__MODE__) == COMP_TRIGGERMODE_NONE) || \ - ((__MODE__) == COMP_TRIGGERMODE_IT_RISING) || \ - ((__MODE__) == COMP_TRIGGERMODE_IT_FALLING) || \ - ((__MODE__) == COMP_TRIGGERMODE_IT_RISING_FALLING) || \ - ((__MODE__) == COMP_TRIGGERMODE_EVENT_RISING) || \ - ((__MODE__) == COMP_TRIGGERMODE_EVENT_FALLING) || \ - ((__MODE__) == COMP_TRIGGERMODE_EVENT_RISING_FALLING)) - -/** - * @} - */ - -/** - * @} - */ - -/* Private functions ---------------------------------------------------------*/ - -/** - * @} - */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32L4xx_HAL_COMP_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ -
--- a/Inc/stm32l4xx_hal_conf_template.h Thu Nov 12 20:49:49 2015 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,373 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_conf.h - * @author MCD Application Team - * @version V1.1.0 - * @date 16-September-2015 - * @brief HAL configuration template file. - * This file should be copied to the application folder and renamed - * to stm32l4xx_hal_conf.h. - ****************************************************************************** - * @attention - * - * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_CONF_H -#define __STM32L4xx_HAL_CONF_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ - -/* ########################## Module Selection ############################## */ -/** - * @brief This is the list of modules to be used in the HAL driver - */ -#define HAL_MODULE_ENABLED -#define HAL_ADC_MODULE_ENABLED -#define HAL_CAN_MODULE_ENABLED -#define HAL_COMP_MODULE_ENABLED -#define HAL_CORTEX_MODULE_ENABLED -#define HAL_CRC_MODULE_ENABLED -#define HAL_CRYP_MODULE_ENABLED -#define HAL_DAC_MODULE_ENABLED -#define HAL_DFSDM_MODULE_ENABLED -#define HAL_DMA_MODULE_ENABLED -#define HAL_FIREWALL_MODULE_ENABLED -#define HAL_FLASH_MODULE_ENABLED -#define HAL_HCD_MODULE_ENABLED -#define HAL_NAND_MODULE_ENABLED -#define HAL_NOR_MODULE_ENABLED -#define HAL_SRAM_MODULE_ENABLED -#define HAL_GPIO_MODULE_ENABLED -#define HAL_I2C_MODULE_ENABLED -#define HAL_IRDA_MODULE_ENABLED -#define HAL_IWDG_MODULE_ENABLED -#define HAL_LCD_MODULE_ENABLED -#define HAL_LPTIM_MODULE_ENABLED -#define HAL_OPAMP_MODULE_ENABLED -#define HAL_PCD_MODULE_ENABLED -#define HAL_PWR_MODULE_ENABLED -#define HAL_QSPI_MODULE_ENABLED -#define HAL_RCC_MODULE_ENABLED -#define HAL_RNG_MODULE_ENABLED -#define HAL_RTC_MODULE_ENABLED -#define HAL_SAI_MODULE_ENABLED -#define HAL_SD_MODULE_ENABLED -#define HAL_SMARTCARD_MODULE_ENABLED -#define HAL_SMBUS_MODULE_ENABLED -#define HAL_SPI_MODULE_ENABLED -#define HAL_SWPMI_MODULE_ENABLED -#define HAL_TIM_MODULE_ENABLED -#define HAL_TSC_MODULE_ENABLED -#define HAL_UART_MODULE_ENABLED -#define HAL_USART_MODULE_ENABLED -#define HAL_WWDG_MODULE_ENABLED - - -/* ########################## Oscillator Values adaptation ####################*/ -/** - * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSE is used as system clock source, directly or through the PLL). - */ -#if !defined (HSE_VALUE) - #define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */ -#endif /* HSE_VALUE */ - -#if !defined (HSE_STARTUP_TIMEOUT) - #define HSE_STARTUP_TIMEOUT ((uint32_t)5000) /*!< Time out for HSE start up, in ms */ -#endif /* HSE_STARTUP_TIMEOUT */ - -/** - * @brief Internal Multiple Speed oscillator (MSI) default value. - * This value is the default MSI range value after Reset. - */ -#if !defined (MSI_VALUE) - #define MSI_VALUE ((uint32_t)4000000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* MSI_VALUE */ - -/** - * @brief Internal High Speed oscillator (HSI) value. - * This value is used by the RCC HAL module to compute the system frequency - * (when HSI is used as system clock source, directly or through the PLL). - */ -#if !defined (HSI_VALUE) - #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/ -#endif /* HSI_VALUE */ - -/** - * @brief Internal Low Speed oscillator (LSI) value. - */ -#if !defined (LSI_VALUE) - #define LSI_VALUE ((uint32_t)32000) /*!< LSI Typical Value in Hz*/ -#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz - The real value may vary depending on the variations - in voltage and temperature.*/ -/** - * @brief External Low Speed oscillator (LSE) value. - * This value is used by the UART, RTC HAL module to compute the system frequency - */ -#if !defined (LSE_VALUE) - #define LSE_VALUE ((uint32_t)32768) /*!< Value of the External oscillator in Hz*/ -#endif /* LSE_VALUE */ - -#if !defined (LSE_STARTUP_TIMEOUT) - #define LSE_STARTUP_TIMEOUT ((uint32_t)5000) /*!< Time out for LSE start up, in ms */ -#endif /* HSE_STARTUP_TIMEOUT */ - -/** - * @brief External clock source for SAI1 peripheral - * This value is used by the RCC HAL module to compute the SAI1 & SAI2 clock source - * frequency. - */ -#if !defined (EXTERNAL_SAI1_CLOCK_VALUE) - #define EXTERNAL_SAI1_CLOCK_VALUE ((uint32_t)48000) /*!< Value of the SAI1 External clock source in Hz*/ -#endif /* EXTERNAL_SAI1_CLOCK_VALUE */ - -/** - * @brief External clock source for SAI2 peripheral - * This value is used by the RCC HAL module to compute the SAI1 & SAI2 clock source - * frequency. - */ -#if !defined (EXTERNAL_SAI2_CLOCK_VALUE) - #define EXTERNAL_SAI2_CLOCK_VALUE ((uint32_t)48000) /*!< Value of the SAI2 External clock source in Hz*/ -#endif /* EXTERNAL_SAI2_CLOCK_VALUE */ - -/* Tip: To avoid modifying this file each time you need to use different HSE, - === you can define the HSE value in your toolchain compiler preprocessor. */ - -/* ########################### System Configuration ######################### */ -/** - * @brief This is the HAL system configuration section - */ -#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY ((uint32_t)0x0F) /*!< tick interrupt priority */ -#define USE_RTOS 0 -#define PREFETCH_ENABLE 1 -#define INSTRUCTION_CACHE_ENABLE 1 -#define DATA_CACHE_ENABLE 1 - -/* ########################## Assert Selection ############################## */ -/** - * @brief Uncomment the line below to expanse the "assert_param" macro in the - * HAL drivers code - */ -/* #define USE_FULL_ASSERT 1 */ - -/* Includes ------------------------------------------------------------------*/ -/** - * @brief Include module's header file - */ - -#ifdef HAL_RCC_MODULE_ENABLED - #include "stm32l4xx_hal_rcc.h" -#endif /* HAL_RCC_MODULE_ENABLED */ - -#ifdef HAL_GPIO_MODULE_ENABLED - #include "stm32l4xx_hal_gpio.h" -#endif /* HAL_GPIO_MODULE_ENABLED */ - -#ifdef HAL_DMA_MODULE_ENABLED - #include "stm32l4xx_hal_dma.h" -#endif /* HAL_DMA_MODULE_ENABLED */ - -#ifdef HAL_DFSDM_MODULE_ENABLED - #include "stm32l4xx_hal_dfsdm.h" -#endif /* HAL_DFSDM_MODULE_ENABLED */ - -#ifdef HAL_CORTEX_MODULE_ENABLED - #include "stm32l4xx_hal_cortex.h" -#endif /* HAL_CORTEX_MODULE_ENABLED */ - -#ifdef HAL_ADC_MODULE_ENABLED - #include "stm32l4xx_hal_adc.h" -#endif /* HAL_ADC_MODULE_ENABLED */ - -#ifdef HAL_CAN_MODULE_ENABLED - #include "stm32l4xx_hal_can.h" -#endif /* HAL_CAN_MODULE_ENABLED */ - -#ifdef HAL_COMP_MODULE_ENABLED - #include "stm32l4xx_hal_comp.h" -#endif /* HAL_COMP_MODULE_ENABLED */ - -#ifdef HAL_CRC_MODULE_ENABLED - #include "stm32l4xx_hal_crc.h" -#endif /* HAL_CRC_MODULE_ENABLED */ - -#ifdef HAL_CRYP_MODULE_ENABLED - #include "stm32l4xx_hal_cryp.h" -#endif /* HAL_CRYP_MODULE_ENABLED */ - -#ifdef HAL_DAC_MODULE_ENABLED - #include "stm32l4xx_hal_dac.h" -#endif /* HAL_DAC_MODULE_ENABLED */ - -#ifdef HAL_FIREWALL_MODULE_ENABLED - #include "stm32l4xx_hal_firewall.h" -#endif /* HAL_FIREWALL_MODULE_ENABLED */ - -#ifdef HAL_FLASH_MODULE_ENABLED - #include "stm32l4xx_hal_flash.h" -#endif /* HAL_FLASH_MODULE_ENABLED */ - -#ifdef HAL_SRAM_MODULE_ENABLED - #include "stm32l4xx_hal_sram.h" -#endif /* HAL_SRAM_MODULE_ENABLED */ - -#ifdef HAL_NOR_MODULE_ENABLED - #include "stm32l4xx_hal_nor.h" -#endif /* HAL_NOR_MODULE_ENABLED */ - -#ifdef HAL_NAND_MODULE_ENABLED - #include "stm32l4xx_hal_nand.h" -#endif /* HAL_NAND_MODULE_ENABLED */ - -#ifdef HAL_I2C_MODULE_ENABLED - #include "stm32l4xx_hal_i2c.h" -#endif /* HAL_I2C_MODULE_ENABLED */ - -#ifdef HAL_IWDG_MODULE_ENABLED - #include "stm32l4xx_hal_iwdg.h" -#endif /* HAL_IWDG_MODULE_ENABLED */ - -#ifdef HAL_LCD_MODULE_ENABLED - #include "stm32l4xx_hal_lcd.h" -#endif /* HAL_LCD_MODULE_ENABLED */ - -#ifdef HAL_LPTIM_MODULE_ENABLED -#include "stm32l4xx_hal_lptim.h" -#endif /* HAL_LPTIM_MODULE_ENABLED */ - -#ifdef HAL_OPAMP_MODULE_ENABLED -#include "stm32l4xx_hal_opamp.h" -#endif /* HAL_OPAMP_MODULE_ENABLED */ - -#ifdef HAL_PWR_MODULE_ENABLED - #include "stm32l4xx_hal_pwr.h" -#endif /* HAL_PWR_MODULE_ENABLED */ - -#ifdef HAL_QSPI_MODULE_ENABLED - #include "stm32l4xx_hal_qspi.h" -#endif /* HAL_QSPI_MODULE_ENABLED */ - -#ifdef HAL_RNG_MODULE_ENABLED - #include "stm32l4xx_hal_rng.h" -#endif /* HAL_RNG_MODULE_ENABLED */ - -#ifdef HAL_RTC_MODULE_ENABLED - #include "stm32l4xx_hal_rtc.h" -#endif /* HAL_RTC_MODULE_ENABLED */ - -#ifdef HAL_SAI_MODULE_ENABLED - #include "stm32l4xx_hal_sai.h" -#endif /* HAL_SAI_MODULE_ENABLED */ - -#ifdef HAL_SD_MODULE_ENABLED - #include "stm32l4xx_hal_sd.h" -#endif /* HAL_SD_MODULE_ENABLED */ - -#ifdef HAL_SMBUS_MODULE_ENABLED - #include "stm32l4xx_hal_smbus.h" -#endif /* HAL_SMBUS_MODULE_ENABLED */ - -#ifdef HAL_SPI_MODULE_ENABLED - #include "stm32l4xx_hal_spi.h" -#endif /* HAL_SPI_MODULE_ENABLED */ - -#ifdef HAL_SWPMI_MODULE_ENABLED - #include "stm32l4xx_hal_swpmi.h" -#endif /* HAL_SWPMI_MODULE_ENABLED */ - -#ifdef HAL_TIM_MODULE_ENABLED - #include "stm32l4xx_hal_tim.h" -#endif /* HAL_TIM_MODULE_ENABLED */ - -#ifdef HAL_TSC_MODULE_ENABLED - #include "stm32l4xx_hal_tsc.h" -#endif /* HAL_TSC_MODULE_ENABLED */ - -#ifdef HAL_UART_MODULE_ENABLED - #include "stm32l4xx_hal_uart.h" -#endif /* HAL_UART_MODULE_ENABLED */ - -#ifdef HAL_USART_MODULE_ENABLED - #include "stm32l4xx_hal_usart.h" -#endif /* HAL_USART_MODULE_ENABLED */ - -#ifdef HAL_IRDA_MODULE_ENABLED - #include "stm32l4xx_hal_irda.h" -#endif /* HAL_IRDA_MODULE_ENABLED */ - -#ifdef HAL_SMARTCARD_MODULE_ENABLED - #include "stm32l4xx_hal_smartcard.h" -#endif /* HAL_SMARTCARD_MODULE_ENABLED */ - -#ifdef HAL_WWDG_MODULE_ENABLED - #include "stm32l4xx_hal_wwdg.h" -#endif /* HAL_WWDG_MODULE_ENABLED */ - -#ifdef HAL_PCD_MODULE_ENABLED - #include "stm32l4xx_hal_pcd.h" -#endif /* HAL_PCD_MODULE_ENABLED */ - -#ifdef HAL_HCD_MODULE_ENABLED - #include "stm32l4xx_hal_hcd.h" -#endif /* HAL_HCD_MODULE_ENABLED */ - -/* Exported macro ------------------------------------------------------------*/ -#ifdef USE_FULL_ASSERT -/** - * @brief The assert_param macro is used for function's parameters check. - * @param expr: If expr is false, it calls assert_failed function - * which reports the name of the source file and the source - * line number of the call that failed. - * If expr is true, it returns no value. - * @retval None - */ - #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) -/* Exported functions ------------------------------------------------------- */ - void assert_failed(uint8_t* file, uint32_t line); -#else - #define assert_param(expr) ((void)0) -#endif /* USE_FULL_ASSERT */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32L4xx_HAL_CONF_H */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ -
--- a/Inc/stm32l4xx_hal_crc.h Thu Nov 12 20:49:49 2015 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,369 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_crc.h - * @author MCD Application Team - * @version V1.1.0 - * @date 16-September-2015 - * @brief Header file of CRC HAL module. - ****************************************************************************** - * @attention - * - * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_CRC_H -#define __STM32L4xx_HAL_CRC_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal_def.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @addtogroup CRC - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ - -/** @defgroup CRC_Exported_Types CRC Exported Types - * @{ - */ - -/** - * @brief CRC HAL State Structure definition - */ -typedef enum -{ - HAL_CRC_STATE_RESET = 0x00, /*!< CRC not yet initialized or disabled */ - HAL_CRC_STATE_READY = 0x01, /*!< CRC initialized and ready for use */ - HAL_CRC_STATE_BUSY = 0x02, /*!< CRC internal process is ongoing */ - HAL_CRC_STATE_TIMEOUT = 0x03, /*!< CRC timeout state */ - HAL_CRC_STATE_ERROR = 0x04 /*!< CRC error state */ -}HAL_CRC_StateTypeDef; - - - -/** - * @brief CRC Init Structure definition - */ -typedef struct -{ - uint8_t DefaultPolynomialUse; /*!< This parameter is a value of @ref CRC_Default_Polynomial and indicates if default polynomial is used. - If set to DEFAULT_POLYNOMIAL_ENABLE, resort to default - X^32 + X^26 + X^23 + X^22 + X^16 + X^12 + X^11 + X^10 +X^8 + X^7 + X^5 + X^4 + X^2+ X +1. - In that case, there is no need to set GeneratingPolynomial field. - If otherwise set to DEFAULT_POLYNOMIAL_DISABLE, GeneratingPolynomial and CRCLength fields must be set. */ - - uint8_t DefaultInitValueUse; /*!< This parameter is a value of @ref CRC_Default_InitValue_Use and indicates if default init value is used. - If set to DEFAULT_INIT_VALUE_ENABLE, resort to default - 0xFFFFFFFF value. In that case, there is no need to set InitValue field. - If otherwise set to DEFAULT_INIT_VALUE_DISABLE, InitValue field must be set. */ - - uint32_t GeneratingPolynomial; /*!< Set CRC generating polynomial as a 7, 8, 16 or 32-bit long value for a polynomial degree - respectively equal to 7, 8, 16 or 32. This field is written in normal representation, - e.g., for a polynomial of degree 7, X^7 + X^6 + X^5 + X^2 + 1 is written 0x65. - No need to specify it if DefaultPolynomialUse is set to DEFAULT_POLYNOMIAL_ENABLE. */ - - uint32_t CRCLength; /*!< This parameter is a value of @ref CRC_Polynomial_Sizes and indicates CRC length. - Value can be either one of - @arg CRC_POLYLENGTH_32B (32-bit CRC), - @arg CRC_POLYLENGTH_16B (16-bit CRC), - @arg CRC_POLYLENGTH_8B (8-bit CRC), - @arg CRC_POLYLENGTH_7B (7-bit CRC). */ - - uint32_t InitValue; /*!< Init value to initiate CRC computation. No need to specify it if DefaultInitValueUse - is set to DEFAULT_INIT_VALUE_ENABLE. */ - - uint32_t InputDataInversionMode; /*!< This parameter is a value of @ref CRCEx_Input_Data_Inversion and specifies input data inversion mode. - Can be either one of the following values - @arg CRC_INPUTDATA_INVERSION_NONE, no input data inversion - @arg CRC_INPUTDATA_INVERSION_BYTE, byte-wise inversion, 0x1A2B3C4D becomes 0x58D43CB2 - @arg CRC_INPUTDATA_INVERSION_HALFWORD, halfword-wise inversion, 0x1A2B3C4D becomes 0xD458B23C - @arg CRC_INPUTDATA_INVERSION_WORD, word-wise inversion, 0x1A2B3C4D becomes 0xB23CD458 */ - - uint32_t OutputDataInversionMode; /*!< This parameter is a value of @ref CRCEx_Output_Data_Inversion and specifies output data (i.e. CRC) inversion mode. - Can be either - @arg CRC_OUTPUTDATA_INVERSION_DISABLE: no CRC inversion, - @arg CRC_OUTPUTDATA_INVERSION_ENABLE: CRC 0x11223344 is converted into 0x22CC4488 */ -}CRC_InitTypeDef; - - - -/** - * @brief CRC Handle Structure definition - */ -typedef struct -{ - CRC_TypeDef *Instance; /*!< Register base address */ - - CRC_InitTypeDef Init; /*!< CRC configuration parameters */ - - HAL_LockTypeDef Lock; /*!< CRC Locking object */ - - __IO HAL_CRC_StateTypeDef State; /*!< CRC communication state */ - - uint32_t InputDataFormat; /*!< This parameter is a value of @ref CRC_Input_Buffer_Format and specifies input data format. - Can be either - @arg CRC_INPUTDATA_FORMAT_BYTES, input data is a stream of bytes (8-bit data) - @arg CRC_INPUTDATA_FORMAT_HALFWORDS, input data is a stream of half-words (16-bit data) - @arg CRC_INPUTDATA_FORMAT_WORDS, input data is a stream of words (32-bit data) - - Note that constant CRC_INPUT_FORMAT_UNDEFINED is defined but an initialization error - must occur if InputBufferFormat is not one of the three values listed above */ -}CRC_HandleTypeDef; - - -/** - * @} - */ - -/* Exported constants --------------------------------------------------------*/ -/** @defgroup CRC_Exported_Constants CRC Exported Constants - * @{ - */ - -/** @defgroup CRC_Default_Polynomial_Value Default CRC generating polynomial - * @{ - */ -#define DEFAULT_CRC32_POLY 0x04C11DB7 /*!< X^32 + X^26 + X^23 + X^22 + X^16 + X^12 + X^11 + X^10 +X^8 + X^7 + X^5 + X^4 + X^2+ X +1 */ -/** - * @} - */ - -/** @defgroup CRC_Default_InitValue Default CRC computation initialization value - * @{ - */ -#define DEFAULT_CRC_INITVALUE 0xFFFFFFFF /*!< Initial CRC default value */ -/** - * @} - */ - -/** @defgroup CRC_Default_Polynomial Indicates whether or not default polynomial is used - * @{ - */ -#define DEFAULT_POLYNOMIAL_ENABLE ((uint8_t)0x00) /*!< Enable default generating polynomial 0x04C11DB7 */ -#define DEFAULT_POLYNOMIAL_DISABLE ((uint8_t)0x01) /*!< Disable default generating polynomial 0x04C11DB7 */ -/** - * @} - */ - -/** @defgroup CRC_Default_InitValue_Use Indicates whether or not default init value is used - * @{ - */ -#define DEFAULT_INIT_VALUE_ENABLE ((uint8_t)0x00) /*!< Enable initial CRC default value */ -#define DEFAULT_INIT_VALUE_DISABLE ((uint8_t)0x01) /*!< Disable initial CRC default value */ -/** - * @} - */ - -/** @defgroup CRC_Polynomial_Sizes Polynomial sizes to configure the IP - * @{ - */ -#define CRC_POLYLENGTH_32B ((uint32_t)0x00000000) /*!< Resort to a 32-bit long generating polynomial */ -#define CRC_POLYLENGTH_16B ((uint32_t)CRC_CR_POLYSIZE_0) /*!< Resort to a 16-bit long generating polynomial */ -#define CRC_POLYLENGTH_8B ((uint32_t)CRC_CR_POLYSIZE_1) /*!< Resort to a 8-bit long generating polynomial */ -#define CRC_POLYLENGTH_7B ((uint32_t)CRC_CR_POLYSIZE) /*!< Resort to a 7-bit long generating polynomial */ -/** - * @} - */ - -/** @defgroup CRC_Polynomial_Size_Definitions CRC polynomial possible sizes actual definitions - * @{ - */ -#define HAL_CRC_LENGTH_32B 32 /*!< 32-bit long CRC */ -#define HAL_CRC_LENGTH_16B 16 /*!< 16-bit long CRC */ -#define HAL_CRC_LENGTH_8B 8 /*!< 8-bit long CRC */ -#define HAL_CRC_LENGTH_7B 7 /*!< 7-bit long CRC */ -/** - * @} - */ - -/** @defgroup CRC_Input_Buffer_Format Input Buffer Format - * @{ - */ -/* WARNING: CRC_INPUT_FORMAT_UNDEFINED is created for reference purposes but - * an error is triggered in HAL_CRC_Init() if InputDataFormat field is set - * to CRC_INPUT_FORMAT_UNDEFINED: the format MUST be defined by the user for - * the CRC APIs to provide a correct result */ -#define CRC_INPUTDATA_FORMAT_UNDEFINED ((uint32_t)0x00000000) /*!< Undefined input data format */ -#define CRC_INPUTDATA_FORMAT_BYTES ((uint32_t)0x00000001) /*!< Input data in byte format */ -#define CRC_INPUTDATA_FORMAT_HALFWORDS ((uint32_t)0x00000002) /*!< Input data in half-word format */ -#define CRC_INPUTDATA_FORMAT_WORDS ((uint32_t)0x00000003) /*!< Input data in word format */ -/** - * @} - */ - -/** @defgroup CRC_Aliases CRC API aliases - * @{ - */ -#define HAL_CRC_Input_Data_Reverse HAL_CRCEx_Input_Data_Reverse /*!< Aliased to HAL_CRCEx_Input_Data_Reverse for inter STM32 series compatibility */ -#define HAL_CRC_Output_Data_Reverse HAL_CRCEx_Output_Data_Reverse /*!< Aliased to HAL_CRCEx_Output_Data_Reverse for inter STM32 series compatibility */ -/** - * @} - */ - -/** - * @} - */ - - -/* Exported macros -----------------------------------------------------------*/ -/** @defgroup CRC_Exported_Macros CRC Exported Macros - * @{ - */ - -/** @brief Reset CRC handle state. - * @param __HANDLE__: CRC handle. - * @retval None - */ -#define __HAL_CRC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_CRC_STATE_RESET) - -/** - * @brief Reset CRC Data Register. - * @param __HANDLE__: CRC handle - * @retval None - */ -#define __HAL_CRC_DR_RESET(__HANDLE__) ((__HANDLE__)->Instance->CR |= CRC_CR_RESET) - -/** - * @brief Set CRC INIT non-default value - * @param __HANDLE__: CRC handle - * @param __INIT__: 32-bit initial value - * @retval None - */ -#define __HAL_CRC_INITIALCRCVALUE_CONFIG(__HANDLE__, __INIT__) ((__HANDLE__)->Instance->INIT = (__INIT__)) - -/** - * @brief Store a 8-bit data in the Independent Data(ID) register. - * @param __HANDLE__: CRC handle - * @param __VALUE__: 8-bit value to be stored in the ID register - * @retval None - */ -#define __HAL_CRC_SET_IDR(__HANDLE__, __VALUE__) (WRITE_REG((__HANDLE__)->Instance->IDR, (__VALUE__))) - -/** - * @brief Return the 8-bit data stored in the Independent Data(ID) register. - * @param __HANDLE__: CRC handle - * @retval 8-bit value of the ID register - */ -#define __HAL_CRC_GET_IDR(__HANDLE__) (((__HANDLE__)->Instance->IDR) & CRC_IDR_IDR) -/** - * @} - */ - - -/* Private macros --------------------------------------------------------*/ -/** @addtogroup CRC_Private_Macros CRC Private Macros - * @{ - */ - -#define IS_DEFAULT_POLYNOMIAL(DEFAULT) (((DEFAULT) == DEFAULT_POLYNOMIAL_ENABLE) || \ - ((DEFAULT) == DEFAULT_POLYNOMIAL_DISABLE)) - - -#define IS_DEFAULT_INIT_VALUE(VALUE) (((VALUE) == DEFAULT_INIT_VALUE_ENABLE) || \ - ((VALUE) == DEFAULT_INIT_VALUE_DISABLE)) - -#define IS_CRC_POL_LENGTH(LENGTH) (((LENGTH) == CRC_POLYLENGTH_32B) || \ - ((LENGTH) == CRC_POLYLENGTH_16B) || \ - ((LENGTH) == CRC_POLYLENGTH_8B) || \ - ((LENGTH) == CRC_POLYLENGTH_7B)) - -#define IS_CRC_INPUTDATA_FORMAT(FORMAT) (((FORMAT) == CRC_INPUTDATA_FORMAT_BYTES) || \ - ((FORMAT) == CRC_INPUTDATA_FORMAT_HALFWORDS) || \ - ((FORMAT) == CRC_INPUTDATA_FORMAT_WORDS)) - -/** - * @} - */ - -/* Include CRC HAL Extended module */ -#include "stm32l4xx_hal_crc_ex.h" - -/* Exported functions --------------------------------------------------------*/ -/** @defgroup CRC_Exported_Functions CRC Exported Functions - * @{ - */ - -/* Initialization and de-initialization functions ****************************/ -/** @defgroup CRC_Exported_Functions_Group1 Initialization and de-initialization functions - * @{ - */ -HAL_StatusTypeDef HAL_CRC_Init(CRC_HandleTypeDef *hcrc); -HAL_StatusTypeDef HAL_CRC_DeInit (CRC_HandleTypeDef *hcrc); -void HAL_CRC_MspInit(CRC_HandleTypeDef *hcrc); -void HAL_CRC_MspDeInit(CRC_HandleTypeDef *hcrc); -/** - * @} - */ - -/* Peripheral Control functions ***********************************************/ -/** @defgroup CRC_Exported_Functions_Group2 Peripheral Control functions - * @{ - */ -uint32_t HAL_CRC_Accumulate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength); -uint32_t HAL_CRC_Calculate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength); -/** - * @} - */ - -/* Peripheral State and Error functions ***************************************/ -/** @defgroup CRC_Exported_Functions_Group3 Peripheral State functions - * @{ - */ -HAL_CRC_StateTypeDef HAL_CRC_GetState(CRC_HandleTypeDef *hcrc); -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32L4xx_HAL_CRC_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ -
--- a/Inc/stm32l4xx_hal_crc_ex.h Thu Nov 12 20:49:49 2015 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,174 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_crc_ex.h - * @author MCD Application Team - * @version V1.1.0 - * @date 16-September-2015 - * @brief Header file of CRC HAL extended module. - ****************************************************************************** - * @attention - * - * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_CRC_EX_H -#define __STM32L4xx_HAL_CRC_EX_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal_def.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @addtogroup CRCEx - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ -/** @defgroup CRCEx_Exported_Constants CRCEx Exported Constants - * @{ - */ - -/** @defgroup CRCEx_Input_Data_Inversion Input Data Inversion Modes - * @{ - */ -#define CRC_INPUTDATA_INVERSION_NONE ((uint32_t)0x00000000) /*!< No input data inversion */ -#define CRC_INPUTDATA_INVERSION_BYTE ((uint32_t)CRC_CR_REV_IN_0) /*!< Byte-wise input data inversion */ -#define CRC_INPUTDATA_INVERSION_HALFWORD ((uint32_t)CRC_CR_REV_IN_1) /*!< HalfWord-wise input data inversion */ -#define CRC_INPUTDATA_INVERSION_WORD ((uint32_t)CRC_CR_REV_IN) /*!< Word-wise input data inversion */ -/** - * @} - */ - -/** @defgroup CRCEx_Output_Data_Inversion Output Data Inversion Modes - * @{ - */ -#define CRC_OUTPUTDATA_INVERSION_DISABLE ((uint32_t)0x00000000) /*!< No output data inversion */ -#define CRC_OUTPUTDATA_INVERSION_ENABLE ((uint32_t)CRC_CR_REV_OUT) /*!< Bit-wise output data inversion */ -/** - * @} - */ - -/** - * @} - */ - -/* Exported macro ------------------------------------------------------------*/ -/** @defgroup CRCEx_Exported_Macros CRCEx Exported Macros - * @{ - */ - -/** - * @brief Set CRC output reversal - * @param __HANDLE__: CRC handle - * @retval None - */ -#define __HAL_CRC_OUTPUTREVERSAL_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= CRC_CR_REV_OUT) - -/** - * @brief Unset CRC output reversal - * @param __HANDLE__: CRC handle - * @retval None - */ -#define __HAL_CRC_OUTPUTREVERSAL_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(CRC_CR_REV_OUT)) - -/** - * @brief Set CRC non-default polynomial - * @param __HANDLE__: CRC handle - * @param __POLYNOMIAL__: 7, 8, 16 or 32-bit polynomial - * @retval None - */ -#define __HAL_CRC_POLYNOMIAL_CONFIG(__HANDLE__, __POLYNOMIAL__) ((__HANDLE__)->Instance->POL = (__POLYNOMIAL__)) - -/** - * @} - */ - -/* Private macros --------------------------------------------------------*/ -/** @addtogroup CRCEx_Private_Macros CRCEx Private Macros - * @{ - */ - -#define IS_CRC_INPUTDATA_INVERSION_MODE(MODE) (((MODE) == CRC_INPUTDATA_INVERSION_NONE) || \ - ((MODE) == CRC_INPUTDATA_INVERSION_BYTE) || \ - ((MODE) == CRC_INPUTDATA_INVERSION_HALFWORD) || \ - ((MODE) == CRC_INPUTDATA_INVERSION_WORD)) - - -#define IS_CRC_OUTPUTDATA_INVERSION_MODE(MODE) (((MODE) == CRC_OUTPUTDATA_INVERSION_DISABLE) || \ - ((MODE) == CRC_OUTPUTDATA_INVERSION_ENABLE)) - -/** - * @} - */ - -/* Exported functions --------------------------------------------------------*/ - -/** @addtogroup CRCEx_Exported_Functions CRC Extended Exported Functions - * @{ - */ - -/** @addtogroup CRCEx_Group1 Extended Initialization/de-initialization functions - * @{ - */ - -/* Initialization and de-initialization functions ****************************/ -HAL_StatusTypeDef HAL_CRCEx_Polynomial_Set(CRC_HandleTypeDef *hcrc, uint32_t Pol, uint32_t PolyLength); -HAL_StatusTypeDef HAL_CRCEx_Input_Data_Reverse(CRC_HandleTypeDef *hcrc, uint32_t InputReverseMode); -HAL_StatusTypeDef HAL_CRCEx_Output_Data_Reverse(CRC_HandleTypeDef *hcrc, uint32_t OutputReverseMode); - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32L4xx_HAL_CRC_EX_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ -
--- a/Inc/stm32l4xx_hal_cryp.h Thu Nov 12 20:49:49 2015 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,667 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_cryp.h - * @author MCD Application Team - * @version V1.1.0 - * @date 16-September-2015 - * @brief Header file of CRYP HAL module. - ****************************************************************************** - * @attention - * - * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_CRYP_H -#define __STM32L4xx_HAL_CRYP_H - -#ifdef __cplusplus - extern "C" { -#endif - -#if defined(STM32L485xx) || defined(STM32L486xx) - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal_def.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @addtogroup CRYP - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ -/** @defgroup CRYP_Exported_Types CRYP Exported Types - * @{ - */ - -/** - * @brief CRYP Configuration Structure definition - */ -typedef struct -{ - uint32_t DataType; /*!< 32-bit data, 16-bit data, 8-bit data or 1-bit string. - This parameter can be a value of @ref CRYP_Data_Type */ - - uint32_t KeySize; /*!< 128 or 256-bit key length. - This parameter can be a value of @ref CRYP_Key_Size */ - - uint32_t OperatingMode; /*!< AES operating mode. - This parameter can be a value of @ref CRYP_AES_OperatingMode */ - - uint32_t ChainingMode; /*!< AES chaining mode. - This parameter can be a value of @ref CRYP_AES_ChainingMode */ - - uint32_t KeyWriteFlag; /*!< Allows to bypass or not key write-up before decryption. - This parameter can be a value of @ref CRYP_Key_Write */ - - uint32_t GCMCMACPhase; /*!< Indicates the processing phase of the Galois Counter Mode (GCM), - Galois Message Authentication Code (GMAC) or Cipher Message - Authentication Code (CMAC) mode. - This parameter can be a value of @ref CRYP_GCM_CMAC_Phase */ - - uint8_t* pKey; /*!< Encryption/Decryption Key */ - - uint8_t* pInitVect; /*!< Initialization Vector used for CTR, CBC, GCM/GMAC and CMAC modes */ - - uint8_t* Header; /*!< Header used in GCM/GMAC and CMAC modes */ - - uint64_t HeaderSize; /*!< Header size in bytes */ - -}CRYP_InitTypeDef; - -/** - * @brief HAL CRYP State structures definition - */ -typedef enum -{ - HAL_CRYP_STATE_RESET = 0x00, /*!< CRYP not yet initialized or disabled */ - HAL_CRYP_STATE_READY = 0x01, /*!< CRYP initialized and ready for use */ - HAL_CRYP_STATE_BUSY = 0x02, /*!< CRYP internal processing is ongoing */ - HAL_CRYP_STATE_TIMEOUT = 0x03, /*!< CRYP timeout state */ - HAL_CRYP_STATE_ERROR = 0x04, /*!< CRYP error state */ - HAL_CRYP_STATE_SUSPENDED = 0x05 /*!< CRYP suspended */ -}HAL_CRYP_STATETypeDef; - -/** - * @brief HAL CRYP phase structures definition - */ -typedef enum -{ - HAL_CRYP_PHASE_READY = 0x01, /*!< CRYP peripheral is ready for initialization. */ - HAL_CRYP_PHASE_PROCESS = 0x02, /*!< CRYP peripheral is in processing phase */ - HAL_CRYP_PHASE_START = 0x03, /*!< CRYP peripheral has been initialized but GCM/GMAC/CMAC - initialization phase has not started */ - HAL_CRYP_PHASE_INIT_OVER = 0x04, /*!< GCM/GMAC/CMAC init phase has been carried out */ - HAL_CRYP_PHASE_HEADER_OVER = 0x05, /*!< GCM/GMAC/CMAC header phase has been carried out */ - HAL_CRYP_PHASE_PAYLOAD_OVER = 0x06, /*!< GCM/GMAC/CMAC payload phase has been carried out */ - HAL_CRYP_PHASE_FINAL_OVER = 0x07, /*!< GCM/GMAC/CMAC final phase has been carried out */ - HAL_CRYP_PHASE_HEADER_SUSPENDED = 0x08, /*!< GCM/GMAC/CMAC header phase has been suspended */ - HAL_CRYP_PHASE_PAYLOAD_SUSPENDED = 0x09, /*!< GCM/GMAC payload phase has been suspended */ - HAL_CRYP_PHASE_NOT_USED = 0x0a /*!< Phase is irrelevant to the current chaining mode */ -}HAL_PhaseTypeDef; - -/** - * @brief HAL CRYP mode suspend definitions - */ -typedef enum -{ - HAL_CRYP_SUSPEND_NONE = 0x00, /*!< CRYP peripheral suspension not requested */ - HAL_CRYP_SUSPEND = 0x01 /*!< CRYP peripheral suspension requested */ -}HAL_SuspendTypeDef; - - -/** - * @brief HAL CRYP Error Codes definition - */ -#define HAL_CRYP_ERROR_NONE ((uint32_t)0x00000000) /*!< No error */ -#define HAL_CRYP_WRITE_ERROR ((uint32_t)0x00000001) /*!< Write error */ -#define HAL_CRYP_READ_ERROR ((uint32_t)0x00000002) /*!< Read error */ -#define HAL_CRYP_DMA_ERROR ((uint32_t)0x00000004) /*!< DMA error */ - - -/** - * @brief CRYP handle Structure definition - */ -typedef struct -{ - AES_TypeDef *Instance; /*!< Register base address */ - - CRYP_InitTypeDef Init; /*!< CRYP initialization parameters */ - - uint8_t *pCrypInBuffPtr; /*!< Pointer to CRYP processing (encryption, decryption,...) input buffer */ - - uint8_t *pCrypOutBuffPtr; /*!< Pointer to CRYP processing (encryption, decryption,...) output buffer */ - - __IO uint16_t CrypInCount; /*!< Input data size in bytes or, after suspension, the remaining - number of bytes to process */ - - __IO uint16_t CrypOutCount; /*!< Output data size in bytes */ - - HAL_PhaseTypeDef Phase; /*!< CRYP peripheral processing phase for GCM, GMAC or CMAC modes. - Indicates the last phase carried out to ease - phase transitions */ - - DMA_HandleTypeDef *hdmain; /*!< CRYP peripheral Input DMA handle parameters */ - - DMA_HandleTypeDef *hdmaout; /*!< CRYP peripheral Output DMA handle parameters */ - - HAL_LockTypeDef Lock; /*!< CRYP locking object */ - - __IO HAL_CRYP_STATETypeDef State; /*!< CRYP peripheral state */ - - __IO uint32_t ErrorCode; /*!< CRYP peripheral error code */ - - HAL_SuspendTypeDef SuspendRequest; /*!< CRYP peripheral suspension request flag */ -}CRYP_HandleTypeDef; - -/** - * @} - */ - - -/* Exported constants --------------------------------------------------------*/ -/** @defgroup CRYP_Exported_Constants CRYP Exported Constants - * @{ - */ - -/** @defgroup CRYP_Key_Size Key size selection - * @{ - */ -#define CRYP_KEYSIZE_128B ((uint32_t)0x00000000) /*!< 128-bit long key */ -#define CRYP_KEYSIZE_256B AES_CR_KEYSIZE /*!< 256-bit long key */ -/** - * @} - */ - -/** @defgroup CRYP_Data_Type AES Data Type selection - * @{ - */ -#define CRYP_DATATYPE_32B ((uint32_t)0x00000000) /*!< 32-bit data type (no swapping) */ -#define CRYP_DATATYPE_16B AES_CR_DATATYPE_0 /*!< 16-bit data type (half-word swapping) */ -#define CRYP_DATATYPE_8B AES_CR_DATATYPE_1 /*!< 8-bit data type (byte swapping) */ -#define CRYP_DATATYPE_1B AES_CR_DATATYPE /*!< 1-bit data type (bit swapping) */ -/** - * @} - */ - - /** @defgroup CRYP_AES_State AES Enable state - * @{ - */ -#define CRYP_AES_DISABLE ((uint32_t)0x00000000) /*!< Disable AES */ -#define CRYP_AES_ENABLE AES_CR_EN /*!< Enable AES */ -/** - * @} - */ - -/** @defgroup CRYP_AES_OperatingMode AES operating mode - * @{ - */ -#define CRYP_ALGOMODE_ENCRYPT ((uint32_t)0x00000000) /*!< Encryption mode */ -#define CRYP_ALGOMODE_KEYDERIVATION AES_CR_MODE_0 /*!< Key derivation mode */ -#define CRYP_ALGOMODE_DECRYPT AES_CR_MODE_1 /*!< Decryption */ -#define CRYP_ALGOMODE_KEYDERIVATION_DECRYPT AES_CR_MODE /*!< Key derivation and decryption */ -#define CRYP_ALGOMODE_TAG_GENERATION ((uint32_t)0x00000000) /*!< GMAC or CMAC authentication tag generation */ -/** - * @} - */ - -/** @defgroup CRYP_AES_ChainingMode AES chaining mode - * @{ - */ -#define CRYP_CHAINMODE_AES_ECB ((uint32_t)0x00000000) /*!< Electronic codebook chaining algorithm */ -#define CRYP_CHAINMODE_AES_CBC AES_CR_CHMOD_0 /*!< Cipher block chaining algorithm */ -#define CRYP_CHAINMODE_AES_CTR AES_CR_CHMOD_1 /*!< Counter mode chaining algorithm */ -#define CRYP_CHAINMODE_AES_GCM_GMAC (AES_CR_CHMOD_0 | AES_CR_CHMOD_1) /*!< Galois counter mode - Galois message authentication code */ -#define CRYP_CHAINMODE_AES_CMAC AES_CR_CHMOD_2 /*!< Cipher message authentication code */ -/** - * @} - */ - -/** @defgroup CRYP_Key_Write AES decryption key write-up flag - * @{ - */ -#define CRYP_KEY_WRITE_ENABLE ((uint32_t)0x00000000) /*!< Enable decryption key writing */ -#define CRYP_KEY_WRITE_DISABLE ((uint32_t)0x00000001) /*!< Disable decryption key writing */ -/** - * @} - */ - -/** @defgroup CRYP_DMAIN DMA Input phase management enable state - * @{ - */ -#define CRYP_DMAIN_DISABLE ((uint32_t)0x00000000) /*!< Disable DMA Input phase management */ -#define CRYP_DMAIN_ENABLE AES_CR_DMAINEN /*!< Enable DMA Input phase management */ -/** - * @} - */ - -/** @defgroup CRYP_DMAOUT DMA Output phase management enable state - * @{ - */ -#define CRYP_DMAOUT_DISABLE ((uint32_t)0x00000000) /*!< Disable DMA Output phase management */ -#define CRYP_DMAOUT_ENABLE AES_CR_DMAOUTEN /*!< Enable DMA Output phase management */ -/** - * @} - */ - - -/** @defgroup CRYP_GCM_CMAC_Phase GCM/GMAC and CMAC processing phase selection - * @{ - */ -#define CRYP_GCM_INIT_PHASE ((uint32_t)0x00000000) /*!< GCM/GMAC init phase */ -#define CRYP_GCMCMAC_HEADER_PHASE AES_CR_GCMPH_0 /*!< GCM/GMAC or CMAC header phase */ -#define CRYP_GCM_PAYLOAD_PHASE AES_CR_GCMPH_1 /*!< GCM payload phaset */ -#define CRYP_GCMCMAC_FINAL_PHASE AES_CR_GCMPH /*!< GCM/GMAC or CMAC final phase */ -/** - * @} - */ - -/** @defgroup CRYP_Flags AES status flags - * @{ - */ - -#define CRYP_FLAG_BUSY AES_SR_BUSY /*!< GCM process suspension forbidden */ -#define CRYP_FLAG_WRERR AES_SR_WRERR /*!< Write Error */ -#define CRYP_FLAG_RDERR AES_SR_RDERR /*!< Read error */ -#define CRYP_FLAG_CCF AES_SR_CCF /*!< Computation completed */ -/** - * @} - */ - -/** @defgroup CRYP_Clear_Flags AES clearing flags - * @{ - */ - -#define CRYP_CCF_CLEAR AES_CR_CCFC /*!< Computation Complete Flag Clear */ -#define CRYP_ERR_CLEAR AES_CR_ERRC /*!< Error Flag Clear */ -/** - * @} - */ - -/** @defgroup AES_Interrupts_Enable AES Interrupts Enable bits - * @{ - */ -#define CRYP_IT_CCFIE AES_CR_CCFIE /*!< Computation Complete interrupt enable */ -#define CRYP_IT_ERRIE AES_CR_ERRIE /*!< Error interrupt enable */ -/** - * @} - */ - -/** @defgroup CRYP_Interrupts_Flags AES Interrupts flags - * @{ - */ -#define CRYP_IT_WRERR AES_SR_WRERR /*!< Write Error */ -#define CRYP_IT_RDERR AES_SR_RDERR /*!< Read Error */ -#define CRYP_IT_CCF AES_SR_CCF /*!< Computation completed */ -/** - * @} - */ - -/** - * @} - */ - -/* Exported macros -----------------------------------------------------------*/ -/** @defgroup CRYP_Exported_Macros CRYP Exported Macros - * @{ - */ - -/** @brief Reset CRYP handle state. - * @param __HANDLE__: specifies the CRYP handle. - * @retval None - */ -#define __HAL_CRYP_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_CRYP_STATE_RESET) - -/** - * @brief Enable the CRYP AES peripheral. - * @retval None - */ -#define __HAL_CRYP_ENABLE() (AES->CR |= AES_CR_EN) - -/** - * @brief Disable the CRYP AES peripheral. - * @retval None - */ -#define __HAL_CRYP_DISABLE() (AES->CR &= ~AES_CR_EN) - -/** - * @brief Set the algorithm operating mode. - * @param __OPERATING_MODE__: specifies the operating mode - * This parameter can be one of the following values: - * @arg CRYP_ALGOMODE_ENCRYPT: encryption - * @arg CRYP_ALGOMODE_KEYDERIVATION: key derivation - * @arg CRYP_ALGOMODE_DECRYPT: decryption - * @arg CRYP_ALGOMODE_KEYDERIVATION_DECRYPT: key derivation and decryption - * @retval None - */ -#define __HAL_CRYP_SET_OPERATINGMODE(__OPERATING_MODE__) MODIFY_REG(AES->CR, AES_CR_MODE, (__OPERATING_MODE__)) - - -/** - * @brief Set the algorithm chaining mode. - * @param __CHAINING_MODE__: specifies the chaining mode - * This parameter can be one of the following values: - * @arg CRYP_CHAINMODE_AES_ECB: Electronic CodeBook - * @arg CRYP_CHAINMODE_AES_CBC: Cipher Block Chaining - * @arg CRYP_CHAINMODE_AES_CTR: CounTeR mode - * @arg CRYP_CHAINMODE_AES_GCM_GMAC: Galois Counter Mode or Galois Message Authentication Code - * @arg CRYP_CHAINMODE_AES_CMAC: Cipher Message Authentication Code - * @retval None - */ -#define __HAL_CRYP_SET_CHAININGMODE(__CHAINING_MODE__) MODIFY_REG(AES->CR, AES_CR_CHMOD, (__CHAINING_MODE__)) - - - -/** @brief Check whether the specified CRYP status flag is set or not. - * @param __FLAG__: specifies the flag to check. - * This parameter can be one of the following values: - * @arg CRYP_FLAG_BUSY: GCM process suspension forbidden - * @arg CRYP_IT_WRERR: Write Error - * @arg CRYP_IT_RDERR: Read Error - * @arg CRYP_IT_CCF: Computation Complete - * @retval The state of __FLAG__ (TRUE or FALSE). - */ -#define __HAL_CRYP_GET_FLAG(__FLAG__) ((AES->SR & (__FLAG__)) == (__FLAG__)) - - -/** @brief Clear the CRYP pending status flag. - * @param __FLAG__: specifies the flag to clear. - * This parameter can be one of the following values: - * @arg CRYP_ERR_CLEAR: Read (RDERR) or Write Error (WRERR) Flag Clear - * @arg CRYP_CCF_CLEAR: Computation Complete Flag (CCF) Clear - * @retval None - */ -#define __HAL_CRYP_CLEAR_FLAG(__FLAG__) SET_BIT(AES->CR, (__FLAG__)) - - - -/** @brief Check whether the specified CRYP interrupt source is enabled or not. - * @param __INTERRUPT__: CRYP interrupt source to check - * This parameter can be one of the following values: - * @arg CRYP_IT_ERRIE: Error interrupt (used for RDERR and WRERR) - * @arg CRYP_IT_CCFIE: Computation Complete interrupt - * @retval State of interruption (TRUE or FALSE). - */ -#define __HAL_CRYP_GET_IT_SOURCE(__INTERRUPT__) ((AES->CR & (__INTERRUPT__)) == (__INTERRUPT__)) - - -/** @brief Check whether the specified CRYP interrupt is set or not. - * @param __INTERRUPT__: specifies the interrupt to check. - * This parameter can be one of the following values: - * @arg CRYP_IT_WRERR: Write Error - * @arg CRYP_IT_RDERR: Read Error - * @arg CRYP_IT_CCF: Computation Complete - * @retval The state of __INTERRUPT__ (TRUE or FALSE). - */ -#define __HAL_CRYP_GET_IT(__INTERRUPT__) ((AES->SR & (__INTERRUPT__)) == (__INTERRUPT__)) - - - -/** @brief Clear the CRYP pending interrupt. - * @param __INTERRUPT__: specifies the IT to clear. - * This parameter can be one of the following values: - * @arg CRYP_ERR_CLEAR: Read (RDERR) or Write Error (WRERR) Flag Clear - * @arg CRYP_CCF_CLEAR: Computation Complete Flag (CCF) Clear - * @retval None - */ -#define __HAL_CRYP_CLEAR_IT(__INTERRUPT__) SET_BIT(AES->CR, (__INTERRUPT__)) - - -/** - * @brief Enable the CRYP interrupt. - * @param __INTERRUPT__: CRYP Interrupt. - * This parameter can be one of the following values: - * @arg CRYP_IT_ERRIE: Error interrupt (used for RDERR and WRERR) - * @arg CRYP_IT_CCFIE: Computation Complete interrupt - * @retval None - */ -#define __HAL_CRYP_ENABLE_IT(__INTERRUPT__) ((AES->CR) |= (__INTERRUPT__)) - - -/** - * @brief Disable the CRYP interrupt. - * @param __INTERRUPT__: CRYP Interrupt. - * This parameter can be one of the following values: - * @arg CRYP_IT_ERRIE: Error interrupt (used for RDERR and WRERR) - * @arg CRYP_IT_CCFIE: Computation Complete interrupt - * @retval None - */ -#define __HAL_CRYP_DISABLE_IT(__INTERRUPT__) ((AES->CR) &= ~(__INTERRUPT__)) - -/** - * @} - */ - -/* Private macros --------------------------------------------------------*/ -/** @addtogroup CRYP_Private_Macros CRYP Private Macros - * @{ - */ - -/** - * @brief Verify the key size length. - * @param __KEYSIZE__: Ciphering/deciphering algorithm key size. - * @retval SET (__KEYSIZE__ is a valid value) or RESET (__KEYSIZE__ is invalid) - */ -#define IS_CRYP_KEYSIZE(__KEYSIZE__) (((__KEYSIZE__) == CRYP_KEYSIZE_128B) || \ - ((__KEYSIZE__) == CRYP_KEYSIZE_256B)) - -/** - * @brief Verify the input data type. - * @param __DATATYPE__: Ciphering/deciphering algorithm input data type. - * @retval SET (__DATATYPE__ is valid) or RESET (__DATATYPE__ is invalid) - */ -#define IS_CRYP_DATATYPE(__DATATYPE__) (((__DATATYPE__) == CRYP_DATATYPE_32B) || \ - ((__DATATYPE__) == CRYP_DATATYPE_16B) || \ - ((__DATATYPE__) == CRYP_DATATYPE_8B) || \ - ((__DATATYPE__) == CRYP_DATATYPE_1B)) - -/** - * @brief Verify the CRYP AES IP running mode. - * @param __MODE__: CRYP AES IP running mode. - * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) - */ -#define IS_CRYP_AES(__MODE__) (((__MODE__) == CRYP_AES_DISABLE) || \ - ((__MODE__) == CRYP_AES_ENABLE)) - -/** - * @brief Verify the selected CRYP algorithm. - * @param __ALGOMODE__: Selected CRYP algorithm (ciphering, deciphering, key derivation or a combination of the latter). - * @retval SET (__ALGOMODE__ is valid) or RESET (__ALGOMODE__ is invalid) - */ -#define IS_CRYP_ALGOMODE(__ALGOMODE__) (((__ALGOMODE__) == CRYP_ALGOMODE_ENCRYPT) || \ - ((__ALGOMODE__) == CRYP_ALGOMODE_KEYDERIVATION) || \ - ((__ALGOMODE__) == CRYP_ALGOMODE_DECRYPT) || \ - ((__ALGOMODE__) == CRYP_ALGOMODE_TAG_GENERATION) || \ - ((__ALGOMODE__) == CRYP_ALGOMODE_KEYDERIVATION_DECRYPT)) - -/** - * @brief Verify the selected CRYP chaining algorithm. - * @param __CHAINMODE__: Selected CRYP chaining algorithm. - * @retval SET (__CHAINMODE__ is valid) or RESET (__CHAINMODE__ is invalid) - */ -#define IS_CRYP_CHAINMODE(__CHAINMODE__) (((__CHAINMODE__) == CRYP_CHAINMODE_AES_ECB) || \ - ((__CHAINMODE__) == CRYP_CHAINMODE_AES_CBC) || \ - ((__CHAINMODE__) == CRYP_CHAINMODE_AES_CTR) || \ - ((__CHAINMODE__) == CRYP_CHAINMODE_AES_GCM_GMAC) || \ - ((__CHAINMODE__) == CRYP_CHAINMODE_AES_CMAC)) - -/** - * @brief Verify the deciphering key write option. - * @param __WRITE__: deciphering key write option. - * @retval SET (__WRITE__ is valid) or RESET (__WRITE__ is invalid) - */ -#define IS_CRYP_WRITE(__WRITE__) (((__WRITE__) == CRYP_KEY_WRITE_ENABLE) || \ - ((__WRITE__) == CRYP_KEY_WRITE_DISABLE)) - -/** - * @brief Verify the CRYP input data DMA mode. - * @param __MODE__: CRYP input data DMA mode. - * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) - */ -#define IS_CRYP_DMAIN(__MODE__) (((__MODE__) == CRYP_DMAIN_DISABLE) || \ - ((__MODE__) == CRYP_DMAIN_ENABLE)) - -/** - * @brief Verify the CRYP output data DMA mode. - * @param __MODE__: CRYP output data DMA mode. - * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) - */ -#define IS_CRYP_DMAOUT(__MODE__) (((__MODE__) == CRYP_DMAOUT_DISABLE) || \ - ((__MODE__) == CRYP_DMAOUT_ENABLE)) - -/** - * @brief Verify the CRYP AES ciphering/deciphering/authentication algorithm phase. - * @param __PHASE__: CRYP AES ciphering/deciphering/authentication algorithm phase. - * @retval SET (__PHASE__ is valid) or RESET (__PHASE__ is invalid) - */ -#define IS_CRYP_GCMCMAC_PHASE(__PHASE__) (((__PHASE__) == CRYP_GCM_INIT_PHASE) || \ - ((__PHASE__) == CRYP_GCMCMAC_HEADER_PHASE) || \ - ((__PHASE__) == CRYP_GCM_PAYLOAD_PHASE) || \ - ((__PHASE__) == CRYP_GCMCMAC_FINAL_PHASE)) - -/** - * @} - */ - -/* Include CRYP HAL Extended module */ -#include "stm32l4xx_hal_cryp_ex.h" - -/* Exported functions --------------------------------------------------------*/ -/** @addtogroup CRYP_Exported_Functions CRYP Exported Functions - * @{ - */ - -/** @addtogroup CRYP_Group1 Initialization and deinitialization functions - * @{ - */ - -/* Initialization/de-initialization functions ********************************/ -HAL_StatusTypeDef HAL_CRYP_Init(CRYP_HandleTypeDef *hcryp); -HAL_StatusTypeDef HAL_CRYP_DeInit(CRYP_HandleTypeDef *hcryp); - -/* MSP initialization/de-initialization functions ****************************/ -void HAL_CRYP_MspInit(CRYP_HandleTypeDef *hcryp); -void HAL_CRYP_MspDeInit(CRYP_HandleTypeDef *hcryp); - -/** - * @} - */ - -/** @addtogroup CRYP_Group2 AES processing functions - * @{ - */ - -/* AES encryption/decryption processing functions ****************************/ - -/* AES encryption/decryption using polling ***********************************/ -HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout); -HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout); -HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout); -HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout); -HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout); -HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout); - -/* AES encryption/decryption using interrupt *********************************/ -HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData); -HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData); -HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData); -HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData); -HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData); -HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData); - -/* AES encryption/decryption using DMA ***************************************/ -HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData); -HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData); -HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData); -HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData); -HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData); -HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData); - -/** - * @} - */ - -/** @addtogroup CRYP_Group3 Callback functions - * @{ - */ -/* CallBack functions ********************************************************/ -void HAL_CRYP_InCpltCallback(CRYP_HandleTypeDef *hcryp); -void HAL_CRYP_OutCpltCallback(CRYP_HandleTypeDef *hcryp); -void HAL_CRYP_ErrorCallback(CRYP_HandleTypeDef *hcryp); - -/** - * @} - */ - -/** @addtogroup CRYP_Group4 CRYP IRQ handler - * @{ - */ - -/* AES interrupt handling function *******************************************/ -void HAL_CRYP_IRQHandler(CRYP_HandleTypeDef *hcryp); - -/** - * @} - */ - -/** @addtogroup CRYP_Group5 Peripheral State functions - * @{ - */ - -/* Peripheral State functions ************************************************/ -HAL_CRYP_STATETypeDef HAL_CRYP_GetState(CRYP_HandleTypeDef *hcryp); -uint32_t HAL_CRYP_GetError(CRYP_HandleTypeDef *hcryp); - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -#endif /* defined(STM32L485xx) || defined(STM32L486xx) */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32L4xx_HAL_CRYP_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ -
--- a/Inc/stm32l4xx_hal_cryp_ex.h Thu Nov 12 20:49:49 2015 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,148 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_cryp_ex.h - * @author MCD Application Team - * @version V1.1.0 - * @date 16-September-2015 - * @brief Header file of CRYPEx HAL module. - ****************************************************************************** - * @attention - * - * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_CRYP_EX_H -#define __STM32L4xx_HAL_CRYP_EX_H - -#ifdef __cplusplus - extern "C" { -#endif - -#if defined(STM32L485xx) || defined(STM32L486xx) - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal_def.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @addtogroup CRYPEx - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ -/* Exported functions --------------------------------------------------------*/ - -/** @addtogroup CRYPEx_Exported_Functions - * @{ - */ - -/** @addtogroup CRYPEx_Exported_Functions_Group1 - * @{ - */ - -/* CallBack functions ********************************************************/ -void HAL_CRYPEx_ComputationCpltCallback(CRYP_HandleTypeDef *hcryp); - -/** - * @} - */ - -/** @addtogroup CRYPEx_Exported_Functions_Group2 - * @{ - */ - -/* AES encryption/decryption processing functions ****************************/ -HAL_StatusTypeDef HAL_CRYPEx_AES(CRYP_HandleTypeDef *hcryp, uint8_t *pInputData, uint16_t Size, uint8_t *pOutputData, uint32_t Timeout); -HAL_StatusTypeDef HAL_CRYPEx_AES_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pInputData, uint16_t Size, uint8_t *pOutputData); -HAL_StatusTypeDef HAL_CRYPEx_AES_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pInputData, uint16_t Size, uint8_t *pOutputData); - -/* AES encryption/decryption/authentication processing functions *************/ -HAL_StatusTypeDef HAL_CRYPEx_AES_Auth(CRYP_HandleTypeDef *hcryp, uint8_t *pInputData, uint64_t Size, uint8_t *pOutputData, uint32_t Timeout); -HAL_StatusTypeDef HAL_CRYPEx_AES_Auth_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pInputData, uint64_t Size, uint8_t *pOutputData); -HAL_StatusTypeDef HAL_CRYPEx_AES_Auth_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pInputData, uint64_t Size, uint8_t *pOutputData); - -/** - * @} - */ - -/** @addtogroup CRYPEx_Exported_Functions_Group3 - * @{ - */ - -/* AES suspension/resumption functions ***************************************/ -void HAL_CRYPEx_Read_IVRegisters(CRYP_HandleTypeDef *hcryp, uint8_t* Output); -void HAL_CRYPEx_Write_IVRegisters(CRYP_HandleTypeDef *hcryp, uint8_t* Input); -void HAL_CRYPEx_Read_SuspendRegisters(CRYP_HandleTypeDef *hcryp, uint8_t* Output); -void HAL_CRYPEx_Write_SuspendRegisters(CRYP_HandleTypeDef *hcryp, uint8_t* Input); -void HAL_CRYPEx_Read_KeyRegisters(CRYP_HandleTypeDef *hcryp, uint8_t* Output, uint32_t KeySize); -void HAL_CRYPEx_Write_KeyRegisters(CRYP_HandleTypeDef *hcryp, uint8_t* Input, uint32_t KeySize); -void HAL_CRYPEx_Read_ControlRegister(CRYP_HandleTypeDef *hcryp, uint8_t* Output); -void HAL_CRYPEx_Write_ControlRegister(CRYP_HandleTypeDef *hcryp, uint8_t* Input); -void HAL_CRYPEx_ProcessSuspend(CRYP_HandleTypeDef *hcryp); - -/** - * @} - */ - - -/** - * @} - */ - -/* Private functions -----------------------------------------------------------*/ -/** @addtogroup CRYPEx_Private_Functions CRYPEx Private Functions - * @{ - */ -HAL_StatusTypeDef CRYP_AES_Auth_IT(CRYP_HandleTypeDef *hcryp); - -/** - * @} - */ - - -/** - * @} - */ - -/** - * @} - */ - -#endif /* defined(STM32L485xx) || defined(STM32L486xx) */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32L4xx_HAL_CRYP_EX_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ -
--- a/Inc/stm32l4xx_hal_dac.h Thu Nov 12 20:49:49 2015 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,480 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_dac.h - * @author MCD Application Team - * @version V1.1.0 - * @date 16-September-2015 - * @brief Header file of DAC HAL module. - ****************************************************************************** - * @attention - * - * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_DAC_H -#define __STM32L4xx_HAL_DAC_H - -#ifdef __cplusplus - extern "C" { -#endif - - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal_def.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @addtogroup DAC - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ - -/** @defgroup DAC_Exported_Types DAC Exported Types - * @{ - */ - -/** - * @brief HAL State structures definition - */ -typedef enum -{ - HAL_DAC_STATE_RESET = 0x00, /*!< DAC not yet initialized or disabled */ - HAL_DAC_STATE_READY = 0x01, /*!< DAC initialized and ready for use */ - HAL_DAC_STATE_BUSY = 0x02, /*!< DAC internal processing is ongoing */ - HAL_DAC_STATE_TIMEOUT = 0x03, /*!< DAC timeout state */ - HAL_DAC_STATE_ERROR = 0x04 /*!< DAC error state */ - -}HAL_DAC_StateTypeDef; - -/** - * @brief DAC handle Structure definition - */ -typedef struct -{ - DAC_TypeDef *Instance; /*!< Register base address */ - - __IO HAL_DAC_StateTypeDef State; /*!< DAC communication state */ - - HAL_LockTypeDef Lock; /*!< DAC locking object */ - - DMA_HandleTypeDef *DMA_Handle1; /*!< Pointer DMA handler for channel 1 */ - - DMA_HandleTypeDef *DMA_Handle2; /*!< Pointer DMA handler for channel 2 */ - - __IO uint32_t ErrorCode; /*!< DAC Error code */ - -}DAC_HandleTypeDef; - -/** - * @brief DAC Configuration sample and hold Channel structure definition - */ -typedef struct -{ - uint32_t DAC_SampleTime ; /*!< Specifies the Sample time for the selected channel. - This parameter applies when DAC_SampleAndHold is DAC_SAMPLEANDHOLD_ENABLE. - This parameter must be a number between Min_Data = 0 and Max_Data = 1023 */ - - uint32_t DAC_HoldTime ; /*!< Specifies the hold time for the selected channel - This parameter applies when DAC_SampleAndHold is DAC_SAMPLEANDHOLD_ENABLE. - This parameter must be a number between Min_Data = 0 and Max_Data = 1023 */ - - uint32_t DAC_RefreshTime ; /*!< Specifies the refresh time for the selected channel - This parameter applies when DAC_SampleAndHold is DAC_SAMPLEANDHOLD_ENABLE. - This parameter must be a number between Min_Data = 0 and Max_Data = 255 */ -} -DAC_SampleAndHoldConfTypeDef; - -/** - * @brief DAC Configuration regular Channel structure definition - */ -typedef struct -{ - uint32_t DAC_SampleAndHold; /*!< Specifies whether the DAC mode. - This parameter can be a value of @ref DAC_SampleAndHold */ - - uint32_t DAC_Trigger; /*!< Specifies the external trigger for the selected DAC channel. - This parameter can be a value of @ref DAC_trigger_selection */ - - uint32_t DAC_OutputBuffer; /*!< Specifies whether the DAC channel output buffer is enabled or disabled. - This parameter can be a value of @ref DAC_output_buffer */ - - uint32_t DAC_ConnectOnChipPeripheral ; /*!< Specifies whether the DAC output is connected or not to on chip peripheral . - This parameter can be a value of @ref DAC_ConnectOnChipPeripheral */ - - uint32_t DAC_UserTrimming; /*!< Specifies the trimming mode - This parameter must be a value of @ref DAC_UserTrimming - DAC_UserTrimming is either factory or user trimming */ - - uint32_t DAC_TrimmingValue; /*!< Specifies the offset trimming value - i.e. when DAC_SampleAndHold is DAC_TRIMMING_USER. - This parameter must be a number between Min_Data = 1 and Max_Data = 31 */ - - DAC_SampleAndHoldConfTypeDef DAC_SampleAndHoldConfig; /*!< Sample and Hold settings */ - -}DAC_ChannelConfTypeDef; - -/** - * @} - */ - -/* Exported constants --------------------------------------------------------*/ - -/** @defgroup DAC_Exported_Constants DAC Exported Constants - * @{ - */ - -/** @defgroup DAC_Error_Code DAC Error Code - * @{ - */ -#define HAL_DAC_ERROR_NONE 0x00 /*!< No error */ -#define HAL_DAC_ERROR_DMAUNDERRUNCH1 0x01 /*!< DAC channel1 DMA underrun error */ -#define HAL_DAC_ERROR_DMAUNDERRUNCH2 0x02 /*!< DAC channel2 DMA underrun error */ -#define HAL_DAC_ERROR_DMA 0x04 /*!< DMA error */ -#define HAL_DAC_ERROR_TIMEOUT 0x08 /*!< Timeout error */ -/** - * @} - */ - -/** @defgroup DAC_trigger_selection DAC trigger selection - * @{ - */ - -#define DAC_TRIGGER_NONE ((uint32_t)0x00000000) /*!< Conversion is automatic once the DAC_DHRxxxx register - has been loaded, and not by external trigger */ -#define DAC_TRIGGER_T2_TRGO ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TEN1)) /*!< TIM2 TRGO selected as external conversion trigger for DAC channel */ -#define DAC_TRIGGER_T4_TRGO ((uint32_t)(DAC_CR_TSEL1_2 |DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM4 TRGO selected as external conversion trigger for DAC channel */ -#define DAC_TRIGGER_T5_TRGO ((uint32_t)(DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM5 TRGO selected as external conversion trigger for DAC channel */ -#define DAC_TRIGGER_T6_TRGO ((uint32_t)DAC_CR_TEN1) /*!< TIM6 TRGO selected as external conversion trigger for DAC channel */ -#define DAC_TRIGGER_T7_TRGO ((uint32_t)(DAC_CR_TSEL1_1 | DAC_CR_TEN1)) /*!< TIM7 TRGO selected as external conversion trigger for DAC channel */ -#define DAC_TRIGGER_T8_TRGO ((uint32_t)(DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM8 TRGO selected as external conversion trigger for DAC channel */ -#define DAC_TRIGGER_EXT_IT9 ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TEN1)) /*!< EXTI Line9 event selected as external conversion trigger for DAC channel */ -#define DAC_TRIGGER_SOFTWARE ((uint32_t)(DAC_CR_TSEL1 | DAC_CR_TEN1)) /*!< Conversion started by software trigger for DAC channel */ - -/** - * @} - */ - -/** @defgroup DAC_output_buffer DAC output buffer - * @{ - */ -#define DAC_OUTPUTBUFFER_ENABLE ((uint32_t)0x00000000) -#define DAC_OUTPUTBUFFER_DISABLE ((uint32_t)DAC_MCR_MODE1_1) - -/** - * @} - */ - -/** @defgroup DAC_Channel_selection DAC Channel selection - * @{ - */ -#define DAC_CHANNEL_1 ((uint32_t)0x00000000) -#define DAC_CHANNEL_2 ((uint32_t)0x00000010) - -/** - * @} - */ - -/** @defgroup DAC_data_alignment DAC data alignment - * @{ - */ -#define DAC_ALIGN_12B_R ((uint32_t)0x00000000) -#define DAC_ALIGN_12B_L ((uint32_t)0x00000004) -#define DAC_ALIGN_8B_R ((uint32_t)0x00000008) - -/** - * @} - */ - -/** @defgroup DAC_flags_definition DAC flags definition - * @{ - */ -#define DAC_FLAG_DMAUDR1 ((uint32_t)DAC_SR_DMAUDR1) -#define DAC_FLAG_DMAUDR2 ((uint32_t)DAC_SR_DMAUDR2) - -/** - * @} - */ - -/** @defgroup DAC_IT_definition DAC IT definition - * @{ - */ -#define DAC_IT_DMAUDR1 ((uint32_t)DAC_SR_DMAUDR1) -#define DAC_IT_DMAUDR2 ((uint32_t)DAC_SR_DMAUDR2) - -/** - * @} - */ - -/** @defgroup DAC_ConnectOnChipPeripheral DAC ConnectOnChipPeripheral - * @{ - */ -#define DAC_CHIPCONNECT_DISABLE ((uint32_t)0x00000000) -#define DAC_CHIPCONNECT_ENABLE ((uint32_t)DAC_MCR_MODE1_0) - -/** - * @} - */ - - /** @defgroup DAC_UserTrimming DAC User Trimming - * @{ - */ - -#define DAC_TRIMMING_FACTORY ((uint32_t)0x00000000) /*!< Factory trimming */ -#define DAC_TRIMMING_USER ((uint32_t)0x00000001) /*!< User trimming */ - -/** - * @} - */ - -/** @defgroup DAC_SampleAndHold DAC power mode - * @{ - */ -#define DAC_SAMPLEANDHOLD_DISABLE ((uint32_t)0x00000000) -#define DAC_SAMPLEANDHOLD_ENABLE ((uint32_t)DAC_MCR_MODE1_2) - -/** - * @} - */ - -/** - * @} - */ - -/* Exported macro ------------------------------------------------------------*/ - -/** @defgroup DAC_Exported_Macros DAC Exported Macros - * @{ - */ - -/** @brief Reset DAC handle state. - * @param __HANDLE__: specifies the DAC handle. - * @retval None - */ -#define __HAL_DAC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DAC_STATE_RESET) - -/** @brief Enable the DAC channel. - * @param __HANDLE__: specifies the DAC handle. - * @param __DAC_Channel__: specifies the DAC channel - * @retval None - */ -#define __HAL_DAC_ENABLE(__HANDLE__, __DAC_Channel__) \ -((__HANDLE__)->Instance->CR |= (DAC_CR_EN1 << (__DAC_Channel__))) - -/** @brief Disable the DAC channel. - * @param __HANDLE__: specifies the DAC handle - * @param __DAC_Channel__: specifies the DAC channel. - * @retval None - */ -#define __HAL_DAC_DISABLE(__HANDLE__, __DAC_Channel__) \ -((__HANDLE__)->Instance->CR &= ~(DAC_CR_EN1 << (__DAC_Channel__))) - -/** @brief Set DHR12R1 alignment. - * @param __ALIGNMENT__: specifies the DAC alignment - * @retval None - */ -#define DAC_DHR12R1_ALIGNMENT(__ALIGNMENT__) (((uint32_t)0x00000008) + (__ALIGNMENT__)) - -/** @brief Set DHR12R2 alignment. - * @param __ALIGNMENT__: specifies the DAC alignment - * @retval None - */ -#define DAC_DHR12R2_ALIGNMENT(__ALIGNMENT__) (((uint32_t)0x00000014) + (__ALIGNMENT__)) - -/** @brief Set DHR12RD alignment. - * @param __ALIGNMENT__: specifies the DAC alignment - * @retval None - */ -#define DAC_DHR12RD_ALIGNMENT(__ALIGNMENT__) (((uint32_t)0x00000020) + (__ALIGNMENT__)) - -/** @brief Enable the DAC interrupt. - * @param __HANDLE__: specifies the DAC handle - * @param __INTERRUPT__: specifies the DAC interrupt. - * This parameter can be any combination of the following values: - * @arg DAC_IT_DMAUDR1: DAC channel 1 DMA underrun interrupt - * @arg DAC_IT_DMAUDR2: DAC channel 2 DMA underrun interrupt - * @retval None - */ -#define __HAL_DAC_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) |= (__INTERRUPT__)) - -/** @brief Disable the DAC interrupt. - * @param __HANDLE__: specifies the DAC handle - * @param __INTERRUPT__: specifies the DAC interrupt. - * This parameter can be any combination of the following values: - * @arg DAC_IT_DMAUDR1: DAC channel 1 DMA underrun interrupt - * @arg DAC_IT_DMAUDR2: DAC channel 2 DMA underrun interrupt - * @retval None - */ -#define __HAL_DAC_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) &= ~(__INTERRUPT__)) - -/** @brief Check whether the specified DAC interrupt source is enabled or not. - * @param __HANDLE__: DAC handle - * @param __INTERRUPT__: DAC interrupt source to check - * This parameter can be any combination of the following values: - * @arg DAC_IT_DMAUDR1: DAC channel 1 DMA underrun interrupt - * @arg DAC_IT_DMAUDR2: DAC channel 2 DMA underrun interrupt - * @retval State of interruption (SET or RESET) - */ -#define __HAL_DAC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR & (__INTERRUPT__)) == (__INTERRUPT__)) - -/** @brief Get the selected DAC's flag status. - * @param __HANDLE__: specifies the DAC handle. - * @param __FLAG__: specifies the DAC flag to get. - * This parameter can be any combination of the following values: - * @arg DAC_FLAG_DMAUDR1: DAC channel 1 DMA underrun flag - * @arg DAC_FLAG_DMAUDR2: DAC channel 2 DMA underrun flag - * @retval None - */ -#define __HAL_DAC_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__)) - -/** @brief Clear the DAC's flag. - * @param __HANDLE__: specifies the DAC handle. - * @param __FLAG__: specifies the DAC flag to clear. - * This parameter can be any combination of the following values: - * @arg DAC_FLAG_DMAUDR1: DAC channel 1 DMA underrun flag - * @arg DAC_FLAG_DMAUDR2: DAC channel 2 DMA underrun flag - * @retval None - */ -#define __HAL_DAC_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR) = (__FLAG__)) - -/** - * @} - */ - -/* Private macro -------------------------------------------------------------*/ - -/** @defgroup DAC_Private_Macros DAC Private Macros - * @{ - */ -#define IS_DAC_OUTPUT_BUFFER_STATE(STATE) (((STATE) == DAC_OUTPUTBUFFER_ENABLE) || \ - ((STATE) == DAC_OUTPUTBUFFER_DISABLE)) - -#define IS_DAC_CHANNEL(CHANNEL) (((CHANNEL) == DAC_CHANNEL_1) || \ - ((CHANNEL) == DAC_CHANNEL_2)) - -#define IS_DAC_ALIGN(ALIGN) (((ALIGN) == DAC_ALIGN_12B_R) || \ - ((ALIGN) == DAC_ALIGN_12B_L) || \ - ((ALIGN) == DAC_ALIGN_8B_R)) - -#define IS_DAC_DATA(DATA) ((DATA) <= 0xFFF0) - -#define IS_DAC_REFRESHTIME(TIME) ((TIME) <= 0x0000000FF) - -/** - * @} - */ - -/* Include DAC HAL Extended module */ -#include "stm32l4xx_hal_dac_ex.h" - -/* Exported functions --------------------------------------------------------*/ - -/** @addtogroup DAC_Exported_Functions - * @{ - */ - -/** @addtogroup DAC_Exported_Functions_Group1 - * @{ - */ -/* Initialization and de-initialization functions *****************************/ -HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef* hdac); -HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef* hdac); -void HAL_DAC_MspInit(DAC_HandleTypeDef* hdac); -void HAL_DAC_MspDeInit(DAC_HandleTypeDef* hdac); - -/** - * @} - */ - -/** @addtogroup DAC_Exported_Functions_Group2 - * @{ - */ -/* IO operation functions *****************************************************/ -HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef* hdac, uint32_t Channel); -HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef* hdac, uint32_t Channel); -HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t* pData, uint32_t Length, uint32_t Alignment); -HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel); - -void HAL_DAC_IRQHandler(DAC_HandleTypeDef* hdac); - -HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data); - -void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef* hdac); -void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef* hdac); -void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac); -void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac); -/** - * @} - */ - -/** @addtogroup DAC_Exported_Functions_Group3 - * @{ - */ -/* Peripheral Control functions ***********************************************/ -uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef* hdac, uint32_t Channel); - -HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef* hdac, DAC_ChannelConfTypeDef* sConfig, uint32_t Channel); -/** - * @} - */ - -/** @addtogroup DAC_Exported_Functions_Group4 - * @{ - */ -/* Peripheral State and Error functions ***************************************/ -HAL_DAC_StateTypeDef HAL_DAC_GetState(DAC_HandleTypeDef* hdac); -uint32_t HAL_DAC_GetError(DAC_HandleTypeDef *hdac); - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - - -#endif /*__STM32L4xx_HAL_DAC_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ - -
--- a/Inc/stm32l4xx_hal_dac_ex.h Thu Nov 12 20:49:49 2015 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,246 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_dac_ex.h - * @author MCD Application Team - * @version V1.1.0 - * @date 16-September-2015 - * @brief Header file of DAC HAL Extended module. - ****************************************************************************** - * @attention - * - * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_DAC_EX_H -#define __STM32L4xx_HAL_DAC_EX_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal_def.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @addtogroup DACEx - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ - -/** - * @brief HAL State structures definition - */ - -/* Exported constants --------------------------------------------------------*/ - -/** @defgroup DACEx_Exported_Constants DACEx Exported Constants - * @{ - */ - -/** @defgroup DACEx_lfsrunmask_triangleamplitude DACEx lfsrunmask triangleamplitude - * @{ - */ -#define DAC_LFSRUNMASK_BIT0 ((uint32_t)0x00000000) /*!< Unmask DAC channel LFSR bit0 for noise wave generation */ -#define DAC_LFSRUNMASK_BITS1_0 ((uint32_t)DAC_CR_MAMP1_0) /*!< Unmask DAC channel LFSR bit[1:0] for noise wave generation */ -#define DAC_LFSRUNMASK_BITS2_0 ((uint32_t)DAC_CR_MAMP1_1) /*!< Unmask DAC channel LFSR bit[2:0] for noise wave generation */ -#define DAC_LFSRUNMASK_BITS3_0 ((uint32_t)DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0)/*!< Unmask DAC channel LFSR bit[3:0] for noise wave generation */ -#define DAC_LFSRUNMASK_BITS4_0 ((uint32_t)DAC_CR_MAMP1_2) /*!< Unmask DAC channel LFSR bit[4:0] for noise wave generation */ -#define DAC_LFSRUNMASK_BITS5_0 ((uint32_t)DAC_CR_MAMP1_2 | DAC_CR_MAMP1_0) /*!< Unmask DAC channel LFSR bit[5:0] for noise wave generation */ -#define DAC_LFSRUNMASK_BITS6_0 ((uint32_t)DAC_CR_MAMP1_2 | DAC_CR_MAMP1_1) /*!< Unmask DAC channel LFSR bit[6:0] for noise wave generation */ -#define DAC_LFSRUNMASK_BITS7_0 ((uint32_t)DAC_CR_MAMP1_2 | DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Unmask DAC channel LFSR bit[7:0] for noise wave generation */ -#define DAC_LFSRUNMASK_BITS8_0 ((uint32_t)DAC_CR_MAMP1_3) /*!< Unmask DAC channel LFSR bit[8:0] for noise wave generation */ -#define DAC_LFSRUNMASK_BITS9_0 ((uint32_t)DAC_CR_MAMP1_3 | DAC_CR_MAMP1_0) /*!< Unmask DAC channel LFSR bit[9:0] for noise wave generation */ -#define DAC_LFSRUNMASK_BITS10_0 ((uint32_t)DAC_CR_MAMP1_3 | DAC_CR_MAMP1_1) /*!< Unmask DAC channel LFSR bit[10:0] for noise wave generation */ -#define DAC_LFSRUNMASK_BITS11_0 ((uint32_t)DAC_CR_MAMP1_3 | DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Unmask DAC channel LFSR bit[11:0] for noise wave generation */ -#define DAC_TRIANGLEAMPLITUDE_1 ((uint32_t)0x00000000) /*!< Select max triangle amplitude of 1 */ -#define DAC_TRIANGLEAMPLITUDE_3 ((uint32_t)DAC_CR_MAMP1_0) /*!< Select max triangle amplitude of 3 */ -#define DAC_TRIANGLEAMPLITUDE_7 ((uint32_t)DAC_CR_MAMP1_1) /*!< Select max triangle amplitude of 7 */ -#define DAC_TRIANGLEAMPLITUDE_15 ((uint32_t)DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Select max triangle amplitude of 15 */ -#define DAC_TRIANGLEAMPLITUDE_31 ((uint32_t)DAC_CR_MAMP1_2) /*!< Select max triangle amplitude of 31 */ -#define DAC_TRIANGLEAMPLITUDE_63 ((uint32_t)DAC_CR_MAMP1_2 | DAC_CR_MAMP1_0) /*!< Select max triangle amplitude of 63 */ -#define DAC_TRIANGLEAMPLITUDE_127 ((uint32_t)DAC_CR_MAMP1_2 | DAC_CR_MAMP1_1) /*!< Select max triangle amplitude of 127 */ -#define DAC_TRIANGLEAMPLITUDE_255 ((uint32_t)DAC_CR_MAMP1_2 | DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Select max triangle amplitude of 255 */ -#define DAC_TRIANGLEAMPLITUDE_511 ((uint32_t)DAC_CR_MAMP1_3) /*!< Select max triangle amplitude of 511 */ -#define DAC_TRIANGLEAMPLITUDE_1023 ((uint32_t)DAC_CR_MAMP1_3 | DAC_CR_MAMP1_0) /*!< Select max triangle amplitude of 1023 */ -#define DAC_TRIANGLEAMPLITUDE_2047 ((uint32_t)DAC_CR_MAMP1_3 | DAC_CR_MAMP1_1) /*!< Select max triangle amplitude of 2047 */ -#define DAC_TRIANGLEAMPLITUDE_4095 ((uint32_t)DAC_CR_MAMP1_3 | DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Select max triangle amplitude of 4095 */ - -/** - * @} - */ - -/** - * @} - */ - -/* Exported macro ------------------------------------------------------------*/ - - -/* Private macro -------------------------------------------------------------*/ - -/** @defgroup DACEx_Private_Macros DACEx Private Macros - * @{ - */ - -#define IS_DAC_TRIGGER(TRIGGER) (((TRIGGER) == DAC_TRIGGER_NONE) || \ - ((TRIGGER) == DAC_TRIGGER_T2_TRGO) || \ - ((TRIGGER) == DAC_TRIGGER_T4_TRGO) || \ - ((TRIGGER) == DAC_TRIGGER_T5_TRGO) || \ - ((TRIGGER) == DAC_TRIGGER_T6_TRGO) || \ - ((TRIGGER) == DAC_TRIGGER_T7_TRGO) || \ - ((TRIGGER) == DAC_TRIGGER_T8_TRGO) || \ - ((TRIGGER) == DAC_TRIGGER_EXT_IT9) || \ - ((TRIGGER) == DAC_TRIGGER_SOFTWARE)) - -#define IS_DAC_SAMPLETIME(TIME) ((TIME) <= 0x0000003FF) - -#define IS_DAC_HOLDTIME(TIME) ((TIME) <= 0x0000003FF) - -#define IS_DAC_SAMPLEANDHOLD(MODE) (((MODE) == DAC_SAMPLEANDHOLD_DISABLE) || \ - ((MODE) == DAC_SAMPLEANDHOLD_ENABLE)) - - -#define IS_DAC_TRIMMINGVALUE(TRIMMINGVALUE) ((TRIMMINGVALUE) <= 0x1F) - -#define IS_DAC_NEWTRIMMINGVALUE(TRIMMINGVALUE) ((TRIMMINGVALUE) <= 0x1F) - -#define IS_DAC_CHIP_CONNECTION(CONNECT) (((CONNECT) == DAC_CHIPCONNECT_DISABLE) || \ - ((CONNECT) == DAC_CHIPCONNECT_ENABLE)) - -#define IS_DAC_TRIMMING(TRIMMING) (((TRIMMING) == DAC_TRIMMING_FACTORY) || \ - ((TRIMMING) == DAC_TRIMMING_USER)) - -#define IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(VALUE) (((VALUE) == DAC_LFSRUNMASK_BIT0) || \ - ((VALUE) == DAC_LFSRUNMASK_BITS1_0) || \ - ((VALUE) == DAC_LFSRUNMASK_BITS2_0) || \ - ((VALUE) == DAC_LFSRUNMASK_BITS3_0) || \ - ((VALUE) == DAC_LFSRUNMASK_BITS4_0) || \ - ((VALUE) == DAC_LFSRUNMASK_BITS5_0) || \ - ((VALUE) == DAC_LFSRUNMASK_BITS6_0) || \ - ((VALUE) == DAC_LFSRUNMASK_BITS7_0) || \ - ((VALUE) == DAC_LFSRUNMASK_BITS8_0) || \ - ((VALUE) == DAC_LFSRUNMASK_BITS9_0) || \ - ((VALUE) == DAC_LFSRUNMASK_BITS10_0) || \ - ((VALUE) == DAC_LFSRUNMASK_BITS11_0) || \ - ((VALUE) == DAC_TRIANGLEAMPLITUDE_1) || \ - ((VALUE) == DAC_TRIANGLEAMPLITUDE_3) || \ - ((VALUE) == DAC_TRIANGLEAMPLITUDE_7) || \ - ((VALUE) == DAC_TRIANGLEAMPLITUDE_15) || \ - ((VALUE) == DAC_TRIANGLEAMPLITUDE_31) || \ - ((VALUE) == DAC_TRIANGLEAMPLITUDE_63) || \ - ((VALUE) == DAC_TRIANGLEAMPLITUDE_127) || \ - ((VALUE) == DAC_TRIANGLEAMPLITUDE_255) || \ - ((VALUE) == DAC_TRIANGLEAMPLITUDE_511) || \ - ((VALUE) == DAC_TRIANGLEAMPLITUDE_1023) || \ - ((VALUE) == DAC_TRIANGLEAMPLITUDE_2047) || \ - ((VALUE) == DAC_TRIANGLEAMPLITUDE_4095)) - - - -/** - * @} - */ - -/* Exported functions --------------------------------------------------------*/ -/* Extended features functions ***********************************************/ - -/** @addtogroup DACEx_Exported_Functions - * @{ - */ - -/** @addtogroup DACEx_Exported_Functions_Group2 - * @{ - */ -/* IO operation functions *****************************************************/ - -HAL_StatusTypeDef HAL_DACEx_TriangleWaveGenerate(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Amplitude); -HAL_StatusTypeDef HAL_DACEx_NoiseWaveGenerate(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Amplitude); -HAL_StatusTypeDef HAL_DACEx_DualSetValue(DAC_HandleTypeDef* hdac, uint32_t Alignment, uint32_t Data1, uint32_t Data2); - -void HAL_DACEx_ConvCpltCallbackCh2(DAC_HandleTypeDef* hdac); -void HAL_DACEx_ConvHalfCpltCallbackCh2(DAC_HandleTypeDef* hdac); -void HAL_DACEx_ErrorCallbackCh2(DAC_HandleTypeDef* hdac); -void HAL_DACEx_DMAUnderrunCallbackCh2(DAC_HandleTypeDef* hdac); - -HAL_StatusTypeDef HAL_DACEx_SelfCalibrate (DAC_HandleTypeDef* hdac, DAC_ChannelConfTypeDef* sConfig, uint32_t Channel); -HAL_StatusTypeDef HAL_DACEx_SetUserTrimming (DAC_HandleTypeDef* hdac, DAC_ChannelConfTypeDef* sConfig, uint32_t Channel, uint32_t NewTrimmingValue); - -/** - * @} - */ - -/** @addtogroup DACEx_Exported_Functions_Group3 - * @{ - */ -/* Peripheral Control functions ***********************************************/ - -uint32_t HAL_DACEx_DualGetValue(DAC_HandleTypeDef* hdac); -uint32_t HAL_DACEx_GetTrimOffset (DAC_HandleTypeDef *hdac, uint32_t Channel); - -/** - * @} - */ - -/** - * @} - */ - -/** @addtogroup DACEx_Private_Functions - * @{ - */ - -/* DAC_DMAConvCpltCh2 / DAC_DMAErrorCh2 / DAC_DMAHalfConvCpltCh2 */ -/* are called by HAL_DAC_Start_DMA */ -void DAC_DMAConvCpltCh2(DMA_HandleTypeDef *hdma); -void DAC_DMAErrorCh2(DMA_HandleTypeDef *hdma); -void DAC_DMAHalfConvCpltCh2(DMA_HandleTypeDef *hdma); - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /*__STM32L4xx_HAL_DAC_EX_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ -
--- a/Inc/stm32l4xx_hal_firewall.h Thu Nov 12 20:49:49 2015 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,373 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_firewall.h - * @author MCD Application Team - * @version V1.1.0 - * @date 16-September-2015 - * @brief Header file of FIREWALL HAL module. - ****************************************************************************** - * @attention - * - * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_FIREWALL_H -#define __STM32L4xx_HAL_FIREWALL_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal_def.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @addtogroup FIREWALL FIREWALL - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ -/** @defgroup FIREWALL_Exported_Types FIREWALL Exported Types - * @{ - */ - -/** - * @brief FIREWALL Initialization Structure definition - */ -typedef struct -{ - uint32_t CodeSegmentStartAddress; /*!< Protected code segment start address. This value is 24-bit long, the 8 LSB bits are - reserved and forced to 0 in order to allow a 256-byte granularity. */ - - uint32_t CodeSegmentLength; /*!< Protected code segment length in bytes. This value is 22-bit long, the 8 LSB bits are - reserved and forced to 0 for the length to be a multiple of 256 bytes. */ - - uint32_t NonVDataSegmentStartAddress; /*!< Protected non-volatile data segment start address. This value is 24-bit long, the 8 LSB - bits are reserved and forced to 0 in order to allow a 256-byte granularity. */ - - uint32_t NonVDataSegmentLength; /*!< Protected non-volatile data segment length in bytes. This value is 22-bit long, the 8 LSB - bits are reserved and forced to 0 for the length to be a multiple of 256 bytes. */ - - uint32_t VDataSegmentStartAddress; /*!< Protected volatile data segment start address. This value is 17-bit long, the 6 LSB bits - are reserved and forced to 0 in order to allow a 64-byte granularity. */ - - uint32_t VDataSegmentLength; /*!< Protected volatile data segment length in bytes. This value is 17-bit long, the 6 LSB - bits are reserved and forced to 0 for the length to be a multiple of 64 bytes. */ - - uint32_t VolatileDataExecution; /*!< Set VDE bit specifying whether or not the volatile data segment can be executed. - When VDS = 1 (set by parameter VolatileDataShared), VDE bit has no meaning. - This parameter can be a value of @ref FIREWALL_VolatileData_Executable */ - - uint32_t VolatileDataShared; /*!< Set VDS bit in specifying whether or not the volatile data segment can be shared with a - non-protected application code. - This parameter can be a value of @ref FIREWALL_VolatileData_Shared */ - -}FIREWALL_InitTypeDef; - - -/** - * @} - */ - - -/* Exported constants --------------------------------------------------------*/ -/** @defgroup FIREWALL_Exported_Constants FIREWALL Exported Constants - * @{ - */ - -/** @defgroup FIREWALL_VolatileData_Executable FIREWALL volatile data segment execution status - * @{ - */ -#define FIREWALL_VOLATILEDATA_NOT_EXECUTABLE ((uint32_t)0x0000) -#define FIREWALL_VOLATILEDATA_EXECUTABLE ((uint32_t)FW_CR_VDE) -/** - * @} - */ - -/** @defgroup FIREWALL_VolatileData_Shared FIREWALL volatile data segment share status - * @{ - */ -#define FIREWALL_VOLATILEDATA_NOT_SHARED ((uint32_t)0x0000) -#define FIREWALL_VOLATILEDATA_SHARED ((uint32_t)FW_CR_VDS) -/** - * @} - */ - -/** @defgroup FIREWALL_Pre_Arm FIREWALL pre arm status - * @{ - */ -#define FIREWALL_PRE_ARM_RESET ((uint32_t)0x0000) -#define FIREWALL_PRE_ARM_SET ((uint32_t)FW_CR_FPA) - -/** - * @} - */ - -/** - * @} - */ - -/* Private macros --------------------------------------------------------*/ -/** @defgroup FIREWALL_Private_Macros FIREWALL Private Macros - * @{ - */ -#define IS_FIREWALL_CODE_SEGMENT_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && ((ADDRESS) < (FLASH_BASE + FLASH_SIZE))) -#define IS_FIREWALL_CODE_SEGMENT_LENGTH(ADDRESS, LENGTH) (((ADDRESS) + (LENGTH)) <= (FLASH_BASE + FLASH_SIZE)) - -#define IS_FIREWALL_NONVOLATILEDATA_SEGMENT_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && ((ADDRESS) < (FLASH_BASE + FLASH_SIZE))) -#define IS_FIREWALL_NONVOLATILEDATA_SEGMENT_LENGTH(ADDRESS, LENGTH) (((ADDRESS) + (LENGTH)) <= (FLASH_BASE + FLASH_SIZE)) - -#define IS_FIREWALL_VOLATILEDATA_SEGMENT_ADDRESS(ADDRESS) (((ADDRESS) >= SRAM1_BASE) && ((ADDRESS) < (SRAM1_BASE + SRAM1_SIZE_MAX))) -#define IS_FIREWALL_VOLATILEDATA_SEGMENT_LENGTH(ADDRESS, LENGTH) (((ADDRESS) + (LENGTH)) <= (SRAM1_BASE + SRAM1_SIZE_MAX)) - - -#define IS_FIREWALL_VOLATILEDATA_SHARE(SHARE) (((SHARE) == FIREWALL_VOLATILEDATA_NOT_SHARED) || \ - ((SHARE) == FIREWALL_VOLATILEDATA_SHARED)) - -#define IS_FIREWALL_VOLATILEDATA_EXECUTE(EXECUTE) (((EXECUTE) == FIREWALL_VOLATILEDATA_NOT_EXECUTABLE) || \ - ((EXECUTE) == FIREWALL_VOLATILEDATA_EXECUTABLE)) -/** - * @} - */ - - -/* Exported macros -----------------------------------------------------------*/ -/** @defgroup FIREWALL_Exported_Macros FIREWALL Exported Macros - * @{ - */ - -/** @brief Check whether the FIREWALL is enabled or not. - * @retval FIREWALL enabling status (TRUE or FALSE). - */ -#define __HAL_FIREWALL_IS_ENABLED() HAL_IS_BIT_CLR(SYSCFG->CFGR1, SYSCFG_CFGR1_FWDIS) - - -/** @brief Enable FIREWALL pre arm. - * @note When FPA bit is set, any code executed outside the protected segment - * closes the Firewall, otherwise it generates a system reset. - * @note This macro provides the same service as HAL_FIREWALL_EnablePreArmFlag() API - * but can be executed inside a code area protected by the Firewall. - * @note This macro can be executed whatever the Firewall state (opened or closed) when - * NVDSL register is equal to 0. Otherwise (when NVDSL register is different from - * 0, that is, when the non volatile data segment is defined), the macro can be - * executed only when the Firewall is opened. - */ -#define __HAL_FIREWALL_PREARM_ENABLE() \ - do { \ - __IO uint32_t tmpreg; \ - SET_BIT(FIREWALL->CR, FW_CR_FPA) ; \ - /* Read bit back to ensure it is taken into account by IP */ \ - /* (introduce proper delay inside macro execution) */ \ - tmpreg = READ_BIT(FIREWALL->CR, FW_CR_FPA) ; \ - UNUSED(tmpreg); \ - } while(0) - - - -/** @brief Disable FIREWALL pre arm. - * @note When FPA bit is set, any code executed outside the protected segment - * closes the Firewall, otherwise, it generates a system reset. - * @note This macro provides the same service as HAL_FIREWALL_DisablePreArmFlag() API - * but can be executed inside a code area protected by the Firewall. - * @note This macro can be executed whatever the Firewall state (opened or closed) when - * NVDSL register is equal to 0. Otherwise (when NVDSL register is different from - * 0, that is, when the non volatile data segment is defined), the macro can be - * executed only when the Firewall is opened. - */ -#define __HAL_FIREWALL_PREARM_DISABLE() \ - do { \ - __IO uint32_t tmpreg; \ - CLEAR_BIT(FIREWALL->CR, FW_CR_FPA) ; \ - /* Read bit back to ensure it is taken into account by IP */ \ - /* (introduce proper delay inside macro execution) */ \ - tmpreg = READ_BIT(FIREWALL->CR, FW_CR_FPA) ; \ - UNUSED(tmpreg); \ - } while(0) - -/** @brief Enable volatile data sharing in setting VDS bit. - * @note When VDS bit is set, the volatile data segment is shared with non-protected - * application code. It can be accessed whatever the Firewall state (opened or closed). - * @note This macro can be executed inside a code area protected by the Firewall. - * @note This macro can be executed whatever the Firewall state (opened or closed) when - * NVDSL register is equal to 0. Otherwise (when NVDSL register is different from - * 0, that is, when the non volatile data segment is defined), the macro can be - * executed only when the Firewall is opened. - */ -#define __HAL_FIREWALL_VOLATILEDATA_SHARED_ENABLE() \ - do { \ - __IO uint32_t tmpreg; \ - SET_BIT(FIREWALL->CR, FW_CR_VDS) ; \ - /* Read bit back to ensure it is taken into account by IP */ \ - /* (introduce proper delay inside macro execution) */ \ - tmpreg = READ_BIT(FIREWALL->CR, FW_CR_VDS) ; \ - UNUSED(tmpreg); \ - } while(0) - -/** @brief Disable volatile data sharing in resetting VDS bit. - * @note When VDS bit is reset, the volatile data segment is not shared and cannot be - * hit by a non protected executable code when the Firewall is closed. If it is - * accessed in such a condition, a system reset is generated by the Firewall. - * @note This macro can be executed inside a code area protected by the Firewall. - * @note This macro can be executed whatever the Firewall state (opened or closed) when - * NVDSL register is equal to 0. Otherwise (when NVDSL register is different from - * 0, that is, when the non volatile data segment is defined), the macro can be - * executed only when the Firewall is opened. - */ -#define __HAL_FIREWALL_VOLATILEDATA_SHARED_DISABLE() \ - do { \ - __IO uint32_t tmpreg; \ - CLEAR_BIT(FIREWALL->CR, FW_CR_VDS) ; \ - /* Read bit back to ensure it is taken into account by IP */ \ - /* (introduce proper delay inside macro execution) */ \ - tmpreg = READ_BIT(FIREWALL->CR, FW_CR_VDS) ; \ - UNUSED(tmpreg); \ - } while(0) - -/** @brief Enable volatile data execution in setting VDE bit. - * @note VDE bit is ignored when VDS is set. IF VDS = 1, the Volatile data segment can be - * executed whatever the VDE bit value. - * @note When VDE bit is set (with VDS = 0), the volatile data segment is executable. When - * the Firewall call is closed, a "call gate" entry procedure is required to open - * first the Firewall. - * @note This macro can be executed inside a code area protected by the Firewall. - * @note This macro can be executed whatever the Firewall state (opened or closed) when - * NVDSL register is equal to 0. Otherwise (when NVDSL register is different from - * 0, that is, when the non volatile data segment is defined), the macro can be - * executed only when the Firewall is opened. - */ -#define __HAL_FIREWALL_VOLATILEDATA_EXECUTION_ENABLE() \ - do { \ - __IO uint32_t tmpreg; \ - SET_BIT(FIREWALL->CR, FW_CR_VDE) ; \ - /* Read bit back to ensure it is taken into account by IP */ \ - /* (introduce proper delay inside macro execution) */ \ - tmpreg = READ_BIT(FIREWALL->CR, FW_CR_VDE) ; \ - UNUSED(tmpreg); \ - } while(0) - -/** @brief Disable volatile data execution in resetting VDE bit. - * @note VDE bit is ignored when VDS is set. IF VDS = 1, the Volatile data segment can be - * executed whatever the VDE bit value. - * @note When VDE bit is reset (with VDS = 0), the volatile data segment cannot be executed. - * @note This macro can be executed inside a code area protected by the Firewall. - * @note This macro can be executed whatever the Firewall state (opened or closed) when - * NVDSL register is equal to 0. Otherwise (when NVDSL register is different from - * 0, that is, when the non volatile data segment is defined), the macro can be - * executed only when the Firewall is opened. - */ -#define __HAL_FIREWALL_VOLATILEDATA_EXECUTION_DISABLE() \ - do { \ - __IO uint32_t tmpreg; \ - CLEAR_BIT(FIREWALL->CR, FW_CR_VDE) ; \ - /* Read bit back to ensure it is taken into account by IP */ \ - /* (introduce proper delay inside macro execution) */ \ - tmpreg = READ_BIT(FIREWALL->CR, FW_CR_VDE) ; \ - UNUSED(tmpreg); \ - } while(0) - - -/** @brief Check whether or not the volatile data segment is shared. - * @note This macro can be executed inside a code area protected by the Firewall. - * @note This macro can be executed whatever the Firewall state (opened or closed) when - * NVDSL register is equal to 0. Otherwise (when NVDSL register is different from - * 0, that is, when the non volatile data segment is defined), the macro can be - * executed only when the Firewall is opened. - * @retval VDS bit setting status (TRUE or FALSE). - */ -#define __HAL_FIREWALL_GET_VOLATILEDATA_SHARED() ((FIREWALL->CR & FW_CR_VDS) == FW_CR_VDS) - -/** @brief Check whether or not the volatile data segment is declared executable. - * @note This macro can be executed inside a code area protected by the Firewall. - * @note This macro can be executed whatever the Firewall state (opened or closed) when - * NVDSL register is equal to 0. Otherwise (when NVDSL register is different from - * 0, that is, when the non volatile data segment is defined), the macro can be - * executed only when the Firewall is opened. - * @retval VDE bit setting status (TRUE or FALSE). - */ -#define __HAL_FIREWALL_GET_VOLATILEDATA_EXECUTION() ((FIREWALL->CR & FW_CR_VDE) == FW_CR_VDE) - -/** @brief Check whether or not the Firewall pre arm bit is set. - * @note This macro can be executed inside a code area protected by the Firewall. - * @note This macro can be executed whatever the Firewall state (opened or closed) when - * NVDSL register is equal to 0. Otherwise (when NVDSL register is different from - * 0, that is, when the non volatile data segment is defined), the macro can be - * executed only when the Firewall is opened. - * @retval FPA bit setting status (TRUE or FALSE). - */ -#define __HAL_FIREWALL_GET_PREARM() ((FIREWALL->CR & FW_CR_FPA) == FW_CR_FPA) - - -/** - * @} - */ - -/* Exported functions --------------------------------------------------------*/ - -/** @addtogroup FIREWALL_Exported_Functions FIREWALL Exported Functions - * @{ - */ - -/** @addtogroup FIREWALL_Exported_Functions_Group1 Initialization Functions - * @brief Initialization and Configuration Functions - * @{ - */ - -/* Initialization functions ********************************/ -HAL_StatusTypeDef HAL_FIREWALL_Config(FIREWALL_InitTypeDef * fw_init); -void HAL_FIREWALL_GetConfig(FIREWALL_InitTypeDef * fw_config); -void HAL_FIREWALL_EnableFirewall(void); -void HAL_FIREWALL_EnablePreArmFlag(void); -void HAL_FIREWALL_DisablePreArmFlag(void); - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32L4xx_HAL_FIREWALL_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ -
--- a/Inc/stm32l4xx_hal_hcd.h Thu Nov 12 20:49:49 2015 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,262 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_hcd.h - * @author MCD Application Team - * @version V1.1.0 - * @date 16-September-2015 - * @brief Header file of HCD HAL module. - ****************************************************************************** - * @attention - * - * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_HCD_H -#define __STM32L4xx_HAL_HCD_H - -#ifdef __cplusplus - extern "C" { -#endif - -#if defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_ll_usb.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @addtogroup HCD - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ -/** @defgroup HCD_Exported_Types HCD Exported Types - * @{ - */ - -/** @defgroup HCD_Exported_Types_Group1 HCD State Structure definition - * @{ - */ -typedef enum -{ - HAL_HCD_STATE_RESET = 0x00, - HAL_HCD_STATE_READY = 0x01, - HAL_HCD_STATE_ERROR = 0x02, - HAL_HCD_STATE_BUSY = 0x03, - HAL_HCD_STATE_TIMEOUT = 0x04 -} HCD_StateTypeDef; - -typedef USB_OTG_GlobalTypeDef HCD_TypeDef; -typedef USB_OTG_CfgTypeDef HCD_InitTypeDef; -typedef USB_OTG_HCTypeDef HCD_HCTypeDef ; -typedef USB_OTG_URBStateTypeDef HCD_URBStateTypeDef ; -typedef USB_OTG_HCStateTypeDef HCD_HCStateTypeDef ; -/** - * @} - */ - -/** @defgroup HCD_Exported_Types_Group2 HCD Handle Structure definition - * @{ - */ -typedef struct -{ - HCD_TypeDef *Instance; /*!< Register base address */ - HCD_InitTypeDef Init; /*!< HCD required parameters */ - HCD_HCTypeDef hc[15]; /*!< Host channels parameters */ - HAL_LockTypeDef Lock; /*!< HCD peripheral status */ - __IO HCD_StateTypeDef State; /*!< HCD communication state */ - void *pData; /*!< Pointer Stack Handler */ - -} HCD_HandleTypeDef; -/** - * @} - */ - -/** - * @} - */ - -/* Exported constants --------------------------------------------------------*/ -/** @defgroup HCD_Exported_Constants HCD Exported Constants - * @{ - */ - -/** @defgroup HCD_Speed HCD Speed - * @{ - */ -#define HCD_SPEED_HIGH 0 -#define HCD_SPEED_LOW 2 -#define HCD_SPEED_FULL 3 -/** - * @} - */ - -/** @defgroup HCD_PHY_Module HCD PHY Module - * @{ - */ -#define HCD_PHY_EMBEDDED 1 -/** - * @} - */ - -/** - * @} - */ - -/* Exported macro ------------------------------------------------------------*/ -/** @defgroup HCD_Exported_Macros HCD Exported Macros - * @brief macros to handle interrupts and specific clock configurations - * @{ - */ -#define __HAL_HCD_ENABLE(__HANDLE__) USB_EnableGlobalInt ((__HANDLE__)->Instance) -#define __HAL_HCD_DISABLE(__HANDLE__) USB_DisableGlobalInt ((__HANDLE__)->Instance) - -#define __HAL_HCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__)) -#define __HAL_HCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->GINTSTS) = (__INTERRUPT__)) -#define __HAL_HCD_IS_INVALID_INTERRUPT(__HANDLE__) (USB_ReadInterrupts((__HANDLE__)->Instance) == 0) - -#define __HAL_HCD_CLEAR_HC_INT(chnum, __INTERRUPT__) (USBx_HC(chnum)->HCINT = (__INTERRUPT__)) -#define __HAL_HCD_MASK_HALT_HC_INT(chnum) (USBx_HC(chnum)->HCINTMSK &= ~USB_OTG_HCINTMSK_CHHM) -#define __HAL_HCD_UNMASK_HALT_HC_INT(chnum) (USBx_HC(chnum)->HCINTMSK |= USB_OTG_HCINTMSK_CHHM) -#define __HAL_HCD_MASK_ACK_HC_INT(chnum) (USBx_HC(chnum)->HCINTMSK &= ~USB_OTG_HCINTMSK_ACKM) -#define __HAL_HCD_UNMASK_ACK_HC_INT(chnum) (USBx_HC(chnum)->HCINTMSK |= USB_OTG_HCINTMSK_ACKM) -/** - * @} - */ - -/* Exported functions --------------------------------------------------------*/ -/** @addtogroup HCD_Exported_Functions HCD Exported Functions - * @{ - */ - -/* Initialization/de-initialization functions ********************************/ -/** @addtogroup HCD_Exported_Functions_Group1 Initialization and de-initialization functions - * @{ - */ -HAL_StatusTypeDef HAL_HCD_Init(HCD_HandleTypeDef *hhcd); -HAL_StatusTypeDef HAL_HCD_DeInit (HCD_HandleTypeDef *hhcd); -HAL_StatusTypeDef HAL_HCD_HC_Init(HCD_HandleTypeDef *hhcd, - uint8_t ch_num, - uint8_t epnum, - uint8_t dev_address, - uint8_t speed, - uint8_t ep_type, - uint16_t mps); - -HAL_StatusTypeDef HAL_HCD_HC_Halt(HCD_HandleTypeDef *hhcd, - uint8_t ch_num); - -void HAL_HCD_MspInit(HCD_HandleTypeDef *hhcd); -void HAL_HCD_MspDeInit(HCD_HandleTypeDef *hhcd); -/** - * @} - */ - -/* I/O operation functions ***************************************************/ -/** @addtogroup HCD_Exported_Functions_Group2 Input and Output operation functions - * @{ - */ -HAL_StatusTypeDef HAL_HCD_HC_SubmitRequest(HCD_HandleTypeDef *hhcd, - uint8_t pipe, - uint8_t direction , - uint8_t ep_type, - uint8_t token, - uint8_t* pbuff, - uint16_t length, - uint8_t do_ping); - - /* Non-Blocking mode: Interrupt */ -void HAL_HCD_IRQHandler(HCD_HandleTypeDef *hhcd); -void HAL_HCD_SOF_Callback(HCD_HandleTypeDef *hhcd); -void HAL_HCD_Connect_Callback(HCD_HandleTypeDef *hhcd); -void HAL_HCD_Disconnect_Callback(HCD_HandleTypeDef *hhcd); -void HAL_HCD_HC_NotifyURBChange_Callback(HCD_HandleTypeDef *hhcd, - uint8_t chnum, - HCD_URBStateTypeDef urb_state); -/** - * @} - */ - -/* Peripheral Control functions **********************************************/ -/** @addtogroup HCD_Exported_Functions_Group3 Peripheral Control functions - * @{ - */ -HAL_StatusTypeDef HAL_HCD_ResetPort(HCD_HandleTypeDef *hhcd); -HAL_StatusTypeDef HAL_HCD_Start(HCD_HandleTypeDef *hhcd); -HAL_StatusTypeDef HAL_HCD_Stop(HCD_HandleTypeDef *hhcd); -/** - * @} - */ - -/* Peripheral State functions ************************************************/ -/** @addtogroup HCD_Exported_Functions_Group4 Peripheral State functions - * @{ - */ -HCD_StateTypeDef HAL_HCD_GetState(HCD_HandleTypeDef *hhcd); -HCD_URBStateTypeDef HAL_HCD_HC_GetURBState(HCD_HandleTypeDef *hhcd, uint8_t chnum); -uint32_t HAL_HCD_HC_GetXferCount(HCD_HandleTypeDef *hhcd, uint8_t chnum); -HCD_HCStateTypeDef HAL_HCD_HC_GetState(HCD_HandleTypeDef *hhcd, uint8_t chnum); -uint32_t HAL_HCD_GetCurrentFrame(HCD_HandleTypeDef *hhcd); -uint32_t HAL_HCD_GetCurrentSpeed(HCD_HandleTypeDef *hhcd); -/** - * @} - */ - -/** - * @} - */ - -/* Private macros ------------------------------------------------------------*/ -/** @defgroup HCD_Private_Macros HCD Private Macros - * @{ - */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -#endif /* STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32L4xx_HAL_HCD_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ -
--- a/Inc/stm32l4xx_hal_irda.h Thu Nov 12 20:49:49 2015 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,798 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_irda.h - * @author MCD Application Team - * @version V1.1.0 - * @date 16-September-2015 - * @brief Header file of IRDA HAL module. - ****************************************************************************** - * @attention - * - * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_IRDA_H -#define __STM32L4xx_HAL_IRDA_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal_def.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @addtogroup IRDA - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ -/** @defgroup IRDA_Exported_Types IRDA Exported Types - * @{ - */ - -/** - * @brief IRDA Init Structure definition - */ -typedef struct -{ - uint32_t BaudRate; /*!< This member configures the IRDA communication baud rate. - The baud rate register is computed using the following formula: - Baud Rate Register = ((PCLKx) / ((hirda->Init.BaudRate))) */ - - uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame. - This parameter can be a value of @ref IRDA_Word_Length */ - - uint32_t Parity; /*!< Specifies the parity mode. - This parameter can be a value of @ref IRDA_Parity - @note When parity is enabled, the computed parity is inserted - at the MSB position of the transmitted data (9th bit when - the word length is set to 9 data bits; 8th bit when the - word length is set to 8 data bits). */ - - uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled. - This parameter can be a value of @ref IRDA_Transfer_Mode */ - - uint8_t Prescaler; /*!< Specifies the Prescaler value for dividing the UART/USART source clock - to achieve low-power frequency. - @note Prescaler value 0 is forbidden */ - - uint16_t PowerMode; /*!< Specifies the IRDA power mode. - This parameter can be a value of @ref IRDA_Low_Power */ -}IRDA_InitTypeDef; - -/** - * @brief HAL IRDA State structures definition - */ -typedef enum -{ - HAL_IRDA_STATE_RESET = 0x00, /*!< Peripheral is not initialized */ - HAL_IRDA_STATE_READY = 0x01, /*!< Peripheral Initialized and ready for use */ - HAL_IRDA_STATE_BUSY = 0x02, /*!< an internal process is ongoing */ - HAL_IRDA_STATE_BUSY_TX = 0x12, /*!< Data Transmission process is ongoing */ - HAL_IRDA_STATE_BUSY_RX = 0x22, /*!< Data Reception process is ongoing */ - HAL_IRDA_STATE_BUSY_TX_RX = 0x32, /*!< Data Transmission and Reception process is ongoing */ - HAL_IRDA_STATE_TIMEOUT = 0x03, /*!< Timeout state */ - HAL_IRDA_STATE_ERROR = 0x04 /*!< Error */ -}HAL_IRDA_StateTypeDef; - -/** - * @brief HAL IRDA Error Code structure definition - */ -typedef enum -{ - HAL_IRDA_ERROR_NONE = 0x00, /*!< No error */ - HAL_IRDA_ERROR_PE = 0x01, /*!< Parity error */ - HAL_IRDA_ERROR_NE = 0x02, /*!< Noise error */ - HAL_IRDA_ERROR_FE = 0x04, /*!< frame error */ - HAL_IRDA_ERROR_ORE = 0x08, /*!< Overrun error */ - HAL_IRDA_ERROR_DMA = 0x10 /*!< DMA transfer error */ -}HAL_IRDA_ErrorTypeDef; - -/** - * @brief IRDA clock sources definition - */ -typedef enum -{ - IRDA_CLOCKSOURCE_PCLK1 = 0x00, /*!< PCLK1 clock source */ - IRDA_CLOCKSOURCE_PCLK2 = 0x01, /*!< PCLK2 clock source */ - IRDA_CLOCKSOURCE_HSI = 0x02, /*!< HSI clock source */ - IRDA_CLOCKSOURCE_SYSCLK = 0x04, /*!< SYSCLK clock source */ - IRDA_CLOCKSOURCE_LSE = 0x08, /*!< LSE clock source */ - IRDA_CLOCKSOURCE_UNDEFINED = 0x10 /*!< Undefined clock source */ -}IRDA_ClockSourceTypeDef; - -/** - * @brief IRDA handle Structure definition - */ -typedef struct -{ - USART_TypeDef *Instance; /*!< USART registers base address */ - - IRDA_InitTypeDef Init; /*!< IRDA communication parameters */ - - uint8_t *pTxBuffPtr; /*!< Pointer to IRDA Tx transfer Buffer */ - - uint16_t TxXferSize; /*!< IRDA Tx Transfer size */ - - uint16_t TxXferCount; /* !<IRDA Tx Transfer Counter */ - - uint8_t *pRxBuffPtr; /*!< Pointer to IRDA Rx transfer Buffer */ - - uint16_t RxXferSize; /*!< IRDA Rx Transfer size */ - - uint16_t RxXferCount; /*!< IRDA Rx Transfer Counter */ - - uint16_t Mask; /*!< USART RX RDR register mask */ - - DMA_HandleTypeDef *hdmatx; /*!< IRDA Tx DMA Handle parameters */ - - DMA_HandleTypeDef *hdmarx; /*!< IRDA Rx DMA Handle parameters */ - - HAL_LockTypeDef Lock; /*!< Locking object */ - - HAL_IRDA_StateTypeDef State; /*!< IRDA communication state */ - - uint32_t ErrorCode; /*!< IRDA Error code */ - -}IRDA_HandleTypeDef; - -/** - * @brief IRDA Configuration enumeration values definition - */ -typedef enum -{ - IRDA_BAUDRATE = 0x00, /*!< IRDA Baud rate */ - IRDA_PARITY = 0x01, /*!< IRDA frame parity */ - IRDA_WORDLENGTH = 0x02, /*!< IRDA frame length */ - IRDA_MODE = 0x03, /*!< IRDA communication mode */ - IRDA_PRESCALER = 0x04, /*!< IRDA prescaling */ - IRDA_POWERMODE = 0x05 /*!< IRDA power mode */ -}IRDA_ControlTypeDef; - -/** - * @} - */ - -/* Exported constants --------------------------------------------------------*/ -/** @defgroup IRDA_Exported_Constants IRDA Exported Constants - * @{ - */ - -/** @defgroup IRDA_Word_Length IRDA Word Length - * @{ - */ -#define IRDA_WORDLENGTH_7B ((uint32_t)USART_CR1_M1) /*!< 7-bit long frame */ -#define IRDA_WORDLENGTH_8B ((uint32_t)0x00000000) /*!< 8-bit long frame */ -#define IRDA_WORDLENGTH_9B ((uint32_t)USART_CR1_M0) /*!< 9-bit long frame */ -/** - * @} - */ - -/** @defgroup IRDA_Parity IRDA Parity - * @{ - */ -#define IRDA_PARITY_NONE ((uint32_t)0x00000000) /*!< No parity */ -#define IRDA_PARITY_EVEN ((uint32_t)USART_CR1_PCE) /*!< Even parity */ -#define IRDA_PARITY_ODD ((uint32_t)(USART_CR1_PCE | USART_CR1_PS)) /*!< Odd parity */ -/** - * @} - */ - -/** @defgroup IRDA_Transfer_Mode IRDA Transfer Mode - * @{ - */ -#define IRDA_MODE_RX ((uint32_t)USART_CR1_RE) /*!< RX mode */ -#define IRDA_MODE_TX ((uint32_t)USART_CR1_TE) /*!< TX mode */ -#define IRDA_MODE_TX_RX ((uint32_t)(USART_CR1_TE |USART_CR1_RE)) /*!< RX and TX mode */ -/** - * @} - */ - -/** @defgroup IRDA_Low_Power IRDA Low Power - * @{ - */ -#define IRDA_POWERMODE_NORMAL ((uint32_t)0x00000000) /*!< IRDA normal power mode */ -#define IRDA_POWERMODE_LOWPOWER ((uint32_t)USART_CR3_IRLP) /*!< IRDA low power mode */ -/** - * @} - */ - - /** @defgroup IRDA_State IRDA State - * @{ - */ -#define IRDA_STATE_DISABLE ((uint32_t)0x00000000) /*!< IRDA disabled */ -#define IRDA_STATE_ENABLE ((uint32_t)USART_CR1_UE) /*!< IRDA enabled */ -/** - * @} - */ - - /** @defgroup IRDA_Mode IRDA Mode - * @{ - */ -#define IRDA_MODE_DISABLE ((uint32_t)0x00000000) /*!< Associated UART disabled in IRDA mode */ -#define IRDA_MODE_ENABLE ((uint32_t)USART_CR3_IREN) /*!< Associated UART enabled in IRDA mode */ -/** - * @} - */ - -/** @defgroup IRDA_One_Bit IRDA One Bit Sampling - * @{ - */ -#define IRDA_ONE_BIT_SAMPLE_DISABLE ((uint32_t)0x00000000) /*!< One-bit sampling disabled */ -#define IRDA_ONE_BIT_SAMPLE_ENABLE ((uint32_t)USART_CR3_ONEBIT) /*!< One-bit sampling enabled */ -/** - * @} - */ - -/** @defgroup IRDA_DMA_Tx IRDA DMA Tx - * @{ - */ -#define IRDA_DMA_TX_DISABLE ((uint32_t)0x00000000) /*!< IRDA DMA TX disabled */ -#define IRDA_DMA_TX_ENABLE ((uint32_t)USART_CR3_DMAT) /*!< IRDA DMA TX enabled */ -/** - * @} - */ - -/** @defgroup IRDA_DMA_Rx IRDA DMA Rx - * @{ - */ -#define IRDA_DMA_RX_DISABLE ((uint32_t)0x00000000) /*!< IRDA DMA RX disabled */ -#define IRDA_DMA_RX_ENABLE ((uint32_t)USART_CR3_DMAR) /*!< IRDA DMA RX enabled */ -/** - * @} - */ - -/** @defgroup IRDA_Request_Parameters IRDA Request Parameters - * @{ - */ -#define IRDA_AUTOBAUD_REQUEST ((uint16_t)USART_RQR_ABRRQ) /*!< Auto-Baud Rate Request */ -#define IRDA_RXDATA_FLUSH_REQUEST ((uint16_t)USART_RQR_RXFRQ) /*!< Receive Data flush Request */ -#define IRDA_TXDATA_FLUSH_REQUEST ((uint16_t)USART_RQR_TXFRQ) /*!< Transmit data flush Request */ -/** - * @} - */ - -/** @defgroup IRDA_Flags IRDA Flags - * Elements values convention: 0xXXXX - * - 0xXXXX : Flag mask in the ISR register - * @{ - */ -#define IRDA_FLAG_REACK ((uint32_t)0x00400000) /*!< IRDA Receive enable acknowledge flag */ -#define IRDA_FLAG_TEACK ((uint32_t)0x00200000) /*!< IRDA Transmit enable acknowledge flag */ -#define IRDA_FLAG_BUSY ((uint32_t)0x00010000) /*!< IRDA Busy flag */ -#define IRDA_FLAG_ABRF ((uint32_t)0x00008000) /*!< IRDA Auto baud rate flag */ -#define IRDA_FLAG_ABRE ((uint32_t)0x00004000) /*!< IRDA Auto baud rate error */ -#define IRDA_FLAG_TXE ((uint32_t)0x00000080) /*!< IRDA Transmit data register empty */ -#define IRDA_FLAG_TC ((uint32_t)0x00000040) /*!< IRDA Transmission complete */ -#define IRDA_FLAG_RXNE ((uint32_t)0x00000020) /*!< IRDA Read data register not empty */ -#define IRDA_FLAG_ORE ((uint32_t)0x00000008) /*!< IRDA Overrun error */ -#define IRDA_FLAG_NE ((uint32_t)0x00000004) /*!< IRDA Noise error */ -#define IRDA_FLAG_FE ((uint32_t)0x00000002) /*!< IRDA Noise error */ -#define IRDA_FLAG_PE ((uint32_t)0x00000001) /*!< IRDA Parity error */ -/** - * @} - */ - -/** @defgroup IRDA_Interrupt_definition IRDA Interrupts Definition - * Elements values convention: 0000ZZZZ0XXYYYYYb - * - YYYYY : Interrupt source position in the XX register (5bits) - * - XX : Interrupt source register (2bits) - * - 01: CR1 register - * - 10: CR2 register - * - 11: CR3 register - * - ZZZZ : Flag position in the ISR register(4bits) - * @{ - */ -#define IRDA_IT_PE ((uint16_t)0x0028) /*!< IRDA Parity error interruption */ -#define IRDA_IT_TXE ((uint16_t)0x0727) /*!< IRDA Transmit data register empty interruption */ -#define IRDA_IT_TC ((uint16_t)0x0626) /*!< IRDA Transmission complete interruption */ -#define IRDA_IT_RXNE ((uint16_t)0x0525) /*!< IRDA Read data register not empty interruption */ -#define IRDA_IT_IDLE ((uint16_t)0x0424) /*!< IRDA Idle interruption */ - -/* Elements values convention: 000000000XXYYYYYb - - YYYYY : Interrupt source position in the XX register (5bits) - - XX : Interrupt source register (2bits) - - 01: CR1 register - - 10: CR2 register - - 11: CR3 register */ -#define IRDA_IT_ERR ((uint16_t)0x0060) /*!< IRDA Error interruption */ - -/* Elements values convention: 0000ZZZZ00000000b - - ZZZZ : Flag position in the ISR register(4bits) */ -#define IRDA_IT_ORE ((uint16_t)0x0300) /*!< IRDA Overrun error interruption */ -#define IRDA_IT_NE ((uint16_t)0x0200) /*!< IRDA Noise error interruption */ -#define IRDA_IT_FE ((uint16_t)0x0100) /*!< IRDA Frame error interruption */ -/** - * @} - */ - -/** @defgroup IRDA_IT_CLEAR_Flags IRDA Interruption Clear Flags - * @{ - */ -#define IRDA_CLEAR_PEF USART_ICR_PECF /*!< Parity Error Clear Flag */ -#define IRDA_CLEAR_FEF USART_ICR_FECF /*!< Framing Error Clear Flag */ -#define IRDA_CLEAR_NEF USART_ICR_NCF /*!< Noise detected Clear Flag */ -#define IRDA_CLEAR_OREF USART_ICR_ORECF /*!< OverRun Error Clear Flag */ -#define IRDA_CLEAR_TCF USART_ICR_TCCF /*!< Transmission Complete Clear Flag */ -/** - * @} - */ - -/** @defgroup IRDA_Interruption_Mask IRDA interruptions flags mask - * @{ - */ -#define IRDA_IT_MASK ((uint16_t)0x001F) /*!< IRDA Interruptions flags mask */ -/** - * @} - */ - -/** - * @} - */ - - -/* Exported macros -----------------------------------------------------------*/ -/** @defgroup IRDA_Exported_Macros IRDA Exported Macros - * @{ - */ - -/** @brief Reset IRDA handle state. - * @param __HANDLE__: IRDA handle. - * @retval None - */ -#define __HAL_IRDA_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_IRDA_STATE_RESET) - -/** @brief Flush the IRDA DR register. - * @param __HANDLE__: specifies the IRDA Handle. - * @retval None - */ -#define __HAL_IRDA_FLUSH_DRREGISTER(__HANDLE__) \ - do{ \ - SET_BIT((__HANDLE__)->Instance->RQR, IRDA_RXDATA_FLUSH_REQUEST); \ - SET_BIT((__HANDLE__)->Instance->RQR, IRDA_TXDATA_FLUSH_REQUEST); \ - } while(0) - - -/** @brief Clear the specified IRDA pending flag. - * @param __HANDLE__: specifies the IRDA Handle. - * @param __FLAG__: specifies the flag to check. - * This parameter can be any combination of the following values: - * @arg IRDA_CLEAR_PEF - * @arg IRDA_CLEAR_FEF - * @arg IRDA_CLEAR_NEF - * @arg IRDA_CLEAR_OREF - * @arg IRDA_CLEAR_TCF - * @arg IRDA_CLEAR_IDLEF - * @retval None - */ -#define __HAL_IRDA_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__)) - -/** @brief Clear the IRDA PE pending flag. - * @param __HANDLE__: specifies the IRDA Handle. - * @retval None - */ -#define __HAL_IRDA_CLEAR_PEFLAG(__HANDLE__) __HAL_IRDA_CLEAR_FLAG((__HANDLE__), IRDA_CLEAR_PEF) - - -/** @brief Clear the IRDA FE pending flag. - * @param __HANDLE__: specifies the IRDA Handle. - * @retval None - */ -#define __HAL_IRDA_CLEAR_FEFLAG(__HANDLE__) __HAL_IRDA_CLEAR_FLAG((__HANDLE__), IRDA_CLEAR_FEF) - -/** @brief Clear the IRDA NE pending flag. - * @param __HANDLE__: specifies the IRDA Handle. - * @retval None - */ -#define __HAL_IRDA_CLEAR_NEFLAG(__HANDLE__) __HAL_IRDA_CLEAR_FLAG((__HANDLE__), IRDA_CLEAR_NEF) - -/** @brief Clear the IRDA ORE pending flag. - * @param __HANDLE__: specifies the IRDA Handle. - * @retval None - */ -#define __HAL_IRDA_CLEAR_OREFLAG(__HANDLE__) __HAL_IRDA_CLEAR_FLAG((__HANDLE__), IRDA_CLEAR_OREF) - -/** @brief Clear the IRDA IDLE pending flag. - * @param __HANDLE__: specifies the IRDA Handle. - * @retval None - */ -#define __HAL_IRDA_CLEAR_IDLEFLAG(__HANDLE__) __HAL_IRDA_CLEAR_FLAG((__HANDLE__), IRDA_CLEAR_IDLEF) - -/** @brief Check whether the specified IRDA flag is set or not. - * @param __HANDLE__: specifies the IRDA Handle. - * @param __FLAG__: specifies the flag to check. - * This parameter can be one of the following values: - * @arg IRDA_FLAG_REACK: Receive enable acknowledge flag - * @arg IRDA_FLAG_TEACK: Transmit enable acknowledge flag - * @arg IRDA_FLAG_BUSY: Busy flag - * @arg IRDA_FLAG_ABRF: Auto Baud rate detection flag - * @arg IRDA_FLAG_ABRE: Auto Baud rate detection error flag - * @arg IRDA_FLAG_TXE: Transmit data register empty flag - * @arg IRDA_FLAG_TC: Transmission Complete flag - * @arg IRDA_FLAG_RXNE: Receive data register not empty flag - * @arg IRDA_FLAG_IDLE: Idle Line detection flag - * @arg IRDA_FLAG_ORE: OverRun Error flag - * @arg IRDA_FLAG_NE: Noise Error flag - * @arg IRDA_FLAG_FE: Framing Error flag - * @arg IRDA_FLAG_PE: Parity Error flag - * @retval The new state of __FLAG__ (TRUE or FALSE). - */ -#define __HAL_IRDA_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__)) - - -/** @brief Enable the specified IRDA interrupt. - * @param __HANDLE__: specifies the IRDA Handle. - * @param __INTERRUPT__: specifies the IRDA interrupt source to enable. - * This parameter can be one of the following values: - * @arg IRDA_IT_TXE: Transmit Data Register empty interrupt - * @arg IRDA_IT_TC: Transmission complete interrupt - * @arg IRDA_IT_RXNE: Receive Data register not empty interrupt - * @arg IRDA_IT_IDLE: Idle line detection interrupt - * @arg IRDA_IT_PE: Parity Error interrupt - * @arg IRDA_IT_ERR: Error interrupt(Frame error, noise error, overrun error) - * @retval None - */ -#define __HAL_IRDA_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1)? ((__HANDLE__)->Instance->CR1 |= (1U << ((__INTERRUPT__) & IRDA_IT_MASK))): \ - ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2)? ((__HANDLE__)->Instance->CR2 |= (1U << ((__INTERRUPT__) & IRDA_IT_MASK))): \ - ((__HANDLE__)->Instance->CR3 |= (1U << ((__INTERRUPT__) & IRDA_IT_MASK)))) - -/** @brief Disable the specified IRDA interrupt. - * @param __HANDLE__: specifies the IRDA Handle. - * @param __INTERRUPT__: specifies the IRDA interrupt source to disable. - * This parameter can be one of the following values: - * @arg IRDA_IT_TXE: Transmit Data Register empty interrupt - * @arg IRDA_IT_TC: Transmission complete interrupt - * @arg IRDA_IT_RXNE: Receive Data register not empty interrupt - * @arg IRDA_IT_IDLE: Idle line detection interrupt - * @arg IRDA_IT_PE: Parity Error interrupt - * @arg IRDA_IT_ERR: Error interrupt(Frame error, noise error, overrun error) - * @retval None - */ -#define __HAL_IRDA_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1)? ((__HANDLE__)->Instance->CR1 &= ~ (1U << ((__INTERRUPT__) & IRDA_IT_MASK))): \ - ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2)? ((__HANDLE__)->Instance->CR2 &= ~ (1U << ((__INTERRUPT__) & IRDA_IT_MASK))): \ - ((__HANDLE__)->Instance->CR3 &= ~ (1U << ((__INTERRUPT__) & IRDA_IT_MASK)))) - - -/** @brief Check whether the specified IRDA interrupt has occurred or not. - * @param __HANDLE__: specifies the IRDA Handle. - * @param __IT__: specifies the IRDA interrupt source to check. - * This parameter can be one of the following values: - * @arg IRDA_IT_TXE: Transmit Data Register empty interrupt - * @arg IRDA_IT_TC: Transmission complete interrupt - * @arg IRDA_IT_RXNE: Receive Data register not empty interrupt - * @arg IRDA_IT_IDLE: Idle line detection interrupt - * @arg IRDA_IT_ORE: OverRun Error interrupt - * @arg IRDA_IT_NE: Noise Error interrupt - * @arg IRDA_IT_FE: Framing Error interrupt - * @arg IRDA_IT_PE: Parity Error interrupt - * @retval The new state of __IT__ (TRUE or FALSE). - */ -#define __HAL_IRDA_GET_IT(__HANDLE__, __IT__) ((__HANDLE__)->Instance->ISR & ((uint32_t)1U << ((__IT__)>> 0x08))) - -/** @brief Check whether the specified IRDA interrupt source is enabled or not. - * @param __HANDLE__: specifies the IRDA Handle. - * @param __IT__: specifies the IRDA interrupt source to check. - * This parameter can be one of the following values: - * @arg IRDA_IT_TXE: Transmit Data Register empty interrupt - * @arg IRDA_IT_TC: Transmission complete interrupt - * @arg IRDA_IT_RXNE: Receive Data register not empty interrupt - * @arg IRDA_IT_IDLE: Idle line detection interrupt - * @arg IRDA_IT_ORE: OverRun Error interrupt - * @arg IRDA_IT_NE: Noise Error interrupt - * @arg IRDA_IT_FE: Framing Error interrupt - * @arg IRDA_IT_PE: Parity Error interrupt - * @retval The new state of __IT__ (TRUE or FALSE). - */ -#define __HAL_IRDA_GET_IT_SOURCE(__HANDLE__, __IT__) ((((((uint8_t)(__IT__)) >> 5U) == 1)? (__HANDLE__)->Instance->CR1:(((((uint8_t)(__IT__)) >> 5U) == 2)? \ - (__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & ((uint32_t)1 << (((uint16_t)(__IT__)) & IRDA_IT_MASK))) - - -/** @brief Clear the specified IRDA ISR flag, in setting the proper ICR register flag. - * @param __HANDLE__: specifies the IRDA Handle. - * @param __IT_CLEAR__: specifies the interrupt clear register flag that needs to be set - * to clear the corresponding interrupt - * This parameter can be one of the following values: - * @arg IRDA_CLEAR_PEF: Parity Error Clear Flag - * @arg IRDA_CLEAR_FEF: Framing Error Clear Flag - * @arg IRDA_CLEAR_NEF: Noise detected Clear Flag - * @arg IRDA_CLEAR_OREF: OverRun Error Clear Flag - * @arg IRDA_CLEAR_TCF: Transmission Complete Clear Flag - * @retval None - */ -#define __HAL_IRDA_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->ICR = (uint32_t)(__IT_CLEAR__)) - - -/** @brief Set a specific IRDA request flag. - * @param __HANDLE__: specifies the IRDA Handle. - * @param __REQ__: specifies the request flag to set - * This parameter can be one of the following values: - * @arg IRDA_AUTOBAUD_REQUEST: Auto-Baud Rate Request - * @arg IRDA_RXDATA_FLUSH_REQUEST: Receive Data flush Request - * @arg IRDA_TXDATA_FLUSH_REQUEST: Transmit data flush Request - * - * @retval None - */ -#define __HAL_IRDA_SEND_REQ(__HANDLE__, __REQ__) ((__HANDLE__)->Instance->RQR |= (uint16_t)(__REQ__)) - -/** @brief Enable the IRDA one bit sample method. - * @param __HANDLE__: specifies the IRDA Handle. - * @retval None - */ -#define __HAL_IRDA_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT) - -/** @brief Disable the IRDA one bit sample method. - * @param __HANDLE__: specifies the IRDA Handle. - * @retval None - */ -#define __HAL_IRDA_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= (uint32_t)~((uint32_t)USART_CR3_ONEBIT)) - -/** @brief Enable UART/USART associated to IRDA Handle. - * @param __HANDLE__: specifies the IRDA Handle. - * @retval None - */ -#define __HAL_IRDA_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE) - -/** @brief Disable UART/USART associated to IRDA Handle. - * @param __HANDLE__: specifies the IRDA Handle. - * @retval None - */ -#define __HAL_IRDA_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE) - -/** - * @} - */ - -/* Private macros --------------------------------------------------------*/ -/** @defgroup IRDA_Private_Macros IRDA Private Macros - * @{ - */ - -/** @brief Compute the mask to apply to retrieve the received data - * according to the word length and to the parity bits activation. - * @param __HANDLE__: specifies the IRDA Handle. - * @retval None, the mask to apply to the associated UART RDR register is stored in (__HANDLE__)->Mask field. - */ -#define IRDA_MASK_COMPUTATION(__HANDLE__) \ - do { \ - if ((__HANDLE__)->Init.WordLength == IRDA_WORDLENGTH_9B) \ - { \ - if ((__HANDLE__)->Init.Parity == IRDA_PARITY_NONE) \ - { \ - (__HANDLE__)->Mask = 0x01FF ; \ - } \ - else \ - { \ - (__HANDLE__)->Mask = 0x00FF ; \ - } \ - } \ - else if ((__HANDLE__)->Init.WordLength == IRDA_WORDLENGTH_8B) \ - { \ - if ((__HANDLE__)->Init.Parity == IRDA_PARITY_NONE) \ - { \ - (__HANDLE__)->Mask = 0x00FF ; \ - } \ - else \ - { \ - (__HANDLE__)->Mask = 0x007F ; \ - } \ - } \ - else if ((__HANDLE__)->Init.WordLength == IRDA_WORDLENGTH_7B) \ - { \ - if ((__HANDLE__)->Init.Parity == IRDA_PARITY_NONE) \ - { \ - (__HANDLE__)->Mask = 0x007F ; \ - } \ - else \ - { \ - (__HANDLE__)->Mask = 0x003F ; \ - } \ - } \ -} while(0) - -/** @brief Ensure that IRDA Baud rate is less or equal to maximum value. - * @param __BAUDRATE__: specifies the IRDA Baudrate set by the user. - * @retval True or False - */ -#define IS_IRDA_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) < 115201) - -/** @brief Ensure that IRDA prescaler value is strictly larger than 0. - * @param __PRESCALER__: specifies the IRDA prescaler value set by the user. - * @retval True or False - */ -#define IS_IRDA_PRESCALER(__PRESCALER__) ((__PRESCALER__) > 0) - -/** - * @brief Ensure that IRDA frame length is valid. - * @param __LENGTH__: IRDA frame length. - * @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid) - */ -#define IS_IRDA_WORD_LENGTH(__LENGTH__) (((__LENGTH__) == IRDA_WORDLENGTH_7B) || \ - ((__LENGTH__) == IRDA_WORDLENGTH_8B) || \ - ((__LENGTH__) == IRDA_WORDLENGTH_9B)) - -/** - * @brief Ensure that IRDA frame parity is valid. - * @param __PARITY__: IRDA frame parity. - * @retval SET (__PARITY__ is valid) or RESET (__PARITY__ is invalid) - */ -#define IS_IRDA_PARITY(__PARITY__) (((__PARITY__) == IRDA_PARITY_NONE) || \ - ((__PARITY__) == IRDA_PARITY_EVEN) || \ - ((__PARITY__) == IRDA_PARITY_ODD)) - -/** - * @brief Ensure that IRDA communication mode is valid. - * @param __MODE__: IRDA communication mode. - * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) - */ -#define IS_IRDA_TX_RX_MODE(__MODE__) ((((__MODE__) & (~((uint32_t)(IRDA_MODE_TX_RX)))) == (uint32_t)0x00) && ((__MODE__) != (uint32_t)0x00)) - -/** - * @brief Ensure that IRDA power mode is valid. - * @param __MODE__: IRDA power mode. - * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) - */ -#define IS_IRDA_POWERMODE(__MODE__) (((__MODE__) == IRDA_POWERMODE_LOWPOWER) || \ - ((__MODE__) == IRDA_POWERMODE_NORMAL)) - -/** - * @brief Ensure that IRDA state is valid. - * @param __STATE__: IRDA state mode. - * @retval SET (__STATE__ is valid) or RESET (__STATE__ is invalid) - */ -#define IS_IRDA_STATE(__STATE__) (((__STATE__) == IRDA_STATE_DISABLE) || \ - ((__STATE__) == IRDA_STATE_ENABLE)) - -/** - * @brief Ensure that IRDA associated UART/USART mode is valid. - * @param __MODE__: IRDA associated UART/USART mode. - * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) - */ -#define IS_IRDA_MODE(__MODE__) (((__MODE__) == IRDA_MODE_DISABLE) || \ - ((__MODE__) == IRDA_MODE_ENABLE)) - -/** - * @brief Ensure that IRDA sampling rate is valid. - * @param __ONEBIT__: IRDA sampling rate. - * @retval SET (__ONEBIT__ is valid) or RESET (__ONEBIT__ is invalid) - */ -#define IS_IRDA_ONE_BIT_SAMPLE(__ONEBIT__) (((__ONEBIT__) == IRDA_ONE_BIT_SAMPLE_DISABLE) || \ - ((__ONEBIT__) == IRDA_ONE_BIT_SAMPLE_ENABLE)) - -/** - * @brief Ensure that IRDA DMA TX mode is valid. - * @param __DMATX__: IRDA DMA TX mode. - * @retval SET (__DMATX__ is valid) or RESET (__DMATX__ is invalid) - */ -#define IS_IRDA_DMA_TX(__DMATX__) (((__DMATX__) == IRDA_DMA_TX_DISABLE) || \ - ((__DMATX__) == IRDA_DMA_TX_ENABLE)) - -/** - * @brief Ensure that IRDA DMA RX mode is valid. - * @param __DMARX__: IRDA DMA RX mode. - * @retval SET (__DMARX__ is valid) or RESET (__DMARX__ is invalid) - */ -#define IS_IRDA_DMA_RX(__DMARX__) (((__DMARX__) == IRDA_DMA_RX_DISABLE) || \ - ((__DMARX__) == IRDA_DMA_RX_ENABLE)) - -/** - * @brief Ensure that IRDA request is valid. - * @param __PARAM__: IRDA request. - * @retval SET (__PARAM__ is valid) or RESET (__PARAM__ is invalid) - */ -#define IS_IRDA_REQUEST_PARAMETER(__PARAM__) (((__PARAM__) == IRDA_AUTOBAUD_REQUEST) || \ - ((__PARAM__) == IRDA_RXDATA_FLUSH_REQUEST) || \ - ((__PARAM__) == IRDA_TXDATA_FLUSH_REQUEST)) -/** - * @} - */ - -/* Include IRDA HAL Extended module */ -#include "stm32l4xx_hal_irda_ex.h" - -/* Exported functions --------------------------------------------------------*/ -/** @addtogroup IRDA_Exported_Functions IRDA Exported Functions - * @{ - */ - -/** @addtogroup IRDA_Exported_Functions_Group1 Initialization and de-initialization functions - * @{ - */ - -/* Initialization and de-initialization functions ****************************/ -HAL_StatusTypeDef HAL_IRDA_Init(IRDA_HandleTypeDef *hirda); -HAL_StatusTypeDef HAL_IRDA_DeInit(IRDA_HandleTypeDef *hirda); -void HAL_IRDA_MspInit(IRDA_HandleTypeDef *hirda); -void HAL_IRDA_MspDeInit(IRDA_HandleTypeDef *hirda); - -/** - * @} - */ - -/** @addtogroup IRDA_Exported_Functions_Group2 IO operation functions - * @{ - */ - -/* IO operation functions *****************************************************/ -HAL_StatusTypeDef HAL_IRDA_Transmit(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size, uint32_t Timeout); -HAL_StatusTypeDef HAL_IRDA_Receive(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size, uint32_t Timeout); -HAL_StatusTypeDef HAL_IRDA_Transmit_IT(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size); -HAL_StatusTypeDef HAL_IRDA_Receive_IT(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size); -HAL_StatusTypeDef HAL_IRDA_Transmit_DMA(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size); -HAL_StatusTypeDef HAL_IRDA_Receive_DMA(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size); -HAL_StatusTypeDef HAL_IRDA_DMAPause(IRDA_HandleTypeDef *hirda); -HAL_StatusTypeDef HAL_IRDA_DMAResume(IRDA_HandleTypeDef *hirda); -HAL_StatusTypeDef HAL_IRDA_DMAStop(IRDA_HandleTypeDef *hirda); -void HAL_IRDA_IRQHandler(IRDA_HandleTypeDef *hirda); -void HAL_IRDA_TxCpltCallback(IRDA_HandleTypeDef *hirda); -void HAL_IRDA_RxCpltCallback(IRDA_HandleTypeDef *hirda); -void HAL_IRDA_TxHalfCpltCallback(IRDA_HandleTypeDef *hirda); -void HAL_IRDA_RxHalfCpltCallback(IRDA_HandleTypeDef *hirda); -void HAL_IRDA_ErrorCallback(IRDA_HandleTypeDef *hirda); - -/** - * @} - */ - -/* Peripheral Control functions ************************************************/ - -/** @addtogroup IRDA_Exported_Functions_Group4 Peripheral State and Error functions - * @{ - */ - -/* Peripheral State and Error functions ***************************************/ -HAL_IRDA_StateTypeDef HAL_IRDA_GetState(IRDA_HandleTypeDef *hirda); -uint32_t HAL_IRDA_GetError(IRDA_HandleTypeDef *hirda); - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32L4xx_HAL_IRDA_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ -
--- a/Inc/stm32l4xx_hal_irda_ex.h Thu Nov 12 20:49:49 2015 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,203 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_irda_ex.h - * @author MCD Application Team - * @version V1.1.0 - * @date 16-September-2015 - * @brief Header file of IRDA HAL Extended module. - ****************************************************************************** - * @attention - * - * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_IRDA_EX_H -#define __STM32L4xx_HAL_IRDA_EX_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal_def.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @addtogroup IRDAEx - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ -/* Exported macros -----------------------------------------------------------*/ -/* Exported functions --------------------------------------------------------*/ - -/* Private macros ------------------------------------------------------------*/ - -/** @defgroup IRDAEx_Private_Macros IRDAEx Private Macros - * @{ - */ - -/** @brief Report the IRDA clock source. - * @param __HANDLE__: specifies the IRDA Handle. - * @param __CLOCKSOURCE__: output variable. - * @retval IRDA clocking source, written in __CLOCKSOURCE__. - */ -#define IRDA_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ - do { \ - if((__HANDLE__)->Instance == USART1) \ - { \ - switch(__HAL_RCC_GET_USART1_SOURCE()) \ - { \ - case RCC_USART1CLKSOURCE_PCLK2: \ - (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK2; \ - break; \ - case RCC_USART1CLKSOURCE_HSI: \ - (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI; \ - break; \ - case RCC_USART1CLKSOURCE_SYSCLK: \ - (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK; \ - break; \ - case RCC_USART1CLKSOURCE_LSE: \ - (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE; \ - break; \ - default: \ - (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED; \ - break; \ - } \ - } \ - else if((__HANDLE__)->Instance == USART2) \ - { \ - switch(__HAL_RCC_GET_USART2_SOURCE()) \ - { \ - case RCC_USART2CLKSOURCE_PCLK1: \ - (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK1; \ - break; \ - case RCC_USART2CLKSOURCE_HSI: \ - (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI; \ - break; \ - case RCC_USART2CLKSOURCE_SYSCLK: \ - (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK; \ - break; \ - case RCC_USART2CLKSOURCE_LSE: \ - (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE; \ - break; \ - default: \ - (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED; \ - break; \ - } \ - } \ - else if((__HANDLE__)->Instance == USART3) \ - { \ - switch(__HAL_RCC_GET_USART3_SOURCE()) \ - { \ - case RCC_USART3CLKSOURCE_PCLK1: \ - (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK1; \ - break; \ - case RCC_USART3CLKSOURCE_HSI: \ - (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI; \ - break; \ - case RCC_USART3CLKSOURCE_SYSCLK: \ - (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK; \ - break; \ - case RCC_USART3CLKSOURCE_LSE: \ - (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE; \ - break; \ - default: \ - (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED; \ - break; \ - } \ - } \ - else if((__HANDLE__)->Instance == UART4) \ - { \ - switch(__HAL_RCC_GET_UART4_SOURCE()) \ - { \ - case RCC_UART4CLKSOURCE_PCLK1: \ - (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK1; \ - break; \ - case RCC_UART4CLKSOURCE_HSI: \ - (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI; \ - break; \ - case RCC_UART4CLKSOURCE_SYSCLK: \ - (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK; \ - break; \ - case RCC_UART4CLKSOURCE_LSE: \ - (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE; \ - break; \ - default: \ - (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED; \ - break; \ - } \ - } \ - else if ((__HANDLE__)->Instance == UART5) \ - { \ - switch(__HAL_RCC_GET_UART5_SOURCE()) \ - { \ - case RCC_UART5CLKSOURCE_PCLK1: \ - (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK1; \ - break; \ - case RCC_UART5CLKSOURCE_HSI: \ - (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI; \ - break; \ - case RCC_UART5CLKSOURCE_SYSCLK: \ - (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK; \ - break; \ - case RCC_UART5CLKSOURCE_LSE: \ - (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE; \ - break; \ - default: \ - (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED; \ - break; \ - } \ - } \ - } while(0) - -/** - * @} - */ - -/* Exported functions --------------------------------------------------------*/ - -/** - * @} - */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32L4xx_HAL_IRDA_EX_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ -
--- a/Inc/stm32l4xx_hal_iwdg.h Thu Nov 12 20:49:49 2015 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,308 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_iwdg.h - * @author MCD Application Team - * @version V1.1.0 - * @date 16-September-2015 - * @brief Header file of IWDG HAL module. - ****************************************************************************** - * @attention - * - * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_IWDG_H -#define __STM32L4xx_HAL_IWDG_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal_def.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @addtogroup IWDG - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ -/** @defgroup IWDG_Exported_Types IWDG Exported Types - * @{ - */ - -/** - * @brief IWDG HAL State Structure definition - */ -typedef enum -{ - HAL_IWDG_STATE_RESET = 0x00, /*!< IWDG not yet initialized or disabled */ - HAL_IWDG_STATE_READY = 0x01, /*!< IWDG initialized and ready for use */ - HAL_IWDG_STATE_BUSY = 0x02, /*!< IWDG internal process is ongoing */ - HAL_IWDG_STATE_TIMEOUT = 0x03, /*!< IWDG timeout state */ - HAL_IWDG_STATE_ERROR = 0x04 /*!< IWDG error state */ - -}HAL_IWDG_StateTypeDef; - -/** - * @brief IWDG Init structure definition - */ -typedef struct -{ - uint32_t Prescaler; /*!< Select the prescaler of the IWDG. - This parameter can be a value of @ref IWDG_Prescaler */ - - uint32_t Reload; /*!< Specifies the IWDG down-counter reload value. - This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFF */ - - uint32_t Window; /*!< Specifies the window value to be compared to the down-counter. - This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFF */ - -} IWDG_InitTypeDef; - -/** - * @brief IWDG Handle Structure definition - */ -typedef struct -{ - IWDG_TypeDef *Instance; /*!< Register base address */ - - IWDG_InitTypeDef Init; /*!< IWDG required parameters */ - - HAL_LockTypeDef Lock; /*!< IWDG Locking object */ - - __IO HAL_IWDG_StateTypeDef State; /*!< IWDG communication state */ - -}IWDG_HandleTypeDef; - -/** - * @} - */ - -/* Exported constants --------------------------------------------------------*/ -/** @defgroup IWDG_Exported_Constants IWDG Exported Constants - * @{ - */ - -/** @defgroup IWDG_Prescaler IWDG Prescaler - * @{ - */ -#define IWDG_PRESCALER_4 ((uint8_t)0x00) /*!< IWDG prescaler set to 4 */ -#define IWDG_PRESCALER_8 ((uint8_t)(IWDG_PR_PR_0)) /*!< IWDG prescaler set to 8 */ -#define IWDG_PRESCALER_16 ((uint8_t)(IWDG_PR_PR_1)) /*!< IWDG prescaler set to 16 */ -#define IWDG_PRESCALER_32 ((uint8_t)(IWDG_PR_PR_1 | IWDG_PR_PR_0)) /*!< IWDG prescaler set to 32 */ -#define IWDG_PRESCALER_64 ((uint8_t)(IWDG_PR_PR_2)) /*!< IWDG prescaler set to 64 */ -#define IWDG_PRESCALER_128 ((uint8_t)(IWDG_PR_PR_2 | IWDG_PR_PR_0)) /*!< IWDG prescaler set to 128 */ -#define IWDG_PRESCALER_256 ((uint8_t)(IWDG_PR_PR_2 | IWDG_PR_PR_1)) /*!< IWDG prescaler set to 256 */ -/** - * @} - */ - -/** @defgroup IWDG_Window IWDG Window - * @{ - */ -#define IWDG_WINDOW_DISABLE ((uint32_t)0x00000FFF) -/** - * @} - */ - -/** - * @} - */ - -/* Exported macros -----------------------------------------------------------*/ -/** @defgroup IWDG_Exported_Macros IWDG Exported Macros - * @{ - */ - -/** @brief Reset IWDG handle state. - * @param __HANDLE__: IWDG handle. - * @retval None - */ -#define __HAL_IWDG_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_IWDG_STATE_RESET) - -/** - * @brief Enable the IWDG peripheral. - * @param __HANDLE__: IWDG handle - * @retval None - */ -#define __HAL_IWDG_START(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_ENABLE) - -/** - * @brief Reload IWDG counter with value defined in the reload register. - * @param __HANDLE__: IWDG handle - * @retval None - */ -#define __HAL_IWDG_RELOAD_COUNTER(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_RELOAD) - -/** - * @brief Get the selected IWDG flag status. - * @param __HANDLE__: IWDG handle - * @param __FLAG__: specifies the flag to check. - * This parameter can be one of the following values: - * @arg IWDG_FLAG_PVU: Watchdog counter reload value update flag - * @arg IWDG_FLAG_RVU: Watchdog counter prescaler value flag - * @arg IWDG_FLAG_WVU: Watchdog counter window value flag - * @retval The new state of __FLAG__ (TRUE or FALSE) . - */ -#define __HAL_IWDG_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__)) - -/** - * @} - */ - -/* Exported functions --------------------------------------------------------*/ -/** @addtogroup IWDG_Exported_Functions - * @{ - */ - -/** @addtogroup IWDG_Exported_Functions_Group1 - * @{ - */ -/* Initialization/de-initialization functions ********************************/ -HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg); -void HAL_IWDG_MspInit(IWDG_HandleTypeDef *hiwdg); -/** - * @} - */ - -/** @addtogroup IWDG_Exported_Functions_Group2 - * @{ - */ -/* I/O operation functions ****************************************************/ -HAL_StatusTypeDef HAL_IWDG_Start(IWDG_HandleTypeDef *hiwdg); -HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg); -/** - * @} - */ - -/** @addtogroup IWDG_Exported_Functions_Group3 - * @{ - */ -/* Peripheral State functions ************************************************/ -HAL_IWDG_StateTypeDef HAL_IWDG_GetState(IWDG_HandleTypeDef *hiwdg); -/** - * @} - */ - -/** - * @} - */ - -/* Private constants ---------------------------------------------------------*/ -/** @addtogroup IWDG_Private_Defines - * @{ - */ -/** - * @brief IWDG Key Register BitMask - */ -#define IWDG_KEY_RELOAD ((uint32_t)0x0000AAAA) /*!< IWDG Reload Counter Enable */ -#define IWDG_KEY_ENABLE ((uint32_t)0x0000CCCC) /*!< IWDG Peripheral Enable */ -#define IWDG_KEY_WRITE_ACCESS_ENABLE ((uint32_t)0x00005555) /*!< IWDG KR Write Access Enable */ -#define IWDG_KEY_WRITE_ACCESS_DISABLE ((uint32_t)0x00000000) /*!< IWDG KR Write Access Disable */ - -/** - * @brief IWDG Flag definition - */ -#define IWDG_FLAG_PVU ((uint32_t)IWDG_SR_PVU) /*!< Watchdog counter prescaler value update flag */ -#define IWDG_FLAG_RVU ((uint32_t)IWDG_SR_RVU) /*!< Watchdog counter reload value update flag */ -#define IWDG_FLAG_WVU ((uint32_t)IWDG_SR_WVU) /*!< Watchdog counter window value update flag */ - -/** - * @} - */ - -/* Private macros ------------------------------------------------------------*/ -/** @defgroup IWDG_Private_Macro IWDG Private Macros - * @{ - */ -/** - * @brief Enables write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers. - * @param __HANDLE__: IWDG handle - * @retval None - */ -#define IWDG_ENABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_ENABLE) - -/** - * @brief Disables write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers. - * @param __HANDLE__: IWDG handle - * @retval None - */ -#define IWDG_DISABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_DISABLE) - -/** - * @brief Check IWDG prescaler value. - * @param __PRESCALER__: IWDG prescaler value - * @retval None - */ -#define IS_IWDG_PRESCALER(__PRESCALER__) (((__PRESCALER__) == IWDG_PRESCALER_4) || \ - ((__PRESCALER__) == IWDG_PRESCALER_8) || \ - ((__PRESCALER__) == IWDG_PRESCALER_16) || \ - ((__PRESCALER__) == IWDG_PRESCALER_32) || \ - ((__PRESCALER__) == IWDG_PRESCALER_64) || \ - ((__PRESCALER__) == IWDG_PRESCALER_128)|| \ - ((__PRESCALER__) == IWDG_PRESCALER_256)) - -/** - * @brief Check IWDG reload value. - * @param __RELOAD__: IWDG reload value - * @retval None - */ -#define IS_IWDG_RELOAD(__RELOAD__) ((__RELOAD__) <= 0xFFF) - -/** - * @brief Check IWDG window value. - * @param __WINDOW__: IWDG window value - * @retval None - */ -#define IS_IWDG_WINDOW(__WINDOW__) ((__WINDOW__) <= 0xFFF) - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32L4xx_HAL_IWDG_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ -
--- a/Inc/stm32l4xx_hal_nand.h Thu Nov 12 20:49:49 2015 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,302 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_nand.h - * @author MCD Application Team - * @version V1.1.0 - * @date 16-September-2015 - * @brief Header file of NAND HAL module. - ****************************************************************************** - * @attention - * - * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_NAND_H -#define __STM32L4xx_HAL_NAND_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_ll_fmc.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @addtogroup NAND - * @{ - */ - -/** @addtogroup NAND_Private_Constants - * @{ - */ - -#define NAND_DEVICE FMC_BANK3 -#define NAND_WRITE_TIMEOUT ((uint32_t)1000) - -#define CMD_AREA ((uint32_t)(1<<16)) /* A16 = CLE high */ -#define ADDR_AREA ((uint32_t)(1<<17)) /* A17 = ALE high */ - -#define NAND_CMD_AREA_A ((uint8_t)0x00) -#define NAND_CMD_AREA_B ((uint8_t)0x01) -#define NAND_CMD_AREA_C ((uint8_t)0x50) -#define NAND_CMD_AREA_TRUE1 ((uint8_t)0x30) - -#define NAND_CMD_WRITE0 ((uint8_t)0x80) -#define NAND_CMD_WRITE_TRUE1 ((uint8_t)0x10) -#define NAND_CMD_ERASE0 ((uint8_t)0x60) -#define NAND_CMD_ERASE1 ((uint8_t)0xD0) -#define NAND_CMD_READID ((uint8_t)0x90) -#define NAND_CMD_STATUS ((uint8_t)0x70) -#define NAND_CMD_LOCK_STATUS ((uint8_t)0x7A) -#define NAND_CMD_RESET ((uint8_t)0xFF) - -/* NAND memory status */ -#define NAND_VALID_ADDRESS ((uint32_t)0x00000100) -#define NAND_INVALID_ADDRESS ((uint32_t)0x00000200) -#define NAND_TIMEOUT_ERROR ((uint32_t)0x00000400) -#define NAND_BUSY ((uint32_t)0x00000000) -#define NAND_ERROR ((uint32_t)0x00000001) -#define NAND_READY ((uint32_t)0x00000040) - -/** - * @} - */ - -/** @addtogroup NAND_Private_Macros - * @{ - */ - -/** - * @brief NAND memory address computation. - * @param __ADDRESS__: NAND memory address. - * @param __HANDLE__: NAND handle. - * @retval NAND Raw address value - */ -#define ARRAY_ADDRESS(__ADDRESS__ , __HANDLE__) (((__ADDRESS__)->Page) + \ - (((__ADDRESS__)->Block + (((__ADDRESS__)->Zone) * ((__HANDLE__)->Info.ZoneSize)))* ((__HANDLE__)->Info.BlockSize * ((__HANDLE__)->Info.PageSize + (__HANDLE__)->Info.SpareAreaSize)))) - -/** - * @brief NAND memory address cycling. - * @param __ADDRESS__: NAND memory address. - * @retval NAND address cycling value. - */ -#define ADDR_1ST_CYCLE(__ADDRESS__) (uint8_t)(__ADDRESS__) /* 1st addressing cycle */ -#define ADDR_2ND_CYCLE(__ADDRESS__) (uint8_t)((__ADDRESS__) >> 8) /* 2nd addressing cycle */ -#define ADDR_3RD_CYCLE(__ADDRESS__) (uint8_t)((__ADDRESS__) >> 16) /* 3rd addressing cycle */ -#define ADDR_4TH_CYCLE(__ADDRESS__) (uint8_t)((__ADDRESS__) >> 24) /* 4th addressing cycle */ - -/** - * @} - */ - -/* Exported typedef ----------------------------------------------------------*/ -/* Exported types ------------------------------------------------------------*/ -/** @defgroup NAND_Exported_Types NAND Exported Types - * @{ - */ - -/** - * @brief HAL NAND State structures definition - */ -typedef enum -{ - HAL_NAND_STATE_RESET = 0x00, /*!< NAND not yet initialized or disabled */ - HAL_NAND_STATE_READY = 0x01, /*!< NAND initialized and ready for use */ - HAL_NAND_STATE_BUSY = 0x02, /*!< NAND internal process is ongoing */ - HAL_NAND_STATE_ERROR = 0x03 /*!< NAND error state */ -}HAL_NAND_StateTypeDef; - -/** - * @brief NAND Memory electronic signature Structure definition - */ -typedef struct -{ - /*<! NAND memory electronic signature maker and device IDs */ - - uint8_t Maker_Id; - - uint8_t Device_Id; - - uint8_t Third_Id; - - uint8_t Fourth_Id; -}NAND_IDTypeDef; - -/** - * @brief NAND Memory address Structure definition - */ -typedef struct -{ - uint16_t Page; /*!< NAND memory Page address */ - - uint16_t Zone; /*!< NAND memory Zone address */ - - uint16_t Block; /*!< NAND memory Block address */ - -}NAND_AddressTypeDef; - -/** - * @brief NAND Memory info Structure definition - */ -typedef struct -{ - uint32_t PageSize; /*!< NAND memory page (without spare area) size measured in K. bytes */ - - uint32_t SpareAreaSize; /*!< NAND memory spare area size measured in K. bytes */ - - uint32_t BlockSize; /*!< NAND memory block size number of pages */ - - uint32_t BlockNbr; /*!< NAND memory number of blocks */ - - uint32_t ZoneSize; /*!< NAND memory zone size measured in number of blocks */ -}NAND_InfoTypeDef; - -/** - * @brief NAND handle Structure definition - */ -typedef struct -{ - FMC_NAND_TypeDef *Instance; /*!< Register base address */ - - FMC_NAND_InitTypeDef Init; /*!< NAND device control configuration parameters */ - - HAL_LockTypeDef Lock; /*!< NAND locking object */ - - __IO HAL_NAND_StateTypeDef State; /*!< NAND device access state */ - - NAND_InfoTypeDef Info; /*!< NAND characteristic information structure */ -}NAND_HandleTypeDef; - -/** - * @} - */ - -/* Exported constants --------------------------------------------------------*/ -/* Exported macro ------------------------------------------------------------*/ -/** @defgroup NAND_Exported_Macros NAND Exported Macros - * @{ - */ - -/** @brief Reset NAND handle state. - * @param __HANDLE__: specifies the NAND handle. - * @retval None - */ -#define __HAL_NAND_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_NAND_STATE_RESET) - -/** - * @} - */ - -/* Exported functions --------------------------------------------------------*/ -/** @addtogroup NAND_Exported_Functions NAND Exported Functions - * @{ - */ - -/** @addtogroup NAND_Exported_Functions_Group1 Initialization and de-initialization functions - * @{ - */ - -/* Initialization/de-initialization functions ********************************/ -HAL_StatusTypeDef HAL_NAND_Init(NAND_HandleTypeDef *hnand, FMC_NAND_PCC_TimingTypeDef *ComSpace_Timing, FMC_NAND_PCC_TimingTypeDef *AttSpace_Timing); -HAL_StatusTypeDef HAL_NAND_DeInit(NAND_HandleTypeDef *hnand); -void HAL_NAND_MspInit(NAND_HandleTypeDef *hnand); -void HAL_NAND_MspDeInit(NAND_HandleTypeDef *hnand); -void HAL_NAND_IRQHandler(NAND_HandleTypeDef *hnand); -void HAL_NAND_ITCallback(NAND_HandleTypeDef *hnand); - -/** - * @} - */ - -/** @addtogroup NAND_Exported_Functions_Group2 Input and Output functions - * @{ - */ - -/* IO operation functions ****************************************************/ -HAL_StatusTypeDef HAL_NAND_Read_ID(NAND_HandleTypeDef *hnand, NAND_IDTypeDef *pNAND_ID); -HAL_StatusTypeDef HAL_NAND_Reset(NAND_HandleTypeDef *hnand); -HAL_StatusTypeDef HAL_NAND_Read_Page(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumPageToRead); -HAL_StatusTypeDef HAL_NAND_Write_Page(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumPageToWrite); -HAL_StatusTypeDef HAL_NAND_Read_SpareArea(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumSpareAreaToRead); -HAL_StatusTypeDef HAL_NAND_Write_SpareArea(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumSpareAreaTowrite); -HAL_StatusTypeDef HAL_NAND_Erase_Block(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress); -uint32_t HAL_NAND_Read_Status(NAND_HandleTypeDef *hnand); -uint32_t HAL_NAND_Address_Inc(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress); - -/** - * @} - */ - -/** @addtogroup NAND_Exported_Functions_Group3 Peripheral Control functions - * @{ - */ - -/* NAND Control functions ****************************************************/ -HAL_StatusTypeDef HAL_NAND_ECC_Enable(NAND_HandleTypeDef *hnand); -HAL_StatusTypeDef HAL_NAND_ECC_Disable(NAND_HandleTypeDef *hnand); -HAL_StatusTypeDef HAL_NAND_GetECC(NAND_HandleTypeDef *hnand, uint32_t *ECCval, uint32_t Timeout); - -/** - * @} - */ - -/** @addtogroup NAND_Exported_Functions_Group4 Peripheral State functions - * @{ - */ - -/* NAND State functions *******************************************************/ -HAL_NAND_StateTypeDef HAL_NAND_GetState(NAND_HandleTypeDef *hnand); -uint32_t HAL_NAND_Read_Status(NAND_HandleTypeDef *hnand); - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32L4xx_HAL_NAND_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ -
--- a/Inc/stm32l4xx_hal_nor.h Thu Nov 12 20:49:49 2015 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,298 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_nor.h - * @author MCD Application Team - * @version V1.1.0 - * @date 16-September-2015 - * @brief Header file of NOR HAL module. - ****************************************************************************** - * @attention - * - * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_NOR_H -#define __STM32L4xx_HAL_NOR_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_ll_fmc.h" - - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @addtogroup NOR - * @{ - */ - -/** @addtogroup NOR_Private_Constants - * @{ - */ - -/* NOR device IDs addresses */ -#define MC_ADDRESS ((uint16_t)0x0000) -#define DEVICE_CODE1_ADDR ((uint16_t)0x0001) -#define DEVICE_CODE2_ADDR ((uint16_t)0x000E) -#define DEVICE_CODE3_ADDR ((uint16_t)0x000F) - -/* NOR CFI IDs addresses */ -#define CFI1_ADDRESS ((uint16_t)0x10) -#define CFI2_ADDRESS ((uint16_t)0x11) -#define CFI3_ADDRESS ((uint16_t)0x12) -#define CFI4_ADDRESS ((uint16_t)0x13) - -/* NOR memory data width */ -#define NOR_MEMORY_8B ((uint8_t)0x0) -#define NOR_MEMORY_16B ((uint8_t)0x1) - -/* NOR memory device read/write start address */ -#define NOR_MEMORY_ADRESS1 FMC_BANK1_1 -#define NOR_MEMORY_ADRESS2 FMC_BANK1_2 -#define NOR_MEMORY_ADRESS3 FMC_BANK1_3 -#define NOR_MEMORY_ADRESS4 FMC_BANK1_4 - -/** - * @} - */ - -/** @addtogroup NOR_Private_Macros - * @{ - */ - -/** - * @brief NOR memory address shifting. - * @param __NOR_ADDRESS: NOR base address - * @param __NOR_MEMORY_WIDTH_: NOR memory width - * @param __ADDRESS__: NOR memory address - * @retval NOR shifted address value - */ -#define NOR_ADDR_SHIFT(__NOR_ADDRESS, __NOR_MEMORY_WIDTH_, __ADDRESS__) \ - ((uint32_t)(((__NOR_MEMORY_WIDTH_) == NOR_MEMORY_16B)? \ - ((uint32_t)((__NOR_ADDRESS) + (2 * (__ADDRESS__)))): \ - ((uint32_t)((__NOR_ADDRESS) + (__ADDRESS__))))) - -/** - * @brief NOR memory write data to specified address. - * @param __ADDRESS__: NOR memory address - * @param __DATA__: Data to write - * @retval None - */ -#define NOR_WRITE(__ADDRESS__, __DATA__) (*(__IO uint16_t *)((uint32_t)(__ADDRESS__)) = (__DATA__)) - -/** - * @} - */ - -/* Exported typedef ----------------------------------------------------------*/ -/** @defgroup NOR_Exported_Types NOR Exported Types - * @{ - */ - -/** - * @brief HAL SRAM State structures definition - */ -typedef enum -{ - HAL_NOR_STATE_RESET = 0x00, /*!< NOR not yet initialized or disabled */ - HAL_NOR_STATE_READY = 0x01, /*!< NOR initialized and ready for use */ - HAL_NOR_STATE_BUSY = 0x02, /*!< NOR internal processing is ongoing */ - HAL_NOR_STATE_ERROR = 0x03, /*!< NOR error state */ - HAL_NOR_STATE_PROTECTED = 0x04 /*!< NOR NORSRAM device write protected */ -}HAL_NOR_StateTypeDef; - -/** - * @brief FMC NOR Status typedef - */ -typedef enum -{ - HAL_NOR_STATUS_SUCCESS = 0, - HAL_NOR_STATUS_ONGOING, - HAL_NOR_STATUS_ERROR, - HAL_NOR_STATUS_TIMEOUT -}HAL_NOR_StatusTypeDef; - -/** - * @brief FMC NOR ID typedef - */ -typedef struct -{ - uint16_t Manufacturer_Code; /*!< Defines the device's manufacturer code used to identify the memory */ - - uint16_t Device_Code1; - - uint16_t Device_Code2; - - uint16_t Device_Code3; /*!< Defines the device's codes used to identify the memory. - These codes can be accessed by performing read operations with specific - control signals and addresses set.They can also be accessed by issuing - an Auto Select command. */ -}NOR_IDTypeDef; - -/** - * @brief FMC NOR CFI typedef - */ -typedef struct -{ - uint16_t CFI_1; - - uint16_t CFI_2; - - uint16_t CFI_3; - - uint16_t CFI_4; /*!< Defines the information stored in the memory's Common flash interface - which contains a description of various electrical and timing parameters, - density information and functions supported by the memory. */ -}NOR_CFITypeDef; - -/** - * @brief NOR handle Structure definition - */ -typedef struct -{ - FMC_NORSRAM_TypeDef *Instance; /*!< Register base address */ - - FMC_NORSRAM_EXTENDED_TypeDef *Extended; /*!< Extended mode register base address */ - - FMC_NORSRAM_InitTypeDef Init; /*!< NOR device control configuration parameters */ - - HAL_LockTypeDef Lock; /*!< NOR locking object */ - - __IO HAL_NOR_StateTypeDef State; /*!< NOR device access state */ - -}NOR_HandleTypeDef; - -/** - * @} - */ - -/* Exported constants --------------------------------------------------------*/ -/* Exported macro ------------------------------------------------------------*/ -/** @defgroup NOR_Exported_Macros NOR Exported Macros - * @{ - */ - -/** @brief Reset NOR handle state. - * @param __HANDLE__: NOR handle - * @retval None - */ -#define __HAL_NOR_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_NOR_STATE_RESET) - -/** - * @} - */ - -/* Exported functions --------------------------------------------------------*/ -/** @addtogroup NOR_Exported_Functions NOR Exported Functions - * @{ - */ - -/** @addtogroup NOR_Exported_Functions_Group1 Initialization and de-initialization functions - * @{ - */ - -/* Initialization/de-initialization functions ********************************/ -HAL_StatusTypeDef HAL_NOR_Init(NOR_HandleTypeDef *hnor, FMC_NORSRAM_TimingTypeDef *Timing, FMC_NORSRAM_TimingTypeDef *ExtTiming); -HAL_StatusTypeDef HAL_NOR_DeInit(NOR_HandleTypeDef *hnor); -void HAL_NOR_MspInit(NOR_HandleTypeDef *hnor); -void HAL_NOR_MspDeInit(NOR_HandleTypeDef *hnor); -void HAL_NOR_MspWait(NOR_HandleTypeDef *hnor, uint32_t Timeout); - -/** - * @} - */ - -/** @addtogroup NOR_Exported_Functions_Group2 Input and Output functions - * @{ - */ - -/* I/O operation functions ***************************************************/ -HAL_StatusTypeDef HAL_NOR_Read_ID(NOR_HandleTypeDef *hnor, NOR_IDTypeDef *pNOR_ID); -HAL_StatusTypeDef HAL_NOR_ReturnToReadMode(NOR_HandleTypeDef *hnor); -HAL_StatusTypeDef HAL_NOR_Read(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData); -HAL_StatusTypeDef HAL_NOR_Program(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData); - -HAL_StatusTypeDef HAL_NOR_ReadBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData, uint32_t uwBufferSize); -HAL_StatusTypeDef HAL_NOR_ProgramBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData, uint32_t uwBufferSize); - -HAL_StatusTypeDef HAL_NOR_Erase_Block(NOR_HandleTypeDef *hnor, uint32_t BlockAddress, uint32_t Address); -HAL_StatusTypeDef HAL_NOR_Erase_Chip(NOR_HandleTypeDef *hnor, uint32_t Address); -HAL_StatusTypeDef HAL_NOR_Read_CFI(NOR_HandleTypeDef *hnor, NOR_CFITypeDef *pNOR_CFI); - -/** - * @} - */ - -/** @addtogroup NOR_Exported_Functions_Group3 Peripheral Control functions - * @{ - */ - -/* NOR Control functions *****************************************************/ -HAL_StatusTypeDef HAL_NOR_WriteOperation_Enable(NOR_HandleTypeDef *hnor); -HAL_StatusTypeDef HAL_NOR_WriteOperation_Disable(NOR_HandleTypeDef *hnor); - -/** - * @} - */ - -/** @addtogroup NOR_Exported_Functions_Group4 Peripheral State functions - * @{ - */ - -/* NOR State functions ********************************************************/ -HAL_NOR_StateTypeDef HAL_NOR_GetState(NOR_HandleTypeDef *hnor); -HAL_NOR_StatusTypeDef HAL_NOR_GetStatus(NOR_HandleTypeDef *hnor, uint32_t Address, uint32_t Timeout); - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32L4xx_HAL_NOR_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ -
--- a/Inc/stm32l4xx_hal_opamp.h Thu Nov 12 20:49:49 2015 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,414 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_opamp.h - * @author MCD Application Team - * @version V1.1.0 - * @date 16-September-2015 - * @brief Header file of OPAMP HAL module. - ****************************************************************************** - * @attention - * - * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_OPAMP_H -#define __STM32L4xx_HAL_OPAMP_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal_def.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @addtogroup OPAMP - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ - -/** @defgroup OPAMP_Exported_Types OPAMP Exported Types - * @{ - */ - -/** - * @brief OPAMP Init structure definition - */ - -typedef struct -{ - uint32_t PowerSupplyRange; /*!< Specifies the power supply range: above or under 2.4V. - This parameter must be a value of @ref OPAMP_PowerSupplyRange - Caution: This parameter is common to all OPAMP instances: a modification of this parameter for the selected OPAMP impacts the other OPAMP instances. */ - - uint32_t PowerMode; /*!< Specifies the power mode Normal or Low-Power. - This parameter must be a value of @ref OPAMP_PowerMode */ - - uint32_t Mode; /*!< Specifies the OPAMP mode - This parameter must be a value of @ref OPAMP_Mode - mode is either Standalone, - Follower or PGA */ - - uint32_t InvertingInput; /*!< Specifies the inverting input in Standalone & PGA modes - - In Standalone mode: i.e. when mode is OPAMP_STANDALONE_MODE - & PGA mode: i.e. when mode is OPAMP_PGA_MODE - This parameter must be a value of @ref OPAMP_InvertingInput - - In Follower mode i.e. when mode is OPAMP_FOLLOWER_MODE - This parameter is Not Applicable */ - - uint32_t NonInvertingInput; /*!< Specifies the non inverting input of the opamp: - This parameter must be a value of @ref OPAMP_NonInvertingInput */ - - uint32_t PgaGain; /*!< Specifies the gain in PGA mode - i.e. when mode is OPAMP_PGA_MODE. - This parameter must be a value of @ref OPAMP_PgaGain (2, 4, 8 or 16 ) */ - - uint32_t UserTrimming; /*!< Specifies the trimming mode - This parameter must be a value of @ref OPAMP_UserTrimming - UserTrimming is either factory or user trimming.*/ - - uint32_t TrimmingValueP; /*!< Specifies the offset trimming value (PMOS) - i.e. when UserTrimming is OPAMP_TRIMMING_USER. - This parameter must be a number between Min_Data = 0 and Max_Data = 31 - 16 is typical default value */ - - uint32_t TrimmingValueN; /*!< Specifies the offset trimming value (NMOS) - i.e. when UserTrimming is OPAMP_TRIMMING_USER. - This parameter must be a number between Min_Data = 0 and Max_Data = 31 - 16 is typical default value */ - - uint32_t TrimmingValuePLowPower; /*!< Specifies the offset trimming value (PMOS) - i.e. when UserTrimming is OPAMP_TRIMMING_USER. - This parameter must be a number between Min_Data = 0 and Max_Data = 31 - 16 is typical default value */ - - uint32_t TrimmingValueNLowPower; /*!< Specifies the offset trimming value (NMOS) - i.e. when UserTrimming is OPAMP_TRIMMING_USER. - This parameter must be a number between Min_Data = 0 and Max_Data = 31 - 16 is typical default value */ - -}OPAMP_InitTypeDef; - -/** - * @brief HAL State structures definition - */ - -typedef enum -{ - HAL_OPAMP_STATE_RESET = 0x00000000, /*!< OPAMP is not yet Initialized */ - - HAL_OPAMP_STATE_READY = 0x00000001, /*!< OPAMP is initialized and ready for use */ - HAL_OPAMP_STATE_CALIBBUSY = 0x00000002, /*!< OPAMP is enabled in auto calibration mode */ - - HAL_OPAMP_STATE_BUSY = 0x00000004, /*!< OPAMP is enabled and running in normal mode */ - HAL_OPAMP_STATE_BUSYLOCKED = 0x00000005 /*!< OPAMP is locked - only system reset allows reconfiguring the opamp. */ - -}HAL_OPAMP_StateTypeDef; - -/** - * @brief OPAMP Handle Structure definition - */ -typedef struct -{ - OPAMP_TypeDef *Instance; /*!< OPAMP instance's registers base address */ - OPAMP_InitTypeDef Init; /*!< OPAMP required parameters */ - HAL_StatusTypeDef Status; /*!< OPAMP peripheral status */ - HAL_LockTypeDef Lock; /*!< Locking object */ - __IO HAL_OPAMP_StateTypeDef State; /*!< OPAMP communication state */ - -} OPAMP_HandleTypeDef; - -/** - * @brief HAl_OPAMP_TrimmingValueTypeDef definition - */ - -typedef uint32_t HAL_OPAMP_TrimmingValueTypeDef; - -/** - * @} - */ - -/* Exported constants --------------------------------------------------------*/ - -/** @defgroup OPAMP_Exported_Constants OPAMP Exported Constants - * @{ - */ - -/** @defgroup OPAMP_Mode OPAMP Mode - * @{ - */ -#define OPAMP_STANDALONE_MODE ((uint32_t)0x00000000) /*!< standalone mode */ -#define OPAMP_PGA_MODE OPAMP_CSR_OPAMODE_1 /*!< PGA mode */ -#define OPAMP_FOLLOWER_MODE OPAMP_CSR_OPAMODE /*!< follower mode */ - -/** - * @} - */ - -/** @defgroup OPAMP_NonInvertingInput OPAMP Non Inverting Input - * @{ - */ - -#define OPAMP_NONINVERTINGINPUT_IO0 ((uint32_t)0x00000000) /*!< OPAMP non-inverting input connected to dedicated IO pin */ -#define OPAMP_NONINVERTINGINPUT_DAC_CH OPAMP_CSR_VPSEL /*!< OPAMP non-inverting input connected internally to DAC channel */ - -/** - * @} - */ - -/** @defgroup OPAMP_InvertingInput OPAMP Inverting Input - * @{ - */ - -#define OPAMP_INVERTINGINPUT_IO0 ((uint32_t)0x00000000) /*!< OPAMP inverting input connected to dedicated IO pin low-leakage */ -#define OPAMP_INVERTINGINPUT_IO1 OPAMP_CSR_VMSEL_0 /*!< OPAMP inverting input connected to alternative IO pin available on some device packages */ -#define OPAMP_INVERTINGINPUT_CONNECT_NO OPAMP_CSR_VMSEL_1 /*!< OPAMP inverting input not connected externally (PGA mode only) */ - -/** - * @} - */ - -/** @defgroup OPAMP_PgaGain OPAMP Pga Gain - * @{ - */ - -#define OPAMP_PGA_GAIN_2 ((uint32_t)0x00000000) /*!< PGA gain = 2 */ -#define OPAMP_PGA_GAIN_4 OPAMP_CSR_PGGAIN_0 /*!< PGA gain = 4 */ -#define OPAMP_PGA_GAIN_8 OPAMP_CSR_PGGAIN_1 /*!< PGA gain = 8 */ -#define OPAMP_PGA_GAIN_16 (OPAMP_CSR_PGGAIN_0 | OPAMP_CSR_PGGAIN_1) /*!< PGA gain = 16 */ - -/** - * @} - */ - -/** @defgroup OPAMP_PowerMode OPAMP PowerMode - * @{ - */ -#define OPAMP_POWERMODE_NORMAL ((uint32_t)0x00000000) -#define OPAMP_POWERMODE_LOWPOWER OPAMP_CSR_OPALPM - -/** - * @} - */ - -/** @defgroup OPAMP_PowerSupplyRange OPAMP PowerSupplyRange - * @{ - */ -#define OPAMP_POWERSUPPLY_LOW ((uint32_t)0x00000000) /*!< Power supply range low (VDDA lower than 2.4V) */ -#define OPAMP_POWERSUPPLY_HIGH OPAMP1_CSR_OPARANGE /*!< Power supply range high (VDDA higher than 2.4V) */ - -/** - * @} - */ - -/** @defgroup OPAMP_UserTrimming OPAMP User Trimming - * @{ - */ -#define OPAMP_TRIMMING_FACTORY ((uint32_t)0x00000000) /*!< Factory trimming */ -#define OPAMP_TRIMMING_USER OPAMP_CSR_USERTRIM /*!< User trimming */ - -#define IS_OPAMP_TRIMMING(TRIMMING) (((TRIMMING) == OPAMP_TRIMMING_FACTORY) || \ - ((TRIMMING) == OPAMP_TRIMMING_USER)) -/** - * @} - */ - -/** @defgroup OPAMP_FactoryTrimming OPAMP Factory Trimming - * @{ - */ -#define OPAMP_FACTORYTRIMMING_DUMMY ((uint32_t)0xFFFFFFFF) /*!< Dummy value if trimming value could not be retrieved */ - -#define OPAMP_FACTORYTRIMMING_N ((uint32_t)0x00000000) /*!< Offset trimming N */ -#define OPAMP_FACTORYTRIMMING_P ((uint32_t)0x00000001) /*!< Offset trimming P */ - -/** - * @} - */ - - /** - * @} - */ - -/* Private constants ---------------------------------------------------------*/ -/** @defgroup OPAMP_Private_Constants OPAMP Private Constants - * @brief OPAMP Private constants and defines - * @{ - */ - -/* NONINVERTING bit position in OTR & LPOTR */ -#define OPAMP_INPUT_NONINVERTING ((uint32_t) 8) /*!< Non inverting input */ - -/* Offset trimming time: during calibration, minimum time needed between two */ -/* steps to have 1 mV accuracy. */ -/* Refer to datasheet, electrical characteristics: parameter tOFFTRIM Typ=1ms.*/ -/* Unit: ms. */ -#define OPAMP_TRIMMING_DELAY ((uint32_t) 1) - -/** - * @} - */ - -/* Exported macros -----------------------------------------------------------*/ -/** @defgroup OPAMP_Exported_Macros OPAMP Exported Macros - * @{ - */ - -/** @brief Reset OPAMP handle state. - * @param __HANDLE__: OPAMP handle. - * @retval None - */ -#define __HAL_OPAMP_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_OPAMP_STATE_RESET) - -/** - * @} - */ - -/* Private macro -------------------------------------------------------------*/ - -/** @defgroup OPAMP_Private_Macros OPAMP Private Macros - * @{ - */ - -#define IS_OPAMP_FUNCTIONAL_NORMALMODE(INPUT) (((INPUT) == OPAMP_STANDALONE_MODE) || \ - ((INPUT) == OPAMP_PGA_MODE) || \ - ((INPUT) == OPAMP_FOLLOWER_MODE)) - -#define IS_OPAMP_INVERTING_INPUT_STANDALONE(INPUT) (((INPUT) == OPAMP_INVERTINGINPUT_IO0) || \ - ((INPUT) == OPAMP_INVERTINGINPUT_IO1)) - -#define IS_OPAMP_NONINVERTING_INPUT(INPUT) (((INPUT) == OPAMP_NONINVERTINGINPUT_IO0) || \ - ((INPUT) == OPAMP_NONINVERTINGINPUT_DAC_CH)) - -#define IS_OPAMP_INVERTING_INPUT_PGA(INPUT) (((INPUT) == OPAMP_INVERTINGINPUT_IO0) || \ - ((INPUT) == OPAMP_INVERTINGINPUT_IO1)|| \ - ((INPUT) == OPAMP_INVERTINGINPUT_CONNECT_NO)) - -#define IS_OPAMP_PGA_GAIN(GAIN) (((GAIN) == OPAMP_PGA_GAIN_2) || \ - ((GAIN) == OPAMP_PGA_GAIN_4) || \ - ((GAIN) == OPAMP_PGA_GAIN_8) || \ - ((GAIN) == OPAMP_PGA_GAIN_16)) - -#define IS_OPAMP_POWERMODE(TRIMMING) (((TRIMMING) == OPAMP_POWERMODE_NORMAL) || \ - ((TRIMMING) == OPAMP_POWERMODE_LOWPOWER) ) - -#define IS_OPAMP_POWER_SUPPLY_RANGE(RANGE) (((RANGE) == OPAMP_POWERSUPPLY_LOW) || \ - ((RANGE) == OPAMP_POWERSUPPLY_HIGH) ) - -#define IS_OPAMP_TRIMMING(TRIMMING) (((TRIMMING) == OPAMP_TRIMMING_FACTORY) || \ - ((TRIMMING) == OPAMP_TRIMMING_USER)) - - -#define IS_OPAMP_TRIMMINGVALUE(TRIMMINGVALUE) ((TRIMMINGVALUE) <= 0x1F) - -#define IS_OPAMP_FACTORYTRIMMING(TRIMMING) (((TRIMMING) == OPAMP_FACTORYTRIMMING_N) || \ - ((TRIMMING) == OPAMP_FACTORYTRIMMING_P)) - -/** - * @} - */ - -/* Include OPAMP HAL Extended module */ -#include "stm32l4xx_hal_opamp_ex.h" - -/* Exported functions --------------------------------------------------------*/ -/** @addtogroup OPAMP_Exported_Functions - * @{ - */ - -/** @addtogroup OPAMP_Exported_Functions_Group1 - * @{ - */ -/* Initialization/de-initialization functions **********************************/ -HAL_StatusTypeDef HAL_OPAMP_Init(OPAMP_HandleTypeDef *hopamp); -HAL_StatusTypeDef HAL_OPAMP_DeInit (OPAMP_HandleTypeDef *hopamp); -void HAL_OPAMP_MspInit(OPAMP_HandleTypeDef *hopamp); -void HAL_OPAMP_MspDeInit(OPAMP_HandleTypeDef *hopamp); -/** - * @} - */ - -/** @addtogroup OPAMP_Exported_Functions_Group2 - * @{ - */ - -/* I/O operation functions *****************************************************/ -HAL_StatusTypeDef HAL_OPAMP_Start(OPAMP_HandleTypeDef *hopamp); -HAL_StatusTypeDef HAL_OPAMP_Stop(OPAMP_HandleTypeDef *hopamp); -HAL_StatusTypeDef HAL_OPAMP_SelfCalibrate(OPAMP_HandleTypeDef *hopamp); - -/** - * @} - */ - -/** @addtogroup OPAMP_Exported_Functions_Group3 - * @{ - */ - -/* Peripheral Control functions ************************************************/ -HAL_StatusTypeDef HAL_OPAMP_Lock(OPAMP_HandleTypeDef *hopamp); -HAL_OPAMP_TrimmingValueTypeDef HAL_OPAMP_GetTrimOffset (OPAMP_HandleTypeDef *hopamp, uint32_t trimmingoffset); - -/** - * @} - */ - -/** @addtogroup OPAMP_Exported_Functions_Group4 - * @{ - */ - -/* Peripheral State functions **************************************************/ -HAL_OPAMP_StateTypeDef HAL_OPAMP_GetState(OPAMP_HandleTypeDef *hopamp); - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32L4xx_HAL_OPAMP_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ -
--- a/Inc/stm32l4xx_hal_opamp_ex.h Thu Nov 12 20:49:49 2015 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,104 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_opamp_ex.h - * @author MCD Application Team - * @version V1.1.0 - * @date 16-September-2015 - * @brief Header file of OPAMP HAL Extended module. - ****************************************************************************** - * @attention - * - * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_OPAMP_EX_H -#define __STM32L4xx_HAL_OPAMP_EX_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal_def.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @addtogroup OPAMPEx - * @{ - */ -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ -/* Exported macro ------------------------------------------------------------*/ -/* Exported functions --------------------------------------------------------*/ -/** @addtogroup OPAMPEx_Exported_Functions OPAMPEx Exported Functions - * @{ - */ - -/* I/O operation functions *****************************************************/ -/** @addtogroup OPAMPEx_Exported_Functions_Group1 Extended Input and Output operation functions - * @{ - */ - -HAL_StatusTypeDef HAL_OPAMPEx_SelfCalibrateAll(OPAMP_HandleTypeDef *hopamp1, OPAMP_HandleTypeDef *hopamp2); - -/** - * @} - */ - -/* Peripheral Control functions ************************************************/ -/** @addtogroup OPAMPEx_Exported_Functions_Group2 - * @{ - */ -HAL_StatusTypeDef HAL_OPAMPEx_Unlock(OPAMP_HandleTypeDef *hopamp); -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - - -#endif /* __STM32L4xx_HAL_OPAMP_EX_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ -
--- a/Inc/stm32l4xx_hal_pcd.h Thu Nov 12 20:49:49 2015 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,313 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_pcd.h - * @author MCD Application Team - * @version V1.1.0 - * @date 16-September-2015 - * @brief Header file of PCD HAL module. - ****************************************************************************** - * @attention - * - * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_PCD_H -#define __STM32L4xx_HAL_PCD_H - -#ifdef __cplusplus - extern "C" { -#endif - -#if defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_ll_usb.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @addtogroup PCD - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ -/** @defgroup PCD_Exported_Types PCD Exported Types - * @{ - */ - - /** - * @brief PCD State structure definition - */ -typedef enum -{ - HAL_PCD_STATE_RESET = 0x00, - HAL_PCD_STATE_READY = 0x01, - HAL_PCD_STATE_ERROR = 0x02, - HAL_PCD_STATE_BUSY = 0x03, - HAL_PCD_STATE_TIMEOUT = 0x04 -} PCD_StateTypeDef; - -/* Device LPM suspend state */ -typedef enum -{ - LPM_L0 = 0x00, /* on */ - LPM_L1 = 0x01, /* LPM L1 sleep */ - LPM_L2 = 0x02, /* suspend */ - LPM_L3 = 0x03, /* off */ -}PCD_LPM_StateTypeDef; - -typedef USB_OTG_GlobalTypeDef PCD_TypeDef; -typedef USB_OTG_CfgTypeDef PCD_InitTypeDef; -typedef USB_OTG_EPTypeDef PCD_EPTypeDef ; - -/** - * @brief PCD Handle Structure definition - */ -typedef struct -{ - PCD_TypeDef *Instance; /*!< Register base address */ - PCD_InitTypeDef Init; /*!< PCD required parameters */ - PCD_EPTypeDef IN_ep[15]; /*!< IN endpoint parameters */ - PCD_EPTypeDef OUT_ep[15]; /*!< OUT endpoint parameters */ - HAL_LockTypeDef Lock; /*!< PCD peripheral status */ - __IO PCD_StateTypeDef State; /*!< PCD communication state */ - uint32_t Setup[12]; /*!< Setup packet buffer */ - PCD_LPM_StateTypeDef LPM_State; /*!< LPM State */ - uint32_t BESL; - - - uint32_t lpm_active; /*!< Enable or disable the Link Power Management . - This parameter can be set to ENABLE or DISABLE */ - - uint32_t battery_charging_active; /*!< Enable or disable Battery charging. - This parameter can be set to ENABLE or DISABLE */ - void *pData; /*!< Pointer to upper stack Handler */ - -} PCD_HandleTypeDef; - -/** - * @} - */ - -/* Exported constants --------------------------------------------------------*/ -/** @defgroup PCD_Exported_Constants PCD Exported Constants - * @{ - */ - -/** @defgroup PCD_Speed PCD Speed - * @{ - */ -#define PCD_SPEED_FULL 1 -/** - * @} - */ - -/** @defgroup PCD_PHY_Module PCD PHY Module - * @{ - */ -#define PCD_PHY_EMBEDDED 1 -/** - * @} - */ - -/** @defgroup PCD_Turnaround_Timeout Turnaround Timeout Value - * @{ - */ -#ifndef USBD_FS_TRDT_VALUE - #define USBD_FS_TRDT_VALUE 5 -#endif /* USBD_FS_TRDT_VALUE */ -/** - * @} - */ - -/** - * @} - */ - -/* Exported macros -----------------------------------------------------------*/ -/** @defgroup PCD_Exported_Macros PCD Exported Macros - * @brief macros to handle interrupts and specific clock configurations - * @{ - */ -#define __HAL_PCD_ENABLE(__HANDLE__) USB_EnableGlobalInt ((__HANDLE__)->Instance) -#define __HAL_PCD_DISABLE(__HANDLE__) USB_DisableGlobalInt ((__HANDLE__)->Instance) - -#define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__)) -#define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->GINTSTS) &= (__INTERRUPT__)) -#define __HAL_PCD_IS_INVALID_INTERRUPT(__HANDLE__) (USB_ReadInterrupts((__HANDLE__)->Instance) == 0) - - -#define __HAL_PCD_UNGATE_PHYCLOCK(__HANDLE__) *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) &= \ - ~(USB_OTG_PCGCCTL_STOPCLK) - -#define __HAL_PCD_GATE_PHYCLOCK(__HANDLE__) *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) |= USB_OTG_PCGCCTL_STOPCLK - -#define __HAL_PCD_IS_PHY_SUSPENDED(__HANDLE__) ((*(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE))&0x10) - -#define USB_OTG_FS_WAKEUP_EXTI_RISING_EDGE ((uint32_t)0x08) -#define USB_OTG_FS_WAKEUP_EXTI_FALLING_EDGE ((uint32_t)0x0C) -#define USB_OTG_FS_WAKEUP_EXTI_RISING_FALLING_EDGE ((uint32_t)0x10) - -#define USB_OTG_FS_WAKEUP_EXTI_LINE ((uint32_t)0x00020000) /*!< External interrupt line 17 Connected to the USB FS EXTI Line */ - - -#define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR1 |= USB_OTG_FS_WAKEUP_EXTI_LINE -#define __HAL_USB_OTG_FS_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR1 &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE) -#define __HAL_USB_OTG_FS_WAKEUP_EXTI_GET_FLAG() EXTI->PR1 & (USB_OTG_FS_WAKEUP_EXTI_LINE) -#define __HAL_USB_OTG_FS_WAKEUP_EXTI_CLEAR_FLAG() EXTI->PR1 = USB_OTG_FS_WAKEUP_EXTI_LINE - -#define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_EDGE() do {\ - EXTI->FTSR1 &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE);\ - EXTI->RTSR1 |= USB_OTG_FS_WAKEUP_EXTI_LINE;\ - } while(0) - -#define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_FALLING_EDGE() do {\ - EXTI->FTSR1 |= (USB_OTG_FS_WAKEUP_EXTI_LINE);\ - EXTI->RTSR1 &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE);\ - } while(0) - -#define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE() do {\ - EXTI->RTSR1 &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE);\ - EXTI->FTSR1 &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE);\ - EXTI->RTSR1 |= USB_OTG_FS_WAKEUP_EXTI_LINE;\ - EXTI->FTSR1 |= USB_OTG_FS_WAKEUP_EXTI_LINE;\ - } while(0) - -#define __HAL_USB_OTG_FS_WAKEUP_EXTI_GENERATE_SWIT() (EXTI->SWIER1 |= USB_OTG_FS_WAKEUP_EXTI_LINE) - -/** - * @} - */ - -/* Include PCD HAL Extended module */ -#include "stm32l4xx_hal_pcd_ex.h" - -/** @addtogroup PCD_Exported_Functions PCD Exported Functions - * @{ - */ - -/* Initialization/de-initialization functions ********************************/ -/** @addtogroup PCD_Exported_Functions_Group1 Initialization and de-initialization functions - * @{ - */ -HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd); -HAL_StatusTypeDef HAL_PCD_DeInit (PCD_HandleTypeDef *hpcd); -void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd); -void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd); -/** - * @} - */ - -/* I/O operation functions ***************************************************/ -/* Non-Blocking mode: Interrupt */ -/** @addtogroup PCD_Exported_Functions_Group2 Input and Output operation functions - * @{ - */ - /* Non-Blocking mode: Interrupt */ -HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd); -HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd); -void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd); - -void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); -void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); -void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd); -void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd); -void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd); -void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd); -void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd); -void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); -void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum); -void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd); -void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd); -/** - * @} - */ - -/* Peripheral Control functions **********************************************/ -/** @addtogroup PCD_Exported_Functions_Group3 Peripheral Control functions - * @{ - */ -HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd); -HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd); -HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address); -HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type); -HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); -HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len); -HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len); -uint16_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); -HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); -HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); -HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr); -HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd); -HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd); -/** - * @} - */ - -/* Peripheral State functions ************************************************/ -/** @addtogroup PCD_Exported_Functions_Group4 Peripheral State functions - * @{ - */ -PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd); -/** - * @} - */ - -/** - * @} - */ - -/* Private macros ------------------------------------------------------------*/ -/** @defgroup PCD_Private_Macros PCD Private Macros - * @{ - */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -#endif /* STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx */ - -#ifdef __cplusplus -} -#endif - - -#endif /* __STM32L4xx_HAL_PCD_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ -
--- a/Inc/stm32l4xx_hal_pcd_ex.h Thu Nov 12 20:49:49 2015 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,121 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_pcd_ex.h - * @author MCD Application Team - * @version V1.1.0 - * @date 16-September-2015 - * @brief Header file of PCD HAL module. - ****************************************************************************** - * @attention - * - * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_PCD_EX_H -#define __STM32L4xx_HAL_PCD_EX_H - -#ifdef __cplusplus - extern "C" { -#endif - -#if defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal_def.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @addtogroup PCDEx - * @{ - */ -/* Exported types ------------------------------------------------------------*/ -typedef enum -{ - PCD_LPM_L0_ACTIVE = 0x00, /* on */ - PCD_LPM_L1_ACTIVE = 0x01, /* LPM L1 sleep */ -}PCD_LPM_MsgTypeDef; - -typedef enum -{ - PCD_BCD_ERROR = 0xFF, - PCD_BCD_CONTACT_DETECTION = 0xFE, - PCD_BCD_STD_DOWNSTREAM_PORT = 0xFD, - PCD_BCD_CHARGING_DOWNSTREAM_PORT = 0xFC, - PCD_BCD_DEDICATED_CHARGING_PORT = 0xFB, - PCD_BCD_DISCOVERY_COMPLETED = 0x00, - -}PCD_BCD_MsgTypeDef; - -/* Exported constants --------------------------------------------------------*/ -/* Exported macros -----------------------------------------------------------*/ -/* Exported functions --------------------------------------------------------*/ -/** @addtogroup PCDEx_Exported_Functions PCDEx Exported Functions - * @{ - */ -/** @addtogroup PCDEx_Exported_Functions_Group1 Peripheral Control functions - * @{ - */ -HAL_StatusTypeDef HAL_PCDEx_SetTxFiFo(PCD_HandleTypeDef *hpcd, uint8_t fifo, uint16_t size); -HAL_StatusTypeDef HAL_PCDEx_SetRxFiFo(PCD_HandleTypeDef *hpcd, uint16_t size); -HAL_StatusTypeDef HAL_PCDEx_ActivateLPM(PCD_HandleTypeDef *hpcd); -HAL_StatusTypeDef HAL_PCDEx_DeActivateLPM(PCD_HandleTypeDef *hpcd); -HAL_StatusTypeDef HAL_PCDEx_ActivateBCD(PCD_HandleTypeDef *hpcd); -HAL_StatusTypeDef HAL_PCDEx_DeActivateBCD(PCD_HandleTypeDef *hpcd); -void HAL_PCDEx_BCD_VBUSDetect(PCD_HandleTypeDef *hpcd); -void HAL_PCDEx_LPM_Callback(PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef msg); -void HAL_PCDEx_BCD_Callback(PCD_HandleTypeDef *hpcd, PCD_BCD_MsgTypeDef msg); - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -#endif /* STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx */ - -#ifdef __cplusplus -} -#endif - - -#endif /* __STM32L4xx_HAL_PCD_EX_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ -
--- a/Inc/stm32l4xx_hal_rng.h Thu Nov 12 20:49:49 2015 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,286 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_rng.h - * @author MCD Application Team - * @version V1.1.0 - * @date 16-September-2015 - * @brief Header file of RNG HAL module. - ****************************************************************************** - * @attention - * - * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_RNG_H -#define __STM32L4xx_HAL_RNG_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal_def.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @addtogroup RNG - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ -/** @defgroup RNG_Exported_Types RNG Exported Types - * @{ - */ - -/** - * @brief RNG HAL State Structure definition - */ -typedef enum -{ - HAL_RNG_STATE_RESET = 0x00, /*!< RNG not yet initialized or disabled */ - HAL_RNG_STATE_READY = 0x01, /*!< RNG initialized and ready for use */ - HAL_RNG_STATE_BUSY = 0x02, /*!< RNG internal process is ongoing */ - HAL_RNG_STATE_TIMEOUT = 0x03, /*!< RNG timeout state */ - HAL_RNG_STATE_ERROR = 0x04 /*!< RNG error state */ - -}HAL_RNG_StateTypeDef; - -/** - * @brief RNG Handle Structure definition - */ -typedef struct -{ - RNG_TypeDef *Instance; /*!< Register base address */ - - HAL_LockTypeDef Lock; /*!< RNG locking object */ - - __IO HAL_RNG_StateTypeDef State; /*!< RNG communication state */ - - uint32_t RandomNumber; /*!< Last Generated RNG Data */ - -}RNG_HandleTypeDef; - -/** - * @} - */ - -/* Exported constants --------------------------------------------------------*/ -/** @defgroup RNG_Exported_Constants RNG Exported Constants - * @{ - */ - -/** @defgroup RNG_Interrupt_definition RNG Interrupts Definition - * @{ - */ -#define RNG_IT_DRDY RNG_SR_DRDY /*!< Data Ready interrupt */ -#define RNG_IT_CEI RNG_SR_CEIS /*!< Clock error interrupt */ -#define RNG_IT_SEI RNG_SR_SEIS /*!< Seed error interrupt */ -/** - * @} - */ - -/** @defgroup RNG_Flag_definition RNG Flags Definition - * @{ - */ -#define RNG_FLAG_DRDY RNG_SR_DRDY /*!< Data ready */ -#define RNG_FLAG_CECS RNG_SR_CECS /*!< Clock error current status */ -#define RNG_FLAG_SECS RNG_SR_SECS /*!< Seed error current status */ -/** - * @} - */ - -/** - * @} - */ - -/* Exported macros -----------------------------------------------------------*/ -/** @defgroup RNG_Exported_Macros RNG Exported Macros - * @{ - */ - -/** @brief Reset RNG handle state. - * @param __HANDLE__: RNG Handle - * @retval None - */ -#define __HAL_RNG_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_RNG_STATE_RESET) - -/** - * @brief Enable the RNG peripheral. - * @param __HANDLE__: RNG Handle - * @retval None - */ -#define __HAL_RNG_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= RNG_CR_RNGEN) - -/** - * @brief Disable the RNG peripheral. - * @param __HANDLE__: RNG Handle - * @retval None - */ -#define __HAL_RNG_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~RNG_CR_RNGEN) - -/** - * @brief Check whether the specified RNG flag is set or not. - * @param __HANDLE__: RNG Handle - * @param __FLAG__: RNG flag - * This parameter can be one of the following values: - * @arg RNG_FLAG_DRDY: Data ready - * @arg RNG_FLAG_CECS: Clock error current status - * @arg RNG_FLAG_SECS: Seed error current status - * @retval The new state of __FLAG__ (SET or RESET). - */ -#define __HAL_RNG_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__)) - - -/** - * @brief Clear the selected RNG flag status. - * @param __HANDLE__: RNG handle - * @param __FLAG__: RNG flag to clear - * @note WARNING: This is a dummy macro for HAL code alignment, - * flags RNG_FLAG_DRDY, RNG_FLAG_CECS and RNG_FLAG_SECS are read-only. - * @retval None - */ -#define __HAL_RNG_CLEAR_FLAG(__HANDLE__, __FLAG__) /* dummy macro */ - - - -/** - * @brief Enable the RNG interrupt. - * @param __HANDLE__: RNG Handle - * @retval None - */ -#define __HAL_RNG_ENABLE_IT(__HANDLE__) ((__HANDLE__)->Instance->CR |= RNG_CR_IE) - -/** - * @brief Disable the RNG interrupt. - * @param __HANDLE__: RNG Handle - * @retval None - */ -#define __HAL_RNG_DISABLE_IT(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~RNG_CR_IE) - -/** - * @brief Check whether the specified RNG interrupt has occurred or not. - * @param __HANDLE__: RNG Handle - * @param __INTERRUPT__: specifies the RNG interrupt status flag to check. - * This parameter can be one of the following values: - * @arg RNG_IT_DRDY: Data ready interrupt - * @arg RNG_IT_CEI: Clock error interrupt - * @arg RNG_IT_SEI: Seed error interrupt - * @retval The new state of __INTERRUPT__ (SET or RESET). - */ -#define __HAL_RNG_GET_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->SR & (__INTERRUPT__)) == (__INTERRUPT__)) - -/** - * @brief Clear the RNG interrupt status flags. - * @param __HANDLE__: RNG Handle - * @param __INTERRUPT__: specifies the RNG interrupt status flag to clear. - * This parameter can be one of the following values: - * @arg RNG_IT_CEI: Clock error interrupt - * @arg RNG_IT_SEI: Seed error interrupt - * @note RNG_IT_DRDY flag is read-only, reading RNG_DR register automatically clears RNG_IT_DRDY. - * @retval None - */ -#define __HAL_RNG_CLEAR_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->SR) = ~(__INTERRUPT__)) - -/** - * @} - */ - - -/* Exported functions --------------------------------------------------------*/ -/** @defgroup RNG_Exported_Functions RNG Exported Functions - * @{ - */ - -/* Initialization and de-initialization functions ******************************/ -/** @defgroup RNG_Exported_Functions_Group1 Initialization and de-initialization functions - * @{ - */ -HAL_StatusTypeDef HAL_RNG_Init(RNG_HandleTypeDef *hrng); -HAL_StatusTypeDef HAL_RNG_DeInit (RNG_HandleTypeDef *hrng); -void HAL_RNG_MspInit(RNG_HandleTypeDef *hrng); -void HAL_RNG_MspDeInit(RNG_HandleTypeDef *hrng); -/** - * @} - */ - -/* Peripheral Control functions ************************************************/ -/** @defgroup RNG_Exported_Functions_Group2 Peripheral Control functions - * @{ - */ -uint32_t HAL_RNG_GetRandomNumber(RNG_HandleTypeDef *hrng); /* Obsolete, use HAL_RNG_GenerateRandomNumber() instead */ -uint32_t HAL_RNG_GetRandomNumber_IT(RNG_HandleTypeDef *hrng); /* Obsolete, use HAL_RNG_GenerateRandomNumber_IT() instead */ - -HAL_StatusTypeDef HAL_RNG_GenerateRandomNumber(RNG_HandleTypeDef *hrng, uint32_t *random32bit); -HAL_StatusTypeDef HAL_RNG_GenerateRandomNumber_IT(RNG_HandleTypeDef *hrng); -uint32_t HAL_RNG_ReadLastRandomNumber(RNG_HandleTypeDef *hrng); - -void HAL_RNG_IRQHandler(RNG_HandleTypeDef *hrng); -void HAL_RNG_ErrorCallback(RNG_HandleTypeDef *hrng); -void HAL_RNG_ReadyDataCallback(RNG_HandleTypeDef* hrng, uint32_t random32bit); -/** - * @} - */ - -/* Peripheral State functions **************************************************/ -/** @defgroup RNG_Exported_Functions_Group3 Peripheral State functions - * @{ - */ -HAL_RNG_StateTypeDef HAL_RNG_GetState(RNG_HandleTypeDef *hrng); -/** - * @} - */ - -/** - * @} - */ - -/* Private types -------------------------------------------------------------*/ -/* Private defines -----------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private constants ---------------------------------------------------------*/ -/* Private macros ------------------------------------------------------------*/ -/* Private functions prototypes ----------------------------------------------*/ - -/** - * @} - */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32L4xx_HAL_RNG_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ -
--- a/Inc/stm32l4xx_hal_sd.h Thu Nov 12 20:49:49 2015 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,775 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_sd.h - * @author MCD Application Team - * @version V1.1.0 - * @date 16-September-2015 - * @brief Header file of SD HAL module. - ****************************************************************************** - * @attention - * - * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_SD_H -#define __STM32L4xx_HAL_SD_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_ll_sdmmc.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @defgroup SD SD - * @brief SD HAL module driver - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ -/** @defgroup SD_Exported_Types SD Exported Types - * @{ - */ - -/** @defgroup SD_Exported_Types_Group1 SD Handle Structure definition - * @{ - */ -#define SD_InitTypeDef SDMMC_InitTypeDef -#define SD_TypeDef SDMMC_TypeDef - -typedef struct -{ - SD_TypeDef *Instance; /*!< SDMMC register base address */ - - SD_InitTypeDef Init; /*!< SD required parameters */ - - HAL_LockTypeDef Lock; /*!< SD locking object */ - - uint32_t CardType; /*!< SD card type */ - - uint32_t RCA; /*!< SD relative card address */ - - uint32_t CSD[4]; /*!< SD card specific data table */ - - uint32_t CID[4]; /*!< SD card identification number table */ - - __IO uint32_t SdTransferCplt; /*!< SD transfer complete flag in non blocking mode */ - - __IO uint32_t SdTransferErr; /*!< SD transfer error flag in non blocking mode */ - - __IO uint32_t DmaTransferCplt; /*!< SD DMA transfer complete flag */ - - __IO uint32_t SdOperation; /*!< SD transfer operation (read/write) */ - - DMA_HandleTypeDef *hdmarx; /*!< SD Rx DMA handle parameters */ - - DMA_HandleTypeDef *hdmatx; /*!< SD Tx DMA handle parameters */ - -}SD_HandleTypeDef; -/** - * @} - */ - -/** @defgroup SD_Exported_Types_Group2 Card Specific Data: CSD Register - * @{ - */ -typedef struct -{ - __IO uint8_t CSDStruct; /*!< CSD structure */ - __IO uint8_t SysSpecVersion; /*!< System specification version */ - __IO uint8_t Reserved1; /*!< Reserved */ - __IO uint8_t TAAC; /*!< Data read access time 1 */ - __IO uint8_t NSAC; /*!< Data read access time 2 in CLK cycles */ - __IO uint8_t MaxBusClkFrec; /*!< Max. bus clock frequency */ - __IO uint16_t CardComdClasses; /*!< Card command classes */ - __IO uint8_t RdBlockLen; /*!< Max. read data block length */ - __IO uint8_t PartBlockRead; /*!< Partial blocks for read allowed */ - __IO uint8_t WrBlockMisalign; /*!< Write block misalignment */ - __IO uint8_t RdBlockMisalign; /*!< Read block misalignment */ - __IO uint8_t DSRImpl; /*!< DSR implemented */ - __IO uint8_t Reserved2; /*!< Reserved */ - __IO uint32_t DeviceSize; /*!< Device Size */ - __IO uint8_t MaxRdCurrentVDDMin; /*!< Max. read current @ VDD min */ - __IO uint8_t MaxRdCurrentVDDMax; /*!< Max. read current @ VDD max */ - __IO uint8_t MaxWrCurrentVDDMin; /*!< Max. write current @ VDD min */ - __IO uint8_t MaxWrCurrentVDDMax; /*!< Max. write current @ VDD max */ - __IO uint8_t DeviceSizeMul; /*!< Device size multiplier */ - __IO uint8_t EraseGrSize; /*!< Erase group size */ - __IO uint8_t EraseGrMul; /*!< Erase group size multiplier */ - __IO uint8_t WrProtectGrSize; /*!< Write protect group size */ - __IO uint8_t WrProtectGrEnable; /*!< Write protect group enable */ - __IO uint8_t ManDeflECC; /*!< Manufacturer default ECC */ - __IO uint8_t WrSpeedFact; /*!< Write speed factor */ - __IO uint8_t MaxWrBlockLen; /*!< Max. write data block length */ - __IO uint8_t WriteBlockPaPartial; /*!< Partial blocks for write allowed */ - __IO uint8_t Reserved3; /*!< Reserved */ - __IO uint8_t ContentProtectAppli; /*!< Content protection application */ - __IO uint8_t FileFormatGrouop; /*!< File format group */ - __IO uint8_t CopyFlag; /*!< Copy flag (OTP) */ - __IO uint8_t PermWrProtect; /*!< Permanent write protection */ - __IO uint8_t TempWrProtect; /*!< Temporary write protection */ - __IO uint8_t FileFormat; /*!< File format */ - __IO uint8_t ECC; /*!< ECC code */ - __IO uint8_t CSD_CRC; /*!< CSD CRC */ - __IO uint8_t Reserved4; /*!< Always 1 */ - -}HAL_SD_CSDTypedef; -/** - * @} - */ - -/** @defgroup SD_Exported_Types_Group3 Card Identification Data: CID Register - * @{ - */ -typedef struct -{ - __IO uint8_t ManufacturerID; /*!< Manufacturer ID */ - __IO uint16_t OEM_AppliID; /*!< OEM/Application ID */ - __IO uint32_t ProdName1; /*!< Product Name part1 */ - __IO uint8_t ProdName2; /*!< Product Name part2 */ - __IO uint8_t ProdRev; /*!< Product Revision */ - __IO uint32_t ProdSN; /*!< Product Serial Number */ - __IO uint8_t Reserved1; /*!< Reserved1 */ - __IO uint16_t ManufactDate; /*!< Manufacturing Date */ - __IO uint8_t CID_CRC; /*!< CID CRC */ - __IO uint8_t Reserved2; /*!< Always 1 */ - -}HAL_SD_CIDTypedef; -/** - * @} - */ - -/** @defgroup SD_Exported_Types_Group4 SD Card Status returned by ACMD13 - * @{ - */ -typedef struct -{ - __IO uint8_t DAT_BUS_WIDTH; /*!< Shows the currently defined data bus width */ - __IO uint8_t SECURED_MODE; /*!< Card is in secured mode of operation */ - __IO uint16_t SD_CARD_TYPE; /*!< Carries information about card type */ - __IO uint32_t SIZE_OF_PROTECTED_AREA; /*!< Carries information about the capacity of protected area */ - __IO uint8_t SPEED_CLASS; /*!< Carries information about the speed class of the card */ - __IO uint8_t PERFORMANCE_MOVE; /*!< Carries information about the card's performance move */ - __IO uint8_t AU_SIZE; /*!< Carries information about the card's allocation unit size */ - __IO uint16_t ERASE_SIZE; /*!< Determines the number of AUs to be erased in one operation */ - __IO uint8_t ERASE_TIMEOUT; /*!< Determines the timeout for any number of AU erase */ - __IO uint8_t ERASE_OFFSET; /*!< Carries information about the erase offset */ - -}HAL_SD_CardStatusTypedef; -/** - * @} - */ - -/** @defgroup SD_Exported_Types_Group5 SD Card information structure - * @{ - */ -typedef struct -{ - HAL_SD_CSDTypedef SD_csd; /*!< SD card specific data register */ - HAL_SD_CIDTypedef SD_cid; /*!< SD card identification number register */ - uint64_t CardCapacity; /*!< Card capacity */ - uint32_t CardBlockSize; /*!< Card block size */ - uint16_t RCA; /*!< SD relative card address */ - uint8_t CardType; /*!< SD card type */ - -}HAL_SD_CardInfoTypedef; -/** - * @} - */ - -/** @defgroup SD_Exported_Types_Group6 SD Error status enumeration Structure definition - * @{ - */ -typedef enum -{ -/** - * @brief SD specific error defines - */ - SD_CMD_CRC_FAIL = (1), /*!< Command response received (but CRC check failed) */ - SD_DATA_CRC_FAIL = (2), /*!< Data block sent/received (CRC check failed) */ - SD_CMD_RSP_TIMEOUT = (3), /*!< Command response timeout */ - SD_DATA_TIMEOUT = (4), /*!< Data timeout */ - SD_TX_UNDERRUN = (5), /*!< Transmit FIFO underrun */ - SD_RX_OVERRUN = (6), /*!< Receive FIFO overrun */ - SD_START_BIT_ERR = (7), /*!< Start bit not detected on all data signals in wide bus mode */ - SD_CMD_OUT_OF_RANGE = (8), /*!< Command's argument was out of range. */ - SD_ADDR_MISALIGNED = (9), /*!< Misaligned address */ - SD_BLOCK_LEN_ERR = (10), /*!< Transferred block length is not allowed for the card or the number of transferred bytes does not match the block length */ - SD_ERASE_SEQ_ERR = (11), /*!< An error in the sequence of erase command occurs. */ - SD_BAD_ERASE_PARAM = (12), /*!< An invalid selection for erase groups */ - SD_WRITE_PROT_VIOLATION = (13), /*!< Attempt to program a write protect block */ - SD_LOCK_UNLOCK_FAILED = (14), /*!< Sequence or password error has been detected in unlock command or if there was an attempt to access a locked card */ - SD_COM_CRC_FAILED = (15), /*!< CRC check of the previous command failed */ - SD_ILLEGAL_CMD = (16), /*!< Command is not legal for the card state */ - SD_CARD_ECC_FAILED = (17), /*!< Card internal ECC was applied but failed to correct the data */ - SD_CC_ERROR = (18), /*!< Internal card controller error */ - SD_GENERAL_UNKNOWN_ERROR = (19), /*!< General or unknown error */ - SD_STREAM_READ_UNDERRUN = (20), /*!< The card could not sustain data transfer in stream read operation. */ - SD_STREAM_WRITE_OVERRUN = (21), /*!< The card could not sustain data programming in stream mode */ - SD_CID_CSD_OVERWRITE = (22), /*!< CID/CSD overwrite error */ - SD_WP_ERASE_SKIP = (23), /*!< Only partial address space was erased */ - SD_CARD_ECC_DISABLED = (24), /*!< Command has been executed without using internal ECC */ - SD_ERASE_RESET = (25), /*!< Erase sequence was cleared before executing because an out of erase sequence command was received */ - SD_AKE_SEQ_ERROR = (26), /*!< Error in sequence of authentication. */ - SD_INVALID_VOLTRANGE = (27), - SD_ADDR_OUT_OF_RANGE = (28), - SD_SWITCH_ERROR = (29), - SD_SDMMC_DISABLED = (30), - SD_SDMMC_FUNCTION_BUSY = (31), - SD_SDMMC_FUNCTION_FAILED = (32), - SD_SDMMC_UNKNOWN_FUNCTION = (33), - -/** - * @brief Standard error defines - */ - SD_INTERNAL_ERROR = (34), - SD_NOT_CONFIGURED = (35), - SD_REQUEST_PENDING = (36), - SD_REQUEST_NOT_APPLICABLE = (37), - SD_INVALID_PARAMETER = (38), - SD_UNSUPPORTED_FEATURE = (39), - SD_UNSUPPORTED_HW = (40), - SD_ERROR = (41), - SD_OK = (0) - -}HAL_SD_ErrorTypedef; -/** - * @} - */ - -/** @defgroup SD_Exported_Types_Group7 SD Transfer state enumeration structure - * @{ - */ -typedef enum -{ - SD_TRANSFER_OK = 0, /*!< Transfer success */ - SD_TRANSFER_BUSY = 1, /*!< Transfer is occurring */ - SD_TRANSFER_ERROR = 2 /*!< Transfer failed */ - -}HAL_SD_TransferStateTypedef; -/** - * @} - */ - -/** @defgroup SD_Exported_Types_Group8 SD Card State enumeration structure - * @{ - */ -typedef enum -{ - SD_CARD_READY = ((uint32_t)0x00000001), /*!< Card state is ready */ - SD_CARD_IDENTIFICATION = ((uint32_t)0x00000002), /*!< Card is in identification state */ - SD_CARD_STANDBY = ((uint32_t)0x00000003), /*!< Card is in standby state */ - SD_CARD_TRANSFER = ((uint32_t)0x00000004), /*!< Card is in transfer state */ - SD_CARD_SENDING = ((uint32_t)0x00000005), /*!< Card is sending an operation */ - SD_CARD_RECEIVING = ((uint32_t)0x00000006), /*!< Card is receiving operation information */ - SD_CARD_PROGRAMMING = ((uint32_t)0x00000007), /*!< Card is in programming state */ - SD_CARD_DISCONNECTED = ((uint32_t)0x00000008), /*!< Card is disconnected */ - SD_CARD_ERROR = ((uint32_t)0x000000FF) /*!< Card is in error state */ - -}HAL_SD_CardStateTypedef; -/** - * @} - */ - -/** @defgroup SD_Exported_Types_Group9 SD Operation enumeration structure - * @{ - */ -typedef enum -{ - SD_READ_SINGLE_BLOCK = 0, /*!< Read single block operation */ - SD_READ_MULTIPLE_BLOCK = 1, /*!< Read multiple blocks operation */ - SD_WRITE_SINGLE_BLOCK = 2, /*!< Write single block operation */ - SD_WRITE_MULTIPLE_BLOCK = 3 /*!< Write multiple blocks operation */ - -}HAL_SD_OperationTypedef; -/** - * @} - */ - -/** - * @} - */ - -/* Exported constants --------------------------------------------------------*/ -/** @defgroup SD_Exported_Constants SD Exported Constants - * @{ - */ - -/** - * @brief SD Commands Index - */ -#define SD_CMD_GO_IDLE_STATE ((uint8_t)0) /*!< Resets the SD memory card. */ -#define SD_CMD_SEND_OP_COND ((uint8_t)1) /*!< Sends host capacity support information and activates the card's initialization process. */ -#define SD_CMD_ALL_SEND_CID ((uint8_t)2) /*!< Asks any card connected to the host to send the CID numbers on the CMD line. */ -#define SD_CMD_SET_REL_ADDR ((uint8_t)3) /*!< Asks the card to publish a new relative address (RCA). */ -#define SD_CMD_SET_DSR ((uint8_t)4) /*!< Programs the DSR of all cards. */ -#define SD_CMD_SDMMC_SEN_OP_COND ((uint8_t)5) /*!< Sends host capacity support information (HCS) and asks the accessed card to send its - operating condition register (OCR) content in the response on the CMD line. */ -#define SD_CMD_HS_SWITCH ((uint8_t)6) /*!< Checks switchable function (mode 0) and switch card function (mode 1). */ -#define SD_CMD_SEL_DESEL_CARD ((uint8_t)7) /*!< Selects the card by its own relative address and gets deselected by any other address */ -#define SD_CMD_HS_SEND_EXT_CSD ((uint8_t)8) /*!< Sends SD Memory Card interface condition, which includes host supply voltage information - and asks the card whether card supports voltage. */ -#define SD_CMD_SEND_CSD ((uint8_t)9) /*!< Addressed card sends its card specific data (CSD) on the CMD line. */ -#define SD_CMD_SEND_CID ((uint8_t)10) /*!< Addressed card sends its card identification (CID) on the CMD line. */ -#define SD_CMD_READ_DAT_UNTIL_STOP ((uint8_t)11) /*!< SD card doesn't support it. */ -#define SD_CMD_STOP_TRANSMISSION ((uint8_t)12) /*!< Forces the card to stop transmission. */ -#define SD_CMD_SEND_STATUS ((uint8_t)13) /*!< Addressed card sends its status register. */ -#define SD_CMD_HS_BUSTEST_READ ((uint8_t)14) -#define SD_CMD_GO_INACTIVE_STATE ((uint8_t)15) /*!< Sends an addressed card into the inactive state. */ -#define SD_CMD_SET_BLOCKLEN ((uint8_t)16) /*!< Sets the block length (in bytes for SDSC) for all following block commands - (read, write, lock). Default block length is fixed to 512 Bytes. Not effective - for SDHS and SDXC. */ -#define SD_CMD_READ_SINGLE_BLOCK ((uint8_t)17) /*!< Reads single block of size selected by SET_BLOCKLEN in case of SDSC, and a block of - fixed 512 bytes in case of SDHC and SDXC. */ -#define SD_CMD_READ_MULT_BLOCK ((uint8_t)18) /*!< Continuously transfers data blocks from card to host until interrupted by - STOP_TRANSMISSION command. */ -#define SD_CMD_HS_BUSTEST_WRITE ((uint8_t)19) /*!< 64 bytes tuning pattern is sent for SDR50 and SDR104. */ -#define SD_CMD_WRITE_DAT_UNTIL_STOP ((uint8_t)20) /*!< Speed class control command. */ -#define SD_CMD_SET_BLOCK_COUNT ((uint8_t)23) /*!< Specify block count for CMD18 and CMD25. */ -#define SD_CMD_WRITE_SINGLE_BLOCK ((uint8_t)24) /*!< Writes single block of size selected by SET_BLOCKLEN in case of SDSC, and a block of - fixed 512 bytes in case of SDHC and SDXC. */ -#define SD_CMD_WRITE_MULT_BLOCK ((uint8_t)25) /*!< Continuously writes blocks of data until a STOP_TRANSMISSION follows. */ -#define SD_CMD_PROG_CID ((uint8_t)26) /*!< Reserved for manufacturers. */ -#define SD_CMD_PROG_CSD ((uint8_t)27) /*!< Programming of the programmable bits of the CSD. */ -#define SD_CMD_SET_WRITE_PROT ((uint8_t)28) /*!< Sets the write protection bit of the addressed group. */ -#define SD_CMD_CLR_WRITE_PROT ((uint8_t)29) /*!< Clears the write protection bit of the addressed group. */ -#define SD_CMD_SEND_WRITE_PROT ((uint8_t)30) /*!< Asks the card to send the status of the write protection bits. */ -#define SD_CMD_SD_ERASE_GRP_START ((uint8_t)32) /*!< Sets the address of the first write block to be erased. (For SD card only). */ -#define SD_CMD_SD_ERASE_GRP_END ((uint8_t)33) /*!< Sets the address of the last write block of the continuous range to be erased. */ -#define SD_CMD_ERASE_GRP_START ((uint8_t)35) /*!< Sets the address of the first write block to be erased. Reserved for each command - system set by switch function command (CMD6). */ -#define SD_CMD_ERASE_GRP_END ((uint8_t)36) /*!< Sets the address of the last write block of the continuous range to be erased. - Reserved for each command system set by switch function command (CMD6). */ -#define SD_CMD_ERASE ((uint8_t)38) /*!< Reserved for SD security applications. */ -#define SD_CMD_FAST_IO ((uint8_t)39) /*!< SD card doesn't support it (Reserved). */ -#define SD_CMD_GO_IRQ_STATE ((uint8_t)40) /*!< SD card doesn't support it (Reserved). */ -#define SD_CMD_LOCK_UNLOCK ((uint8_t)42) /*!< Sets/resets the password or lock/unlock the card. The size of the data block is set by - the SET_BLOCK_LEN command. */ -#define SD_CMD_APP_CMD ((uint8_t)55) /*!< Indicates to the card that the next command is an application specific command rather - than a standard command. */ -#define SD_CMD_GEN_CMD ((uint8_t)56) /*!< Used either to transfer a data block to the card or to get a data block from the card - for general purpose/application specific commands. */ -#define SD_CMD_NO_CMD ((uint8_t)64) - -/** - * @brief Following commands are SD Card Specific commands. - * SDMMC_APP_CMD should be sent before sending these commands. - */ -#define SD_CMD_APP_SD_SET_BUSWIDTH ((uint8_t)6) /*!< (ACMD6) Defines the data bus width to be used for data transfer. The allowed data bus - widths are given in SCR register. */ -#define SD_CMD_SD_APP_STATUS ((uint8_t)13) /*!< (ACMD13) Sends the SD status. */ -#define SD_CMD_SD_APP_SEND_NUM_WRITE_BLOCKS ((uint8_t)22) /*!< (ACMD22) Sends the number of the written (without errors) write blocks. Responds with - 32bit+CRC data block. */ -#define SD_CMD_SD_APP_OP_COND ((uint8_t)41) /*!< (ACMD41) Sends host capacity support information (HCS) and asks the accessed card to - send its operating condition register (OCR) content in the response on the CMD line. */ -#define SD_CMD_SD_APP_SET_CLR_CARD_DETECT ((uint8_t)42) /*!< (ACMD42) Connects/Disconnects the 50 KOhm pull-up resistor on CD/DAT3 (pin 1) of the card. */ -#define SD_CMD_SD_APP_SEND_SCR ((uint8_t)51) /*!< Reads the SD Configuration Register (SCR). */ -#define SD_CMD_SDMMC_RW_DIRECT ((uint8_t)52) /*!< For SD I/O card only, reserved for security specification. */ -#define SD_CMD_SDMMC_RW_EXTENDED ((uint8_t)53) /*!< For SD I/O card only, reserved for security specification. */ - -/** - * @brief Following commands are SD Card Specific security commands. - * SD_CMD_APP_CMD should be sent before sending these commands. - */ -#define SD_CMD_SD_APP_GET_MKB ((uint8_t)43) /*!< For SD card only */ -#define SD_CMD_SD_APP_GET_MID ((uint8_t)44) /*!< For SD card only */ -#define SD_CMD_SD_APP_SET_CER_RN1 ((uint8_t)45) /*!< For SD card only */ -#define SD_CMD_SD_APP_GET_CER_RN2 ((uint8_t)46) /*!< For SD card only */ -#define SD_CMD_SD_APP_SET_CER_RES2 ((uint8_t)47) /*!< For SD card only */ -#define SD_CMD_SD_APP_GET_CER_RES1 ((uint8_t)48) /*!< For SD card only */ -#define SD_CMD_SD_APP_SECURE_READ_MULTIPLE_BLOCK ((uint8_t)18) /*!< For SD card only */ -#define SD_CMD_SD_APP_SECURE_WRITE_MULTIPLE_BLOCK ((uint8_t)25) /*!< For SD card only */ -#define SD_CMD_SD_APP_SECURE_ERASE ((uint8_t)38) /*!< For SD card only */ -#define SD_CMD_SD_APP_CHANGE_SECURE_AREA ((uint8_t)49) /*!< For SD card only */ -#define SD_CMD_SD_APP_SECURE_WRITE_MKB ((uint8_t)48) /*!< For SD card only */ - -/** - * @brief Supported SD Memory Cards - */ -#define STD_CAPACITY_SD_CARD_V1_1 ((uint32_t)0x00000000) -#define STD_CAPACITY_SD_CARD_V2_0 ((uint32_t)0x00000001) -#define HIGH_CAPACITY_SD_CARD ((uint32_t)0x00000002) -#define MULTIMEDIA_CARD ((uint32_t)0x00000003) -#define SECURE_DIGITAL_IO_CARD ((uint32_t)0x00000004) -#define HIGH_SPEED_MULTIMEDIA_CARD ((uint32_t)0x00000005) -#define SECURE_DIGITAL_IO_COMBO_CARD ((uint32_t)0x00000006) -#define HIGH_CAPACITY_MMC_CARD ((uint32_t)0x00000007) -/** - * @} - */ - -/* Exported macro ------------------------------------------------------------*/ -/** @defgroup SD_Exported_macros SD Exported Macros - * @brief macros to handle interrupts and specific clock configurations - * @{ - */ - -/** - * @brief Enable the SD device. - * @retval None - */ -#define __HAL_SD_SDMMC_ENABLE(__HANDLE__) __SDMMC_ENABLE((__HANDLE__)->Instance) - -/** - * @brief Disable the SD device. - * @retval None - */ -#define __HAL_SD_SDMMC_DISABLE(__HANDLE__) __SDMMC_DISABLE((__HANDLE__)->Instance) - -/** - * @brief Enable the SDMMC DMA transfer. - * @retval None - */ -#define __HAL_SD_SDMMC_DMA_ENABLE(__HANDLE__) __SDMMC_DMA_ENABLE((__HANDLE__)->Instance) - -/** - * @brief Disable the SDMMC DMA transfer. - * @retval None - */ -#define __HAL_SD_SDMMC_DMA_DISABLE(__HANDLE__) __SDMMC_DMA_DISABLE((__HANDLE__)->Instance) - -/** - * @brief Enable the SD device interrupt. - * @param __HANDLE__: SD Handle - * @param __INTERRUPT__: specifies the SDMMC interrupt sources to be enabled. - * This parameter can be one or a combination of the following values: - * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt - * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt - * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt - * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt - * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt - * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt - * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt - * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt - * @arg SDMMC_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt - * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt - * @arg SDMMC_IT_CMDACT: Command transfer in progress interrupt - * @arg SDMMC_IT_TXACT: Data transmit in progress interrupt - * @arg SDMMC_IT_RXACT: Data receive in progress interrupt - * @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt - * @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt - * @arg SDMMC_IT_TXFIFOF: Transmit FIFO full interrupt - * @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt - * @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt - * @arg SDMMC_IT_RXFIFOE: Receive FIFO empty interrupt - * @arg SDMMC_IT_TXDAVL: Data available in transmit FIFO interrupt - * @arg SDMMC_IT_RXDAVL: Data available in receive FIFO interrupt - * @arg SDMMC_IT_SDIOIT: SD I/O interrupt received interrupt - * @retval None - */ -#define __HAL_SD_SDMMC_ENABLE_IT(__HANDLE__, __INTERRUPT__) __SDMMC_ENABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__)) - -/** - * @brief Disable the SD device interrupt. - * @param __HANDLE__: SD Handle - * @param __INTERRUPT__: specifies the SDMMC interrupt sources to be disabled. - * This parameter can be one or a combination of the following values: - * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt - * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt - * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt - * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt - * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt - * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt - * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt - * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt - * @arg SDMMC_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt - * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt - * @arg SDMMC_IT_CMDACT: Command transfer in progress interrupt - * @arg SDMMC_IT_TXACT: Data transmit in progress interrupt - * @arg SDMMC_IT_RXACT: Data receive in progress interrupt - * @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt - * @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt - * @arg SDMMC_IT_TXFIFOF: Transmit FIFO full interrupt - * @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt - * @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt - * @arg SDMMC_IT_RXFIFOE: Receive FIFO empty interrupt - * @arg SDMMC_IT_TXDAVL: Data available in transmit FIFO interrupt - * @arg SDMMC_IT_RXDAVL: Data available in receive FIFO interrupt - * @arg SDMMC_IT_SDIOIT: SD I/O interrupt received interrupt - * @retval None - */ -#define __HAL_SD_SDMMC_DISABLE_IT(__HANDLE__, __INTERRUPT__) __SDMMC_DISABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__)) - -/** - * @brief Check whether the specified SD flag is set or not. - * @param __HANDLE__: SD Handle - * @param __FLAG__: specifies the flag to check. - * This parameter can be one of the following values: - * @arg SDMMC_FLAG_CCRCFAIL: Command response received (CRC check failed) - * @arg SDMMC_FLAG_DCRCFAIL: Data block sent/received (CRC check failed) - * @arg SDMMC_FLAG_CTIMEOUT: Command response timeout - * @arg SDMMC_FLAG_DTIMEOUT: Data timeout - * @arg SDMMC_FLAG_TXUNDERR: Transmit FIFO underrun error - * @arg SDMMC_FLAG_RXOVERR: Received FIFO overrun error - * @arg SDMMC_FLAG_CMDREND: Command response received (CRC check passed) - * @arg SDMMC_FLAG_CMDSENT: Command sent (no response required) - * @arg SDMMC_FLAG_DATAEND: Data end (data counter, SDIDCOUNT, is zero) - * @arg SDMMC_FLAG_DBCKEND: Data block sent/received (CRC check passed) - * @arg SDMMC_FLAG_CMDACT: Command transfer in progress - * @arg SDMMC_FLAG_TXACT: Data transmit in progress - * @arg SDMMC_FLAG_RXACT: Data receive in progress - * @arg SDMMC_FLAG_TXFIFOHE: Transmit FIFO Half Empty - * @arg SDMMC_FLAG_RXFIFOHF: Receive FIFO Half Full - * @arg SDMMC_FLAG_TXFIFOF: Transmit FIFO full - * @arg SDMMC_FLAG_RXFIFOF: Receive FIFO full - * @arg SDMMC_FLAG_TXFIFOE: Transmit FIFO empty - * @arg SDMMC_FLAG_RXFIFOE: Receive FIFO empty - * @arg SDMMC_FLAG_TXDAVL: Data available in transmit FIFO - * @arg SDMMC_FLAG_RXDAVL: Data available in receive FIFO - * @arg SDMMC_FLAG_SDIOIT: SD I/O interrupt received - * @retval The new state of SD FLAG (SET or RESET). - */ -#define __HAL_SD_SDMMC_GET_FLAG(__HANDLE__, __FLAG__) __SDMMC_GET_FLAG((__HANDLE__)->Instance, (__FLAG__)) - -/** - * @brief Clear the SD's pending flags. - * @param __HANDLE__: SD Handle - * @param __FLAG__: specifies the flag to clear. - * This parameter can be one or a combination of the following values: - * @arg SDMMC_FLAG_CCRCFAIL: Command response received (CRC check failed) - * @arg SDMMC_FLAG_DCRCFAIL: Data block sent/received (CRC check failed) - * @arg SDMMC_FLAG_CTIMEOUT: Command response timeout - * @arg SDMMC_FLAG_DTIMEOUT: Data timeout - * @arg SDMMC_FLAG_TXUNDERR: Transmit FIFO underrun error - * @arg SDMMC_FLAG_RXOVERR: Received FIFO overrun error - * @arg SDMMC_FLAG_CMDREND: Command response received (CRC check passed) - * @arg SDMMC_FLAG_CMDSENT: Command sent (no response required) - * @arg SDMMC_FLAG_DATAEND: Data end (data counter, SDIDCOUNT, is zero) - * @arg SDMMC_FLAG_DBCKEND: Data block sent/received (CRC check passed) - * @arg SDMMC_FLAG_SDIOIT: SD I/O interrupt received - * @retval None - */ -#define __HAL_SD_SDMMC_CLEAR_FLAG(__HANDLE__, __FLAG__) __SDMMC_CLEAR_FLAG((__HANDLE__)->Instance, (__FLAG__)) - -/** - * @brief Check whether the specified SD interrupt has occurred or not. - * @param __HANDLE__: SD Handle - * @param __INTERRUPT__: specifies the SDMMC interrupt source to check. - * This parameter can be one of the following values: - * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt - * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt - * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt - * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt - * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt - * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt - * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt - * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt - * @arg SDMMC_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt - * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt - * @arg SDMMC_IT_CMDACT: Command transfer in progress interrupt - * @arg SDMMC_IT_TXACT: Data transmit in progress interrupt - * @arg SDMMC_IT_RXACT: Data receive in progress interrupt - * @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt - * @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt - * @arg SDMMC_IT_TXFIFOF: Transmit FIFO full interrupt - * @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt - * @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt - * @arg SDMMC_IT_RXFIFOE: Receive FIFO empty interrupt - * @arg SDMMC_IT_TXDAVL: Data available in transmit FIFO interrupt - * @arg SDMMC_IT_RXDAVL: Data available in receive FIFO interrupt - * @arg SDMMC_IT_SDIOIT: SD I/O interrupt received interrupt - * @retval The new state of SD IT (SET or RESET). - */ -#define __HAL_SD_SDMMC_GET_IT(__HANDLE__, __INTERRUPT__) __SDMMC_GET_IT((__HANDLE__)->Instance, (__INTERRUPT__)) - -/** - * @brief Clear the SD's interrupt pending bits. - * @param __HANDLE__: SD Handle - * @param __INTERRUPT__: specifies the interrupt pending bit to clear. - * This parameter can be one or a combination of the following values: - * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt - * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt - * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt - * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt - * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt - * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt - * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt - * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt - * @arg SDMMC_IT_DATAEND: Data end (data counter, SDMMC_DCOUNT, is zero) interrupt - * @arg SDMMC_IT_SDIOIT: SD I/O interrupt received interrupt - * @retval None - */ -#define __HAL_SD_SDMMC_CLEAR_IT(__HANDLE__, __INTERRUPT__) __SDMMC_CLEAR_IT((__HANDLE__)->Instance, (__INTERRUPT__)) -/** - * @} - */ - -/* Exported functions --------------------------------------------------------*/ -/** @defgroup SD_Exported_Functions SD Exported Functions - * @{ - */ - -/** @defgroup SD_Exported_Functions_Group1 Initialization and de-initialization functions - * @{ - */ -HAL_SD_ErrorTypedef HAL_SD_Init(SD_HandleTypeDef *hsd, HAL_SD_CardInfoTypedef *SDCardInfo); -HAL_StatusTypeDef HAL_SD_DeInit (SD_HandleTypeDef *hsd); -void HAL_SD_MspInit(SD_HandleTypeDef *hsd); -void HAL_SD_MspDeInit(SD_HandleTypeDef *hsd); -/** - * @} - */ - -/** @defgroup SD_Exported_Functions_Group2 Input and Output operation functions - * @{ - */ -/* Blocking mode: Polling */ -HAL_SD_ErrorTypedef HAL_SD_ReadBlocks(SD_HandleTypeDef *hsd, uint32_t *pReadBuffer, uint64_t ReadAddr, uint32_t BlockSize, uint32_t NumberOfBlocks); -HAL_SD_ErrorTypedef HAL_SD_WriteBlocks(SD_HandleTypeDef *hsd, uint32_t *pWriteBuffer, uint64_t WriteAddr, uint32_t BlockSize, uint32_t NumberOfBlocks); -HAL_SD_ErrorTypedef HAL_SD_Erase(SD_HandleTypeDef *hsd, uint64_t startaddr, uint64_t endaddr); - -/* Non-Blocking mode: Interrupt */ -void HAL_SD_IRQHandler(SD_HandleTypeDef *hsd); - -/* Callback in non blocking modes (DMA) */ -void HAL_SD_DMA_RxCpltCallback(DMA_HandleTypeDef *hdma); -void HAL_SD_DMA_RxErrorCallback(DMA_HandleTypeDef *hdma); -void HAL_SD_DMA_TxCpltCallback(DMA_HandleTypeDef *hdma); -void HAL_SD_DMA_TxErrorCallback(DMA_HandleTypeDef *hdma); -void HAL_SD_XferCpltCallback(SD_HandleTypeDef *hsd); -void HAL_SD_XferErrorCallback(SD_HandleTypeDef *hsd); - -/* Non-Blocking mode: DMA */ -HAL_SD_ErrorTypedef HAL_SD_ReadBlocks_DMA(SD_HandleTypeDef *hsd, uint32_t *pReadBuffer, uint64_t ReadAddr, uint32_t BlockSize, uint32_t NumberOfBlocks); -HAL_SD_ErrorTypedef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, uint32_t *pWriteBuffer, uint64_t WriteAddr, uint32_t BlockSize, uint32_t NumberOfBlocks); -HAL_SD_ErrorTypedef HAL_SD_CheckWriteOperation(SD_HandleTypeDef *hsd, uint32_t Timeout); -HAL_SD_ErrorTypedef HAL_SD_CheckReadOperation(SD_HandleTypeDef *hsd, uint32_t Timeout); -/** - * @} - */ - -/** @defgroup SD_Exported_Functions_Group3 Peripheral Control functions - * @{ - */ -HAL_SD_ErrorTypedef HAL_SD_Get_CardInfo(SD_HandleTypeDef *hsd, HAL_SD_CardInfoTypedef *pCardInfo); -HAL_SD_ErrorTypedef HAL_SD_WideBusOperation_Config(SD_HandleTypeDef *hsd, uint32_t WideMode); -HAL_SD_ErrorTypedef HAL_SD_StopTransfer(SD_HandleTypeDef *hsd); -HAL_SD_ErrorTypedef HAL_SD_HighSpeed (SD_HandleTypeDef *hsd); -/** - * @} - */ - -/* Peripheral State functions ************************************************/ -/** @defgroup SD_Exported_Functions_Group4 Peripheral State functions - * @{ - */ -HAL_SD_ErrorTypedef HAL_SD_SendSDStatus(SD_HandleTypeDef *hsd, uint32_t *pSDstatus); -HAL_SD_ErrorTypedef HAL_SD_GetCardStatus(SD_HandleTypeDef *hsd, HAL_SD_CardStatusTypedef *pCardStatus); -HAL_SD_TransferStateTypedef HAL_SD_GetStatus(SD_HandleTypeDef *hsd); -/** - * @} - */ - -/** - * @} - */ - -/* Private types -------------------------------------------------------------*/ -/** @defgroup SD_Private_Types SD Private Types - * @{ - */ - -/** - * @} - */ - -/* Private defines -----------------------------------------------------------*/ -/** @defgroup SD_Private_Defines SD Private Defines - * @{ - */ - -/** - * @} - */ - -/* Private variables ---------------------------------------------------------*/ -/** @defgroup SD_Private_Variables SD Private Variables - * @{ - */ - -/** - * @} - */ - -/* Private constants ---------------------------------------------------------*/ -/** @defgroup SD_Private_Constants SD Private Constants - * @{ - */ - -/** - * @} - */ - -/* Private macros ------------------------------------------------------------*/ -/** @defgroup SD_Private_Macros SD Private Macros - * @{ - */ - -/** - * @} - */ - -/* Private functions prototypes ----------------------------------------------*/ -/** @defgroup SD_Private_Functions_Prototypes SD Private Functions Prototypes - * @{ - */ - -/** - * @} - */ - -/* Private functions ---------------------------------------------------------*/ -/** @defgroup SD_Private_Functions SD Private Functions - * @{ - */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - - -#endif /* __STM32L4xx_HAL_SD_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ -
--- a/Inc/stm32l4xx_hal_smartcard.h Thu Nov 12 20:49:49 2015 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,1082 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_smartcard.h - * @author MCD Application Team - * @version V1.1.0 - * @date 16-September-2015 - * @brief Header file of SMARTCARD HAL module. - ****************************************************************************** - * @attention - * - * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_SMARTCARD_H -#define __STM32L4xx_HAL_SMARTCARD_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal_def.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @addtogroup SMARTCARD - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ -/** @defgroup SMARTCARD_Exported_Types SMARTCARD Exported Types - * @{ - */ - -/** - * @brief SMARTCARD Init Structure definition - */ -typedef struct -{ - uint32_t BaudRate; /*!< Configures the SmartCard communication baud rate. - The baud rate register is computed using the following formula: - Baud Rate Register = ((PCLKx) / ((hsmartcard->Init.BaudRate))) */ - - uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame. - This parameter @ref SMARTCARD_Word_Length can only be set to 9 (8 data + 1 parity bits). */ - - uint32_t StopBits; /*!< Specifies the number of stop bits @ref SMARTCARD_Stop_Bits. - Only 1.5 stop bits are authorized in SmartCard mode. */ - - uint16_t Parity; /*!< Specifies the parity mode. - This parameter can be a value of @ref SMARTCARD_Parity - @note The parity is enabled by default (PCE is forced to 1). - Since the WordLength is forced to 8 bits + parity, M is - forced to 1 and the parity bit is the 9th bit. */ - - uint16_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled. - This parameter can be a value of @ref SMARTCARD_Mode */ - - uint16_t CLKPolarity; /*!< Specifies the steady state of the serial clock. - This parameter can be a value of @ref SMARTCARD_Clock_Polarity */ - - uint16_t CLKPhase; /*!< Specifies the clock transition on which the bit capture is made. - This parameter can be a value of @ref SMARTCARD_Clock_Phase */ - - uint16_t CLKLastBit; /*!< Specifies whether the clock pulse corresponding to the last transmitted - data bit (MSB) has to be output on the SCLK pin in synchronous mode. - This parameter can be a value of @ref SMARTCARD_Last_Bit */ - - uint16_t OneBitSampling; /*!< Specifies whether a single sample or three samples' majority vote is selected. - Selecting the single sample method increases the receiver tolerance to clock - deviations. This parameter can be a value of @ref SMARTCARD_OneBit_Sampling. */ - - uint8_t Prescaler; /*!< Specifies the SmartCard Prescaler */ - - uint8_t GuardTime; /*!< Specifies the SmartCard Guard Time */ - - uint16_t NACKEnable; /*!< Specifies whether the SmartCard NACK transmission is enabled - in case of parity error. - This parameter can be a value of @ref SMARTCARD_NACK_Enable */ - - uint32_t TimeOutEnable; /*!< Specifies whether the receiver timeout is enabled. - This parameter can be a value of @ref SMARTCARD_Timeout_Enable*/ - - uint32_t TimeOutValue; /*!< Specifies the receiver time out value in number of baud blocks: - it is used to implement the Character Wait Time (CWT) and - Block Wait Time (BWT). It is coded over 24 bits. */ - - uint8_t BlockLength; /*!< Specifies the SmartCard Block Length in T=1 Reception mode. - This parameter can be any value from 0x0 to 0xFF */ - - uint8_t AutoRetryCount; /*!< Specifies the SmartCard auto-retry count (number of retries in - receive and transmit mode). When set to 0, retransmission is - disabled. Otherwise, its maximum value is 7 (before signalling - an error) */ - -}SMARTCARD_InitTypeDef; - -/** - * @brief SMARTCARD advanced features initalization structure definition - */ -typedef struct -{ - uint32_t AdvFeatureInit; /*!< Specifies which advanced SMARTCARD features is initialized. Several - advanced features may be initialized at the same time. This parameter - can be a value of @ref SMARTCARD_Advanced_Features_Initialization_Type */ - - uint32_t TxPinLevelInvert; /*!< Specifies whether the TX pin active level is inverted. - This parameter can be a value of @ref SMARTCARD_Tx_Inv */ - - uint32_t RxPinLevelInvert; /*!< Specifies whether the RX pin active level is inverted. - This parameter can be a value of @ref SMARTCARD_Rx_Inv */ - - uint32_t DataInvert; /*!< Specifies whether data are inverted (positive/direct logic - vs negative/inverted logic). - This parameter can be a value of @ref SMARTCARD_Data_Inv */ - - uint32_t Swap; /*!< Specifies whether TX and RX pins are swapped. - This parameter can be a value of @ref SMARTCARD_Rx_Tx_Swap */ - - uint32_t OverrunDisable; /*!< Specifies whether the reception overrun detection is disabled. - This parameter can be a value of @ref SMARTCARD_Overrun_Disable */ - - uint32_t DMADisableonRxError; /*!< Specifies whether the DMA is disabled in case of reception error. - This parameter can be a value of @ref SMARTCARD_DMA_Disable_on_Rx_Error */ - - uint32_t MSBFirst; /*!< Specifies whether MSB is sent first on UART line. - This parameter can be a value of @ref SMARTCARD_MSB_First */ -}SMARTCARD_AdvFeatureInitTypeDef; - -/** - * @brief HAL State structures definition - */ -typedef enum -{ - HAL_SMARTCARD_STATE_RESET = 0x00, /*!< Peripheral is not initialized */ - HAL_SMARTCARD_STATE_READY = 0x01, /*!< Peripheral Initialized and ready for use */ - HAL_SMARTCARD_STATE_BUSY = 0x02, /*!< an internal process is ongoing */ - HAL_SMARTCARD_STATE_BUSY_TX = 0x12, /*!< Data Transmission process is ongoing */ - HAL_SMARTCARD_STATE_BUSY_RX = 0x22, /*!< Data Reception process is ongoing */ - HAL_SMARTCARD_STATE_BUSY_TX_RX = 0x32, /*!< Data Transmission and Reception process is ongoing */ - HAL_SMARTCARD_STATE_TIMEOUT = 0x03, /*!< Timeout state */ - HAL_SMARTCARD_STATE_ERROR = 0x04 /*!< Error */ -}HAL_SMARTCARD_StateTypeDef; - -/** - * @brief HAL SMARTCARD Error Code structure definition - */ -typedef enum -{ - HAL_SMARTCARD_ERROR_NONE = 0x00, /*!< No error */ - HAL_SMARTCARD_ERROR_PE = 0x01, /*!< Parity error */ - HAL_SMARTCARD_ERROR_NE = 0x02, /*!< Noise error */ - HAL_SMARTCARD_ERROR_FE = 0x04, /*!< frame error */ - HAL_SMARTCARD_ERROR_ORE = 0x08, /*!< Overrun error */ - HAL_SMARTCARD_ERROR_DMA = 0x10, /*!< DMA transfer error */ - HAL_SMARTCARD_ERROR_RTO = 0x20 /*!< Receiver TimeOut error */ -}HAL_SMARTCARD_ErrorTypeDef; - -/** - * @brief SMARTCARD handle Structure definition - */ -typedef struct -{ - USART_TypeDef *Instance; /*!< USART registers base address */ - - SMARTCARD_InitTypeDef Init; /*!< SmartCard communication parameters */ - - SMARTCARD_AdvFeatureInitTypeDef AdvancedInit; /*!< SmartCard advanced features initialization parameters */ - - uint8_t *pTxBuffPtr; /*!< Pointer to SmartCard Tx transfer Buffer */ - - uint16_t TxXferSize; /*!< SmartCard Tx Transfer size */ - - uint16_t TxXferCount; /*!< SmartCard Tx Transfer Counter */ - - uint8_t *pRxBuffPtr; /*!< Pointer to SmartCard Rx transfer Buffer */ - - uint16_t RxXferSize; /*!< SmartCard Rx Transfer size */ - - uint16_t RxXferCount; /*!< SmartCard Rx Transfer Counter */ - - DMA_HandleTypeDef *hdmatx; /*!< SmartCard Tx DMA Handle parameters */ - - DMA_HandleTypeDef *hdmarx; /*!< SmartCard Rx DMA Handle parameters */ - - HAL_LockTypeDef Lock; /*!< Locking object */ - - HAL_SMARTCARD_StateTypeDef State; /*!< SmartCard communication state */ - - uint32_t ErrorCode; /*!< SmartCard Error code */ - -}SMARTCARD_HandleTypeDef; - -/** - * @brief SMARTCARD clock sources - */ -typedef enum -{ - SMARTCARD_CLOCKSOURCE_PCLK1 = 0x00, /*!< PCLK1 clock source */ - SMARTCARD_CLOCKSOURCE_PCLK2 = 0x01, /*!< PCLK2 clock source */ - SMARTCARD_CLOCKSOURCE_HSI = 0x02, /*!< HSI clock source */ - SMARTCARD_CLOCKSOURCE_SYSCLK = 0x04, /*!< SYSCLK clock source */ - SMARTCARD_CLOCKSOURCE_LSE = 0x08, /*!< LSE clock source */ - SMARTCARD_CLOCKSOURCE_UNDEFINED = 0x10 /*!< undefined clock source */ -}SMARTCARD_ClockSourceTypeDef; - -/** - * @} - */ - -/* Exported constants --------------------------------------------------------*/ -/** @defgroup SMARTCARD_Exported_Constants SMARTCARD Exported Constants - * @{ - */ - -/** @defgroup SMARTCARD_Word_Length SMARTCARD Word Length - * @{ - */ -#define SMARTCARD_WORDLENGTH_9B ((uint32_t)USART_CR1_M0) /*!< SMARTCARD frame length */ -/** - * @} - */ - -/** @defgroup SMARTCARD_Stop_Bits SMARTCARD Number of Stop Bits - * @{ - */ -#define SMARTCARD_STOPBITS_1_5 ((uint32_t)(USART_CR2_STOP)) /*!< SMARTCARD frame numer of stop bits */ -/** - * @} - */ - -/** @defgroup SMARTCARD_Parity SMARTCARD Parity - * @{ - */ -#define SMARTCARD_PARITY_EVEN ((uint32_t)USART_CR1_PCE) /*!< SMARTCARD frame even parity */ -#define SMARTCARD_PARITY_ODD ((uint32_t)(USART_CR1_PCE | USART_CR1_PS)) /*!< SMARTCARD frame odd parity */ -/** - * @} - */ - -/** @defgroup SMARTCARD_Mode SMARTCARD Transfer Mode - * @{ - */ -#define SMARTCARD_MODE_RX ((uint32_t)USART_CR1_RE) /*!< SMARTCARD RX mode */ -#define SMARTCARD_MODE_TX ((uint32_t)USART_CR1_TE) /*!< SMARTCARD TX mode */ -#define SMARTCARD_MODE_TX_RX ((uint32_t)(USART_CR1_TE |USART_CR1_RE)) /*!< SMARTCARD RX and TX mode */ -/** - * @} - */ - -/** @defgroup SMARTCARD_Clock_Polarity SMARTCARD Clock Polarity - * @{ - */ -#define SMARTCARD_POLARITY_LOW ((uint32_t)0x00000000) /*!< SMARTCARD frame low polarity */ -#define SMARTCARD_POLARITY_HIGH ((uint32_t)USART_CR2_CPOL) /*!< SMARTCARD frame high polarity */ -/** - * @} - */ - -/** @defgroup SMARTCARD_Clock_Phase SMARTCARD Clock Phase - * @{ - */ -#define SMARTCARD_PHASE_1EDGE ((uint32_t)0x00000000) /*!< SMARTCARD frame phase on first clock transition */ -#define SMARTCARD_PHASE_2EDGE ((uint32_t)USART_CR2_CPHA) /*!< SMARTCARD frame phase on second clock transition */ -/** - * @} - */ - -/** @defgroup SMARTCARD_Last_Bit SMARTCARD Last Bit - * @{ - */ -#define SMARTCARD_LASTBIT_DISABLE ((uint32_t)0x00000000) /*!< SMARTCARD frame last data bit clock pulse not output to SCLK pin */ -#define SMARTCARD_LASTBIT_ENABLE ((uint32_t)USART_CR2_LBCL) /*!< SMARTCARD frame last data bit clock pulse output to SCLK pin */ -/** - * @} - */ - -/** @defgroup SMARTCARD_OneBit_Sampling SMARTCARD One Bit Sampling Method - * @{ - */ -#define SMARTCARD_ONE_BIT_SAMPLE_DISABLE ((uint32_t)0x00000000) /*!< SMARTCARD frame one-bit sample disabled */ -#define SMARTCARD_ONE_BIT_SAMPLE_ENABLE ((uint32_t)USART_CR3_ONEBIT) /*!< SMARTCARD frame one-bit sample enabled */ -/** - * @} - */ - - -/** @defgroup SMARTCARD_NACK_Enable SMARTCARD NACK Enable - * @{ - */ -#define SMARTCARD_NACK_ENABLE ((uint32_t)USART_CR3_NACK) /*!< SMARTCARD NACK transmission disabled */ -#define SMARTCARD_NACK_DISABLE ((uint32_t)0x00000000) /*!< SMARTCARD NACK transmission enabled */ -/** - * @} - */ - -/** @defgroup SMARTCARD_Timeout_Enable SMARTCARD Timeout Enable - * @{ - */ -#define SMARTCARD_TIMEOUT_DISABLE ((uint32_t)0x00000000) /*!< SMARTCARD receiver timeout disabled */ -#define SMARTCARD_TIMEOUT_ENABLE ((uint32_t)USART_CR2_RTOEN) /*!< SMARTCARD receiver timeout enabled */ -/** - * @} - */ - -/** @defgroup SMARTCARD_Advanced_Features_Initialization_Type SMARTCARD advanced feature initialization type - * @{ - */ -#define SMARTCARD_ADVFEATURE_NO_INIT ((uint32_t)0x00000000) /*!< No advanced feature initialization */ -#define SMARTCARD_ADVFEATURE_TXINVERT_INIT ((uint32_t)0x00000001) /*!< TX pin active level inversion */ -#define SMARTCARD_ADVFEATURE_RXINVERT_INIT ((uint32_t)0x00000002) /*!< RX pin active level inversion */ -#define SMARTCARD_ADVFEATURE_DATAINVERT_INIT ((uint32_t)0x00000004) /*!< Binary data inversion */ -#define SMARTCARD_ADVFEATURE_SWAP_INIT ((uint32_t)0x00000008) /*!< TX/RX pins swap */ -#define SMARTCARD_ADVFEATURE_RXOVERRUNDISABLE_INIT ((uint32_t)0x00000010) /*!< RX overrun disable */ -#define SMARTCARD_ADVFEATURE_DMADISABLEONERROR_INIT ((uint32_t)0x00000020) /*!< DMA disable on Reception Error */ -#define SMARTCARD_ADVFEATURE_MSBFIRST_INIT ((uint32_t)0x00000080) /*!< Most significant bit sent/received first */ -/** - * @} - */ - -/** @defgroup SMARTCARD_Tx_Inv SMARTCARD advanced feature TX pin active level inversion - * @{ - */ -#define SMARTCARD_ADVFEATURE_TXINV_DISABLE ((uint32_t)0x00000000) /*!< TX pin active level inversion disable */ -#define SMARTCARD_ADVFEATURE_TXINV_ENABLE ((uint32_t)USART_CR2_TXINV) /*!< TX pin active level inversion enable */ -/** - * @} - */ - -/** @defgroup SMARTCARD_Rx_Inv SMARTCARD advanced feature RX pin active level inversion - * @{ - */ -#define SMARTCARD_ADVFEATURE_RXINV_DISABLE ((uint32_t)0x00000000) /*!< RX pin active level inversion disable */ -#define SMARTCARD_ADVFEATURE_RXINV_ENABLE ((uint32_t)USART_CR2_RXINV) /*!< RX pin active level inversion enable */ -/** - * @} - */ - -/** @defgroup SMARTCARD_Data_Inv SMARTCARD advanced feature Binary Data inversion - * @{ - */ -#define SMARTCARD_ADVFEATURE_DATAINV_DISABLE ((uint32_t)0x00000000) /*!< Binary data inversion disable */ -#define SMARTCARD_ADVFEATURE_DATAINV_ENABLE ((uint32_t)USART_CR2_DATAINV) /*!< Binary data inversion enable */ -/** - * @} - */ - -/** @defgroup SMARTCARD_Rx_Tx_Swap SMARTCARD advanced feature RX TX pins swap - * @{ - */ -#define SMARTCARD_ADVFEATURE_SWAP_DISABLE ((uint32_t)0x00000000) /*!< TX/RX pins swap disable */ -#define SMARTCARD_ADVFEATURE_SWAP_ENABLE ((uint32_t)USART_CR2_SWAP) /*!< TX/RX pins swap enable */ -/** - * @} - */ - -/** @defgroup SMARTCARD_Overrun_Disable SMARTCARD advanced feature Overrun Disable - * @{ - */ -#define SMARTCARD_ADVFEATURE_OVERRUN_ENABLE ((uint32_t)0x00000000) /*!< RX overrun enable */ -#define SMARTCARD_ADVFEATURE_OVERRUN_DISABLE ((uint32_t)USART_CR3_OVRDIS) /*!< RX overrun disable */ -/** - * @} - */ - -/** @defgroup SMARTCARD_DMA_Disable_on_Rx_Error SMARTCARD advanced feature DMA Disable on Rx Error - * @{ - */ -#define SMARTCARD_ADVFEATURE_DMA_ENABLEONRXERROR ((uint32_t)0x00000000) /*!< DMA enable on Reception Error */ -#define SMARTCARD_ADVFEATURE_DMA_DISABLEONRXERROR ((uint32_t)USART_CR3_DDRE) /*!< DMA disable on Reception Error */ -/** - * @} - */ - -/** @defgroup SMARTCARD_MSB_First SMARTCARD advanced feature MSB first - * @{ - */ -#define SMARTCARD_ADVFEATURE_MSBFIRST_DISABLE ((uint32_t)0x00000000) /*!< Most significant bit sent/received first disable */ -#define SMARTCARD_ADVFEATURE_MSBFIRST_ENABLE ((uint32_t)USART_CR2_MSBFIRST) /*!< Most significant bit sent/received first enable */ -/** - * @} - */ - -/** @defgroup SMARTCARD_Request_Parameters SMARTCARD Request Parameters - * @{ - */ -#define SMARTCARD_RXDATA_FLUSH_REQUEST ((uint16_t)USART_RQR_RXFRQ) /*!< Receive data flush request */ -#define SMARTCARD_TXDATA_FLUSH_REQUEST ((uint16_t)USART_RQR_TXFRQ) /*!< Transmit data flush request */ -/** - * @} - */ - -/** @defgroup SmartCard_Flags SMARTCARD Flags - * Elements values convention: 0xXXXX - * - 0xXXXX : Flag mask in the ISR register - * @{ - */ -#define SMARTCARD_FLAG_REACK USART_ISR_REACK /*!< SMARTCARD receive enable acknowledge flag */ -#define SMARTCARD_FLAG_TEACK USART_ISR_TEACK /*!< SMARTCARD transmit enable acknowledge flag */ -#define SMARTCARD_FLAG_BUSY USART_ISR_BUSY /*!< SMARTCARD busy flag */ -#define SMARTCARD_FLAG_EOBF USART_ISR_EOBF /*!< SMARTCARD end of block flag */ -#define SMARTCARD_FLAG_RTOF USART_ISR_RTOF /*!< SMARTCARD receiver timeout flag */ -#define SMARTCARD_FLAG_TXE USART_ISR_TXE /*!< SMARTCARD transmit data register empty */ -#define SMARTCARD_FLAG_TC USART_ISR_TC /*!< SMARTCARD transmission complete */ -#define SMARTCARD_FLAG_RXNE USART_ISR_RXNE /*!< SMARTCARD read data register not empty */ -#define SMARTCARD_FLAG_IDLE USART_ISR_IDLE /*!< SMARTCARD idle line detection */ -#define SMARTCARD_FLAG_ORE USART_ISR_ORE /*!< SMARTCARD overrun error */ -#define SMARTCARD_FLAG_NE USART_ISR_NE /*!< SMARTCARD noise error */ -#define SMARTCARD_FLAG_FE USART_ISR_FE /*!< SMARTCARD frame error */ -#define SMARTCARD_FLAG_PE USART_ISR_PE /*!< SMARTCARD parity error */ -/** - * @} - */ - -/** @defgroup SMARTCARD_Interrupt_definition SMARTCARD Interrupts Definition - * Elements values convention: 0000ZZZZ0XXYYYYYb - * - YYYYY : Interrupt source position in the XX register (5bits) - * - XX : Interrupt source register (2bits) - * - 01: CR1 register - * - 10: CR2 register - * - 11: CR3 register - * - ZZZZ : Flag position in the ISR register(4bits) - * @{ - */ - -#define SMARTCARD_IT_PE ((uint16_t)0x0028) /*!< SMARTCARD parity error interruption */ -#define SMARTCARD_IT_TXE ((uint16_t)0x0727) /*!< SMARTCARD transmit data register empty interruption */ -#define SMARTCARD_IT_TC ((uint16_t)0x0626) /*!< SMARTCARD transmission complete interruption */ -#define SMARTCARD_IT_RXNE ((uint16_t)0x0525) /*!< SMARTCARD read data register not empty interruption */ -#define SMARTCARD_IT_IDLE ((uint16_t)0x0424) /*!< SMARTCARD idle line detection interruption */ - -#define SMARTCARD_IT_ERR ((uint16_t)0x0060) /*!< SMARTCARD error interruption */ -#define SMARTCARD_IT_ORE ((uint16_t)0x0300) /*!< SMARTCARD overrun error interruption */ -#define SMARTCARD_IT_NE ((uint16_t)0x0200) /*!< SMARTCARD noise error interruption */ -#define SMARTCARD_IT_FE ((uint16_t)0x0100) /*!< SMARTCARD frame error interruption */ - -#define SMARTCARD_IT_EOB ((uint16_t)0x0C3B) /*!< SMARTCARD end of block interruption */ -#define SMARTCARD_IT_RTO ((uint16_t)0x0B3A) /*!< SMARTCARD receiver timeout interruption */ -/** - * @} - */ - - -/** @defgroup SMARTCARD_IT_CLEAR_Flags SMARTCARD Interruption Clear Flags - * @{ - */ -#define SMARTCARD_CLEAR_PEF USART_ICR_PECF /*!< Parity Error Clear Flag */ -#define SMARTCARD_CLEAR_FEF USART_ICR_FECF /*!< Framing Error Clear Flag */ -#define SMARTCARD_CLEAR_NEF USART_ICR_NCF /*!< Noise detected Clear Flag */ -#define SMARTCARD_CLEAR_OREF USART_ICR_ORECF /*!< OverRun Error Clear Flag */ -#define SMARTCARD_CLEAR_IDLEF USART_ICR_IDLECF /*!< Idle line detected clear flag */ -#define SMARTCARD_CLEAR_TCF USART_ICR_TCCF /*!< Transmission Complete Clear Flag */ -#define SMARTCARD_CLEAR_RTOF USART_ICR_RTOCF /*!< Receiver Time Out Clear Flag */ -#define SMARTCARD_CLEAR_EOBF USART_ICR_EOBCF /*!< End Of Block Clear Flag */ -/** - * @} - */ - -/** @defgroup SMARTCARD_CR3_SCARCNT_LSB_POS SMARTCARD auto retry counter LSB position in CR3 register - * @{ - */ -#define SMARTCARD_CR3_SCARCNT_LSB_POS ((uint32_t) 17) /*!< SMARTCARD auto retry counter LSB position in CR3 register */ -/** - * @} - */ - -/** @defgroup SMARTCARD_GTPR_GT_LSB_POS SMARTCARD guard time value LSB position in GTPR register - * @{ - */ -#define SMARTCARD_GTPR_GT_LSB_POS ((uint32_t) 8) /*!< SMARTCARD guard time value LSB position in GTPR register */ -/** - * @} - */ - -/** @defgroup SMARTCARD_RTOR_BLEN_LSB_POS SMARTCARD block length LSB position in RTOR register - * @{ - */ -#define SMARTCARD_RTOR_BLEN_LSB_POS ((uint32_t) 24) /*!< SMARTCARD block length LSB position in RTOR register */ -/** - * @} - */ - -/** @defgroup SMARTCARD_Interruption_Mask SMARTCARD interruptions flags mask - * @{ - */ -#define SMARTCARD_IT_MASK ((uint16_t)0x001F) /*!< SMARTCARD interruptions flags mask */ -/** - * @} - */ - -/** - * @} - */ - -/* Exported macros -----------------------------------------------------------*/ -/** @defgroup SMARTCARD_Exported_Macros SMARTCARD Exported Macros - * @{ - */ - -/** @brief Reset SMARTCARD handle state. - * @param __HANDLE__: SMARTCARD handle. - * @retval None - */ -#define __HAL_SMARTCARD_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SMARTCARD_STATE_RESET) - -/** @brief Flush the Smartcard Data registers. - * @param __HANDLE__: specifies the SMARTCARD Handle. - * @retval None - */ -#define __HAL_SMARTCARD_FLUSH_DRREGISTER(__HANDLE__) \ - do{ \ - SET_BIT((__HANDLE__)->Instance->RQR, SMARTCARD_RXDATA_FLUSH_REQUEST); \ - SET_BIT((__HANDLE__)->Instance->RQR, SMARTCARD_TXDATA_FLUSH_REQUEST); \ - } while(0) - -/** @brief Clear the specified SMARTCARD pending flag. - * @param __HANDLE__: specifies the SMARTCARD Handle. - * @param __FLAG__: specifies the flag to check. - * This parameter can be any combination of the following values: - * @arg SMARTCARD_CLEAR_PEF: Parity error clear flag - * @arg SMARTCARD_CLEAR_FEF: Framing error clear flag - * @arg SMARTCARD_CLEAR_NEF: Noise detected clear flag - * @arg SMARTCARD_CLEAR_OREF: OverRun error clear flag - * @arg SMARTCARD_CLEAR_IDLEF: Idle line detected clear flag - * @arg SMARTCARD_CLEAR_TCF: Transmission complete clear flag - * @arg SMARTCARD_CLEAR_RTOF: Receiver timeout clear flag - * @arg SMARTCARD_CLEAR_EOBF: End of block clear flag - * @retval None - */ -#define __HAL_SMARTCARD_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__)) - -/** @brief Clear the SMARTCARD PE pending flag. - * @param __HANDLE__: specifies the SMARTCARD Handle. - * @retval None - */ -#define __HAL_SMARTCARD_CLEAR_PEFLAG(__HANDLE__) __HAL_SMARTCARD_CLEAR_FLAG((__HANDLE__), SMARTCARD_CLEAR_PEF) - - -/** @brief Clear the SMARTCARD FE pending flag. - * @param __HANDLE__: specifies the SMARTCARD Handle. - * @retval None - */ -#define __HAL_SMARTCARD_CLEAR_FEFLAG(__HANDLE__) __HAL_SMARTCARD_CLEAR_FLAG((__HANDLE__), SMARTCARD_CLEAR_FEF) - -/** @brief Clear the SMARTCARD NE pending flag. - * @param __HANDLE__: specifies the SMARTCARD Handle. - * @retval None - */ -#define __HAL_SMARTCARD_CLEAR_NEFLAG(__HANDLE__) __HAL_SMARTCARD_CLEAR_FLAG((__HANDLE__), SMARTCARD_CLEAR_NEF) - -/** @brief Clear the SMARTCARD ORE pending flag. - * @param __HANDLE__: specifies the SMARTCARD Handle. - * @retval None - */ -#define __HAL_SMARTCARD_CLEAR_OREFLAG(__HANDLE__) __HAL_SMARTCARD_CLEAR_FLAG((__HANDLE__), SMARTCARD_CLEAR_OREF) - -/** @brief Clear the SMARTCARD IDLE pending flag. - * @param __HANDLE__: specifies the SMARTCARD Handle. - * @retval None - */ -#define __HAL_SMARTCARD_CLEAR_IDLEFLAG(__HANDLE__) __HAL_SMARTCARD_CLEAR_FLAG((__HANDLE__), SMARTCARD_CLEAR_IDLEF) - -/** @brief Check whether the specified Smartcard flag is set or not. - * @param __HANDLE__: specifies the SMARTCARD Handle. - * @param __FLAG__: specifies the flag to check. - * This parameter can be one of the following values: - * @arg SMARTCARD_FLAG_REACK: Receive enable acknowledge flag - * @arg SMARTCARD_FLAG_TEACK: Transmit enable acknowledge flag - * @arg SMARTCARD_FLAG_BUSY: Busy flag - * @arg SMARTCARD_FLAG_EOBF: End of block flag - * @arg SMARTCARD_FLAG_RTOF: Receiver timeout flag - * @arg SMARTCARD_FLAG_TXE: Transmit data register empty flag - * @arg SMARTCARD_FLAG_TC: Transmission complete flag - * @arg SMARTCARD_FLAG_RXNE: Receive data register not empty flag - * @arg SMARTCARD_FLAG_IDLE: Idle line detection flag - * @arg SMARTCARD_FLAG_ORE: Overrun error flag - * @arg SMARTCARD_FLAG_NE: Noise error flag - * @arg SMARTCARD_FLAG_FE: Framing error flag - * @arg SMARTCARD_FLAG_PE: Parity error flag - * @retval The new state of __FLAG__ (TRUE or FALSE). - */ -#define __HAL_SMARTCARD_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__)) - - -/** @brief Enable the specified SmartCard interrupt. - * @param __HANDLE__: specifies the SMARTCARD Handle. - * @param __INTERRUPT__: specifies the SMARTCARD interrupt to enable. - * This parameter can be one of the following values: - * @arg SMARTCARD_IT_EOB: End of block interrupt - * @arg SMARTCARD_IT_RTO: Receive timeout interrupt - * @arg SMARTCARD_IT_TXE: Transmit data register empty interrupt - * @arg SMARTCARD_IT_TC: Transmission complete interrupt - * @arg SMARTCARD_IT_RXNE: Receive data register not empty interrupt - * @arg SMARTCARD_IT_IDLE: Idle line detection interrupt - * @arg SMARTCARD_IT_PE: Parity error interrupt - * @arg SMARTCARD_IT_ERR: Error interrupt(frame error, noise error, overrun error) - * @retval None - */ -#define __HAL_SMARTCARD_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1)? ((__HANDLE__)->Instance->CR1 |= (1U << ((__INTERRUPT__) & SMARTCARD_IT_MASK))): \ - ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2)? ((__HANDLE__)->Instance->CR2 |= (1U << ((__INTERRUPT__) & SMARTCARD_IT_MASK))): \ - ((__HANDLE__)->Instance->CR3 |= (1U << ((__INTERRUPT__) & SMARTCARD_IT_MASK)))) - -/** @brief Disable the specified SmartCard interrupt. - * @param __HANDLE__: specifies the SMARTCARD Handle. - * @param __INTERRUPT__: specifies the SMARTCARD interrupt to disable. - * This parameter can be one of the following values: - * @arg SMARTCARD_IT_EOB: End of block interrupt - * @arg SMARTCARD_IT_RTO: Receive timeout interrupt - * @arg SMARTCARD_IT_TXE: Transmit data register empty interrupt - * @arg SMARTCARD_IT_TC: Transmission complete interrupt - * @arg SMARTCARD_IT_RXNE: Receive data register not empty interrupt - * @arg SMARTCARD_IT_IDLE: Idle line detection interrupt - * @arg SMARTCARD_IT_PE: Parity error interrupt - * @arg SMARTCARD_IT_ERR: Error interrupt(frame error, noise error, overrun error) - * @retval None - */ -#define __HAL_SMARTCARD_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1)? ((__HANDLE__)->Instance->CR1 &= ~ (1U << ((__INTERRUPT__) & SMARTCARD_IT_MASK))): \ - ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2)? ((__HANDLE__)->Instance->CR2 &= ~ (1U << ((__INTERRUPT__) & SMARTCARD_IT_MASK))): \ - ((__HANDLE__)->Instance->CR3 &= ~ (1U << ((__INTERRUPT__) & SMARTCARD_IT_MASK)))) - - -/** @brief Check whether the specified SmartCard interrupt has occurred or not. - * @param __HANDLE__: specifies the SMARTCARD Handle. - * @param __IT__: specifies the SMARTCARD interrupt to check. - * This parameter can be one of the following values: - * @arg SMARTCARD_IT_EOB: End of block interrupt - * @arg SMARTCARD_IT_RTO: Receive timeout interrupt - * @arg SMARTCARD_IT_TXE: Transmit data register empty interrupt - * @arg SMARTCARD_IT_TC: Transmission complete interrupt - * @arg SMARTCARD_IT_RXNE: Receive data register not empty interrupt - * @arg SMARTCARD_IT_IDLE: Idle line detection interrupt - * @arg SMARTCARD_IT_ORE: Overrun error interrupt - * @arg SMARTCARD_IT_NE: Noise error interrupt - * @arg SMARTCARD_IT_FE: Framing error interrupt - * @arg SMARTCARD_IT_PE: Parity error interrupt - * @retval The new state of __IT__ (TRUE or FALSE). - */ -#define __HAL_SMARTCARD_GET_IT(__HANDLE__, __IT__) ((__HANDLE__)->Instance->ISR & ((uint32_t)1 << ((__IT__)>> 0x08))) - -/** @brief Check whether the specified SmartCard interrupt source is enabled or not. - * @param __HANDLE__: specifies the SMARTCARD Handle. - * @param __IT__: specifies the SMARTCARD interrupt source to check. - * This parameter can be one of the following values: - * @arg SMARTCARD_IT_EOB: End of block interrupt - * @arg SMARTCARD_IT_RTO: Receive timeout interrupt - * @arg SMARTCARD_IT_TXE: Transmit data register empty interrupt - * @arg SMARTCARD_IT_TC: Transmission complete interrupt - * @arg SMARTCARD_IT_RXNE: Receive data register not empty interrupt - * @arg SMARTCARD_IT_IDLE: Idle line detection interrupt - * @arg SMARTCARD_IT_ORE: Overrun error interrupt - * @arg SMARTCARD_IT_NE: Noise error interrupt - * @arg SMARTCARD_IT_FE: Framing error interrupt - * @arg SMARTCARD_IT_PE: Parity error interrupt - * @retval The new state of __IT__ (TRUE or FALSE). - */ -#define __HAL_SMARTCARD_GET_IT_SOURCE(__HANDLE__, __IT__) ((((((uint8_t)(__IT__)) >> 5U) == 1)? (__HANDLE__)->Instance->CR1 : \ - (((((uint8_t)(__IT__)) >> 5U) == 2)? (__HANDLE__)->Instance->CR2 : \ - (__HANDLE__)->Instance->CR3)) & ((uint32_t)1 << (((uint16_t)(__IT__)) & SMARTCARD_IT_MASK))) - - -/** @brief Clear the specified SMARTCARD ISR flag, in setting the proper ICR register flag. - * @param __HANDLE__: specifies the SMARTCARD Handle. - * @param __IT_CLEAR__: specifies the interrupt clear register flag that needs to be set - * to clear the corresponding interrupt. - * This parameter can be one of the following values: - * @arg SMARTCARD_CLEAR_PEF: Parity error clear flag - * @arg SMARTCARD_CLEAR_FEF: Framing error clear flag - * @arg SMARTCARD_CLEAR_NEF: Noise detected clear flag - * @arg SMARTCARD_CLEAR_OREF: OverRun error clear flag - * @arg SMARTCARD_CLEAR_IDLEF: Idle line detection clear flag - * @arg SMARTCARD_CLEAR_TCF: Transmission complete clear flag - * @arg SMARTCARD_CLEAR_RTOF: Receiver timeout clear flag - * @arg SMARTCARD_CLEAR_EOBF: End of block clear flag - * @retval None - */ -#define __HAL_SMARTCARD_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->ICR |= (uint32_t)(__IT_CLEAR__)) - -/** @brief Set a specific SMARTCARD request flag. - * @param __HANDLE__: specifies the SMARTCARD Handle. - * @param __REQ__: specifies the request flag to set - * This parameter can be one of the following values: - * @arg SMARTCARD_RXDATA_FLUSH_REQUEST: Receive data flush Request - * @arg SMARTCARD_TXDATA_FLUSH_REQUEST: Transmit data flush Request - * - * @retval None - */ -#define __HAL_SMARTCARD_SEND_REQ(__HANDLE__, __REQ__) ((__HANDLE__)->Instance->RQR |= (uint16_t)(__REQ__)) - -/** @brief Enable the SMARTCARD one bit sample method. - * @param __HANDLE__: specifies the SMARTCARD Handle. - * @retval None - */ -#define __HAL_SMARTCARD_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT) - -/** @brief Disable the SMARTCARD one bit sample method. - * @param __HANDLE__: specifies the SMARTCARD Handle. - * @retval None - */ -#define __HAL_SMARTCARD_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= (uint32_t)~((uint32_t)USART_CR3_ONEBIT)) - -/** @brief Enable the USART associated to the SMARTCARD Handle. - * @param __HANDLE__: specifies the SMARTCARD Handle. - * @retval None - */ -#define __HAL_SMARTCARD_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE) - -/** @brief Disable the USART associated to the SMARTCARD Handle - * @param __HANDLE__: specifies the SMARTCARD Handle. - * @retval None - */ -#define __HAL_SMARTCARD_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE) - -/** - * @} - */ - -/* Private macros -------------------------------------------------------------*/ -/** @defgroup SMARTCARD_Private_Macros SMARTCARD Private Macros - * @{ - */ - -/** @brief Report the SMARTCARD clock source. - * @param __HANDLE__: specifies the SMARTCARD Handle. - * @param __CLOCKSOURCE__: output variable. - * @retval the SMARTCARD clocking source, written in __CLOCKSOURCE__. - */ -#define SMARTCARD_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ - do { \ - if((__HANDLE__)->Instance == USART1) \ - { \ - switch(__HAL_RCC_GET_USART1_SOURCE()) \ - { \ - case RCC_USART1CLKSOURCE_PCLK2: \ - (__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_PCLK2; \ - break; \ - case RCC_USART1CLKSOURCE_HSI: \ - (__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_HSI; \ - break; \ - case RCC_USART1CLKSOURCE_SYSCLK: \ - (__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_SYSCLK; \ - break; \ - case RCC_USART1CLKSOURCE_LSE: \ - (__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_LSE; \ - break; \ - default: \ - (__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_UNDEFINED; \ - break; \ - } \ - } \ - else if((__HANDLE__)->Instance == USART2) \ - { \ - switch(__HAL_RCC_GET_USART2_SOURCE()) \ - { \ - case RCC_USART2CLKSOURCE_PCLK1: \ - (__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_PCLK1; \ - break; \ - case RCC_USART2CLKSOURCE_HSI: \ - (__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_HSI; \ - break; \ - case RCC_USART2CLKSOURCE_SYSCLK: \ - (__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_SYSCLK; \ - break; \ - case RCC_USART2CLKSOURCE_LSE: \ - (__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_LSE; \ - break; \ - default: \ - (__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_UNDEFINED; \ - break; \ - } \ - } \ - else if((__HANDLE__)->Instance == USART3) \ - { \ - switch(__HAL_RCC_GET_USART3_SOURCE()) \ - { \ - case RCC_USART3CLKSOURCE_PCLK1: \ - (__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_PCLK1; \ - break; \ - case RCC_USART3CLKSOURCE_HSI: \ - (__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_HSI; \ - break; \ - case RCC_USART3CLKSOURCE_SYSCLK: \ - (__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_SYSCLK; \ - break; \ - case RCC_USART3CLKSOURCE_LSE: \ - (__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_LSE; \ - break; \ - default: \ - (__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_UNDEFINED; \ - break; \ - } \ - } \ - } while(0) - -/** @brief Check the Baud rate range. - * @note The maximum Baud Rate is derived from the maximum clock on L4 (80 MHz) - * divided by the oversampling used on the SMARTCARD (i.e. 16). - * @param __BAUDRATE__: Baud rate set by the configuration function. - * @retval Test result (TRUE or FALSE) - */ -#define IS_SMARTCARD_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) < 5000001) - -/** @brief Check the block length range. - * @note The maximum SMARTCARD block length is 0xFF. - * @param __LENGTH__: block length. - * @retval Test result (TRUE or FALSE) - */ -#define IS_SMARTCARD_BLOCKLENGTH(__LENGTH__) ((__LENGTH__) <= 0xFF) - -/** @brief Check the receiver timeout value. - * @note The maximum SMARTCARD receiver timeout value is 0xFFFFFF. - * @param __TIMEOUTVALUE__: receiver timeout value. - * @retval Test result (TRUE or FALSE) - */ -#define IS_SMARTCARD_TIMEOUT_VALUE(__TIMEOUTVALUE__) ((__TIMEOUTVALUE__) <= 0xFFFFFF) - -/** @brief Check the SMARTCARD autoretry counter value. - * @note The maximum number of retransmissions is 0x7. - * @param __COUNT__: number of retransmissions. - * @retval Test result (TRUE or FALSE) - */ -#define IS_SMARTCARD_AUTORETRY_COUNT(__COUNT__) ((__COUNT__) <= 0x7) - -/** - * @brief Ensure that SMARTCARD frame length is valid. - * @param __LENGTH__: SMARTCARD frame length. - * @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid) - */ -#define IS_SMARTCARD_WORD_LENGTH(__LENGTH__) ((__LENGTH__) == SMARTCARD_WORDLENGTH_9B) - -/** - * @brief Ensure that SMARTCARD frame number of stop bits is valid. - * @param __STOPBITS__: SMARTCARD frame number of stop bits. - * @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid) - */ -#define IS_SMARTCARD_STOPBITS(__STOPBITS__) ((__STOPBITS__) == SMARTCARD_STOPBITS_1_5) - -/** - * @brief Ensure that SMARTCARD frame parity is valid. - * @param __PARITY__: SMARTCARD frame parity. - * @retval SET (__PARITY__ is valid) or RESET (__PARITY__ is invalid) - */ -#define IS_SMARTCARD_PARITY(__PARITY__) (((__PARITY__) == SMARTCARD_PARITY_EVEN) || \ - ((__PARITY__) == SMARTCARD_PARITY_ODD)) - -/** - * @brief Ensure that SMARTCARD communication mode is valid. - * @param __MODE__: SMARTCARD communication mode. - * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) - */ -#define IS_SMARTCARD_MODE(__MODE__) ((((__MODE__) & (uint16_t)0xFFF3) == 0x00) && ((__MODE__) != (uint16_t)0x00)) - -/** - * @brief Ensure that SMARTCARD frame polarity is valid. - * @param __CPOL__: SMARTCARD frame polarity. - * @retval SET (__CPOL__ is valid) or RESET (__CPOL__ is invalid) - */ -#define IS_SMARTCARD_POLARITY(__CPOL__) (((__CPOL__) == SMARTCARD_POLARITY_LOW) || ((__CPOL__) == SMARTCARD_POLARITY_HIGH)) - -/** - * @brief Ensure that SMARTCARD frame phase is valid. - * @param __CPHA__: SMARTCARD frame phase. - * @retval SET (__CPHA__ is valid) or RESET (__CPHA__ is invalid) - */ -#define IS_SMARTCARD_PHASE(__CPHA__) (((__CPHA__) == SMARTCARD_PHASE_1EDGE) || ((__CPHA__) == SMARTCARD_PHASE_2EDGE)) - -/** - * @brief Ensure that SMARTCARD frame last bit clock pulse setting is valid. - * @param __LASTBIT__: SMARTCARD frame last bit clock pulse setting. - * @retval SET (__LASTBIT__ is valid) or RESET (__LASTBIT__ is invalid) - */ -#define IS_SMARTCARD_LASTBIT(__LASTBIT__) (((__LASTBIT__) == SMARTCARD_LASTBIT_DISABLE) || \ - ((__LASTBIT__) == SMARTCARD_LASTBIT_ENABLE)) - -/** - * @brief Ensure that SMARTCARD frame sampling is valid. - * @param __ONEBIT__: SMARTCARD frame sampling. - * @retval SET (__ONEBIT__ is valid) or RESET (__ONEBIT__ is invalid) - */ -#define IS_SMARTCARD_ONE_BIT_SAMPLE(__ONEBIT__) (((__ONEBIT__) == SMARTCARD_ONE_BIT_SAMPLE_DISABLE) || \ - ((__ONEBIT__) == SMARTCARD_ONE_BIT_SAMPLE_ENABLE)) - -/** - * @brief Ensure that SMARTCARD NACK transmission setting is valid. - * @param __NACK__: SMARTCARD NACK transmission setting. - * @retval SET (__NACK__ is valid) or RESET (__NACK__ is invalid) - */ -#define IS_SMARTCARD_NACK(__NACK__) (((__NACK__) == SMARTCARD_NACK_ENABLE) || \ - ((__NACK__) == SMARTCARD_NACK_DISABLE)) - -/** - * @brief Ensure that SMARTCARD receiver timeout setting is valid. - * @param __TIMEOUT__: SMARTCARD receiver timeout setting. - * @retval SET (__TIMEOUT__ is valid) or RESET (__TIMEOUT__ is invalid) - */ -#define IS_SMARTCARD_TIMEOUT(__TIMEOUT__) (((__TIMEOUT__) == SMARTCARD_TIMEOUT_DISABLE) || \ - ((__TIMEOUT__) == SMARTCARD_TIMEOUT_ENABLE)) - -/** - * @brief Ensure that SMARTCARD advanced features initialization is valid. - * @param __INIT__: SMARTCARD advanced features initialization. - * @retval SET (__INIT__ is valid) or RESET (__INIT__ is invalid) - */ -#define IS_SMARTCARD_ADVFEATURE_INIT(__INIT__) ((__INIT__) <= (SMARTCARD_ADVFEATURE_NO_INIT | \ - SMARTCARD_ADVFEATURE_TXINVERT_INIT | \ - SMARTCARD_ADVFEATURE_RXINVERT_INIT | \ - SMARTCARD_ADVFEATURE_DATAINVERT_INIT | \ - SMARTCARD_ADVFEATURE_SWAP_INIT | \ - SMARTCARD_ADVFEATURE_RXOVERRUNDISABLE_INIT | \ - SMARTCARD_ADVFEATURE_DMADISABLEONERROR_INIT | \ - SMARTCARD_ADVFEATURE_MSBFIRST_INIT)) - -/** - * @brief Ensure that SMARTCARD frame TX inversion setting is valid. - * @param __TXINV__: SMARTCARD frame TX inversion setting. - * @retval SET (__TXINV__ is valid) or RESET (__TXINV__ is invalid) - */ -#define IS_SMARTCARD_ADVFEATURE_TXINV(__TXINV__) (((__TXINV__) == SMARTCARD_ADVFEATURE_TXINV_DISABLE) || \ - ((__TXINV__) == SMARTCARD_ADVFEATURE_TXINV_ENABLE)) - -/** - * @brief Ensure that SMARTCARD frame RX inversion setting is valid. - * @param __RXINV__: SMARTCARD frame RX inversion setting. - * @retval SET (__RXINV__ is valid) or RESET (__RXINV__ is invalid) - */ -#define IS_SMARTCARD_ADVFEATURE_RXINV(__RXINV__) (((__RXINV__) == SMARTCARD_ADVFEATURE_RXINV_DISABLE) || \ - ((__RXINV__) == SMARTCARD_ADVFEATURE_RXINV_ENABLE)) - -/** - * @brief Ensure that SMARTCARD frame data inversion setting is valid. - * @param __DATAINV__: SMARTCARD frame data inversion setting. - * @retval SET (__DATAINV__ is valid) or RESET (__DATAINV__ is invalid) - */ -#define IS_SMARTCARD_ADVFEATURE_DATAINV(__DATAINV__) (((__DATAINV__) == SMARTCARD_ADVFEATURE_DATAINV_DISABLE) || \ - ((__DATAINV__) == SMARTCARD_ADVFEATURE_DATAINV_ENABLE)) - -/** - * @brief Ensure that SMARTCARD frame RX/TX pins swap setting is valid. - * @param __SWAP__: SMARTCARD frame RX/TX pins swap setting. - * @retval SET (__SWAP__ is valid) or RESET (__SWAP__ is invalid) - */ -#define IS_SMARTCARD_ADVFEATURE_SWAP(__SWAP__) (((__SWAP__) == SMARTCARD_ADVFEATURE_SWAP_DISABLE) || \ - ((__SWAP__) == SMARTCARD_ADVFEATURE_SWAP_ENABLE)) - -/** - * @brief Ensure that SMARTCARD frame overrun setting is valid. - * @param __OVERRUN__: SMARTCARD frame overrun setting. - * @retval SET (__OVERRUN__ is valid) or RESET (__OVERRUN__ is invalid) - */ -#define IS_SMARTCARD_OVERRUN(__OVERRUN__) (((__OVERRUN__) == SMARTCARD_ADVFEATURE_OVERRUN_ENABLE) || \ - ((__OVERRUN__) == SMARTCARD_ADVFEATURE_OVERRUN_DISABLE)) - -/** - * @brief Ensure that SMARTCARD DMA enabling or disabling on error setting is valid. - * @param __DMA__: SMARTCARD DMA enabling or disabling on error setting. - * @retval SET (__DMA__ is valid) or RESET (__DMA__ is invalid) - */ -#define IS_SMARTCARD_ADVFEATURE_DMAONRXERROR(__DMA__) (((__DMA__) == SMARTCARD_ADVFEATURE_DMA_ENABLEONRXERROR) || \ - ((__DMA__) == SMARTCARD_ADVFEATURE_DMA_DISABLEONRXERROR)) - -/** - * @brief Ensure that SMARTCARD frame MSB first setting is valid. - * @param __MSBFIRST__: SMARTCARD frame MSB first setting. - * @retval SET (__MSBFIRST__ is valid) or RESET (__MSBFIRST__ is invalid) - */ -#define IS_SMARTCARD_ADVFEATURE_MSBFIRST(__MSBFIRST__) (((__MSBFIRST__) == SMARTCARD_ADVFEATURE_MSBFIRST_DISABLE) || \ - ((__MSBFIRST__) == SMARTCARD_ADVFEATURE_MSBFIRST_ENABLE)) - -/** - * @brief Ensure that SMARTCARD request parameter is valid. - * @param __PARAM__: SMARTCARD request parameter. - * @retval SET (__PARAM__ is valid) or RESET (__PARAM__ is invalid) - */ -#define IS_SMARTCARD_REQUEST_PARAMETER(__PARAM__) (((__PARAM__) == SMARTCARD_RXDATA_FLUSH_REQUEST) || \ - ((__PARAM__) == SMARTCARD_TXDATA_FLUSH_REQUEST)) - -/** - * @} - */ - -/* Include SMARTCARD HAL Extended module */ -#include "stm32l4xx_hal_smartcard_ex.h" - - -/* Exported functions --------------------------------------------------------*/ -/** @addtogroup SMARTCARD_Exported_Functions - * @{ - */ - -/* Initialization and de-initialization functions ****************************/ -/** @addtogroup SMARTCARD_Exported_Functions_Group1 - * @{ - */ - -HAL_StatusTypeDef HAL_SMARTCARD_Init(SMARTCARD_HandleTypeDef *hsmartcard); -HAL_StatusTypeDef HAL_SMARTCARD_DeInit(SMARTCARD_HandleTypeDef *hsmartcard); -void HAL_SMARTCARD_MspInit(SMARTCARD_HandleTypeDef *hsmartcard); -void HAL_SMARTCARD_MspDeInit(SMARTCARD_HandleTypeDef *hsmartcard); - -/** - * @} - */ - -/* IO operation functions *****************************************************/ -/** @addtogroup SMARTCARD_Exported_Functions_Group2 - * @{ - */ - -HAL_StatusTypeDef HAL_SMARTCARD_Transmit(SMARTCARD_HandleTypeDef *hsmartcard, uint8_t *pData, uint16_t Size, uint32_t Timeout); -HAL_StatusTypeDef HAL_SMARTCARD_Receive(SMARTCARD_HandleTypeDef *hsmartcard, uint8_t *pData, uint16_t Size, uint32_t Timeout); -HAL_StatusTypeDef HAL_SMARTCARD_Transmit_IT(SMARTCARD_HandleTypeDef *hsmartcard, uint8_t *pData, uint16_t Size); -HAL_StatusTypeDef HAL_SMARTCARD_Receive_IT(SMARTCARD_HandleTypeDef *hsmartcard, uint8_t *pData, uint16_t Size); -HAL_StatusTypeDef HAL_SMARTCARD_Transmit_DMA(SMARTCARD_HandleTypeDef *hsmartcard, uint8_t *pData, uint16_t Size); -HAL_StatusTypeDef HAL_SMARTCARD_Receive_DMA(SMARTCARD_HandleTypeDef *hsmartcard, uint8_t *pData, uint16_t Size); -void HAL_SMARTCARD_IRQHandler(SMARTCARD_HandleTypeDef *hsmartcard); -void HAL_SMARTCARD_TxCpltCallback(SMARTCARD_HandleTypeDef *hsmartcard); -void HAL_SMARTCARD_RxCpltCallback(SMARTCARD_HandleTypeDef *hsmartcard); -void HAL_SMARTCARD_ErrorCallback(SMARTCARD_HandleTypeDef *hsmartcard); - -/** - * @} - */ - -/* Peripheral Control functions ***********************************************/ -/* Peripheral State and Error functions ***************************************/ -/** @addtogroup SMARTCARD_Exported_Functions_Group4 - * @{ - */ - -HAL_SMARTCARD_StateTypeDef HAL_SMARTCARD_GetState(SMARTCARD_HandleTypeDef *hsmartcard); -uint32_t HAL_SMARTCARD_GetError(SMARTCARD_HandleTypeDef *hsmartcard); - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32L4xx_HAL_SMARTCARD_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ -
--- a/Inc/stm32l4xx_hal_smartcard_ex.h Thu Nov 12 20:49:49 2015 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,104 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_smartcard_ex.h - * @author MCD Application Team - * @version V1.1.0 - * @date 16-September-2015 - * @brief Header file of SMARTCARD HAL Extended module. - ****************************************************************************** - * @attention - * - * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_SMARTCARD_EX_H -#define __STM32L4xx_HAL_SMARTCARD_EX_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal_def.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @addtogroup SMARTCARDEx - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ -/* Exported macros -----------------------------------------------------------*/ -/* Exported functions --------------------------------------------------------*/ -/** @addtogroup SMARTCARDEx_Exported_Functions - * @{ - */ - -/* Initialization and de-initialization functions ****************************/ -/* IO operation methods *******************************************************/ - -/** @addtogroup SMARTCARDEx_Exported_Functions_Group1 - * @{ - */ - -/* Peripheral Control functions ***********************************************/ -void HAL_SMARTCARDEx_BlockLength_Config(SMARTCARD_HandleTypeDef *hsmartcard, uint8_t BlockLength); -void HAL_SMARTCARDEx_TimeOut_Config(SMARTCARD_HandleTypeDef *hsmartcard, uint32_t TimeOutValue); -HAL_StatusTypeDef HAL_SMARTCARDEx_EnableReceiverTimeOut(SMARTCARD_HandleTypeDef *hsmartcard); -HAL_StatusTypeDef HAL_SMARTCARDEx_DisableReceiverTimeOut(SMARTCARD_HandleTypeDef *hsmartcard); - -/** - * @} - */ - -/** - * @} - */ - -/* Private macros ------------------------------------------------------------*/ -/* Private functions ---------------------------------------------------------*/ - -/** - * @} - */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32L4xx_HAL_SMARTCARD_EX_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ -
--- a/Inc/stm32l4xx_hal_smbus.h Thu Nov 12 20:49:49 2015 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,680 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_smbus.h - * @author MCD Application Team - * @version V1.1.0 - * @date 16-September-2015 - * @brief Header file of SMBUS HAL module. - ****************************************************************************** - * @attention - * - * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_SMBUS_H -#define __STM32L4xx_HAL_SMBUS_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal_def.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @addtogroup SMBUS - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ -/** @defgroup SMBUS_Exported_Types SMBUS Exported Types - * @{ - */ - -/** @defgroup SMBUS_Configuration_Structure_definition SMBUS Configuration Structure definition - * @brief SMBUS Configuration Structure definition - * @{ - */ -typedef struct -{ - uint32_t Timing; /*!< Specifies the SMBUS_TIMINGR_register value. - This parameter calculated by referring to SMBUS initialization - section in Reference manual */ - uint32_t AnalogFilter; /*!< Specifies if Analog Filter is enable or not. - This parameter can be a value of @ref SMBUS_Analog_Filter */ - - uint32_t OwnAddress1; /*!< Specifies the first device own address. - This parameter can be a 7-bit or 10-bit address. */ - - uint32_t AddressingMode; /*!< Specifies if 7-bit or 10-bit addressing mode for master is selected. - This parameter can be a value of @ref SMBUS_addressing_mode */ - - uint32_t DualAddressMode; /*!< Specifies if dual addressing mode is selected. - This parameter can be a value of @ref SMBUS_dual_addressing_mode */ - - uint32_t OwnAddress2; /*!< Specifies the second device own address if dual addressing mode is selected - This parameter can be a 7-bit address. */ - - uint32_t OwnAddress2Masks; /*!< Specifies the acknoledge mask address second device own address if dual addressing mode is selected - This parameter can be a value of @ref SMBUS_own_address2_masks. */ - - uint32_t GeneralCallMode; /*!< Specifies if general call mode is selected. - This parameter can be a value of @ref SMBUS_general_call_addressing_mode. */ - - uint32_t NoStretchMode; /*!< Specifies if nostretch mode is selected. - This parameter can be a value of @ref SMBUS_nostretch_mode */ - - uint32_t PacketErrorCheckMode; /*!< Specifies if Packet Error Check mode is selected. - This parameter can be a value of @ref SMBUS_packet_error_check_mode */ - - uint32_t PeripheralMode; /*!< Specifies which mode of Periphal is selected. - This parameter can be a value of @ref SMBUS_peripheral_mode */ - - uint32_t SMBusTimeout; /*!< Specifies the content of the 32 Bits SMBUS_TIMEOUT_register value. - (Enable bits and different timeout values) - This parameter calculated by referring to SMBUS initialization - section in Reference manual */ -} SMBUS_InitTypeDef; -/** - * @} - */ - -/** @defgroup HAL_state_definition HAL state definition - * @brief HAL State definition - * @{ - */ -#define HAL_SMBUS_STATE_RESET ((uint32_t)0x00000000) /*!< SMBUS not yet initialized or disabled */ -#define HAL_SMBUS_STATE_READY ((uint32_t)0x00000001) /*!< SMBUS initialized and ready for use */ -#define HAL_SMBUS_STATE_BUSY ((uint32_t)0x00000002) /*!< SMBUS internal process is ongoing */ -#define HAL_SMBUS_STATE_MASTER_BUSY_TX ((uint32_t)0x00000012) /*!< Master Data Transmission process is ongoing */ -#define HAL_SMBUS_STATE_MASTER_BUSY_RX ((uint32_t)0x00000022) /*!< Master Data Reception process is ongoing */ -#define HAL_SMBUS_STATE_SLAVE_BUSY_TX ((uint32_t)0x00000032) /*!< Slave Data Transmission process is ongoing */ -#define HAL_SMBUS_STATE_SLAVE_BUSY_RX ((uint32_t)0x00000042) /*!< Slave Data Reception process is ongoing */ -#define HAL_SMBUS_STATE_TIMEOUT ((uint32_t)0x00000003) /*!< Timeout state */ -#define HAL_SMBUS_STATE_ERROR ((uint32_t)0x00000004) /*!< Reception process is ongoing */ -#define HAL_SMBUS_STATE_LISTEN ((uint32_t)0x00000008) /*!< Address Listen Mode is ongoing */ -/** - * @} - */ - -/** @defgroup SMBUS_Error_Code_definition SMBUS Error Code definition - * @brief SMBUS Error Code definition - * @{ - */ -#define HAL_SMBUS_ERROR_NONE ((uint32_t)0x00000000) /*!< No error */ -#define HAL_SMBUS_ERROR_BERR ((uint32_t)0x00000001) /*!< BERR error */ -#define HAL_SMBUS_ERROR_ARLO ((uint32_t)0x00000002) /*!< ARLO error */ -#define HAL_SMBUS_ERROR_ACKF ((uint32_t)0x00000004) /*!< ACKF error */ -#define HAL_SMBUS_ERROR_OVR ((uint32_t)0x00000008) /*!< OVR error */ -#define HAL_SMBUS_ERROR_HALTIMEOUT ((uint32_t)0x00000010) /*!< Timeout error */ -#define HAL_SMBUS_ERROR_BUSTIMEOUT ((uint32_t)0x00000020) /*!< Bus Timeout error */ -#define HAL_SMBUS_ERROR_ALERT ((uint32_t)0x00000040) /*!< Alert error */ -#define HAL_SMBUS_ERROR_PECERR ((uint32_t)0x00000080) /*!< PEC error */ -/** - * @} - */ - -/** @defgroup SMBUS_handle_Structure_definition SMBUS handle Structure definition - * @brief SMBUS handle Structure definition - * @{ - */ -typedef struct -{ - I2C_TypeDef *Instance; /*!< SMBUS registers base address */ - - SMBUS_InitTypeDef Init; /*!< SMBUS communication parameters */ - - uint8_t *pBuffPtr; /*!< Pointer to SMBUS transfer buffer */ - - uint16_t XferSize; /*!< SMBUS transfer size */ - - __IO uint16_t XferCount; /*!< SMBUS transfer counter */ - - __IO uint32_t XferOptions; /*!< SMBUS transfer options */ - - __IO uint32_t PreviousState; /*!< SMBUS communication Previous state */ - - HAL_LockTypeDef Lock; /*!< SMBUS locking object */ - - __IO uint32_t State; /*!< SMBUS communication state */ - - __IO uint32_t ErrorCode; /*!< SMBUS Error code */ - -}SMBUS_HandleTypeDef; -/** - * @} - */ - -/** - * @} - */ -/* Exported constants --------------------------------------------------------*/ - -/** @defgroup SMBUS_Exported_Constants SMBUS Exported Constants - * @{ - */ - -/** @defgroup SMBUS_Analog_Filter SMBUS Analog Filter - * @{ - */ -#define SMBUS_ANALOGFILTER_ENABLE ((uint32_t)0x00000000) -#define SMBUS_ANALOGFILTER_DISABLE I2C_CR1_ANFOFF -/** - * @} - */ - -/** @defgroup SMBUS_addressing_mode SMBUS addressing mode - * @{ - */ -#define SMBUS_ADDRESSINGMODE_7BIT ((uint32_t)0x00000001) -#define SMBUS_ADDRESSINGMODE_10BIT ((uint32_t)0x00000002) -/** - * @} - */ - -/** @defgroup SMBUS_dual_addressing_mode SMBUS dual addressing mode - * @{ - */ - -#define SMBUS_DUALADDRESS_DISABLE ((uint32_t)0x00000000) -#define SMBUS_DUALADDRESS_ENABLE I2C_OAR2_OA2EN -/** - * @} - */ - -/** @defgroup SMBUS_own_address2_masks SMBUS own address2 masks - * @{ - */ - -#define SMBUS_OA2_NOMASK ((uint8_t)0x00) -#define SMBUS_OA2_MASK01 ((uint8_t)0x01) -#define SMBUS_OA2_MASK02 ((uint8_t)0x02) -#define SMBUS_OA2_MASK03 ((uint8_t)0x03) -#define SMBUS_OA2_MASK04 ((uint8_t)0x04) -#define SMBUS_OA2_MASK05 ((uint8_t)0x05) -#define SMBUS_OA2_MASK06 ((uint8_t)0x06) -#define SMBUS_OA2_MASK07 ((uint8_t)0x07) -/** - * @} - */ - - -/** @defgroup SMBUS_general_call_addressing_mode SMBUS general call addressing mode - * @{ - */ -#define SMBUS_GENERALCALL_DISABLE ((uint32_t)0x00000000) -#define SMBUS_GENERALCALL_ENABLE I2C_CR1_GCEN -/** - * @} - */ - -/** @defgroup SMBUS_nostretch_mode SMBUS nostretch mode - * @{ - */ -#define SMBUS_NOSTRETCH_DISABLE ((uint32_t)0x00000000) -#define SMBUS_NOSTRETCH_ENABLE I2C_CR1_NOSTRETCH -/** - * @} - */ - -/** @defgroup SMBUS_packet_error_check_mode SMBUS packet error check mode - * @{ - */ -#define SMBUS_PEC_DISABLE ((uint32_t)0x00000000) -#define SMBUS_PEC_ENABLE I2C_CR1_PECEN -/** - * @} - */ - -/** @defgroup SMBUS_peripheral_mode SMBUS peripheral mode - * @{ - */ -#define SMBUS_PERIPHERAL_MODE_SMBUS_HOST (uint32_t)(I2C_CR1_SMBHEN) -#define SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE (uint32_t)(0x00000000) -#define SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE_ARP (uint32_t)(I2C_CR1_SMBDEN) -/** - * @} - */ - -/** @defgroup SMBUS_ReloadEndMode_definition SMBUS ReloadEndMode definition - * @{ - */ - -#define SMBUS_SOFTEND_MODE ((uint32_t)0x00000000) -#define SMBUS_RELOAD_MODE I2C_CR2_RELOAD -#define SMBUS_AUTOEND_MODE I2C_CR2_AUTOEND -#define SMBUS_SENDPEC_MODE I2C_CR2_PECBYTE -/** - * @} - */ - -/** @defgroup SMBUS_StartStopMode_definition SMBUS StartStopMode definition - * @{ - */ - -#define SMBUS_NO_STARTSTOP ((uint32_t)0x00000000) -#define SMBUS_GENERATE_STOP I2C_CR2_STOP -#define SMBUS_GENERATE_START_READ (uint32_t)(I2C_CR2_START | I2C_CR2_RD_WRN) -#define SMBUS_GENERATE_START_WRITE I2C_CR2_START -/** - * @} - */ - -/** @defgroup SMBUS_XferOptions_definition SMBUS XferOptions definition - * @{ - */ - -#define SMBUS_FIRST_FRAME ((uint32_t)(SMBUS_SOFTEND_MODE)) -#define SMBUS_NEXT_FRAME ((uint32_t)(SMBUS_RELOAD_MODE | SMBUS_SOFTEND_MODE)) -#define SMBUS_FIRST_AND_LAST_FRAME_NO_PEC SMBUS_AUTOEND_MODE -#define SMBUS_LAST_FRAME_NO_PEC SMBUS_AUTOEND_MODE -#define SMBUS_FIRST_AND_LAST_FRAME_WITH_PEC ((uint32_t)(SMBUS_AUTOEND_MODE | SMBUS_SENDPEC_MODE)) -#define SMBUS_LAST_FRAME_WITH_PEC ((uint32_t)(SMBUS_AUTOEND_MODE | SMBUS_SENDPEC_MODE)) -/** - * @} - */ - -/** @defgroup SMBUS_Interrupt_configuration_definition SMBUS Interrupt configuration definition - * @brief SMBUS Interrupt definition - * Elements values convention: 0xXXXXXXXX - * - XXXXXXXX : Interrupt control mask - * @{ - */ -#define SMBUS_IT_ERRI I2C_CR1_ERRIE -#define SMBUS_IT_TCI I2C_CR1_TCIE -#define SMBUS_IT_STOPI I2C_CR1_STOPIE -#define SMBUS_IT_NACKI I2C_CR1_NACKIE -#define SMBUS_IT_ADDRI I2C_CR1_ADDRIE -#define SMBUS_IT_RXI I2C_CR1_RXIE -#define SMBUS_IT_TXI I2C_CR1_TXIE -#define SMBUS_IT_TX (SMBUS_IT_ERRI | SMBUS_IT_TCI | SMBUS_IT_STOPI | SMBUS_IT_NACKI | SMBUS_IT_TXI) -#define SMBUS_IT_RX (SMBUS_IT_ERRI | SMBUS_IT_TCI | SMBUS_IT_NACKI | SMBUS_IT_RXI) -#define SMBUS_IT_ALERT (SMBUS_IT_ERRI) -#define SMBUS_IT_ADDR (SMBUS_IT_ADDRI | SMBUS_IT_STOPI | SMBUS_IT_NACKI) -/** - * @} - */ - -/** @defgroup SMBUS_Flag_definition SMBUS Flag definition - * @brief Flag definition - * Elements values convention: 0xXXXXYYYY - * - XXXXXXXX : Flag mask - * @{ - */ - -#define SMBUS_FLAG_TXE I2C_ISR_TXE -#define SMBUS_FLAG_TXIS I2C_ISR_TXIS -#define SMBUS_FLAG_RXNE I2C_ISR_RXNE -#define SMBUS_FLAG_ADDR I2C_ISR_ADDR -#define SMBUS_FLAG_AF I2C_ISR_NACKF -#define SMBUS_FLAG_STOPF I2C_ISR_STOPF -#define SMBUS_FLAG_TC I2C_ISR_TC -#define SMBUS_FLAG_TCR I2C_ISR_TCR -#define SMBUS_FLAG_BERR I2C_ISR_BERR -#define SMBUS_FLAG_ARLO I2C_ISR_ARLO -#define SMBUS_FLAG_OVR I2C_ISR_OVR -#define SMBUS_FLAG_PECERR I2C_ISR_PECERR -#define SMBUS_FLAG_TIMEOUT I2C_ISR_TIMEOUT -#define SMBUS_FLAG_ALERT I2C_ISR_ALERT -#define SMBUS_FLAG_BUSY I2C_ISR_BUSY -#define SMBUS_FLAG_DIR I2C_ISR_DIR -/** - * @} - */ - -/** - * @} - */ - -/* Exported macros ------------------------------------------------------------*/ -/** @defgroup SMBUS_Exported_Macros SMBUS Exported Macros - * @{ - */ - -/** @brief Reset SMBUS handle state. - * @param __HANDLE__: specifies the SMBUS Handle. - * @retval None - */ -#define __HAL_SMBUS_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SMBUS_STATE_RESET) - -/** @brief Enable the specified SMBUS interrupts. - * @param __HANDLE__: specifies the SMBUS Handle. - * @param __INTERRUPT__: specifies the interrupt source to enable. - * This parameter can be one of the following values: - * @arg SMBUS_IT_ERRI: Errors interrupt enable - * @arg SMBUS_IT_TCI: Transfer complete interrupt enable - * @arg SMBUS_IT_STOPI: STOP detection interrupt enable - * @arg SMBUS_IT_NACKI: NACK received interrupt enable - * @arg SMBUS_IT_ADDRI: Address match interrupt enable - * @arg SMBUS_IT_RXI: RX interrupt enable - * @arg SMBUS_IT_TXI: TX interrupt enable - * - * @retval None - */ -#define __HAL_SMBUS_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 |= (__INTERRUPT__)) - -/** @brief Disable the specified SMBUS interrupts. - * @param __HANDLE__: specifies the SMBUS Handle. - * @param __INTERRUPT__: specifies the interrupt source to disable. - * This parameter can be one of the following values: - * @arg SMBUS_IT_ERRI: Errors interrupt enable - * @arg SMBUS_IT_TCI: Transfer complete interrupt enable - * @arg SMBUS_IT_STOPI: STOP detection interrupt enable - * @arg SMBUS_IT_NACKI: NACK received interrupt enable - * @arg SMBUS_IT_ADDRI: Address match interrupt enable - * @arg SMBUS_IT_RXI: RX interrupt enable - * @arg SMBUS_IT_TXI: TX interrupt enable - * - * @retval None - */ -#define __HAL_SMBUS_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 &= (~(__INTERRUPT__))) - -/** @brief Check whether the specified SMBUS interrupt source is enabled or not. - * @param __HANDLE__: specifies the SMBUS Handle. - * @param __INTERRUPT__: specifies the SMBUS interrupt source to check. - * This parameter can be one of the following values: - * @arg SMBUS_IT_ERRI: Errors interrupt enable - * @arg SMBUS_IT_TCI: Transfer complete interrupt enable - * @arg SMBUS_IT_STOPI: STOP detection interrupt enable - * @arg SMBUS_IT_NACKI: NACK received interrupt enable - * @arg SMBUS_IT_ADDRI: Address match interrupt enable - * @arg SMBUS_IT_RXI: RX interrupt enable - * @arg SMBUS_IT_TXI: TX interrupt enable - * - * @retval The new state of __IT__ (TRUE or FALSE). - */ -#define __HAL_SMBUS_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR1 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) - -/** @brief Check whether the specified SMBUS flag is set or not. - * @param __HANDLE__: specifies the SMBUS Handle. - * @param __FLAG__: specifies the flag to check. - * This parameter can be one of the following values: - * @arg SMBUS_FLAG_TXE: Transmit data register empty - * @arg SMBUS_FLAG_TXIS: Transmit interrupt status - * @arg SMBUS_FLAG_RXNE: Receive data register not empty - * @arg SMBUS_FLAG_ADDR: Address matched (slave mode) - * @arg SMBUS_FLAG_AF: NACK received flag - * @arg SMBUS_FLAG_STOPF: STOP detection flag - * @arg SMBUS_FLAG_TC: Transfer complete (master mode) - * @arg SMBUS_FLAG_TCR: Transfer complete reload - * @arg SMBUS_FLAG_BERR: Bus error - * @arg SMBUS_FLAG_ARLO: Arbitration lost - * @arg SMBUS_FLAG_OVR: Overrun/Underrun - * @arg SMBUS_FLAG_PECERR: PEC error in reception - * @arg SMBUS_FLAG_TIMEOUT: Timeout or Tlow detection flag - * @arg SMBUS_FLAG_ALERT: SMBus alert - * @arg SMBUS_FLAG_BUSY: Bus busy - * @arg SMBUS_FLAG_DIR: Transfer direction (slave mode) - * - * @retval The new state of __FLAG__ (TRUE or FALSE). - */ -#define SMBUS_FLAG_MASK ((uint32_t)0x0001FFFF) -#define __HAL_SMBUS_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & ((__FLAG__) & SMBUS_FLAG_MASK)) == ((__FLAG__) & SMBUS_FLAG_MASK))) - -/** @brief Clear the SMBUS pending flags which are cleared by writing 1 in a specific bit. - * @param __HANDLE__: specifies the SMBUS Handle. - * @param __FLAG__: specifies the flag to clear. - * This parameter can be any combination of the following values: - * @arg SMBUS_FLAG_ADDR: Address matched (slave mode) - * @arg SMBUS_FLAG_AF: NACK received flag - * @arg SMBUS_FLAG_STOPF: STOP detection flag - * @arg SMBUS_FLAG_BERR: Bus error - * @arg SMBUS_FLAG_ARLO: Arbitration lost - * @arg SMBUS_FLAG_OVR: Overrun/Underrun - * @arg SMBUS_FLAG_PECERR: PEC error in reception - * @arg SMBUS_FLAG_TIMEOUT: Timeout or Tlow detection flag - * @arg SMBUS_FLAG_ALERT: SMBus alert - * - * @retval None - */ -#define __HAL_SMBUS_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__)) - -/** @brief Enable the specified SMBUS peripheral. - * @param __HANDLE__: specifies the SMBUS Handle. - * @retval None - */ -#define __HAL_SMBUS_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE)) - -/** @brief Disable the specified SMBUS peripheral. - * @param __HANDLE__: specifies the SMBUS Handle. - * @retval None - */ -#define __HAL_SMBUS_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE)) - -/** @brief Generate a Non-Acknowledge SMBUS peripheral in Slave mode. - * @param __HANDLE__: specifies the SMBUS Handle. - * @retval None - */ -#define __HAL_SMBUS_GENERATE_NACK(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR2, I2C_CR2_NACK)) - -/** - * @} - */ - - -/* Private constants ---------------------------------------------------------*/ - -/* Private macros ------------------------------------------------------------*/ -/** @defgroup SMBUS_Private_Macro SMBUS Private Macros - * @{ - */ - -#define IS_SMBUS_ANALOG_FILTER(FILTER) (((FILTER) == SMBUS_ANALOGFILTER_ENABLE) || \ - ((FILTER) == SMBUS_ANALOGFILTER_DISABLE)) - -#define IS_SMBUS_ADDRESSING_MODE(MODE) (((MODE) == SMBUS_ADDRESSINGMODE_7BIT) || \ - ((MODE) == SMBUS_ADDRESSINGMODE_10BIT)) - -#define IS_SMBUS_DUAL_ADDRESS(ADDRESS) (((ADDRESS) == SMBUS_DUALADDRESS_DISABLE) || \ - ((ADDRESS) == SMBUS_DUALADDRESS_ENABLE)) - -#define IS_SMBUS_OWN_ADDRESS2_MASK(MASK) (((MASK) == SMBUS_OA2_NOMASK) || \ - ((MASK) == SMBUS_OA2_MASK01) || \ - ((MASK) == SMBUS_OA2_MASK02) || \ - ((MASK) == SMBUS_OA2_MASK03) || \ - ((MASK) == SMBUS_OA2_MASK04) || \ - ((MASK) == SMBUS_OA2_MASK05) || \ - ((MASK) == SMBUS_OA2_MASK06) || \ - ((MASK) == SMBUS_OA2_MASK07)) - -#define IS_SMBUS_GENERAL_CALL(CALL) (((CALL) == SMBUS_GENERALCALL_DISABLE) || \ - ((CALL) == SMBUS_GENERALCALL_ENABLE)) - -#define IS_SMBUS_NO_STRETCH(STRETCH) (((STRETCH) == SMBUS_NOSTRETCH_DISABLE) || \ - ((STRETCH) == SMBUS_NOSTRETCH_ENABLE)) - -#define IS_SMBUS_PEC(PEC) (((PEC) == SMBUS_PEC_DISABLE) || \ - ((PEC) == SMBUS_PEC_ENABLE)) - -#define IS_SMBUS_PERIPHERAL_MODE(MODE) (((MODE) == SMBUS_PERIPHERAL_MODE_SMBUS_HOST) || \ - ((MODE) == SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE) || \ - ((MODE) == SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE_ARP)) - -#define IS_SMBUS_TRANSFER_MODE(MODE) (((MODE) == SMBUS_RELOAD_MODE) || \ - ((MODE) == SMBUS_AUTOEND_MODE) || \ - ((MODE) == SMBUS_SOFTEND_MODE) || \ - ((MODE) == (SMBUS_RELOAD_MODE | SMBUS_SENDPEC_MODE)) || \ - ((MODE) == (SMBUS_AUTOEND_MODE | SMBUS_SENDPEC_MODE)) || \ - ((MODE) == (SMBUS_AUTOEND_MODE | SMBUS_RELOAD_MODE)) || \ - ((MODE) == (SMBUS_AUTOEND_MODE | SMBUS_SENDPEC_MODE | SMBUS_RELOAD_MODE ))) - - -#define IS_SMBUS_TRANSFER_REQUEST(REQUEST) (((REQUEST) == SMBUS_GENERATE_STOP) || \ - ((REQUEST) == SMBUS_GENERATE_START_READ) || \ - ((REQUEST) == SMBUS_GENERATE_START_WRITE) || \ - ((REQUEST) == SMBUS_NO_STARTSTOP)) - - -#define IS_SMBUS_TRANSFER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == SMBUS_FIRST_FRAME) || \ - ((REQUEST) == SMBUS_NEXT_FRAME) || \ - ((REQUEST) == SMBUS_FIRST_AND_LAST_FRAME_NO_PEC) || \ - ((REQUEST) == SMBUS_LAST_FRAME_NO_PEC) || \ - ((REQUEST) == SMBUS_FIRST_AND_LAST_FRAME_WITH_PEC) || \ - ((REQUEST) == SMBUS_LAST_FRAME_WITH_PEC)) - -#define SMBUS_RESET_CR1(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= (uint32_t)~((uint32_t)(I2C_CR1_SMBHEN | I2C_CR1_SMBDEN | I2C_CR1_PECEN))) -#define SMBUS_RESET_CR2(__HANDLE__) ((__HANDLE__)->Instance->CR2 &= (uint32_t)~((uint32_t)(I2C_CR2_SADD | I2C_CR2_HEAD10R | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_RD_WRN))) - -#define SMBUS_GENERATE_START(__ADDMODE__,__ADDRESS__) (((__ADDMODE__) == SMBUS_ADDRESSINGMODE_7BIT) ? (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | (I2C_CR2_START) | (I2C_CR2_AUTOEND)) & (~I2C_CR2_RD_WRN)) : \ - (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | (I2C_CR2_ADD10) | (I2C_CR2_START)) & (~I2C_CR2_RD_WRN))) - -#define SMBUS_GET_ADDR_MATCH(__HANDLE__) (((__HANDLE__)->Instance->ISR & I2C_ISR_ADDCODE) >> 17) -#define SMBUS_GET_DIR(__HANDLE__) (((__HANDLE__)->Instance->ISR & I2C_ISR_DIR) >> 16) -#define SMBUS_GET_STOP_MODE(__HANDLE__) ((__HANDLE__)->Instance->CR2 & I2C_CR2_AUTOEND) -#define SMBUS_GET_PEC_MODE(__HANDLE__) ((__HANDLE__)->Instance->CR2 & I2C_CR2_PECBYTE) -#define SMBUS_GET_ALERT_ENABLED(__HANDLE__) ((__HANDLE__)->Instance->CR1 & I2C_CR1_ALERTEN) - -#define SMBUS_GET_ISR_REG(__HANDLE__) ((__HANDLE__)->Instance->ISR) -#define SMBUS_CHECK_FLAG(__ISR__, __FLAG__) ((((__ISR__) & ((__FLAG__) & SMBUS_FLAG_MASK)) == ((__FLAG__) & SMBUS_FLAG_MASK))) - -#define IS_SMBUS_OWN_ADDRESS1(ADDRESS1) ((ADDRESS1) <= (uint32_t)0x000003FF) -#define IS_SMBUS_OWN_ADDRESS2(ADDRESS2) ((ADDRESS2) <= (uint16_t)0x00FF) - -/** - * @} - */ - -/* Private Functions ---------------------------------------------------------*/ -/** @defgroup SMBUS_Private_Functions SMBUS Private Functions - * @{ - */ -/* Private functions are defined in stm32l4xx_hal_smbus.c file */ -/** - * @} - */ - -/* Exported functions --------------------------------------------------------*/ -/** @addtogroup SMBUS_Exported_Functions SMBUS Exported Functions - * @{ - */ - -/** @addtogroup SMBUS_Exported_Functions_Group1 Initialization and de-initialization functions - * @{ - */ - -/* Initialization and de-initialization functions **********************************/ -HAL_StatusTypeDef HAL_SMBUS_Init(SMBUS_HandleTypeDef *hsmbus); -HAL_StatusTypeDef HAL_SMBUS_DeInit (SMBUS_HandleTypeDef *hsmbus); -void HAL_SMBUS_MspInit(SMBUS_HandleTypeDef *hsmbus); -void HAL_SMBUS_MspDeInit(SMBUS_HandleTypeDef *hsmbus); - -/** - * @} - */ - -/** @addtogroup SMBUS_Exported_Functions_Group2 Input and Output operation functions - * @{ - */ - -/* IO operation functions *****************************************************/ -/** @addtogroup Blocking_mode_Polling Blocking mode Polling - * @{ - */ -/******* Blocking mode: Polling */ -HAL_StatusTypeDef HAL_SMBUS_IsDeviceReady(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout); -/** - * @} - */ - -/** @addtogroup Non-Blocking_mode_Interrupt Non-Blocking mode Interrupt - * @{ - */ - /******* Non-Blocking mode: Interrupt */ -HAL_StatusTypeDef HAL_SMBUS_Master_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions); -HAL_StatusTypeDef HAL_SMBUS_Master_Receive_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions); -HAL_StatusTypeDef HAL_SMBUS_Master_Abort_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress); -HAL_StatusTypeDef HAL_SMBUS_Slave_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint8_t *pData, uint16_t Size, uint32_t XferOptions); -HAL_StatusTypeDef HAL_SMBUS_Slave_Receive_IT(SMBUS_HandleTypeDef *hsmbus, uint8_t *pData, uint16_t Size, uint32_t XferOptions); - -HAL_StatusTypeDef HAL_SMBUS_EnableAlert_IT(SMBUS_HandleTypeDef *hsmbus); -HAL_StatusTypeDef HAL_SMBUS_DisableAlert_IT(SMBUS_HandleTypeDef *hsmbus); -HAL_StatusTypeDef HAL_SMBUS_EnableListen_IT(SMBUS_HandleTypeDef *hsmbus); -HAL_StatusTypeDef HAL_SMBUS_DisableListen_IT(SMBUS_HandleTypeDef *hsmbus); -/** - * @} - */ - -/** @addtogroup SMBUS_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks - * @{ - */ - /******* SMBUS IRQHandler and Callbacks used in non blocking modes (Interrupt) */ -void HAL_SMBUS_EV_IRQHandler(SMBUS_HandleTypeDef *hsmbus); -void HAL_SMBUS_ER_IRQHandler(SMBUS_HandleTypeDef *hsmbus); -void HAL_SMBUS_MasterTxCpltCallback(SMBUS_HandleTypeDef *hsmbus); -void HAL_SMBUS_MasterRxCpltCallback(SMBUS_HandleTypeDef *hsmbus); -void HAL_SMBUS_SlaveTxCpltCallback(SMBUS_HandleTypeDef *hsmbus); -void HAL_SMBUS_SlaveRxCpltCallback(SMBUS_HandleTypeDef *hsmbus); -void HAL_SMBUS_AddrCallback(SMBUS_HandleTypeDef *hsmbus, uint8_t TransferDirection, uint16_t AddrMatchCode); -void HAL_SMBUS_ListenCpltCallback(SMBUS_HandleTypeDef *hsmbus); -void HAL_SMBUS_ErrorCallback(SMBUS_HandleTypeDef *hsmbus); - -/** - * @} - */ - -/** @addtogroup SMBUS_Exported_Functions_Group3 Peripheral State and Errors functions - * @{ - */ - -/* Peripheral State and Errors functions **************************************************/ -uint32_t HAL_SMBUS_GetState(SMBUS_HandleTypeDef *hsmbus); -uint32_t HAL_SMBUS_GetError(SMBUS_HandleTypeDef *hsmbus); - -/** - * @} - */ - -/** - * @} - */ - - - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ -#ifdef __cplusplus -} -#endif - - -#endif /* __STM32L4xx_HAL_SMBUS_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ -
--- a/Inc/stm32l4xx_hal_swpmi.h Thu Nov 12 20:49:49 2015 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,457 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_swpmi.h - * @author MCD Application Team - * @version V1.1.0 - * @date 16-September-2015 - * @brief Header file of SWPMI HAL module. - ****************************************************************************** - * @attention - * - * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_SWPMI_H -#define __STM32L4xx_HAL_SWPMI_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal_def.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @addtogroup SWPMI - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ -/** @defgroup SWPMI_Exported_Types SWPMI Exported Types - * @{ - */ - -/** - * @brief SWPMI Init Structure definition - */ -typedef struct -{ - uint32_t VoltageClass; /*!< Specifies the SWP Voltage Class. - This parameter can be a value of @ref SWPMI_Voltage_Class */ - - uint32_t BitRate; /*!< Specifies the SWPMI Bitrate. - This parameter must be a number between 0 and 63. - The Bitrate is computed using the following formula: - SWPMI_freq = SWPMI_clk / (((BitRate) + 1) * 4) - */ - - uint32_t TxBufferingMode; /*!< Specifies the transmission buffering mode. - This parameter can be a value of @ref SWPMI_Tx_Buffering_Mode */ - - uint32_t RxBufferingMode; /*!< Specifies the reception buffering mode. - This parameter can be a value of @ref SWPMI_Rx_Buffering_Mode */ - -}SWPMI_InitTypeDef; - - -/** - * @brief HAL SWPMI State structures definition - */ -typedef enum -{ - HAL_SWPMI_STATE_RESET = 0x00, /*!< Peripheral Reset state */ - HAL_SWPMI_STATE_READY = 0x01, /*!< Peripheral Initialized and ready for use */ - HAL_SWPMI_STATE_BUSY = 0x02, /*!< an internal process is ongoing */ - HAL_SWPMI_STATE_BUSY_TX = 0x12, /*!< Data Transmission process is ongoing */ - HAL_SWPMI_STATE_BUSY_RX = 0x22, /*!< Data Reception process is ongoing */ - HAL_SWPMI_STATE_BUSY_TX_RX = 0x32, /*!< Data Transmission and Reception process is ongoing */ - HAL_SWPMI_STATE_TIMEOUT = 0x03, /*!< Timeout state */ - HAL_SWPMI_STATE_ERROR = 0x04 /*!< Error */ -}HAL_SWPMI_StateTypeDef; - -/** - * @brief SWPMI handle Structure definition - */ -typedef struct -{ - SWPMI_TypeDef *Instance; /* SWPMI registers base address */ - - SWPMI_InitTypeDef Init; /* SWMPI communication parameters */ - - uint32_t *pTxBuffPtr; /* Pointer to SWPMI Tx transfer Buffer */ - - uint32_t TxXferSize; /* SWPMI Tx Transfer size */ - - uint32_t TxXferCount; /* SWPMI Tx Transfer Counter */ - - uint32_t *pRxBuffPtr; /* Pointer to SWPMI Rx transfer Buffer */ - - uint32_t RxXferSize; /* SWPMI Rx Transfer size */ - - uint32_t RxXferCount; /* SWPMI Rx Transfer Counter */ - - DMA_HandleTypeDef *hdmatx; /* SWPMI Tx DMA Handle parameters */ - - DMA_HandleTypeDef *hdmarx; /* SWPMI Rx DMA Handle parameters */ - - HAL_LockTypeDef Lock; /* SWPMI object */ - - __IO HAL_SWPMI_StateTypeDef State; /* SWPMI communication state */ - - __IO uint32_t ErrorCode; /* SWPMI Error code */ - -}SWPMI_HandleTypeDef; - -/** - * @} - */ - -/* Exported constants --------------------------------------------------------*/ -/** @defgroup SWPMI_Exported_Constants SWPMI Exported Constants - * @{ - */ - -/** - * @defgroup SWPMI_Error_Code SWPMI Error Code Bitmap - * @{ - */ -#define HAL_SWPMI_ERROR_NONE ((uint32_t)0x00000000) /*!< No error */ -#define HAL_SWPMI_ERROR_CRC ((uint32_t)0x00000004) /*!< frame error */ -#define HAL_SWPMI_ERROR_OVR ((uint32_t)0x00000008) /*!< Overrun error */ -#define HAL_SWPMI_ERROR_UDR ((uint32_t)0x0000000C) /*!< Underrun error */ -#define HAL_SWPMI_ERROR_DMA ((uint32_t)0x00000010) /*!< DMA transfer error */ -/** - * @} - */ - -/** @defgroup SWPMI_Voltage_Class SWPMI Voltage Class - * @{ - */ -#define SWPMI_VOLTAGE_CLASS_C ((uint32_t)0x00000000) -#define SWPMI_VOLTAGE_CLASS_B SWPMI_OR_CLASS -/** - * @} - */ - -/** @defgroup SWPMI_Tx_Buffering_Mode SWPMI Tx Buffering Mode - * @{ - */ -#define SWPMI_TX_NO_SOFTWAREBUFFER ((uint32_t)0x00000000) -#define SWPMI_TX_SINGLE_SOFTWAREBUFFER ((uint32_t)0x00000000) -#define SWPMI_TX_MULTI_SOFTWAREBUFFER SWPMI_CR_TXMODE -/** - * @} - */ - -/** @defgroup SWPMI_Rx_Buffering_Mode SWPMI Rx Buffering Mode - * @{ - */ -#define SWPMI_RX_NO_SOFTWAREBUFFER ((uint32_t)0x00000000) -#define SWPMI_RX_SINGLE_SOFTWAREBUFFER ((uint32_t)0x00000000) -#define SWPMI_RX_MULTI_SOFTWAREBUFFER SWPMI_CR_RXMODE -/** - * @} - */ - -/** @defgroup SWPMI_Flags SWPMI Status Flags - * Elements values convention: 0xXXXXXXXX - * - 0xXXXXXXXX : Flag mask in the ISR register - * @{ - */ -#define SWPMI_FLAG_RXBFF SWPMI_ISR_RXBFF -#define SWPMI_FLAG_TXBEF SWPMI_ISR_TXBEF -#define SWPMI_FLAG_RXBERF SWPMI_ISR_RXBERF -#define SWPMI_FLAG_RXOVRF SWPMI_ISR_RXOVRF -#define SWPMI_FLAG_TXUNRF SWPMI_ISR_TXUNRF -#define SWPMI_FLAG_RXNE SWPMI_ISR_RXNE -#define SWPMI_FLAG_TXE SWPMI_ISR_TXE -#define SWPMI_FLAG_TCF SWPMI_ISR_TCF -#define SWPMI_FLAG_SRF SWPMI_ISR_SRF -#define SWPMI_FLAG_SUSP SWPMI_ISR_SUSP -#define SWPMI_FLAG_DEACTF SWPMI_ISR_DEACTF -/** - * @} - */ - -/** @defgroup SWPMI_Interrupt_definition SWPMI Interrupts Definition - * Elements values convention: 0xXXXX - * - 0xXXXX : Flag mask in the IER register - * @{ - */ -#define SWPMI_IT_SRIE SWPMI_IER_SRIE -#define SWPMI_IT_TCIE SWPMI_IER_TCIE -#define SWPMI_IT_TIE SWPMI_IER_TIE -#define SWPMI_IT_RIE SWPMI_IER_RIE -#define SWPMI_IT_TXUNRIE SWPMI_IER_TXUNRIE -#define SWPMI_IT_RXOVRIE SWPMI_IER_RXOVRIE -#define SWPMI_IT_RXBERIE SWPMI_IER_RXBERIE -#define SWPMI_IT_TXBEIE SWPMI_IER_TXBEIE -#define SWPMI_IT_RXBFIE SWPMI_IER_RXBFIE -/** - * @} - */ - -/** - * @} - */ - -/* Exported macros -----------------------------------------------------------*/ -/** @defgroup SWPMI_Exported_Macros SWPMI Exported Macros - * @{ - */ - -/** @brief Reset SWPMI handle state. - * @param __HANDLE__: specifies the SWPMI Handle. - * @retval None - */ -#define __HAL_SWPMI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SWPMI_STATE_RESET) - -/** - * @brief Enable the SWPMI peripheral. - * @param __HANDLE__: SWPMI handle - * @retval None - */ -#define __HAL_SWPMI_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR, SWPMI_CR_SWPACT) - -/** - * @brief Disable the SWPMI peripheral. - * @param __HANDLE__: SWPMI handle - * @retval None - */ -#define __HAL_SWPMI_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CR, SWPMI_CR_SWPACT) - -/** @brief Check whether the specified SWPMI flag is set or not. - * @param __HANDLE__: specifies the SWPMI Handle. - * @param __FLAG__: specifies the flag to check. - * This parameter can be one of the following values: - * @arg SWPMI_FLAG_RXBFF : Receive buffer full flag. - * @arg SWPMI_FLAG_TXBEF : Transmit buffer empty flag. - * @arg SWPMI_FLAG_RXBERF : Receive CRC error flag. - * @arg SWPMI_FLAG_RXOVRF : Receive overrun error flag. - * @arg SWPMI_FLAG_TXUNRF : Transmit underrun error flag. - * @arg SWPMI_FLAG_RXNE : Receive data register not empty. - * @arg SWPMI_FLAG_TXE : Transmit data register empty. - * @arg SWPMI_FLAG_TCF : Transfer complete flag. - * @arg SWPMI_FLAG_SRF : Slave resume flag. - * @arg SWPMI_FLAG_SUSP : SUSPEND flag. - * @arg SWPMI_FLAG_DEACTF : DEACTIVATED flag. - * @retval The new state of __FLAG__ (TRUE or FALSE). - */ -#define __HAL_SWPMI_GET_FLAG(__HANDLE__, __FLAG__) (READ_BIT((__HANDLE__)->Instance->ISR, (__FLAG__)) == (__FLAG__)) - -/** @brief Clear the specified SWPMI ISR flag. - * @param __HANDLE__: specifies the SWPMI Handle. - * @param __FLAG__: specifies the flag to clear. - * This parameter can be one of the following values: - * @arg SWPMI_FLAG_RXBFF : Receive buffer full flag. - * @arg SWPMI_FLAG_TXBEF : Transmit buffer empty flag. - * @arg SWPMI_FLAG_RXBERF : Receive CRC error flag. - * @arg SWPMI_FLAG_RXOVRF : Receive overrun error flag. - * @arg SWPMI_FLAG_TXUNRF : Transmit underrun error flag. - * @arg SWPMI_FLAG_TCF : Transfer complete flag. - * @arg SWPMI_FLAG_SRF : Slave resume flag. - * @retval None - */ -#define __HAL_SWPMI_CLEAR_FLAG(__HANDLE__, __FLAG__) WRITE_REG((__HANDLE__)->Instance->ICR, (__FLAG__)) - -/** @brief Enable the specified SWPMI interrupt. - * @param __HANDLE__: specifies the SWPMI Handle. - * @param __INTERRUPT__: specifies the SWPMI interrupt source to enable. - * This parameter can be one of the following values: - * @arg SWPMI_IT_SRIE : Slave resume interrupt. - * @arg SWPMI_IT_TCIE : Transmit complete interrupt. - * @arg SWPMI_IT_TIE : Transmit interrupt. - * @arg SWPMI_IT_RIE : Receive interrupt. - * @arg SWPMI_IT_TXUNRIE : Transmit underrun error interrupt. - * @arg SWPMI_IT_RXOVRIE : Receive overrun error interrupt. - * @arg SWPMI_IT_RXBEIE : Receive CRC error interrupt. - * @arg SWPMI_IT_TXBEIE : Transmit buffer empty interrupt. - * @arg SWPMI_IT_RXBFIE : Receive buffer full interrupt. - * @retval None - */ -#define __HAL_SWPMI_ENABLE_IT(__HANDLE__, __INTERRUPT__) SET_BIT((__HANDLE__)->Instance->IER, (__INTERRUPT__)) - -/** @brief Disable the specified SWPMI interrupt. - * @param __HANDLE__: specifies the SWPMI Handle. - * @param __INTERRUPT__: specifies the SWPMI interrupt source to disable. - * This parameter can be one of the following values: - * @arg SWPMI_IT_SRIE : Slave resume interrupt. - * @arg SWPMI_IT_TCIE : Transmit complete interrupt. - * @arg SWPMI_IT_TIE : Transmit interrupt. - * @arg SWPMI_IT_RIE : Receive interrupt. - * @arg SWPMI_IT_TXUNRIE : Transmit underrun error interrupt. - * @arg SWPMI_IT_RXOVRIE : Receive overrun error interrupt. - * @arg SWPMI_IT_RXBEIE : Receive CRC error interrupt. - * @arg SWPMI_IT_TXBEIE : Transmit buffer empty interrupt. - * @arg SWPMI_IT_RXBFIE : Receive buffer full interrupt. - * @retval None - */ -#define __HAL_SWPMI_DISABLE_IT(__HANDLE__, __INTERRUPT__) CLEAR_BIT((__HANDLE__)->Instance->IER, (__INTERRUPT__)) - -/** @brief Check whether the specified SWPMI interrupt has occurred or not. - * @param __HANDLE__: specifies the SWPMI Handle. - * @param __IT__: specifies the SWPMI interrupt to check. - * This parameter can be one of the following values: - * @arg SWPMI_IT_SRIE : Slave resume interrupt. - * @arg SWPMI_IT_TCIE : Transmit complete interrupt. - * @arg SWPMI_IT_TIE : Transmit interrupt. - * @arg SWPMI_IT_RIE : Receive interrupt. - * @arg SWPMI_IT_TXUNRIE : Transmit underrun error interrupt. - * @arg SWPMI_IT_RXOVRIE : Receive overrun error interrupt. - * @arg SWPMI_IT_RXBERIE : Receive CRC error interrupt. - * @arg SWPMI_IT_TXBEIE : Transmit buffer empty interrupt. - * @arg SWPMI_IT_RXBFIE : Receive buffer full interrupt. - * @retval The new state of __IT__ (TRUE or FALSE). - */ -#define __HAL_SWPMI_GET_IT(__HANDLE__, __IT__) (READ_BIT((__HANDLE__)->Instance->ISR,(__IT__)) == (__IT__)) - -/** @brief Check whether the specified SWPMI interrupt source is enabled or not. - * @param __HANDLE__: specifies the SWPMI Handle. - * @param __IT__: specifies the SWPMI interrupt source to check. - * This parameter can be one of the following values: - * @arg SWPMI_IT_SRIE : Slave resume interrupt. - * @arg SWPMI_IT_TCIE : Transmit complete interrupt. - * @arg SWPMI_IT_TIE : Transmit interrupt. - * @arg SWPMI_IT_RIE : Receive interrupt. - * @arg SWPMI_IT_TXUNRIE : Transmit underrun error interrupt. - * @arg SWPMI_IT_RXOVRIE : Receive overrun error interrupt. - * @arg SWPMI_IT_RXBERIE : Receive CRC error interrupt. - * @arg SWPMI_IT_TXBEIE : Transmit buffer empty interrupt. - * @arg SWPMI_IT_RXBFIE : Receive buffer full interrupt. - * @retval The new state of __IT__ (TRUE or FALSE). - */ -#define __HAL_SWPMI_GET_IT_SOURCE(__HANDLE__, __IT__) ((READ_BIT((__HANDLE__)->Instance->IER, (__IT__)) == (__IT__)) ? SET : RESET) - -/** - * @} - */ - -/* Exported functions --------------------------------------------------------*/ -/** @defgroup SWPMI_Exported_Functions SWPMI Exported Functions - * @{ - */ -/* Initialization/de-initialization functions ********************************/ -HAL_StatusTypeDef HAL_SWPMI_Init(SWPMI_HandleTypeDef *hswpmi); -HAL_StatusTypeDef HAL_SWPMI_DeInit(SWPMI_HandleTypeDef *hswpmi); -void HAL_SWPMI_MspInit(SWPMI_HandleTypeDef *hswpmi); -void HAL_SWPMI_MspDeInit(SWPMI_HandleTypeDef *hswpmi); - -/* IO operation functions *****************************************************/ -HAL_StatusTypeDef HAL_SWPMI_Transmit(SWPMI_HandleTypeDef *hswpmi, uint32_t *pData, uint16_t Size, uint32_t Timeout); -HAL_StatusTypeDef HAL_SWPMI_Receive(SWPMI_HandleTypeDef *hswpmi, uint32_t *pData, uint16_t Size, uint32_t Timeout); -HAL_StatusTypeDef HAL_SWPMI_Transmit_IT(SWPMI_HandleTypeDef *hswpmi, uint32_t *pData, uint16_t Size); -HAL_StatusTypeDef HAL_SWPMI_Receive_IT(SWPMI_HandleTypeDef *hswpmi, uint32_t *pData, uint16_t Size); -HAL_StatusTypeDef HAL_SWPMI_Transmit_DMA(SWPMI_HandleTypeDef *hswpmi, uint32_t *pData, uint16_t Size); -HAL_StatusTypeDef HAL_SWPMI_Receive_DMA(SWPMI_HandleTypeDef *hswpmi, uint32_t *pData, uint16_t Size); -HAL_StatusTypeDef HAL_SWPMI_DMAStop(SWPMI_HandleTypeDef *hswpmi); -HAL_StatusTypeDef HAL_SWPMI_EnableLoopback(SWPMI_HandleTypeDef *hswpmi); -HAL_StatusTypeDef HAL_SWPMI_DisableLoopback(SWPMI_HandleTypeDef *hswpmi); -void HAL_SWPMI_IRQHandler(SWPMI_HandleTypeDef *hswpmi); -void HAL_SWPMI_TxCpltCallback(SWPMI_HandleTypeDef *hswpmi); -void HAL_SWPMI_TxHalfCpltCallback(SWPMI_HandleTypeDef *hswpmi); -void HAL_SWPMI_RxCpltCallback(SWPMI_HandleTypeDef *hswpmi); -void HAL_SWPMI_RxHalfCpltCallback(SWPMI_HandleTypeDef *hswpmi); -void HAL_SWPMI_ErrorCallback(SWPMI_HandleTypeDef *hswpmi); - -/* Peripheral Control and State functions ************************************/ -HAL_SWPMI_StateTypeDef HAL_SWPMI_GetState(SWPMI_HandleTypeDef *hswpmi); -uint32_t HAL_SWPMI_GetError(SWPMI_HandleTypeDef *hswpmi); - -/** - * @} - */ - -/* Private types -------------------------------------------------------------*/ -/** @defgroup SWPMI_Private_Types SWPMI Private Types - * @{ - */ - -/** - * @} - */ - -/* Private variables ---------------------------------------------------------*/ -/** @defgroup SWPMI_Private_Variables SWPMI Private Variables - * @{ - */ - -/** - * @} - */ - -/* Private constants ---------------------------------------------------------*/ -/** @defgroup SWPMI_Private_Constants SWPMI Private Constants - * @{ - */ - -/** - * @} - */ - -/* Private macros ------------------------------------------------------------*/ -/** @defgroup SWPMI_Private_Macros SWPMI Private Macros - * @{ - */ - - -#define IS_SWPMI_VOLTAGE_CLASS(__CLASS__) (((__CLASS__) == SWPMI_VOLTAGE_CLASS_C) || \ - ((__CLASS__) == SWPMI_VOLTAGE_CLASS_B)) - -#define IS_SWPMI_BITRATE_VALUE(__VALUE__) (((__VALUE__) <= 63)) - - -#define IS_SWPMI_TX_BUFFERING_MODE(__MODE__) (((__MODE__) == SWPMI_TX_NO_SOFTWAREBUFFER) || \ - ((__MODE__) == SWPMI_TX_MULTI_SOFTWAREBUFFER)) - - -#define IS_SWPMI_RX_BUFFERING_MODE(__MODE__) (((__MODE__) == SWPMI_RX_NO_SOFTWAREBUFFER) || \ - ((__MODE__) == SWPMI_RX_MULTI_SOFTWAREBUFFER)) - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32L4xx_HAL_SWPMI_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ -
--- a/Inc/stm32l4xx_hal_tim.h Thu Nov 12 20:49:49 2015 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,1979 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_tim.h - * @author MCD Application Team - * @version V1.1.0 - * @date 16-September-2015 - * @brief Header file of TIM HAL module. - ****************************************************************************** - * @attention - * - * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_TIM_H -#define __STM32L4xx_HAL_TIM_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal_def.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @addtogroup TIM - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ -/** @defgroup TIM_Exported_Types TIM Exported Types - * @{ - */ - -/** - * @brief TIM Time base Configuration Structure definition - */ -typedef struct -{ - uint32_t Prescaler; /*!< Specifies the prescaler value used to divide the TIM clock. - This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */ - - uint32_t CounterMode; /*!< Specifies the counter mode. - This parameter can be a value of @ref TIM_Counter_Mode */ - - uint32_t Period; /*!< Specifies the period value to be loaded into the active - Auto-Reload Register at the next update event. - This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. */ - - uint32_t ClockDivision; /*!< Specifies the clock division. - This parameter can be a value of @ref TIM_ClockDivision */ - - uint32_t RepetitionCounter; /*!< Specifies the repetition counter value. Each time the RCR downcounter - reaches zero, an update event is generated and counting restarts - from the RCR value (N). - This means in PWM mode that (N+1) corresponds to: - - the number of PWM periods in edge-aligned mode - - the number of half PWM period in center-aligned mode - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF. - @note This parameter is valid only for TIM1 and TIM8. */ -} TIM_Base_InitTypeDef; - -/** - * @brief TIM Output Compare Configuration Structure definition - */ -typedef struct -{ - uint32_t OCMode; /*!< Specifies the TIM mode. - This parameter can be a value of @ref TIM_Output_Compare_and_PWM_modes */ - - uint32_t Pulse; /*!< Specifies the pulse value to be loaded into the Capture Compare Register. - This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */ - - uint32_t OCPolarity; /*!< Specifies the output polarity. - This parameter can be a value of @ref TIM_Output_Compare_Polarity */ - - uint32_t OCNPolarity; /*!< Specifies the complementary output polarity. - This parameter can be a value of @ref TIM_Output_Compare_N_Polarity - @note This parameter is valid only for TIM1 and TIM8. */ - - uint32_t OCFastMode; /*!< Specifies the Fast mode state. - This parameter can be a value of @ref TIM_Output_Fast_State - @note This parameter is valid only in PWM1 and PWM2 mode. */ - - - uint32_t OCIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state. - This parameter can be a value of @ref TIM_Output_Compare_Idle_State - @note This parameter is valid only for TIM1 and TIM8. */ - - uint32_t OCNIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state. - This parameter can be a value of @ref TIM_Output_Compare_N_Idle_State - @note This parameter is valid only for TIM1 and TIM8. */ -} TIM_OC_InitTypeDef; - -/** - * @brief TIM One Pulse Mode Configuration Structure definition - */ -typedef struct -{ - uint32_t OCMode; /*!< Specifies the TIM mode. - This parameter can be a value of @ref TIM_Output_Compare_and_PWM_modes */ - - uint32_t Pulse; /*!< Specifies the pulse value to be loaded into the Capture Compare Register. - This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */ - - uint32_t OCPolarity; /*!< Specifies the output polarity. - This parameter can be a value of @ref TIM_Output_Compare_Polarity */ - - uint32_t OCNPolarity; /*!< Specifies the complementary output polarity. - This parameter can be a value of @ref TIM_Output_Compare_N_Polarity - @note This parameter is valid only for TIM1 and TIM8. */ - - uint32_t OCIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state. - This parameter can be a value of @ref TIM_Output_Compare_Idle_State - @note This parameter is valid only for TIM1 and TIM8. */ - - uint32_t OCNIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state. - This parameter can be a value of @ref TIM_Output_Compare_N_Idle_State - @note This parameter is valid only for TIM1 and TIM8. */ - - uint32_t ICPolarity; /*!< Specifies the active edge of the input signal. - This parameter can be a value of @ref TIM_Input_Capture_Polarity */ - - uint32_t ICSelection; /*!< Specifies the input. - This parameter can be a value of @ref TIM_Input_Capture_Selection */ - - uint32_t ICFilter; /*!< Specifies the input capture filter. - This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */ -} TIM_OnePulse_InitTypeDef; - - -/** - * @brief TIM Input Capture Configuration Structure definition - */ -typedef struct -{ - uint32_t ICPolarity; /*!< Specifies the active edge of the input signal. - This parameter can be a value of @ref TIM_Input_Capture_Polarity */ - - uint32_t ICSelection; /*!< Specifies the input. - This parameter can be a value of @ref TIM_Input_Capture_Selection */ - - uint32_t ICPrescaler; /*!< Specifies the Input Capture Prescaler. - This parameter can be a value of @ref TIM_Input_Capture_Prescaler */ - - uint32_t ICFilter; /*!< Specifies the input capture filter. - This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */ -} TIM_IC_InitTypeDef; - -/** - * @brief TIM Encoder Configuration Structure definition - */ -typedef struct -{ - uint32_t EncoderMode; /*!< Specifies the active edge of the input signal. - This parameter can be a value of @ref TIM_Encoder_Mode */ - - uint32_t IC1Polarity; /*!< Specifies the active edge of the input signal. - This parameter can be a value of @ref TIM_Input_Capture_Polarity */ - - uint32_t IC1Selection; /*!< Specifies the input. - This parameter can be a value of @ref TIM_Input_Capture_Selection */ - - uint32_t IC1Prescaler; /*!< Specifies the Input Capture Prescaler. - This parameter can be a value of @ref TIM_Input_Capture_Prescaler */ - - uint32_t IC1Filter; /*!< Specifies the input capture filter. - This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */ - - uint32_t IC2Polarity; /*!< Specifies the active edge of the input signal. - This parameter can be a value of @ref TIM_Input_Capture_Polarity */ - - uint32_t IC2Selection; /*!< Specifies the input. - This parameter can be a value of @ref TIM_Input_Capture_Selection */ - - uint32_t IC2Prescaler; /*!< Specifies the Input Capture Prescaler. - This parameter can be a value of @ref TIM_Input_Capture_Prescaler */ - - uint32_t IC2Filter; /*!< Specifies the input capture filter. - This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */ -} TIM_Encoder_InitTypeDef; - - -/** - * @brief Clock Configuration Handle Structure definition - */ -typedef struct -{ - uint32_t ClockSource; /*!< TIM clock sources - This parameter can be a value of @ref TIM_Clock_Source */ - uint32_t ClockPolarity; /*!< TIM clock polarity - This parameter can be a value of @ref TIM_Clock_Polarity */ - uint32_t ClockPrescaler; /*!< TIM clock prescaler - This parameter can be a value of @ref TIM_Clock_Prescaler */ - uint32_t ClockFilter; /*!< TIM clock filter - This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */ -}TIM_ClockConfigTypeDef; - -/** - * @brief Clear Input Configuration Handle Structure definition - */ -typedef struct -{ - uint32_t ClearInputState; /*!< TIM clear Input state - This parameter can be ENABLE or DISABLE */ - uint32_t ClearInputSource; /*!< TIM clear Input sources - This parameter can be a value of @ref TIM_ClearInput_Source */ - uint32_t ClearInputPolarity; /*!< TIM Clear Input polarity - This parameter can be a value of @ref TIM_ClearInput_Polarity */ - uint32_t ClearInputPrescaler; /*!< TIM Clear Input prescaler - This parameter can be a value of @ref TIM_ClearInput_Prescaler */ - uint32_t ClearInputFilter; /*!< TIM Clear Input filter - This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */ -}TIM_ClearInputConfigTypeDef; - -/** - * @brief TIM Master configuration Structure definition - * @note Advanced timers provide TRGO2 internal line which is redirected - * to the ADC - */ -typedef struct { - uint32_t MasterOutputTrigger; /*!< Trigger output (TRGO) selection - This parameter can be a value of @ref TIM_Master_Mode_Selection */ - uint32_t MasterOutputTrigger2; /*!< Trigger output2 (TRGO2) selection - This parameter can be a value of @ref TIM_Master_Mode_Selection_2 */ - uint32_t MasterSlaveMode; /*!< Master/slave mode selection - This parameter can be a value of @ref TIM_Master_Slave_Mode */ -}TIM_MasterConfigTypeDef; - -/** - * @brief TIM Slave configuration Structure definition - */ -typedef struct { - uint32_t SlaveMode; /*!< Slave mode selection - This parameter can be a value of @ref TIM_Slave_Mode */ - uint32_t InputTrigger; /*!< Input Trigger source - This parameter can be a value of @ref TIM_Trigger_Selection */ - uint32_t TriggerPolarity; /*!< Input Trigger polarity - This parameter can be a value of @ref TIM_Trigger_Polarity */ - uint32_t TriggerPrescaler; /*!< Input trigger prescaler - This parameter can be a value of @ref TIM_Trigger_Prescaler */ - uint32_t TriggerFilter; /*!< Input trigger filter - This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */ - -}TIM_SlaveConfigTypeDef; - -/** - * @brief TIM Break input(s) and Dead time configuration Structure definition - * @note 2 break inputs can be configured (BKIN and BKIN2) with configurable - * filter and polarity. - */ -typedef struct -{ - uint32_t OffStateRunMode; /*!< TIM off state in run mode - This parameter can be a value of @ref TIM_OSSR_Off_State_Selection_for_Run_mode_state */ - uint32_t OffStateIDLEMode; /*!< TIM off state in IDLE mode - This parameter can be a value of @ref TIM_OSSI_Off_State_Selection_for_Idle_mode_state */ - uint32_t LockLevel; /*!< TIM Lock level - This parameter can be a value of @ref TIM_Lock_level */ - uint32_t DeadTime; /*!< TIM dead Time - This parameter can be a number between Min_Data = 0x00 and Max_Data = 0xFF */ - uint32_t BreakState; /*!< TIM Break State - This parameter can be a value of @ref TIM_Break_Input_enable_disable */ - uint32_t BreakPolarity; /*!< TIM Break input polarity - This parameter can be a value of @ref TIM_Break_Polarity */ - uint32_t BreakFilter; /*!< Specifies the break input filter. - This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */ - uint32_t Break2State; /*!< TIM Break2 State - This parameter can be a value of @ref TIM_Break2_Input_enable_disable */ - uint32_t Break2Polarity; /*!< TIM Break2 input polarity - This parameter can be a value of @ref TIM_Break2_Polarity */ - uint32_t Break2Filter; /*!< TIM break2 input filter. - This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */ - uint32_t AutomaticOutput; /*!< TIM Automatic Output Enable state - This parameter can be a value of @ref TIM_AOE_Bit_Set_Reset */ -} TIM_BreakDeadTimeConfigTypeDef; - -/** - * @brief HAL State structures definition - */ -typedef enum -{ - HAL_TIM_STATE_RESET = 0x00, /*!< Peripheral not yet initialized or disabled */ - HAL_TIM_STATE_READY = 0x01, /*!< Peripheral Initialized and ready for use */ - HAL_TIM_STATE_BUSY = 0x02, /*!< An internal process is ongoing */ - HAL_TIM_STATE_TIMEOUT = 0x03, /*!< Timeout state */ - HAL_TIM_STATE_ERROR = 0x04 /*!< Reception process is ongoing */ -}HAL_TIM_StateTypeDef; - -/** - * @brief HAL Active channel structures definition - */ -typedef enum -{ - HAL_TIM_ACTIVE_CHANNEL_1 = 0x01, /*!< The active channel is 1 */ - HAL_TIM_ACTIVE_CHANNEL_2 = 0x02, /*!< The active channel is 2 */ - HAL_TIM_ACTIVE_CHANNEL_3 = 0x04, /*!< The active channel is 3 */ - HAL_TIM_ACTIVE_CHANNEL_4 = 0x08, /*!< The active channel is 4 */ - HAL_TIM_ACTIVE_CHANNEL_5 = 0x10, /*!< The active channel is 5 */ - HAL_TIM_ACTIVE_CHANNEL_6 = 0x20, /*!< The active channel is 6 */ - HAL_TIM_ACTIVE_CHANNEL_CLEARED = 0x00 /*!< All active channels cleared */ -}HAL_TIM_ActiveChannel; - -/** - * @brief TIM Time Base Handle Structure definition - */ -typedef struct -{ - TIM_TypeDef *Instance; /*!< Register base address */ - TIM_Base_InitTypeDef Init; /*!< TIM Time Base required parameters */ - HAL_TIM_ActiveChannel Channel; /*!< Active channel */ - DMA_HandleTypeDef *hdma[7]; /*!< DMA Handlers array - This array is accessed by a @ref DMA_Handle_index */ - HAL_LockTypeDef Lock; /*!< Locking object */ - __IO HAL_TIM_StateTypeDef State; /*!< TIM operation state */ -}TIM_HandleTypeDef; - -/** - * @} - */ -/* End of exported types -----------------------------------------------------*/ - -/* Exported constants --------------------------------------------------------*/ -/** @defgroup TIM_Exported_Constants TIM Exported Constants - * @{ - */ - -/** @defgroup TIM_ClearInput_Source TIM Clear Input Source - * @{ - */ -#define TIM_CLEARINPUTSOURCE_ETR ((uint32_t)0x0001) -#define TIM_CLEARINPUTSOURCE_OCREFCLR ((uint32_t)0x0002) -#define TIM_CLEARINPUTSOURCE_NONE ((uint32_t)0x0000) -/** - * @} - */ - -/** @defgroup TIM_DMA_Base_address TIM DMA Base Address - * @{ - */ -#define TIM_DMABASE_CR1 (0x00000000) -#define TIM_DMABASE_CR2 (0x00000001) -#define TIM_DMABASE_SMCR (0x00000002) -#define TIM_DMABASE_DIER (0x00000003) -#define TIM_DMABASE_SR (0x00000004) -#define TIM_DMABASE_EGR (0x00000005) -#define TIM_DMABASE_CCMR1 (0x00000006) -#define TIM_DMABASE_CCMR2 (0x00000007) -#define TIM_DMABASE_CCER (0x00000008) -#define TIM_DMABASE_CNT (0x00000009) -#define TIM_DMABASE_PSC (0x0000000A) -#define TIM_DMABASE_ARR (0x0000000B) -#define TIM_DMABASE_RCR (0x0000000C) -#define TIM_DMABASE_CCR1 (0x0000000D) -#define TIM_DMABASE_CCR2 (0x0000000E) -#define TIM_DMABASE_CCR3 (0x0000000F) -#define TIM_DMABASE_CCR4 (0x00000010) -#define TIM_DMABASE_BDTR (0x00000011) -#define TIM_DMABASE_DCR (0x00000012) -#define TIM_DMABASE_DMAR (0x00000013) -#define TIM_DMABASE_OR1 (0x00000014) -#define TIM_DMABASE_CCMR3 (0x00000015) -#define TIM_DMABASE_CCR5 (0x00000016) -#define TIM_DMABASE_CCR6 (0x00000017) -#define TIM_DMABASE_OR2 (0x00000018) -#define TIM_DMABASE_OR3 (0x00000019) -/** - * @} - */ - -/** @defgroup TIM_Event_Source TIM Extended Event Source - * @{ - */ -#define TIM_EVENTSOURCE_UPDATE TIM_EGR_UG /*!< Reinitialize the counter and generates an update of the registers */ -#define TIM_EVENTSOURCE_CC1 TIM_EGR_CC1G /*!< A capture/compare event is generated on channel 1 */ -#define TIM_EVENTSOURCE_CC2 TIM_EGR_CC2G /*!< A capture/compare event is generated on channel 2 */ -#define TIM_EVENTSOURCE_CC3 TIM_EGR_CC3G /*!< A capture/compare event is generated on channel 3 */ -#define TIM_EVENTSOURCE_CC4 TIM_EGR_CC4G /*!< A capture/compare event is generated on channel 4 */ -#define TIM_EVENTSOURCE_COM TIM_EGR_COMG /*!< A commutation event is generated */ -#define TIM_EVENTSOURCE_TRIGGER TIM_EGR_TG /*!< A trigger event is generated */ -#define TIM_EVENTSOURCE_BREAK TIM_EGR_BG /*!< A break event is generated */ -#define TIM_EVENTSOURCE_BREAK2 TIM_EGR_B2G /*!< A break 2 event is generated */ -/** - * @} - */ - -/** @defgroup TIM_Input_Channel_Polarity TIM Input Channel polarity - * @{ - */ -#define TIM_INPUTCHANNELPOLARITY_RISING ((uint32_t)0x00000000) /*!< Polarity for TIx source */ -#define TIM_INPUTCHANNELPOLARITY_FALLING (TIM_CCER_CC1P) /*!< Polarity for TIx source */ -#define TIM_INPUTCHANNELPOLARITY_BOTHEDGE (TIM_CCER_CC1P | TIM_CCER_CC1NP) /*!< Polarity for TIx source */ -/** - * @} - */ - -/** @defgroup TIM_ETR_Polarity TIM ETR Polarity - * @{ - */ -#define TIM_ETRPOLARITY_INVERTED (TIM_SMCR_ETP) /*!< Polarity for ETR source */ -#define TIM_ETRPOLARITY_NONINVERTED ((uint32_t)0x0000) /*!< Polarity for ETR source */ -/** - * @} - */ - -/** @defgroup TIM_ETR_Prescaler TIM ETR Prescaler - * @{ - */ -#define TIM_ETRPRESCALER_DIV1 ((uint32_t)0x0000) /*!< No prescaler is used */ -#define TIM_ETRPRESCALER_DIV2 (TIM_SMCR_ETPS_0) /*!< ETR input source is divided by 2 */ -#define TIM_ETRPRESCALER_DIV4 (TIM_SMCR_ETPS_1) /*!< ETR input source is divided by 4 */ -#define TIM_ETRPRESCALER_DIV8 (TIM_SMCR_ETPS) /*!< ETR input source is divided by 8 */ -/** - * @} - */ - -/** @defgroup TIM_Counter_Mode TIM Counter Mode - * @{ - */ -#define TIM_COUNTERMODE_UP ((uint32_t)0x0000) -#define TIM_COUNTERMODE_DOWN TIM_CR1_DIR -#define TIM_COUNTERMODE_CENTERALIGNED1 TIM_CR1_CMS_0 -#define TIM_COUNTERMODE_CENTERALIGNED2 TIM_CR1_CMS_1 -#define TIM_COUNTERMODE_CENTERALIGNED3 TIM_CR1_CMS -/** - * @} - */ - -/** @defgroup TIM_ClockDivision TIM Clock Division - * @{ - */ -#define TIM_CLOCKDIVISION_DIV1 ((uint32_t)0x0000) -#define TIM_CLOCKDIVISION_DIV2 (TIM_CR1_CKD_0) -#define TIM_CLOCKDIVISION_DIV4 (TIM_CR1_CKD_1) -/** - * @} - */ - -/** @defgroup TIM_Output_Compare_State TIM Output Compare State - * @{ - */ -#define TIM_OUTPUTSTATE_DISABLE ((uint32_t)0x0000) -#define TIM_OUTPUTSTATE_ENABLE (TIM_CCER_CC1E) -/** - * @} - */ - -/** @defgroup TIM_Output_Fast_State TIM Output Fast State - * @{ - */ -#define TIM_OCFAST_DISABLE ((uint32_t)0x0000) -#define TIM_OCFAST_ENABLE (TIM_CCMR1_OC1FE) -/** - * @} - */ - -/** @defgroup TIM_Output_Compare_N_State TIM Complementary Output Compare State - * @{ - */ -#define TIM_OUTPUTNSTATE_DISABLE ((uint32_t)0x0000) -#define TIM_OUTPUTNSTATE_ENABLE (TIM_CCER_CC1NE) -/** - * @} - */ - -/** @defgroup TIM_Output_Compare_Polarity TIM Output Compare Polarity - * @{ - */ -#define TIM_OCPOLARITY_HIGH ((uint32_t)0x0000) -#define TIM_OCPOLARITY_LOW (TIM_CCER_CC1P) -/** - * @} - */ - -/** @defgroup TIM_Output_Compare_N_Polarity TIM Complementary Output Compare Polarity - * @{ - */ -#define TIM_OCNPOLARITY_HIGH ((uint32_t)0x0000) -#define TIM_OCNPOLARITY_LOW (TIM_CCER_CC1NP) -/** - * @} - */ - -/** @defgroup TIM_Output_Compare_Idle_State TIM Output Compare Idle State - * @{ - */ -#define TIM_OCIDLESTATE_SET (TIM_CR2_OIS1) -#define TIM_OCIDLESTATE_RESET ((uint32_t)0x0000) -/** - * @} - */ - -/** @defgroup TIM_Output_Compare_N_Idle_State TIM Complementary Output Compare Idle State - * @{ - */ -#define TIM_OCNIDLESTATE_SET (TIM_CR2_OIS1N) -#define TIM_OCNIDLESTATE_RESET ((uint32_t)0x0000) -/** - * @} - */ - -/** @defgroup TIM_Input_Capture_Polarity TIM Input Capture Polarity - * @{ - */ -#define TIM_ICPOLARITY_RISING TIM_INPUTCHANNELPOLARITY_RISING -#define TIM_ICPOLARITY_FALLING TIM_INPUTCHANNELPOLARITY_FALLING -#define TIM_ICPOLARITY_BOTHEDGE TIM_INPUTCHANNELPOLARITY_BOTHEDGE -/** - * @} - */ - -/** @defgroup TIM_Input_Capture_Selection TIM Input Capture Selection - * @{ - */ -#define TIM_ICSELECTION_DIRECTTI (TIM_CCMR1_CC1S_0) /*!< TIM Input 1, 2, 3 or 4 is selected to be - connected to IC1, IC2, IC3 or IC4, respectively */ -#define TIM_ICSELECTION_INDIRECTTI (TIM_CCMR1_CC1S_1) /*!< TIM Input 1, 2, 3 or 4 is selected to be - connected to IC2, IC1, IC4 or IC3, respectively */ -#define TIM_ICSELECTION_TRC (TIM_CCMR1_CC1S) /*!< TIM Input 1, 2, 3 or 4 is selected to be connected to TRC */ -/** - * @} - */ - -/** @defgroup TIM_Input_Capture_Prescaler TIM Input Capture Prescaler - * @{ - */ -#define TIM_ICPSC_DIV1 ((uint32_t)0x0000) /*!< Capture performed each time an edge is detected on the capture input */ -#define TIM_ICPSC_DIV2 (TIM_CCMR1_IC1PSC_0) /*!< Capture performed once every 2 events */ -#define TIM_ICPSC_DIV4 (TIM_CCMR1_IC1PSC_1) /*!< Capture performed once every 4 events */ -#define TIM_ICPSC_DIV8 (TIM_CCMR1_IC1PSC) /*!< Capture performed once every 8 events */ -/** - * @} - */ - -/** @defgroup TIM_One_Pulse_Mode TIM One Pulse Mode - * @{ - */ -#define TIM_OPMODE_SINGLE (TIM_CR1_OPM) -#define TIM_OPMODE_REPETITIVE ((uint32_t)0x0000) -/** - * @} - */ - -/** @defgroup TIM_Encoder_Mode TIM Encoder Mode - * @{ - */ -#define TIM_ENCODERMODE_TI1 (TIM_SMCR_SMS_0) -#define TIM_ENCODERMODE_TI2 (TIM_SMCR_SMS_1) -#define TIM_ENCODERMODE_TI12 (TIM_SMCR_SMS_1 | TIM_SMCR_SMS_0) -/** - * @} - */ - -/** @defgroup TIM_Interrupt_definition TIM interrupt Definition - * @{ - */ -#define TIM_IT_UPDATE (TIM_DIER_UIE) -#define TIM_IT_CC1 (TIM_DIER_CC1IE) -#define TIM_IT_CC2 (TIM_DIER_CC2IE) -#define TIM_IT_CC3 (TIM_DIER_CC3IE) -#define TIM_IT_CC4 (TIM_DIER_CC4IE) -#define TIM_IT_COM (TIM_DIER_COMIE) -#define TIM_IT_TRIGGER (TIM_DIER_TIE) -#define TIM_IT_BREAK (TIM_DIER_BIE) -/** - * @} - */ - -/** @defgroup TIM_Commutation_Source TIM Commutation Source - * @{ - */ -#define TIM_COMMUTATION_TRGI (TIM_CR2_CCUS) -#define TIM_COMMUTATION_SOFTWARE ((uint32_t)0x0000) -/** - * @} - */ - -/** @defgroup TIM_DMA_sources TIM DMA Sources - * @{ - */ -#define TIM_DMA_UPDATE (TIM_DIER_UDE) -#define TIM_DMA_CC1 (TIM_DIER_CC1DE) -#define TIM_DMA_CC2 (TIM_DIER_CC2DE) -#define TIM_DMA_CC3 (TIM_DIER_CC3DE) -#define TIM_DMA_CC4 (TIM_DIER_CC4DE) -#define TIM_DMA_COM (TIM_DIER_COMDE) -#define TIM_DMA_TRIGGER (TIM_DIER_TDE) -/** - * @} - */ - -/** @defgroup TIM_Flag_definition TIM Flag Definition - * @{ - */ -#define TIM_FLAG_UPDATE (TIM_SR_UIF) -#define TIM_FLAG_CC1 (TIM_SR_CC1IF) -#define TIM_FLAG_CC2 (TIM_SR_CC2IF) -#define TIM_FLAG_CC3 (TIM_SR_CC3IF) -#define TIM_FLAG_CC4 (TIM_SR_CC4IF) -#define TIM_FLAG_CC5 (TIM_SR_CC5IF) -#define TIM_FLAG_CC6 (TIM_SR_CC6IF) -#define TIM_FLAG_COM (TIM_SR_COMIF) -#define TIM_FLAG_TRIGGER (TIM_SR_TIF) -#define TIM_FLAG_BREAK (TIM_SR_BIF) -#define TIM_FLAG_BREAK2 (TIM_SR_B2IF) -#define TIM_FLAG_SYSTEM_BREAK (TIM_SR_SBIF) -#define TIM_FLAG_CC1OF (TIM_SR_CC1OF) -#define TIM_FLAG_CC2OF (TIM_SR_CC2OF) -#define TIM_FLAG_CC3OF (TIM_SR_CC3OF) -#define TIM_FLAG_CC4OF (TIM_SR_CC4OF) -/** - * @} - */ - -/** @defgroup TIM_Channel TIM Channel - * @{ - */ -#define TIM_CHANNEL_1 ((uint32_t)0x0000) -#define TIM_CHANNEL_2 ((uint32_t)0x0004) -#define TIM_CHANNEL_3 ((uint32_t)0x0008) -#define TIM_CHANNEL_4 ((uint32_t)0x000C) -#define TIM_CHANNEL_5 ((uint32_t)0x0010) -#define TIM_CHANNEL_6 ((uint32_t)0x0014) -#define TIM_CHANNEL_ALL ((uint32_t)0x003C) -/** - * @} - */ - -/** @defgroup TIM_Clock_Source TIM Clock Source - * @{ - */ -#define TIM_CLOCKSOURCE_ETRMODE2 (TIM_SMCR_ETPS_1) -#define TIM_CLOCKSOURCE_INTERNAL (TIM_SMCR_ETPS_0) -#define TIM_CLOCKSOURCE_ITR0 ((uint32_t)0x0000) -#define TIM_CLOCKSOURCE_ITR1 (TIM_SMCR_TS_0) -#define TIM_CLOCKSOURCE_ITR2 (TIM_SMCR_TS_1) -#define TIM_CLOCKSOURCE_ITR3 (TIM_SMCR_TS_0 | TIM_SMCR_TS_1) -#define TIM_CLOCKSOURCE_TI1ED (TIM_SMCR_TS_2) -#define TIM_CLOCKSOURCE_TI1 (TIM_SMCR_TS_0 | TIM_SMCR_TS_2) -#define TIM_CLOCKSOURCE_TI2 (TIM_SMCR_TS_1 | TIM_SMCR_TS_2) -#define TIM_CLOCKSOURCE_ETRMODE1 (TIM_SMCR_TS) -/** - * @} - */ - -/** @defgroup TIM_Clock_Polarity TIM Clock Polarity - * @{ - */ -#define TIM_CLOCKPOLARITY_INVERTED TIM_ETRPOLARITY_INVERTED /*!< Polarity for ETRx clock sources */ -#define TIM_CLOCKPOLARITY_NONINVERTED TIM_ETRPOLARITY_NONINVERTED /*!< Polarity for ETRx clock sources */ -#define TIM_CLOCKPOLARITY_RISING TIM_INPUTCHANNELPOLARITY_RISING /*!< Polarity for TIx clock sources */ -#define TIM_CLOCKPOLARITY_FALLING TIM_INPUTCHANNELPOLARITY_FALLING /*!< Polarity for TIx clock sources */ -#define TIM_CLOCKPOLARITY_BOTHEDGE TIM_INPUTCHANNELPOLARITY_BOTHEDGE /*!< Polarity for TIx clock sources */ -/** - * @} - */ - -/** @defgroup TIM_Clock_Prescaler TIM Clock Prescaler - * @{ - */ -#define TIM_CLOCKPRESCALER_DIV1 TIM_ETRPRESCALER_DIV1 /*!< No prescaler is used */ -#define TIM_CLOCKPRESCALER_DIV2 TIM_ETRPRESCALER_DIV2 /*!< Prescaler for External ETR Clock: Capture performed once every 2 events. */ -#define TIM_CLOCKPRESCALER_DIV4 TIM_ETRPRESCALER_DIV4 /*!< Prescaler for External ETR Clock: Capture performed once every 4 events. */ -#define TIM_CLOCKPRESCALER_DIV8 TIM_ETRPRESCALER_DIV8 /*!< Prescaler for External ETR Clock: Capture performed once every 8 events. */ -/** - * @} - */ - -/** @defgroup TIM_ClearInput_Polarity TIM Clear Input Polarity - * @{ - */ -#define TIM_CLEARINPUTPOLARITY_INVERTED TIM_ETRPOLARITY_INVERTED /*!< Polarity for ETRx pin */ -#define TIM_CLEARINPUTPOLARITY_NONINVERTED TIM_ETRPOLARITY_NONINVERTED /*!< Polarity for ETRx pin */ -/** - * @} - */ - -/** @defgroup TIM_ClearInput_Prescaler TIM Clear Input Prescaler - * @{ - */ -#define TIM_CLEARINPUTPRESCALER_DIV1 TIM_ETRPRESCALER_DIV1 /*!< No prescaler is used */ -#define TIM_CLEARINPUTPRESCALER_DIV2 TIM_ETRPRESCALER_DIV2 /*!< Prescaler for External ETR pin: Capture performed once every 2 events. */ -#define TIM_CLEARINPUTPRESCALER_DIV4 TIM_ETRPRESCALER_DIV4 /*!< Prescaler for External ETR pin: Capture performed once every 4 events. */ -#define TIM_CLEARINPUTPRESCALER_DIV8 TIM_ETRPRESCALER_DIV8 /*!< Prescaler for External ETR pin: Capture performed once every 8 events. */ -/** - * @} - */ - -/** @defgroup TIM_OSSR_Off_State_Selection_for_Run_mode_state TIM OSSR OffState Selection for Run mode state - * @{ - */ -#define TIM_OSSR_ENABLE (TIM_BDTR_OSSR) -#define TIM_OSSR_DISABLE ((uint32_t)0x0000) -/** - * @} - */ - -/** @defgroup TIM_OSSI_Off_State_Selection_for_Idle_mode_state TIM OSSI OffState Selection for Idle mode state - * @{ - */ -#define TIM_OSSI_ENABLE (TIM_BDTR_OSSI) -#define TIM_OSSI_DISABLE ((uint32_t)0x0000) -/** - * @} - */ -/** @defgroup TIM_Lock_level TIM Lock level - * @{ - */ -#define TIM_LOCKLEVEL_OFF ((uint32_t)0x0000) -#define TIM_LOCKLEVEL_1 (TIM_BDTR_LOCK_0) -#define TIM_LOCKLEVEL_2 (TIM_BDTR_LOCK_1) -#define TIM_LOCKLEVEL_3 (TIM_BDTR_LOCK) -/** - * @} - */ - -/** @defgroup TIM_Break_Input_enable_disable TIM Break Input Enable - * @{ - */ -#define TIM_BREAK_ENABLE (TIM_BDTR_BKE) -#define TIM_BREAK_DISABLE ((uint32_t)0x0000) -/** - * @} - */ - -/** @defgroup TIM_Break_Polarity TIM Break Input Polarity - * @{ - */ -#define TIM_BREAKPOLARITY_LOW ((uint32_t)0x0000) -#define TIM_BREAKPOLARITY_HIGH (TIM_BDTR_BKP) -/** - * @} - */ - -/** @defgroup TIM_Break2_Input_enable_disable TIM Break input 2 Enable - * @{ - */ -#define TIM_BREAK2_DISABLE ((uint32_t)0x00000000) -#define TIM_BREAK2_ENABLE ((uint32_t)TIM_BDTR_BK2E) -/** - * @} - */ - -/** @defgroup TIM_Break2_Polarity TIM Break Input 2 Polarity - * @{ - */ -#define TIM_BREAK2POLARITY_LOW ((uint32_t)0x00000000) -#define TIM_BREAK2POLARITY_HIGH ((uint32_t)TIM_BDTR_BK2P) -/** - * @} - */ - -/** @defgroup TIM_AOE_Bit_Set_Reset TIM Automatic Output Enable - * @{ - */ -#define TIM_AUTOMATICOUTPUT_ENABLE (TIM_BDTR_AOE) -#define TIM_AUTOMATICOUTPUT_DISABLE ((uint32_t)0x0000) -/** - * @} - */ - -/** @defgroup TIM_Group_Channel5 Group Channel 5 and Channel 1, 2 or 3 - * @{ - */ -#define TIM_GROUPCH5_NONE (uint32_t)0x00000000 /* !< No effect of OC5REF on OC1REFC, OC2REFC and OC3REFC */ -#define TIM_GROUPCH5_OC1REFC (TIM_CCR5_GC5C1) /* !< OC1REFC is the logical AND of OC1REFC and OC5REF */ -#define TIM_GROUPCH5_OC2REFC (TIM_CCR5_GC5C2) /* !< OC2REFC is the logical AND of OC2REFC and OC5REF */ -#define TIM_GROUPCH5_OC3REFC (TIM_CCR5_GC5C3) /* !< OC3REFC is the logical AND of OC3REFC and OC5REF */ -/** - * @} - */ - -/** @defgroup TIM_Master_Mode_Selection TIM Master Mode Selection - * @{ - */ -#define TIM_TRGO_RESET ((uint32_t)0x0000) -#define TIM_TRGO_ENABLE (TIM_CR2_MMS_0) -#define TIM_TRGO_UPDATE (TIM_CR2_MMS_1) -#define TIM_TRGO_OC1 ((TIM_CR2_MMS_1 | TIM_CR2_MMS_0)) -#define TIM_TRGO_OC1REF (TIM_CR2_MMS_2) -#define TIM_TRGO_OC2REF ((TIM_CR2_MMS_2 | TIM_CR2_MMS_0)) -#define TIM_TRGO_OC3REF ((TIM_CR2_MMS_2 | TIM_CR2_MMS_1)) -#define TIM_TRGO_OC4REF ((TIM_CR2_MMS_2 | TIM_CR2_MMS_1 | TIM_CR2_MMS_0)) -/** - * @} - */ - -/** @defgroup TIM_Master_Mode_Selection_2 TIM Master Mode Selection 2 (TRGO2) - * @{ - */ -#define TIM_TRGO2_RESET ((uint32_t)0x00000000) -#define TIM_TRGO2_ENABLE ((uint32_t)(TIM_CR2_MMS2_0)) -#define TIM_TRGO2_UPDATE ((uint32_t)(TIM_CR2_MMS2_1)) -#define TIM_TRGO2_OC1 ((uint32_t)(TIM_CR2_MMS2_1 | TIM_CR2_MMS2_0)) -#define TIM_TRGO2_OC1REF ((uint32_t)(TIM_CR2_MMS2_2)) -#define TIM_TRGO2_OC2REF ((uint32_t)(TIM_CR2_MMS2_2 | TIM_CR2_MMS2_0)) -#define TIM_TRGO2_OC3REF ((uint32_t)(TIM_CR2_MMS2_2 | TIM_CR2_MMS2_1)) -#define TIM_TRGO2_OC4REF ((uint32_t)(TIM_CR2_MMS2_2 | TIM_CR2_MMS2_1 | TIM_CR2_MMS2_0)) -#define TIM_TRGO2_OC5REF ((uint32_t)(TIM_CR2_MMS2_3)) -#define TIM_TRGO2_OC6REF ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_0)) -#define TIM_TRGO2_OC4REF_RISINGFALLING ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_1)) -#define TIM_TRGO2_OC6REF_RISINGFALLING ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_1 | TIM_CR2_MMS2_0)) -#define TIM_TRGO2_OC4REF_RISING_OC6REF_RISING ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_2)) -#define TIM_TRGO2_OC4REF_RISING_OC6REF_FALLING ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_2 | TIM_CR2_MMS2_0)) -#define TIM_TRGO2_OC5REF_RISING_OC6REF_RISING ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_2 |TIM_CR2_MMS2_1)) -#define TIM_TRGO2_OC5REF_RISING_OC6REF_FALLING ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_2 | TIM_CR2_MMS2_1 | TIM_CR2_MMS2_0)) -/** - * @} - */ - -/** @defgroup TIM_Master_Slave_Mode TIM Master/Slave Mode - * @{ - */ -#define TIM_MASTERSLAVEMODE_ENABLE ((uint32_t)0x0080) -#define TIM_MASTERSLAVEMODE_DISABLE ((uint32_t)0x0000) -/** - * @} - */ - -/** @defgroup TIM_Slave_Mode TIM Slave mode - * @{ - */ -#define TIM_SLAVEMODE_DISABLE ((uint32_t)0x0000) -#define TIM_SLAVEMODE_RESET ((uint32_t)(TIM_SMCR_SMS_2)) -#define TIM_SLAVEMODE_GATED ((uint32_t)(TIM_SMCR_SMS_2 | TIM_SMCR_SMS_0)) -#define TIM_SLAVEMODE_TRIGGER ((uint32_t)(TIM_SMCR_SMS_2 | TIM_SMCR_SMS_1)) -#define TIM_SLAVEMODE_EXTERNAL1 ((uint32_t)(TIM_SMCR_SMS_2 | TIM_SMCR_SMS_1 | TIM_SMCR_SMS_0)) -#define TIM_SLAVEMODE_COMBINED_RESETTRIGGER ((uint32_t)(TIM_SMCR_SMS_3)) -/** - * @} - */ - -/** @defgroup TIM_Output_Compare_and_PWM_modes TIM Output Compare and PWM Modes - * @{ - */ -#define TIM_OCMODE_TIMING ((uint32_t)0x0000) -#define TIM_OCMODE_ACTIVE ((uint32_t)TIM_CCMR1_OC1M_0) -#define TIM_OCMODE_INACTIVE ((uint32_t)TIM_CCMR1_OC1M_1) -#define TIM_OCMODE_TOGGLE ((uint32_t)TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_0) -#define TIM_OCMODE_PWM1 ((uint32_t)TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1) -#define TIM_OCMODE_PWM2 ((uint32_t)TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_0) -#define TIM_OCMODE_FORCED_ACTIVE ((uint32_t)TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_0) -#define TIM_OCMODE_FORCED_INACTIVE ((uint32_t)TIM_CCMR1_OC1M_2) - -#define TIM_OCMODE_RETRIGERRABLE_OPM1 ((uint32_t)TIM_CCMR1_OC1M_3) -#define TIM_OCMODE_RETRIGERRABLE_OPM2 ((uint32_t)TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_0) -#define TIM_OCMODE_COMBINED_PWM1 ((uint32_t)TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_2) -#define TIM_OCMODE_COMBINED_PWM2 ((uint32_t)TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_0 | TIM_CCMR1_OC1M_2) -#define TIM_OCMODE_ASSYMETRIC_PWM1 ((uint32_t)TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2) -#define TIM_OCMODE_ASSYMETRIC_PWM2 ((uint32_t)TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M) -/** - * @} - */ - -/** @defgroup TIM_Trigger_Selection TIM Trigger Selection - * @{ - */ -#define TIM_TS_ITR0 ((uint32_t)0x0000) -#define TIM_TS_ITR1 ((uint32_t)0x0010) -#define TIM_TS_ITR2 ((uint32_t)0x0020) -#define TIM_TS_ITR3 ((uint32_t)0x0030) -#define TIM_TS_TI1F_ED ((uint32_t)0x0040) -#define TIM_TS_TI1FP1 ((uint32_t)0x0050) -#define TIM_TS_TI2FP2 ((uint32_t)0x0060) -#define TIM_TS_ETRF ((uint32_t)0x0070) -#define TIM_TS_NONE ((uint32_t)0xFFFF) -/** - * @} - */ - -/** @defgroup TIM_Trigger_Polarity TIM Trigger Polarity - * @{ - */ -#define TIM_TRIGGERPOLARITY_INVERTED TIM_ETRPOLARITY_INVERTED /*!< Polarity for ETRx trigger sources */ -#define TIM_TRIGGERPOLARITY_NONINVERTED TIM_ETRPOLARITY_NONINVERTED /*!< Polarity for ETRx trigger sources */ -#define TIM_TRIGGERPOLARITY_RISING TIM_INPUTCHANNELPOLARITY_RISING /*!< Polarity for TIxFPx or TI1_ED trigger sources */ -#define TIM_TRIGGERPOLARITY_FALLING TIM_INPUTCHANNELPOLARITY_FALLING /*!< Polarity for TIxFPx or TI1_ED trigger sources */ -#define TIM_TRIGGERPOLARITY_BOTHEDGE TIM_INPUTCHANNELPOLARITY_BOTHEDGE /*!< Polarity for TIxFPx or TI1_ED trigger sources */ -/** - * @} - */ - -/** @defgroup TIM_Trigger_Prescaler TIM Trigger Prescaler - * @{ - */ -#define TIM_TRIGGERPRESCALER_DIV1 TIM_ETRPRESCALER_DIV1 /*!< No prescaler is used */ -#define TIM_TRIGGERPRESCALER_DIV2 TIM_ETRPRESCALER_DIV2 /*!< Prescaler for External ETR Trigger: Capture performed once every 2 events. */ -#define TIM_TRIGGERPRESCALER_DIV4 TIM_ETRPRESCALER_DIV4 /*!< Prescaler for External ETR Trigger: Capture performed once every 4 events. */ -#define TIM_TRIGGERPRESCALER_DIV8 TIM_ETRPRESCALER_DIV8 /*!< Prescaler for External ETR Trigger: Capture performed once every 8 events. */ -/** - * @} - */ - -/** @defgroup TIM_TI1_Selection TIM TI1 Input Selection - * @{ - */ -#define TIM_TI1SELECTION_CH1 ((uint32_t)0x0000) -#define TIM_TI1SELECTION_XORCOMBINATION (TIM_CR2_TI1S) -/** - * @} - */ - -/** @defgroup TIM_DMA_Burst_Length TIM DMA Burst Length - * @{ - */ -#define TIM_DMABURSTLENGTH_1TRANSFER (0x00000000) -#define TIM_DMABURSTLENGTH_2TRANSFERS (0x00000100) -#define TIM_DMABURSTLENGTH_3TRANSFERS (0x00000200) -#define TIM_DMABURSTLENGTH_4TRANSFERS (0x00000300) -#define TIM_DMABURSTLENGTH_5TRANSFERS (0x00000400) -#define TIM_DMABURSTLENGTH_6TRANSFERS (0x00000500) -#define TIM_DMABURSTLENGTH_7TRANSFERS (0x00000600) -#define TIM_DMABURSTLENGTH_8TRANSFERS (0x00000700) -#define TIM_DMABURSTLENGTH_9TRANSFERS (0x00000800) -#define TIM_DMABURSTLENGTH_10TRANSFERS (0x00000900) -#define TIM_DMABURSTLENGTH_11TRANSFERS (0x00000A00) -#define TIM_DMABURSTLENGTH_12TRANSFERS (0x00000B00) -#define TIM_DMABURSTLENGTH_13TRANSFERS (0x00000C00) -#define TIM_DMABURSTLENGTH_14TRANSFERS (0x00000D00) -#define TIM_DMABURSTLENGTH_15TRANSFERS (0x00000E00) -#define TIM_DMABURSTLENGTH_16TRANSFERS (0x00000F00) -#define TIM_DMABURSTLENGTH_17TRANSFERS (0x00001000) -#define TIM_DMABURSTLENGTH_18TRANSFERS (0x00001100) -/** - * @} - */ - -/** @defgroup DMA_Handle_index TIM DMA Handle Index - * @{ - */ -#define TIM_DMA_ID_UPDATE ((uint16_t) 0x0) /*!< Index of the DMA handle used for Update DMA requests */ -#define TIM_DMA_ID_CC1 ((uint16_t) 0x1) /*!< Index of the DMA handle used for Capture/Compare 1 DMA requests */ -#define TIM_DMA_ID_CC2 ((uint16_t) 0x2) /*!< Index of the DMA handle used for Capture/Compare 2 DMA requests */ -#define TIM_DMA_ID_CC3 ((uint16_t) 0x3) /*!< Index of the DMA handle used for Capture/Compare 3 DMA requests */ -#define TIM_DMA_ID_CC4 ((uint16_t) 0x4) /*!< Index of the DMA handle used for Capture/Compare 4 DMA requests */ -#define TIM_DMA_ID_COMMUTATION ((uint16_t) 0x5) /*!< Index of the DMA handle used for Commutation DMA requests */ -#define TIM_DMA_ID_TRIGGER ((uint16_t) 0x6) /*!< Index of the DMA handle used for Trigger DMA requests */ -/** - * @} - */ - -/** @defgroup Channel_CC_State TIM Capture/Compare Channel State - * @{ - */ -#define TIM_CCx_ENABLE ((uint32_t)0x0001) -#define TIM_CCx_DISABLE ((uint32_t)0x0000) -#define TIM_CCxN_ENABLE ((uint32_t)0x0004) -#define TIM_CCxN_DISABLE ((uint32_t)0x0000) -/** - * @} - */ - -/** @defgroup TIM_Break_System TIM Break System - * @{ - */ -#define TIM_BREAK_SYSTEM_ECC SYSCFG_CFGR2_ECCL /*!< Enables and locks the ECC error signal with Break Input of TIM1/8/15/16/17 */ -#define TIM_BREAK_SYSTEM_PVD SYSCFG_CFGR2_PVDL /*!< Enables and locks the PVD connection with TIM1/8/15/16/17 Break Input and also the PVDE and PLS bits of the Power Control Interface */ -#define TIM_BREAK_SYSTEM_SRAM2_PARITY_ERROR SYSCFG_CFGR2_SPL /*!< Enables and locks the SRAM2_PARITY error signal with Break Input of TIM1/8/15/16/17 */ -#define TIM_BREAK_SYSTEM_LOCKUP SYSCFG_CFGR2_CLL /*!< Enables and locks the LOCKUP output of CortexM4 with Break Input of TIM1/15/16/17 */ -/** - * @} - */ - -/** - * @} - */ -/* End of exported constants -------------------------------------------------*/ - -/* Exported macros -----------------------------------------------------------*/ -/** @defgroup TIM_Exported_Macros TIM Exported Macros - * @{ - */ - -/** @brief Reset TIM handle state. - * @param __HANDLE__: TIM handle. - * @retval None - */ -#define __HAL_TIM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_TIM_STATE_RESET) - -/** - * @brief Enable the TIM peripheral. - * @param __HANDLE__: TIM handle - * @retval None - */ -#define __HAL_TIM_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1|=(TIM_CR1_CEN)) - -/** - * @brief Enable the TIM main Output. - * @param __HANDLE__: TIM handle - * @retval None - */ -#define __HAL_TIM_MOE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->BDTR|=(TIM_BDTR_MOE)) - -/** - * @brief Disable the TIM peripheral. - * @param __HANDLE__: TIM handle - * @retval None - */ -#define __HAL_TIM_DISABLE(__HANDLE__) \ - do { \ - if (((__HANDLE__)->Instance->CCER & TIM_CCER_CCxE_MASK) == 0) \ - { \ - if(((__HANDLE__)->Instance->CCER & TIM_CCER_CCxNE_MASK) == 0) \ - { \ - (__HANDLE__)->Instance->CR1 &= ~(TIM_CR1_CEN); \ - } \ - } \ - } while(0) - -/** - * @brief Disable the TIM main Output. - * @param __HANDLE__: TIM handle - * @retval None - * @note The Main Output Enable of a timer instance is disabled only if all the CCx and CCxN channels have been disabled - */ -#define __HAL_TIM_MOE_DISABLE(__HANDLE__) \ - do { \ - if (((__HANDLE__)->Instance->CCER & TIM_CCER_CCxE_MASK) == 0) \ - { \ - if(((__HANDLE__)->Instance->CCER & TIM_CCER_CCxNE_MASK) == 0) \ - { \ - (__HANDLE__)->Instance->BDTR &= ~(TIM_BDTR_MOE); \ - } \ - } \ - } while(0) - -/** @brief Enable the specified TIM interrupt. - * @param __HANDLE__: specifies the TIM Handle. - * @param __INTERRUPT__: specifies the TIM interrupt source to enable. - * This parameter can be one of the following values: - * @arg TIM_IT_UPDATE: Update interrupt - * @arg TIM_IT_CC1: Capture/Compare 1 interrupt - * @arg TIM_IT_CC2: Capture/Compare 2 interrupt - * @arg TIM_IT_CC3: Capture/Compare 3 interrupt - * @arg TIM_IT_CC4: Capture/Compare 4 interrupt - * @arg TIM_IT_COM: Commutation interrupt - * @arg TIM_IT_TRIGGER: Trigger interrupt - * @arg TIM_IT_BREAK: Break interrupt - * @retval None - */ -#define __HAL_TIM_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->DIER |= (__INTERRUPT__)) - - -/** @brief Disable the specified TIM interrupt. - * @param __HANDLE__: specifies the TIM Handle. - * @param __INTERRUPT__: specifies the TIM interrupt source to disable. - * This parameter can be one of the following values: - * @arg TIM_IT_UPDATE: Update interrupt - * @arg TIM_IT_CC1: Capture/Compare 1 interrupt - * @arg TIM_IT_CC2: Capture/Compare 2 interrupt - * @arg TIM_IT_CC3: Capture/Compare 3 interrupt - * @arg TIM_IT_CC4: Capture/Compare 4 interrupt - * @arg TIM_IT_COM: Commutation interrupt - * @arg TIM_IT_TRIGGER: Trigger interrupt - * @arg TIM_IT_BREAK: Break interrupt - * @retval None - */ -#define __HAL_TIM_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->DIER &= ~(__INTERRUPT__)) - -/** @brief Enable the specified DMA request. - * @param __HANDLE__: specifies the TIM Handle. - * @param __DMA__: specifies the TIM DMA request to enable. - * This parameter can be one of the following values: - * @arg TIM_DMA_UPDATE: Update DMA request - * @arg TIM_DMA_CC1: Capture/Compare 1 DMA request - * @arg TIM_DMA_CC2: Capture/Compare 2 DMA request - * @arg TIM_DMA_CC3: Capture/Compare 3 DMA request - * @arg TIM_DMA_CC4: Capture/Compare 4 DMA request - * @arg TIM_DMA_COM: Commutation DMA request - * @arg TIM_DMA_TRIGGER: Trigger DMA request - * @arg TIM_DMA_BREAK: Break DMA request - * @retval None - */ -#define __HAL_TIM_ENABLE_DMA(__HANDLE__, __DMA__) ((__HANDLE__)->Instance->DIER |= (__DMA__)) - -/** @brief Disable the specified DMA request. - * @param __HANDLE__: specifies the TIM Handle. - * @param __DMA__: specifies the TIM DMA request to disable. - * This parameter can be one of the following values: - * @arg TIM_DMA_UPDATE: Update DMA request - * @arg TIM_DMA_CC1: Capture/Compare 1 DMA request - * @arg TIM_DMA_CC2: Capture/Compare 2 DMA request - * @arg TIM_DMA_CC3: Capture/Compare 3 DMA request - * @arg TIM_DMA_CC4: Capture/Compare 4 DMA request - * @arg TIM_DMA_COM: Commutation DMA request - * @arg TIM_DMA_TRIGGER: Trigger DMA request - * @arg TIM_DMA_BREAK: Break DMA request - * @retval None - */ -#define __HAL_TIM_DISABLE_DMA(__HANDLE__, __DMA__) ((__HANDLE__)->Instance->DIER &= ~(__DMA__)) - -/** @brief Check whether the specified TIM interrupt flag is set or not. - * @param __HANDLE__: specifies the TIM Handle. - * @param __FLAG__: specifies the TIM interrupt flag to check. - * This parameter can be one of the following values: - * @arg TIM_FLAG_UPDATE: Update interrupt flag - * @arg TIM_FLAG_CC1: Capture/Compare 1 interrupt flag - * @arg TIM_FLAG_CC2: Capture/Compare 2 interrupt flag - * @arg TIM_FLAG_CC3: Capture/Compare 3 interrupt flag - * @arg TIM_FLAG_CC4: Capture/Compare 4 interrupt flag - * @arg TIM_FLAG_CC5: Compare 5 interrupt flag - * @arg TIM_FLAG_CC6: Compare 5 interrupt flag - * @arg TIM_FLAG_COM: Commutation interrupt flag - * @arg TIM_FLAG_TRIGGER: Trigger interrupt flag - * @arg TIM_FLAG_BREAK: Break interrupt flag - * @arg TIM_FLAG_BREAK2: Break 2 interrupt flag - * @arg TIM_FLAG_SYSTEM_BREAK: System Break interrupt flag - * @arg TIM_FLAG_CC1OF: Capture/Compare 1 overcapture flag - * @arg TIM_FLAG_CC2OF: Capture/Compare 2 overcapture flag - * @arg TIM_FLAG_CC3OF: Capture/Compare 3 overcapture flag - * @arg TIM_FLAG_CC4OF: Capture/Compare 4 overcapture flag - * @retval The new state of __FLAG__ (TRUE or FALSE). - */ -#define __HAL_TIM_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR &(__FLAG__)) == (__FLAG__)) - -/** @brief Clear the specified TIM interrupt flag. - * @param __HANDLE__: specifies the TIM Handle. - * @param __FLAG__: specifies the TIM interrupt flag to clear. - * This parameter can be one of the following values: - * @arg TIM_FLAG_UPDATE: Update interrupt flag - * @arg TIM_FLAG_CC1: Capture/Compare 1 interrupt flag - * @arg TIM_FLAG_CC2: Capture/Compare 2 interrupt flag - * @arg TIM_FLAG_CC3: Capture/Compare 3 interrupt flag - * @arg TIM_FLAG_CC4: Capture/Compare 4 interrupt flag - * @arg TIM_FLAG_CC5: Compare 5 interrupt flag - * @arg TIM_FLAG_CC6: Compare 5 interrupt flag - * @arg TIM_FLAG_COM: Commutation interrupt flag - * @arg TIM_FLAG_TRIGGER: Trigger interrupt flag - * @arg TIM_FLAG_BREAK: Break interrupt flag - * @arg TIM_FLAG_BREAK2: Break 2 interrupt flag - * @arg TIM_FLAG_SYSTEM_BREAK: System Break interrupt flag - * @arg TIM_FLAG_CC1OF: Capture/Compare 1 overcapture flag - * @arg TIM_FLAG_CC2OF: Capture/Compare 2 overcapture flag - * @arg TIM_FLAG_CC3OF: Capture/Compare 3 overcapture flag - * @arg TIM_FLAG_CC4OF: Capture/Compare 4 overcapture flag - * @retval The new state of __FLAG__ (TRUE or FALSE). - */ -#define __HAL_TIM_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR = ~(__FLAG__)) - -/** - * @brief Check whether the specified TIM interrupt source is enabled or not. - * @param __HANDLE__: TIM handle - * @param __INTERRUPT__: specifies the TIM interrupt source to check. - * This parameter can be one of the following values: - * @arg TIM_IT_UPDATE: Update interrupt - * @arg TIM_IT_CC1: Capture/Compare 1 interrupt - * @arg TIM_IT_CC2: Capture/Compare 2 interrupt - * @arg TIM_IT_CC3: Capture/Compare 3 interrupt - * @arg TIM_IT_CC4: Capture/Compare 4 interrupt - * @arg TIM_IT_COM: Commutation interrupt - * @arg TIM_IT_TRIGGER: Trigger interrupt - * @arg TIM_IT_BREAK: Break interrupt - * @retval The state of TIM_IT (SET or RESET). - */ -#define __HAL_TIM_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->DIER & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) - -/** @brief Clear the TIM interrupt pending bits. - * @param __HANDLE__: TIM handle - * @param __INTERRUPT__: specifies the interrupt pending bit to clear. - * This parameter can be one of the following values: - * @arg TIM_IT_UPDATE: Update interrupt - * @arg TIM_IT_CC1: Capture/Compare 1 interrupt - * @arg TIM_IT_CC2: Capture/Compare 2 interrupt - * @arg TIM_IT_CC3: Capture/Compare 3 interrupt - * @arg TIM_IT_CC4: Capture/Compare 4 interrupt - * @arg TIM_IT_COM: Commutation interrupt - * @arg TIM_IT_TRIGGER: Trigger interrupt - * @arg TIM_IT_BREAK: Break interrupt - * @retval None - */ -#define __HAL_TIM_CLEAR_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->SR = ~(__INTERRUPT__)) - -/** - * @brief Indicates whether or not the TIM Counter is used as downcounter. - * @param __HANDLE__: TIM handle. - * @retval False (Counter used as upcounter) or True (Counter used as downcounter) - * @note This macro is particularly useful to get the counting mode when the timer operates in Center-aligned mode or Encoder -mode. - */ -#define __HAL_TIM_IS_TIM_COUNTING_DOWN(__HANDLE__) (((__HANDLE__)->Instance->CR1 &(TIM_CR1_DIR)) == (TIM_CR1_DIR)) - - -/** - * @brief Set the TIM Prescaler on runtime. - * @param __HANDLE__: TIM handle. - * @param __PRESC__: specifies the Prescaler new value. - * @retval None - */ -#define __HAL_TIM_SET_PRESCALER(__HANDLE__, __PRESC__) ((__HANDLE__)->Instance->PSC = (__PRESC__)) - -/** - * @brief Set the TIM Counter Register value on runtime. - * @param __HANDLE__: TIM handle. - * @param __COUNTER__: specifies the Counter register new value. - * @retval None - */ -#define __HAL_TIM_SET_COUNTER(__HANDLE__, __COUNTER__) ((__HANDLE__)->Instance->CNT = (__COUNTER__)) - -/** - * @brief Get the TIM Counter Register value on runtime. - * @param __HANDLE__: TIM handle. - * @retval None - */ -#define __HAL_TIM_GET_COUNTER(__HANDLE__) \ - ((__HANDLE__)->Instance->CNT) - -/** - * @brief Set the TIM Autoreload Register value on runtime without calling another time any Init function. - * @param __HANDLE__: TIM handle. - * @param __AUTORELOAD__: specifies the Counter register new value. - * @retval None - */ -#define __HAL_TIM_SET_AUTORELOAD(__HANDLE__, __AUTORELOAD__) \ - do{ \ - (__HANDLE__)->Instance->ARR = (__AUTORELOAD__); \ - (__HANDLE__)->Init.Period = (__AUTORELOAD__); \ - } while(0) - -/** - * @brief Get the TIM Autoreload Register value on runtime. - * @param __HANDLE__: TIM handle. - * @retval None - */ -#define __HAL_TIM_GET_AUTORELOAD(__HANDLE__) \ - ((__HANDLE__)->Instance->ARR) - -/** - * @brief Set the TIM Clock Division value on runtime without calling another time any Init function. - * @param __HANDLE__: TIM handle. - * @param __CKD__: specifies the clock division value. - * This parameter can be one of the following value: - * @arg TIM_CLOCKDIVISION_DIV1 - * @arg TIM_CLOCKDIVISION_DIV2 - * @arg TIM_CLOCKDIVISION_DIV4 - * @retval None - */ -#define __HAL_TIM_SET_CLOCKDIVISION(__HANDLE__, __CKD__) \ - do{ \ - (__HANDLE__)->Instance->CR1 &= (uint16_t)(~TIM_CR1_CKD); \ - (__HANDLE__)->Instance->CR1 |= (__CKD__); \ - (__HANDLE__)->Init.ClockDivision = (__CKD__); \ - } while(0) - -/** - * @brief Get the TIM Clock Division value on runtime. - * @param __HANDLE__: TIM handle. - * @retval None - */ -#define __HAL_TIM_GET_CLOCKDIVISION(__HANDLE__) \ - ((__HANDLE__)->Instance->CR1 & TIM_CR1_CKD) - -/** - * @brief Set the TIM Input Capture prescaler on runtime without calling another time HAL_TIM_IC_ConfigChannel() function. - * @param __HANDLE__: TIM handle. - * @param __CHANNEL__: TIM Channels to be configured. - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @param __ICPSC__: specifies the Input Capture4 prescaler new value. - * This parameter can be one of the following values: - * @arg TIM_ICPSC_DIV1: no prescaler - * @arg TIM_ICPSC_DIV2: capture is done once every 2 events - * @arg TIM_ICPSC_DIV4: capture is done once every 4 events - * @arg TIM_ICPSC_DIV8: capture is done once every 8 events - * @retval None - */ -#define __HAL_TIM_SET_ICPRESCALER(__HANDLE__, __CHANNEL__, __ICPSC__) \ - do{ \ - TIM_RESET_ICPRESCALERVALUE((__HANDLE__), (__CHANNEL__)); \ - TIM_SET_ICPRESCALERVALUE((__HANDLE__), (__CHANNEL__), (__ICPSC__)); \ - } while(0) - -/** - * @brief Get the TIM Input Capture prescaler on runtime. - * @param __HANDLE__: TIM handle. - * @param __CHANNEL__: TIM Channels to be configured. - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: get input capture 1 prescaler value - * @arg TIM_CHANNEL_2: get input capture 2 prescaler value - * @arg TIM_CHANNEL_3: get input capture 3 prescaler value - * @arg TIM_CHANNEL_4: get input capture 4 prescaler value - * @retval None - */ -#define __HAL_TIM_GET_ICPRESCALER(__HANDLE__, __CHANNEL__) \ - (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 & TIM_CCMR1_IC1PSC) :\ - ((__CHANNEL__) == TIM_CHANNEL_2) ? (((__HANDLE__)->Instance->CCMR1 & TIM_CCMR1_IC2PSC) >> 8) :\ - ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 & TIM_CCMR2_IC3PSC) :\ - (((__HANDLE__)->Instance->CCMR2 & TIM_CCMR2_IC4PSC)) >> 8) - -/** - * @brief Set the TIM Capture Compare Register value on runtime without calling another time ConfigChannel function. - * @param __HANDLE__: TIM handle. - * @param __CHANNEL__: TIM Channels to be configured. - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @arg TIM_CHANNEL_5: TIM Channel 5 selected - * @arg TIM_CHANNEL_6: TIM Channel 6 selected - * @param __COMPARE__: specifies the Capture Compare register new value. - * @retval None - */ -#define __HAL_TIM_SET_COMPARE(__HANDLE__, __CHANNEL__, __COMPARE__) \ -(((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCR1 = (__COMPARE__)) :\ - ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCR2 = (__COMPARE__)) :\ - ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCR3 = (__COMPARE__)) :\ - ((__CHANNEL__) == TIM_CHANNEL_4) ? ((__HANDLE__)->Instance->CCR4 = (__COMPARE__)) :\ - ((__CHANNEL__) == TIM_CHANNEL_5) ? ((__HANDLE__)->Instance->CCR5 = (__COMPARE__)) :\ - ((__HANDLE__)->Instance->CCR6 = (__COMPARE__))) - -/** - * @brief Get the TIM Capture Compare Register value on runtime. - * @param __HANDLE__: TIM handle. - * @param __CHANNEL__: TIM Channel associated with the capture compare register - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: get capture/compare 1 register value - * @arg TIM_CHANNEL_2: get capture/compare 2 register value - * @arg TIM_CHANNEL_3: get capture/compare 3 register value - * @arg TIM_CHANNEL_4: get capture/compare 4 register value - * @arg TIM_CHANNEL_5: get capture/compare 5 register value - * @arg TIM_CHANNEL_6: get capture/compare 6 register value - * @retval None - */ -#define __HAL_TIM_GET_COMPARE(__HANDLE__, __CHANNEL__) \ -(((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCR1) :\ - ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCR2) :\ - ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCR3) :\ - ((__CHANNEL__) == TIM_CHANNEL_4) ? ((__HANDLE__)->Instance->CCR4) :\ - ((__CHANNEL__) == TIM_CHANNEL_5) ? ((__HANDLE__)->Instance->CCR5) :\ - ((__HANDLE__)->Instance->CCR6)) - -/** - * @brief Set the Update Request Source (URS) bit of the TIMx_CR1 register. - * @param __HANDLE__: TIM handle. - * @note When the USR bit of the TIMx_CR1 register is set, only counter - * overflow/underflow generates an update interrupt or DMA request (if - * enabled) - * @retval None - */ -#define __HAL_TIM_URS_ENABLE(__HANDLE__) \ - ((__HANDLE__)->Instance->CR1|= (TIM_CR1_URS)) - -/** - * @brief Reset the Update Request Source (URS) bit of the TIMx_CR1 register. - * @param __HANDLE__: TIM handle. - * @note When the USR bit of the TIMx_CR1 register is reset, any of the - * following events generate an update interrupt or DMA request (if - * enabled): - * _ Counter overflow underflow - * _ Setting the UG bit - * _ Update generation through the slave mode controller - * @retval None - */ -#define __HAL_TIM_URS_DISABLE(__HANDLE__) \ - ((__HANDLE__)->Instance->CR1&=~(TIM_CR1_URS)) - -/** - * @brief Set the TIM Capture x input polarity on runtime. - * @param __HANDLE__: TIM handle. - * @param __CHANNEL__: TIM Channels to be configured. - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @param __POLARITY__: Polarity for TIx source - * @arg TIM_INPUTCHANNELPOLARITY_RISING: Rising Edge - * @arg TIM_INPUTCHANNELPOLARITY_FALLING: Falling Edge - * @arg TIM_INPUTCHANNELPOLARITY_BOTHEDGE: Rising and Falling Edge - * @retval None - */ -#define __HAL_TIM_SET_CAPTUREPOLARITY(__HANDLE__, __CHANNEL__, __POLARITY__) \ - do{ \ - TIM_RESET_CAPTUREPOLARITY((__HANDLE__), (__CHANNEL__)); \ - TIM_SET_CAPTUREPOLARITY((__HANDLE__), (__CHANNEL__), (__POLARITY__)); \ - }while(0) - -/** - * @} - */ -/* End of exported macros ----------------------------------------------------*/ - -/* Private constants ---------------------------------------------------------*/ -/** @defgroup TIM_Private_Constants TIM Private Constants - * @{ - */ -/* The counter of a timer instance is disabled only if all the CCx and CCxN - channels have been disabled */ -#define TIM_CCER_CCxE_MASK ((uint32_t)(TIM_CCER_CC1E | TIM_CCER_CC2E | TIM_CCER_CC3E | TIM_CCER_CC4E)) -#define TIM_CCER_CCxNE_MASK ((uint32_t)(TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) -/** - * @} - */ -/* End of private constants --------------------------------------------------*/ - -/* Private macros ------------------------------------------------------------*/ -/** @defgroup TIM_Private_Macros TIM Private Macros - * @{ - */ - -#define IS_TIM_CLEARINPUT_SOURCE(__MODE__) (((__MODE__) == TIM_CLEARINPUTSOURCE_ETR) || \ - ((__MODE__) == TIM_CLEARINPUTSOURCE_OCREFCLR) || \ - ((__MODE__) == TIM_CLEARINPUTSOURCE_NONE)) - -#define IS_TIM_DMA_BASE(__BASE__) (((__BASE__) == TIM_DMABASE_CR1) || \ - ((__BASE__) == TIM_DMABASE_CR2) || \ - ((__BASE__) == TIM_DMABASE_SMCR) || \ - ((__BASE__) == TIM_DMABASE_DIER) || \ - ((__BASE__) == TIM_DMABASE_SR) || \ - ((__BASE__) == TIM_DMABASE_EGR) || \ - ((__BASE__) == TIM_DMABASE_CCMR1) || \ - ((__BASE__) == TIM_DMABASE_CCMR2) || \ - ((__BASE__) == TIM_DMABASE_CCER) || \ - ((__BASE__) == TIM_DMABASE_CNT) || \ - ((__BASE__) == TIM_DMABASE_PSC) || \ - ((__BASE__) == TIM_DMABASE_ARR) || \ - ((__BASE__) == TIM_DMABASE_RCR) || \ - ((__BASE__) == TIM_DMABASE_CCR1) || \ - ((__BASE__) == TIM_DMABASE_CCR2) || \ - ((__BASE__) == TIM_DMABASE_CCR3) || \ - ((__BASE__) == TIM_DMABASE_CCR4) || \ - ((__BASE__) == TIM_DMABASE_BDTR) || \ - ((__BASE__) == TIM_DMABASE_CCMR3) || \ - ((__BASE__) == TIM_DMABASE_CCR5) || \ - ((__BASE__) == TIM_DMABASE_CCR6) || \ - ((__BASE__) == TIM_DMABASE_OR1) || \ - ((__BASE__) == TIM_DMABASE_OR2) || \ - ((__BASE__) == TIM_DMABASE_OR3)) - - -#define IS_TIM_EVENT_SOURCE(__SOURCE__) ((((__SOURCE__) & 0xFFFFFE00) == 0x00000000) && ((__SOURCE__) != 0x00000000)) - - -#define IS_TIM_COUNTER_MODE(__MODE__) (((__MODE__) == TIM_COUNTERMODE_UP) || \ - ((__MODE__) == TIM_COUNTERMODE_DOWN) || \ - ((__MODE__) == TIM_COUNTERMODE_CENTERALIGNED1) || \ - ((__MODE__) == TIM_COUNTERMODE_CENTERALIGNED2) || \ - ((__MODE__) == TIM_COUNTERMODE_CENTERALIGNED3)) - -#define IS_TIM_CLOCKDIVISION_DIV(__DIV__) (((__DIV__) == TIM_CLOCKDIVISION_DIV1) || \ - ((__DIV__) == TIM_CLOCKDIVISION_DIV2) || \ - ((__DIV__) == TIM_CLOCKDIVISION_DIV4)) - -#define IS_TIM_FAST_STATE(__STATE__) (((__STATE__) == TIM_OCFAST_DISABLE) || \ - ((__STATE__) == TIM_OCFAST_ENABLE)) - -#define IS_TIM_OC_POLARITY(__POLARITY__) (((__POLARITY__) == TIM_OCPOLARITY_HIGH) || \ - ((__POLARITY__) == TIM_OCPOLARITY_LOW)) - -#define IS_TIM_OCN_POLARITY(__POLARITY__) (((__POLARITY__) == TIM_OCNPOLARITY_HIGH) || \ - ((__POLARITY__) == TIM_OCNPOLARITY_LOW)) - -#define IS_TIM_OCIDLE_STATE(__STATE__) (((__STATE__) == TIM_OCIDLESTATE_SET) || \ - ((__STATE__) == TIM_OCIDLESTATE_RESET)) - -#define IS_TIM_OCNIDLE_STATE(__STATE__) (((__STATE__) == TIM_OCNIDLESTATE_SET) || \ - ((__STATE__) == TIM_OCNIDLESTATE_RESET)) - -#define IS_TIM_IC_POLARITY(__POLARITY__) (((__POLARITY__) == TIM_ICPOLARITY_RISING) || \ - ((__POLARITY__) == TIM_ICPOLARITY_FALLING) || \ - ((__POLARITY__) == TIM_ICPOLARITY_BOTHEDGE)) - -#define IS_TIM_IC_SELECTION(__SELECTION__) (((__SELECTION__) == TIM_ICSELECTION_DIRECTTI) || \ - ((__SELECTION__) == TIM_ICSELECTION_INDIRECTTI) || \ - ((__SELECTION__) == TIM_ICSELECTION_TRC)) - -#define IS_TIM_IC_PRESCALER(__PRESCALER__) (((__PRESCALER__) == TIM_ICPSC_DIV1) || \ - ((__PRESCALER__) == TIM_ICPSC_DIV2) || \ - ((__PRESCALER__) == TIM_ICPSC_DIV4) || \ - ((__PRESCALER__) == TIM_ICPSC_DIV8)) - -#define IS_TIM_OPM_MODE(__MODE__) (((__MODE__) == TIM_OPMODE_SINGLE) || \ - ((__MODE__) == TIM_OPMODE_REPETITIVE)) - -#define IS_TIM_ENCODER_MODE(__MODE__) (((__MODE__) == TIM_ENCODERMODE_TI1) || \ - ((__MODE__) == TIM_ENCODERMODE_TI2) || \ - ((__MODE__) == TIM_ENCODERMODE_TI12)) - -#define IS_TIM_DMA_SOURCE(__SOURCE__) ((((__SOURCE__) & 0xFFFF80FF) == 0x00000000) && ((__SOURCE__) != 0x00000000)) - -#define IS_TIM_CHANNELS(__CHANNEL__) (((__CHANNEL__) == TIM_CHANNEL_1) || \ - ((__CHANNEL__) == TIM_CHANNEL_2) || \ - ((__CHANNEL__) == TIM_CHANNEL_3) || \ - ((__CHANNEL__) == TIM_CHANNEL_4) || \ - ((__CHANNEL__) == TIM_CHANNEL_5) || \ - ((__CHANNEL__) == TIM_CHANNEL_6) || \ - ((__CHANNEL__) == TIM_CHANNEL_ALL)) - -#define IS_TIM_OPM_CHANNELS(__CHANNEL__) (((__CHANNEL__) == TIM_CHANNEL_1) || \ - ((__CHANNEL__) == TIM_CHANNEL_2)) - -#define IS_TIM_COMPLEMENTARY_CHANNELS(__CHANNEL__) (((__CHANNEL__) == TIM_CHANNEL_1) || \ - ((__CHANNEL__) == TIM_CHANNEL_2) || \ - ((__CHANNEL__) == TIM_CHANNEL_3)) - -#define IS_TIM_CLOCKSOURCE(__CLOCK__) (((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \ - ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2) || \ - ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \ - ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \ - ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \ - ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \ - ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \ - ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \ - ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \ - ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1)) - -#define IS_TIM_CLOCKPOLARITY(__POLARITY__) (((__POLARITY__) == TIM_CLOCKPOLARITY_INVERTED) || \ - ((__POLARITY__) == TIM_CLOCKPOLARITY_NONINVERTED) || \ - ((__POLARITY__) == TIM_CLOCKPOLARITY_RISING) || \ - ((__POLARITY__) == TIM_CLOCKPOLARITY_FALLING) || \ - ((__POLARITY__) == TIM_CLOCKPOLARITY_BOTHEDGE)) - -#define IS_TIM_CLOCKPRESCALER(__PRESCALER__) (((__PRESCALER__) == TIM_CLOCKPRESCALER_DIV1) || \ - ((__PRESCALER__) == TIM_CLOCKPRESCALER_DIV2) || \ - ((__PRESCALER__) == TIM_CLOCKPRESCALER_DIV4) || \ - ((__PRESCALER__) == TIM_CLOCKPRESCALER_DIV8)) - -#define IS_TIM_CLOCKFILTER(ICFILTER) ((ICFILTER) <= 0xF) - -#define IS_TIM_CLEARINPUT_POLARITY(__POLARITY__) (((__POLARITY__) == TIM_CLEARINPUTPOLARITY_INVERTED) || \ - ((__POLARITY__) == TIM_CLEARINPUTPOLARITY_NONINVERTED)) - -#define IS_TIM_CLEARINPUT_PRESCALER(__PRESCALER__) (((__PRESCALER__) == TIM_CLEARINPUTPRESCALER_DIV1) || \ - ((__PRESCALER__) == TIM_CLEARINPUTPRESCALER_DIV2) || \ - ((__PRESCALER__) == TIM_CLEARINPUTPRESCALER_DIV4) || \ - ((__PRESCALER__) == TIM_CLEARINPUTPRESCALER_DIV8)) - -#define IS_TIM_CLEARINPUT_FILTER(__ICFILTER__) ((__ICFILTER__) <= 0xF) - - -#define IS_TIM_OSSR_STATE(__STATE__) (((__STATE__) == TIM_OSSR_ENABLE) || \ - ((__STATE__) == TIM_OSSR_DISABLE)) - -#define IS_TIM_OSSI_STATE(__STATE__) (((__STATE__) == TIM_OSSI_ENABLE) || \ - ((__STATE__) == TIM_OSSI_DISABLE)) - -#define IS_TIM_LOCK_LEVEL(__LEVEL__) (((__LEVEL__) == TIM_LOCKLEVEL_OFF) || \ - ((__LEVEL__) == TIM_LOCKLEVEL_1) || \ - ((__LEVEL__) == TIM_LOCKLEVEL_2) || \ - ((__LEVEL__) == TIM_LOCKLEVEL_3)) - -#define IS_TIM_BREAK_FILTER(__BRKFILTER__) ((__BRKFILTER__) <= 0xF) - - -#define IS_TIM_BREAK_STATE(__STATE__) (((__STATE__) == TIM_BREAK_ENABLE) || \ - ((__STATE__) == TIM_BREAK_DISABLE)) - -#define IS_TIM_BREAK_POLARITY(__POLARITY__) (((__POLARITY__) == TIM_BREAKPOLARITY_LOW) || \ - ((__POLARITY__) == TIM_BREAKPOLARITY_HIGH)) - -#define IS_TIM_BREAK2_STATE(__STATE__) (((__STATE__) == TIM_BREAK2_ENABLE) || \ - ((__STATE__) == TIM_BREAK2_DISABLE)) - -#define IS_TIM_BREAK2_POLARITY(__POLARITY__) (((__POLARITY__) == TIM_BREAK2POLARITY_LOW) || \ - ((__POLARITY__) == TIM_BREAK2POLARITY_HIGH)) - -#define IS_TIM_AUTOMATIC_OUTPUT_STATE(__STATE__) (((__STATE__) == TIM_AUTOMATICOUTPUT_ENABLE) || \ - ((__STATE__) == TIM_AUTOMATICOUTPUT_DISABLE)) - -#define IS_TIM_GROUPCH5(__OCREF__) ((((__OCREF__) & 0x1FFFFFFF) == 0x00000000)) - -#define IS_TIM_TRGO_SOURCE(__SOURCE__) (((__SOURCE__) == TIM_TRGO_RESET) || \ - ((__SOURCE__) == TIM_TRGO_ENABLE) || \ - ((__SOURCE__) == TIM_TRGO_UPDATE) || \ - ((__SOURCE__) == TIM_TRGO_OC1) || \ - ((__SOURCE__) == TIM_TRGO_OC1REF) || \ - ((__SOURCE__) == TIM_TRGO_OC2REF) || \ - ((__SOURCE__) == TIM_TRGO_OC3REF) || \ - ((__SOURCE__) == TIM_TRGO_OC4REF)) - -#define IS_TIM_TRGO2_SOURCE(__SOURCE__) (((__SOURCE__) == TIM_TRGO2_RESET) || \ - ((__SOURCE__) == TIM_TRGO2_ENABLE) || \ - ((__SOURCE__) == TIM_TRGO2_UPDATE) || \ - ((__SOURCE__) == TIM_TRGO2_OC1) || \ - ((__SOURCE__) == TIM_TRGO2_OC1REF) || \ - ((__SOURCE__) == TIM_TRGO2_OC2REF) || \ - ((__SOURCE__) == TIM_TRGO2_OC3REF) || \ - ((__SOURCE__) == TIM_TRGO2_OC3REF) || \ - ((__SOURCE__) == TIM_TRGO2_OC4REF) || \ - ((__SOURCE__) == TIM_TRGO2_OC5REF) || \ - ((__SOURCE__) == TIM_TRGO2_OC6REF) || \ - ((__SOURCE__) == TIM_TRGO2_OC4REF_RISINGFALLING) || \ - ((__SOURCE__) == TIM_TRGO2_OC6REF_RISINGFALLING) || \ - ((__SOURCE__) == TIM_TRGO2_OC4REF_RISING_OC6REF_RISING) || \ - ((__SOURCE__) == TIM_TRGO2_OC4REF_RISING_OC6REF_FALLING) || \ - ((__SOURCE__) == TIM_TRGO2_OC5REF_RISING_OC6REF_RISING) || \ - ((__SOURCE__) == TIM_TRGO2_OC5REF_RISING_OC6REF_FALLING)) - -#define IS_TIM_MSM_STATE(__STATE__) (((__STATE__) == TIM_MASTERSLAVEMODE_ENABLE) || \ - ((__STATE__) == TIM_MASTERSLAVEMODE_DISABLE)) - -#define IS_TIM_SLAVE_MODE(__MODE__) (((__MODE__) == TIM_SLAVEMODE_DISABLE) || \ - ((__MODE__) == TIM_SLAVEMODE_RESET) || \ - ((__MODE__) == TIM_SLAVEMODE_GATED) || \ - ((__MODE__) == TIM_SLAVEMODE_TRIGGER) || \ - ((__MODE__) == TIM_SLAVEMODE_EXTERNAL1) || \ - ((__MODE__) == TIM_SLAVEMODE_COMBINED_RESETTRIGGER)) - -#define IS_TIM_PWM_MODE(__MODE__) (((__MODE__) == TIM_OCMODE_PWM1) || \ - ((__MODE__) == TIM_OCMODE_PWM2) || \ - ((__MODE__) == TIM_OCMODE_COMBINED_PWM1) || \ - ((__MODE__) == TIM_OCMODE_COMBINED_PWM2) || \ - ((__MODE__) == TIM_OCMODE_ASSYMETRIC_PWM1) || \ - ((__MODE__) == TIM_OCMODE_ASSYMETRIC_PWM2)) - -#define IS_TIM_OC_MODE(__MODE__) (((__MODE__) == TIM_OCMODE_TIMING) || \ - ((__MODE__) == TIM_OCMODE_ACTIVE) || \ - ((__MODE__) == TIM_OCMODE_INACTIVE) || \ - ((__MODE__) == TIM_OCMODE_TOGGLE) || \ - ((__MODE__) == TIM_OCMODE_FORCED_ACTIVE) || \ - ((__MODE__) == TIM_OCMODE_FORCED_INACTIVE) || \ - ((__MODE__) == TIM_OCMODE_RETRIGERRABLE_OPM1) || \ - ((__MODE__) == TIM_OCMODE_RETRIGERRABLE_OPM2)) - -#define IS_TIM_TRIGGER_SELECTION(__SELECTION__) (((__SELECTION__) == TIM_TS_ITR0) || \ - ((__SELECTION__) == TIM_TS_ITR1) || \ - ((__SELECTION__) == TIM_TS_ITR2) || \ - ((__SELECTION__) == TIM_TS_ITR3) || \ - ((__SELECTION__) == TIM_TS_TI1F_ED) || \ - ((__SELECTION__) == TIM_TS_TI1FP1) || \ - ((__SELECTION__) == TIM_TS_TI2FP2) || \ - ((__SELECTION__) == TIM_TS_ETRF)) - -#define IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(__SELECTION__) (((__SELECTION__) == TIM_TS_ITR0) || \ - ((__SELECTION__) == TIM_TS_ITR1) || \ - ((__SELECTION__) == TIM_TS_ITR2) || \ - ((__SELECTION__) == TIM_TS_ITR3) || \ - ((__SELECTION__) == TIM_TS_NONE)) - - -#define IS_TIM_TRIGGERPOLARITY(__POLARITY__) (((__POLARITY__) == TIM_TRIGGERPOLARITY_INVERTED ) || \ - ((__POLARITY__) == TIM_TRIGGERPOLARITY_NONINVERTED) || \ - ((__POLARITY__) == TIM_TRIGGERPOLARITY_RISING ) || \ - ((__POLARITY__) == TIM_TRIGGERPOLARITY_FALLING ) || \ - ((__POLARITY__) == TIM_TRIGGERPOLARITY_BOTHEDGE )) - -#define IS_TIM_TRIGGERPRESCALER(__PRESCALER__) (((__PRESCALER__) == TIM_TRIGGERPRESCALER_DIV1) || \ - ((__PRESCALER__) == TIM_TRIGGERPRESCALER_DIV2) || \ - ((__PRESCALER__) == TIM_TRIGGERPRESCALER_DIV4) || \ - ((__PRESCALER__) == TIM_TRIGGERPRESCALER_DIV8)) - -#define IS_TIM_TRIGGERFILTER(__ICFILTER__) ((__ICFILTER__) <= 0xF) - -#define IS_TIM_TI1SELECTION(__TI1SELECTION__) (((__TI1SELECTION__) == TIM_TI1SELECTION_CH1) || \ - ((__TI1SELECTION__) == TIM_TI1SELECTION_XORCOMBINATION)) - -#define IS_TIM_DMA_LENGTH(__LENGTH__) (((__LENGTH__) == TIM_DMABURSTLENGTH_1TRANSFER) || \ - ((__LENGTH__) == TIM_DMABURSTLENGTH_2TRANSFERS) || \ - ((__LENGTH__) == TIM_DMABURSTLENGTH_3TRANSFERS) || \ - ((__LENGTH__) == TIM_DMABURSTLENGTH_4TRANSFERS) || \ - ((__LENGTH__) == TIM_DMABURSTLENGTH_5TRANSFERS) || \ - ((__LENGTH__) == TIM_DMABURSTLENGTH_6TRANSFERS) || \ - ((__LENGTH__) == TIM_DMABURSTLENGTH_7TRANSFERS) || \ - ((__LENGTH__) == TIM_DMABURSTLENGTH_8TRANSFERS) || \ - ((__LENGTH__) == TIM_DMABURSTLENGTH_9TRANSFERS) || \ - ((__LENGTH__) == TIM_DMABURSTLENGTH_10TRANSFERS) || \ - ((__LENGTH__) == TIM_DMABURSTLENGTH_11TRANSFERS) || \ - ((__LENGTH__) == TIM_DMABURSTLENGTH_12TRANSFERS) || \ - ((__LENGTH__) == TIM_DMABURSTLENGTH_13TRANSFERS) || \ - ((__LENGTH__) == TIM_DMABURSTLENGTH_14TRANSFERS) || \ - ((__LENGTH__) == TIM_DMABURSTLENGTH_15TRANSFERS) || \ - ((__LENGTH__) == TIM_DMABURSTLENGTH_16TRANSFERS) || \ - ((__LENGTH__) == TIM_DMABURSTLENGTH_17TRANSFERS) || \ - ((__LENGTH__) == TIM_DMABURSTLENGTH_18TRANSFERS)) - -#define IS_TIM_IC_FILTER(__ICFILTER__) ((__ICFILTER__) <= 0xF) - -#define IS_TIM_DEADTIME(__DEADTIME__) ((__DEADTIME__) <= 0xFF) - -#define IS_TIM_BREAK_SYSTEM(__CONFIG__) (((__CONFIG__) == TIM_BREAK_SYSTEM_ECC) || \ - ((__CONFIG__) == TIM_BREAK_SYSTEM_PVD) || \ - ((__CONFIG__) == TIM_BREAK_SYSTEM_SRAM2_PARITY_ERROR) || \ - ((__CONFIG__) == TIM_BREAK_SYSTEM_LOCKUP)) - -#define TIM_SET_ICPRESCALERVALUE(__HANDLE__, __CHANNEL__, __ICPSC__) \ -(((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 |= (__ICPSC__)) :\ - ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 |= ((__ICPSC__) << 8)) :\ - ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 |= (__ICPSC__)) :\ - ((__HANDLE__)->Instance->CCMR2 |= ((__ICPSC__) << 8))) - -#define TIM_RESET_ICPRESCALERVALUE(__HANDLE__, __CHANNEL__) \ -(((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 &= (uint16_t)~TIM_CCMR1_IC1PSC) :\ - ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 &= (uint16_t)~TIM_CCMR1_IC2PSC) :\ - ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 &= (uint16_t)~TIM_CCMR2_IC3PSC) :\ - ((__HANDLE__)->Instance->CCMR2 &= (uint16_t)~TIM_CCMR2_IC4PSC)) - -#define TIM_SET_CAPTUREPOLARITY(__HANDLE__, __CHANNEL__, __POLARITY__) \ -(((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCER |= (__POLARITY__)) :\ - ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCER |= ((__POLARITY__) << 4)) :\ - ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCER |= ((__POLARITY__) << 8)) :\ - ((__HANDLE__)->Instance->CCER |= (((__POLARITY__) << 12)))) - -#define TIM_RESET_CAPTUREPOLARITY(__HANDLE__, __CHANNEL__) \ -(((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCER &= (uint16_t)~(TIM_CCER_CC1P | TIM_CCER_CC1NP)) :\ - ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCER &= (uint16_t)~(TIM_CCER_CC2P | TIM_CCER_CC2NP)) :\ - ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCER &= (uint16_t)~(TIM_CCER_CC3P | TIM_CCER_CC3NP)) :\ - ((__HANDLE__)->Instance->CCER &= (uint16_t)~(TIM_CCER_CC4P | TIM_CCER_CC4NP))) - -/** - * @} - */ -/* End of private macros -----------------------------------------------------*/ - -/* Include TIM HAL Extended module */ -#include "stm32l4xx_hal_tim_ex.h" - -/* Exported functions --------------------------------------------------------*/ -/** @addtogroup TIM_Exported_Functions TIM Exported Functions - * @{ - */ - -/** @addtogroup TIM_Exported_Functions_Group1 Time Base functions - * @brief Time Base functions - * @{ - */ -/* Time Base functions ********************************************************/ -HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim); -HAL_StatusTypeDef HAL_TIM_Base_DeInit(TIM_HandleTypeDef *htim); -void HAL_TIM_Base_MspInit(TIM_HandleTypeDef *htim); -void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef *htim); -/* Blocking mode: Polling */ -HAL_StatusTypeDef HAL_TIM_Base_Start(TIM_HandleTypeDef *htim); -HAL_StatusTypeDef HAL_TIM_Base_Stop(TIM_HandleTypeDef *htim); -/* Non-Blocking mode: Interrupt */ -HAL_StatusTypeDef HAL_TIM_Base_Start_IT(TIM_HandleTypeDef *htim); -HAL_StatusTypeDef HAL_TIM_Base_Stop_IT(TIM_HandleTypeDef *htim); -/* Non-Blocking mode: DMA */ -HAL_StatusTypeDef HAL_TIM_Base_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length); -HAL_StatusTypeDef HAL_TIM_Base_Stop_DMA(TIM_HandleTypeDef *htim); -/** - * @} - */ - -/** @addtogroup TIM_Exported_Functions_Group2 Time Output Compare functions - * @brief Time Output Compare functions - * @{ - */ -/* Timer Output Compare functions *********************************************/ -HAL_StatusTypeDef HAL_TIM_OC_Init(TIM_HandleTypeDef *htim); -HAL_StatusTypeDef HAL_TIM_OC_DeInit(TIM_HandleTypeDef *htim); -void HAL_TIM_OC_MspInit(TIM_HandleTypeDef *htim); -void HAL_TIM_OC_MspDeInit(TIM_HandleTypeDef *htim); -/* Blocking mode: Polling */ -HAL_StatusTypeDef HAL_TIM_OC_Start(TIM_HandleTypeDef *htim, uint32_t Channel); -HAL_StatusTypeDef HAL_TIM_OC_Stop(TIM_HandleTypeDef *htim, uint32_t Channel); -/* Non-Blocking mode: Interrupt */ -HAL_StatusTypeDef HAL_TIM_OC_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel); -HAL_StatusTypeDef HAL_TIM_OC_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel); -/* Non-Blocking mode: DMA */ -HAL_StatusTypeDef HAL_TIM_OC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length); -HAL_StatusTypeDef HAL_TIM_OC_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel); -/** - * @} - */ - -/** @addtogroup TIM_Exported_Functions_Group3 Time PWM functions - * @brief Time PWM functions - * @{ - */ -/* Timer PWM functions ********************************************************/ -HAL_StatusTypeDef HAL_TIM_PWM_Init(TIM_HandleTypeDef *htim); -HAL_StatusTypeDef HAL_TIM_PWM_DeInit(TIM_HandleTypeDef *htim); -void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef *htim); -void HAL_TIM_PWM_MspDeInit(TIM_HandleTypeDef *htim); -/* Blocking mode: Polling */ -HAL_StatusTypeDef HAL_TIM_PWM_Start(TIM_HandleTypeDef *htim, uint32_t Channel); -HAL_StatusTypeDef HAL_TIM_PWM_Stop(TIM_HandleTypeDef *htim, uint32_t Channel); -/* Non-Blocking mode: Interrupt */ -HAL_StatusTypeDef HAL_TIM_PWM_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel); -HAL_StatusTypeDef HAL_TIM_PWM_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel); -/* Non-Blocking mode: DMA */ -HAL_StatusTypeDef HAL_TIM_PWM_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length); -HAL_StatusTypeDef HAL_TIM_PWM_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel); -/** - * @} - */ - -/** @addtogroup TIM_Exported_Functions_Group4 Time Input Capture functions - * @brief Time Input Capture functions - * @{ - */ -/* Timer Input Capture functions **********************************************/ -HAL_StatusTypeDef HAL_TIM_IC_Init(TIM_HandleTypeDef *htim); -HAL_StatusTypeDef HAL_TIM_IC_DeInit(TIM_HandleTypeDef *htim); -void HAL_TIM_IC_MspInit(TIM_HandleTypeDef *htim); -void HAL_TIM_IC_MspDeInit(TIM_HandleTypeDef *htim); -/* Blocking mode: Polling */ -HAL_StatusTypeDef HAL_TIM_IC_Start(TIM_HandleTypeDef *htim, uint32_t Channel); -HAL_StatusTypeDef HAL_TIM_IC_Stop(TIM_HandleTypeDef *htim, uint32_t Channel); -/* Non-Blocking mode: Interrupt */ -HAL_StatusTypeDef HAL_TIM_IC_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel); -HAL_StatusTypeDef HAL_TIM_IC_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel); -/* Non-Blocking mode: DMA */ -HAL_StatusTypeDef HAL_TIM_IC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length); -HAL_StatusTypeDef HAL_TIM_IC_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel); -/** - * @} - */ - -/** @addtogroup TIM_Exported_Functions_Group5 Time One Pulse functions - * @brief Time One Pulse functions - * @{ - */ -/* Timer One Pulse functions **************************************************/ -HAL_StatusTypeDef HAL_TIM_OnePulse_Init(TIM_HandleTypeDef *htim, uint32_t OnePulseMode); -HAL_StatusTypeDef HAL_TIM_OnePulse_DeInit(TIM_HandleTypeDef *htim); -void HAL_TIM_OnePulse_MspInit(TIM_HandleTypeDef *htim); -void HAL_TIM_OnePulse_MspDeInit(TIM_HandleTypeDef *htim); -/* Blocking mode: Polling */ -HAL_StatusTypeDef HAL_TIM_OnePulse_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel); -HAL_StatusTypeDef HAL_TIM_OnePulse_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel); -/* Non-Blocking mode: Interrupt */ -HAL_StatusTypeDef HAL_TIM_OnePulse_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel); -HAL_StatusTypeDef HAL_TIM_OnePulse_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel); -/** - * @} - */ - -/** @addtogroup TIM_Exported_Functions_Group6 Time Encoder functions - * @brief Time Encoder functions - * @{ - */ -/* Timer Encoder functions ****************************************************/ -HAL_StatusTypeDef HAL_TIM_Encoder_Init(TIM_HandleTypeDef *htim, TIM_Encoder_InitTypeDef* sConfig); -HAL_StatusTypeDef HAL_TIM_Encoder_DeInit(TIM_HandleTypeDef *htim); -void HAL_TIM_Encoder_MspInit(TIM_HandleTypeDef *htim); -void HAL_TIM_Encoder_MspDeInit(TIM_HandleTypeDef *htim); - /* Blocking mode: Polling */ -HAL_StatusTypeDef HAL_TIM_Encoder_Start(TIM_HandleTypeDef *htim, uint32_t Channel); -HAL_StatusTypeDef HAL_TIM_Encoder_Stop(TIM_HandleTypeDef *htim, uint32_t Channel); -/* Non-Blocking mode: Interrupt */ -HAL_StatusTypeDef HAL_TIM_Encoder_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel); -HAL_StatusTypeDef HAL_TIM_Encoder_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel); -/* Non-Blocking mode: DMA */ -HAL_StatusTypeDef HAL_TIM_Encoder_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData1, uint32_t *pData2, uint16_t Length); -HAL_StatusTypeDef HAL_TIM_Encoder_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel); -/** - * @} - */ - -/** @addtogroup TIM_Exported_Functions_Group7 TIM IRQ handler management - * @brief IRQ handler management - * @{ - */ -/* Interrupt Handler functions ***********************************************/ -void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim); -/** - * @} - */ - -/** @defgroup TIM_Exported_Functions_Group8 Peripheral Control functions - * @brief Peripheral Control functions - * @{ - */ -/* Control functions *********************************************************/ -HAL_StatusTypeDef HAL_TIM_OC_ConfigChannel(TIM_HandleTypeDef *htim, TIM_OC_InitTypeDef* sConfig, uint32_t Channel); -HAL_StatusTypeDef HAL_TIM_PWM_ConfigChannel(TIM_HandleTypeDef *htim, TIM_OC_InitTypeDef* sConfig, uint32_t Channel); -HAL_StatusTypeDef HAL_TIM_IC_ConfigChannel(TIM_HandleTypeDef *htim, TIM_IC_InitTypeDef* sConfig, uint32_t Channel); -HAL_StatusTypeDef HAL_TIM_OnePulse_ConfigChannel(TIM_HandleTypeDef *htim, TIM_OnePulse_InitTypeDef* sConfig, uint32_t OutputChannel, uint32_t InputChannel); -HAL_StatusTypeDef HAL_TIM_ConfigOCrefClear(TIM_HandleTypeDef *htim, TIM_ClearInputConfigTypeDef * sClearInputConfig, uint32_t Channel); -HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef *htim, TIM_ClockConfigTypeDef * sClockSourceConfig); -HAL_StatusTypeDef HAL_TIM_ConfigTI1Input(TIM_HandleTypeDef *htim, uint32_t TI1_Selection); -HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchronization(TIM_HandleTypeDef *htim, TIM_SlaveConfigTypeDef * sSlaveConfig); -HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchronization_IT(TIM_HandleTypeDef *htim, TIM_SlaveConfigTypeDef * sSlaveConfig); -HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress, uint32_t BurstRequestSrc, \ - uint32_t *BurstBuffer, uint32_t BurstLength); -HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStop(TIM_HandleTypeDef *htim, uint32_t BurstRequestSrc); -HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress, uint32_t BurstRequestSrc, \ - uint32_t *BurstBuffer, uint32_t BurstLength); -HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStop(TIM_HandleTypeDef *htim, uint32_t BurstRequestSrc); -HAL_StatusTypeDef HAL_TIM_GenerateEvent(TIM_HandleTypeDef *htim, uint32_t EventSource); -uint32_t HAL_TIM_ReadCapturedValue(TIM_HandleTypeDef *htim, uint32_t Channel); -/** - * @} - */ - -/** @defgroup TIM_Exported_Functions_Group9 TIM Callbacks functions - * @brief TIM Callbacks functions - * @{ - */ -/* Callback in non blocking modes (Interrupt and DMA) *************************/ -void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim); -void HAL_TIM_OC_DelayElapsedCallback(TIM_HandleTypeDef *htim); -void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *htim); -void HAL_TIM_PWM_PulseFinishedCallback(TIM_HandleTypeDef *htim); -void HAL_TIM_TriggerCallback(TIM_HandleTypeDef *htim); -void HAL_TIM_ErrorCallback(TIM_HandleTypeDef *htim); -/** - * @} - */ - -/** @defgroup TIM_Exported_Functions_Group10 Peripheral State functions - * @brief Peripheral State functions - * @{ - */ -/* Peripheral State functions ************************************************/ -HAL_TIM_StateTypeDef HAL_TIM_Base_GetState(TIM_HandleTypeDef *htim); -HAL_TIM_StateTypeDef HAL_TIM_OC_GetState(TIM_HandleTypeDef *htim); -HAL_TIM_StateTypeDef HAL_TIM_PWM_GetState(TIM_HandleTypeDef *htim); -HAL_TIM_StateTypeDef HAL_TIM_IC_GetState(TIM_HandleTypeDef *htim); -HAL_TIM_StateTypeDef HAL_TIM_OnePulse_GetState(TIM_HandleTypeDef *htim); -HAL_TIM_StateTypeDef HAL_TIM_Encoder_GetState(TIM_HandleTypeDef *htim); -/** - * @} - */ - -/** - * @} - */ -/* End of exported functions -------------------------------------------------*/ - -/* Private functions----------------------------------------------------------*/ -/** @defgroup TIM_Private_Functions TIM Private Functions -* @{ -*/ -void TIM_Base_SetConfig(TIM_TypeDef *TIMx, TIM_Base_InitTypeDef *Structure); -void TIM_TI1_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection, uint32_t TIM_ICFilter); -void TIM_OC1_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config); -void TIM_OC2_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config); -void TIM_OC3_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config); -void TIM_OC4_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config); -void TIM_ETR_SetConfig(TIM_TypeDef* TIMx, uint32_t TIM_ExtTRGPrescaler, - uint32_t TIM_ExtTRGPolarity, uint32_t ExtTRGFilter); - -void TIM_DMADelayPulseCplt(DMA_HandleTypeDef *hdma); -void TIM_DMAError(DMA_HandleTypeDef *hdma); -void TIM_DMACaptureCplt(DMA_HandleTypeDef *hdma); -void TIM_CCxChannelCmd(TIM_TypeDef* TIMx, uint32_t Channel, uint32_t ChannelState); -/** -* @} -*/ -/* End of private functions --------------------------------------------------*/ - -/** - * @} - */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32L4xx_HAL_TIM_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ -
--- a/Inc/stm32l4xx_hal_tim_ex.h Thu Nov 12 20:49:49 2015 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,397 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_tim_ex.h - * @author MCD Application Team - * @version V1.1.0 - * @date 16-September-2015 - * @brief Header file of TIM HAL Extended module. - ****************************************************************************** - * @attention - * - * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_TIM_EX_H -#define __STM32L4xx_HAL_TIM_EX_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal_def.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @addtogroup TIMEx - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ -/** @defgroup TIMEx_Exported_Types TIM Extended Exported Types - * @{ - */ - -/** - * @brief TIM Hall sensor Configuration Structure definition - */ - -typedef struct -{ - - uint32_t IC1Polarity; /*!< Specifies the active edge of the input signal. - This parameter can be a value of @ref TIM_Input_Capture_Polarity */ - - uint32_t IC1Prescaler; /*!< Specifies the Input Capture Prescaler. - This parameter can be a value of @ref TIM_Input_Capture_Prescaler */ - - uint32_t IC1Filter; /*!< Specifies the input capture filter. - This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */ - - uint32_t Commutation_Delay; /*!< Specifies the pulse value to be loaded into the Capture Compare Register. - This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */ -} TIM_HallSensor_InitTypeDef; - -/** - * @brief TIM Break/Break2 input configuration - */ -typedef struct { - uint32_t Source; /*!< Specifies the source of the timer break input. - This parameter can be a value of @ref TIMEx_Break_Input_Source */ - uint32_t Enable; /*!< Specifies whether or not the break input source is enabled. - This parameter can be a value of @ref TIMEx_Break_Input_Source_Enable */ - uint32_t Polarity; /*!< Specifies the break input source polarity. - This parameter can be a value of @ref TIMEx_Break_Input_Source_Polarity - Not relevant when analog watchdog output of the DFSDM used as break input source */ -} TIMEx_BreakInputConfigTypeDef; - -/** - * @} - */ -/* End of exported types -----------------------------------------------------*/ - -/* Exported constants --------------------------------------------------------*/ -/** @defgroup TIMEx_Exported_Constants TIM Extended Exported Constants - * @{ - */ - -/** @defgroup TIMEx_Remap TIM Extended Remapping - * @{ - */ -#define TIM_TIM1_ETR_ADC1_NONE ((uint32_t)(0x00000000)) /* !< TIM1_ETR is not connected to any AWD (analog watchdog)*/ -#define TIM_TIM1_ETR_ADC1_AWD1 (TIM1_OR1_ETR_ADC1_RMP_0) /* !< TIM1_ETR is connected to ADC1 AWD1 */ -#define TIM_TIM1_ETR_ADC1_AWD2 (TIM1_OR1_ETR_ADC1_RMP_1) /* !< TIM1_ETR is connected to ADC1 AWD2 */ -#define TIM_TIM1_ETR_ADC1_AWD3 (TIM1_OR1_ETR_ADC1_RMP_1 | TIM1_OR1_ETR_ADC1_RMP_0) /* !< TIM1_ETR is connected to ADC1 AWD3 */ -#define TIM_TIM1_ETR_ADC3_NONE ((uint32_t)(0x00000000)) /* !< TIM1_ETR is not connected to any AWD (analog watchdog)*/ -#define TIM_TIM1_ETR_ADC3_AWD1 (TIM1_OR1_ETR_ADC3_RMP_0) /* !< TIM1_ETR is connected to ADC3 AWD1 */ -#define TIM_TIM1_ETR_ADC3_AWD2 (TIM1_OR1_ETR_ADC3_RMP_1) /* !< TIM1_ETR is connected to ADC3 AWD2 */ -#define TIM_TIM1_ETR_ADC3_AWD3 (TIM1_OR1_ETR_ADC3_RMP_1 | TIM1_OR1_ETR_ADC3_RMP_0) /* !< TIM1_ETR is connected to ADC3 AWD3 */ -#define TIM_TIM1_TI1_GPIO ((uint32_t)(0x00000000)) /* !< TIM1 TI1 is connected to GPIO */ -#define TIM_TIM1_TI1_COMP1 (TIM1_OR1_TI1_RMP) /* !< TIM1 TI1 is connected to COMP1 */ -#define TIM_TIM1_ETR_COMP1 (TIM1_OR2_ETRSEL_0) /* !< TIM1_ETR is connected to COMP1 output */ -#define TIM_TIM1_ETR_COMP2 (TIM1_OR2_ETRSEL_1) /* !< TIM1_ETR is connected to COMP2 output */ -#define TIM_TIM2_ITR1_TIM8_TRGO ((uint32_t)(0x00000000)) /* !< TIM2_ITR1 is connected to TIM8_TRGO */ -#define TIM_TIM2_ITR1_OTG_FS_SOF (TIM2_OR1_ITR1_RMP) /* !< TIM2_ITR1 is connected to OTG_FS SOF */ -#define TIM_TIM2_ETR_GPIO ((uint32_t)(0x00000000)) /* !< TIM2_ETR is connected to GPIO */ -#define TIM_TIM2_ETR_LSE (TIM2_OR1_ETR1_RMP) /* !< TIM2_ETR is connected to LSE */ -#define TIM_TIM2_ETR_COMP1 (TIM2_OR2_ETRSEL_0) /* !< TIM2_ETR is connected to COMP1 output */ -#define TIM_TIM2_ETR_COMP2 (TIM2_OR2_ETRSEL_1) /* !< TIM2_ETR is connected to COMP2 output */ -#define TIM_TIM2_TI4_GPIO ((uint32_t)(0x00000000)) /* !< TIM2 TI4 is connected to GPIO */ -#define TIM_TIM2_TI4_COMP1 (TIM2_OR1_TI4_RMP_0) /* !< TIM2 TI4 is connected to COMP1 output */ -#define TIM_TIM2_TI4_COMP2 (TIM2_OR1_TI4_RMP_1) /* !< TIM2 TI4 is connected to COMP2 output */ -#define TIM_TIM2_TI4_COMP1_COMP2 (TIM2_OR1_TI4_RMP_1| TIM2_OR1_TI4_RMP_0) /* !< TIM2 TI4 is connected to logical OR between COMP1 and COMP2 output2 */ -#define TIM_TIM3_TI1_GPIO ((uint32_t)(0x00000000)) /* !< TIM3 TI1 is connected to GPIO */ -#define TIM_TIM3_TI1_COMP1 (TIM3_OR1_TI1_RMP_0) /* !< TIM3 TI1 is connected to COMP1 output */ -#define TIM_TIM3_TI1_COMP2 (TIM3_OR1_TI1_RMP_1) /* !< TIM3 TI1 is connected to COMP2 output */ -#define TIM_TIM3_TI1_COMP1_COMP2 (TIM3_OR1_TI1_RMP_1 | TIM3_OR1_TI1_RMP_0) /* !< TIM3 TI1 is connected to logical OR between COMP1 and COMP2 output2 */ -#define TIM_TIM3_ETR_GPIO ((uint32_t)(0x00000000)) /* !< TIM3_ETR is connected to GPIO */ -#define TIM_TIM3_ETR_COMP1 (TIM3_OR2_ETRSEL_0) /* !< TIM3_ETR is connected to COMP1 output */ -#define TIM_TIM8_ETR_ADC2_NONE ((uint32_t)(0x00000000)) /* !< TIM8_ETR is not connected to any AWD (analog watchdog)*/ -#define TIM_TIM8_ETR_ADC2_AWD1 (TIM8_OR1_ETR_ADC2_RMP_0) /* !< TIM8_ETR is connected to ADC2 AWD1 */ -#define TIM_TIM8_ETR_ADC2_AWD2 (TIM8_OR1_ETR_ADC2_RMP_1) /* !< TIM8_ETR is connected to ADC2 AWD2 */ -#define TIM_TIM8_ETR_ADC2_AWD3 (TIM8_OR1_ETR_ADC2_RMP_1 | TIM8_OR1_ETR_ADC2_RMP_0) /* !< TIM8_ETR is connected to ADC2 AWD3 */ -#define TIM_TIM8_ETR_ADC3_NONE ((uint32_t)(0x00000000)) /* !< TIM8_ETR is not connected to any AWD (analog watchdog)*/ -#define TIM_TIM8_ETR_ADC3_AWD1 (TIM8_OR1_ETR_ADC3_RMP_0) /* !< TIM8_ETR is connected to ADC3 AWD1 */ -#define TIM_TIM8_ETR_ADC3_AWD2 (TIM8_OR1_ETR_ADC3_RMP_1) /* !< TIM8_ETR is connected to ADC3 AWD2 */ -#define TIM_TIM8_ETR_ADC3_AWD3 (TIM8_OR1_ETR_ADC3_RMP_1 | TIM8_OR1_ETR_ADC3_RMP_0) /* !< TIM8_ETR is connected to ADC3 AWD3 */ -#define TIM_TIM8_TI1_GPIO ((uint32_t)(0x00000000)) /* !< TIM8 TI1 is connected to GPIO */ -#define TIM_TIM8_TI1_COMP2 (TIM8_OR1_TI1_RMP) /* !< TIM8 TI1 is connected to COMP1 */ -#define TIM_TIM8_ETR_COMP1 (TIM8_OR2_ETRSEL_0) /* !< TIM8_ETR is connected to COMP1 output */ -#define TIM_TIM8_ETR_COMP2 (TIM8_OR2_ETRSEL_1) /* !< TIM8_ETR is connected to COMP2 output */ -#define TIM_TIM15_TI1_GPIO ((uint32_t)(0x00000000)) /* !< TIM15 TI1 is connected to GPIO */ -#define TIM_TIM15_TI1_LSE (TIM15_OR1_TI1_RMP) /* !< TIM15 TI1 is connected to LSE */ -#define TIM_TIM15_ENCODERMODE_NONE ((uint32_t)(0x00000000)) /* !< No redirection */ -#define TIM_TIM15_ENCODERMODE_TIM2 (TIM15_OR1_ENCODER_MODE_0) /* !< TIM2 IC1 and TIM2 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively */ -#define TIM_TIM15_ENCODERMODE_TIM3 (TIM15_OR1_ENCODER_MODE_1) /* !< TIM3 IC1 and TIM3 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively */ -#define TIM_TIM15_ENCODERMODE_TIM4 (TIM15_OR1_ENCODER_MODE_1 | TIM15_OR1_ENCODER_MODE_0) /* !< TIM4 IC1 and TIM4 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively */ -#define TIM_TIM16_TI1_GPIO ((uint32_t)(0x00000000)) /* !< TIM16 TI1 is connected to GPIO */ -#define TIM_TIM16_TI1_LSI (TIM16_OR1_TI1_RMP_0) /* !< TIM16 TI1 is connected to LSI */ -#define TIM_TIM16_TI1_LSE (TIM16_OR1_TI1_RMP_1) /* !< TIM16 TI1 is connected to LSE */ -#define TIM_TIM16_TI1_RTC (TIM16_OR1_TI1_RMP_1 | TIM16_OR1_TI1_RMP_0) /* !< TIM16 TI1 is connected to RTC wakeup interrupt */ -#define TIM_TIM17_TI1_GPIO ((uint32_t)(0x00000000)) /* !< TIM17 TI1 is connected to GPIO */ -#define TIM_TIM17_TI1_MSI (TIM17_OR1_TI1_RMP_0) /* !< TIM17 TI1 is connected to MSI */ -#define TIM_TIM17_TI1_HSE_32 (TIM17_OR1_TI1_RMP_1) /* !< TIM17 TI1 is connected to HSE div 32 */ -#define TIM_TIM17_TI1_MCO (TIM17_OR1_TI1_RMP_1 | TIM17_OR1_TI1_RMP_0) /* !< TIM17 TI1 is connected to MCO */ -/** - * @} - */ - -/** @defgroup TIMEx_Break_Input TIM Extended Break input - * @{ - */ -#define TIM_BREAKINPUT_BRK ((uint32_t)(0x00000001)) /* !< Timer break input */ -#define TIM_BREAKINPUT_BRK2 ((uint32_t)(0x00000002)) /* !< Timer break2 input */ -/** - * @} - */ - -/** @defgroup TIMEx_Break_Input_Source TIM Extended Break input source - * @{ - */ -#define TIM_BREAKINPUTSOURCE_BKIN ((uint32_t)(0x00000001)) /* !< An external source (GPIO) is connected to the BKIN pin */ -#define TIM_BREAKINPUTSOURCE_COMP1 ((uint32_t)(0x00000002)) /* !< The COMP1 output is connected to the break input */ -#define TIM_BREAKINPUTSOURCE_COMP2 ((uint32_t)(0x00000004)) /* !< The COMP2 output is connected to the break input */ -#define TIM_BREAKINPUTSOURCE_DFSDM ((uint32_t)(0x00000008)) /* !< The analog watchdog output of the DFSDM peripheral is connected to the break input */ -/** - * @} - */ - -/** @defgroup TIMEx_Break_Input_Source_Enable TIM Extended Break input source enabling - * @{ - */ -#define TIM_BREAKINPUTSOURCE_DISABLE ((uint32_t)(0x00000000)) /* !< Break input source is disabled */ -#define TIM_BREAKINPUTSOURCE_ENABLE ((uint32_t)(0x00000001)) /* !< Break input source is enabled */ -/** - * @} - */ - -/** @defgroup TIMEx_Break_Input_Source_Polarity TIM Extended Break input polarity - * @{ - */ -#define TIM_BREAKINPUTSOURCE_POLARITY_LOW ((uint32_t)(0x00000001)) /* !< Break input source is active low */ -#define TIM_BREAKINPUTSOURCE_POLARITY_HIGH ((uint32_t)(0x00000000)) /* !< Break input source is active_high */ -/** - * @} - */ - -/** - * @} - */ -/* End of exported constants -------------------------------------------------*/ - -/* Exported macro ------------------------------------------------------------*/ -/** @defgroup TIMEx_Exported_Macros TIM Extended Exported Macros - * @{ - */ - -/** - * @} - */ -/* End of exported macro -----------------------------------------------------*/ - -/* Private macro -------------------------------------------------------------*/ -/** @defgroup TIMEx_Private_Macros TIM Extended Private Macros - * @{ - */ -#define IS_TIM_REMAP(__REMAP__) (((__REMAP__) <= (uint32_t)0x0001C01F)) - -#define IS_TIM_BREAKINPUT(__BREAKINPUT__) (((__BREAKINPUT__) == TIM_BREAKINPUT_BRK) || \ - ((__BREAKINPUT__) == TIM_BREAKINPUT_BRK2)) - -#define IS_TIM_BREAKINPUTSOURCE(__SOURCE__) (((__SOURCE__) == TIM_BREAKINPUTSOURCE_BKIN) || \ - ((__SOURCE__) == TIM_BREAKINPUTSOURCE_COMP1) || \ - ((__SOURCE__) == TIM_BREAKINPUTSOURCE_COMP2) || \ - ((__SOURCE__) == TIM_BREAKINPUTSOURCE_DFSDM)) - -#define IS_TIM_BREAKINPUTSOURCE_STATE(__STATE__) (((__STATE__) == TIM_BREAKINPUTSOURCE_DISABLE) || \ - ((__STATE__) == TIM_BREAKINPUTSOURCE_ENABLE)) - -#define IS_TIM_BREAKINPUTSOURCE_POLARITY(__POLARITY__) (((__POLARITY__) == TIM_BREAKINPUTSOURCE_POLARITY_LOW) || \ - ((__POLARITY__) == TIM_BREAKINPUTSOURCE_POLARITY_HIGH)) -/** - * @} - */ -/* End of private macro ------------------------------------------------------*/ - -/* Exported functions --------------------------------------------------------*/ -/** @addtogroup TIMEx_Exported_Functions TIM Extended Exported Functions - * @{ - */ - -/** @addtogroup TIMEx_Exported_Functions_Group1 Extended Timer Hall Sensor functions - * @brief Timer Hall Sensor functions - * @{ - */ -/* Timer Hall Sensor functions **********************************************/ -HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, TIM_HallSensor_InitTypeDef* sConfig); -HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim); - -void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim); -void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim); - - /* Blocking mode: Polling */ -HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim); -HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim); -/* Non-Blocking mode: Interrupt */ -HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim); -HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim); -/* Non-Blocking mode: DMA */ -HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length); -HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim); -/** - * @} - */ - -/** @addtogroup TIMEx_Exported_Functions_Group2 Extended Timer Complementary Output Compare functions - * @brief Timer Complementary Output Compare functions - * @{ - */ -/* Timer Complementary Output Compare functions *****************************/ -/* Blocking mode: Polling */ -HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel); -HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel); - -/* Non-Blocking mode: Interrupt */ -HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel); -HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel); - -/* Non-Blocking mode: DMA */ -HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length); -HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel); -/** - * @} - */ - -/** @addtogroup TIMEx_Exported_Functions_Group3 Extended Timer Complementary PWM functions - * @brief Timer Complementary PWM functions - * @{ - */ -/* Timer Complementary PWM functions ****************************************/ -/* Blocking mode: Polling */ -HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel); -HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel); - -/* Non-Blocking mode: Interrupt */ -HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel); -HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel); -/* Non-Blocking mode: DMA */ -HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length); -HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel); -/** - * @} - */ - -/** @addtogroup TIMEx_Exported_Functions_Group4 Extended Timer Complementary One Pulse functions - * @brief Timer Complementary One Pulse functions - * @{ - */ -/* Timer Complementary One Pulse functions **********************************/ -/* Blocking mode: Polling */ -HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel); -HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel); - -/* Non-Blocking mode: Interrupt */ -HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel); -HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel); -/** - * @} - */ - -/** @addtogroup TIMEx_Exported_Functions_Group5 Extended Peripheral Control functions - * @brief Peripheral Control functions - * @{ - */ -/* Extended Control functions ************************************************/ -HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource); -HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_IT(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource); -HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_DMA(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource); -HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, TIM_MasterConfigTypeDef * sMasterConfig); -HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim, TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig); -HAL_StatusTypeDef HAL_TIMEx_ConfigBreakInput(TIM_HandleTypeDef *htim, uint32_t BreakInput, TIMEx_BreakInputConfigTypeDef *sBreakInputConfig); -HAL_StatusTypeDef HAL_TIMEx_GroupChannel5(TIM_HandleTypeDef *htim, uint32_t Channels); -HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap); - -/** - * @} - */ - -/** @addtogroup TIMEx_Exported_Functions_Group6 Extended Callbacks functions - * @brief Extended Callbacks functions - * @{ - */ -/* Extended Callback **********************************************************/ -void HAL_TIMEx_CommutationCallback(TIM_HandleTypeDef *htim); -void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim); -/** - * @} - */ - -/** @addtogroup TIMEx_Exported_Functions_Group7 Extended Peripheral State functions - * @brief Extended Peripheral State functions - * @{ - */ -/* Extended Peripheral State functions ***************************************/ -HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef *htim); -/** - * @} - */ - -/** - * @} - */ -/* End of exported functions -------------------------------------------------*/ - -/* Private functions----------------------------------------------------------*/ -/** @defgroup TIMEx_Private_Functions TIMEx Private Functions -* @{ -*/ -void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma); -/** -* @} -*/ -/* End of private functions --------------------------------------------------*/ - -/** - * @} - */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - - -#endif /* __STM32L4xx_HAL_TIM_EX_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ -
--- a/Inc/stm32l4xx_hal_tsc.h Thu Nov 12 20:49:49 2015 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,727 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_tsc.h - * @author MCD Application Team - * @version V1.1.0 - * @date 16-September-2015 - * @brief Header file of TSC HAL module. - ****************************************************************************** - * @attention - * - * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_TSC_H -#define __STM32L4xx_HAL_TSC_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal_def.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @addtogroup TSC - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ -/** @defgroup TSC_Exported_Types TSC Exported Types - * @{ - */ - -/** - * @brief TSC state structure definition - */ -typedef enum -{ - HAL_TSC_STATE_RESET = 0x00, /*!< TSC registers have their reset value */ - HAL_TSC_STATE_READY = 0x01, /*!< TSC registers are initialized or acquisition is completed with success */ - HAL_TSC_STATE_BUSY = 0x02, /*!< TSC initialization or acquisition is on-going */ - HAL_TSC_STATE_ERROR = 0x03 /*!< Acquisition is completed with max count error */ -} HAL_TSC_StateTypeDef; - -/** - * @brief TSC group status structure definition - */ -typedef enum -{ - TSC_GROUP_ONGOING = 0x00, /*!< Acquisition on group is on-going or not started */ - TSC_GROUP_COMPLETED = 0x01 /*!< Acquisition on group is completed with success (no max count error) */ -} TSC_GroupStatusTypeDef; - -/** - * @brief TSC init structure definition - */ -typedef struct -{ - uint32_t CTPulseHighLength; /*!< Charge-transfer high pulse length - This parameter can be a value of @ref TSC_CTPulseHL_Config */ - uint32_t CTPulseLowLength; /*!< Charge-transfer low pulse length - This parameter can be a value of @ref TSC_CTPulseLL_Config */ - uint32_t SpreadSpectrum; /*!< Spread spectrum activation - This parameter can be a value of @ref TSC_CTPulseLL_Config */ - uint32_t SpreadSpectrumDeviation; /*!< Spread spectrum deviation - This parameter must be a number between Min_Data = 0 and Max_Data = 127 */ - uint32_t SpreadSpectrumPrescaler; /*!< Spread spectrum prescaler - This parameter can be a value of @ref TSC_SpreadSpec_Prescaler */ - uint32_t PulseGeneratorPrescaler; /*!< Pulse generator prescaler - This parameter can be a value of @ref TSC_PulseGenerator_Prescaler */ - uint32_t MaxCountValue; /*!< Max count value - This parameter can be a value of @ref TSC_MaxCount_Value */ - uint32_t IODefaultMode; /*!< IO default mode - This parameter can be a value of @ref TSC_IO_Default_Mode */ - uint32_t SynchroPinPolarity; /*!< Synchro pin polarity - This parameter can be a value of @ref TSC_Synchro_Pin_Polarity */ - uint32_t AcquisitionMode; /*!< Acquisition mode - This parameter can be a value of @ref TSC_Acquisition_Mode */ - uint32_t MaxCountInterrupt; /*!< Max count interrupt activation - This parameter can be set to ENABLE or DISABLE. */ - uint32_t ChannelIOs; /*!< Channel IOs mask */ - uint32_t ShieldIOs; /*!< Shield IOs mask */ - uint32_t SamplingIOs; /*!< Sampling IOs mask */ -} TSC_InitTypeDef; - -/** - * @brief TSC IOs configuration structure definition - */ -typedef struct -{ - uint32_t ChannelIOs; /*!< Channel IOs mask */ - uint32_t ShieldIOs; /*!< Shield IOs mask */ - uint32_t SamplingIOs; /*!< Sampling IOs mask */ -} TSC_IOConfigTypeDef; - -/** - * @brief TSC handle Structure definition - */ -typedef struct -{ - TSC_TypeDef *Instance; /*!< Register base address */ - TSC_InitTypeDef Init; /*!< Initialization parameters */ - __IO HAL_TSC_StateTypeDef State; /*!< Peripheral state */ - HAL_LockTypeDef Lock; /*!< Lock feature */ -} TSC_HandleTypeDef; - -/** - * @} - */ - -/* Exported constants --------------------------------------------------------*/ -/** @defgroup TSC_Exported_Constants TSC Exported Constants - * @{ - */ - -/** @defgroup TSC_CTPulseHL_Config CTPulse High Length - * @{ - */ -#define TSC_CTPH_1CYCLE ((uint32_t)((uint32_t) 0 << 28)) -#define TSC_CTPH_2CYCLES ((uint32_t)((uint32_t) 1 << 28)) -#define TSC_CTPH_3CYCLES ((uint32_t)((uint32_t) 2 << 28)) -#define TSC_CTPH_4CYCLES ((uint32_t)((uint32_t) 3 << 28)) -#define TSC_CTPH_5CYCLES ((uint32_t)((uint32_t) 4 << 28)) -#define TSC_CTPH_6CYCLES ((uint32_t)((uint32_t) 5 << 28)) -#define TSC_CTPH_7CYCLES ((uint32_t)((uint32_t) 6 << 28)) -#define TSC_CTPH_8CYCLES ((uint32_t)((uint32_t) 7 << 28)) -#define TSC_CTPH_9CYCLES ((uint32_t)((uint32_t) 8 << 28)) -#define TSC_CTPH_10CYCLES ((uint32_t)((uint32_t) 9 << 28)) -#define TSC_CTPH_11CYCLES ((uint32_t)((uint32_t)10 << 28)) -#define TSC_CTPH_12CYCLES ((uint32_t)((uint32_t)11 << 28)) -#define TSC_CTPH_13CYCLES ((uint32_t)((uint32_t)12 << 28)) -#define TSC_CTPH_14CYCLES ((uint32_t)((uint32_t)13 << 28)) -#define TSC_CTPH_15CYCLES ((uint32_t)((uint32_t)14 << 28)) -#define TSC_CTPH_16CYCLES ((uint32_t)((uint32_t)15 << 28)) -/** - * @} - */ - -/** @defgroup TSC_CTPulseLL_Config CTPulse Low Length - * @{ - */ -#define TSC_CTPL_1CYCLE ((uint32_t)((uint32_t) 0 << 24)) -#define TSC_CTPL_2CYCLES ((uint32_t)((uint32_t) 1 << 24)) -#define TSC_CTPL_3CYCLES ((uint32_t)((uint32_t) 2 << 24)) -#define TSC_CTPL_4CYCLES ((uint32_t)((uint32_t) 3 << 24)) -#define TSC_CTPL_5CYCLES ((uint32_t)((uint32_t) 4 << 24)) -#define TSC_CTPL_6CYCLES ((uint32_t)((uint32_t) 5 << 24)) -#define TSC_CTPL_7CYCLES ((uint32_t)((uint32_t) 6 << 24)) -#define TSC_CTPL_8CYCLES ((uint32_t)((uint32_t) 7 << 24)) -#define TSC_CTPL_9CYCLES ((uint32_t)((uint32_t) 8 << 24)) -#define TSC_CTPL_10CYCLES ((uint32_t)((uint32_t) 9 << 24)) -#define TSC_CTPL_11CYCLES ((uint32_t)((uint32_t)10 << 24)) -#define TSC_CTPL_12CYCLES ((uint32_t)((uint32_t)11 << 24)) -#define TSC_CTPL_13CYCLES ((uint32_t)((uint32_t)12 << 24)) -#define TSC_CTPL_14CYCLES ((uint32_t)((uint32_t)13 << 24)) -#define TSC_CTPL_15CYCLES ((uint32_t)((uint32_t)14 << 24)) -#define TSC_CTPL_16CYCLES ((uint32_t)((uint32_t)15 << 24)) -/** - * @} - */ - -/** @defgroup TSC_SpreadSpec_Prescaler Spread Spectrum Prescaler - * @{ - */ -#define TSC_SS_PRESC_DIV1 ((uint32_t)0) -#define TSC_SS_PRESC_DIV2 (TSC_CR_SSPSC) -/** - * @} - */ - -/** @defgroup TSC_PulseGenerator_Prescaler Pulse Generator Prescaler - * @{ - */ -#define TSC_PG_PRESC_DIV1 ((uint32_t)(0 << 12)) -#define TSC_PG_PRESC_DIV2 ((uint32_t)(1 << 12)) -#define TSC_PG_PRESC_DIV4 ((uint32_t)(2 << 12)) -#define TSC_PG_PRESC_DIV8 ((uint32_t)(3 << 12)) -#define TSC_PG_PRESC_DIV16 ((uint32_t)(4 << 12)) -#define TSC_PG_PRESC_DIV32 ((uint32_t)(5 << 12)) -#define TSC_PG_PRESC_DIV64 ((uint32_t)(6 << 12)) -#define TSC_PG_PRESC_DIV128 ((uint32_t)(7 << 12)) -/** - * @} - */ - -/** @defgroup TSC_MaxCount_Value Max Count Value - * @{ - */ -#define TSC_MCV_255 ((uint32_t)(0 << 5)) -#define TSC_MCV_511 ((uint32_t)(1 << 5)) -#define TSC_MCV_1023 ((uint32_t)(2 << 5)) -#define TSC_MCV_2047 ((uint32_t)(3 << 5)) -#define TSC_MCV_4095 ((uint32_t)(4 << 5)) -#define TSC_MCV_8191 ((uint32_t)(5 << 5)) -#define TSC_MCV_16383 ((uint32_t)(6 << 5)) -/** - * @} - */ - -/** @defgroup TSC_IO_Default_Mode IO Default Mode - * @{ - */ -#define TSC_IODEF_OUT_PP_LOW ((uint32_t)0) -#define TSC_IODEF_IN_FLOAT (TSC_CR_IODEF) -/** - * @} - */ - -/** @defgroup TSC_Synchro_Pin_Polarity Synchro Pin Polarity - * @{ - */ -#define TSC_SYNC_POLARITY_FALLING ((uint32_t)0) -#define TSC_SYNC_POLARITY_RISING (TSC_CR_SYNCPOL) -/** - * @} - */ - -/** @defgroup TSC_Acquisition_Mode Acquisition Mode - * @{ - */ -#define TSC_ACQ_MODE_NORMAL ((uint32_t)0) -#define TSC_ACQ_MODE_SYNCHRO (TSC_CR_AM) -/** - * @} - */ - -/** @defgroup TSC_IO_Mode IO Mode - * @{ - */ -#define TSC_IOMODE_UNUSED ((uint32_t)0) -#define TSC_IOMODE_CHANNEL ((uint32_t)1) -#define TSC_IOMODE_SHIELD ((uint32_t)2) -#define TSC_IOMODE_SAMPLING ((uint32_t)3) -/** - * @} - */ - -/** @defgroup TSC_interrupts_definition Interrupts definition - * @{ - */ -#define TSC_IT_EOA ((uint32_t)TSC_IER_EOAIE) -#define TSC_IT_MCE ((uint32_t)TSC_IER_MCEIE) -/** - * @} - */ - -/** @defgroup TSC_flags_definition Flags definition - * @{ - */ -#define TSC_FLAG_EOA ((uint32_t)TSC_ISR_EOAF) -#define TSC_FLAG_MCE ((uint32_t)TSC_ISR_MCEF) -/** - * @} - */ - -/** @defgroup TSC_Group_definition Group definition - * @{ - */ -#define TSC_NB_OF_GROUPS (8) - -#define TSC_GROUP1 ((uint32_t)0x00000001) -#define TSC_GROUP2 ((uint32_t)0x00000002) -#define TSC_GROUP3 ((uint32_t)0x00000004) -#define TSC_GROUP4 ((uint32_t)0x00000008) -#define TSC_GROUP5 ((uint32_t)0x00000010) -#define TSC_GROUP6 ((uint32_t)0x00000020) -#define TSC_GROUP7 ((uint32_t)0x00000040) -#define TSC_GROUP8 ((uint32_t)0x00000080) -#define TSC_ALL_GROUPS ((uint32_t)0x000000FF) - -#define TSC_GROUP1_IDX ((uint32_t)0) -#define TSC_GROUP2_IDX ((uint32_t)1) -#define TSC_GROUP3_IDX ((uint32_t)2) -#define TSC_GROUP4_IDX ((uint32_t)3) -#define TSC_GROUP5_IDX ((uint32_t)4) -#define TSC_GROUP6_IDX ((uint32_t)5) -#define TSC_GROUP7_IDX ((uint32_t)6) -#define TSC_GROUP8_IDX ((uint32_t)7) - -#define TSC_GROUP1_IO1 ((uint32_t)0x00000001) -#define TSC_GROUP1_IO2 ((uint32_t)0x00000002) -#define TSC_GROUP1_IO3 ((uint32_t)0x00000004) -#define TSC_GROUP1_IO4 ((uint32_t)0x00000008) -#define TSC_GROUP1_ALL_IOS ((uint32_t)0x0000000F) - -#define TSC_GROUP2_IO1 ((uint32_t)0x00000010) -#define TSC_GROUP2_IO2 ((uint32_t)0x00000020) -#define TSC_GROUP2_IO3 ((uint32_t)0x00000040) -#define TSC_GROUP2_IO4 ((uint32_t)0x00000080) -#define TSC_GROUP2_ALL_IOS ((uint32_t)0x000000F0) - -#define TSC_GROUP3_IO1 ((uint32_t)0x00000100) -#define TSC_GROUP3_IO2 ((uint32_t)0x00000200) -#define TSC_GROUP3_IO3 ((uint32_t)0x00000400) -#define TSC_GROUP3_IO4 ((uint32_t)0x00000800) -#define TSC_GROUP3_ALL_IOS ((uint32_t)0x00000F00) - -#define TSC_GROUP4_IO1 ((uint32_t)0x00001000) -#define TSC_GROUP4_IO2 ((uint32_t)0x00002000) -#define TSC_GROUP4_IO3 ((uint32_t)0x00004000) -#define TSC_GROUP4_IO4 ((uint32_t)0x00008000) -#define TSC_GROUP4_ALL_IOS ((uint32_t)0x0000F000) - -#define TSC_GROUP5_IO1 ((uint32_t)0x00010000) -#define TSC_GROUP5_IO2 ((uint32_t)0x00020000) -#define TSC_GROUP5_IO3 ((uint32_t)0x00040000) -#define TSC_GROUP5_IO4 ((uint32_t)0x00080000) -#define TSC_GROUP5_ALL_IOS ((uint32_t)0x000F0000) - -#define TSC_GROUP6_IO1 ((uint32_t)0x00100000) -#define TSC_GROUP6_IO2 ((uint32_t)0x00200000) -#define TSC_GROUP6_IO3 ((uint32_t)0x00400000) -#define TSC_GROUP6_IO4 ((uint32_t)0x00800000) -#define TSC_GROUP6_ALL_IOS ((uint32_t)0x00F00000) - -#define TSC_GROUP7_IO1 ((uint32_t)0x01000000) -#define TSC_GROUP7_IO2 ((uint32_t)0x02000000) -#define TSC_GROUP7_IO3 ((uint32_t)0x04000000) -#define TSC_GROUP7_IO4 ((uint32_t)0x08000000) -#define TSC_GROUP7_ALL_IOS ((uint32_t)0x0F000000) - -#define TSC_GROUP8_IO1 ((uint32_t)0x10000000) -#define TSC_GROUP8_IO2 ((uint32_t)0x20000000) -#define TSC_GROUP8_IO3 ((uint32_t)0x40000000) -#define TSC_GROUP8_IO4 ((uint32_t)0x80000000) -#define TSC_GROUP8_ALL_IOS ((uint32_t)0xF0000000) - -#define TSC_ALL_GROUPS_ALL_IOS ((uint32_t)0xFFFFFFFF) -/** - * @} - */ - -/** - * @} - */ - -/* Exported macros -----------------------------------------------------------*/ - -/** @defgroup TSC_Exported_Macros TSC Exported Macros - * @{ - */ - -/** @brief Reset TSC handle state. - * @param __HANDLE__: TSC handle - * @retval None - */ -#define __HAL_TSC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_TSC_STATE_RESET) - -/** - * @brief Enable the TSC peripheral. - * @param __HANDLE__: TSC handle - * @retval None - */ -#define __HAL_TSC_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= TSC_CR_TSCE) - -/** - * @brief Disable the TSC peripheral. - * @param __HANDLE__: TSC handle - * @retval None - */ -#define __HAL_TSC_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= (uint32_t)(~TSC_CR_TSCE)) - -/** - * @brief Start acquisition. - * @param __HANDLE__: TSC handle - * @retval None - */ -#define __HAL_TSC_START_ACQ(__HANDLE__) ((__HANDLE__)->Instance->CR |= TSC_CR_START) - -/** - * @brief Stop acquisition. - * @param __HANDLE__: TSC handle - * @retval None - */ -#define __HAL_TSC_STOP_ACQ(__HANDLE__) ((__HANDLE__)->Instance->CR &= (uint32_t)(~TSC_CR_START)) - -/** - * @brief Set IO default mode to output push-pull low. - * @param __HANDLE__: TSC handle - * @retval None - */ -#define __HAL_TSC_SET_IODEF_OUTPPLOW(__HANDLE__) ((__HANDLE__)->Instance->CR &= (uint32_t)(~TSC_CR_IODEF)) - -/** - * @brief Set IO default mode to input floating. - * @param __HANDLE__: TSC handle - * @retval None - */ -#define __HAL_TSC_SET_IODEF_INFLOAT(__HANDLE__) ((__HANDLE__)->Instance->CR |= TSC_CR_IODEF) - -/** - * @brief Set synchronization polarity to falling edge. - * @param __HANDLE__: TSC handle - * @retval None - */ -#define __HAL_TSC_SET_SYNC_POL_FALL(__HANDLE__) ((__HANDLE__)->Instance->CR &= (uint32_t)(~TSC_CR_SYNCPOL)) - -/** - * @brief Set synchronization polarity to rising edge and high level. - * @param __HANDLE__: TSC handle - * @retval None - */ -#define __HAL_TSC_SET_SYNC_POL_RISE_HIGH(__HANDLE__) ((__HANDLE__)->Instance->CR |= TSC_CR_SYNCPOL) - -/** - * @brief Enable TSC interrupt. - * @param __HANDLE__: TSC handle - * @param __INTERRUPT__: TSC interrupt - * @retval None - */ -#define __HAL_TSC_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER |= (__INTERRUPT__)) - -/** - * @brief Disable TSC interrupt. - * @param __HANDLE__: TSC handle - * @param __INTERRUPT__: TSC interrupt - * @retval None - */ -#define __HAL_TSC_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER &= (uint32_t)(~(__INTERRUPT__))) - -/** @brief Check whether the specified TSC interrupt source is enabled or not. - * @param __HANDLE__: TSC Handle - * @param __INTERRUPT__: TSC interrupt - * @retval SET or RESET - */ -#define __HAL_TSC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IER & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) - -/** - * @brief Check whether the specified TSC flag is set or not. - * @param __HANDLE__: TSC handle - * @param __FLAG__: TSC flag - * @retval SET or RESET - */ -#define __HAL_TSC_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__)) ? SET : RESET) - -/** - * @brief Clear the TSC's pending flag. - * @param __HANDLE__: TSC handle - * @param __FLAG__: TSC flag - * @retval None - */ -#define __HAL_TSC_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__)) - -/** - * @brief Enable schmitt trigger hysteresis on a group of IOs. - * @param __HANDLE__: TSC handle - * @param __GX_IOY_MASK__: IOs mask - * @retval None - */ -#define __HAL_TSC_ENABLE_HYSTERESIS(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOHCR |= (__GX_IOY_MASK__)) - -/** - * @brief Disable schmitt trigger hysteresis on a group of IOs. - * @param __HANDLE__: TSC handle - * @param __GX_IOY_MASK__: IOs mask - * @retval None - */ -#define __HAL_TSC_DISABLE_HYSTERESIS(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOHCR &= (uint32_t)(~(__GX_IOY_MASK__))) - -/** - * @brief Open analog switch on a group of IOs. - * @param __HANDLE__: TSC handle - * @param __GX_IOY_MASK__: IOs mask - * @retval None - */ -#define __HAL_TSC_OPEN_ANALOG_SWITCH(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOASCR &= (uint32_t)(~(__GX_IOY_MASK__))) - -/** - * @brief Close analog switch on a group of IOs. - * @param __HANDLE__: TSC handle - * @param __GX_IOY_MASK__: IOs mask - * @retval None - */ -#define __HAL_TSC_CLOSE_ANALOG_SWITCH(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOASCR |= (__GX_IOY_MASK__)) - -/** - * @brief Enable a group of IOs in channel mode. - * @param __HANDLE__: TSC handle - * @param __GX_IOY_MASK__: IOs mask - * @retval None - */ -#define __HAL_TSC_ENABLE_CHANNEL(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOCCR |= (__GX_IOY_MASK__)) - -/** - * @brief Disable a group of channel IOs. - * @param __HANDLE__: TSC handle - * @param __GX_IOY_MASK__: IOs mask - * @retval None - */ -#define __HAL_TSC_DISABLE_CHANNEL(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOCCR &= (uint32_t)(~(__GX_IOY_MASK__))) - -/** - * @brief Enable a group of IOs in sampling mode. - * @param __HANDLE__: TSC handle - * @param __GX_IOY_MASK__: IOs mask - * @retval None - */ -#define __HAL_TSC_ENABLE_SAMPLING(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOSCR |= (__GX_IOY_MASK__)) - -/** - * @brief Disable a group of sampling IOs. - * @param __HANDLE__: TSC handle - * @param __GX_IOY_MASK__: IOs mask - * @retval None - */ -#define __HAL_TSC_DISABLE_SAMPLING(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOSCR &= (uint32_t)(~(__GX_IOY_MASK__))) - -/** - * @brief Enable acquisition groups. - * @param __HANDLE__: TSC handle - * @param __GX_MASK__: Groups mask - * @retval None - */ -#define __HAL_TSC_ENABLE_GROUP(__HANDLE__, __GX_MASK__) ((__HANDLE__)->Instance->IOGCSR |= (__GX_MASK__)) - -/** - * @brief Disable acquisition groups. - * @param __HANDLE__: TSC handle - * @param __GX_MASK__: Groups mask - * @retval None - */ -#define __HAL_TSC_DISABLE_GROUP(__HANDLE__, __GX_MASK__) ((__HANDLE__)->Instance->IOGCSR &= (uint32_t)(~(__GX_MASK__))) - -/** @brief Gets acquisition group status. - * @param __HANDLE__: TSC Handle - * @param __GX_INDEX__: Group index - * @retval SET or RESET - */ -#define __HAL_TSC_GET_GROUP_STATUS(__HANDLE__, __GX_INDEX__) \ -((((__HANDLE__)->Instance->IOGCSR & (uint32_t)((uint32_t)1 << ((__GX_INDEX__) + (uint32_t)16))) == (uint32_t)((uint32_t)1 << ((__GX_INDEX__) + (uint32_t)16))) ? TSC_GROUP_COMPLETED : TSC_GROUP_ONGOING) - -/** - * @} - */ - -/* Private macros ------------------------------------------------------------*/ - -/** @defgroup TSC_Private_Macros TSC Private Macros - * @{ - */ - -#define IS_TSC_CTPH(VAL) (((VAL) == TSC_CTPH_1CYCLE) || \ - ((VAL) == TSC_CTPH_2CYCLES) || \ - ((VAL) == TSC_CTPH_3CYCLES) || \ - ((VAL) == TSC_CTPH_4CYCLES) || \ - ((VAL) == TSC_CTPH_5CYCLES) || \ - ((VAL) == TSC_CTPH_6CYCLES) || \ - ((VAL) == TSC_CTPH_7CYCLES) || \ - ((VAL) == TSC_CTPH_8CYCLES) || \ - ((VAL) == TSC_CTPH_9CYCLES) || \ - ((VAL) == TSC_CTPH_10CYCLES) || \ - ((VAL) == TSC_CTPH_11CYCLES) || \ - ((VAL) == TSC_CTPH_12CYCLES) || \ - ((VAL) == TSC_CTPH_13CYCLES) || \ - ((VAL) == TSC_CTPH_14CYCLES) || \ - ((VAL) == TSC_CTPH_15CYCLES) || \ - ((VAL) == TSC_CTPH_16CYCLES)) - -#define IS_TSC_CTPL(VAL) (((VAL) == TSC_CTPL_1CYCLE) || \ - ((VAL) == TSC_CTPL_2CYCLES) || \ - ((VAL) == TSC_CTPL_3CYCLES) || \ - ((VAL) == TSC_CTPL_4CYCLES) || \ - ((VAL) == TSC_CTPL_5CYCLES) || \ - ((VAL) == TSC_CTPL_6CYCLES) || \ - ((VAL) == TSC_CTPL_7CYCLES) || \ - ((VAL) == TSC_CTPL_8CYCLES) || \ - ((VAL) == TSC_CTPL_9CYCLES) || \ - ((VAL) == TSC_CTPL_10CYCLES) || \ - ((VAL) == TSC_CTPL_11CYCLES) || \ - ((VAL) == TSC_CTPL_12CYCLES) || \ - ((VAL) == TSC_CTPL_13CYCLES) || \ - ((VAL) == TSC_CTPL_14CYCLES) || \ - ((VAL) == TSC_CTPL_15CYCLES) || \ - ((VAL) == TSC_CTPL_16CYCLES)) - -#define IS_TSC_SS(VAL) (((VAL) == DISABLE) || ((VAL) == ENABLE)) - -#define IS_TSC_SSD(VAL) (((VAL) == 0) || (((VAL) > 0) && ((VAL) < 128))) - -#define IS_TSC_SS_PRESC(VAL) (((VAL) == TSC_SS_PRESC_DIV1) || ((VAL) == TSC_SS_PRESC_DIV2)) - -#define IS_TSC_PG_PRESC(VAL) (((VAL) == TSC_PG_PRESC_DIV1) || \ - ((VAL) == TSC_PG_PRESC_DIV2) || \ - ((VAL) == TSC_PG_PRESC_DIV4) || \ - ((VAL) == TSC_PG_PRESC_DIV8) || \ - ((VAL) == TSC_PG_PRESC_DIV16) || \ - ((VAL) == TSC_PG_PRESC_DIV32) || \ - ((VAL) == TSC_PG_PRESC_DIV64) || \ - ((VAL) == TSC_PG_PRESC_DIV128)) - -#define IS_TSC_MCV(VAL) (((VAL) == TSC_MCV_255) || \ - ((VAL) == TSC_MCV_511) || \ - ((VAL) == TSC_MCV_1023) || \ - ((VAL) == TSC_MCV_2047) || \ - ((VAL) == TSC_MCV_4095) || \ - ((VAL) == TSC_MCV_8191) || \ - ((VAL) == TSC_MCV_16383)) - -#define IS_TSC_IODEF(VAL) (((VAL) == TSC_IODEF_OUT_PP_LOW) || ((VAL) == TSC_IODEF_IN_FLOAT)) - -#define IS_TSC_SYNC_POL(VAL) (((VAL) == TSC_SYNC_POLARITY_FALLING) || ((VAL) == TSC_SYNC_POLARITY_RISING)) - -#define IS_TSC_ACQ_MODE(VAL) (((VAL) == TSC_ACQ_MODE_NORMAL) || ((VAL) == TSC_ACQ_MODE_SYNCHRO)) - -#define IS_TSC_IOMODE(VAL) (((VAL) == TSC_IOMODE_UNUSED) || \ - ((VAL) == TSC_IOMODE_CHANNEL) || \ - ((VAL) == TSC_IOMODE_SHIELD) || \ - ((VAL) == TSC_IOMODE_SAMPLING)) - -#define IS_TSC_MCE_IT(VAL) (((VAL) == DISABLE) || ((VAL) == ENABLE)) - -#define IS_TSC_GROUP_INDEX(VAL) (((VAL) == 0) || (((VAL) > 0) && ((VAL) < TSC_NB_OF_GROUPS))) - -/** - * @} - */ - -/* Exported functions --------------------------------------------------------*/ -/** @addtogroup TSC_Exported_Functions - * @{ - */ - -/** @addtogroup TSC_Exported_Functions_Group1 Initialization and de-initialization functions - * @{ - */ -/* Initialization and de-initialization functions *****************************/ -HAL_StatusTypeDef HAL_TSC_Init(TSC_HandleTypeDef* htsc); -HAL_StatusTypeDef HAL_TSC_DeInit(TSC_HandleTypeDef *htsc); -void HAL_TSC_MspInit(TSC_HandleTypeDef* htsc); -void HAL_TSC_MspDeInit(TSC_HandleTypeDef* htsc); -/** - * @} - */ - -/** @addtogroup TSC_Exported_Functions_Group2 Input and Output operation functions - * @{ - */ -/* IO operation functions *****************************************************/ -HAL_StatusTypeDef HAL_TSC_Start(TSC_HandleTypeDef* htsc); -HAL_StatusTypeDef HAL_TSC_Start_IT(TSC_HandleTypeDef* htsc); -HAL_StatusTypeDef HAL_TSC_Stop(TSC_HandleTypeDef* htsc); -HAL_StatusTypeDef HAL_TSC_Stop_IT(TSC_HandleTypeDef* htsc); -HAL_StatusTypeDef HAL_TSC_PollForAcquisition(TSC_HandleTypeDef* htsc); -TSC_GroupStatusTypeDef HAL_TSC_GroupGetStatus(TSC_HandleTypeDef* htsc, uint32_t gx_index); -uint32_t HAL_TSC_GroupGetValue(TSC_HandleTypeDef* htsc, uint32_t gx_index); -/** - * @} - */ - -/** @addtogroup TSC_Exported_Functions_Group3 Peripheral Control functions - * @{ - */ -/* Peripheral Control functions ***********************************************/ -HAL_StatusTypeDef HAL_TSC_IOConfig(TSC_HandleTypeDef* htsc, TSC_IOConfigTypeDef* config); -HAL_StatusTypeDef HAL_TSC_IODischarge(TSC_HandleTypeDef* htsc, uint32_t choice); -/** - * @} - */ - -/** @addtogroup TSC_Exported_Functions_Group4 Peripheral State and Errors functions - * @{ - */ -/* Peripheral State and Error functions ***************************************/ -HAL_TSC_StateTypeDef HAL_TSC_GetState(TSC_HandleTypeDef* htsc); -/** - * @} - */ - -/** @addtogroup TSC_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks - * @{ - */ -/******* TSC IRQHandler and Callbacks used in Interrupt mode */ -void HAL_TSC_IRQHandler(TSC_HandleTypeDef* htsc); -void HAL_TSC_ConvCpltCallback(TSC_HandleTypeDef* htsc); -void HAL_TSC_ErrorCallback(TSC_HandleTypeDef* htsc); -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32L4xx_HAL_TSC_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ -
--- a/Inc/stm32l4xx_hal_usart.h Thu Nov 12 20:49:49 2015 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,789 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_usart.h - * @author MCD Application Team - * @version V1.1.0 - * @date 16-September-2015 - * @brief Header file of USART HAL module. - ****************************************************************************** - * @attention - * - * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_USART_H -#define __STM32L4xx_HAL_USART_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal_def.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @addtogroup USART - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ -/** @defgroup USART_Exported_Types USART Exported Types - * @{ - */ - -/** - * @brief USART Init Structure definition - */ -typedef struct -{ - uint32_t BaudRate; /*!< This member configures the Usart communication baud rate. - The baud rate is computed using the following formula: - Baud Rate Register = ((PCLKx) / ((huart->Init.BaudRate))). */ - - uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame. - This parameter can be a value of @ref USARTEx_Word_Length. */ - - uint32_t StopBits; /*!< Specifies the number of stop bits transmitted. - This parameter can be a value of @ref USART_Stop_Bits. */ - - uint32_t Parity; /*!< Specifies the parity mode. - This parameter can be a value of @ref USART_Parity - @note When parity is enabled, the computed parity is inserted - at the MSB position of the transmitted data (9th bit when - the word length is set to 9 data bits; 8th bit when the - word length is set to 8 data bits). */ - - uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled. - This parameter can be a value of @ref USART_Mode. */ - - uint32_t CLKPolarity; /*!< Specifies the steady state of the serial clock. - This parameter can be a value of @ref USART_Clock_Polarity. */ - - uint32_t CLKPhase; /*!< Specifies the clock transition on which the bit capture is made. - This parameter can be a value of @ref USART_Clock_Phase. */ - - uint32_t CLKLastBit; /*!< Specifies whether the clock pulse corresponding to the last transmitted - data bit (MSB) has to be output on the SCLK pin in synchronous mode. - This parameter can be a value of @ref USART_Last_Bit. */ -}USART_InitTypeDef; - -/** - * @brief HAL USART State structures definition - */ -typedef enum -{ - HAL_USART_STATE_RESET = 0x00, /*!< Peripheral is not initialized */ - HAL_USART_STATE_READY = 0x01, /*!< Peripheral Initialized and ready for use */ - HAL_USART_STATE_BUSY = 0x02, /*!< an internal process is ongoing */ - HAL_USART_STATE_BUSY_TX = 0x12, /*!< Data Transmission process is ongoing */ - HAL_USART_STATE_BUSY_RX = 0x22, /*!< Data Reception process is ongoing */ - HAL_USART_STATE_BUSY_TX_RX = 0x32, /*!< Data Transmission Reception process is ongoing */ - HAL_USART_STATE_TIMEOUT = 0x03, /*!< Timeout state */ - HAL_USART_STATE_ERROR = 0x04 /*!< Error */ -}HAL_USART_StateTypeDef; - -/** - * @brief HAL USART Error Code structure definition - */ -typedef enum -{ - HAL_USART_ERROR_NONE = 0x00, /*!< No error */ - HAL_USART_ERROR_PE = 0x01, /*!< Parity error */ - HAL_USART_ERROR_NE = 0x02, /*!< Noise error */ - HAL_USART_ERROR_FE = 0x04, /*!< frame error */ - HAL_USART_ERROR_ORE = 0x08, /*!< Overrun error */ - HAL_USART_ERROR_DMA = 0x10 /*!< DMA transfer error */ -}HAL_USART_ErrorTypeDef; - -/** - * @brief USART clock sources definitions - */ -typedef enum -{ - USART_CLOCKSOURCE_PCLK1 = 0x00, /*!< PCLK1 clock source */ - USART_CLOCKSOURCE_PCLK2 = 0x01, /*!< PCLK2 clock source */ - USART_CLOCKSOURCE_HSI = 0x02, /*!< HSI clock source */ - USART_CLOCKSOURCE_SYSCLK = 0x04, /*!< SYSCLK clock source */ - USART_CLOCKSOURCE_LSE = 0x08, /*!< LSE clock source */ - USART_CLOCKSOURCE_UNDEFINED = 0x10 /*!< Undefined clock source */ -}USART_ClockSourceTypeDef; - - -/** - * @brief USART handle Structure definition - */ -typedef struct -{ - USART_TypeDef *Instance; /*!< USART registers base address */ - - USART_InitTypeDef Init; /*!< USART communication parameters */ - - uint8_t *pTxBuffPtr; /*!< Pointer to USART Tx transfer Buffer */ - - uint16_t TxXferSize; /*!< USART Tx Transfer size */ - - uint16_t TxXferCount; /*!< USART Tx Transfer Counter */ - - uint8_t *pRxBuffPtr; /*!< Pointer to USART Rx transfer Buffer */ - - uint16_t RxXferSize; /*!< USART Rx Transfer size */ - - uint16_t RxXferCount; /*!< USART Rx Transfer Counter */ - - uint16_t Mask; /*!< USART Rx RDR register mask */ - - DMA_HandleTypeDef *hdmatx; /*!< USART Tx DMA Handle parameters */ - - DMA_HandleTypeDef *hdmarx; /*!< USART Rx DMA Handle parameters */ - - HAL_LockTypeDef Lock; /*!< Locking object */ - - __IO HAL_USART_StateTypeDef State; /*!< USART communication state */ - - __IO uint32_t ErrorCode; /*!< USART Error code */ - -}USART_HandleTypeDef; - -/** - * @} - */ - -/* Exported constants --------------------------------------------------------*/ -/** @defgroup USART_Exported_Constants USART Exported Constants - * @{ - */ - -/** @defgroup USART_Stop_Bits USART Number of Stop Bits - * @{ - */ -#define USART_STOPBITS_1 ((uint32_t)0x00000000) /*!< USART frame with 1 stop bit */ -#define USART_STOPBITS_1_5 ((uint32_t)(USART_CR2_STOP_0 | USART_CR2_STOP_1)) /*!< USART frame with 1.5 stop bits */ -#define USART_STOPBITS_2 ((uint32_t)USART_CR2_STOP_1) /*!< USART frame with 2 stop bits */ -/** - * @} - */ - -/** @defgroup USART_Parity USART Parity - * @{ - */ -#define USART_PARITY_NONE ((uint32_t)0x00000000) /*!< No parity */ -#define USART_PARITY_EVEN ((uint32_t)USART_CR1_PCE) /*!< Even parity */ -#define USART_PARITY_ODD ((uint32_t)(USART_CR1_PCE | USART_CR1_PS)) /*!< Odd parity */ -/** - * @} - */ - -/** @defgroup USART_Mode USART Mode - * @{ - */ -#define USART_MODE_RX ((uint32_t)USART_CR1_RE) /*!< RX mode */ -#define USART_MODE_TX ((uint32_t)USART_CR1_TE) /*!< TX mode */ -#define USART_MODE_TX_RX ((uint32_t)(USART_CR1_TE |USART_CR1_RE)) /*!< RX and TX mode */ -/** - * @} - */ - -/** @defgroup USART_Over_Sampling USART Over Sampling - * @{ - */ -#define USART_OVERSAMPLING_16 ((uint32_t)0x00000000) /*!< Oversampling by 16 */ -#define USART_OVERSAMPLING_8 ((uint32_t)USART_CR1_OVER8) /*!< Oversampling by 8 */ -/** - * @} - */ - -/** @defgroup USART_Clock USART Clock - * @{ - */ -#define USART_CLOCK_DISABLE ((uint32_t)0x00000000) /*!< USART clock disable */ -#define USART_CLOCK_ENABLE ((uint32_t)USART_CR2_CLKEN) /*!< USART clock enable */ -/** - * @} - */ - -/** @defgroup USART_Clock_Polarity USART Clock Polarity - * @{ - */ -#define USART_POLARITY_LOW ((uint32_t)0x00000000) /*!< Driver enable signal is active high */ -#define USART_POLARITY_HIGH ((uint32_t)USART_CR2_CPOL) /*!< Driver enable signal is active low */ -/** - * @} - */ - -/** @defgroup USART_Clock_Phase USART Clock Phase - * @{ - */ -#define USART_PHASE_1EDGE ((uint32_t)0x00000000) /*!< USART frame phase on first clock transition */ -#define USART_PHASE_2EDGE ((uint32_t)USART_CR2_CPHA) /*!< USART frame phase on second clock transition */ -/** - * @} - */ - -/** @defgroup USART_Last_Bit USART Last Bit - * @{ - */ -#define USART_LASTBIT_DISABLE ((uint32_t)0x00000000) /*!< USART frame last data bit clock pulse not output to SCLK pin */ -#define USART_LASTBIT_ENABLE ((uint32_t)USART_CR2_LBCL) /*!< USART frame last data bit clock pulse output to SCLK pin */ -/** - * @} - */ - -/** @defgroup USART_Request_Parameters USART Request Parameters - * @{ - */ -#define USART_RXDATA_FLUSH_REQUEST ((uint32_t)USART_RQR_RXFRQ) /*!< Receive Data flush Request */ -#define USART_TXDATA_FLUSH_REQUEST ((uint32_t)USART_RQR_TXFRQ) /*!< Transmit data flush Request */ -/** - * @} - */ - -/** @defgroup USART_Flags USART Flags - * Elements values convention: 0xXXXX - * - 0xXXXX : Flag mask in the ISR register - * @{ - */ -#define USART_FLAG_REACK ((uint32_t)0x00400000) /*!< USART receive enable acknowledge flag */ -#define USART_FLAG_TEACK ((uint32_t)0x00200000) /*!< USART transmit enable acknowledge flag */ -#define USART_FLAG_BUSY ((uint32_t)0x00010000) /*!< USART busy flag */ -#define USART_FLAG_CTS ((uint32_t)0x00000400) /*!< USART clear to send flag */ -#define USART_FLAG_CTSIF ((uint32_t)0x00000200) /*!< USART clear to send interrupt flag */ -#define USART_FLAG_LBDF ((uint32_t)0x00000100) /*!< USART LIN break detection flag */ -#define USART_FLAG_TXE ((uint32_t)0x00000080) /*!< USART transmit data register empty */ -#define USART_FLAG_TC ((uint32_t)0x00000040) /*!< USART transmission complete */ -#define USART_FLAG_RXNE ((uint32_t)0x00000020) /*!< USART read data register not empty */ -#define USART_FLAG_IDLE ((uint32_t)0x00000010) /*!< USART idle flag */ -#define USART_FLAG_ORE ((uint32_t)0x00000008) /*!< USART overrun error */ -#define USART_FLAG_NE ((uint32_t)0x00000004) /*!< USART noise error */ -#define USART_FLAG_FE ((uint32_t)0x00000002) /*!< USART frame error */ -#define USART_FLAG_PE ((uint32_t)0x00000001) /*!< USART parity error */ -/** - * @} - */ - -/** @defgroup USART_Interrupt_definition USART Interrupts Definition - * Elements values convention: 0000ZZZZ0XXYYYYYb - * - YYYYY : Interrupt source position in the XX register (5bits) - * - XX : Interrupt source register (2bits) - * - 01: CR1 register - * - 10: CR2 register - * - 11: CR3 register - * - ZZZZ : Flag position in the ISR register(4bits) - * @{ - */ - -#define USART_IT_PE ((uint16_t)0x0028) /*!< USART parity error interruption */ -#define USART_IT_TXE ((uint16_t)0x0727) /*!< USART transmit data register empty interruption */ -#define USART_IT_TC ((uint16_t)0x0626) /*!< USART transmission complete interruption */ -#define USART_IT_RXNE ((uint16_t)0x0525) /*!< USART read data register not empty interruption */ -#define USART_IT_IDLE ((uint16_t)0x0424) /*!< USART idle interruption */ -#define USART_IT_ERR ((uint16_t)0x0060) /*!< USART error interruption */ -#define USART_IT_ORE ((uint16_t)0x0300) /*!< USART overrun error interruption */ -#define USART_IT_NE ((uint16_t)0x0200) /*!< USART noise error interruption */ -#define USART_IT_FE ((uint16_t)0x0100) /*!< USART frame error interruption */ -/** - * @} - */ - -/** @defgroup USART_IT_CLEAR_Flags USART Interruption Clear Flags - * @{ - */ -#define USART_CLEAR_PEF USART_ICR_PECF /*!< Parity Error Clear Flag */ -#define USART_CLEAR_FEF USART_ICR_FECF /*!< Framing Error Clear Flag */ -#define USART_CLEAR_NEF USART_ICR_NCF /*!< Noise detected Clear Flag */ -#define USART_CLEAR_OREF USART_ICR_ORECF /*!< OverRun Error Clear Flag */ -#define USART_CLEAR_IDLEF USART_ICR_IDLECF /*!< IDLE line detected Clear Flag */ -#define USART_CLEAR_TCF USART_ICR_TCCF /*!< Transmission Complete Clear Flag */ -#define USART_CLEAR_CTSF USART_ICR_CTSCF /*!< CTS Interrupt Clear Flag */ -/** - * @} - */ - -/** @defgroup USART_Interruption_Mask USART Interruption Flags Mask - * @{ - */ -#define USART_IT_MASK ((uint16_t)0x001F) /*!< USART interruptions flags mask */ -/** - * @} - */ - -/** - * @} - */ - -/* Exported macros -----------------------------------------------------------*/ -/** @defgroup USART_Exported_Macros USART Exported Macros - * @{ - */ - -/** @brief Reset USART handle state. - * @param __HANDLE__: USART handle. - * @retval None - */ -#define __HAL_USART_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_USART_STATE_RESET) - -/** @brief Check whether the specified USART flag is set or not. - * @param __HANDLE__: specifies the USART Handle - * @param __FLAG__: specifies the flag to check. - * This parameter can be one of the following values: - * @arg USART_FLAG_REACK: Receive enable acknowledge flag - * @arg USART_FLAG_TEACK: Transmit enable acknowledge flag - * @arg USART_FLAG_BUSY: Busy flag - * @arg USART_FLAG_CTS: CTS Change flag - * @arg USART_FLAG_TXE: Transmit data register empty flag - * @arg USART_FLAG_TC: Transmission Complete flag - * @arg USART_FLAG_RXNE: Receive data register not empty flag - * @arg USART_FLAG_IDLE: Idle Line detection flag - * @arg USART_FLAG_ORE: OverRun Error flag - * @arg USART_FLAG_NE: Noise Error flag - * @arg USART_FLAG_FE: Framing Error flag - * @arg USART_FLAG_PE: Parity Error flag - * @retval The new state of __FLAG__ (TRUE or FALSE). - */ -#define __HAL_USART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__)) - -/** @brief Clear the specified USART pending flag. - * @param __HANDLE__: specifies the USART Handle. - * @param __FLAG__: specifies the flag to check. - * This parameter can be any combination of the following values: - * @arg USART_CLEAR_PEF - * @arg USART_CLEAR_FEF - * @arg USART_CLEAR_NEF - * @arg USART_CLEAR_OREF - * @arg USART_CLEAR_IDLEF - * @arg USART_CLEAR_TCF - * @arg USART_CLEAR_LBDF - * @arg USART_CLEAR_CTSF - * @arg USART_CLEAR_RTOF - * @arg USART_CLEAR_EOBF - * @arg USART_CLEAR_CMF - * @arg USART_CLEAR_WUF - * @retval None - */ -#define __HAL_USART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__)) - -/** @brief Clear the USART PE pending flag. - * @param __HANDLE__: specifies the USART Handle. - * @retval None - */ -#define __HAL_USART_CLEAR_PEFLAG(__HANDLE__) __HAL_USART_CLEAR_FLAG((__HANDLE__), USART_CLEAR_PEF) - -/** @brief Clear the USART FE pending flag. - * @param __HANDLE__: specifies the USART Handle. - * @retval None - */ -#define __HAL_USART_CLEAR_FEFLAG(__HANDLE__) __HAL_USART_CLEAR_FLAG((__HANDLE__), USART_CLEAR_FEF) - -/** @brief Clear the USART NE pending flag. - * @param __HANDLE__: specifies the USART Handle. - * @retval None - */ -#define __HAL_USART_CLEAR_NEFLAG(__HANDLE__) __HAL_USART_CLEAR_FLAG((__HANDLE__), USART_CLEAR_NEF) - -/** @brief Clear the USART ORE pending flag. - * @param __HANDLE__: specifies the USART Handle. - * @retval None - */ -#define __HAL_USART_CLEAR_OREFLAG(__HANDLE__) __HAL_USART_CLEAR_FLAG((__HANDLE__), USART_CLEAR_OREF) - -/** @brief Clear the USART IDLE pending flag. - * @param __HANDLE__: specifies the USART Handle. - * @retval None - */ -#define __HAL_USART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_USART_CLEAR_FLAG((__HANDLE__), USART_CLEAR_IDLEF) - -/** @brief Enable the specified USART interrupt. - * @param __HANDLE__: specifies the USART Handle. - * @param __INTERRUPT__: specifies the USART interrupt source to enable. - * This parameter can be one of the following values: - * @arg USART_IT_TXE: Transmit Data Register empty interrupt - * @arg USART_IT_TC: Transmission complete interrupt - * @arg USART_IT_RXNE: Receive Data register not empty interrupt - * @arg USART_IT_IDLE: Idle line detection interrupt - * @arg USART_IT_PE: Parity Error interrupt - * @arg USART_IT_ERR: Error interrupt(Frame error, noise error, overrun error) - * @retval None - */ -#define __HAL_USART_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1)? ((__HANDLE__)->Instance->CR1 |= (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ - ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2)? ((__HANDLE__)->Instance->CR2 |= (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ - ((__HANDLE__)->Instance->CR3 |= (1U << ((__INTERRUPT__) & USART_IT_MASK)))) - -/** @brief Disable the specified USART interrupt. - * @param __HANDLE__: specifies the USART Handle. - * @param __INTERRUPT__: specifies the USART interrupt source to disable. - * This parameter can be one of the following values: - * @arg USART_IT_TXE: Transmit Data Register empty interrupt - * @arg USART_IT_TC: Transmission complete interrupt - * @arg USART_IT_RXNE: Receive Data register not empty interrupt - * @arg USART_IT_IDLE: Idle line detection interrupt - * @arg USART_IT_PE: Parity Error interrupt - * @arg USART_IT_ERR: Error interrupt(Frame error, noise error, overrun error) - * @retval None - */ -#define __HAL_USART_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1)? ((__HANDLE__)->Instance->CR1 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ - ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2)? ((__HANDLE__)->Instance->CR2 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK))): \ - ((__HANDLE__)->Instance->CR3 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK)))) - - -/** @brief Check whether the specified USART interrupt has occurred or not. - * @param __HANDLE__: specifies the USART Handle. - * @param __IT__: specifies the USART interrupt source to check. - * This parameter can be one of the following values: - * @arg USART_IT_TXE: Transmit Data Register empty interrupt - * @arg USART_IT_TC: Transmission complete interrupt - * @arg USART_IT_RXNE: Receive Data register not empty interrupt - * @arg USART_IT_IDLE: Idle line detection interrupt - * @arg USART_IT_ORE: OverRun Error interrupt - * @arg USART_IT_NE: Noise Error interrupt - * @arg USART_IT_FE: Framing Error interrupt - * @arg USART_IT_PE: Parity Error interrupt - * @retval The new state of __IT__ (TRUE or FALSE). - */ -#define __HAL_USART_GET_IT(__HANDLE__, __IT__) ((__HANDLE__)->Instance->ISR & ((uint32_t)1 << ((__IT__)>> 0x08))) - -/** @brief Check whether the specified USART interrupt source is enabled or not. - * @param __HANDLE__: specifies the USART Handle. - * @param __IT__: specifies the USART interrupt source to check. - * This parameter can be one of the following values: - * @arg USART_IT_TXE: Transmit Data Register empty interrupt - * @arg USART_IT_TC: Transmission complete interrupt - * @arg USART_IT_RXNE: Receive Data register not empty interrupt - * @arg USART_IT_IDLE: Idle line detection interrupt - * @arg USART_IT_ORE: OverRun Error interrupt - * @arg USART_IT_NE: Noise Error interrupt - * @arg USART_IT_FE: Framing Error interrupt - * @arg USART_IT_PE: Parity Error interrupt - * @retval The new state of __IT__ (TRUE or FALSE). - */ -#define __HAL_USART_GET_IT_SOURCE(__HANDLE__, __IT__) ((((((uint8_t)(__IT__)) >> 5) == 1)? (__HANDLE__)->Instance->CR1:(((((uint8_t)(__IT__)) >> 5) == 2)? \ - (__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & ((uint32_t)1 << \ - (((uint16_t)(__IT__)) & USART_IT_MASK))) - - -/** @brief Clear the specified USART ISR flag, in setting the proper ICR register flag. - * @param __HANDLE__: specifies the USART Handle. - * @param __IT_CLEAR__: specifies the interrupt clear register flag that needs to be set - * to clear the corresponding interrupt. - * This parameter can be one of the following values: - * @arg USART_CLEAR_PEF: Parity Error Clear Flag - * @arg USART_CLEAR_FEF: Framing Error Clear Flag - * @arg USART_CLEAR_NEF: Noise detected Clear Flag - * @arg USART_CLEAR_OREF: OverRun Error Clear Flag - * @arg USART_CLEAR_IDLEF: IDLE line detected Clear Flag - * @arg USART_CLEAR_TCF: Transmission Complete Clear Flag - * @arg USART_CLEAR_CTSF: CTS Interrupt Clear Flag - * @retval None - */ -#define __HAL_USART_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->ICR = (uint32_t)(__IT_CLEAR__)) - -/** @brief Set a specific USART request flag. - * @param __HANDLE__: specifies the USART Handle. - * @param __REQ__: specifies the request flag to set. - * This parameter can be one of the following values: - * @arg USART_RXDATA_FLUSH_REQUEST: Receive Data flush Request - * @arg USART_TXDATA_FLUSH_REQUEST: Transmit data flush Request - * - * @retval None - */ -#define __HAL_USART_SEND_REQ(__HANDLE__, __REQ__) ((__HANDLE__)->Instance->RQR |= (__REQ__)) - -/** @brief Enable the USART one bit sample method. - * @param __HANDLE__: specifies the USART Handle. - * @retval None - */ -#define __HAL_USART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT) - -/** @brief Disable the USART one bit sample method. - * @param __HANDLE__: specifies the USART Handle. - * @retval None - */ -#define __HAL_USART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= (uint32_t)~((uint32_t)USART_CR3_ONEBIT)) - -/** @brief Enable USART. - * @param __HANDLE__: specifies the USART Handle. - * @retval None - */ -#define __HAL_USART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE) - -/** @brief Disable USART. - * @param __HANDLE__: specifies the USART Handle. - * @retval None - */ -#define __HAL_USART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE) - -/** - * @} - */ - -/* Private macros --------------------------------------------------------*/ -/** @defgroup USART_Private_Macros USART Private Macros - * @{ - */ - -/** @brief Report the USART clock source. - * @param __HANDLE__: specifies the USART Handle. - * @param __CLOCKSOURCE__: output variable. - * @retval the USART clocking source, written in __CLOCKSOURCE__. - */ -#define USART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ - do { \ - if((__HANDLE__)->Instance == USART1) \ - { \ - switch(__HAL_RCC_GET_USART1_SOURCE()) \ - { \ - case RCC_USART1CLKSOURCE_PCLK2: \ - (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK2; \ - break; \ - case RCC_USART1CLKSOURCE_HSI: \ - (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \ - break; \ - case RCC_USART1CLKSOURCE_SYSCLK: \ - (__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK; \ - break; \ - case RCC_USART1CLKSOURCE_LSE: \ - (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \ - break; \ - default: \ - (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \ - break; \ - } \ - } \ - else if((__HANDLE__)->Instance == USART2) \ - { \ - switch(__HAL_RCC_GET_USART2_SOURCE()) \ - { \ - case RCC_USART2CLKSOURCE_PCLK1: \ - (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \ - break; \ - case RCC_USART2CLKSOURCE_HSI: \ - (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \ - break; \ - case RCC_USART2CLKSOURCE_SYSCLK: \ - (__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK; \ - break; \ - case RCC_USART2CLKSOURCE_LSE: \ - (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \ - break; \ - default: \ - (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \ - break; \ - } \ - } \ - else if((__HANDLE__)->Instance == USART3) \ - { \ - switch(__HAL_RCC_GET_USART3_SOURCE()) \ - { \ - case RCC_USART3CLKSOURCE_PCLK1: \ - (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \ - break; \ - case RCC_USART3CLKSOURCE_HSI: \ - (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \ - break; \ - case RCC_USART3CLKSOURCE_SYSCLK: \ - (__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK; \ - break; \ - case RCC_USART3CLKSOURCE_LSE: \ - (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \ - break; \ - default: \ - (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \ - break; \ - } \ - } \ - } while(0) - -/** @brief Check USART Baud rate. - * @param __BAUDRATE__: Baudrate specified by the user. - * The maximum Baud Rate is derived from the maximum clock on L4 (i.e. 80 MHz) - * divided by the smallest oversampling used on the USART (i.e. 8). - * @retval Test result (TRUE or FALSE). - */ -#define IS_USART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) < 10000001) - -/** - * @brief Ensure that USART frame number of stop bits is valid. - * @param __STOPBITS__: USART frame number of stop bits. - * @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid) - */ -#define IS_USART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == USART_STOPBITS_1) || \ - ((__STOPBITS__) == USART_STOPBITS_1_5) || \ - ((__STOPBITS__) == USART_STOPBITS_2)) - -/** - * @brief Ensure that USART frame parity is valid. - * @param __PARITY__: USART frame parity. - * @retval SET (__PARITY__ is valid) or RESET (__PARITY__ is invalid) - */ -#define IS_USART_PARITY(__PARITY__) (((__PARITY__) == USART_PARITY_NONE) || \ - ((__PARITY__) == USART_PARITY_EVEN) || \ - ((__PARITY__) == USART_PARITY_ODD)) - -/** - * @brief Ensure that USART communication mode is valid. - * @param __MODE__: USART communication mode. - * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) - */ -#define IS_USART_MODE(__MODE__) ((((__MODE__) & (uint32_t)0xFFFFFFF3) == 0x00) && ((__MODE__) != (uint32_t)0x00)) - -/** - * @brief Ensure that USART oversampling is valid. - * @param __SAMPLING__: USART oversampling. - * @retval SET (__SAMPLING__ is valid) or RESET (__SAMPLING__ is invalid) - */ -#define IS_USART_OVERSAMPLING(__SAMPLING__) (((__SAMPLING__) == USART_OVERSAMPLING_16) || \ - ((__SAMPLING__) == USART_OVERSAMPLING_8)) - -/** - * @brief Ensure that USART clock state is valid. - * @param __CLOCK__: USART clock state. - * @retval SET (__CLOCK__ is valid) or RESET (__CLOCK__ is invalid) - */ -#define IS_USART_CLOCK(__CLOCK__) (((__CLOCK__) == USART_CLOCK_DISABLE) || \ - ((__CLOCK__) == USART_CLOCK_ENABLE)) - -/** - * @brief Ensure that USART frame polarity is valid. - * @param __CPOL__: USART frame polarity. - * @retval SET (__CPOL__ is valid) or RESET (__CPOL__ is invalid) - */ -#define IS_USART_POLARITY(__CPOL__) (((__CPOL__) == USART_POLARITY_LOW) || ((__CPOL__) == USART_POLARITY_HIGH)) - -/** - * @brief Ensure that USART frame phase is valid. - * @param __CPHA__: USART frame phase. - * @retval SET (__CPHA__ is valid) or RESET (__CPHA__ is invalid) - */ -#define IS_USART_PHASE(__CPHA__) (((__CPHA__) == USART_PHASE_1EDGE) || ((__CPHA__) == USART_PHASE_2EDGE)) - -/** - * @brief Ensure that USART frame last bit clock pulse setting is valid. - * @param __LASTBIT__: USART frame last bit clock pulse setting. - * @retval SET (__LASTBIT__ is valid) or RESET (__LASTBIT__ is invalid) - */ -#define IS_USART_LASTBIT(__LASTBIT__) (((__LASTBIT__) == USART_LASTBIT_DISABLE) || \ - ((__LASTBIT__) == USART_LASTBIT_ENABLE)) - -/** - * @brief Ensure that USART request parameter is valid. - * @param __PARAM__: USART request parameter. - * @retval SET (__PARAM__ is valid) or RESET (__PARAM__ is invalid) - */ -#define IS_USART_REQUEST_PARAMETER(__PARAM__) (((__PARAM__) == USART_RXDATA_FLUSH_REQUEST) || \ - ((__PARAM__) == USART_TXDATA_FLUSH_REQUEST)) - -/** - * @} - */ - -/* Include USART HAL Extended module */ -#include "stm32l4xx_hal_usart_ex.h" - -/* Exported functions --------------------------------------------------------*/ -/** @addtogroup USART_Exported_Functions USART Exported Functions - * @{ - */ - -/** @addtogroup USART_Exported_Functions_Group1 Initialization and de-initialization functions - * @{ - */ - -/* Initialization and de-initialization functions ****************************/ -HAL_StatusTypeDef HAL_USART_Init(USART_HandleTypeDef *husart); -HAL_StatusTypeDef HAL_USART_DeInit(USART_HandleTypeDef *husart); -void HAL_USART_MspInit(USART_HandleTypeDef *husart); -void HAL_USART_MspDeInit(USART_HandleTypeDef *husart); - -/** - * @} - */ - -/** @addtogroup USART_Exported_Functions_Group2 IO operation functions - * @{ - */ - -/* IO operation functions *****************************************************/ -HAL_StatusTypeDef HAL_USART_Transmit(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size, uint32_t Timeout); -HAL_StatusTypeDef HAL_USART_Receive(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size, uint32_t Timeout); -HAL_StatusTypeDef HAL_USART_TransmitReceive(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout); -HAL_StatusTypeDef HAL_USART_Transmit_IT(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size); -HAL_StatusTypeDef HAL_USART_Receive_IT(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size); -HAL_StatusTypeDef HAL_USART_TransmitReceive_IT(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size); -HAL_StatusTypeDef HAL_USART_Transmit_DMA(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size); -HAL_StatusTypeDef HAL_USART_Receive_DMA(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size); -HAL_StatusTypeDef HAL_USART_TransmitReceive_DMA(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size); -HAL_StatusTypeDef HAL_USART_DMAPause(USART_HandleTypeDef *husart); -HAL_StatusTypeDef HAL_USART_DMAResume(USART_HandleTypeDef *husart); -HAL_StatusTypeDef HAL_USART_DMAStop(USART_HandleTypeDef *husart); -void HAL_USART_IRQHandler(USART_HandleTypeDef *husart); -void HAL_USART_TxHalfCpltCallback(USART_HandleTypeDef *husart); -void HAL_USART_TxCpltCallback(USART_HandleTypeDef *husart); -void HAL_USART_RxCpltCallback(USART_HandleTypeDef *husart); -void HAL_USART_RxHalfCpltCallback(USART_HandleTypeDef *husart); -void HAL_USART_TxRxCpltCallback(USART_HandleTypeDef *husart); -void HAL_USART_ErrorCallback(USART_HandleTypeDef *husart); - -/** - * @} - */ - -/* Peripheral Control functions ***********************************************/ - -/** @addtogroup USART_Exported_Functions_Group4 Peripheral State and Error functions - * @{ - */ - -/* Peripheral State and Error functions ***************************************/ -HAL_USART_StateTypeDef HAL_USART_GetState(USART_HandleTypeDef *husart); -uint32_t HAL_USART_GetError(USART_HandleTypeDef *husart); - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32L4xx_HAL_USART_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ -
--- a/Inc/stm32l4xx_hal_usart_ex.h Thu Nov 12 20:49:49 2015 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,160 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_usart_ex.h - * @author MCD Application Team - * @version V1.1.0 - * @date 16-September-2015 - * @brief Header file of USART HAL Extended module. - ****************************************************************************** - * @attention - * - * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_USART_EX_H -#define __STM32L4xx_HAL_USART_EX_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal_def.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @addtogroup USARTEx - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ -/* Exported constants --------------------------------------------------------*/ -/** @defgroup USARTEx_Exported_Constants USARTEx Exported Constants - * @{ - */ - -/** @defgroup USARTEx_Word_Length USARTEx Word Length - * @{ - */ -#define USART_WORDLENGTH_7B ((uint32_t)USART_CR1_M1) /*!< 7-bit long USART frame */ -#define USART_WORDLENGTH_8B ((uint32_t)0x00000000) /*!< 8-bit long USART frame */ -#define USART_WORDLENGTH_9B ((uint32_t)USART_CR1_M0) /*!< 9-bit long USART frame */ -/** - * @} - */ - -/** - * @} - */ - -/* Exported functions --------------------------------------------------------*/ - -/* Private macros ------------------------------------------------------------*/ -/** @defgroup USARTEx_Private_Macros USARTEx Private Macros - * @{ - */ - -/** @brief Compute the USART mask to apply to retrieve the received data - * according to the word length and to the parity bits activation. - * @note If PCE = 1, the parity bit is not included in the data extracted - * by the reception API(). - * This masking operation is not carried out in the case of - * DMA transfers. - * @param __HANDLE__: specifies the USART Handle. - * @retval None, the mask to apply to USART RDR register is stored in (__HANDLE__)->Mask field. - */ -#define USART_MASK_COMPUTATION(__HANDLE__) \ - do { \ - if ((__HANDLE__)->Init.WordLength == USART_WORDLENGTH_9B) \ - { \ - if ((__HANDLE__)->Init.Parity == USART_PARITY_NONE) \ - { \ - (__HANDLE__)->Mask = 0x01FF ; \ - } \ - else \ - { \ - (__HANDLE__)->Mask = 0x00FF ; \ - } \ - } \ - else if ((__HANDLE__)->Init.WordLength == USART_WORDLENGTH_8B) \ - { \ - if ((__HANDLE__)->Init.Parity == USART_PARITY_NONE) \ - { \ - (__HANDLE__)->Mask = 0x00FF ; \ - } \ - else \ - { \ - (__HANDLE__)->Mask = 0x007F ; \ - } \ - } \ - else if ((__HANDLE__)->Init.WordLength == USART_WORDLENGTH_7B) \ - { \ - if ((__HANDLE__)->Init.Parity == USART_PARITY_NONE) \ - { \ - (__HANDLE__)->Mask = 0x007F ; \ - } \ - else \ - { \ - (__HANDLE__)->Mask = 0x003F ; \ - } \ - } \ -} while(0) - -/** - * @brief Ensure that USART frame length is valid. - * @param __LENGTH__: USART frame length. - * @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid) - */ -#define IS_USART_WORD_LENGTH(__LENGTH__) (((__LENGTH__) == USART_WORDLENGTH_7B) || \ - ((__LENGTH__) == USART_WORDLENGTH_8B) || \ - ((__LENGTH__) == USART_WORDLENGTH_9B)) - -/** - * @} - */ - -/* Exported functions --------------------------------------------------------*/ - -/** - * @} - */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32L4xx_HAL_USART_EX_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ -
--- a/Inc/stm32l4xx_hal_wwdg.h Thu Nov 12 20:49:49 2015 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,327 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_wwdg.h - * @author MCD Application Team - * @version V1.1.0 - * @date 16-September-2015 - * @brief Header file of WWDG HAL module. - ****************************************************************************** - * @attention - * - * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM32L4xx_HAL_WWDG_H -#define __STM32L4xx_HAL_WWDG_H - -#ifdef __cplusplus - extern "C" { -#endif - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal_def.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @addtogroup WWDG - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ - -/** @defgroup WWDG_Exported_Types WWDG Exported Types - * @{ - */ - -/** - * @brief WWDG HAL State Structure definition - */ -typedef enum -{ - HAL_WWDG_STATE_RESET = 0x00, /*!< WWDG not yet initialized or disabled */ - HAL_WWDG_STATE_READY = 0x01, /*!< WWDG initialized and ready for use */ - HAL_WWDG_STATE_BUSY = 0x02, /*!< WWDG internal process is ongoing */ - HAL_WWDG_STATE_TIMEOUT = 0x03, /*!< WWDG timeout state */ - HAL_WWDG_STATE_ERROR = 0x04 /*!< WWDG error state */ -}HAL_WWDG_StateTypeDef; - -/** - * @brief WWDG Init structure definition - */ -typedef struct -{ - uint32_t Prescaler; /*!< Specifies the prescaler value of the WWDG. - This parameter can be a value of @ref WWDG_Prescaler */ - - uint32_t Window; /*!< Specifies the WWDG window value to be compared to the downcounter. - This parameter must be a number lower than Max_Data = 0x80 */ - - uint32_t Counter; /*!< Specifies the WWDG free-running downcounter value. - This parameter must be a number between Min_Data = 0x40 and Max_Data = 0x7F */ - -}WWDG_InitTypeDef; - -/** - * @brief WWDG handle Structure definition - */ -typedef struct -{ - WWDG_TypeDef *Instance; /*!< Register base address */ - - WWDG_InitTypeDef Init; /*!< WWDG required parameters */ - - HAL_LockTypeDef Lock; /*!< WWDG locking object */ - - __IO HAL_WWDG_StateTypeDef State; /*!< WWDG communication state */ - -}WWDG_HandleTypeDef; -/** - * @} - */ - -/* Exported constants --------------------------------------------------------*/ - -/** @defgroup WWDG_Exported_Constants WWDG Exported Constants - * @{ - */ - -/** @defgroup WWDG_Interrupt_definition WWDG Interrupt definition - * @{ - */ -#define WWDG_IT_EWI WWDG_CFR_EWI /*!< Early wakeup interrupt */ -/** - * @} - */ - -/** @defgroup WWDG_Flag_definition WWDG Flag definition - * @brief WWDG Flag definition - * @{ - */ -#define WWDG_FLAG_EWIF WWDG_SR_EWIF /*!< Early wakeup interrupt flag */ -/** - * @} - */ - -/** @defgroup WWDG_Prescaler WWDG Prescaler - * @{ - */ -#define WWDG_PRESCALER_1 ((uint32_t)0x00000000) /*!< WWDG counter clock = (PCLK1/4096)/1 */ -#define WWDG_PRESCALER_2 WWDG_CFR_WDGTB_0 /*!< WWDG counter clock = (PCLK1/4096)/2 */ -#define WWDG_PRESCALER_4 WWDG_CFR_WDGTB_1 /*!< WWDG counter clock = (PCLK1/4096)/4 */ -#define WWDG_PRESCALER_8 WWDG_CFR_WDGTB /*!< WWDG counter clock = (PCLK1/4096)/8 */ -/** - * @} - */ - -/** - * @} - */ - -/* Private macros ------------------------------------------------------------*/ - -/** @defgroup WWDG_Private_Macros WWDG Private Macros - * @{ - */ -#define IS_WWDG_PRESCALER(__PRESCALER__) (((__PRESCALER__) == WWDG_PRESCALER_1) || \ - ((__PRESCALER__) == WWDG_PRESCALER_2) || \ - ((__PRESCALER__) == WWDG_PRESCALER_4) || \ - ((__PRESCALER__) == WWDG_PRESCALER_8)) - -#define IS_WWDG_WINDOW(__WINDOW__) ((__WINDOW__) <= 0x7F) - -#define IS_WWDG_COUNTER(__COUNTER__) (((__COUNTER__) >= 0x40) && ((__COUNTER__) <= 0x7F)) -/** - * @} - */ - - -/* Exported macros ------------------------------------------------------------*/ - -/** @defgroup WWDG_Exported_Macros WWDG Exported Macros - * @{ - */ - -/** @brief Reset WWDG handle state. - * @param __HANDLE__: WWDG handle - * @retval None - */ -#define __HAL_WWDG_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_WWDG_STATE_RESET) - -/** - * @brief Enable the WWDG peripheral. - * @param __HANDLE__: WWDG handle - * @retval None - */ -#define __HAL_WWDG_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR, WWDG_CR_WDGA) - -/** - * @brief Disable the WWDG peripheral. - * @param __HANDLE__: WWDG handle - * @note WARNING: This is a dummy macro for HAL code alignment. - * Once enable, WWDG Peripheral cannot be disabled except by a system reset. - * @retval None - */ -#define __HAL_WWDG_DISABLE(__HANDLE__) /* dummy macro */ - -/** - * @brief Enable the WWDG early wakeup interrupt. - * @param __HANDLE__: WWDG handle - * @param __INTERRUPT__: specifies the interrupt to enable. - * This parameter can be one of the following values: - * @arg WWDG_IT_EWI: Early wakeup interrupt - * @note Once enabled this interrupt cannot be disabled except by a system reset. - * @retval None - */ -#define __HAL_WWDG_ENABLE_IT(__HANDLE__, __INTERRUPT__) SET_BIT((__HANDLE__)->Instance->CFR, (__INTERRUPT__)) - -/** - * @brief Disable the WWDG early wakeup interrupt. - * @param __HANDLE__: WWDG handle - * @param __INTERRUPT__: specifies the interrupt to disable. - * This parameter can be one of the following values: - * @arg WWDG_IT_EWI: Early wakeup interrupt - * @note WARNING: This is a dummy macro for HAL code alignment. - * Once enabled this interrupt cannot be disabled except by a system reset. - * @retval None - */ -#define __HAL_WWDG_DISABLE_IT(__HANDLE__, __INTERRUPT__) /* dummy macro */ - -/** - * @brief Check whether the selected WWDG interrupt has occurred or not. - * @param __HANDLE__: WWDG handle - * @param __INTERRUPT__: specifies the it to check. - * This parameter can be one of the following values: - * @arg WWDG_FLAG_EWIF: Early wakeup interrupt IT - * @retval The new state of WWDG_FLAG (SET or RESET). - */ -#define __HAL_WWDG_GET_IT(__HANDLE__, __INTERRUPT__) __HAL_WWDG_GET_FLAG((__HANDLE__),(__INTERRUPT__)) - -/** @brief Clear the WWDG interrupt pending bits. - * bits to clear the selected interrupt pending bits. - * @param __HANDLE__: WWDG handle - * @param __INTERRUPT__: specifies the interrupt pending bit to clear. - * This parameter can be one of the following values: - * @arg WWDG_FLAG_EWIF: Early wakeup interrupt flag - */ -#define __HAL_WWDG_CLEAR_IT(__HANDLE__, __INTERRUPT__) __HAL_WWDG_CLEAR_FLAG((__HANDLE__), (__INTERRUPT__)) - -/** - * @brief Check whether the specified WWDG flag is set or not. - * @param __HANDLE__: WWDG handle - * @param __FLAG__: specifies the flag to check. - * This parameter can be one of the following values: - * @arg WWDG_FLAG_EWIF: Early wakeup interrupt flag - * @retval The new state of WWDG_FLAG (SET or RESET). - */ -#define __HAL_WWDG_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__)) - -/** - * @brief Clear the WWDG's pending flags. - * @param __HANDLE__: WWDG handle - * @param __FLAG__: specifies the flag to clear. - * This parameter can be one of the following values: - * @arg WWDG_FLAG_EWIF: Early wakeup interrupt flag - * @retval None - */ -#define __HAL_WWDG_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR = ~(__FLAG__)) - -/** @brief Check whether the specified WWDG interrupt source is enabled or not. - * @param __HANDLE__: WWDG Handle. - * @param __INTERRUPT__: specifies the WWDG interrupt source to check. - * This parameter can be one of the following values: - * @arg WWDG_IT_EWI: Early Wakeup Interrupt - * @retval state of __INTERRUPT__ (TRUE or FALSE). - */ -#define __HAL_WWDG_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CFR & (__INTERRUPT__)) == (__INTERRUPT__)) - -/** - * @} - */ - -/* Exported functions --------------------------------------------------------*/ - -/** @addtogroup WWDG_Exported_Functions - * @{ - */ - -/** @addtogroup WWDG_Exported_Functions_Group1 - * @{ - */ -/* Initialization/de-initialization functions **********************************/ -HAL_StatusTypeDef HAL_WWDG_Init(WWDG_HandleTypeDef *hwwdg); -HAL_StatusTypeDef HAL_WWDG_DeInit(WWDG_HandleTypeDef *hwwdg); -void HAL_WWDG_MspInit(WWDG_HandleTypeDef *hwwdg); -void HAL_WWDG_MspDeInit(WWDG_HandleTypeDef *hwwdg); -/** - * @} - */ - -/** @addtogroup WWDG_Exported_Functions_Group2 - * @{ - */ -/* I/O operation functions ******************************************************/ -HAL_StatusTypeDef HAL_WWDG_Start(WWDG_HandleTypeDef *hwwdg); -HAL_StatusTypeDef HAL_WWDG_Start_IT(WWDG_HandleTypeDef *hwwdg); -HAL_StatusTypeDef HAL_WWDG_Refresh(WWDG_HandleTypeDef *hwwdg, uint32_t Counter); -void HAL_WWDG_IRQHandler(WWDG_HandleTypeDef *hwwdg); -void HAL_WWDG_WakeupCallback(WWDG_HandleTypeDef* hwwdg); -/** - * @} - */ - -/** @addtogroup WWDG_Exported_Functions_Group3 - * @{ - */ -/* Peripheral State functions **************************************************/ -HAL_WWDG_StateTypeDef HAL_WWDG_GetState(WWDG_HandleTypeDef *hwwdg); -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -#ifdef __cplusplus -} -#endif - -#endif /* __STM32L4xx_HAL_WWDG_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ -
--- a/Src/stm32l4xx_hal_adc.c Thu Nov 12 20:49:49 2015 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,2995 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_adc.c - * @author MCD Application conversion - * @version V1.1.0 - * @date 16-September-2015 - * @brief This file provides firmware functions to manage the following - * functionalities of the Analog to Digital Convertor (ADC) - * peripheral: - * + Initialization and de-initialization functions - * ++ Configuration of ADC - * + Operation functions - * ++ Start, stop, get result of regular conversions of regular - * using 3 possible modes: polling, interruption or DMA. - * + Control functions - * ++ Analog Watchdog configuration - * ++ Channels configuration on regular group - * + State functions - * ++ ADC state machine management - * ++ Interrupts and flags management - * - @verbatim - ============================================================================== - ##### ADC specific features ##### - ============================================================================== - [..] - (#) 12-bit, 10-bit, 8-bit or 6-bit configurable resolution. - - (#) Interrupt generation at the end of regular conversion and in case of - analog watchdog and overrun events. - - (#) Single and continuous conversion modes. - - (#) Scan mode for automatic conversion of channel 0 to channel 'n'. - - (#) Data alignment with in-built data coherency. - - (#) Channel-wise programmable sampling time. - - (#) External trigger (timer or EXTI) with configurable polarity for - regular groups. - - (#) DMA request generation for transfer of regular group converted data. - - (#) Configurable delay between conversions in Dual interleaved mode. - - (#) ADC channels selectable single/differential input. - - (#) ADC offset on regular groups. - - (#) ADC supply requirements: 1.62 V to 3.6 V. - - (#) ADC input range: from Vref_ (connected to Vssa) to Vref+ (connected to - Vdda or to an external voltage reference). - - - - ##### How to use this driver ##### - ============================================================================== - [..] - - (#) Enable the ADC interface - As prerequisite, in HAL_ADC_MspInit(), ADC clock source must be - configured at RCC top level. - - Two different clock sources are available: - (++) - the ADC clock can be a specific clock source, coming from the system - clock, the PLLSAI1 or the PLLSAI2 running up to 80MHz. - (++) - or the ADC clock can be derived from the AHB clock of the ADC bus - interface, divided by a programmable factor - - - (++) For example, in case of PLLSAI2: - (+++) __HAL_RCC_ADC_CLK_ENABLE(); - (+++) HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit); - (+++) where - (+++) PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC - (+++) PeriphClkInit.AdcClockSelection = RCC_ADCCLKSOURCE_PLLSAI2 - - - (#) ADC pins configuration - (++) Enable the clock for the ADC GPIOs using the following function: - __HAL_RCC_GPIOx_CLK_ENABLE(); - (++) Configure these ADC pins in analog mode using HAL_GPIO_Init(); - - (#) Configure the ADC parameters (conversion resolution, data alignment, - continuous mode, ...) using the HAL_ADC_Init() function. - - (#) Optionally, perform an automatic ADC calibration to improve the - conversion accuracy using function HAL_ADCEx_Calibration_Start(). - - (#) Activate the ADC peripheral using one of the start functions: - HAL_ADC_Start(), HAL_ADC_Start_IT(), HAL_ADC_Start_DMA(), - HAL_ADCEx_InjectedStart(), HAL_ADCEx_InjectedStart_IT() or - HAL_ADCEx_MultiModeStart_DMA() when multimode feature is available. - - *** Channels to regular group configuration *** - ============================================ - [..] - (+) To configure the ADC regular group features, use - HAL_ADC_Init() and HAL_ADC_ConfigChannel() functions. - (+) To activate the continuous mode, use the HAL_ADC_Init() function. - (+) To read the ADC converted values, use the HAL_ADC_GetValue() function. - - *** DMA for regular configuration *** - ============================================================= - [..] - (+) To enable the DMA mode for regular group, use the - HAL_ADC_Start_DMA() function. - (+) To enable the generation of DMA requests continuously at the end of - the last DMA transfer, resort to DMAContinuousRequests parameter of - ADC handle initialization structure. - - - - @endverbatim - ****************************************************************************** - * @attention - * - * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @defgroup ADC ADC - * @brief ADC HAL module driver - * @{ - */ - -#ifdef HAL_ADC_MODULE_ENABLED - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ - -/** @defgroup ADC_Private_Constants ADC Private Constants - * @{ - */ - -#define ADC_CFGR_FIELDS_1 ((uint32_t)(ADC_CFGR_RES | ADC_CFGR_ALIGN |\ - ADC_CFGR_CONT | ADC_CFGR_OVRMOD |\ - ADC_CFGR_DISCEN | ADC_CFGR_DISCNUM |\ - ADC_CFGR_EXTEN | ADC_CFGR_EXTSEL)) /*!< ADC_CFGR fields of parameters that can be updated - when no regular conversion is on-going */ - -#define ADC_CFGR_FIELDS_2 ((uint32_t)(ADC_CFGR_DMACFG | ADC_CFGR_AUTDLY)) /*!< ADC_CFGR fields of parameters that can be updated when no conversion - (neither regular nor injected) is on-going */ - -#define ADC_CFGR2_FIELDS ((uint32_t)(ADC_CFGR2_ROVSE | ADC_CFGR2_OVSR |\ - ADC_CFGR2_OVSS | ADC_CFGR2_TROVS |\ - ADC_CFGR2_ROVSM)) /*!< ADC_CFGR2 fields of parameters that can be updated when no conversion - (neither regular nor injected) is on-going */ - -#define ADC_CFGR_WD_FIELDS ((uint32_t)(ADC_CFGR_AWD1SGL | ADC_CFGR_JAWD1EN | \ - ADC_CFGR_AWD1EN | ADC_CFGR_AWD1CH)) /*!< ADC_CFGR fields of Analog Watchdog parameters that can be updated when no - conversion (neither regular nor injected) is on-going */ - -#define ADC_OFR_FIELDS ((uint32_t)(ADC_OFR1_OFFSET1 | ADC_OFR1_OFFSET1_CH | ADC_OFR1_OFFSET1_EN)) /*!< ADC_OFR fields of parameters that can be updated when no conversion - (neither regular nor injected) is on-going */ - - - -/* Delay to wait before setting ADEN once ADCAL has been reset - must be at least 4 ADC clock cycles. - Assuming lowest ADC clock (140 KHz according to DS), this - 4 ADC clock cycles duration is equal to - 4 / 140,000 = 0.028 ms. - ADC_ENABLE_TIMEOUT set to 2 is a margin large enough to ensure - the 4 ADC clock cycles have elapsed while waiting for ADRDY - to become 1 */ - #define ADC_ENABLE_TIMEOUT ((uint32_t) 2) /*!< ADC enable time-out value */ - #define ADC_DISABLE_TIMEOUT ((uint32_t) 2) /*!< ADC disable time-out value */ - - - -/* Delay for ADC voltage regulator startup time */ -/* Maximum delay is 10 microseconds */ -/* (refer device RM, parameter Tadcvreg_stup). */ -#define ADC_STAB_DELAY_US ((uint32_t) 10) /*!< ADC voltage regulator startup time */ - - -/* Timeout to wait for current conversion on going to be completed. */ -/* Timeout fixed to worst case, for 1 channel. */ -/* - maximum sampling time (640.5 adc_clk) */ -/* - ADC resolution (Tsar 12 bits= 12.5 adc_clk) */ -/* - ADC clock with prescaler 256 */ -/* 653 * 256 = 167168 clock cycles max */ -/* Unit: cycles of CPU clock. */ -#define ADC_CONVERSION_TIME_MAX_CPU_CYCLES ((uint32_t) 167168) /*!< ADC conversion completion time-out value */ - - - - -/** - * @} - */ - -/* Private macro -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ -/* Exported functions --------------------------------------------------------*/ - -/** @defgroup ADC_Exported_Functions ADC Exported Functions - * @{ - */ - -/** @defgroup ADC_Exported_Functions_Group1 Initialization and de-initialization functions - * @brief Initialization and Configuration functions - * -@verbatim - =============================================================================== - ##### Initialization and de-initialization functions ##### - =============================================================================== - [..] This section provides functions allowing to: - (+) Initialize and configure the ADC. - (+) De-initialize the ADC. - -@endverbatim - * @{ - */ - -/** - * @brief Initialize the ADC peripheral and regular group according to - * parameters specified in structure "ADC_InitTypeDef". - * @note As prerequisite, ADC clock must be configured at RCC top level - * depending on possible clock sources: System/PLLSAI1/PLLSAI2 clocks - * or AHB clock. - * @note Possibility to update parameters on the fly: - * this function initializes the ADC MSP (HAL_ADC_MspInit()) only when - * coming from ADC state reset. Following calls to this function can - * be used to reconfigure some parameters of ADC_InitTypeDef - * structure on the fly, without modifying MSP configuration. If ADC - * MSP has to be modified again, HAL_ADC_DeInit() must be called - * before HAL_ADC_Init(). - * The setting of these parameters is conditioned by ADC state. - * For parameters constraints, see comments of structure - * "ADC_InitTypeDef". - * @note This function configures the ADC within 2 scopes: scope of entire - * ADC and scope of regular group. For parameters details, see comments - * of structure "ADC_InitTypeDef". - * @note Parameters related to common ADC registers (ADC clock mode) are set - * only if all ADCs are disabled. - * If this is not the case, these common parameters setting are - * bypassed without error reporting: it can be the intended behaviour in - * case of update of a parameter of ADC_InitTypeDef on the fly, - * without disabling the other ADCs. - * @param hadc: ADC handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc) -{ - HAL_StatusTypeDef tmp_status = HAL_OK; - - ADC_Common_TypeDef *tmpADC_Common; - uint32_t tmpCFGR = 0; - uint32_t wait_loop_index = 0; - - /* Check ADC handle */ - if(hadc == NULL) - { - return HAL_ERROR; - } - - /* Check the parameters */ - assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); - assert_param(IS_ADC_CLOCKPRESCALER(hadc->Init.ClockPrescaler)); - assert_param(IS_ADC_RESOLUTION(hadc->Init.Resolution)); - assert_param(IS_ADC_DATA_ALIGN(hadc->Init.DataAlign)); - assert_param(IS_ADC_SCAN_MODE(hadc->Init.ScanConvMode)); - assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode)); - assert_param(IS_ADC_EXTTRIG_EDGE(hadc->Init.ExternalTrigConvEdge)); - assert_param(IS_ADC_EXTTRIG(hadc->Init.ExternalTrigConv)); - assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DMAContinuousRequests)); - assert_param(IS_ADC_EOC_SELECTION(hadc->Init.EOCSelection)); - assert_param(IS_ADC_OVERRUN(hadc->Init.Overrun)); - assert_param(IS_FUNCTIONAL_STATE(hadc->Init.LowPowerAutoWait)); - assert_param(IS_FUNCTIONAL_STATE(hadc->Init.OversamplingMode)); - - if(hadc->Init.ScanConvMode != ADC_SCAN_DISABLE) - { - assert_param(IS_ADC_REGULAR_NB_CONV(hadc->Init.NbrOfConversion)); - assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DiscontinuousConvMode)); - - if (hadc->Init.DiscontinuousConvMode == ENABLE) - { - assert_param(IS_ADC_REGULAR_DISCONT_NUMBER(hadc->Init.NbrOfDiscConversion)); - } - } - - - /* DISCEN and CONT bits can't be set at the same time */ - assert_param(!((hadc->Init.DiscontinuousConvMode == ENABLE) && (hadc->Init.ContinuousConvMode == ENABLE))); - - - /* Actions performed only if ADC is coming from state reset: */ - /* - Initialization of ADC MSP */ - if (hadc->State == HAL_ADC_STATE_RESET) - { - /* Init the low level hardware */ - HAL_ADC_MspInit(hadc); - - /* Set ADC error code to none */ - ADC_CLEAR_ERRORCODE(hadc); - - /* Initialize Lock */ - hadc->Lock = HAL_UNLOCKED; - } - - - /* - Exit from deep-power-down mode and ADC voltage regulator enable */ - /* Exit deep power down mode if still in that state */ - if (HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_DEEPPWD)) - { - /* Exit deep power down mode */ - CLEAR_BIT(hadc->Instance->CR, ADC_CR_DEEPPWD); - - /* System was in deep power down mode, calibration must - be relaunched or a previously saved calibration factor - re-applied once the ADC voltage regulator is enabled */ - } - - - if (HAL_IS_BIT_CLR(hadc->Instance->CR, ADC_CR_ADVREGEN)) - { - /* Enable ADC internal voltage regulator then - wait for start-up time */ - SET_BIT(hadc->Instance->CR, ADC_CR_ADVREGEN); - wait_loop_index = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000)); - while(wait_loop_index != 0) - { - wait_loop_index--; - } - } - - - - - /* Verification that ADC voltage regulator is correctly enabled, whether */ - /* or not ADC is coming from state reset (if any potential problem of */ - /* clocking, voltage regulator would not be enabled). */ - if (HAL_IS_BIT_CLR(hadc->Instance->CR, ADC_CR_ADVREGEN)) - { - /* Update ADC state machine to error */ - SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); - - /* Set ADC error code to ADC IP internal error */ - SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); - - tmp_status = HAL_ERROR; - } - - - /* Configuration of ADC parameters if previous preliminary actions are */ - /* correctly completed and if there is no conversion on going on regular */ - /* group (ADC may already be enabled at this point if HAL_ADC_Init() is */ - /* called to update a parameter on the fly). */ - if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL) && - (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) ) - { - - /* Initialize the ADC state */ - SET_BIT(hadc->State, HAL_ADC_STATE_BUSY_INTERNAL); - - /* Configuration of common ADC parameters */ - - /* Pointer to the common control register */ - tmpADC_Common = ADC_COMMON_REGISTER(hadc); - - - /* Parameters update conditioned to ADC state: */ - /* Parameters that can be updated only when ADC is disabled: */ - /* - clock configuration */ - if ((ADC_IS_ENABLE(hadc) == RESET) && - (ADC_ANY_OTHER_ENABLED(hadc) == RESET) ) - { - /* Reset configuration of ADC common register CCR: */ - /* */ - /* - ADC clock mode and ACC prescaler (CKMODE and PRESC bits)are set */ - /* according to adc->Init.ClockPrescaler. It selects the clock */ - /* source and sets the clock division factor. */ - /* */ - /* Some parameters of this register are not reset, since they are set */ - /* by other functions and must be kept in case of usage of this */ - /* function on the fly (update of a parameter of ADC_InitTypeDef */ - /* without needing to reconfigure all other ADC groups/channels */ - /* parameters): */ - /* - when multimode feature is available, multimode-related */ - /* parameters: MDMA, DMACFG, DELAY, DUAL (set by API */ - /* HAL_ADCEx_MultiModeConfigChannel() ) */ - /* - internal measurement paths: Vbat, temperature sensor, Vref */ - /* (set into HAL_ADC_ConfigChannel() or */ - /* HAL_ADCEx_InjectedConfigChannel() ) */ - - MODIFY_REG(tmpADC_Common->CCR, ADC_CCR_PRESC|ADC_CCR_CKMODE, hadc->Init.ClockPrescaler); - } - - - /* Configuration of ADC: */ - /* - resolution Init.Resolution */ - /* - data alignment Init.DataAlign */ - /* - external trigger to start conversion Init.ExternalTrigConv */ - /* - external trigger polarity Init.ExternalTrigConvEdge */ - /* - continuous conversion mode Init.ContinuousConvMode */ - /* - overrun Init.Overrun */ - /* - discontinuous mode Init.DiscontinuousConvMode */ - /* - discontinuous mode channel count Init.NbrOfDiscConversion */ - tmpCFGR = ( ADC_CFGR_CONTINUOUS(hadc->Init.ContinuousConvMode) | - hadc->Init.Overrun | - hadc->Init.DataAlign | - hadc->Init.Resolution | - ADC_CFGR_REG_DISCONTINUOUS(hadc->Init.DiscontinuousConvMode) | - ADC_CFGR_DISCONTINUOUS_NUM(hadc->Init.NbrOfDiscConversion) ); - - /* Enable external trigger if trigger selection is different of software */ - /* start. */ - /* - external trigger to start conversion Init.ExternalTrigConv */ - /* - external trigger polarity Init.ExternalTrigConvEdge */ - /* Note: parameter ExternalTrigConvEdge set to "trigger edge none" is */ - /* equivalent to software start. */ - if ((hadc->Init.ExternalTrigConv != ADC_SOFTWARE_START) - && (hadc->Init.ExternalTrigConvEdge != ADC_EXTERNALTRIGCONVEDGE_NONE)) - { - tmpCFGR |= ( hadc->Init.ExternalTrigConv | hadc->Init.ExternalTrigConvEdge); - } - - /* Update Configuration Register CFGR */ - MODIFY_REG(hadc->Instance->CFGR, ADC_CFGR_FIELDS_1, tmpCFGR); - - - /* Parameters update conditioned to ADC state: */ - /* Parameters that can be updated when ADC is disabled or enabled without */ - /* conversion on going on regular and injected groups: */ - /* - DMA continuous request Init.DMAContinuousRequests */ - /* - LowPowerAutoWait feature Init.LowPowerAutoWait */ - /* - Oversampling parameters Init.Oversampling */ - if (ADC_IS_CONVERSION_ONGOING_REGULAR_INJECTED(hadc) == RESET) - { - tmpCFGR = ( ADC_CFGR_AUTOWAIT(hadc->Init.LowPowerAutoWait) | - ADC_CFGR_DMACONTREQ(hadc->Init.DMAContinuousRequests) ); - - MODIFY_REG(hadc->Instance->CFGR, ADC_CFGR_FIELDS_2, tmpCFGR); - - - if (hadc->Init.OversamplingMode == ENABLE) - { - assert_param(IS_ADC_OVERSAMPLING_RATIO(hadc->Init.Oversampling.Ratio)); - assert_param(IS_ADC_RIGHT_BIT_SHIFT(hadc->Init.Oversampling.RightBitShift)); - assert_param(IS_ADC_TRIGGERED_OVERSAMPLING_MODE(hadc->Init.Oversampling.TriggeredMode)); - assert_param(IS_ADC_REGOVERSAMPLING_MODE(hadc->Init.Oversampling.OversamplingStopReset)); - - if ((hadc->Init.ExternalTrigConv == ADC_SOFTWARE_START) - || (hadc->Init.ExternalTrigConvEdge == ADC_EXTERNALTRIGCONVEDGE_NONE)) - { - /* Multi trigger is not applicable to software-triggered conversions */ - assert_param((hadc->Init.Oversampling.TriggeredMode == ADC_TRIGGEREDMODE_SINGLE_TRIGGER)); - } - - - /* Configuration of Oversampler: */ - /* - Oversampling Ratio */ - /* - Right bit shift */ - /* - Triggered mode */ - /* - Oversampling mode (continued/resumed) */ - MODIFY_REG(hadc->Instance->CFGR2, ADC_CFGR2_FIELDS, - ADC_CFGR2_ROVSE | - hadc->Init.Oversampling.Ratio | - hadc->Init.Oversampling.RightBitShift | - hadc->Init.Oversampling.TriggeredMode | - hadc->Init.Oversampling.OversamplingStopReset); - } - else - { - /* Disable Regular OverSampling */ - CLEAR_BIT( hadc->Instance->CFGR2, ADC_CFGR2_ROVSE); - } - - - } /* if (ADC_IS_CONVERSION_ONGOING_REGULAR_INJECTED(hadc) == RESET) */ - - - - - /* Configuration of regular group sequencer: */ - /* - if scan mode is disabled, regular channels sequence length is set to */ - /* 0x00: 1 channel converted (channel on regular rank 1) */ - /* Parameter "NbrOfConversion" is discarded. */ - /* Note: Scan mode is not present by hardware on this device, but */ - /* emulated by software for alignment over all STM32 devices. */ - /* - if scan mode is enabled, regular channels sequence length is set to */ - /* parameter "NbrOfConversion" */ - - if (hadc->Init.ScanConvMode == ADC_SCAN_ENABLE) - { - /* Set number of ranks in regular group sequencer */ - MODIFY_REG(hadc->Instance->SQR1, ADC_SQR1_L, (hadc->Init.NbrOfConversion - (uint8_t)1)); - } - else - { - CLEAR_BIT(hadc->Instance->SQR1, ADC_SQR1_L); - } - - - /* Initialize the ADC state */ - /* Clear HAL_ADC_STATE_BUSY_INTERNAL bit, set HAL_ADC_STATE_READY bit */ - ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_BUSY_INTERNAL, HAL_ADC_STATE_READY); - } - else - { - /* Update ADC state machine to error */ - SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); - - tmp_status = HAL_ERROR; - } /* if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL) && (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) ) */ - - - /* Return function status */ - return tmp_status; - -} - -/** - * @brief Deinitialize the ADC peripheral registers to their default reset - * values, with deinitialization of the ADC MSP. - * @note Keep in mind that all ADCs use the same clock: disabling - * the clock will reset all ADCs. - * @note By default, HAL_ADC_DeInit() sets DEEPPWD: this saves more power by - * reducing the leakage currents and is particularly interesting before - * entering STOP 1 or STOP 2 modes. - * @param hadc: ADC handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_ADC_DeInit(ADC_HandleTypeDef* hadc) -{ - /* Check ADC handle */ - if(hadc == NULL) - { - return HAL_ERROR; - } - - /* Check the parameters */ - assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); - - /* Change ADC state */ - SET_BIT(hadc->State, HAL_ADC_STATE_BUSY_INTERNAL); - - /* Stop potential conversion on going, on regular and injected groups */ - /* No check on ADC_ConversionStop() return status, if the conversion - stop failed, it is up to HAL_ADC_MspDeInit() to reset the ADC IP */ - ADC_ConversionStop(hadc, ADC_REGULAR_INJECTED_GROUP); - - - /* Disable ADC peripheral if conversions are effectively stopped */ - /* Flush register JSQR: reset the queue sequencer when injected */ - /* queue sequencer is enabled and ADC disabled. */ - /* The software and hardware triggers of the injected sequence are both */ - /* internally disabled just after the completion of the last valid */ - /* injected sequence. */ - SET_BIT(hadc->Instance->CFGR, ADC_CFGR_JQM); - - /* Disable the ADC peripheral */ - /* No check on ADC_Disable() return status, if the ADC disabling process - failed, it is up to HAL_ADC_MspDeInit() to reset the ADC IP */ - ADC_Disable(hadc); - - - /* ========== Reset ADC registers ========== */ - /* Reset register IER */ - __HAL_ADC_DISABLE_IT(hadc, (ADC_IT_AWD3 | ADC_IT_AWD2 | ADC_IT_AWD1 | - ADC_IT_JQOVF | ADC_IT_OVR | - ADC_IT_JEOS | ADC_IT_JEOC | - ADC_IT_EOS | ADC_IT_EOC | - ADC_IT_EOSMP | ADC_IT_RDY ) ); - - /* Reset register ISR */ - __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_AWD3 | ADC_FLAG_AWD2 | ADC_FLAG_AWD1 | - ADC_FLAG_JQOVF | ADC_FLAG_OVR | - ADC_FLAG_JEOS | ADC_FLAG_JEOC | - ADC_FLAG_EOS | ADC_FLAG_EOC | - ADC_FLAG_EOSMP | ADC_FLAG_RDY ) ); - - /* Reset register CR */ - /* Bits ADC_CR_JADSTP, ADC_CR_ADSTP, ADC_CR_JADSTART, ADC_CR_ADSTART, - ADC_CR_ADCAL, ADC_CR_ADDIS and ADC_CR_ADEN are in access mode "read-set": - no direct reset applicable. - Update CR register to reset value where doable by software */ - CLEAR_BIT(hadc->Instance->CR, ADC_CR_ADVREGEN | ADC_CR_ADCALDIF); - SET_BIT(hadc->Instance->CR, ADC_CR_DEEPPWD); - - /* Reset register CFGR */ - CLEAR_BIT(hadc->Instance->CFGR, ADC_CFGR_AWD1CH | ADC_CFGR_JAUTO | ADC_CFGR_JAWD1EN | - ADC_CFGR_AWD1EN | ADC_CFGR_AWD1SGL | ADC_CFGR_JQM | - ADC_CFGR_JDISCEN | ADC_CFGR_DISCNUM | ADC_CFGR_DISCEN | - ADC_CFGR_AUTDLY | ADC_CFGR_CONT | ADC_CFGR_OVRMOD | - ADC_CFGR_EXTEN | ADC_CFGR_EXTSEL | ADC_CFGR_ALIGN | - ADC_CFGR_RES | ADC_CFGR_DMACFG | ADC_CFGR_DMAEN ); - SET_BIT(hadc->Instance->CFGR, ADC_CFGR_JQDIS); - - /* Reset register CFGR2 */ - CLEAR_BIT(hadc->Instance->CFGR2, ADC_CFGR2_ROVSM | ADC_CFGR2_TROVS | ADC_CFGR2_OVSS | - ADC_CFGR2_OVSR | ADC_CFGR2_JOVSE | ADC_CFGR2_ROVSE ); - - /* Reset register SMPR1 */ - CLEAR_BIT(hadc->Instance->SMPR1, ADC_SMPR1_SMP9 | ADC_SMPR1_SMP8 | ADC_SMPR1_SMP7 | - ADC_SMPR1_SMP6 | ADC_SMPR1_SMP5 | ADC_SMPR1_SMP4 | - ADC_SMPR1_SMP3 | ADC_SMPR1_SMP2 | ADC_SMPR1_SMP1 | - ADC_SMPR1_SMP0 ); - - /* Reset register SMPR2 */ - CLEAR_BIT(hadc->Instance->SMPR2, ADC_SMPR2_SMP18 | ADC_SMPR2_SMP17 | ADC_SMPR2_SMP16 | - ADC_SMPR2_SMP15 | ADC_SMPR2_SMP14 | ADC_SMPR2_SMP13 | - ADC_SMPR2_SMP12 | ADC_SMPR2_SMP11 | ADC_SMPR2_SMP10 ); - - /* Reset register TR1 */ - CLEAR_BIT(hadc->Instance->TR1, ADC_TR1_HT1 | ADC_TR1_LT1); - - /* Reset register TR2 */ - CLEAR_BIT(hadc->Instance->TR2, ADC_TR2_HT2 | ADC_TR2_LT2); - - /* Reset register TR3 */ - CLEAR_BIT(hadc->Instance->TR3, ADC_TR3_HT3 | ADC_TR3_LT3); - - /* Reset register SQR1 */ - CLEAR_BIT(hadc->Instance->SQR1, ADC_SQR1_SQ4 | ADC_SQR1_SQ3 | ADC_SQR1_SQ2 | - ADC_SQR1_SQ1 | ADC_SQR1_L); - - /* Reset register SQR2 */ - CLEAR_BIT(hadc->Instance->SQR2, ADC_SQR2_SQ9 | ADC_SQR2_SQ8 | ADC_SQR2_SQ7 | - ADC_SQR2_SQ6 | ADC_SQR2_SQ5); - - /* Reset register SQR3 */ - CLEAR_BIT(hadc->Instance->SQR3, ADC_SQR3_SQ14 | ADC_SQR3_SQ13 | ADC_SQR3_SQ12 | - ADC_SQR3_SQ11 | ADC_SQR3_SQ10); - - /* Reset register SQR4 */ - CLEAR_BIT(hadc->Instance->SQR4, ADC_SQR4_SQ16 | ADC_SQR4_SQ15); - - /* Register JSQR was reset when the ADC was disabled */ - - /* Reset register DR */ - /* bits in access mode read only, no direct reset applicable*/ - - /* Reset register OFR1 */ - CLEAR_BIT(hadc->Instance->OFR1, ADC_OFR1_OFFSET1_EN | ADC_OFR1_OFFSET1_CH | ADC_OFR1_OFFSET1); - /* Reset register OFR2 */ - CLEAR_BIT(hadc->Instance->OFR2, ADC_OFR2_OFFSET2_EN | ADC_OFR2_OFFSET2_CH | ADC_OFR2_OFFSET2); - /* Reset register OFR3 */ - CLEAR_BIT(hadc->Instance->OFR3, ADC_OFR3_OFFSET3_EN | ADC_OFR3_OFFSET3_CH | ADC_OFR3_OFFSET3); - /* Reset register OFR4 */ - CLEAR_BIT(hadc->Instance->OFR4, ADC_OFR4_OFFSET4_EN | ADC_OFR4_OFFSET4_CH | ADC_OFR4_OFFSET4); - - /* Reset registers JDR1, JDR2, JDR3, JDR4 */ - /* bits in access mode read only, no direct reset applicable*/ - - /* Reset register AWD2CR */ - CLEAR_BIT(hadc->Instance->AWD2CR, ADC_AWD2CR_AWD2CH); - - /* Reset register AWD3CR */ - CLEAR_BIT(hadc->Instance->AWD3CR, ADC_AWD3CR_AWD3CH); - - /* Reset register DIFSEL */ - CLEAR_BIT(hadc->Instance->DIFSEL, ADC_DIFSEL_DIFSEL); - - /* Reset register CALFACT */ - CLEAR_BIT(hadc->Instance->CALFACT, ADC_CALFACT_CALFACT_D | ADC_CALFACT_CALFACT_S); - - - - - - - /* ========== Reset common ADC registers ========== */ - - /* Software is allowed to change common parameters only when all the other - ADCs are disabled. */ - if ((ADC_IS_ENABLE(hadc) == RESET) && - (ADC_ANY_OTHER_ENABLED(hadc) == RESET) ) - { - /* Reset configuration of ADC common register CCR: - - clock mode: CKMODE, PRESCEN - - multimode related parameters (when this feature is available): MDMA, - DMACFG, DELAY, DUAL (set by HAL_ADCEx_MultiModeConfigChannel() API) - - internal measurement paths: Vbat, temperature sensor, Vref (set into - HAL_ADC_ConfigChannel() or HAL_ADCEx_InjectedConfigChannel() ) - */ - ADC_CLEAR_COMMON_CONTROL_REGISTER(hadc); - } - - /* DeInit the low level hardware. - - For example: - __HAL_RCC_ADC_FORCE_RESET(); - __HAL_RCC_ADC_RELEASE_RESET(); - __HAL_RCC_ADC_CLK_DISABLE(); - - Keep in mind that all ADCs use the same clock: disabling - the clock will reset all ADCs. - - */ - HAL_ADC_MspDeInit(hadc); - - /* Set ADC error code to none */ - ADC_CLEAR_ERRORCODE(hadc); - - /* Reset injected channel configuration parameters */ - hadc->InjectionConfig.ContextQueue = 0; - hadc->InjectionConfig.ChannelCount = 0; - - /* Change ADC state */ - hadc->State = HAL_ADC_STATE_RESET; - - /* Process unlocked */ - __HAL_UNLOCK(hadc); - - - /* Return function status */ - return HAL_OK; - -} - -/** - * @brief Initialize the ADC MSP. - * @param hadc: ADC handle - * @retval None - */ -__weak void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc) -{ - /* NOTE : This function should not be modified. When the callback is needed, - function HAL_ADC_MspInit must be implemented in the user file. - */ -} - -/** - * @brief DeInitialize the ADC MSP. - * @param hadc: ADC handle - * @note All ADCs use the same clock: disabling the clock will reset all ADCs. - * @retval None - */ -__weak void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc) -{ - /* NOTE : This function should not be modified. When the callback is needed, - function HAL_ADC_MspDeInit must be implemented in the user file. - */ -} - -/** - * @} - */ - -/** @defgroup ADC_Exported_Functions_Group2 Input and Output operation functions - * @brief IO operation functions - * -@verbatim - =============================================================================== - ##### IO operation functions ##### - =============================================================================== - [..] This section provides functions allowing to: - (+) Start conversion of regular group. - (+) Stop conversion of regular group. - (+) Poll for conversion complete on regular group. - (+) Poll for conversion event. - (+) Get result of regular channel conversion. - (+) Start conversion of regular group and enable interruptions. - (+) Stop conversion of regular group and disable interruptions. - (+) Handle ADC interrupt request - (+) Start conversion of regular group and enable DMA transfer. - (+) Stop conversion of regular group and disable ADC DMA transfer. - -@endverbatim - * @{ - */ - -/** - * @brief Enable ADC, start conversion of regular group. - * @note Interruptions enabled in this function: None. - * @note Case of multimode enabled (when multimode feature is available): - * if ADC is Slave, ADC is enabled but conversion is not started, - * if ADC is master, ADC is enabled and multimode conversion is started. - * @param hadc: ADC handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_ADC_Start(ADC_HandleTypeDef* hadc) -{ - ADC_TypeDef *tmpADC_Master; - HAL_StatusTypeDef tmp_status = HAL_OK; - - /* Check the parameters */ - assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); - - - /* if a regular conversion is already on-going (i.e. ADSTART is set), - don't restart the conversion. */ - if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc)) - { - return HAL_BUSY; - } - else - { - /* Process locked */ - __HAL_LOCK(hadc); - - /* Enable the ADC peripheral */ - tmp_status = ADC_Enable(hadc); - - /* Start conversion if ADC is effectively enabled */ - if (tmp_status == HAL_OK) - { - /* State machine update: Check if an injected conversion is ongoing */ - if (HAL_IS_BIT_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY)) - { - /* Reset ADC error code fields related to regular conversions only */ - CLEAR_BIT(hadc->ErrorCode, (HAL_ADC_ERROR_OVR|HAL_ADC_ERROR_DMA)); - } - else - { - /* Set ADC error code to none */ - ADC_CLEAR_ERRORCODE(hadc); - } - /* Clear HAL_ADC_STATE_READY and regular conversion results bits, set HAL_ADC_STATE_REG_BUSY bit */ - ADC_STATE_CLR_SET(hadc->State, (HAL_ADC_STATE_READY|HAL_ADC_STATE_REG_EOC|HAL_ADC_STATE_REG_OVR|HAL_ADC_STATE_REG_EOSMP), HAL_ADC_STATE_REG_BUSY); - - /* Reset HAL_ADC_STATE_MULTIMODE_SLAVE bit - - by default if ADC is Master or Independent or if multimode feature is not available - - if multimode setting is set to independent mode (no dual regular or injected conversions are configured) */ - if (ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc)) - { - CLEAR_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE); - } - - /* Clear regular group conversion flag and overrun flag */ - /* (To ensure of no unknown state from potential previous ADC operations) */ - __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS | ADC_FLAG_OVR)); - - /* Enable conversion of regular group. */ - /* If software start has been selected, conversion starts immediately. */ - /* If external trigger has been selected, conversion starts at next */ - /* trigger event. */ - /* Case of multimode enabled (when multimode feature is available): */ - /* - if ADC is slave and dual regular conversions are enabled, ADC is */ - /* enabled only (conversion is not started), */ - /* - if ADC is master, ADC is enabled and conversion is started. */ - if (ADC_INDEPENDENT_OR_NONMULTIMODEREGULAR_SLAVE(hadc)) - { - /* Multimode feature is not available or ADC Instance is Independent or Master, - or is not Slave ADC with dual regular conversions enabled. - Then, set HAL_ADC_STATE_INJ_BUSY bit and reset HAL_ADC_STATE_INJ_EOC bit if JAUTO is set. */ - if (READ_BIT(hadc->Instance->CFGR, ADC_CFGR_JAUTO) != RESET) - { - ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY); - } - /* Process unlocked */ - __HAL_UNLOCK(hadc); - /* Start ADC */ - SET_BIT(hadc->Instance->CR, ADC_CR_ADSTART); - } - else - { - SET_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE); - /* if Master ADC JAUTO bit is set, update Slave State in setting - HAL_ADC_STATE_INJ_BUSY bit and in resetting HAL_ADC_STATE_INJ_EOC bit */ - tmpADC_Master = ADC_MASTER_REGISTER(hadc); - if (READ_BIT(tmpADC_Master->CFGR, ADC_CFGR_JAUTO) != RESET) - { - ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY); - - } /* if (READ_BIT(tmpADC_Master->CFGR, ADC_CFGR_JAUTO) != RESET) */ - /* Process unlocked */ - __HAL_UNLOCK(hadc); - } /* if (ADC_INDEPENDENT_OR_NONMULTIMODEREGULAR_SLAVE(hadc)) */ - } - else - { - /* Process unlocked */ - __HAL_UNLOCK(hadc); - } - - /* Return function status */ - return tmp_status; - } -} - -/** - * @brief Stop ADC conversion of regular and injected groups, disable ADC peripheral. - * @param hadc: ADC handle - * @retval HAL status. - */ -HAL_StatusTypeDef HAL_ADC_Stop(ADC_HandleTypeDef* hadc) -{ - HAL_StatusTypeDef tmp_status = HAL_OK; - - /* Check the parameters */ - assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); - - /* Process locked */ - __HAL_LOCK(hadc); - - /* 1. Stop potential regular and injected on-going conversions */ - tmp_status = ADC_ConversionStop(hadc, ADC_REGULAR_INJECTED_GROUP); - - /* Disable ADC peripheral if conversions are effectively stopped */ - if (tmp_status == HAL_OK) - { - /* 2. Disable the ADC peripheral */ - tmp_status = ADC_Disable(hadc); - - /* Check if ADC is effectively disabled */ - if (tmp_status == HAL_OK) - { - /* Change ADC state */ - /* Clear HAL_ADC_STATE_REG_BUSY and HAL_ADC_STATE_INJ_BUSY bits, set HAL_ADC_STATE_READY bit */ - ADC_STATE_CLR_SET(hadc->State, (HAL_ADC_STATE_REG_BUSY|HAL_ADC_STATE_INJ_BUSY), HAL_ADC_STATE_READY); - } - } - - /* Process unlocked */ - __HAL_UNLOCK(hadc); - - /* Return function status */ - return tmp_status; -} - - - -/** - * @brief Wait for regular group conversion to be completed. - * @param hadc: ADC handle - * @param Timeout: Timeout value in millisecond. - * @note Depending on hadc->Init.EOCSelection, EOS or EOC is - * checked and cleared depending on AUTDLY bit status. - * @note HAL_ADC_PollForConversion() returns HAL_ERROR if EOC is polled in a - * DMA-managed conversions configuration: indeed, EOC is immediately - * reset by the DMA reading the DR register when the converted data is - * available. Therefore, EOC is set for a too short period to be - * reliably polled. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_ADC_PollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout) -{ - uint32_t tickstart; - uint32_t tmp_Flag_End = 0x00; - ADC_TypeDef *tmpADC_Master; - uint32_t tmp_cfgr = 0x00; - uint32_t tmp_eos_raised = 0x01; /* by default, assume that EOS is set, - tmp_eos_raised will be corrected - accordingly during API execution */ - - /* Check the parameters */ - assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); - - /* If end of sequence selected */ - if (hadc->Init.EOCSelection == ADC_EOC_SEQ_CONV) - { - tmp_Flag_End = ADC_FLAG_EOS; - } - else /* end of conversion selected */ - { - /* Check that the ADC is not in a DMA-based configuration. Otherwise, - returns an error. */ - - /* Check whether dual regular conversions are disabled or unavailable. */ - if (ADC_IS_DUAL_REGULAR_CONVERSION_ENABLE(hadc) == RESET) - { - /* Check DMAEN bit in handle ADC CFGR register */ - if (READ_BIT(hadc->Instance->CFGR, ADC_CFGR_DMAEN) != RESET) - { - SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); - return HAL_ERROR; - } - } - else - { - /* Else need to check Common register CCR MDMA bit field. */ - if (ADC_MULTIMODE_DMA_ENABLED()) - { - SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); - return HAL_ERROR; - } - } - - /* no DMA transfer detected, polling ADC_FLAG_EOC is possible */ - tmp_Flag_End = ADC_FLAG_EOC; - } - - /* Get timeout */ - tickstart = HAL_GetTick(); - - /* Wait until End of Conversion or Sequence flag is raised */ - while (HAL_IS_BIT_CLR(hadc->Instance->ISR, tmp_Flag_End)) - { - /* Check if timeout is disabled (set to infinite wait) */ - if(Timeout != HAL_MAX_DELAY) - { - if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout)) - { - SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT); - return HAL_TIMEOUT; - } - } - } - - /* Next, to clear the polled flag as well as to update the handle State, - EOS is checked and the relevant configuration register is retrieved. */ - /* 1. Check whether or not EOS is set */ - if (HAL_IS_BIT_CLR(hadc->Instance->ISR, ADC_FLAG_EOS)) - { - tmp_eos_raised = 0; - } - /* 2. Check whether or not hadc is the handle of a Slave ADC with dual - regular conversions enabled. */ - if (ADC_INDEPENDENT_OR_NONMULTIMODEREGULAR_SLAVE(hadc)) - { - /* Retrieve handle ADC CFGR register */ - tmp_cfgr = READ_REG(hadc->Instance->CFGR); - } - else - { - /* Retrieve Master ADC CFGR register */ - tmpADC_Master = ADC_MASTER_REGISTER(hadc); - tmp_cfgr = READ_REG(tmpADC_Master->CFGR); - } - - /* Clear polled flag */ - if (tmp_Flag_End == ADC_FLAG_EOS) - { - __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOS); - } - else - { - - /* Clear end of conversion EOC flag of regular group if low power feature */ - /* "LowPowerAutoWait " is disabled, to not interfere with this feature */ - /* until data register is read using function HAL_ADC_GetValue(). */ - /* For regular groups, no new conversion will start before EOC is cleared.*/ - /* Note that 1. reading DR clears EOC. */ - /* 2. in multimode with dual regular conversions enabled (when */ - /* multimode feature is available), Master AUTDLY bit is */ - /* checked. */ - if (READ_BIT (tmp_cfgr, ADC_CFGR_AUTDLY) == RESET) - { - __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOC); - } - } - - - /* Update ADC state machine */ - SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC); - /* If 1. EOS is set - 2. conversions are software-triggered - 3. CONT bit is reset (that of handle ADC or Master ADC if applicable) - Then regular conversions are over and HAL_ADC_STATE_REG_BUSY can be reset. - 4. additionally, if no injected conversions are on-going, HAL_ADC_STATE_READY - can be set */ - if ((tmp_eos_raised) - && (ADC_IS_SOFTWARE_START_REGULAR(hadc)) - && (READ_BIT (tmp_cfgr, ADC_CFGR_CONT) == RESET)) - { - CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY); - /* If no injected conversion on-going, set HAL_ADC_STATE_READY bit */ - if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_INJ_BUSY)) - { - SET_BIT(hadc->State, HAL_ADC_STATE_READY); - } - } - - - /* Return API HAL status */ - return HAL_OK; -} - -/** - * @brief Poll for ADC event. - * @param hadc: ADC handle - * @param EventType: the ADC event type. - * This parameter can be one of the following values: - * @arg ADC_EOSMP_EVENT: ADC End of Sampling event - * @arg ADC_AWD_EVENT: ADC Analog watchdog 1 event - * @arg ADC_AWD2_EVENT: ADC Analog watchdog 2 event - * @arg ADC_AWD3_EVENT: ADC Analog watchdog 3 event - * @arg ADC_OVR_EVENT: ADC Overrun event - * @arg ADC_JQOVF_EVENT: ADC Injected context queue overflow event - * @param Timeout: Timeout value in millisecond. - * @note The relevant flag is cleared if found to be set, except for ADC_FLAG_OVR. - * Indeed, the latter is reset only if hadc->Init.Overrun field is set - * to ADC_OVR_DATA_OVERWRITTEN. Otherwise, DR may be potentially overwritten - * by a new converted data as soon as OVR is cleared. - * To reset OVR flag once the preserved data is retrieved, the user can resort - * to macro __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR); - * @retval HAL status - */ -HAL_StatusTypeDef HAL_ADC_PollForEvent(ADC_HandleTypeDef* hadc, uint32_t EventType, uint32_t Timeout) -{ - uint32_t tickstart; - - /* Check the parameters */ - assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); - assert_param(IS_ADC_EVENT_TYPE(EventType)); - - tickstart = HAL_GetTick(); - - /* Check selected event flag */ - while(__HAL_ADC_GET_FLAG(hadc, EventType) == RESET) - { - /* Check if timeout is disabled (set to infinite wait) */ - if(Timeout != HAL_MAX_DELAY) - { - if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout)) - { - /* Update ADC state machine to timeout */ - SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT); - - /* Process unlocked */ - __HAL_UNLOCK(hadc); - - return HAL_TIMEOUT; - } - } - } - - - switch(EventType) - { - /* End Of Sampling event */ - case ADC_EOSMP_EVENT: - /* Change ADC state */ - SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOSMP); - - /* Clear the End Of Sampling flag */ - __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOSMP); - - break; - - /* Analog watchdog (level out of window) event */ - /* Note: In case of several analog watchdog enabled, if needed to know */ - /* which one triggered and on which ADCx, test ADC state of Analog Watchdog */ - /* flags HAL_ADC_STATE_AWD/2/3 function. */ - /* For example: "if (HAL_ADC_GetState(hadc1) == HAL_ADC_STATE_AWD) " */ - /* "if (HAL_ADC_GetState(hadc1) == HAL_ADC_STATE_AWD2)" */ - /* "if (HAL_ADC_GetState(hadc1) == HAL_ADC_STATE_AWD3)" */ - case ADC_AWD_EVENT: - /* Change ADC state */ - SET_BIT(hadc->State, HAL_ADC_STATE_AWD1); - - /* Clear ADC analog watchdog flag */ - __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD1); - - break; - - /* Check analog watchdog 2 flag */ - case ADC_AWD2_EVENT: - /* Change ADC state */ - SET_BIT(hadc->State, HAL_ADC_STATE_AWD2); - - /* Clear ADC analog watchdog flag */ - __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD2); - - break; - - /* Check analog watchdog 3 flag */ - case ADC_AWD3_EVENT: - /* Change ADC state */ - SET_BIT(hadc->State, HAL_ADC_STATE_AWD3); - - /* Clear ADC analog watchdog flag */ - __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD3); - - break; - - /* Injected context queue overflow event */ - case ADC_JQOVF_EVENT: - /* Change ADC state */ - SET_BIT(hadc->State, HAL_ADC_STATE_INJ_JQOVF); - - /* Set ADC error code to Injected context queue overflow */ - SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_JQOVF); - - /* Clear ADC Injected context queue overflow flag */ - __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JQOVF); - - break; - - /* Overrun event */ - default: /* Case ADC_OVR_EVENT */ - /* If overrun is set to overwrite previous data, overrun event is not */ - /* considered as an error. */ - /* (cf ref manual "Managing conversions without using the DMA and without */ - /* overrun ") */ - if (hadc->Init.Overrun == ADC_OVR_DATA_PRESERVED) - { - /* Change ADC state */ - SET_BIT(hadc->State, HAL_ADC_STATE_REG_OVR); - - /* Set ADC error code to overrun */ - SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_OVR); - } - else - { - /* Clear ADC Overrun flag only if Overrun is set to ADC_OVR_DATA_OVERWRITTEN - otherwise, DR is potentially overwritten by new converted data as soon - as OVR is cleared. */ - __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR); - } - break; - } - - /* Return API HAL status */ - return HAL_OK; -} - - -/** - * @brief Enable ADC, start conversion of regular group with interruption. - * @note Interruptions enabled in this function according to initialization - * setting : EOC (end of conversion), EOS (end of sequence), - * OVR overrun. - * Each of these interruptions has its dedicated callback function. - * @note Case of multimode enabled (when multimode feature is available): - * HAL_ADC_Start_IT() must be called for ADC Slave first, then for - * ADC Master. - * For ADC Slave, ADC is enabled only (conversion is not started). - * For ADC Master, ADC is enabled and multimode conversion is started. - * @note To guarantee a proper reset of all interruptions once all the needed - * conversions are obtained, HAL_ADC_Stop_IT() must be called to ensure - * a correct stop of the IT-based conversions. - * @note By default, HAL_ADC_Start_IT() doesn't enable the End Of Sampling - * interruption. If required (e.g. in case of oversampling with trigger - * mode), the user must - * 1. first clear the EOSMP flag if set with macro __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOSMP) - * 2. then enable the EOSMP interrupt with macro __HAL_ADC_ENABLE_IT(hadc, ADC_IT_EOSMP) - * before calling HAL_ADC_Start_IT(). - * @param hadc: ADC handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_ADC_Start_IT(ADC_HandleTypeDef* hadc) -{ - HAL_StatusTypeDef tmp_status = HAL_OK; - ADC_TypeDef *tmpADC_Master; - - /* Check the parameters */ - assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); - - /* if a regular conversion is already on-going (i.e. ADSTART is set), - don't restart the conversion. */ - if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc)) - { - return HAL_BUSY; - } - else - { - /* Process locked */ - __HAL_LOCK(hadc); - - /* Enable the ADC peripheral */ - tmp_status = ADC_Enable(hadc); - - /* Start conversion if ADC is effectively enabled */ - if (tmp_status == HAL_OK) - { - /* State machine update: Check if an injected conversion is ongoing */ - if (HAL_IS_BIT_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY)) - { - /* Reset ADC error code fields related to regular conversions only */ - CLEAR_BIT(hadc->ErrorCode, (HAL_ADC_ERROR_OVR|HAL_ADC_ERROR_DMA)); - } - else - { - /* Set ADC error code to none */ - ADC_CLEAR_ERRORCODE(hadc); - } - /* Clear HAL_ADC_STATE_READY and regular conversion results bits, set HAL_ADC_STATE_REG_BUSY bit */ - ADC_STATE_CLR_SET(hadc->State, (HAL_ADC_STATE_READY|HAL_ADC_STATE_REG_EOC|HAL_ADC_STATE_REG_OVR|HAL_ADC_STATE_REG_EOSMP), HAL_ADC_STATE_REG_BUSY); - - /* Reset HAL_ADC_STATE_MULTIMODE_SLAVE bit - - by default if ADC is Master or Independent or if multimode feature is not available - - if MultiMode setting is set to independent mode (no dual regular or injected conversions are configured) */ - if (ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc)) - { - CLEAR_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE); - } - - /* Clear regular group conversion flag and overrun flag */ - /* (To ensure of no unknown state from potential previous ADC operations) */ - __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS | ADC_FLAG_OVR)); - - /* By default, disable all interruptions before enabling the desired ones */ - __HAL_ADC_DISABLE_IT(hadc, (ADC_IT_EOC | ADC_IT_EOS | ADC_IT_OVR)); - - /* Enable required interruptions */ - switch(hadc->Init.EOCSelection) - { - case ADC_EOC_SEQ_CONV: - __HAL_ADC_ENABLE_IT(hadc, ADC_IT_EOS); - break; - /* case ADC_EOC_SINGLE_CONV */ - default: - __HAL_ADC_ENABLE_IT(hadc, ADC_IT_EOC); - break; - } - - /* If hadc->Init.Overrun is set to ADC_OVR_DATA_PRESERVED, only then is - ADC_IT_OVR enabled; otherwise data overwrite is considered as normal - behavior and no CPU time is lost for a non-processed interruption */ - if (hadc->Init.Overrun == ADC_OVR_DATA_PRESERVED) - { - __HAL_ADC_ENABLE_IT(hadc, ADC_IT_OVR); - } - - /* Enable conversion of regular group. */ - /* If software start has been selected, conversion starts immediately. */ - /* If external trigger has been selected, conversion starts at next */ - /* trigger event. */ - /* Case of multimode enabled (when multimode feature is available): */ - /* - if ADC is slave and dual regular conversions are enabled, ADC is */ - /* enabled only (conversion is not started), */ - /* - if ADC is master, ADC is enabled and conversion is started. */ - if (ADC_INDEPENDENT_OR_NONMULTIMODEREGULAR_SLAVE(hadc) ) - { - /* Multimode feature is not available or ADC Instance is Independent or Master, - or is not Slave ADC with dual regular conversions enabled. - Then set HAL_ADC_STATE_INJ_BUSY and reset HAL_ADC_STATE_INJ_EOC if JAUTO is set. */ - if (READ_BIT(hadc->Instance->CFGR, ADC_CFGR_JAUTO) != RESET) - { - ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY); - - /* Enable as well injected interruptions in case - HAL_ADCEx_InjectedStart_IT() has not been called beforehand. This - allows to start regular and injected conversions when JAUTO is - set with a single call to HAL_ADC_Start_IT() */ - switch(hadc->Init.EOCSelection) - { - case ADC_EOC_SEQ_CONV: - __HAL_ADC_DISABLE_IT(hadc, ADC_IT_JEOC); - __HAL_ADC_ENABLE_IT(hadc, ADC_IT_JEOS); - break; - /* case ADC_EOC_SINGLE_CONV */ - default: - __HAL_ADC_DISABLE_IT(hadc, ADC_IT_JEOS); - __HAL_ADC_ENABLE_IT(hadc, ADC_IT_JEOC); - break; - } - } /* if (READ_BIT(hadc->Instance->CFGR, ADC_CFGR_JAUTO) != RESET) */ - /* Process unlocked */ - __HAL_UNLOCK(hadc); - /* Start ADC */ - SET_BIT(hadc->Instance->CR, ADC_CR_ADSTART); - } - else - { - /* hadc is the handle of a Slave ADC with dual regular conversions - enabled. Therefore, ADC_CR_ADSTART is NOT set */ - SET_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE); - /* if Master ADC JAUTO bit is set, Slave injected interruptions - are enabled nevertheless (for same reason as above) */ - tmpADC_Master = ADC_MASTER_REGISTER(hadc); - if (READ_BIT(tmpADC_Master->CFGR, ADC_CFGR_JAUTO) != RESET) - { - /* First, update Slave State in setting HAL_ADC_STATE_INJ_BUSY bit - and in resetting HAL_ADC_STATE_INJ_EOC bit */ - ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY); - /* Next, set Slave injected interruptions */ - switch(hadc->Init.EOCSelection) - { - case ADC_EOC_SEQ_CONV: - __HAL_ADC_DISABLE_IT(hadc, ADC_IT_JEOC); - __HAL_ADC_ENABLE_IT(hadc, ADC_IT_JEOS); - break; - /* case ADC_EOC_SINGLE_CONV */ - default: - __HAL_ADC_DISABLE_IT(hadc, ADC_IT_JEOS); - __HAL_ADC_ENABLE_IT(hadc, ADC_IT_JEOC); - break; - } - } /* if (READ_BIT(tmpADC_Master->CFGR, ADC_CFGR_JAUTO) != RESET) */ - /* Process unlocked */ - __HAL_UNLOCK(hadc); - } /* if (ADC_INDEPENDENT_OR_NONMULTIMODEREGULAR_SLAVE(hadc) ) */ - } /* if (tmp_status == HAL_OK) */ - else - { - /* Process unlocked */ - __HAL_UNLOCK(hadc); - } - - /* Return function status */ - return tmp_status; - - } -} - - - -/** - * @brief Stop ADC conversion of regular groups when interruptions are enabled. - * @note Stop as well injected conversions and disable ADC peripheral. - * @param hadc: ADC handle - * @retval HAL status. - */ -HAL_StatusTypeDef HAL_ADC_Stop_IT(ADC_HandleTypeDef* hadc) -{ - HAL_StatusTypeDef tmp_status = HAL_OK; - - /* Check the parameters */ - assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); - - /* Process locked */ - __HAL_LOCK(hadc); - - /* 1. Stop potential regular and injected on-going conversions */ - tmp_status = ADC_ConversionStop(hadc, ADC_REGULAR_INJECTED_GROUP); - - /* Disable ADC peripheral if conversions are effectively stopped */ - if (tmp_status == HAL_OK) - { - /* Disable all interrupts */ - __HAL_ADC_DISABLE_IT(hadc, (ADC_IT_EOC | ADC_IT_EOS | ADC_IT_OVR)); - - /* 2. Disable the ADC peripheral */ - tmp_status = ADC_Disable(hadc); - - /* Check if ADC is effectively disabled */ - if (tmp_status == HAL_OK) - { - /* Change ADC state */ - /* Clear HAL_ADC_STATE_REG_BUSY and HAL_ADC_STATE_INJ_BUSY bits, set HAL_ADC_STATE_READY bit */ - ADC_STATE_CLR_SET(hadc->State, (HAL_ADC_STATE_REG_BUSY|HAL_ADC_STATE_INJ_BUSY), HAL_ADC_STATE_READY); - } - } - - /* Process unlocked */ - __HAL_UNLOCK(hadc); - - /* Return function status */ - return tmp_status; -} - - -/** - * @brief Enable ADC, start conversion of regular group and transfer result through DMA. - * @note Interruptions enabled in this function: - * overrun (if applicable), DMA half transfer, DMA transfer complete. - * Each of these interruptions has its dedicated callback function. - * @note Case of multimode enabled (when multimode feature is available): HAL_ADC_Start_DMA() - * is designed for single-ADC mode only. For multimode, the dedicated - * HAL_ADCEx_MultiModeStart_DMA() function must be used. - * @param hadc: ADC handle - * @param pData: Destination Buffer address. - * @param Length: Length of data to be transferred from ADC peripheral to memory (in bytes) - * @retval None - */ -HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length) -{ - HAL_StatusTypeDef tmp_status = HAL_OK; - - /* Check the parameters */ - assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); - - if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc)) - { - return HAL_BUSY; - } - else - { - - /* Process locked */ - __HAL_LOCK(hadc); - - /* Ensure that dual regular conversions are not enabled or unavailable. */ - /* Otherwise, dedicated API HAL_ADCEx_MultiModeStart_DMA() must be used. */ - if (ADC_IS_DUAL_REGULAR_CONVERSION_ENABLE(hadc) == RESET) - { - /* Enable the ADC peripheral */ - tmp_status = ADC_Enable(hadc); - - /* Start conversion if ADC is effectively enabled */ - if (tmp_status == HAL_OK) - { - /* State machine update: Check if an injected conversion is ongoing */ - if (HAL_IS_BIT_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY)) - { - /* Reset ADC error code fields related to regular conversions only */ - CLEAR_BIT(hadc->ErrorCode, (HAL_ADC_ERROR_OVR|HAL_ADC_ERROR_DMA)); - } - else - { - /* Set ADC error code to none */ - ADC_CLEAR_ERRORCODE(hadc); - } - /* Clear HAL_ADC_STATE_READY and regular conversion results bits, set HAL_ADC_STATE_REG_BUSY bit */ - ADC_STATE_CLR_SET(hadc->State, (HAL_ADC_STATE_READY|HAL_ADC_STATE_REG_EOC|HAL_ADC_STATE_REG_OVR|HAL_ADC_STATE_REG_EOSMP), HAL_ADC_STATE_REG_BUSY); - - /* Reset HAL_ADC_STATE_MULTIMODE_SLAVE bit - - by default if ADC is Master or Independent or if multimode feature is not available - - if multimode setting is set to independent mode (no dual regular or injected conversions are configured) */ - if (ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc)) - { - CLEAR_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE); - } - - /* Set the DMA transfer complete callback */ - hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt; - - /* Set the DMA half transfer complete callback */ - hadc->DMA_Handle->XferHalfCpltCallback = ADC_DMAHalfConvCplt; - - /* Set the DMA error callback */ - hadc->DMA_Handle->XferErrorCallback = ADC_DMAError; - - - /* Manage ADC and DMA start: ADC overrun interruption, DMA start, */ - /* ADC start (in case of SW start): */ - - /* Clear regular group conversion flag and overrun flag */ - /* (To ensure of no unknown state from potential previous ADC */ - /* operations) */ - __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS | ADC_FLAG_OVR)); - - /* With DMA, overrun event is always considered as an error even if - hadc->Init.Overrun is set to ADC_OVR_DATA_OVERWRITTEN. Therefore, - ADC_IT_OVR is enabled. */ - __HAL_ADC_ENABLE_IT(hadc, ADC_IT_OVR); - - - /* Enable ADC DMA mode */ - SET_BIT(hadc->Instance->CFGR, ADC_CFGR_DMAEN); - - /* Start the DMA channel */ - HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&hadc->Instance->DR, (uint32_t)pData, Length); - - /* Enable conversion of regular group. */ - /* Process unlocked */ - __HAL_UNLOCK(hadc); - /* If software start has been selected, conversion starts immediately. */ - /* If external trigger has been selected, conversion will start at next */ - /* trigger event. */ - SET_BIT(hadc->Instance->CR, ADC_CR_ADSTART); - - } - else - { - /* Process unlocked */ - __HAL_UNLOCK(hadc); - } /* if (tmp_status == HAL_OK) */ - } - else - { - tmp_status = HAL_ERROR; - /* Process unlocked */ - __HAL_UNLOCK(hadc); - } /* if (ADC_IS_DUAL_REGULAR_CONVERSION_ENABLE(hadc) == RESET) */ - - - - /* Return function status */ - return tmp_status; - } /* if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc)) */ -} - - -/** - * @brief Stop ADC conversion of regular groups and disable ADC DMA transfer. - * @note Stop as well injected conversions and disable ADC peripheral. - * @note Case of multimode enabled (when multimode feature is available): - * HAL_ADC_Stop_DMA() function is dedicated to single-ADC mode only. - * For multimode, the dedicated HAL_ADCEx_MultiModeStop_DMA() API must be used. - * @param hadc: ADC handle - * @retval HAL status. - */ -HAL_StatusTypeDef HAL_ADC_Stop_DMA(ADC_HandleTypeDef* hadc) -{ - HAL_StatusTypeDef tmp_status = HAL_OK; - - /* Check the parameters */ - assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); - - /* Process locked */ - __HAL_LOCK(hadc); - - /* 1. Stop potential regular conversion on going */ - tmp_status = ADC_ConversionStop(hadc, ADC_REGULAR_INJECTED_GROUP); - - /* Disable ADC peripheral if conversions are effectively stopped */ - if (tmp_status == HAL_OK) - { - /* Disable ADC DMA (ADC DMA configuration ADC_CFGR_DMACFG is kept) */ - CLEAR_BIT(hadc->Instance->CFGR, ADC_CFGR_DMAEN); - - /* Disable the DMA channel (in case of DMA in circular mode or stop while */ - /* while DMA transfer is on going) */ - tmp_status = HAL_DMA_Abort(hadc->DMA_Handle); - - /* Check if DMA channel effectively disabled */ - if (tmp_status != HAL_OK) - { - /* Update ADC state machine to error */ - SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); - } - - /* Disable ADC overrun interrupt */ - __HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR); - - /* 2. Disable the ADC peripheral */ - /* Update "tmp_status" only if DMA channel disabling passed, to keep in */ - /* memory a potential failing status. */ - if (tmp_status == HAL_OK) - { - tmp_status = ADC_Disable(hadc); - } - else - { - ADC_Disable(hadc); - } - - /* Check if ADC is effectively disabled */ - if (tmp_status == HAL_OK) - { - /* Change ADC state */ - /* Clear HAL_ADC_STATE_REG_BUSY and HAL_ADC_STATE_INJ_BUSY bits, set HAL_ADC_STATE_READY bit */ - ADC_STATE_CLR_SET(hadc->State, (HAL_ADC_STATE_REG_BUSY|HAL_ADC_STATE_INJ_BUSY), HAL_ADC_STATE_READY); - } - - } - - /* Process unlocked */ - __HAL_UNLOCK(hadc); - - /* Return function status */ - return tmp_status; -} - - -/** - * @brief Get ADC regular group conversion result. - * @param hadc: ADC handle - * @note Reading DR register automatically clears EOC flag. To reset EOS flag, - * the user must resort to the macro - * __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOS) - * @retval Converted value - */ -uint32_t HAL_ADC_GetValue(ADC_HandleTypeDef* hadc) -{ - /* Check the parameters */ - assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); - - /* Return ADC converted value */ - return hadc->Instance->DR; -} - - -/** - * @brief Handle ADC interrupt request. - * @param hadc: ADC handle - * @retval None - */ -void HAL_ADC_IRQHandler(ADC_HandleTypeDef* hadc) -{ - uint32_t overrun_error = 0; /* flag set if overrun occurrence has to be considered as an error */ - ADC_TypeDef *tmpADC_Master; - uint32_t tmp_isr = hadc->Instance->ISR; - uint32_t tmp_ier = hadc->Instance->IER; - uint32_t tmp_cfgr = 0x0; - uint32_t tmp_cfgr_jqm = 0x0; - - - /* Check the parameters */ - assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); - assert_param(IS_ADC_EOC_SELECTION(hadc->Init.EOCSelection)); - - - /* ====== Check End of Sampling flag for regular group ===== */ - if (((tmp_isr & ADC_FLAG_EOSMP) == ADC_FLAG_EOSMP) && ((tmp_ier & ADC_IT_EOSMP) == ADC_IT_EOSMP)) - { - /* Update state machine on end of sampling status if not in error state */ - if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL)) - { - /* Change ADC state */ - SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOSMP); - } - - /* End Of Sampling callback */ - HAL_ADCEx_EndOfSamplingCallback(hadc); - - /* Clear regular group conversion flag */ - __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOSMP ); - } - - /* ====== Check End of Conversion or Sequence flags for regular group ===== */ - if( (((tmp_isr & ADC_FLAG_EOC) == ADC_FLAG_EOC) && ((tmp_ier & ADC_IT_EOC) == ADC_IT_EOC)) || - (((tmp_isr & ADC_FLAG_EOS) == ADC_FLAG_EOS) && ((tmp_ier & ADC_IT_EOS) == ADC_IT_EOS)) ) - { - /* Update state machine on conversion status if not in error state */ - if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL)) - { - /* Change ADC state */ - SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC); - } - - /* Disable interruption if no further conversion upcoming by regular */ - /* external trigger or by continuous mode, */ - /* and if scan sequence if completed. */ - if(ADC_IS_SOFTWARE_START_REGULAR(hadc)) - { - if (ADC_INDEPENDENT_OR_NONMULTIMODEREGULAR_SLAVE(hadc)) - { - /* check CONT bit directly in handle ADC CFGR register */ - tmp_cfgr = READ_REG(hadc->Instance->CFGR); - } - else - { - /* else need to check Master ADC CONT bit */ - tmpADC_Master = ADC_MASTER_REGISTER(hadc); - tmp_cfgr = READ_REG(tmpADC_Master->CFGR); - } - - /* Carry on if continuous mode is disabled */ - if (READ_BIT (tmp_cfgr, ADC_CFGR_CONT) != ADC_CFGR_CONT) - { - /* If End of Sequence is reached, disable interrupts */ - if( __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOS) ) - { - /* Allowed to modify bits ADC_IT_EOC/ADC_IT_EOS only if bit */ - /* ADSTART==0 (no conversion on going) */ - if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) - { - /* Disable ADC end of sequence conversion interrupt */ - /* Note: if Overrun interrupt was enabled with EOC or EOS interrupt */ - /* in HAL_Start_IT(), it isn't disabled here because it can be used */ - /* by overrun IRQ process below. */ - __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC | ADC_IT_EOS); - /* Clear HAL_ADC_STATE_REG_BUSY bit */ - CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY); - /* If no injected conversion on-going, set HAL_ADC_STATE_READY bit */ - if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_INJ_BUSY)) - { - SET_BIT(hadc->State, HAL_ADC_STATE_READY); - } - } - else - { - /* Change ADC state to error state */ - SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); - - /* Set ADC error code to ADC IP internal error */ - SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); - } - } - } /* if (READ_BIT (tmp_cfgr, ADC_CFGR_CONT) != ADC_CFGR_CONT) */ - } /* if(ADC_IS_SOFTWARE_START_REGULAR(hadc) */ - - /* Conversion complete callback */ - /* Note: HAL_ADC_ConvCpltCallback can resort to - if( __HAL_ADC_GET_FLAG(&hadc, ADC_FLAG_EOS)) or - if( __HAL_ADC_GET_FLAG(&hadc, ADC_FLAG_EOC)) to determine whether - interruption has been triggered by end of conversion or end of - sequence. */ - HAL_ADC_ConvCpltCallback(hadc); - - - /* Clear regular group conversion flag */ - __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS) ); - } - - - /* ========== Check End of Conversion flag for injected group ========== */ - if( (((tmp_isr & ADC_FLAG_JEOC) == ADC_FLAG_JEOC) && ((tmp_ier & ADC_IT_JEOC) == ADC_IT_JEOC)) || - (((tmp_isr & ADC_FLAG_JEOS) == ADC_FLAG_JEOS) && ((tmp_ier & ADC_IT_JEOS) == ADC_IT_JEOS)) ) - { - /* Update state machine on conversion status if not in error state */ - if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL)) - { - /* Change ADC state */ - SET_BIT(hadc->State, HAL_ADC_STATE_INJ_EOC); - } - - - /* Check whether interruptions can be disabled only if - - injected conversions are software-triggered when injected queue management is disabled - OR - - auto-injection is enabled, continuous mode is disabled (CONT = 0) - and regular conversions are software-triggered */ - /* If End of Sequence is reached, disable interrupts */ - if( __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_JEOS)) - { - - /* First, retrieve proper registers to check */ - /* 1a. Are injected conversions that of a dual Slave ? */ - if (ADC_INDEPENDENT_OR_NONMULTIMODEINJECTED_SLAVE(hadc)) - { - /* hadc is not the handle of a Slave ADC with dual injected conversions enabled: - check JQM bit directly in ADC CFGR register */ - tmp_cfgr_jqm = READ_REG(hadc->Instance->CFGR); - } - else - { - /* hadc is the handle of a Slave ADC with dual injected conversions enabled: - need to check JQM bit of Master ADC CFGR register */ - tmpADC_Master = ADC_MASTER_REGISTER(hadc); - tmp_cfgr_jqm = READ_REG(tmpADC_Master->CFGR); - } - /* 1b. Is hadc the handle of a Slave ADC with regular conversions enabled? */ - if (ADC_INDEPENDENT_OR_NONMULTIMODEREGULAR_SLAVE(hadc)) - { - /* hadc is not the handle of a Slave ADC with dual regular conversions enabled: - check JAUTO and CONT bits directly in ADC CFGR register */ - tmp_cfgr = READ_REG(hadc->Instance->CFGR); - } - else - { - /* hadc is not the handle of a Slave ADC with dual regular conversions enabled: - check JAUTO and CONT bits of Master ADC CFGR register */ - tmpADC_Master = ADC_MASTER_REGISTER(hadc); - tmp_cfgr = READ_REG(tmpADC_Master->CFGR); - } - - /* Secondly, check whether JEOC and JEOS interruptions can be disabled */ - if ((ADC_IS_SOFTWARE_START_INJECTED(hadc) && (READ_BIT(tmp_cfgr_jqm, ADC_CFGR_JQM) != ADC_CFGR_JQM)) - && (!((READ_BIT(tmp_cfgr, (ADC_CFGR_JAUTO|ADC_CFGR_CONT)) == (ADC_CFGR_JAUTO|ADC_CFGR_CONT)) && - (ADC_IS_SOFTWARE_START_REGULAR(hadc)))) ) - { - /* Allowed to modify bits ADC_IT_JEOC/ADC_IT_JEOS only if bit */ - /* JADSTART==0 (no conversion on going) */ - if (ADC_IS_CONVERSION_ONGOING_INJECTED(hadc) == RESET) - { - /* Disable ADC end of sequence conversion interrupt */ - __HAL_ADC_DISABLE_IT(hadc, ADC_IT_JEOC | ADC_IT_JEOS); - /* Clear HAL_ADC_STATE_INJ_BUSY bit */ - CLEAR_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY); - /* If no regular conversion on-going, set HAL_ADC_STATE_READY bit */ - if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_REG_BUSY)) - { - SET_BIT(hadc->State, HAL_ADC_STATE_READY); - } - } - else - { - /* Change ADC state to error state */ - SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); - - /* Set ADC error code to ADC IP internal error */ - SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); - } - } - } /* if( __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_JEOS)) */ - - /* Injected Conversion complete callback */ - /* Note: HAL_ADCEx_InjectedConvCpltCallback can resort to - if( __HAL_ADC_GET_FLAG(&hadc, ADC_FLAG_JEOS)) or - if( __HAL_ADC_GET_FLAG(&hadc, ADC_FLAG_JEOC)) to determine whether - interruption has been triggered by end of conversion or end of - sequence. */ - HAL_ADCEx_InjectedConvCpltCallback(hadc); - - /* Clear injected group conversion flag */ - __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JEOC | ADC_FLAG_JEOS); - } - - - /* ========== Check Analog watchdog flags =================================================== */ - - /* ========== Check Analog watchdog 1 flags ========== */ - if (((tmp_isr & ADC_FLAG_AWD1) == ADC_FLAG_AWD1) && ((tmp_ier & ADC_IT_AWD1) == ADC_IT_AWD1)) - { - /* Change ADC state */ - SET_BIT(hadc->State, HAL_ADC_STATE_AWD1); - - /* Level out of window 1 callback */ - HAL_ADC_LevelOutOfWindowCallback(hadc); - /* Clear ADC Analog watchdog flag */ - __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD1); - } - - /* ========== Check Analog watchdog 2 flags ========== */ - if (((tmp_isr & ADC_FLAG_AWD2) == ADC_FLAG_AWD2) && ((tmp_ier & ADC_IT_AWD2) == ADC_IT_AWD2)) - { - /* Change ADC state */ - SET_BIT(hadc->State, HAL_ADC_STATE_AWD2); - - /* Level out of window 2 callback */ - HAL_ADCEx_LevelOutOfWindow2Callback(hadc); - /* Clear ADC Analog watchdog flag */ - __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD2); - } - - /* ========== Check Analog watchdog 3 flags ========== */ - if (((tmp_isr & ADC_FLAG_AWD3) == ADC_FLAG_AWD3) && ((tmp_ier & ADC_IT_AWD3) == ADC_IT_AWD3)) - { - /* Change ADC state */ - SET_BIT(hadc->State, HAL_ADC_STATE_AWD3); - - /* Level out of window 3 callback */ - HAL_ADCEx_LevelOutOfWindow3Callback(hadc); - /* Clear ADC Analog watchdog flag */ - __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD3); - } - - - /* ========== Check Overrun flag ========== */ - if (((tmp_isr & ADC_FLAG_OVR) == ADC_FLAG_OVR) && ((tmp_ier & ADC_IT_OVR) == ADC_IT_OVR)) - { - /* If overrun is set to overwrite previous data (default setting), */ - /* overrun event is not considered as an error. */ - /* (cf ref manual "Managing conversions without using the DMA and without */ - /* overrun ") */ - /* Exception for usage with DMA overrun event always considered as an */ - /* error. */ - - if (hadc->Init.Overrun == ADC_OVR_DATA_PRESERVED) - { - overrun_error = 1; - } - else - { - /* check DMA configuration, depending on multimode set or not, - or whether or not multimode feature is available */ - if (ADC_IS_DUAL_CONVERSION_ENABLE(hadc) == RESET) - { - /* Multimode not set or feature not available or ADC independent */ - if (HAL_IS_BIT_SET(hadc->Instance->CFGR, ADC_CFGR_DMAEN)) - { - overrun_error = 1; - } - } - else - { - /* Multimode (when feature is available) is enabled, - Common Control Register MDMA bits must be checked. */ - if (ADC_MULTIMODE_DMA_ENABLED()) - { - overrun_error = 1; - } - } - } - - if (overrun_error == 1) - { - /* Change ADC state to error state */ - SET_BIT(hadc->State, HAL_ADC_STATE_REG_OVR); - - /* Set ADC error code to overrun */ - SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_OVR); - - /* Error callback */ - HAL_ADC_ErrorCallback(hadc); - } - - /* Clear the Overrun flag, to be done AFTER HAL_ADC_ErrorCallback() since - old data is preserved until OVR is reset */ - __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR); - - } - - - /* ========== Check Injected context queue overflow flag ========== */ - if (((tmp_isr & ADC_FLAG_JQOVF) == ADC_FLAG_JQOVF) && ((tmp_ier & ADC_IT_JQOVF) == ADC_IT_JQOVF)) - { - /* Change ADC state to overrun state */ - SET_BIT(hadc->State, HAL_ADC_STATE_INJ_JQOVF); - - /* Set ADC error code to Injected context queue overflow */ - SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_JQOVF); - - /* Clear the Injected context queue overflow flag */ - __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JQOVF); - - /* Error callback */ - HAL_ADCEx_InjectedQueueOverflowCallback(hadc); - } - -} - -/** - * @brief Conversion complete callback in non-blocking mode. - * @param hadc: ADC handle - * @retval None - */ -__weak void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc) -{ - /* NOTE : This function should not be modified. When the callback is needed, - function HAL_ADC_ConvCpltCallback must be implemented in the user file. - */ -} - -/** - * @brief Conversion DMA half-transfer callback in non-blocking mode. - * @param hadc: ADC handle - * @retval None - */ -__weak void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef* hadc) -{ - /* NOTE : This function should not be modified. When the callback is needed, - function HAL_ADC_ConvHalfCpltCallback must be implemented in the user file. - */ -} - -/** - * @brief Analog watchdog 1 callback in non-blocking mode. - * @param hadc: ADC handle - * @retval None - */ -__weak void HAL_ADC_LevelOutOfWindowCallback(ADC_HandleTypeDef* hadc) -{ - /* NOTE : This function should not be modified. When the callback is needed, - function HAL_ADC_LevelOutOfWindowCallback must be implemented in the user file. - */ -} - -/** - * @brief ADC error callback in non-blocking mode - * (ADC conversion with interruption or transfer by DMA). - * @param hadc: ADC handle - * @retval None - */ -__weak void HAL_ADC_ErrorCallback(ADC_HandleTypeDef *hadc) -{ - /* NOTE : This function should not be modified. When the callback is needed, - function HAL_ADC_ErrorCallback must be implemented in the user file. - */ -} - -/** - * @} - */ - -/** @defgroup ADC_Exported_Functions_Group3 Peripheral Control functions - * @brief Peripheral Control functions - * -@verbatim - =============================================================================== - ##### Peripheral Control functions ##### - =============================================================================== - [..] This section provides functions allowing to: - (+) Configure channels on regular group - (+) Configure the analog watchdog - -@endverbatim - * @{ - */ - - -/** - * @brief Configure the selected channel to be linked to the regular group. - * @note In case of usage of internal measurement channels (Vbat / VrefInt / - * TempSensor), the recommended sampling time is provided by the - * datasheet. - * These internal paths can be disabled using function - * HAL_ADC_DeInit(). - * @note Possibility to update parameters on the fly: - * HAL_ADC_ConfigChannel() initializes channel into regular group, - * consecutive calls to this function can be used to reconfigure some - * parameters of structure "ADC_ChannelConfTypeDef" on the fly, without - * resetting the ADC. - * The setting of these parameters is conditioned to ADC state. - * For parameters constraints, see comments of structure - * "ADC_ChannelConfTypeDef". - * @param hadc: ADC handle - * @param sConfig: Structure ADC channel for regular group. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig) -{ - HAL_StatusTypeDef tmp_status = HAL_OK; - - ADC_Common_TypeDef *tmpADC_Common; - uint32_t tmpOffsetShifted; - __IO uint32_t wait_loop_index = 0; - - /* Check the parameters */ - assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); - assert_param(IS_ADC_REGULAR_RANK(sConfig->Rank)); - assert_param(IS_ADC_SAMPLE_TIME(sConfig->SamplingTime)); - assert_param(IS_ADC_SINGLE_DIFFERENTIAL(sConfig->SingleDiff)); - assert_param(IS_ADC_OFFSET_NUMBER(sConfig->OffsetNumber)); - assert_param(IS_ADC_RANGE(ADC_GET_RESOLUTION(hadc), sConfig->Offset)); - - /* if ROVSE is set, the value of the OFFSETy_EN bit in ADCx_OFRy register is - ignored (considered as reset) */ - assert_param(!((sConfig->OffsetNumber != ADC_OFFSET_NONE) && (hadc->Init.OversamplingMode == ENABLE))); - - /* Verification of channel number */ - if (sConfig->SingleDiff != ADC_DIFFERENTIAL_ENDED) - { - assert_param(IS_ADC_CHANNEL(hadc, sConfig->Channel)); - } - else - { - assert_param(IS_ADC_DIFF_CHANNEL(hadc, sConfig->Channel)); - } - - /* Process locked */ - __HAL_LOCK(hadc); - - - /* Parameters update conditioned to ADC state: */ - /* Parameters that can be updated when ADC is disabled or enabled without */ - /* conversion on going on regular group: */ - /* - Channel number */ - /* - Channel rank */ - if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) - { - - /* Regular sequence configuration */ - /* Clear the old SQx bits then set the new ones for the selected rank */ - /* For Rank 1 to 4 */ - if (sConfig->Rank < 5) - { - MODIFY_REG(hadc->Instance->SQR1, - ADC_SQR1_RK(ADC_SQR2_SQ5, sConfig->Rank), - ADC_SQR1_RK(sConfig->Channel, sConfig->Rank)); - } - /* For Rank 5 to 9 */ - else if (sConfig->Rank < 10) - { - MODIFY_REG(hadc->Instance->SQR2, - ADC_SQR2_RK(ADC_SQR2_SQ5, sConfig->Rank), - ADC_SQR2_RK(sConfig->Channel, sConfig->Rank)); - } - /* For Rank 10 to 14 */ - else if (sConfig->Rank < 15) - { - MODIFY_REG(hadc->Instance->SQR3, - ADC_SQR3_RK(ADC_SQR3_SQ10, sConfig->Rank), - ADC_SQR3_RK(sConfig->Channel, sConfig->Rank)); - } - /* For Rank 15 to 16 */ - else - { - MODIFY_REG(hadc->Instance->SQR4, - ADC_SQR4_RK(ADC_SQR4_SQ15, sConfig->Rank), - ADC_SQR4_RK(sConfig->Channel, sConfig->Rank)); - } - - - /* Parameters update conditioned to ADC state: */ - /* Parameters that can be updated when ADC is disabled or enabled without */ - /* conversion on going on regular group: */ - /* - Channel sampling time */ - /* - Channel offset */ - if (ADC_IS_CONVERSION_ONGOING_REGULAR_INJECTED(hadc) == RESET) - { - - /* Channel sampling time configuration */ - /* Clear the old sample time then set the new one for the selected channel */ - /* For channels 10 to 18 */ - if (sConfig->Channel >= ADC_CHANNEL_10) - { - MODIFY_REG(hadc->Instance->SMPR2, - ADC_SMPR2(ADC_SMPR2_SMP10, sConfig->Channel), - ADC_SMPR2(sConfig->SamplingTime, sConfig->Channel)); - } - else /* For channels 0 to 9 */ - { - MODIFY_REG(hadc->Instance->SMPR1, - ADC_SMPR1(ADC_SMPR1_SMP0, sConfig->Channel), - ADC_SMPR1(sConfig->SamplingTime, sConfig->Channel)); - } - - - /* Configure the offset: offset enable/disable, channel, offset value */ - - /* Shift the offset with respect to the selected ADC resolution. */ - /* Offset has to be left-aligned on bit 11, the LSB (right bits) are set to 0 */ - tmpOffsetShifted = ADC_OFFSET_SHIFT_RESOLUTION(hadc, sConfig->Offset); - - switch (sConfig->OffsetNumber) - { - /* Configure offset register i when applicable: */ - /* - Enable offset */ - /* - Set channel number */ - /* - Set offset value */ - case ADC_OFFSET_1: - MODIFY_REG(hadc->Instance->OFR1, - ADC_OFR_FIELDS, - ADC_OFR1_OFFSET1_EN | ADC_OFR_CHANNEL(sConfig->Channel) | tmpOffsetShifted); - break; - - case ADC_OFFSET_2: - MODIFY_REG(hadc->Instance->OFR2, - ADC_OFR_FIELDS, - ADC_OFR2_OFFSET2_EN | ADC_OFR_CHANNEL(sConfig->Channel) | tmpOffsetShifted); - break; - - case ADC_OFFSET_3: - MODIFY_REG(hadc->Instance->OFR3, - ADC_OFR_FIELDS, - ADC_OFR3_OFFSET3_EN | ADC_OFR_CHANNEL(sConfig->Channel) | tmpOffsetShifted); - break; - - case ADC_OFFSET_4: - MODIFY_REG(hadc->Instance->OFR4, - ADC_OFR_FIELDS, - ADC_OFR4_OFFSET4_EN | ADC_OFR_CHANNEL(sConfig->Channel) | tmpOffsetShifted); - break; - - /* Case ADC_OFFSET_NONE */ - default : - /* Scan OFR1, OFR2, OFR3, OFR4 to check if the selected channel is enabled. - If this is the case, offset OFRx is disabled since - sConfig->OffsetNumber = ADC_OFFSET_NONE. */ - if (((hadc->Instance->OFR1) & ADC_OFR1_OFFSET1_CH) == ADC_OFR_CHANNEL(sConfig->Channel)) - { - CLEAR_BIT(hadc->Instance->OFR1, ADC_OFR1_OFFSET1_EN); - } - if (((hadc->Instance->OFR2) & ADC_OFR2_OFFSET2_CH) == ADC_OFR_CHANNEL(sConfig->Channel)) - { - CLEAR_BIT(hadc->Instance->OFR2, ADC_OFR2_OFFSET2_EN); - } - if (((hadc->Instance->OFR3) & ADC_OFR3_OFFSET3_CH) == ADC_OFR_CHANNEL(sConfig->Channel)) - { - CLEAR_BIT(hadc->Instance->OFR3, ADC_OFR3_OFFSET3_EN); - } - if (((hadc->Instance->OFR4) & ADC_OFR4_OFFSET4_CH) == ADC_OFR_CHANNEL(sConfig->Channel)) - { - CLEAR_BIT(hadc->Instance->OFR4, ADC_OFR4_OFFSET4_EN); - } - break; - } /* switch (sConfig->OffsetNumber) */ - - } /* if (ADC_IS_CONVERSION_ONGOING_REGULAR_INJECTED(hadc) == RESET) */ - - - - /* Parameters update conditioned to ADC state: */ - /* Parameters that can be updated only when ADC is disabled: */ - /* - Single or differential mode */ - /* - Internal measurement channels: Vbat/VrefInt/TempSensor */ - if (ADC_IS_ENABLE(hadc) == RESET) - { - /* Configuration of differential mode */ - if (sConfig->SingleDiff != ADC_DIFFERENTIAL_ENDED) - { - /* Disable differential mode (default mode: single-ended) */ - CLEAR_BIT(hadc->Instance->DIFSEL, ADC_DIFSEL_CHANNEL(sConfig->Channel)); - } - else - { - /* Enable differential mode */ - SET_BIT(hadc->Instance->DIFSEL, ADC_DIFSEL_CHANNEL(sConfig->Channel)); - - /* Sampling time configuration of channel ADC_IN+1 (negative input) */ - /* Clear the old sample time then set the new one for the selected */ - /* channel. */ - /* For channels 9 to 15 (ADC1, ADC2) or to 11 (ADC3), SMPR2 register - must be configured */ - if (sConfig->Channel >= ADC_CHANNEL_9) - { - MODIFY_REG(hadc->Instance->SMPR2, - ADC_SMPR2(ADC_SMPR2_SMP10, sConfig->Channel +1), - ADC_SMPR2(sConfig->SamplingTime, sConfig->Channel +1)); - } - else /* For channels 0 to 8, SMPR1 must be configured */ - { - MODIFY_REG(hadc->Instance->SMPR1, - ADC_SMPR1(ADC_SMPR1_SMP0, sConfig->Channel +1), - ADC_SMPR1(sConfig->SamplingTime, sConfig->Channel +1)); - } - } - - - - /* Management of internal measurement channels: Vbat/VrefInt/TempSensor. */ - /* If internal channel selected, enable dedicated internal buffers and */ - /* paths. */ - /* Note: these internal measurement paths can be disabled using */ - /* HAL_ADC_DeInit(). */ - - /* Configuration of common ADC parameters */ - tmpADC_Common = ADC_COMMON_REGISTER(hadc); - - - /* If the requested internal measurement path has already been enabled, */ - /* bypass the configuration processing. */ - if (( (sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) && - (HAL_IS_BIT_CLR(tmpADC_Common->CCR, ADC_CCR_TSEN)) ) || - ( (sConfig->Channel == ADC_CHANNEL_VBAT) && - (HAL_IS_BIT_CLR(tmpADC_Common->CCR, ADC_CCR_VBATEN)) ) || - ( (sConfig->Channel == ADC_CHANNEL_VREFINT) && - (HAL_IS_BIT_CLR(tmpADC_Common->CCR, ADC_CCR_VREFEN))) - ) - { - /* Configuration of common ADC parameters (continuation) */ - - /* Software is allowed to change common parameters only when all ADCs */ - /* of the common group are disabled. */ - if ((ADC_IS_ENABLE(hadc) == RESET) && - (ADC_ANY_OTHER_ENABLED(hadc) == RESET) ) - { - if (sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) - { - if (ADC_TEMPERATURE_SENSOR_INSTANCE(hadc)) - { - SET_BIT(tmpADC_Common->CCR, ADC_CCR_TSEN); - - /* Delay for temperature sensor stabilization time */ - /* Compute number of CPU cycles to wait for */ - wait_loop_index = (ADC_TEMPSENSOR_DELAY_US * (SystemCoreClock / 1000000)); - while(wait_loop_index != 0) - { - wait_loop_index--; - } - } - } - else if (sConfig->Channel == ADC_CHANNEL_VBAT) - { - if (ADC_BATTERY_VOLTAGE_INSTANCE(hadc)) - { - SET_BIT(tmpADC_Common->CCR, ADC_CCR_VBATEN); - } - } - else if (sConfig->Channel == ADC_CHANNEL_VREFINT) - { - if (ADC_VREFINT_INSTANCE(hadc)) - { - SET_BIT(tmpADC_Common->CCR, ADC_CCR_VREFEN); - } - } - } - /* If the requested internal measurement path has already been */ - /* enabled and other ADC of the common group are enabled, internal */ - /* measurement paths cannot be enabled. */ - else - { - /* Update ADC state machine to error */ - SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); - - tmp_status = HAL_ERROR; - } - } - - } /* if (ADC_IS_ENABLE(hadc) == RESET) */ - - } /* if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) */ - - /* If a conversion is on going on regular group, no update on regular */ - /* channel could be done on neither of the channel configuration structure */ - /* parameters. */ - else - { - /* Update ADC state machine to error */ - SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); - - tmp_status = HAL_ERROR; - } - - /* Process unlocked */ - __HAL_UNLOCK(hadc); - - /* Return function status */ - return tmp_status; -} - - - -/** - * @brief Configure the analog watchdog. - * @note Possibility to update parameters on the fly: - * This function initializes the selected analog watchdog, successive - * calls to this function can be used to reconfigure some parameters - * of structure "ADC_AnalogWDGConfTypeDef" on the fly, without resetting - * the ADC, e.g. to set several channels to monitor simultaneously. - * The setting of these parameters is conditioned to ADC state. - * For parameters constraints, see comments of structure - * "ADC_AnalogWDGConfTypeDef". - * @param hadc: ADC handle - * @param AnalogWDGConfig: Structure of ADC analog watchdog configuration - * @retval HAL status - */ -HAL_StatusTypeDef HAL_ADC_AnalogWDGConfig(ADC_HandleTypeDef* hadc, ADC_AnalogWDGConfTypeDef* AnalogWDGConfig) -{ - HAL_StatusTypeDef tmp_status = HAL_OK; - - - uint32_t tmpAWDHighThresholdShifted; - uint32_t tmpAWDLowThresholdShifted; - - uint32_t tmpADCFlagAWD2orAWD3; - uint32_t tmpADCITAWD2orAWD3; - - /* Check the parameters */ - assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); - assert_param(IS_ADC_ANALOG_WATCHDOG_NUMBER(AnalogWDGConfig->WatchdogNumber)); - assert_param(IS_ADC_ANALOG_WATCHDOG_MODE(AnalogWDGConfig->WatchdogMode)); - assert_param(IS_FUNCTIONAL_STATE(AnalogWDGConfig->ITMode)); - - if((AnalogWDGConfig->WatchdogMode == ADC_ANALOGWATCHDOG_SINGLE_REG) || - (AnalogWDGConfig->WatchdogMode == ADC_ANALOGWATCHDOG_SINGLE_INJEC) || - (AnalogWDGConfig->WatchdogMode == ADC_ANALOGWATCHDOG_SINGLE_REGINJEC) ) - { - assert_param(IS_ADC_CHANNEL(hadc, AnalogWDGConfig->Channel)); - } - - - /* Verify if threshold is within the selected ADC resolution */ - assert_param(IS_ADC_RANGE(ADC_GET_RESOLUTION(hadc), AnalogWDGConfig->HighThreshold)); - assert_param(IS_ADC_RANGE(ADC_GET_RESOLUTION(hadc), AnalogWDGConfig->LowThreshold)); - - /* Process locked */ - __HAL_LOCK(hadc); - - /* Parameters update conditioned to ADC state: */ - /* Parameters that can be updated when ADC is disabled or enabled without */ - /* conversion on going on regular and injected groups: */ - /* - Analog watchdog channels */ - /* - Analog watchdog thresholds */ - if (ADC_IS_CONVERSION_ONGOING_REGULAR_INJECTED(hadc) == RESET) - { - - /* Analog watchdogs configuration */ - if(AnalogWDGConfig->WatchdogNumber == ADC_ANALOGWATCHDOG_1) - { - /* Configuration of analog watchdog: */ - /* - Set the analog watchdog enable mode: regular and/or injected */ - /* groups, one or overall group of channels. */ - /* - Set the Analog watchdog channel (is not used if watchdog */ - /* mode "all channels": ADC_CFGR_AWD1SGL=0). */ - - MODIFY_REG(hadc->Instance->CFGR, ADC_CFGR_WD_FIELDS, - AnalogWDGConfig->WatchdogMode | ADC_CFGR_SET_AWD1CH(AnalogWDGConfig->Channel) ); - - /* Shift the offset with respect to the selected ADC resolution: */ - /* Thresholds have to be left-aligned on bit 11, the LSB (right bits) */ - /* are set to 0 */ - tmpAWDHighThresholdShifted = ADC_AWD1THRESHOLD_SHIFT_RESOLUTION(hadc, AnalogWDGConfig->HighThreshold); - tmpAWDLowThresholdShifted = ADC_AWD1THRESHOLD_SHIFT_RESOLUTION(hadc, AnalogWDGConfig->LowThreshold); - - /* Set the high and low thresholds */ - MODIFY_REG(hadc->Instance->TR1, ADC_TR1_HT1 | ADC_TR1_LT1, - ADC_TRX_HIGHTHRESHOLD (tmpAWDHighThresholdShifted) | tmpAWDLowThresholdShifted ); - - /* Clear the ADC Analog watchdog flag (in case left enabled by */ - /* previous ADC operations) to be ready to use for HAL_ADC_IRQHandler() */ - /* or HAL_ADC_PollForEvent(). */ - __HAL_ADC_CLEAR_FLAG(hadc, ADC_IT_AWD1); - - /* Configure ADC Analog watchdog interrupt */ - if(AnalogWDGConfig->ITMode == ENABLE) - { - /* Enable the ADC Analog watchdog interrupt */ - __HAL_ADC_ENABLE_IT(hadc, ADC_IT_AWD1); - } - else - { - /* Disable the ADC Analog watchdog interrupt */ - __HAL_ADC_DISABLE_IT(hadc, ADC_IT_AWD1); - } - - /* Update state, clear previous result related to AWD1 */ - CLEAR_BIT(hadc->State, HAL_ADC_STATE_AWD1); - } - /* Case of ADC_ANALOGWATCHDOG_2 and ADC_ANALOGWATCHDOG_3 */ - else - { - /* Shift the threshold with respect to the selected ADC resolution */ - /* have to be left-aligned on bit 7, the LSB (right bits) are set to 0 */ - tmpAWDHighThresholdShifted = ADC_AWD23THRESHOLD_SHIFT_RESOLUTION(hadc, AnalogWDGConfig->HighThreshold); - tmpAWDLowThresholdShifted = ADC_AWD23THRESHOLD_SHIFT_RESOLUTION(hadc, AnalogWDGConfig->LowThreshold); - - if (AnalogWDGConfig->WatchdogNumber == ADC_ANALOGWATCHDOG_2) - { - /* Set the Analog watchdog channel or group of channels. This also */ - /* enables the watchdog. */ - /* Note: Conditional register reset, because several channels can be */ - /* set by successive calls of this function. */ - if (AnalogWDGConfig->WatchdogMode != ADC_ANALOGWATCHDOG_NONE) - { - SET_BIT(hadc->Instance->AWD2CR, ADC_CFGR_SET_AWD23CR(AnalogWDGConfig->Channel)); - } - else - { - CLEAR_BIT(hadc->Instance->AWD2CR, ADC_AWD2CR_AWD2CH); - } - - /* Set the high and low thresholds */ - MODIFY_REG(hadc->Instance->TR2, ADC_TR2_HT2 | ADC_TR2_LT2, - ADC_TRX_HIGHTHRESHOLD (tmpAWDHighThresholdShifted) | tmpAWDLowThresholdShifted ); - - /* Set temporary variable to flag and IT of AWD2 or AWD3 for further */ - /* settings. */ - tmpADCFlagAWD2orAWD3 = ADC_FLAG_AWD2; - tmpADCITAWD2orAWD3 = ADC_IT_AWD2; - - /* Update state, clear previous result related to AWD2 */ - CLEAR_BIT(hadc->State, HAL_ADC_STATE_AWD2); - } - /* (AnalogWDGConfig->WatchdogNumber == ADC_ANALOGWATCHDOG_3) */ - else - { - /* Set the Analog watchdog channel or group of channels. This also */ - /* enables the watchdog. */ - /* Note: Conditional register reset, because several channels can be */ - /* set by successive calls of this function. */ - if (AnalogWDGConfig->WatchdogMode != ADC_ANALOGWATCHDOG_NONE) - { - SET_BIT(hadc->Instance->AWD3CR, ADC_CFGR_SET_AWD23CR(AnalogWDGConfig->Channel)); - } - else - { - CLEAR_BIT(hadc->Instance->AWD3CR, ADC_AWD3CR_AWD3CH); - } - - /* Set the high and low thresholds */ - MODIFY_REG(hadc->Instance->TR3, ADC_TR3_HT3 | ADC_TR3_LT3, - ADC_TRX_HIGHTHRESHOLD (tmpAWDHighThresholdShifted) | tmpAWDLowThresholdShifted ); - - /* Set temporary variable to flag and IT of AWD2 or AWD3 for further */ - /* settings. */ - tmpADCFlagAWD2orAWD3 = ADC_FLAG_AWD3; - tmpADCITAWD2orAWD3 = ADC_IT_AWD3; - - /* Update state, clear previous result related to AWD3 */ - CLEAR_BIT(hadc->State, HAL_ADC_STATE_AWD3); - } - - /* Clear the ADC Analog watchdog flag (in case left enabled by */ - /* previous ADC operations) to be ready to use for HAL_ADC_IRQHandler() */ - /* or HAL_ADC_PollForEvent(). */ - __HAL_ADC_CLEAR_FLAG(hadc, tmpADCFlagAWD2orAWD3); - - /* Configure ADC Analog watchdog interrupt */ - if(AnalogWDGConfig->ITMode == ENABLE) - { - __HAL_ADC_ENABLE_IT(hadc, tmpADCITAWD2orAWD3); - } - else - { - __HAL_ADC_DISABLE_IT(hadc, tmpADCITAWD2orAWD3); - } - } - - } - /* If a conversion is on going on regular or injected groups, no update */ - /* could be done on neither of the AWD configuration structure parameters. */ - else - { - /* Update ADC state machine to error */ - SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); - - tmp_status = HAL_ERROR; - } - - - /* Process unlocked */ - __HAL_UNLOCK(hadc); - - - /* Return function status */ - return tmp_status; -} - - -/** - * @} - */ - -/** @defgroup ADC_Exported_Functions_Group4 Peripheral State functions - * @brief ADC Peripheral State functions - * -@verbatim - =============================================================================== - ##### Peripheral state and errors functions ##### - =============================================================================== - [..] - This subsection provides functions to get in run-time the status of the - peripheral. - (+) Check the ADC state - (+) Check the ADC error code - -@endverbatim - * @{ - */ - -/** - * @brief Return the ADC handle state. - * @param hadc: ADC handle - * @retval HAL state (uint32_t bit-map) - */ -uint32_t HAL_ADC_GetState(ADC_HandleTypeDef* hadc) -{ - /* Check the parameters */ - assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); - - /* Return ADC handle state */ - return hadc->State; -} - - -/** - * @brief Return the ADC error code. - * @param hadc: ADC handle - * @retval ADC Error Code (uint32_t bit-map) - */ -uint32_t HAL_ADC_GetError(ADC_HandleTypeDef *hadc) -{ - /* Check the parameters */ - assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); - - return hadc->ErrorCode; -} - -/** - * @} - */ - -/** - * @} - */ - - - -/** @defgroup ADC_Private_Functions ADC Private Functions - * @{ - */ - -/** - * @brief Stop ADC conversion. - * @param hadc: ADC handle - * @param ConversionGroup: ADC group regular and/or injected. - * This parameter can be one of the following values: - * @arg ADC_REGULAR_GROUP: ADC regular conversion type. - * @arg ADC_INJECTED_GROUP: ADC injected conversion type. - * @arg ADC_REGULAR_INJECTED_GROUP: ADC regular and injected conversion type. - * @retval HAL status. - */ -HAL_StatusTypeDef ADC_ConversionStop(ADC_HandleTypeDef* hadc, uint32_t ConversionGroup) -{ - uint32_t tmp_ADC_CR_ADSTART_JADSTART = 0; - uint32_t tickstart = 0; - uint32_t Conversion_Timeout_CPU_cycles = 0; - - /* Check the parameters */ - assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); - assert_param(IS_ADC_CONVERSION_GROUP(ConversionGroup)); - - /* Verification if ADC is not already stopped (on regular and injected */ - /* groups) to bypass this function if not needed. */ - if (ADC_IS_CONVERSION_ONGOING_REGULAR_INJECTED(hadc)) - { - /* Particular case of continuous auto-injection mode combined with */ - /* auto-delay mode. */ - /* In auto-injection mode, regular group stop ADC_CR_ADSTP is used (not */ - /* injected group stop ADC_CR_JADSTP). */ - /* Procedure to be followed: Wait until JEOS=1, clear JEOS, set ADSTP=1 */ - /* (see reference manual). */ - if ((HAL_IS_BIT_SET(hadc->Instance->CFGR, ADC_CFGR_JAUTO)) - && (hadc->Init.ContinuousConvMode==ENABLE) - && (hadc->Init.LowPowerAutoWait==ENABLE)) - { - /* Use stop of regular group */ - ConversionGroup = ADC_REGULAR_GROUP; - - /* Wait until JEOS=1 (maximum Timeout: 4 injected conversions) */ - while(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_JEOS) == RESET) - { - if (Conversion_Timeout_CPU_cycles >= (ADC_CONVERSION_TIME_MAX_CPU_CYCLES *4)) - { - /* Update ADC state machine to error */ - SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); - - /* Set ADC error code to ADC IP internal error */ - SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); - - return HAL_ERROR; - } - Conversion_Timeout_CPU_cycles ++; - } - - /* Clear JEOS */ - __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JEOS); - } - - /* Stop potential conversion on going on regular group */ - if (ConversionGroup != ADC_INJECTED_GROUP) - { - /* Software is allowed to set ADSTP only when ADSTART=1 and ADDIS=0 */ - if (HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADSTART) && - HAL_IS_BIT_CLR(hadc->Instance->CR, ADC_CR_ADDIS) ) - { - /* Stop conversions on regular group */ - SET_BIT(hadc->Instance->CR, ADC_CR_ADSTP); - } - } - - /* Stop potential conversion on going on injected group */ - if (ConversionGroup != ADC_REGULAR_GROUP) - { - /* Software is allowed to set JADSTP only when JADSTART=1 and ADDIS=0 */ - if (HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_JADSTART) && - HAL_IS_BIT_CLR(hadc->Instance->CR, ADC_CR_ADDIS) ) - { - /* Stop conversions on injected group */ - SET_BIT(hadc->Instance->CR, ADC_CR_JADSTP); - } - } - - /* Selection of start and stop bits with respect to the regular or injected group */ - switch(ConversionGroup) - { - case ADC_REGULAR_INJECTED_GROUP: - tmp_ADC_CR_ADSTART_JADSTART = (ADC_CR_ADSTART | ADC_CR_JADSTART); - break; - case ADC_INJECTED_GROUP: - tmp_ADC_CR_ADSTART_JADSTART = ADC_CR_JADSTART; - break; - /* Case ADC_REGULAR_GROUP only*/ - default: - tmp_ADC_CR_ADSTART_JADSTART = ADC_CR_ADSTART; - break; - } - - /* Wait for conversion effectively stopped */ - - - tickstart = HAL_GetTick(); - - while((hadc->Instance->CR & tmp_ADC_CR_ADSTART_JADSTART) != RESET) - { - if((HAL_GetTick()-tickstart) > ADC_STOP_CONVERSION_TIMEOUT) - { - /* Update ADC state machine to error */ - SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); - - /* Set ADC error code to ADC IP internal error */ - SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); - - return HAL_ERROR; - } - } - - } /* if (ADC_IS_CONVERSION_ONGOING_REGULAR_INJECTED(hadc)) */ - - /* Return HAL status */ - return HAL_OK; -} - - - -/** - * @brief Enable the selected ADC. - * @note Prerequisite condition to use this function: ADC must be disabled - * and voltage regulator must be enabled (done into HAL_ADC_Init()). - * @param hadc: ADC handle - * @retval HAL status. - */ -HAL_StatusTypeDef ADC_Enable(ADC_HandleTypeDef* hadc) -{ - uint32_t tickstart = 0; - - /* ADC enable and wait for ADC ready (in case of ADC is disabled or */ - /* enabling phase not yet completed: flag ADC ready not set yet). */ - /* Timeout implemented not to be stuck if ADC cannot be enabled (possible */ - /* causes: ADC clock not running, ...). */ - if (ADC_IS_ENABLE(hadc) == RESET) - { - /* Check if conditions to enable the ADC are fulfilled */ - if (ADC_ENABLING_CONDITIONS(hadc) == RESET) - { - /* Update ADC state machine to error */ - SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); - - /* Set ADC error code to ADC IP internal error */ - SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); - - return HAL_ERROR; - } - - /* Enable the ADC peripheral */ - ADC_ENABLE(hadc); - - - /* Wait for ADC effectively enabled */ - tickstart = HAL_GetTick(); - - while(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_RDY) == RESET) - { - /* If ADEN bit is set less than 4 ADC clock cycles after the ADCAL bit - has been cleared (after a calibration), ADEN bit is reset by the - calibration logic. - The workaround is to continue setting ADEN until ADRDY is becomes 1. - Additionally, ADC_ENABLE_TIMEOUT is defined to encompass this - 4 ADC clock cycle duration */ - ADC_ENABLE(hadc); - - if((HAL_GetTick()-tickstart) > ADC_ENABLE_TIMEOUT) - { - /* Update ADC state machine to error */ - SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); - - /* Set ADC error code to ADC IP internal error */ - SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); - - return HAL_ERROR; - } - } - } - - /* Return HAL status */ - return HAL_OK; -} - -/** - * @brief Disable the selected ADC. - * @note Prerequisite condition to use this function: ADC conversions must be - * stopped. - * @param hadc: ADC handle - * @retval HAL status. - */ -HAL_StatusTypeDef ADC_Disable(ADC_HandleTypeDef* hadc) -{ - uint32_t tickstart = 0; - - /* Verification if ADC is not already disabled: */ - /* Note: forbidden to disable ADC (set bit ADC_CR_ADDIS) if ADC is already */ - /* disabled. */ - if (ADC_IS_ENABLE(hadc) != RESET ) - { - /* Check if conditions to disable the ADC are fulfilled */ - if (ADC_DISABLING_CONDITIONS(hadc) != RESET) - { - /* Disable the ADC peripheral */ - ADC_DISABLE(hadc); - } - else - { - /* Update ADC state machine to error */ - SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); - - /* Set ADC error code to ADC IP internal error */ - SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); - - return HAL_ERROR; - } - - /* Wait for ADC effectively disabled */ - tickstart = HAL_GetTick(); - - while(HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADEN)) - { - if((HAL_GetTick()-tickstart) > ADC_DISABLE_TIMEOUT) - { - /* Update ADC state machine to error */ - SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); - - /* Set ADC error code to ADC IP internal error */ - SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); - - return HAL_ERROR; - } - } - } - - /* Return HAL status */ - return HAL_OK; -} - - -/** - * @brief DMA transfer complete callback. - * @param hdma: pointer to DMA handle. - * @retval None - */ -void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma) -{ - /* Retrieve ADC handle corresponding to current DMA handle */ - ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; - - /* Update state machine on conversion status if not in error state */ - if (HAL_IS_BIT_CLR(hadc->State, (HAL_ADC_STATE_ERROR_INTERNAL|HAL_ADC_STATE_ERROR_DMA))) - { - /* Update ADC state machine */ - SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC); - /* Is it the end of the regular sequence ? */ - if (HAL_IS_BIT_SET(hadc->Instance->ISR, ADC_FLAG_EOS)) - { - /* Are conversions software-triggered ? */ - if(ADC_IS_SOFTWARE_START_REGULAR(hadc)) - { - /* Is CONT bit set ? */ - if (READ_BIT(hadc->Instance->CFGR, ADC_CFGR_CONT) == RESET) - { - /* CONT bit is not set, no more conversions expected */ - CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY); - if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_INJ_BUSY)) - { - SET_BIT(hadc->State, HAL_ADC_STATE_READY); - } - } - } - } - else - { - /* DMA End of Transfer interrupt was triggered but conversions sequence - is not over. If DMACFG is set to 0, conversions are stopped. */ - if (READ_BIT(hadc->Instance->CFGR, ADC_CFGR_DMACFG) == RESET) - { - /* DMACFG bit is not set, conversions are stopped. */ - CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY); - if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_INJ_BUSY)) - { - SET_BIT(hadc->State, HAL_ADC_STATE_READY); - } - } - } - - /* Conversion complete callback */ - HAL_ADC_ConvCpltCallback(hadc); - } - else /* DMA or internal error occurred (or both) */ - { - /* In case of internal error, */ - if (HAL_IS_BIT_SET(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL)) - { - /* call Error Callback function */ - HAL_ADC_ErrorCallback(hadc); - } - - } - - -} - -/** - * @brief DMA half transfer complete callback. - * @param hdma: pointer to DMA handle. - * @retval None - */ -void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma) -{ - /* Retrieve ADC handle corresponding to current DMA handle */ - ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; - - /* Half conversion callback */ - HAL_ADC_ConvHalfCpltCallback(hadc); -} - -/** - * @brief DMA error callback. - * @param hdma: pointer to DMA handle. - * @retval None - */ -void ADC_DMAError(DMA_HandleTypeDef *hdma) -{ - /* Retrieve ADC handle corresponding to current DMA handle */ - ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; - - /* Change ADC state */ - SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA); - - /* Set ADC error code to DMA error */ - SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_DMA); - - /* Error callback */ - HAL_ADC_ErrorCallback(hadc); -} - - -/** - * @} - */ - - -#endif /* HAL_ADC_MODULE_ENABLED */ -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ -
--- a/Src/stm32l4xx_hal_adc_ex.c Thu Nov 12 20:49:49 2015 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,2379 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_adc_ex.c - * @author MCD Application Team - * @version V1.1.0 - * @date 16-September-2015 - * @brief This file provides firmware functions to manage the following - * functionalities of the Analog to Digital Convertor (ADC) - * peripheral: - * + Calibration functions - * ++ Calibration start-up - * ++ Calibration value reading or setting - * + Operation functions - * ++ Start, stop, get result of conversions of injected - * groups, using 3 possible modes: polling or interruption. - * ++ Multimode feature when available - * + Control functions - * ++ Configure channels on injected group - * + State functions - * ++ Injected group queues management - * - @verbatim - ============================================================================== - ##### ADC specific features ##### - ============================================================================== - [..] - (#) Interrupt generation at the end of injected conversion and in case of - injected queues overflow. - - (#) External trigger (timer or EXTI) with configurable polarity for - injected groups. - - (#) Multimode Dual mode when multimode feature is available. - - (#) Configurable DMA data storage in Multimode Dual mode. - - (#) Configurable delay between conversions in Dual interleaved mode. - - (#) ADC calibration. - - (#) ADC channels selectable single/differential input. - - (#) ADC Injected sequencer&channels configuration context queue. - - (#) ADC offset on injected groups. - - (#) ADC oversampling. - - - ##### How to use this driver ##### - ============================================================================== - [..] - - (#) Configure the ADC parameters (conversion resolution, data alignment, - continuous mode, ...) using the HAL_ADC_Init() function. - - (#) Activate the ADC peripheral using one of the start functions: - HAL_ADCEx_InjectedStart(), HAL_ADCEx_InjectedStart_IT() for injected conversions - or - HAL_ADC_MultiModeStart_DMA() for multimode conversions when multimode - feature is available. - - - *** Channels to injected group configuration *** - ============================================= - [..] - (+) To configure the ADC Injected channels group features, use - HAL_ADCEx_InjectedConfigChannel() functions. - (+) To read the ADC converted values, use the HAL_ADCEx_InjectedGetValue() - function. - - - *** Multimode ADCs configuration (when multimode feature is available) *** - ======================================================================== - [..] - (+) Multimode feature is available and applicable to Master and - Slave ADCs. - (+) Refer to "Channels to regular group configuration" description to - configure the Master and Slave regular groups. - (+) Select the Multi mode ADC features (dual mode - simultaneous, interleaved, ...) and configure the DMA mode using - HAL_ADCEx_MultiModeConfigChannel() functions. - (+) Read the ADCs converted values using the HAL_ADCEx_MultiModeGetValue() - function. - - - @endverbatim - ****************************************************************************** - * @attention - * - * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @defgroup ADCEx ADCEx - * @brief ADC Extended HAL module driver - * @{ - */ - -#ifdef HAL_ADC_MODULE_ENABLED - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ - -/** @defgroup ADCEx_Private_Constants ADC Extended Private Constants - * @{ - */ - -#define ADC_JSQR_FIELDS ((uint32_t)(ADC_JSQR_JL | ADC_JSQR_JEXTSEL | ADC_JSQR_JEXTEN |\ - ADC_JSQR_JSQ1 | ADC_JSQR_JSQ2 |\ - ADC_JSQR_JSQ3 | ADC_JSQR_JSQ4 )) /*!< ADC_JSQR fields of parameters that can be updated anytime - once the ADC is enabled */ - -#define ADC_CFGR2_INJ_FIELDS ((uint32_t)(ADC_CFGR2_JOVSE | ADC_CFGR2_OVSR |\ - ADC_CFGR2_OVSS )) /*!< ADC_CFGR2 injected oversampling parameters that can be updated - when no conversion is on-going (neither regular nor injected) */ - -/* Fixed timeout value for ADC calibration. */ -/* Values defined to be higher than worst cases: low clock frequency, */ -/* maximum prescalers. */ -/* Ex of profile low frequency : f_ADC at 0.14 MHz (minimum value */ -/* according to Data sheet), calibration_time MAX = 112 / f_ADC */ -/* 112 / 140,000 = 0.8 ms */ -/* At maximum CPU speed (80 MHz), this means */ -/* 0.8 ms * 80 MHz = 64000 CPU cycles */ -#define ADC_CALIBRATION_TIMEOUT ((uint32_t) 64000) /*!< ADC calibration time-out value */ - -/** - * @} - */ - -/* Private macro -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ -/* Exported functions --------------------------------------------------------*/ - -/** @defgroup ADCEx_Exported_Functions ADC Extended Exported Functions - * @{ - */ - - - -/** @defgroup ADCEx_Exported_Functions_Group1 Extended Input and Output operation functions - * @brief Extended IO operation functions - * -@verbatim - =============================================================================== - ##### IO operation functions ##### - =============================================================================== - [..] This section provides functions allowing to: - - (+) Perform the ADC self-calibration for single or differential ending. - (+) Get calibration factors for single or differential ending. - (+) Set calibration factors for single or differential ending. - - (+) Start conversion of injected group. - (+) Stop conversion of injected group. - (+) Poll for conversion complete on injected group. - (+) Get result of injected channel conversion. - (+) Start conversion of injected group and enable interruptions. - (+) Stop conversion of injected group and disable interruptions. - - (+) When multimode feature is available, start multimode and enable DMA transfer. - (+) Stop multimode and disable ADC DMA transfer. - (+) Get result of multimode conversion. - - - -@endverbatim - * @{ - */ - - - -/** - * @brief Perform an ADC automatic self-calibration - * Calibration prerequisite: ADC must be disabled (execute this - * function before HAL_ADC_Start() or after HAL_ADC_Stop() ). - * @param hadc: ADC handle. - * @param SingleDiff: Selection of single-ended or differential input - * This parameter can be one of the following values: - * @arg ADC_SINGLE_ENDED: Channel in mode input single ended - * @arg ADC_DIFFERENTIAL_ENDED: Channel in mode input differential ended - * @retval HAL status - */ -HAL_StatusTypeDef HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef* hadc, uint32_t SingleDiff) -{ - HAL_StatusTypeDef tmp_status = HAL_OK; - uint32_t WaitLoopIndex = 0; - - /* Check the parameters */ - assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); - assert_param(IS_ADC_SINGLE_DIFFERENTIAL(SingleDiff)); - - /* Process locked */ - __HAL_LOCK(hadc); - - /* Calibration prerequisite: ADC must be disabled. */ - - /* Disable the ADC (if not already disabled) */ - tmp_status = ADC_Disable(hadc); - - /* Check if ADC is effectively disabled */ - if (tmp_status == HAL_OK) - { - /* Change ADC state */ - /* Clear HAL_ADC_STATE_REG_BUSY and HAL_ADC_STATE_INJ_BUSY bits, set HAL_ADC_STATE_BUSY_INTERNAL bit */ - ADC_STATE_CLR_SET(hadc->State, (HAL_ADC_STATE_REG_BUSY|HAL_ADC_STATE_INJ_BUSY), HAL_ADC_STATE_BUSY_INTERNAL); - - /* Select calibration mode single ended or differential ended */ - MODIFY_REG(hadc->Instance->CR, ADC_CR_ADCALDIF, SingleDiff); - - /* Start ADC calibration */ - SET_BIT(hadc->Instance->CR, ADC_CR_ADCAL); - - - /* Wait for calibration completion */ - while(HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADCAL)) - { - WaitLoopIndex++; - if (WaitLoopIndex >= ADC_CALIBRATION_TIMEOUT) - { - /* Update ADC state machine to error */ - /* Clear HAL_ADC_STATE_BUSY_INTERNAL bit, set HAL_ADC_STATE_ERROR_INTERNAL bit */ - ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_BUSY_INTERNAL, HAL_ADC_STATE_ERROR_INTERNAL); - - /* Process unlocked */ - __HAL_UNLOCK(hadc); - - return HAL_ERROR; - } - } - - /* Clear HAL_ADC_STATE_BUSY_INTERNAL bit, set HAL_ADC_STATE_READY bit */ - ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_BUSY_INTERNAL, HAL_ADC_STATE_READY); - } - else - { - SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); - - /* Update ADC state machine to error */ - tmp_status = HAL_ERROR; - } - - - /* Process unlocked */ - __HAL_UNLOCK(hadc); - - /* Return function status */ - return tmp_status; -} - - - - -/** - * @brief Get the calibration factor from automatic conversion result. - * @param hadc: ADC handle. - * @param SingleDiff: Selection of single-ended or differential input - * This parameter can be one of the following values: - * @arg ADC_SINGLE_ENDED: Channel in mode input single ended - * @arg ADC_DIFFERENTIAL_ENDED: Channel in mode input differential ended - * @retval Converted value - */ -uint32_t HAL_ADCEx_Calibration_GetValue(ADC_HandleTypeDef* hadc, uint32_t SingleDiff) -{ - /* Check the parameters */ - assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); - assert_param(IS_ADC_SINGLE_DIFFERENTIAL(SingleDiff)); - - /* Return the selected ADC calibration value */ - if (SingleDiff == ADC_DIFFERENTIAL_ENDED) - { - return ADC_CALFACT_DIFF_GET(hadc->Instance->CALFACT); - } - else - { - return ((hadc->Instance->CALFACT) & ADC_CALFACT_CALFACT_S); - } -} - - - -/** - * @brief Set the calibration factor to overwrite automatic conversion result. ADC must be enabled and no conversion on going. - * @param hadc: ADC handle. - * @param SingleDiff: Selection of single-ended or differential input. - * This parameter can be one of the following values: - * @arg ADC_SINGLE_ENDED: Channel in mode input single ended - * @arg ADC_DIFFERENTIAL_ENDED: Channel in mode input differential ended - * @param CalibrationFactor: Calibration factor (coded on 7 bits maximum) - * @retval HAL state - */ -HAL_StatusTypeDef HAL_ADCEx_Calibration_SetValue(ADC_HandleTypeDef* hadc, uint32_t SingleDiff, uint32_t CalibrationFactor) -{ - HAL_StatusTypeDef tmp_status = HAL_OK; - - /* Check the parameters */ - assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); - assert_param(IS_ADC_SINGLE_DIFFERENTIAL(SingleDiff)); - assert_param(IS_ADC_CALFACT(CalibrationFactor)); - - /* Process locked */ - __HAL_LOCK(hadc); - - /* Verification of hardware constraints before modifying the calibration */ - /* factors register: ADC must be enabled, no conversion on going. */ - if ( (ADC_IS_ENABLE(hadc) != RESET) && - (ADC_IS_CONVERSION_ONGOING_REGULAR_INJECTED(hadc) == RESET) ) - { - /* Set the selected ADC calibration value */ - if (SingleDiff == ADC_DIFFERENTIAL_ENDED) - { - MODIFY_REG(hadc->Instance->CALFACT, ADC_CALFACT_CALFACT_D, ADC_CALFACT_DIFF_SET(CalibrationFactor)); - } - else - { - MODIFY_REG(hadc->Instance->CALFACT, ADC_CALFACT_CALFACT_S, CalibrationFactor); - } - } - else - { - /* Update ADC state machine */ - SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); - - /* Update ADC state machine to error */ - tmp_status = HAL_ERROR; - } - - /* Process unlocked */ - __HAL_UNLOCK(hadc); - - /* Return function status */ - return tmp_status; -} - - - -/** - * @brief Enable ADC, start conversion of injected group. - * @note Interruptions enabled in this function: None. - * @note Case of multimode enabled when multimode feature is available: - * HAL_ADCEx_InjectedStart() API must be called for ADC slave first, - * then for ADC master. - * For ADC slave, ADC is enabled only (conversion is not started). - * For ADC master, ADC is enabled and multimode conversion is started. - * @param hadc: ADC handle. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_ADCEx_InjectedStart(ADC_HandleTypeDef* hadc) -{ - HAL_StatusTypeDef tmp_status = HAL_OK; - - /* Check the parameters */ - assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); - - if (ADC_IS_CONVERSION_ONGOING_INJECTED(hadc)) - { - return HAL_BUSY; - } - else - { - - /* In case of software trigger detection enabled, JQDIS must be set - (which can be done only if ADSTART and JADSTART are both cleared). - If JQDIS is not set at that point, returns an error - - since software trigger detection is disabled. User needs to - resort to HAL_ADCEx_DisableInjectedQueue() API to set JQDIS. - - or (if JQDIS is intentionally reset) since JEXTEN = 0 which means - the queue is empty */ - if ((READ_BIT(hadc->Instance->JSQR, ADC_JSQR_JEXTEN) == RESET) - && (READ_BIT(hadc->Instance->CFGR, ADC_CFGR_JQDIS) == RESET)) - { - SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); - return HAL_ERROR; - } - - - /* Process locked */ - __HAL_LOCK(hadc); - - /* Enable the ADC peripheral */ - tmp_status = ADC_Enable(hadc); - - /* Start conversion if ADC is effectively enabled */ - if (tmp_status == HAL_OK) - { - /* Check if a regular conversion is ongoing */ - if (HAL_IS_BIT_SET(hadc->State, HAL_ADC_STATE_REG_BUSY)) - { - /* Reset ADC error code field related to injected conversions only */ - CLEAR_BIT(hadc->ErrorCode, HAL_ADC_ERROR_JQOVF); - } - else - { - /* Set ADC error code to none */ - ADC_CLEAR_ERRORCODE(hadc); - } - /* Update ADC state */ - /* Clear HAL_ADC_STATE_READY and HAL_ADC_STATE_INJ_EOC bits, set HAL_ADC_STATE_INJ_BUSY bit */ - ADC_STATE_CLR_SET(hadc->State, (HAL_ADC_STATE_READY|HAL_ADC_STATE_INJ_EOC), HAL_ADC_STATE_INJ_BUSY); - - /* Reset HAL_ADC_STATE_MULTIMODE_SLAVE bit - - by default if ADC is Master or Independent or if multimode feature is not available - - if multimode setting is set to independent mode (no dual regular or injected conversions are configured) */ - if (ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc)) - { - CLEAR_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE); - } - - - /* Clear injected group conversion flag */ - /* (To ensure of no unknown state from potential previous ADC operations) */ - __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_JEOC | ADC_FLAG_JEOS)); - - /* Enable conversion of injected group, if automatic injected conversion */ - /* is disabled. */ - /* If software start has been selected, conversion starts immediately. */ - /* If external trigger has been selected, conversion will start at next */ - /* trigger event. */ - /* Case of multimode enabled (when multimode feature is available): */ - /* if ADC is slave, */ - /* - ADC is enabled only (conversion is not started). */ - /* - if multimode only concerns regular conversion, ADC is enabled */ - /* and conversion is started. */ - /* If ADC is master or independent, */ - /* - ADC is enabled and conversion is started. */ - - /* Are injected conversions that of a dual Slave ? */ - if (ADC_INDEPENDENT_OR_NONMULTIMODEINJECTED_SLAVE(hadc)) - { - /* hadc is not the handle of a Slave ADC with dual injected conversions enabled: - set ADSTART only if JAUTO is cleared */ - /* Process unlocked */ - __HAL_UNLOCK(hadc); - if (HAL_IS_BIT_CLR(hadc->Instance->CFGR, ADC_CFGR_JAUTO)) - { - SET_BIT(hadc->Instance->CR, ADC_CR_JADSTART) ; - } - } - else - { - /* hadc is the handle of a Slave ADC with dual injected conversions enabled: - ADSTART is not set */ - SET_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE); - /* Process unlocked */ - __HAL_UNLOCK(hadc); - } - } - else - { - /* Process unlocked */ - __HAL_UNLOCK(hadc); - } /* if (tmp_status == HAL_OK) */ - - - /* Return function status */ - return tmp_status; - } /* if (ADC_IS_CONVERSION_ONGOING_INJECTED(hadc)) */ -} - - - -/** - * @brief Stop conversion of injected channels, disable ADC peripheral if no regular conversion is on going. - * @note If ADC must be disabled and if regular conversion - * is on going, function HAL_ADC_Stop() must be used. - * @note In case of auto-injection mode, HAL_ADC_Stop() must be used. - * @note In case of multimode enabled (when multimode feature is available), - * HAL_ADCEx_InjectedStop() must be called for ADC master first, then for ADC slave. - * For ADC master, conversion is stopped and ADC is disabled. - * For ADC slave, ADC is disabled only (conversion stop of ADC master - * has already stopped conversion of ADC slave). - * @param hadc: ADC handle. - * @retval None - */ -HAL_StatusTypeDef HAL_ADCEx_InjectedStop(ADC_HandleTypeDef* hadc) -{ - HAL_StatusTypeDef tmp_status = HAL_OK; - - /* Check the parameters */ - assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); - - /* Process locked */ - __HAL_LOCK(hadc); - - /* 1. Stop potential conversion on going on injected group only. */ - tmp_status = ADC_ConversionStop(hadc, ADC_INJECTED_GROUP); - - /* Disable ADC peripheral if injected conversions are effectively stopped */ - /* and if no conversion on regular group is on-going */ - if (tmp_status == HAL_OK) - { - if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) - { - /* 2. Disable the ADC peripheral */ - tmp_status = ADC_Disable(hadc); - - /* Check if ADC is effectively disabled */ - if (tmp_status == HAL_OK) - { - /* Change ADC state */ - /* Clear HAL_ADC_STATE_REG_BUSY and HAL_ADC_STATE_INJ_BUSY bits, set HAL_ADC_STATE_READY bit */ - ADC_STATE_CLR_SET(hadc->State, (HAL_ADC_STATE_REG_BUSY|HAL_ADC_STATE_INJ_BUSY), HAL_ADC_STATE_READY); - } - } - /* Conversion on injected group is stopped, but ADC not disabled since */ - /* conversion on regular group is still running. */ - else - { - /* Clear HAL_ADC_STATE_INJ_BUSY bit */ - CLEAR_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY); - } - } - - /* Process unlocked */ - __HAL_UNLOCK(hadc); - - /* Return function status */ - return tmp_status; -} - - - -/** - * @brief Wait for injected group conversion to be completed. - * @param hadc: ADC handle - * @param Timeout: Timeout value in millisecond. - * @note Depending on hadc->Init.EOCSelection, JEOS or JEOC is - * checked and cleared depending on AUTDLY bit status. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout) -{ - uint32_t tickstart; - uint32_t tmp_Flag_End = 0x00; - ADC_TypeDef *tmpADC_Master; - uint32_t tmp_cfgr = 0x00; - uint32_t tmp_cfgr_jqm_autdly = 0x00; - uint32_t tmp_jeos_raised = 0x01; /* by default, assume that JEOS is set, - tmp_jeos_raised will be corrected - accordingly during API execution */ - - /* Check the parameters */ - assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); - - /* If end of sequence selected */ - if (hadc->Init.EOCSelection == ADC_EOC_SEQ_CONV) - { - tmp_Flag_End = ADC_FLAG_JEOS; - } - else /* end of conversion selected */ - { - tmp_Flag_End = ADC_FLAG_JEOC; - } - - /* Get timeout */ - tickstart = HAL_GetTick(); - - /* Wait until End of Conversion or Sequence flag is raised */ - while(HAL_IS_BIT_CLR(hadc->Instance->ISR, tmp_Flag_End)) - { - /* Check if timeout is disabled (set to infinite wait) */ - if(Timeout != HAL_MAX_DELAY) - { - if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout)) - { - /* Update ADC state machine to timeout */ - SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT); - - /* Process unlocked */ - __HAL_UNLOCK(hadc); - - return HAL_TIMEOUT; - } - } - } - - /* Next, to clear the polled flag as well as to update the handle State, - JEOS is checked and the relevant configuration registers are retrieved. - JQM, JAUTO and CONT bits will have to be read for the State update, - AUTDLY for JEOS clearing. */ - /* 1. Check whether or not JEOS is set */ - if (HAL_IS_BIT_CLR(hadc->Instance->ISR, ADC_FLAG_JEOS)) - { - tmp_jeos_raised = 0; - } - /* 2. Check whether or not hadc is the handle of a Slave ADC with dual - injected conversions enabled. */ - if (ADC_INDEPENDENT_OR_NONMULTIMODEINJECTED_SLAVE(hadc) == RESET) - { - /* hadc is not the handle of a Slave ADC with dual injected conversions enabled: - check JQM and AUTDLY bits directly in ADC CFGR register */ - tmp_cfgr_jqm_autdly = READ_REG(hadc->Instance->CFGR); - } - else - { - /* hadc is the handle of a Slave ADC with dual injected conversions enabled: - need to check JQM and AUTDLY bits of Master ADC CFGR register */ - tmpADC_Master = ADC_MASTER_REGISTER(hadc); - tmp_cfgr_jqm_autdly = READ_REG(tmpADC_Master->CFGR); - } - /* 3. Check whether or not hadc is the handle of a Slave ADC with dual - regular conversions enabled. */ - if (ADC_INDEPENDENT_OR_NONMULTIMODEREGULAR_SLAVE(hadc)) - { - /* hadc is not the handle of a Slave ADC with dual regular conversions enabled: - check JAUTO and CONT bits directly in ADC CFGR register */ - tmp_cfgr = READ_REG(hadc->Instance->CFGR); - } - else - { - /* hadc is not the handle of a Slave ADC with dual regular conversions enabled: - check JAUTO and CONT bits of Master ADC CFGR register */ - tmpADC_Master = ADC_MASTER_REGISTER(hadc); - tmp_cfgr = READ_REG(tmpADC_Master->CFGR); - } - - - - /* Clear polled flag */ - if (tmp_Flag_End == ADC_FLAG_JEOS) - { - /* Clear end of sequence JEOS flag of injected group if low power feature */ - /* "LowPowerAutoWait " is disabled, to not interfere with this feature. */ - /* For injected groups, no new conversion will start before JEOS is */ - /* cleared. */ - /* Note that 1. reading ADCx_JDRy clears JEOC. */ - /* 2. in multimode with dual injected conversions enabled (when */ - /* multimode feature is available), Master AUTDLY bit is */ - /* checked. */ - if (READ_BIT (tmp_cfgr_jqm_autdly, ADC_CFGR_AUTDLY) == RESET) - { - __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOC); - } - } - else - { - __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JEOC); - } - - - /* Update ADC state machine */ - SET_BIT(hadc->State, HAL_ADC_STATE_INJ_EOC); - /* Are injected conversions over ? This is the case if JEOS is set AND - - injected conversions are software-triggered when injected queue management is disabled - OR - - auto-injection is enabled, continuous mode is disabled, - and regular conversions are software-triggered */ - - if (tmp_jeos_raised) - { - if ((ADC_IS_SOFTWARE_START_INJECTED(hadc) && (READ_BIT(tmp_cfgr_jqm_autdly, ADC_CFGR_JQM) != ADC_CFGR_JQM)) - && (!((READ_BIT(tmp_cfgr, (ADC_CFGR_JAUTO|ADC_CFGR_CONT)) == (ADC_CFGR_JAUTO|ADC_CFGR_CONT)) && - (ADC_IS_SOFTWARE_START_REGULAR(hadc))) )) - { - /* Clear HAL_ADC_STATE_INJ_BUSY bit */ - CLEAR_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY); - /* If no regular conversion on-going, set HAL_ADC_STATE_READY bit */ - if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_REG_BUSY)) - { - SET_BIT(hadc->State, HAL_ADC_STATE_READY); - } - } - } - - - - /* Return API HAL status */ - return HAL_OK; -} - - - -/** - * @brief Enable ADC, start conversion of injected group with interruption. - * @note Interruptions enabled in this function according to initialization - * setting : JEOC (end of conversion) or JEOS (end of sequence) - * @note Case of multimode enabled (when multimode feature is enabled): - * HAL_ADCEx_InjectedStart_IT() API must be called for ADC slave first, - * then for ADC master. - * For ADC slave, ADC is enabled only (conversion is not started). - * For ADC master, ADC is enabled and multimode conversion is started. - * @param hadc: ADC handle. - * @retval HAL status. - */ -HAL_StatusTypeDef HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef* hadc) -{ - HAL_StatusTypeDef tmp_status = HAL_OK; - - /* Check the parameters */ - assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); - - if (ADC_IS_CONVERSION_ONGOING_INJECTED(hadc)) - { - return HAL_BUSY; - } - else - { - - /* In case of software trigger detection enabled, JQDIS must be set - (which can be done only if ADSTART and JADSTART are both cleared). - If JQDIS is not set at that point, returns an error - - since software trigger detection is disabled. User needs to - resort to HAL_ADCEx_DisableInjectedQueue() API to set JQDIS. - - or (if JQDIS is intentionally reset) since JEXTEN = 0 which means - the queue is empty */ - if ((READ_BIT(hadc->Instance->JSQR, ADC_JSQR_JEXTEN) == RESET) - && (READ_BIT(hadc->Instance->CFGR, ADC_CFGR_JQDIS) == RESET)) - { - SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); - return HAL_ERROR; - } - - /* Process locked */ - __HAL_LOCK(hadc); - - /* Enable the ADC peripheral */ - tmp_status = ADC_Enable(hadc); - - /* Start conversion if ADC is effectively enabled */ - if (tmp_status == HAL_OK) - { - /* Check if a regular conversion is ongoing */ - if (HAL_IS_BIT_SET(hadc->State, HAL_ADC_STATE_REG_BUSY)) - { - /* Reset ADC error code field related to injected conversions only */ - CLEAR_BIT(hadc->ErrorCode, HAL_ADC_ERROR_JQOVF); - } - else - { - /* Set ADC error code to none */ - ADC_CLEAR_ERRORCODE(hadc); - } - /* Clear HAL_ADC_STATE_READY and HAL_ADC_STATE_INJ_EOC bits, set HAL_ADC_STATE_INJ_BUSY bit */ - ADC_STATE_CLR_SET(hadc->State, (HAL_ADC_STATE_READY|HAL_ADC_STATE_INJ_EOC), HAL_ADC_STATE_INJ_BUSY); - - /* Reset HAL_ADC_STATE_MULTIMODE_SLAVE bit - - by default if ADC is Master or Independent or if multimode feature is not available - - if multimode setting is set to independent mode (no dual regular or injected conversions are configured) */ - if (ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc)) - { - CLEAR_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE); - } - - /* Clear injected group conversion flag */ - /* (To ensure of no unknown state from potential previous ADC operations) */ - __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_JEOC | ADC_FLAG_JEOS)); - - /* Enable ADC Injected context queue overflow interrupt if this feature */ - /* is enabled. */ - if ((hadc->Instance->CFGR & ADC_CFGR_JQM) != RESET) - { - __HAL_ADC_ENABLE_IT(hadc, ADC_FLAG_JQOVF); - } - - /* Enable ADC end of conversion interrupt */ - switch(hadc->Init.EOCSelection) - { - case ADC_EOC_SEQ_CONV: - __HAL_ADC_DISABLE_IT(hadc, ADC_IT_JEOC); - __HAL_ADC_ENABLE_IT(hadc, ADC_IT_JEOS); - break; - /* case ADC_EOC_SINGLE_CONV */ - default: - __HAL_ADC_DISABLE_IT(hadc, ADC_IT_JEOS); - __HAL_ADC_ENABLE_IT(hadc, ADC_IT_JEOC); - break; - } - - /* Enable conversion of injected group, if automatic injected conversion */ - /* is disabled. */ - /* If software start has been selected, conversion starts immediately. */ - /* If external trigger has been selected, conversion will start at next */ - /* trigger event. */ - /* Case of multimode enabled (when multimode feature is available): */ - /* if ADC is slave, */ - /* - ADC is enabled only (conversion is not started), */ - /* - if multimode only concerns regular conversion, ADC is enabled */ - /* and conversion is started. */ - /* If ADC is master or independent, */ - /* - ADC is enabled and conversion is started. */ - - /* Are injected conversions that of a dual Slave ? */ - if (ADC_INDEPENDENT_OR_NONMULTIMODEINJECTED_SLAVE(hadc)) - { - /* hadc is not the handle of a Slave ADC with dual injected conversions enabled: - set ADSTART only if JAUTO is cleared */ - /* Process unlocked */ - __HAL_UNLOCK(hadc); - if (HAL_IS_BIT_CLR(hadc->Instance->CFGR, ADC_CFGR_JAUTO)) - { - SET_BIT(hadc->Instance->CR, ADC_CR_JADSTART) ; - } - } - else - { - /* hadc is the handle of a Slave ADC with dual injected conversions enabled: - ADSTART is not set */ - SET_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE); - /* Process unlocked */ - __HAL_UNLOCK(hadc); - } - } - else - { - /* Process unlocked */ - __HAL_UNLOCK(hadc); - } - - /* Return function status */ - return tmp_status; -} -} - - - -/** - * @brief Stop conversion of injected channels, disable interruption of end-of-conversion. - * @note Disable ADC peripheral if no regular conversion - * is on going. - * @note If ADC must be disabled and if regular conversion - * is on going, function HAL_ADC_Stop must be used first. - * @note Case of multimode enabled (when multimode feature is available): - * HAL_ADCEx_InjectedStop_IT() API must be called for ADC master first, - * then for ADC slave. - * For ADC master, conversion is stopped and ADC is disabled. - * For ADC slave, ADC is disabled only (conversion stop of ADC master - * has already stopped conversion of ADC slave). - * @note In case of auto-injection mode, HAL_ADC_Stop() must be used. - * @param hadc: ADC handle - * @retval None - */ -HAL_StatusTypeDef HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef* hadc) -{ - HAL_StatusTypeDef tmp_status = HAL_OK; - - /* Check the parameters */ - assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); - - /* Process locked */ - __HAL_LOCK(hadc); - - /* 1. Stop potential conversion on going on injected group only. */ - tmp_status = ADC_ConversionStop(hadc, ADC_INJECTED_GROUP); - - /* Disable ADC peripheral if injected conversions are effectively stopped */ - /* and if no conversion on the other group (regular group) is intended to */ - /* continue. */ - if (tmp_status == HAL_OK) - { - /* Disable ADC end of conversion interrupt for injected channels */ - __HAL_ADC_DISABLE_IT(hadc, (ADC_IT_JEOC | ADC_IT_JEOS | ADC_FLAG_JQOVF)); - - if ((ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)) - { - /* 2. Disable the ADC peripheral */ - tmp_status = ADC_Disable(hadc); - - /* Check if ADC is effectively disabled */ - if (tmp_status == HAL_OK) - { - /* Change ADC state */ - /* Clear HAL_ADC_STATE_REG_BUSY and HAL_ADC_STATE_INJ_BUSY bits, set HAL_ADC_STATE_READY bit */ - ADC_STATE_CLR_SET(hadc->State, (HAL_ADC_STATE_REG_BUSY|HAL_ADC_STATE_INJ_BUSY), HAL_ADC_STATE_READY); - } - } - /* Conversion on injected group is stopped, but ADC not disabled since */ - /* conversion on regular group is still running. */ - else - { - /* Clear HAL_ADC_STATE_INJ_BUSY bit */ - CLEAR_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY); - } - } - - /* Process unlocked */ - __HAL_UNLOCK(hadc); - - /* Return function status */ - return tmp_status; -} - - - -/** - * @brief Enable ADC, start MultiMode conversion and transfer regular results through DMA. - * @note Multimode must have been previously configured using - * HAL_ADCEx_MultiModeConfigChannel() function. - * Interruptions enabled in this function: - * overrun, DMA half transfer, DMA transfer complete. - * Each of these interruptions has its dedicated callback function. - * @note State field of Slave ADC handle is not updated in this configuration: - * user should not rely on it for information related to Slave regular - * conversions. - * @param hadc: ADC handle of ADC master (handle of ADC slave must not be used) - * @param pData: Destination Buffer address. - * @param Length: Length of data to be transferred from ADC peripheral to memory (in bytes). - * @retval None - */ -HAL_StatusTypeDef HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length) -{ - HAL_StatusTypeDef tmp_status = HAL_OK; - ADC_HandleTypeDef tmphadcSlave; - ADC_Common_TypeDef *tmpADC_Common; - - /* Check the parameters */ - assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance)); - assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode)); - assert_param(IS_ADC_EXTTRIG_EDGE(hadc->Init.ExternalTrigConvEdge)); - assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DMAContinuousRequests)); - - if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc)) - { - return HAL_BUSY; - } - else - { - /* Process locked */ - __HAL_LOCK(hadc); - - /* Set a temporary handle of the ADC slave associated to the ADC master */ - ADC_MULTI_SLAVE(hadc, &tmphadcSlave); - - if (tmphadcSlave.Instance == NULL) - { - /* Update ADC state machine to error */ - SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); - - /* Process unlocked */ - __HAL_UNLOCK(hadc); - - return HAL_ERROR; - } - - - /* Enable the ADC peripherals: master and slave (in case if not already */ - /* enabled previously) */ - tmp_status = ADC_Enable(hadc); - if (tmp_status == HAL_OK) - { - tmp_status = ADC_Enable(&tmphadcSlave); - } - - /* Start multimode conversion of ADCs pair */ - if (tmp_status == HAL_OK) - { - /* Update Master State */ - /* Clear HAL_ADC_STATE_READY and regular conversion results bits, set HAL_ADC_STATE_REG_BUSY bit */ - ADC_STATE_CLR_SET(hadc->State, (HAL_ADC_STATE_READY|HAL_ADC_STATE_REG_EOC|HAL_ADC_STATE_REG_OVR|HAL_ADC_STATE_REG_EOSMP), HAL_ADC_STATE_REG_BUSY); - - - /* Set ADC error code to none */ - ADC_CLEAR_ERRORCODE(hadc); - - - /* Set the DMA transfer complete callback */ - hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt; - - /* Set the DMA half transfer complete callback */ - hadc->DMA_Handle->XferHalfCpltCallback = ADC_DMAHalfConvCplt; - - /* Set the DMA error callback */ - hadc->DMA_Handle->XferErrorCallback = ADC_DMAError ; - - /* Pointer to the common control register */ - tmpADC_Common = ADC_COMMON_REGISTER(hadc); - - - /* Manage ADC and DMA start: ADC overrun interruption, DMA start, ADC */ - /* start (in case of SW start): */ - - /* Clear regular group conversion flag and overrun flag */ - /* (To ensure of no unknown state from potential previous ADC operations) */ - __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS | ADC_FLAG_OVR)); - - /* Enable ADC overrun interrupt */ - __HAL_ADC_ENABLE_IT(hadc, ADC_IT_OVR); - - /* Start the DMA channel */ - HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&tmpADC_Common->CDR, (uint32_t)pData, Length); - - /* Enable conversion of regular group. */ - /* Process unlocked */ - __HAL_UNLOCK(hadc); - /* If software start has been selected, conversion starts immediately. */ - /* If external trigger has been selected, conversion will start at next */ - /* trigger event. */ - SET_BIT(hadc->Instance->CR, ADC_CR_ADSTART); - - } - else - { - /* Process unlocked */ - __HAL_UNLOCK(hadc); - } - - /* Return function status */ - return tmp_status; - } -} - -/** - * @brief Stop multimode ADC conversion, disable ADC DMA transfer, disable ADC peripheral. - * @note Multimode is kept enabled after this function. MultiMode DMA bits - * (MDMA and DMACFG bits of common CCR register) are maintained. To disable - * Multimode (set with HAL_ADCEx_MultiModeConfigChannel()), ADC must be - * reinitialized using HAL_ADC_Init() or HAL_ADC_DeInit(), or the user can - * resort to HAL_ADCEx_DisableMultiMode() API. - * @note In case of DMA configured in circular mode, function - * HAL_ADC_Stop_DMA() must be called after this function with handle of - * ADC slave, to properly disable the DMA channel. - * @param hadc: ADC handle of ADC master (handle of ADC slave must not be used) - * @retval None - */ -HAL_StatusTypeDef HAL_ADCEx_MultiModeStop_DMA(ADC_HandleTypeDef* hadc) -{ - HAL_StatusTypeDef tmp_status = HAL_OK; - uint32_t tickstart; - ADC_HandleTypeDef tmphadcSlave; - - /* Check the parameters */ - assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance)); - - /* Process locked */ - __HAL_LOCK(hadc); - - - /* 1. Stop potential multimode conversion on going, on regular and injected groups */ - tmp_status = ADC_ConversionStop(hadc, ADC_REGULAR_INJECTED_GROUP); - - /* Disable ADC peripheral if conversions are effectively stopped */ - if (tmp_status == HAL_OK) - { - /* Set a temporary handle of the ADC slave associated to the ADC master */ - ADC_MULTI_SLAVE(hadc, &tmphadcSlave); - - if (tmphadcSlave.Instance == NULL) - { - /* Update ADC state machine to error */ - SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); - - /* Process unlocked */ - __HAL_UNLOCK(hadc); - - return HAL_ERROR; - } - - /* Procedure to disable the ADC peripheral: wait for conversions */ - /* effectively stopped (ADC master and ADC slave), then disable ADC */ - - /* 1. Wait until ADSTP=0 for ADC master and ADC slave*/ - tickstart = HAL_GetTick(); - - while(ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) || - ADC_IS_CONVERSION_ONGOING_REGULAR(&tmphadcSlave) ) - { - if((HAL_GetTick()-tickstart) > ADC_STOP_CONVERSION_TIMEOUT) - { - /* Update ADC state machine to error */ - SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); - - /* Process unlocked */ - __HAL_UNLOCK(hadc); - - return HAL_ERROR; - } - } - - /* Disable the DMA channel (in case of DMA in circular mode or stop */ - /* while DMA transfer is on going) */ - /* Note: DMA channel of ADC slave should be stopped after this function */ - /* with HAL_ADC_Stop_DMA() API. */ - tmp_status = HAL_DMA_Abort(hadc->DMA_Handle); - - /* Check if DMA channel effectively disabled */ - if (tmp_status == HAL_ERROR) - { - /* Update ADC state machine to error */ - SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA); - } - - /* Disable ADC overrun interrupt */ - __HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR); - - - - /* 2. Disable the ADC peripherals: master and slave */ - /* Update "tmp_status" only if DMA channel disabling passed, to keep in */ - /* memory a potential failing status. */ - if (tmp_status == HAL_OK) - { - /* Check if ADC are effectively disabled */ - if ((ADC_Disable(hadc) == HAL_OK) && - (ADC_Disable(&tmphadcSlave) == HAL_OK) ) - { - tmp_status = HAL_OK; - } - } - else - { - ADC_Disable(hadc); - ADC_Disable(&tmphadcSlave); - } - /* Change ADC state (ADC master) */ - /* Clear HAL_ADC_STATE_REG_BUSY and HAL_ADC_STATE_INJ_BUSY bits, set HAL_ADC_STATE_READY bit */ - ADC_STATE_CLR_SET(hadc->State, (HAL_ADC_STATE_REG_BUSY|HAL_ADC_STATE_INJ_BUSY), HAL_ADC_STATE_READY); - - } - - /* Process unlocked */ - __HAL_UNLOCK(hadc); - - /* Return function status */ - return tmp_status; -} - - -/** - * @brief Return the last ADC Master and Slave regular conversions results when in multimode configuration. - * @param hadc: ADC handle of ADC Master (handle of ADC Slave must not be used) - * @retval The converted data values. - */ -uint32_t HAL_ADCEx_MultiModeGetValue(ADC_HandleTypeDef* hadc) -{ - ADC_Common_TypeDef *tmpADC_Common; - - /* Check the parameters */ - assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance)); - - /* Pointer to the common control register */ - tmpADC_Common = ADC_COMMON_REGISTER(hadc); - - /* Return the multi mode conversion value */ - return tmpADC_Common->CDR; -} - - -/** - * @brief Get ADC injected group conversion result. - * @param hadc: ADC handle - * @param InjectedRank: the converted ADC injected rank. - * This parameter can be one of the following values: - * @arg ADC_INJECTED_RANK_1: Injected Channel1 selected - * @arg ADC_INJECTED_RANK_2: Injected Channel2 selected - * @arg ADC_INJECTED_RANK_3: Injected Channel3 selected - * @arg ADC_INJECTED_RANK_4: Injected Channel4 selected - * @note Reading JDRy register automatically clears JEOC flag. To reset JEOS - * flag the user must resort to the macro - * __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JEOS). - * @retval None - */ -uint32_t HAL_ADCEx_InjectedGetValue(ADC_HandleTypeDef* hadc, uint32_t InjectedRank) -{ - uint32_t tmp_jdr = 0; - - /* Check the parameters */ - assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); - assert_param(IS_ADC_INJECTED_RANK(InjectedRank)); - - - /* Get ADC converted value */ - switch(InjectedRank) - { - case ADC_INJECTED_RANK_4: - tmp_jdr = hadc->Instance->JDR4; - break; - case ADC_INJECTED_RANK_3: - tmp_jdr = hadc->Instance->JDR3; - break; - case ADC_INJECTED_RANK_2: - tmp_jdr = hadc->Instance->JDR2; - break; - case ADC_INJECTED_RANK_1: - default: - tmp_jdr = hadc->Instance->JDR1; - break; - } - - /* Return ADC converted value */ - return tmp_jdr; -} - -/** - * @brief Injected conversion complete callback in non-blocking mode. - * @param hadc: ADC handle - * @retval None - */ -__weak void HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef* hadc) -{ - /* NOTE : This function should not be modified. When the callback is needed, - function HAL_ADCEx_InjectedConvCpltCallback must be implemented in the user file. - */ -} - - -/** - * @brief Injected context queue overflow callback. - * @note This callback is called if injected context queue is enabled - (parameter "QueueInjectedContext" in injected channel configuration) - and if a new injected context is set when queue is full (maximum 2 - contexts). - * @param hadc: ADC handle - * @retval None - */ -__weak void HAL_ADCEx_InjectedQueueOverflowCallback(ADC_HandleTypeDef* hadc) -{ - /* NOTE : This function should not be modified. When the callback is needed, - function HAL_ADCEx_InjectedQueueOverflowCallback must be implemented in the user file. - */ -} - -/** - * @brief Analog watchdog 2 callback in non-blocking mode. - * @param hadc: ADC handle - * @retval None - */ -__weak void HAL_ADCEx_LevelOutOfWindow2Callback(ADC_HandleTypeDef* hadc) -{ - /* NOTE : This function should not be modified. When the callback is needed, - function HAL_ADCEx_LevelOutOfWindow2Callback must be implemented in the user file. - */ -} - -/** - * @brief Analog watchdog 3 callback in non-blocking mode. - * @param hadc: ADC handle - * @retval None - */ -__weak void HAL_ADCEx_LevelOutOfWindow3Callback(ADC_HandleTypeDef* hadc) -{ - /* NOTE : This function should not be modified. When the callback is needed, - function HAL_ADCEx_LevelOutOfWindow3Callback must be implemented in the user file. - */ -} - - -/** - * @brief End Of Sampling callback in non-blocking mode. - * @param hadc: ADC handle - * @retval None - */ -__weak void HAL_ADCEx_EndOfSamplingCallback(ADC_HandleTypeDef* hadc) -{ - /* NOTE : This function should not be modified. When the callback is needed, - function HAL_ADCEx_EndOfSamplingCallback must be implemented in the user file. - */ -} - - - -/** - * @brief Stop ADC conversion of regular groups, disable ADC peripheral if no injected conversion is on-going. - * @param hadc: ADC handle - * @retval HAL status. - */ -HAL_StatusTypeDef HAL_ADCEx_RegularStop(ADC_HandleTypeDef* hadc) -{ - HAL_StatusTypeDef tmp_status = HAL_OK; - - /* Check the parameters */ - assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); - - /* Process locked */ - __HAL_LOCK(hadc); - - /* 1. Stop potential regular conversion on going */ - tmp_status = ADC_ConversionStop(hadc, ADC_REGULAR_GROUP); - - /* Disable ADC peripheral if regular conversions are effectively stopped - and if no injected conversions are on-going */ - if (tmp_status == HAL_OK) - { - /* Clear HAL_ADC_STATE_REG_BUSY bit */ - CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY); - - if (ADC_IS_CONVERSION_ONGOING_INJECTED(hadc) == RESET) - { - /* 2. Disable the ADC peripheral */ - tmp_status = ADC_Disable(hadc); - - /* Check if ADC is effectively disabled */ - if (tmp_status == HAL_OK) - { - /* Change ADC state */ - /* Clear HAL_ADC_STATE_INJ_BUSY bit, set HAL_ADC_STATE_READY bit */ - ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY, HAL_ADC_STATE_READY); - } - } - /* Conversion on injected group is stopped, but ADC not disabled since */ - /* conversion on regular group is still running. */ - else - { - SET_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY); - } - } - - /* Process unlocked */ - __HAL_UNLOCK(hadc); - - /* Return function status */ - return tmp_status; -} - - -/** - * @brief Stop ADC conversion of regular groups when interruptions are enabled, disable ADC peripheral if no injected conversion is on-going. - * @param hadc: ADC handle - * @retval HAL status. - */ -HAL_StatusTypeDef HAL_ADCEx_RegularStop_IT(ADC_HandleTypeDef* hadc) -{ - HAL_StatusTypeDef tmp_status = HAL_OK; - - /* Check the parameters */ - assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); - - /* Process locked */ - __HAL_LOCK(hadc); - - /* 1. Stop potential regular conversion on going */ - tmp_status = ADC_ConversionStop(hadc, ADC_REGULAR_GROUP); - - /* Disable ADC peripheral if conversions are effectively stopped - and if no injected conversion is on-going */ - if (tmp_status == HAL_OK) - { - /* Clear HAL_ADC_STATE_REG_BUSY bit */ - CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY); - - /* Disable all regular-related interrupts */ - __HAL_ADC_DISABLE_IT(hadc, (ADC_IT_EOC | ADC_IT_EOS | ADC_IT_OVR)); - - /* 2. Disable ADC peripheral if no injected conversions are on-going */ - if (ADC_IS_CONVERSION_ONGOING_INJECTED(hadc) == RESET) - { - tmp_status = ADC_Disable(hadc); - /* if no issue reported */ - if (tmp_status == HAL_OK) - { - /* Change ADC state */ - /* Clear HAL_ADC_STATE_INJ_BUSY bit, set HAL_ADC_STATE_READY bit */ - ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY, HAL_ADC_STATE_READY); - } - } - else - { - SET_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY); - } - } - - /* Process unlocked */ - __HAL_UNLOCK(hadc); - - /* Return function status */ - return tmp_status; -} - - -/** - * @brief Stop ADC conversion of regular groups and disable ADC DMA transfer, disable ADC peripheral if no injected conversion is on-going. - * @note HAL_ADCEx_RegularStop_DMA() function is dedicated to single-ADC mode only. - * For multimode (when multimode feature is available), - * HAL_ADCEx_RegularMultiModeStop_DMA() API must be used. - * @param hadc: ADC handle - * @retval HAL status. - */ -HAL_StatusTypeDef HAL_ADCEx_RegularStop_DMA(ADC_HandleTypeDef* hadc) -{ - HAL_StatusTypeDef tmp_status = HAL_OK; - - /* Check the parameters */ - assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); - - /* Process locked */ - __HAL_LOCK(hadc); - - /* 1. Stop potential regular conversion on going */ - tmp_status = ADC_ConversionStop(hadc, ADC_REGULAR_GROUP); - - /* Disable ADC peripheral if conversions are effectively stopped - and if no injected conversion is on-going */ - if (tmp_status == HAL_OK) - { - /* Clear HAL_ADC_STATE_REG_BUSY bit */ - CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY); - - /* Disable ADC DMA (ADC DMA configuration ADC_CFGR_DMACFG is kept) */ - CLEAR_BIT(hadc->Instance->CFGR, ADC_CFGR_DMAEN); - - /* Disable the DMA channel (in case of DMA in circular mode or stop while */ - /* while DMA transfer is on going) */ - tmp_status = HAL_DMA_Abort(hadc->DMA_Handle); - - /* Check if DMA channel effectively disabled */ - if (tmp_status != HAL_OK) - { - /* Update ADC state machine to error */ - SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA); - } - - /* Disable ADC overrun interrupt */ - __HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR); - - /* 2. Disable the ADC peripheral */ - /* Update "tmp_status" only if DMA channel disabling passed, to keep in */ - /* memory a potential failing status. */ - if (ADC_IS_CONVERSION_ONGOING_INJECTED(hadc) == RESET) - { - if (tmp_status == HAL_OK) - { - tmp_status = ADC_Disable(hadc); - } - else - { - ADC_Disable(hadc); - } - - /* Check if ADC is effectively disabled */ - if (tmp_status == HAL_OK) - { - /* Change ADC state */ - /* Clear HAL_ADC_STATE_INJ_BUSY bit, set HAL_ADC_STATE_READY bit */ - ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY, HAL_ADC_STATE_READY); - } - } - else - { - SET_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY); - } - } - - /* Process unlocked */ - __HAL_UNLOCK(hadc); - - /* Return function status */ - return tmp_status; -} - - - -/** - * @brief Stop DMA-based multimode ADC conversion, disable ADC DMA transfer, disable ADC peripheral if no injected conversion is on-going. - * @note Multimode is kept enabled after this function. Multimode DMA bits - * (MDMA and DMACFG bits of common CCR register) are maintained. To disable - * multimode (set with HAL_ADCEx_MultiModeConfigChannel()), ADC must be - * reinitialized using HAL_ADC_Init() or HAL_ADC_DeInit(), or the user can - * resort to HAL_ADCEx_DisableMultiMode() API. - * @note In case of DMA configured in circular mode, function - * HAL_ADCEx_RegularStop_DMA() must be called after this function with handle of - * ADC slave, to properly disable the DMA channel. - * @param hadc: ADC handle of ADC master (handle of ADC slave must not be used) - * @retval None - */ -HAL_StatusTypeDef HAL_ADCEx_RegularMultiModeStop_DMA(ADC_HandleTypeDef* hadc) -{ - HAL_StatusTypeDef tmp_status = HAL_OK; - uint32_t tickstart; - ADC_HandleTypeDef tmphadcSlave; - - /* Check the parameters */ - assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance)); - - /* Process locked */ - __HAL_LOCK(hadc); - - - /* 1. Stop potential multimode conversion on going, on regular groups */ - tmp_status = ADC_ConversionStop(hadc, ADC_REGULAR_GROUP); - - /* Disable ADC peripheral if conversions are effectively stopped */ - if (tmp_status == HAL_OK) - { - /* Clear HAL_ADC_STATE_REG_BUSY bit */ - CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY); - - /* Set a temporary handle of the ADC slave associated to the ADC master */ - ADC_MULTI_SLAVE(hadc, &tmphadcSlave); - - if (tmphadcSlave.Instance == NULL) - { - /* Update ADC state machine to error */ - SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); - - /* Process unlocked */ - __HAL_UNLOCK(hadc); - - return HAL_ERROR; - } - - /* Procedure to disable the ADC peripheral: wait for conversions */ - /* effectively stopped (ADC master and ADC slave), then disable ADC */ - - /* 1. Wait until ADSTP=0 for ADC master and ADC slave*/ - tickstart = HAL_GetTick(); - - while(ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) || - ADC_IS_CONVERSION_ONGOING_REGULAR(&tmphadcSlave) ) - { - if((HAL_GetTick()-tickstart) > ADC_STOP_CONVERSION_TIMEOUT) - { - /* Update ADC state machine to error */ - SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); - - /* Process unlocked */ - __HAL_UNLOCK(hadc); - - return HAL_ERROR; - } - } - - /* Disable the DMA channel (in case of DMA in circular mode or stop */ - /* while DMA transfer is on going) */ - /* Note: DMA channel of ADC slave should be stopped after this function */ - /* with HAL_ADCEx_RegularStop_DMA() API. */ - tmp_status = HAL_DMA_Abort(hadc->DMA_Handle); - - /* Check if DMA channel effectively disabled */ - if (tmp_status != HAL_OK) - { - /* Update ADC state machine to error */ - SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA); - } - - /* Disable ADC overrun interrupt */ - __HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR); - - - - /* 2. Disable the ADC peripherals: master and slave if no injected */ - /* conversion is on-going. */ - /* Update "tmp_status" only if DMA channel disabling passed, to keep in */ - /* memory a potential failing status. */ - if (tmp_status == HAL_OK) - { - if (ADC_IS_CONVERSION_ONGOING_INJECTED(hadc) == RESET) - { - tmp_status = ADC_Disable(hadc); - if (tmp_status == HAL_OK) - { - if (ADC_IS_CONVERSION_ONGOING_INJECTED(&tmphadcSlave) == RESET) - { - tmp_status = ADC_Disable(&tmphadcSlave); - } - } - } - - if (tmp_status == HAL_OK) - { - /* Both Master and Slave ADC's could be disabled. Update Master State */ - /* Clear HAL_ADC_STATE_INJ_BUSY bit, set HAL_ADC_STATE_READY bit */ - ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY, HAL_ADC_STATE_READY); - } - else - { - /* injected (Master or Slave) conversions are still on-going, - no Master State change */ - } - - - } - - - } - - /* Process unlocked */ - __HAL_UNLOCK(hadc); - - /* Return function status */ - return tmp_status; -} - -/** - * @} - */ - -/** @defgroup ADCEx_Exported_Functions_Group2 Extended Peripheral Control functions - * @brief Extended Peripheral Control functions - * -@verbatim - =============================================================================== - ##### Peripheral Control functions ##### - =============================================================================== - [..] This section provides functions allowing to: - (+) Configure channels on injected group - (+) Configure multimode when multimode feature is available - (+) Enable or Disable Injected Queue - (+) Disable ADC voltage regulator - (+) Enter ADC deep-power-down mode - - -@endverbatim - * @{ - */ - -/** - * @brief Configure the ADC injected group and the selected channel to be linked to the injected group. - * @note Possibility to update parameters on the fly: - * This function initializes injected group, consecutive calls to this - * function can be used to reconfigure some parameters of structure - * "ADC_InjectionConfTypeDef" on the fly, without resetting the ADC. - * The setting of these parameters is conditioned to ADC state. - * For parameters constraints, see comments of structure - * "ADC_InjectionConfTypeDef". - * @note In case of usage of internal measurement channels (Vbat/VrefInt/TempSensor), - * The internal paths can be disabled using function HAL_ADC_DeInit(). - * @note To reset injected sequencer, function HAL_ADCEx_InjectedStop() can - * be used. - * @note Caution: For Injected Context Queue use, a context must be fully - * defined before start of injected conversion. All channels are configured - * consecutively for the same ADC instance. Therefore, the number of calls to - * HAL_ADCEx_InjectedConfigChannel() must be equal to the value of parameter - * InjectedNbrOfConversion for each context. - * - Example 1: If 1 context is intended to be used (or if there is no use of the - * Injected Queue Context feature) and if the context contains 3 injected ranks - * (InjectedNbrOfConversion = 3), HAL_ADCEx_InjectedConfigChannel() must be - * called once for each channel (i.e. 3 times) before starting a conversion. - * This function must not be called to configure a 4th injected channel: - * it would start a new context into context queue. - * - Example 2: If 2 contexts are intended to be used and each of them contains - * 3 injected ranks (InjectedNbrOfConversion = 3), - * HAL_ADCEx_InjectedConfigChannel() must be called once for each channel and - * for each context (3 channels x 2 contexts = 6 calls). Conversion can - * start once the 1st context is set, that is after the first three - * HAL_ADCEx_InjectedConfigChannel() calls. The 2nd context can be set on the fly. - * @param hadc: ADC handle - * @param sConfigInjected: Structure of ADC injected group and ADC channel for - * injected group. - * @retval None - */ -HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc, ADC_InjectionConfTypeDef* sConfigInjected) -{ - HAL_StatusTypeDef tmp_status = HAL_OK; - ADC_Common_TypeDef *tmpADC_Common; - uint32_t tmpOffsetShifted; - uint32_t wait_loop_index = 0; - - - uint32_t tmp_JSQR_ContextQueueBeingBuilt = 0; - - /* Check the parameters */ - assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); - assert_param(IS_ADC_SAMPLE_TIME(sConfigInjected->InjectedSamplingTime)); - assert_param(IS_ADC_SINGLE_DIFFERENTIAL(sConfigInjected->InjectedSingleDiff)); - assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->AutoInjectedConv)); - assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->QueueInjectedContext)); - assert_param(IS_ADC_EXTTRIGINJEC_EDGE(sConfigInjected->ExternalTrigInjecConvEdge)); - assert_param(IS_ADC_EXTTRIGINJEC(sConfigInjected->ExternalTrigInjecConv)); - assert_param(IS_ADC_OFFSET_NUMBER(sConfigInjected->InjectedOffsetNumber)); - assert_param(IS_ADC_RANGE(ADC_GET_RESOLUTION(hadc), sConfigInjected->InjectedOffset)); - assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->InjecOversamplingMode)); - - if(hadc->Init.ScanConvMode != ADC_SCAN_DISABLE) - { - assert_param(IS_ADC_INJECTED_RANK(sConfigInjected->InjectedRank)); - assert_param(IS_ADC_INJECTED_NB_CONV(sConfigInjected->InjectedNbrOfConversion)); - assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->InjectedDiscontinuousConvMode)); - } - - - /* if JOVSE is set, the value of the OFFSETy_EN bit in ADCx_OFRy register is - ignored (considered as reset) */ - assert_param(!((sConfigInjected->InjectedOffsetNumber != ADC_OFFSET_NONE) && (sConfigInjected->InjecOversamplingMode == ENABLE))); - - /* JDISCEN and JAUTO bits can't be set at the same time */ - assert_param(!((sConfigInjected->InjectedDiscontinuousConvMode == ENABLE) && (sConfigInjected->AutoInjectedConv == ENABLE))); - - /* DISCEN and JAUTO bits can't be set at the same time */ - assert_param(!((hadc->Init.DiscontinuousConvMode == ENABLE) && (sConfigInjected->AutoInjectedConv == ENABLE))); - - /* Verification of channel number */ - if (sConfigInjected->InjectedSingleDiff != ADC_DIFFERENTIAL_ENDED) - { - assert_param(IS_ADC_CHANNEL(hadc, sConfigInjected->InjectedChannel)); - } - else - { - assert_param(IS_ADC_DIFF_CHANNEL(hadc, sConfigInjected->InjectedChannel)); - } - - - /* Process locked */ - __HAL_LOCK(hadc); - - - - /* Configuration of Injected group sequencer. */ - /* Hardware constraint: Must fully define injected context register JSQR */ - /* before make it entering into injected sequencer queue. */ - /* */ - /* - if scan mode is disabled: */ - /* * Injected channels sequence length is set to 0x00: 1 channel */ - /* converted (channel on injected rank 1) */ - /* Parameter "InjectedNbrOfConversion" is discarded. */ - /* * Injected context register JSQR setting is simple: register is fully */ - /* defined on one call of this function (for injected rank 1) and can */ - /* be entered into queue directly. */ - /* - if scan mode is enabled: */ - /* * Injected channels sequence length is set to parameter */ - /* "InjectedNbrOfConversion". */ - /* * Injected context register JSQR setting more complex: register is */ - /* fully defined over successive calls of this function, for each */ - /* injected channel rank. It is entered into queue only when all */ - /* injected ranks have been set. */ - /* Note: Scan mode is not present by hardware on this device, but used */ - /* by software for alignment over all STM32 devices. */ - - if ((hadc->Init.ScanConvMode == ADC_SCAN_DISABLE) || - (sConfigInjected->InjectedNbrOfConversion == 1) ) - { - /* Configuration of context register JSQR: */ - /* - number of ranks in injected group sequencer: fixed to 1st rank */ - /* (scan mode disabled, only rank 1 used) */ - /* - external trigger to start conversion */ - /* - external trigger polarity */ - /* - channel set to rank 1 (scan mode disabled, only rank 1 can be used) */ - - if (sConfigInjected->InjectedRank == ADC_INJECTED_RANK_1) - { - /* Enable external trigger if trigger selection is different of */ - /* software start. */ - /* Note: This configuration keeps the hardware feature of parameter */ - /* ExternalTrigInjecConvEdge "trigger edge none" equivalent to */ - /* software start. */ - if ((sConfigInjected->ExternalTrigInjecConv != ADC_INJECTED_SOFTWARE_START) - && (sConfigInjected->ExternalTrigInjecConvEdge != ADC_EXTERNALTRIGINJECCONV_EDGE_NONE)) - { - tmp_JSQR_ContextQueueBeingBuilt = ( ADC_JSQR_RK(sConfigInjected->InjectedChannel, ADC_INJECTED_RANK_1) | - sConfigInjected->ExternalTrigInjecConv | - sConfigInjected->ExternalTrigInjecConvEdge ); - } - else - { - tmp_JSQR_ContextQueueBeingBuilt = ( ADC_JSQR_RK(sConfigInjected->InjectedChannel, ADC_INJECTED_RANK_1) ); - } - - - MODIFY_REG(hadc->Instance->JSQR, ADC_JSQR_FIELDS, tmp_JSQR_ContextQueueBeingBuilt); - /* For debug and informative reasons, hadc handle saves JSQR setting */ - hadc->InjectionConfig.ContextQueue = tmp_JSQR_ContextQueueBeingBuilt; - - } - } - else - { - /* Case of scan mode enabled, several channels to set into injected group */ - /* sequencer. */ - /* */ - /* Procedure to define injected context register JSQR over successive */ - /* calls of this function, for each injected channel rank: */ - /* 1. Start new context and set parameters related to all injected */ - /* channels: injected sequence length and trigger. */ - - /* if hadc->InjectionConfig.ChannelCount is equal to 0, this is the first */ - /* call of the context under setting */ - if (hadc->InjectionConfig.ChannelCount == 0) - { - /* Initialize number of channels that will be configured on the context */ - /* being built */ - hadc->InjectionConfig.ChannelCount = sConfigInjected->InjectedNbrOfConversion; - /* Handle hadc saves the context under build up over each HAL_ADCEx_InjectedConfigChannel() - call, this context will be written in JSQR register at the last call. - At this point, the context is merely reset */ - hadc->InjectionConfig.ContextQueue = (uint32_t)0x00000000; - - /* Configuration of context register JSQR: */ - /* - number of ranks in injected group sequencer */ - /* - external trigger to start conversion */ - /* - external trigger polarity */ - - /* Enable external trigger if trigger selection is different of */ - /* software start. */ - /* Note: This configuration keeps the hardware feature of parameter */ - /* ExternalTrigInjecConvEdge "trigger edge none" equivalent to */ - /* software start. */ - if ((sConfigInjected->ExternalTrigInjecConv != ADC_INJECTED_SOFTWARE_START) - && (sConfigInjected->ExternalTrigInjecConvEdge != ADC_EXTERNALTRIGINJECCONV_EDGE_NONE)) - { - tmp_JSQR_ContextQueueBeingBuilt = ((sConfigInjected->InjectedNbrOfConversion - (uint32_t)1) | - sConfigInjected->ExternalTrigInjecConv | - sConfigInjected->ExternalTrigInjecConvEdge ); - } - else - { - tmp_JSQR_ContextQueueBeingBuilt = ((sConfigInjected->InjectedNbrOfConversion - (uint32_t)1) ); - } - - - } /* if (hadc->InjectionConfig.ChannelCount == 0) */ - - - /* 2. Continue setting of context under definition with parameter */ - /* related to each channel: channel rank sequence */ - /* Clear the old JSQx bits for the selected rank */ - tmp_JSQR_ContextQueueBeingBuilt &= ~ADC_JSQR_RK(ADC_SQR3_SQ10, sConfigInjected->InjectedRank); - - /* Set the JSQx bits for the selected rank */ - tmp_JSQR_ContextQueueBeingBuilt |= ADC_JSQR_RK(sConfigInjected->InjectedChannel, sConfigInjected->InjectedRank); - - /* Decrease channel count */ - hadc->InjectionConfig.ChannelCount--; - - - /* 3. tmp_JSQR_ContextQueueBeingBuilt is fully built for this HAL_ADCEx_InjectedConfigChannel() - call, aggregate the setting to those already built during the previous - HAL_ADCEx_InjectedConfigChannel() calls (for the same context of course) */ - hadc->InjectionConfig.ContextQueue |= tmp_JSQR_ContextQueueBeingBuilt; - - /* 4. End of context setting: if this is the last channel set, then write context - into register JSQR and make it enter into queue */ - if (hadc->InjectionConfig.ChannelCount == 0) - { - MODIFY_REG(hadc->Instance->JSQR, ADC_JSQR_FIELDS, hadc->InjectionConfig.ContextQueue); - } - - - } - - /* Parameters update conditioned to ADC state: */ - /* Parameters that can be updated when ADC is disabled or enabled without */ - /* conversion on going on injected group: */ - /* - Injected context queue: Queue disable (active context is kept) or */ - /* enable (context decremented, up to 2 contexts queued) */ - /* - Injected discontinuous mode: can be enabled only if auto-injected */ - /* mode is disabled. */ - if (ADC_IS_CONVERSION_ONGOING_INJECTED(hadc) == RESET) - { - - /* If auto-injected mode is disabled: no constraint */ - if (sConfigInjected->AutoInjectedConv == DISABLE) - { - MODIFY_REG(hadc->Instance->CFGR, ADC_CFGR_JQM | ADC_CFGR_JDISCEN, - ADC_CFGR_INJECT_CONTEXT_QUEUE(sConfigInjected->QueueInjectedContext) | - ADC_CFGR_INJECT_DISCCONTINUOUS(sConfigInjected->InjectedDiscontinuousConvMode) ); - } - /* If auto-injected mode is enabled: Injected discontinuous setting is */ - /* discarded. */ - else - { - MODIFY_REG(hadc->Instance->CFGR, ADC_CFGR_JQM | ADC_CFGR_JDISCEN, - ADC_CFGR_INJECT_CONTEXT_QUEUE(sConfigInjected->QueueInjectedContext) ); - } - - } - - - /* Parameters update conditioned to ADC state: */ - /* Parameters that can be updated when ADC is disabled or enabled without */ - /* conversion on going on regular and injected groups: */ - /* - Automatic injected conversion: can be enabled if injected group */ - /* external triggers are disabled. */ - /* - Channel sampling time */ - /* - Channel offset */ - if (ADC_IS_CONVERSION_ONGOING_REGULAR_INJECTED(hadc) == RESET) - { - /* If injected group external triggers are disabled (set to injected */ - /* software start): no constraint */ - if ((sConfigInjected->ExternalTrigInjecConv == ADC_INJECTED_SOFTWARE_START) - || (sConfigInjected->ExternalTrigInjecConvEdge == ADC_EXTERNALTRIGINJECCONV_EDGE_NONE)) - { - if (sConfigInjected->AutoInjectedConv == ENABLE) - { - SET_BIT(hadc->Instance->CFGR, ADC_CFGR_JAUTO); - } - else - { - CLEAR_BIT(hadc->Instance->CFGR, ADC_CFGR_JAUTO); - } - } - /* If Automatic injected conversion was intended to be set and could not */ - /* due to injected group external triggers enabled, error is reported. */ - else - { - if (sConfigInjected->AutoInjectedConv == ENABLE) - { - /* Update ADC state machine to error */ - SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); - - tmp_status = HAL_ERROR; - } - else - { - CLEAR_BIT(hadc->Instance->CFGR, ADC_CFGR_JAUTO); - } - } - - - - if (sConfigInjected->InjecOversamplingMode == ENABLE) - { - assert_param(IS_ADC_OVERSAMPLING_RATIO(sConfigInjected->InjecOversampling.Ratio)); - assert_param(IS_ADC_RIGHT_BIT_SHIFT(sConfigInjected->InjecOversampling.RightBitShift)); - - /* JOVSE must be reset in case of triggered regular mode */ - assert_param(!(READ_BIT(hadc->Instance->CFGR2, ADC_CFGR2_ROVSE|ADC_CFGR2_TROVS) == (ADC_CFGR2_ROVSE|ADC_CFGR2_TROVS))); - - /* Configuration of Injected Oversampler: */ - /* - Oversampling Ratio */ - /* - Right bit shift */ - - /* Enable OverSampling mode */ - - MODIFY_REG(hadc->Instance->CFGR2, ADC_CFGR2_INJ_FIELDS, - ADC_CFGR2_JOVSE | - sConfigInjected->InjecOversampling.Ratio | - sConfigInjected->InjecOversampling.RightBitShift ); - } - else - { - /* Disable Regular OverSampling */ - CLEAR_BIT( hadc->Instance->CFGR2, ADC_CFGR2_JOVSE); - } - - - /* Sampling time configuration of the selected channel */ - /* if ADC_Channel_10 ... ADC_Channel_18 is selected */ - if (sConfigInjected->InjectedChannel >= ADC_CHANNEL_10) - { - /* Clear the old sample time and set the new one */ - MODIFY_REG(hadc->Instance->SMPR2, - ADC_SMPR2(ADC_SMPR2_SMP10, sConfigInjected->InjectedChannel), - ADC_SMPR2(sConfigInjected->InjectedSamplingTime, sConfigInjected->InjectedChannel)); - } - else /* if ADC_Channel_0 ... ADC_Channel_9 is selected */ - { - /* Clear the old sample time and set the new one */ - MODIFY_REG(hadc->Instance->SMPR1, - ADC_SMPR1(ADC_SMPR1_SMP0, sConfigInjected->InjectedChannel), - ADC_SMPR1(sConfigInjected->InjectedSamplingTime, sConfigInjected->InjectedChannel)); - } - - - /* Configure the offset: offset enable/disable, channel, offset value */ - - /* Shift the offset with respect to the selected ADC resolution. */ - /* Offset has to be left-aligned on bit 11, the LSB (right bits) are set to 0 */ - tmpOffsetShifted = ADC_OFFSET_SHIFT_RESOLUTION(hadc, sConfigInjected->InjectedOffset); - - switch (sConfigInjected->InjectedOffsetNumber) - { - case ADC_OFFSET_1: - /* Configure offset register 1: */ - /* - Enable offset */ - /* - Set channel number */ - /* - Set offset value */ - MODIFY_REG(hadc->Instance->OFR1, - ADC_OFR1_OFFSET1 | ADC_OFR1_OFFSET1_CH | ADC_OFR1_OFFSET1_EN, - ADC_OFR1_OFFSET1_EN | ADC_OFR_CHANNEL(sConfigInjected->InjectedChannel) | tmpOffsetShifted); - break; - - case ADC_OFFSET_2: - /* Configure offset register 2: */ - /* - Enable offset */ - /* - Set channel number */ - /* - Set offset value */ - MODIFY_REG(hadc->Instance->OFR2, - ADC_OFR2_OFFSET2 | ADC_OFR2_OFFSET2_CH | ADC_OFR2_OFFSET2_EN, - ADC_OFR2_OFFSET2_EN | ADC_OFR_CHANNEL(sConfigInjected->InjectedChannel) | tmpOffsetShifted); - break; - - case ADC_OFFSET_3: - /* Configure offset register 3: */ - /* - Enable offset */ - /* - Set channel number */ - /* - Set offset value */ - MODIFY_REG(hadc->Instance->OFR3, - ADC_OFR3_OFFSET3 | ADC_OFR3_OFFSET3_CH | ADC_OFR3_OFFSET3_EN, - ADC_OFR3_OFFSET3_EN | ADC_OFR_CHANNEL(sConfigInjected->InjectedChannel) | tmpOffsetShifted); - break; - - case ADC_OFFSET_4: - /* Configure offset register 1: */ - /* - Enable offset */ - /* - Set channel number */ - /* - Set offset value */ - MODIFY_REG(hadc->Instance->OFR4, - ADC_OFR4_OFFSET4 | ADC_OFR4_OFFSET4_CH | ADC_OFR4_OFFSET4_EN, - ADC_OFR4_OFFSET4_EN | ADC_OFR_CHANNEL(sConfigInjected->InjectedChannel) | tmpOffsetShifted); - break; - - /* Case ADC_OFFSET_NONE */ - default : - /* Scan OFR1, OFR2, OFR3, OFR4 to check if the selected channel is enabled. If this is the case, offset OFRx is disabled. */ - if (((hadc->Instance->OFR1) & ADC_OFR1_OFFSET1_CH) == ADC_OFR_CHANNEL(sConfigInjected->InjectedChannel)) - { - /* Disable offset OFR1*/ - CLEAR_BIT(hadc->Instance->OFR1, ADC_OFR1_OFFSET1_EN); - } - if (((hadc->Instance->OFR2) & ADC_OFR2_OFFSET2_CH) == ADC_OFR_CHANNEL(sConfigInjected->InjectedChannel)) - { - /* Disable offset OFR2*/ - CLEAR_BIT(hadc->Instance->OFR2, ADC_OFR2_OFFSET2_EN); - } - if (((hadc->Instance->OFR3) & ADC_OFR3_OFFSET3_CH) == ADC_OFR_CHANNEL(sConfigInjected->InjectedChannel)) - { - /* Disable offset OFR3*/ - CLEAR_BIT(hadc->Instance->OFR3, ADC_OFR3_OFFSET3_EN); - } - if (((hadc->Instance->OFR4) & ADC_OFR4_OFFSET4_CH) == ADC_OFR_CHANNEL(sConfigInjected->InjectedChannel)) - { - /* Disable offset OFR4*/ - CLEAR_BIT(hadc->Instance->OFR4, ADC_OFR4_OFFSET4_EN); - } - break; - } - - } /* if (ADC_IS_CONVERSION_ONGOING_REGULAR_INJECTED(hadc) == RESET) */ - - - /* Parameters update conditioned to ADC state: */ - /* Parameters that can be updated only when ADC is disabled: */ - /* - Single or differential mode */ - /* - Internal measurement channels: Vbat/VrefInt/TempSensor */ - if (ADC_IS_ENABLE(hadc) == RESET) - { - /* Configuration of differential mode */ - if (sConfigInjected->InjectedSingleDiff != ADC_DIFFERENTIAL_ENDED) - { - /* Disable differential mode (default mode: single-ended) */ - CLEAR_BIT(hadc->Instance->DIFSEL, ADC_DIFSEL_CHANNEL(sConfigInjected->InjectedChannel)); - } - else - { - /* Enable differential mode */ - SET_BIT(hadc->Instance->DIFSEL, ADC_DIFSEL_CHANNEL(sConfigInjected->InjectedChannel)); - - /* Sampling time configuration of channel ADC_IN+1 (negative input). - Starting from channel 9, SMPR2 register must be configured. */ - if (sConfigInjected->InjectedChannel >= ADC_CHANNEL_9) - { - /* Clear the old sample time and set the new one */ - MODIFY_REG(hadc->Instance->SMPR2, - ADC_SMPR2(ADC_SMPR2_SMP10, sConfigInjected->InjectedChannel +1), - ADC_SMPR2(sConfigInjected->InjectedSamplingTime, sConfigInjected->InjectedChannel +1)); - } - else /* For channels 0 to 8 */ - { - /* Clear the old sample time and set the new one */ - MODIFY_REG(hadc->Instance->SMPR1, - ADC_SMPR1(ADC_SMPR1_SMP0, sConfigInjected->InjectedChannel +1), - ADC_SMPR1(sConfigInjected->InjectedSamplingTime, sConfigInjected->InjectedChannel +1)); - } - } - - - /* Management of internal measurement channels: Vbat/VrefInt/TempSensor */ - /* internal measurement paths enable: If internal channel selected, */ - /* enable dedicated internal buffers and path. */ - /* Note: these internal measurement paths can be disabled using */ - /* HAL_ADC_DeInit(). */ - - /* Configuration of common ADC parameters */ - - tmpADC_Common = ADC_COMMON_REGISTER(hadc); - - /* If the requested internal measurement path has already been enabled, */ - /* bypass the configuration processing. */ - if (( (sConfigInjected->InjectedChannel == ADC_CHANNEL_TEMPSENSOR) && - (HAL_IS_BIT_CLR(tmpADC_Common->CCR, ADC_CCR_TSEN)) ) || - ( (sConfigInjected->InjectedChannel == ADC_CHANNEL_VBAT) && - (HAL_IS_BIT_CLR(tmpADC_Common->CCR, ADC_CCR_VBATEN)) ) || - ( (sConfigInjected->InjectedChannel == ADC_CHANNEL_VREFINT) && - (HAL_IS_BIT_CLR(tmpADC_Common->CCR, ADC_CCR_VREFEN))) - ) - { - /* Configuration of common ADC parameters (continuation) */ - /* Software is allowed to change common parameters only when all ADCs */ - /* of the common group are disabled. */ - if ((ADC_IS_ENABLE(hadc) == RESET) && - (ADC_ANY_OTHER_ENABLED(hadc) == RESET) ) - { - if (sConfigInjected->InjectedChannel == ADC_CHANNEL_TEMPSENSOR) - { - if (ADC_TEMPERATURE_SENSOR_INSTANCE(hadc)) - { - SET_BIT(tmpADC_Common->CCR, ADC_CCR_TSEN); - - /* Delay for temperature sensor stabilization time */ - /* Compute number of CPU cycles to wait for */ - wait_loop_index = (ADC_TEMPSENSOR_DELAY_US * (SystemCoreClock / 1000000)); - while(wait_loop_index != 0) - { - wait_loop_index--; - } - } - } - else if (sConfigInjected->InjectedChannel == ADC_CHANNEL_VBAT) - { - if (ADC_BATTERY_VOLTAGE_INSTANCE(hadc)) - { - SET_BIT(tmpADC_Common->CCR, ADC_CCR_VBATEN); - } - } - else if (sConfigInjected->InjectedChannel == ADC_CHANNEL_VREFINT) - { - if (ADC_VREFINT_INSTANCE(hadc)) - { - SET_BIT(tmpADC_Common->CCR, ADC_CCR_VREFEN); - } - } - } - /* If the requested internal measurement path has already been enabled */ - /* and other ADC of the common group are enabled, internal */ - /* measurement paths cannot be enabled. */ - else - { - /* Update ADC state machine to error */ - SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); - - tmp_status = HAL_ERROR; - } - } - - } /* if (ADC_IS_ENABLE(hadc) == RESET) */ - - /* Process unlocked */ - __HAL_UNLOCK(hadc); - - /* Return function status */ - return tmp_status; -} - - - - - -/** - * @brief Enable ADC multimode and configure multimode parameters - * @note Possibility to update parameters on the fly: - * This function initializes multimode parameters, following - * calls to this function can be used to reconfigure some parameters - * of structure "ADC_MultiModeTypeDef" on the fly, without resetting - * the ADCs. - * The setting of these parameters is conditioned to ADC state. - * For parameters constraints, see comments of structure - * "ADC_MultiModeTypeDef". - * @note To move back configuration from multimode to single mode, ADC must - * be reset (using function HAL_ADC_Init() ). - * @param hadc: Master ADC handle - * @param multimode : Structure of ADC multimode configuration - * @retval HAL status - */ -HAL_StatusTypeDef HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef* hadc, ADC_MultiModeTypeDef* multimode) -{ - HAL_StatusTypeDef tmp_status = HAL_OK; - ADC_Common_TypeDef *tmpADC_Common; - ADC_HandleTypeDef tmphadcSlave; - - /* Check the parameters */ - assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance)); - assert_param(IS_ADC_MULTIMODE(multimode->Mode)); - assert_param(IS_ADC_DMA_ACCESS_MULTIMODE(multimode->DMAAccessMode)); - assert_param(IS_ADC_SAMPLING_DELAY(multimode->TwoSamplingDelay)); - - /* Process locked */ - __HAL_LOCK(hadc); - - ADC_MULTI_SLAVE(hadc, &tmphadcSlave); - - /* Parameters update conditioned to ADC state: */ - /* Parameters that can be updated when ADC is disabled or enabled without */ - /* conversion on going on regular group: */ - /* - Multimode DMA configuration */ - /* - Multimode DMA mode */ - if ( (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) - && (ADC_IS_CONVERSION_ONGOING_REGULAR(&tmphadcSlave) == RESET) ) - { - - /* Pointer to the common control register */ - tmpADC_Common = ADC_COMMON_REGISTER(hadc); - - MODIFY_REG(tmpADC_Common->CCR, ADC_CCR_MDMA | ADC_CCR_DMACFG, - multimode->DMAAccessMode | - ADC_CCR_MULTI_DMACONTREQ(hadc->Init.DMAContinuousRequests)); - - /* Parameters that can be updated only when ADC is disabled: */ - /* - Multimode mode selection */ - /* - Multimode delay */ - if ((ADC_IS_ENABLE(hadc) == RESET) && - (ADC_IS_ENABLE(&tmphadcSlave) == RESET) ) - { - /* Configuration of ADC common group ADC1&ADC2 */ - /* - set the selected multimode */ - /* - Set delay between two sampling phases */ - /* Note: Delay range depends on selected resolution: */ - /* from 1 to 12 clock cycles for 12 bits */ - /* from 1 to 10 clock cycles for 10 bits, */ - /* from 1 to 8 clock cycles for 8 bits */ - /* from 1 to 6 clock cycles for 6 bits */ - /* If a higher delay is selected, it will be clipped to maximum delay */ - /* range */ - - MODIFY_REG(tmpADC_Common->CCR, ADC_CCR_DUAL | ADC_CCR_DELAY, - multimode->Mode | multimode->TwoSamplingDelay ); - } - - - } - /* If one of the ADC sharing the same common group is enabled, no update */ - /* could be done on neither of the multimode structure parameters. */ - else - { - /* Update ADC state machine to error */ - SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); - - tmp_status = HAL_ERROR; - } - - - /* Process unlocked */ - __HAL_UNLOCK(hadc); - - /* Return function status */ - return tmp_status; -} - - - -/** - * @brief Enable Injected Queue - * @note This function resets CFGR register JQDIS bit in order to enable the - * Injected Queue. JQDIS can be written only when ADSTART and JDSTART - * are both equal to 0 to ensure that no regular nor injected - * conversion is ongoing. - * @param hadc: ADC handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_ADCEx_EnableInjectedQueue(ADC_HandleTypeDef* hadc) -{ - - /* Parameter can be set only if no conversion is on-going */ - if (ADC_IS_CONVERSION_ONGOING_REGULAR_INJECTED(hadc) == RESET) - { - CLEAR_BIT(hadc->Instance->CFGR, ADC_CFGR_JQDIS); - - /* Update state, clear previous result related to injected queue overflow */ - CLEAR_BIT(hadc->State, HAL_ADC_STATE_INJ_JQOVF); - - return HAL_OK; - } - else - { - return HAL_ERROR; - } - -} - -/** - * @brief Disable Injected Queue - * @note This function sets CFGR register JQDIS bit in order to disable the - * Injected Queue. JQDIS can be written only when ADSTART and JDSTART - * are both equal to 0 to ensure that no regular nor injected - * conversion is ongoing. - * @param hadc: ADC handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_ADCEx_DisableInjectedQueue(ADC_HandleTypeDef* hadc) -{ - - /* Parameter can be set only if no conversion is on-going */ - if (ADC_IS_CONVERSION_ONGOING_REGULAR_INJECTED(hadc) == RESET) - { - SET_BIT(hadc->Instance->CFGR, ADC_CFGR_JQDIS); - return HAL_OK; - } - else - { - return HAL_ERROR; - } - -} - - -/** - * @brief Disable ADC voltage regulator. - * @note Disabling voltage regulator allows to save power. This operation can - * be carried out only when ADC is disabled. - * @note To enable again the voltage regulator, the user is expected to - * resort to HAL_ADC_Init() API. - * @param hadc: ADC handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_ADCEx_DisableVoltageRegulator(ADC_HandleTypeDef* hadc) -{ - - /* ADVREGEN can be written only when the ADC is disabled */ - if (ADC_IS_ENABLE(hadc) == RESET) - { - CLEAR_BIT(hadc->Instance->CR, ADC_CR_ADVREGEN); - return HAL_OK; - } - else - { - return HAL_ERROR; - } -} - -/** - * @brief Enter ADC deep-power-down mode - * @note This mode is achieved in setting DEEPPWD bit and allows to save power - * in reducing leakage currents. It is particularly interesting before - * entering STOP1 or STOP2 modes. - * @note Setting DEEPPWD automatically clears ADVREGEN bit and disables the - * ADC voltage regulator. This means that this API encompasses - * HAL_ADCEx_DisableVoltageRegulator(). Additionally, the internal - * calibration is lost. - * @note To exit the ADC deep-power-down mode, the user is expected to - * resort to HAL_ADC_Init() API as well as to relaunch a calibration - * with HAL_ADCEx_Calibration_Start() API or to re-apply a previously - * saved calibration factor. - * @param hadc: ADC handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_ADCEx_EnterADCDeepPowerDownMode(ADC_HandleTypeDef* hadc) -{ - - /* DEEPPWD can be written only when the ADC is disabled */ - if (ADC_IS_ENABLE(hadc) == RESET) - { - SET_BIT(hadc->Instance->CR, ADC_CR_DEEPPWD); - return HAL_OK; - } - else - { - return HAL_ERROR; - } -} - -/** - * @} - */ - -/** - * @} - */ - - - -#endif /* HAL_ADC_MODULE_ENABLED */ -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ -
--- a/Src/stm32l4xx_hal_can.c Thu Nov 12 20:49:49 2015 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,1386 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_can.c - * @author MCD Application Team - * @version V1.1.0 - * @date 16-September-2015 - * @brief CAN HAL module driver. - * This file provides firmware functions to manage the following - * functionalities of the Controller Area Network (CAN) peripheral: - * + Initialization and de-initialization functions - * + IO operation functions - * + Peripheral Control functions - * + Peripheral State and Error functions - * - @verbatim - ============================================================================== - ##### How to use this driver ##### - ============================================================================== - [..] - (#) Enable the CAN controller interface clock using - __HAL_RCC_CAN1_CLK_ENABLE() for CAN1. - - (#) CAN pins configuration - (++) Enable the clock for the CAN GPIOs using the following function: - __HAL_RCC_GPIOx_CLK_ENABLE(); - (++) Connect and configure the involved CAN pins using the - following function HAL_GPIO_Init(); - - (#) Initialize and configure the CAN using HAL_CAN_Init() function. - - (#) Transmit the desired CAN frame using HAL_CAN_Transmit() or - HAL_CAN_Transmit_IT() function. - - (#) Receive a CAN frame using HAL_CAN_Receive() or HAL_CAN_Receive_IT() function. - - *** Polling mode IO operation *** - ================================= - [..] - (+) Start the CAN peripheral transmission and wait the end of this operation - using HAL_CAN_Transmit(), at this stage user can specify the value of timeout - according to his end application - (+) Start the CAN peripheral reception and wait the end of this operation - using HAL_CAN_Receive(), at this stage user can specify the value of timeout - according to his end application - - *** Interrupt mode IO operation *** - =================================== - [..] - (+) Start the CAN peripheral transmission using HAL_CAN_Transmit_IT() - (+) Start the CAN peripheral reception using HAL_CAN_Receive_IT() - (+) Use HAL_CAN_IRQHandler() called under the used CAN Interrupt subroutine - (+) At CAN end of transmission HAL_CAN_TxCpltCallback() function is executed and user can - add his own code by customization of function pointer HAL_CAN_TxCpltCallback - (+) In case of CAN Error, HAL_CAN_ErrorCallback() function is executed and user can - add his own code by customization of function pointer HAL_CAN_ErrorCallback - - *** CAN HAL driver macros list *** - ============================================= - [..] - Below the list of most used macros in CAN HAL driver. - - (+) __HAL_CAN_ENABLE_IT: Enable the specified CAN interrupts - (+) __HAL_CAN_DISABLE_IT: Disable the specified CAN interrupts - (+) __HAL_CAN_GET_IT_SOURCE: Check if the specified CAN interrupt source is enabled or disabled - (+) __HAL_CAN_CLEAR_FLAG: Clear the CAN's pending flags - (+) __HAL_CAN_GET_FLAG: Get the selected CAN's flag status - - [..] - (@) You can refer to the CAN HAL driver header file for more useful macros - - @endverbatim - - ****************************************************************************** - * @attention - * - * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @defgroup CAN CAN - * @brief CAN driver modules - * @{ - */ - -#ifdef HAL_CAN_MODULE_ENABLED - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -/** @defgroup CAN_Private_Constants CAN Private Constants - * @{ - */ -#define CAN_TIMEOUT_VALUE 10 -/** - * @} - */ -/* Private macro -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ -/** @defgroup CAN_Private_Functions CAN Private Functions - * @{ - */ -static HAL_StatusTypeDef CAN_Receive_IT(CAN_HandleTypeDef* hcan, uint8_t FIFONumber); -static HAL_StatusTypeDef CAN_Transmit_IT(CAN_HandleTypeDef* hcan); -/** - * @} - */ - -/* Exported functions --------------------------------------------------------*/ - -/** @defgroup CAN_Exported_Functions CAN Exported Functions - * @{ - */ - -/** @defgroup CAN_Exported_Functions_Group1 Initialization and de-initialization functions - * @brief Initialization and Configuration functions - * -@verbatim - ============================================================================== - ##### Initialization and de-initialization functions ##### - ============================================================================== - [..] This section provides functions allowing to: - (+) Initialize and configure the CAN. - (+) De-initialize the CAN. - -@endverbatim - * @{ - */ - -/** - * @brief Initialize the CAN peripheral according to the specified parameters - * in the CAN_InitStruct structure and initialize the associated handle. - * @param hcan: pointer to a CAN_HandleTypeDef structure that contains - * the configuration information for the specified CAN. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_CAN_Init(CAN_HandleTypeDef* hcan) -{ - uint32_t status = CAN_INITSTATUS_FAILED; /* Default init status */ - uint32_t tickstart = 0; - - /* Check CAN handle */ - if(hcan == NULL) - { - return HAL_ERROR; - } - - /* Check the parameters */ - assert_param(IS_CAN_ALL_INSTANCE(hcan->Instance)); - assert_param(IS_FUNCTIONAL_STATE(hcan->Init.TTCM)); - assert_param(IS_FUNCTIONAL_STATE(hcan->Init.ABOM)); - assert_param(IS_FUNCTIONAL_STATE(hcan->Init.AWUM)); - assert_param(IS_FUNCTIONAL_STATE(hcan->Init.NART)); - assert_param(IS_FUNCTIONAL_STATE(hcan->Init.RFLM)); - assert_param(IS_FUNCTIONAL_STATE(hcan->Init.TXFP)); - assert_param(IS_CAN_MODE(hcan->Init.Mode)); - assert_param(IS_CAN_SJW(hcan->Init.SJW)); - assert_param(IS_CAN_BS1(hcan->Init.BS1)); - assert_param(IS_CAN_BS2(hcan->Init.BS2)); - assert_param(IS_CAN_PRESCALER(hcan->Init.Prescaler)); - - if(hcan->State == HAL_CAN_STATE_RESET) - { - /* Allocate lock resource and initialize it */ - hcan->Lock = HAL_UNLOCKED; - - /* Init the low level hardware */ - HAL_CAN_MspInit(hcan); - } - - /* Initialize the CAN state*/ - hcan->State = HAL_CAN_STATE_BUSY; - - /* Exit from sleep mode */ - hcan->Instance->MCR &= (~(uint32_t)CAN_MCR_SLEEP); - - /* Request initialisation */ - hcan->Instance->MCR |= CAN_MCR_INRQ ; - - /* Get tick */ - tickstart = HAL_GetTick(); - - /* Wait the acknowledge */ - while((hcan->Instance->MSR & CAN_MSR_INAK) != CAN_MSR_INAK) - { - if((HAL_GetTick()-tickstart) > CAN_TIMEOUT_VALUE) - { - hcan->State= HAL_CAN_STATE_TIMEOUT; - /* Process unlocked */ - __HAL_UNLOCK(hcan); - return HAL_TIMEOUT; - } - } - - /* Check acknowledge */ - if ((hcan->Instance->MSR & CAN_MSR_INAK) == CAN_MSR_INAK) - { - /* Set the time triggered communication mode */ - if (hcan->Init.TTCM == ENABLE) - { - hcan->Instance->MCR |= CAN_MCR_TTCM; - } - else - { - hcan->Instance->MCR &= ~(uint32_t)CAN_MCR_TTCM; - } - - /* Set the automatic bus-off management */ - if (hcan->Init.ABOM == ENABLE) - { - hcan->Instance->MCR |= CAN_MCR_ABOM; - } - else - { - hcan->Instance->MCR &= ~(uint32_t)CAN_MCR_ABOM; - } - - /* Set the automatic wake-up mode */ - if (hcan->Init.AWUM == ENABLE) - { - hcan->Instance->MCR |= CAN_MCR_AWUM; - } - else - { - hcan->Instance->MCR &= ~(uint32_t)CAN_MCR_AWUM; - } - - /* Set the no automatic retransmission */ - if (hcan->Init.NART == ENABLE) - { - hcan->Instance->MCR |= CAN_MCR_NART; - } - else - { - hcan->Instance->MCR &= ~(uint32_t)CAN_MCR_NART; - } - - /* Set the receive FIFO locked mode */ - if (hcan->Init.RFLM == ENABLE) - { - hcan->Instance->MCR |= CAN_MCR_RFLM; - } - else - { - hcan->Instance->MCR &= ~(uint32_t)CAN_MCR_RFLM; - } - - /* Set the transmit FIFO priority */ - if (hcan->Init.TXFP == ENABLE) - { - hcan->Instance->MCR |= CAN_MCR_TXFP; - } - else - { - hcan->Instance->MCR &= ~(uint32_t)CAN_MCR_TXFP; - } - - /* Set the bit timing register */ - hcan->Instance->BTR = (uint32_t)((uint32_t)hcan->Init.Mode) | \ - ((uint32_t)hcan->Init.SJW) | \ - ((uint32_t)hcan->Init.BS1) | \ - ((uint32_t)hcan->Init.BS2) | \ - ((uint32_t)hcan->Init.Prescaler - 1); - - /* Request leave initialisation */ - hcan->Instance->MCR &= ~(uint32_t)CAN_MCR_INRQ; - - /* Get tick */ - tickstart = HAL_GetTick(); - - /* Wait the acknowledge */ - while((hcan->Instance->MSR & CAN_MSR_INAK) == CAN_MSR_INAK) - { - if((HAL_GetTick()-tickstart) > CAN_TIMEOUT_VALUE) - { - hcan->State= HAL_CAN_STATE_TIMEOUT; - /* Process unlocked */ - __HAL_UNLOCK(hcan); - return HAL_TIMEOUT; - } - } - - /* Check acknowledged */ - if ((hcan->Instance->MSR & CAN_MSR_INAK) != CAN_MSR_INAK) - { - status = CAN_INITSTATUS_SUCCESS; - } - } - - if(status == CAN_INITSTATUS_SUCCESS) - { - /* Set CAN error code to none */ - hcan->ErrorCode = HAL_CAN_ERROR_NONE; - - /* Initialize the CAN state */ - hcan->State = HAL_CAN_STATE_READY; - - /* Return function status */ - return HAL_OK; - } - else - { - /* Initialize the CAN state */ - hcan->State = HAL_CAN_STATE_ERROR; - - /* Return function status */ - return HAL_ERROR; - } -} - -/** - * @brief Configure the CAN reception filter according to the specified - * parameters in the CAN_FilterInitStruct. - * @param hcan: pointer to a CAN_HandleTypeDef structure that contains - * the configuration information for the specified CAN. - * @param sFilterConfig: pointer to a CAN_FilterConfTypeDef structure that - * contains the filter configuration information. - * @retval None - */ -HAL_StatusTypeDef HAL_CAN_ConfigFilter(CAN_HandleTypeDef* hcan, CAN_FilterConfTypeDef* sFilterConfig) -{ - uint32_t filternbrbitpos = 0; - - /* Check the parameters */ - assert_param(IS_CAN_FILTER_NUMBER(sFilterConfig->FilterNumber)); - assert_param(IS_CAN_FILTER_MODE(sFilterConfig->FilterMode)); - assert_param(IS_CAN_FILTER_SCALE(sFilterConfig->FilterScale)); - assert_param(IS_CAN_FILTER_FIFO(sFilterConfig->FilterFIFOAssignment)); - assert_param(IS_FUNCTIONAL_STATE(sFilterConfig->FilterActivation)); - - filternbrbitpos = ((uint32_t)1) << sFilterConfig->FilterNumber; - - /* Initialisation mode for the filter */ - hcan->Instance->FMR |= (uint32_t)CAN_FMR_FINIT; - - /* Filter Deactivation */ - hcan->Instance->FA1R &= ~(uint32_t)filternbrbitpos; - - /* Filter Scale */ - if (sFilterConfig->FilterScale == CAN_FILTERSCALE_16BIT) - { - /* 16-bit scale for the filter */ - hcan->Instance->FS1R &= ~(uint32_t)filternbrbitpos; - - /* First 16-bit identifier and First 16-bit mask */ - /* Or First 16-bit identifier and Second 16-bit identifier */ - hcan->Instance->sFilterRegister[sFilterConfig->FilterNumber].FR1 = - ((0x0000FFFF & (uint32_t)sFilterConfig->FilterMaskIdLow) << 16) | - (0x0000FFFF & (uint32_t)sFilterConfig->FilterIdLow); - - /* Second 16-bit identifier and Second 16-bit mask */ - /* Or Third 16-bit identifier and Fourth 16-bit identifier */ - hcan->Instance->sFilterRegister[sFilterConfig->FilterNumber].FR2 = - ((0x0000FFFF & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16) | - (0x0000FFFF & (uint32_t)sFilterConfig->FilterIdHigh); - } - - if (sFilterConfig->FilterScale == CAN_FILTERSCALE_32BIT) - { - /* 32-bit scale for the filter */ - hcan->Instance->FS1R |= filternbrbitpos; - /* 32-bit identifier or First 32-bit identifier */ - hcan->Instance->sFilterRegister[sFilterConfig->FilterNumber].FR1 = - ((0x0000FFFF & (uint32_t)sFilterConfig->FilterIdHigh) << 16) | - (0x0000FFFF & (uint32_t)sFilterConfig->FilterIdLow); - /* 32-bit mask or Second 32-bit identifier */ - hcan->Instance->sFilterRegister[sFilterConfig->FilterNumber].FR2 = - ((0x0000FFFF & (uint32_t)sFilterConfig->FilterMaskIdHigh) << 16) | - (0x0000FFFF & (uint32_t)sFilterConfig->FilterMaskIdLow); - } - - /* Filter Mode */ - if (sFilterConfig->FilterMode == CAN_FILTERMODE_IDMASK) - { - /*Id/Mask mode for the filter*/ - hcan->Instance->FM1R &= ~(uint32_t)filternbrbitpos; - } - else /* CAN_FilterInitStruct->CAN_FilterMode == CAN_FilterMode_IdList */ - { - /*Identifier list mode for the filter*/ - hcan->Instance->FM1R |= (uint32_t)filternbrbitpos; - } - - /* Filter FIFO assignment */ - if (sFilterConfig->FilterFIFOAssignment == CAN_FILTER_FIFO0) - { - /* FIFO 0 assignation for the filter */ - hcan->Instance->FFA1R &= ~(uint32_t)filternbrbitpos; - } - - if (sFilterConfig->FilterFIFOAssignment == CAN_FILTER_FIFO1) - { - /* FIFO 1 assignation for the filter */ - hcan->Instance->FFA1R |= (uint32_t)filternbrbitpos; - } - - /* Filter activation */ - if (sFilterConfig->FilterActivation == ENABLE) - { - hcan->Instance->FA1R |= filternbrbitpos; - } - - /* Leave the initialisation mode for the filter */ - hcan->Instance->FMR &= ~((uint32_t)CAN_FMR_FINIT); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief DeInitialize the CAN peripheral registers to their default reset values. - * @param hcan: pointer to a CAN_HandleTypeDef structure that contains - * the configuration information for the specified CAN. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_CAN_DeInit(CAN_HandleTypeDef* hcan) -{ - /* Check CAN handle */ - if(hcan == NULL) - { - return HAL_ERROR; - } - - /* Check the parameters */ - assert_param(IS_CAN_ALL_INSTANCE(hcan->Instance)); - - /* Change CAN state */ - hcan->State = HAL_CAN_STATE_BUSY; - - /* DeInit the low level hardware */ - HAL_CAN_MspDeInit(hcan); - - /* Change CAN state */ - hcan->State = HAL_CAN_STATE_RESET; - - /* Release Lock */ - __HAL_UNLOCK(hcan); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Initialize the CAN MSP. - * @param hcan: pointer to a CAN_HandleTypeDef structure that contains - * the configuration information for the specified CAN. - * @retval None - */ -__weak void HAL_CAN_MspInit(CAN_HandleTypeDef* hcan) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_CAN_MspInit could be implemented in the user file - */ -} - -/** - * @brief DeInitialize the CAN MSP. - * @param hcan: pointer to a CAN_HandleTypeDef structure that contains - * the configuration information for the specified CAN. - * @retval None - */ -__weak void HAL_CAN_MspDeInit(CAN_HandleTypeDef* hcan) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_CAN_MspDeInit could be implemented in the user file - */ -} - -/** - * @} - */ - -/** @defgroup CAN_Exported_Functions_Group2 Input and Output operation functions - * @brief I/O operation functions - * -@verbatim - ============================================================================== - ##### IO operation functions ##### - ============================================================================== - [..] This section provides functions allowing to: - (+) Transmit a CAN frame message. - (+) Receive a CAN frame message. - (+) Enter CAN peripheral in sleep mode. - (+) Wake up the CAN peripheral from sleep mode. - -@endverbatim - * @{ - */ - -/** - * @brief Initiate and transmit a CAN frame message. - * @param hcan: pointer to a CAN_HandleTypeDef structure that contains - * the configuration information for the specified CAN. - * @param Timeout: Timeout duration. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_CAN_Transmit(CAN_HandleTypeDef* hcan, uint32_t Timeout) -{ - uint32_t transmitmailbox = CAN_TXSTATUS_NOMAILBOX; - uint32_t tickstart = 0; - - /* Check the parameters */ - assert_param(IS_CAN_IDTYPE(hcan->pTxMsg->IDE)); - assert_param(IS_CAN_RTR(hcan->pTxMsg->RTR)); - assert_param(IS_CAN_DLC(hcan->pTxMsg->DLC)); - - /* Process locked */ - __HAL_LOCK(hcan); - - if(hcan->State == HAL_CAN_STATE_BUSY_RX) - { - /* Change CAN state */ - hcan->State = HAL_CAN_STATE_BUSY_TX_RX; - } - else - { - /* Change CAN state */ - hcan->State = HAL_CAN_STATE_BUSY_TX; - } - - /* Select one empty transmit mailbox */ - if ((hcan->Instance->TSR&CAN_TSR_TME0) == CAN_TSR_TME0) - { - transmitmailbox = 0; - } - else if ((hcan->Instance->TSR&CAN_TSR_TME1) == CAN_TSR_TME1) - { - transmitmailbox = 1; - } - else if ((hcan->Instance->TSR&CAN_TSR_TME2) == CAN_TSR_TME2) - { - transmitmailbox = 2; - } - - if (transmitmailbox != CAN_TXSTATUS_NOMAILBOX) - { - /* Set up the Id */ - hcan->Instance->sTxMailBox[transmitmailbox].TIR &= CAN_TI0R_TXRQ; - if (hcan->pTxMsg->IDE == CAN_ID_STD) - { - assert_param(IS_CAN_STDID(hcan->pTxMsg->StdId)); - hcan->Instance->sTxMailBox[transmitmailbox].TIR |= ((hcan->pTxMsg->StdId << 21) | \ - hcan->pTxMsg->RTR); - } - else - { - assert_param(IS_CAN_EXTID(hcan->pTxMsg->ExtId)); - hcan->Instance->sTxMailBox[transmitmailbox].TIR |= ((hcan->pTxMsg->ExtId << 3) | \ - hcan->pTxMsg->IDE | \ - hcan->pTxMsg->RTR); - } - - /* Set up the DLC */ - hcan->pTxMsg->DLC &= (uint8_t)0x0000000F; - hcan->Instance->sTxMailBox[transmitmailbox].TDTR &= (uint32_t)0xFFFFFFF0; - hcan->Instance->sTxMailBox[transmitmailbox].TDTR |= hcan->pTxMsg->DLC; - - /* Set up the data field */ - hcan->Instance->sTxMailBox[transmitmailbox].TDLR = (((uint32_t)hcan->pTxMsg->Data[3] << 24) | - ((uint32_t)hcan->pTxMsg->Data[2] << 16) | - ((uint32_t)hcan->pTxMsg->Data[1] << 8) | - ((uint32_t)hcan->pTxMsg->Data[0])); - hcan->Instance->sTxMailBox[transmitmailbox].TDHR = (((uint32_t)hcan->pTxMsg->Data[7] << 24) | - ((uint32_t)hcan->pTxMsg->Data[6] << 16) | - ((uint32_t)hcan->pTxMsg->Data[5] << 8) | - ((uint32_t)hcan->pTxMsg->Data[4])); - /* Request transmission */ - hcan->Instance->sTxMailBox[transmitmailbox].TIR |= CAN_TI0R_TXRQ; - - /* Get tick */ - tickstart = HAL_GetTick(); - - /* Check End of transmission flag */ - while(!(__HAL_CAN_TRANSMIT_STATUS(hcan, transmitmailbox))) - { - /* Check for the Timeout */ - if(Timeout != HAL_MAX_DELAY) - { - if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout)) - { - hcan->State = HAL_CAN_STATE_TIMEOUT; - /* Process unlocked */ - __HAL_UNLOCK(hcan); - return HAL_TIMEOUT; - } - } - } - if(hcan->State == HAL_CAN_STATE_BUSY_TX_RX) - { - /* Change CAN state */ - hcan->State = HAL_CAN_STATE_BUSY_RX; - } - else - { - /* Change CAN state */ - hcan->State = HAL_CAN_STATE_READY; - } - - /* Process unlocked */ - __HAL_UNLOCK(hcan); - - /* Return function status */ - return HAL_OK; - } - else - { - /* Change CAN state */ - hcan->State = HAL_CAN_STATE_ERROR; - - /* Process unlocked */ - __HAL_UNLOCK(hcan); - - /* Return function status */ - return HAL_ERROR; - } -} - -/** - * @brief Initiate and transmit a CAN frame message in Interrupt mode. - * @param hcan: pointer to a CAN_HandleTypeDef structure that contains - * the configuration information for the specified CAN. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_CAN_Transmit_IT(CAN_HandleTypeDef* hcan) -{ - uint32_t transmitmailbox = CAN_TXSTATUS_NOMAILBOX; - - /* Check the parameters */ - assert_param(IS_CAN_IDTYPE(hcan->pTxMsg->IDE)); - assert_param(IS_CAN_RTR(hcan->pTxMsg->RTR)); - assert_param(IS_CAN_DLC(hcan->pTxMsg->DLC)); - - if((hcan->State == HAL_CAN_STATE_READY) || (hcan->State == HAL_CAN_STATE_BUSY_RX)) - { - /* Process Locked */ - __HAL_LOCK(hcan); - - /* Select one empty transmit mailbox */ - if((hcan->Instance->TSR&CAN_TSR_TME0) == CAN_TSR_TME0) - { - transmitmailbox = 0; - } - else if((hcan->Instance->TSR&CAN_TSR_TME1) == CAN_TSR_TME1) - { - transmitmailbox = 1; - } - else if((hcan->Instance->TSR&CAN_TSR_TME2) == CAN_TSR_TME2) - { - transmitmailbox = 2; - } - - if(transmitmailbox != CAN_TXSTATUS_NOMAILBOX) - { - /* Set up the Id */ - hcan->Instance->sTxMailBox[transmitmailbox].TIR &= CAN_TI0R_TXRQ; - if(hcan->pTxMsg->IDE == CAN_ID_STD) - { - assert_param(IS_CAN_STDID(hcan->pTxMsg->StdId)); - hcan->Instance->sTxMailBox[transmitmailbox].TIR |= ((hcan->pTxMsg->StdId << 21) | \ - hcan->pTxMsg->RTR); - } - else - { - assert_param(IS_CAN_EXTID(hcan->pTxMsg->ExtId)); - hcan->Instance->sTxMailBox[transmitmailbox].TIR |= ((hcan->pTxMsg->ExtId << 3) | \ - hcan->pTxMsg->IDE | \ - hcan->pTxMsg->RTR); - } - - /* Set up the DLC */ - hcan->pTxMsg->DLC &= (uint8_t)0x0000000F; - hcan->Instance->sTxMailBox[transmitmailbox].TDTR &= (uint32_t)0xFFFFFFF0; - hcan->Instance->sTxMailBox[transmitmailbox].TDTR |= hcan->pTxMsg->DLC; - - /* Set up the data field */ - hcan->Instance->sTxMailBox[transmitmailbox].TDLR = (((uint32_t)hcan->pTxMsg->Data[3] << 24) | - ((uint32_t)hcan->pTxMsg->Data[2] << 16) | - ((uint32_t)hcan->pTxMsg->Data[1] << 8) | - ((uint32_t)hcan->pTxMsg->Data[0])); - hcan->Instance->sTxMailBox[transmitmailbox].TDHR = (((uint32_t)hcan->pTxMsg->Data[7] << 24) | - ((uint32_t)hcan->pTxMsg->Data[6] << 16) | - ((uint32_t)hcan->pTxMsg->Data[5] << 8) | - ((uint32_t)hcan->pTxMsg->Data[4])); - - if(hcan->State == HAL_CAN_STATE_BUSY_RX) - { - /* Change CAN state */ - hcan->State = HAL_CAN_STATE_BUSY_TX_RX; - } - else - { - /* Change CAN state */ - hcan->State = HAL_CAN_STATE_BUSY_TX; - } - - /* Set CAN error code to none */ - hcan->ErrorCode = HAL_CAN_ERROR_NONE; - - /* Process Unlocked */ - __HAL_UNLOCK(hcan); - - /* Enable interrupts: */ - /* - Enable Error warning Interrupt */ - /* - Enable Error passive Interrupt */ - /* - Enable Bus-off Interrupt */ - /* - Enable Last error code Interrupt */ - /* - Enable Error Interrupt */ - /* - Enable Transmit mailbox empty Interrupt */ - __HAL_CAN_ENABLE_IT(hcan, CAN_IT_EWG | - CAN_IT_EPV | - CAN_IT_BOF | - CAN_IT_LEC | - CAN_IT_ERR | - CAN_IT_TME ); - - /* Request transmission */ - hcan->Instance->sTxMailBox[transmitmailbox].TIR |= CAN_TI0R_TXRQ; - } - } - else - { - return HAL_BUSY; - } - - return HAL_OK; -} - -/** - * @brief Receive a correct CAN frame. - * @param hcan: pointer to a CAN_HandleTypeDef structure that contains - * the configuration information for the specified CAN. - * @param FIFONumber: FIFO number. - * @param Timeout: Timeout duration. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_CAN_Receive(CAN_HandleTypeDef* hcan, uint8_t FIFONumber, uint32_t Timeout) -{ - uint32_t tickstart = 0; - - /* Check the parameters */ - assert_param(IS_CAN_FIFO(FIFONumber)); - - /* Process locked */ - __HAL_LOCK(hcan); - - if(hcan->State == HAL_CAN_STATE_BUSY_TX) - { - /* Change CAN state */ - hcan->State = HAL_CAN_STATE_BUSY_TX_RX; - } - else - { - /* Change CAN state */ - hcan->State = HAL_CAN_STATE_BUSY_RX; - } - - /* Get tick */ - tickstart = HAL_GetTick(); - - /* Check pending message */ - while(__HAL_CAN_MSG_PENDING(hcan, FIFONumber) == 0) - { - /* Check for the Timeout */ - if(Timeout != HAL_MAX_DELAY) - { - if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout)) - { - hcan->State = HAL_CAN_STATE_TIMEOUT; - /* Process unlocked */ - __HAL_UNLOCK(hcan); - return HAL_TIMEOUT; - } - } - } - - /* Get the Id */ - hcan->pRxMsg->IDE = (uint8_t)0x04 & hcan->Instance->sFIFOMailBox[FIFONumber].RIR; - if (hcan->pRxMsg->IDE == CAN_ID_STD) - { - hcan->pRxMsg->StdId = (uint32_t)0x000007FF & (hcan->Instance->sFIFOMailBox[FIFONumber].RIR >> 21); - } - else - { - hcan->pRxMsg->ExtId = (uint32_t)0x1FFFFFFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RIR >> 3); - } - - hcan->pRxMsg->RTR = (uint8_t)0x02 & hcan->Instance->sFIFOMailBox[FIFONumber].RIR; - /* Get the DLC */ - hcan->pRxMsg->DLC = (uint8_t)0x0F & hcan->Instance->sFIFOMailBox[FIFONumber].RDTR; - /* Get the FMI */ - hcan->pRxMsg->FMI = (uint8_t)0xFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RDTR >> 8); - /* Get the data field */ - hcan->pRxMsg->Data[0] = (uint8_t)0xFF & hcan->Instance->sFIFOMailBox[FIFONumber].RDLR; - hcan->pRxMsg->Data[1] = (uint8_t)0xFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RDLR >> 8); - hcan->pRxMsg->Data[2] = (uint8_t)0xFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RDLR >> 16); - hcan->pRxMsg->Data[3] = (uint8_t)0xFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RDLR >> 24); - hcan->pRxMsg->Data[4] = (uint8_t)0xFF & hcan->Instance->sFIFOMailBox[FIFONumber].RDHR; - hcan->pRxMsg->Data[5] = (uint8_t)0xFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RDHR >> 8); - hcan->pRxMsg->Data[6] = (uint8_t)0xFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RDHR >> 16); - hcan->pRxMsg->Data[7] = (uint8_t)0xFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RDHR >> 24); - - /* Release the FIFO */ - if(FIFONumber == CAN_FIFO0) - { - /* Release FIFO0 */ - __HAL_CAN_FIFO_RELEASE(hcan, CAN_FIFO0); - } - else /* FIFONumber == CAN_FIFO1 */ - { - /* Release FIFO1 */ - __HAL_CAN_FIFO_RELEASE(hcan, CAN_FIFO1); - } - - if(hcan->State == HAL_CAN_STATE_BUSY_TX_RX) - { - /* Change CAN state */ - hcan->State = HAL_CAN_STATE_BUSY_TX; - } - else - { - /* Change CAN state */ - hcan->State = HAL_CAN_STATE_READY; - } - - /* Process unlocked */ - __HAL_UNLOCK(hcan); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Receive a correct CAN frame in Interrupt mode. - * @param hcan: pointer to a CAN_HandleTypeDef structure that contains - * the configuration information for the specified CAN. - * @param FIFONumber: FIFO number. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_CAN_Receive_IT(CAN_HandleTypeDef* hcan, uint8_t FIFONumber) -{ - /* Check the parameters */ - assert_param(IS_CAN_FIFO(FIFONumber)); - - if((hcan->State == HAL_CAN_STATE_READY) || (hcan->State == HAL_CAN_STATE_BUSY_TX)) - { - /* Process locked */ - __HAL_LOCK(hcan); - - if(hcan->State == HAL_CAN_STATE_BUSY_TX) - { - /* Change CAN state */ - hcan->State = HAL_CAN_STATE_BUSY_TX_RX; - } - else - { - /* Change CAN state */ - hcan->State = HAL_CAN_STATE_BUSY_RX; - } - - /* Set CAN error code to none */ - hcan->ErrorCode = HAL_CAN_ERROR_NONE; - - /* Enable interrupts: */ - /* - Enable Error warning Interrupt */ - /* - Enable Error passive Interrupt */ - /* - Enable Bus-off Interrupt */ - /* - Enable Last error code Interrupt */ - /* - Enable Error Interrupt */ - __HAL_CAN_ENABLE_IT(hcan, CAN_IT_EWG | - CAN_IT_EPV | - CAN_IT_BOF | - CAN_IT_LEC | - CAN_IT_ERR ); - - /* Process unlocked */ - __HAL_UNLOCK(hcan); - - if(FIFONumber == CAN_FIFO0) - { - /* Enable FIFO 0 message pending Interrupt */ - __HAL_CAN_ENABLE_IT(hcan, CAN_IT_FMP0); - } - else - { - /* Enable FIFO 1 message pending Interrupt */ - __HAL_CAN_ENABLE_IT(hcan, CAN_IT_FMP1); - } - - } - else - { - return HAL_BUSY; - } - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Enter the Sleep (low power) mode. - * @param hcan: pointer to a CAN_HandleTypeDef structure that contains - * the configuration information for the specified CAN. - * @retval HAL status. - */ -HAL_StatusTypeDef HAL_CAN_Sleep(CAN_HandleTypeDef* hcan) -{ - uint32_t tickstart = 0; - - /* Process locked */ - __HAL_LOCK(hcan); - - /* Change CAN state */ - hcan->State = HAL_CAN_STATE_BUSY; - - /* Request Sleep mode */ - hcan->Instance->MCR = (((hcan->Instance->MCR) & (uint32_t)(~(uint32_t)CAN_MCR_INRQ)) | CAN_MCR_SLEEP); - - /* Sleep mode status */ - if ((hcan->Instance->MSR & (CAN_MSR_SLAK|CAN_MSR_INAK)) != CAN_MSR_SLAK) - { - /* Process unlocked */ - __HAL_UNLOCK(hcan); - - /* Return function status */ - return HAL_ERROR; - } - - /* Get tick */ - tickstart = HAL_GetTick(); - - /* Wait the acknowledge */ - while((hcan->Instance->MSR & (CAN_MSR_SLAK|CAN_MSR_INAK)) != CAN_MSR_SLAK) - { - if((HAL_GetTick()-tickstart) > CAN_TIMEOUT_VALUE) - { - hcan->State = HAL_CAN_STATE_TIMEOUT; - /* Process unlocked */ - __HAL_UNLOCK(hcan); - return HAL_TIMEOUT; - } - } - - /* Change CAN state */ - hcan->State = HAL_CAN_STATE_READY; - - /* Process unlocked */ - __HAL_UNLOCK(hcan); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Wake up the CAN peripheral from sleep mode (after that the CAN peripheral - * is in the normal mode). - * @param hcan: pointer to a CAN_HandleTypeDef structure that contains - * the configuration information for the specified CAN. - * @retval HAL status. - */ -HAL_StatusTypeDef HAL_CAN_WakeUp(CAN_HandleTypeDef* hcan) -{ - uint32_t tickstart = 0; - - /* Process locked */ - __HAL_LOCK(hcan); - - /* Change CAN state */ - hcan->State = HAL_CAN_STATE_BUSY; - - /* Wake up request */ - hcan->Instance->MCR &= ~(uint32_t)CAN_MCR_SLEEP; - - /* Get tick */ - tickstart = HAL_GetTick(); - - /* Sleep mode status */ - while((hcan->Instance->MSR & CAN_MSR_SLAK) == CAN_MSR_SLAK) - { - if((HAL_GetTick()-tickstart) > CAN_TIMEOUT_VALUE) - { - hcan->State= HAL_CAN_STATE_TIMEOUT; - /* Process unlocked */ - __HAL_UNLOCK(hcan); - return HAL_TIMEOUT; - } - } - if((hcan->Instance->MSR & CAN_MSR_SLAK) == CAN_MSR_SLAK) - { - /* Process unlocked */ - __HAL_UNLOCK(hcan); - - /* Return function status */ - return HAL_ERROR; - } - - /* Change CAN state */ - hcan->State = HAL_CAN_STATE_READY; - - /* Process unlocked */ - __HAL_UNLOCK(hcan); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Handle CAN interrupt request. - * @param hcan: pointer to a CAN_HandleTypeDef structure that contains - * the configuration information for the specified CAN. - * @retval None - */ -void HAL_CAN_IRQHandler(CAN_HandleTypeDef* hcan) -{ - /* Check End of transmission flag */ - if(__HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_TME)) - { - if((__HAL_CAN_TRANSMIT_STATUS(hcan, CAN_TXMAILBOX_0)) || - (__HAL_CAN_TRANSMIT_STATUS(hcan, CAN_TXMAILBOX_1)) || - (__HAL_CAN_TRANSMIT_STATUS(hcan, CAN_TXMAILBOX_2))) - { - /* Call transmit function */ - CAN_Transmit_IT(hcan); - } - } - - /* Check End of reception flag for FIFO0 */ - if((__HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_FMP0)) && - (__HAL_CAN_MSG_PENDING(hcan, CAN_FIFO0) != 0)) - { - /* Call receive function */ - CAN_Receive_IT(hcan, CAN_FIFO0); - } - - /* Check End of reception flag for FIFO1 */ - if((__HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_FMP1)) && - (__HAL_CAN_MSG_PENDING(hcan, CAN_FIFO1) != 0)) - { - /* Call receive function */ - CAN_Receive_IT(hcan, CAN_FIFO1); - } - - /* Check Error Warning Flag */ - if((__HAL_CAN_GET_FLAG(hcan, CAN_FLAG_EWG)) && - (__HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_EWG)) && - (__HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_ERR))) - { - /* Set CAN error code to EWG error */ - hcan->ErrorCode |= HAL_CAN_ERROR_EWG; - /* No need for clear of Error Warning Flag as read-only */ - } - - /* Check Error Passive Flag */ - if((__HAL_CAN_GET_FLAG(hcan, CAN_FLAG_EPV)) && - (__HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_EPV)) && - (__HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_ERR))) - { - /* Set CAN error code to EPV error */ - hcan->ErrorCode |= HAL_CAN_ERROR_EPV; - /* No need for clear of Error Passive Flag as read-only */ - } - - /* Check Bus-Off Flag */ - if((__HAL_CAN_GET_FLAG(hcan, CAN_FLAG_BOF)) && - (__HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_BOF)) && - (__HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_ERR))) - { - /* Set CAN error code to BOF error */ - hcan->ErrorCode |= HAL_CAN_ERROR_BOF; - /* No need for clear of Bus-Off Flag as read-only */ - } - - /* Check Last error code Flag */ - if((!HAL_IS_BIT_CLR(hcan->Instance->ESR, CAN_ESR_LEC)) && - (__HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_LEC)) && - (__HAL_CAN_GET_IT_SOURCE(hcan, CAN_IT_ERR))) - { - switch(hcan->Instance->ESR & CAN_ESR_LEC) - { - case(CAN_ESR_LEC_0): - /* Set CAN error code to STF error */ - hcan->ErrorCode |= HAL_CAN_ERROR_STF; - break; - case(CAN_ESR_LEC_1): - /* Set CAN error code to FOR error */ - hcan->ErrorCode |= HAL_CAN_ERROR_FOR; - break; - case(CAN_ESR_LEC_1 | CAN_ESR_LEC_0): - /* Set CAN error code to ACK error */ - hcan->ErrorCode |= HAL_CAN_ERROR_ACK; - break; - case(CAN_ESR_LEC_2): - /* Set CAN error code to BR error */ - hcan->ErrorCode |= HAL_CAN_ERROR_BR; - break; - case(CAN_ESR_LEC_2 | CAN_ESR_LEC_0): - /* Set CAN error code to BD error */ - hcan->ErrorCode |= HAL_CAN_ERROR_BD; - break; - case(CAN_ESR_LEC_2 | CAN_ESR_LEC_1): - /* Set CAN error code to CRC error */ - hcan->ErrorCode |= HAL_CAN_ERROR_CRC; - break; - default: - break; - } - - /* Clear Last error code Flag */ - hcan->Instance->ESR &= ~(CAN_ESR_LEC); - } - - /* Call the Error call Back in case of Errors */ - if(hcan->ErrorCode != HAL_CAN_ERROR_NONE) - { - /* Clear ERRI bit */ - SET_BIT(hcan->Instance->MSR, CAN_MSR_ERRI); - /* Set the CAN state ready to be able to start again the process */ - hcan->State = HAL_CAN_STATE_READY; - /* Call Error callback function */ - HAL_CAN_ErrorCallback(hcan); - } -} - -/** - * @brief Transmission complete callback in non-blocking mode. - * @param hcan: pointer to a CAN_HandleTypeDef structure that contains - * the configuration information for the specified CAN. - * @retval None - */ -__weak void HAL_CAN_TxCpltCallback(CAN_HandleTypeDef* hcan) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_CAN_TxCpltCallback could be implemented in the user file - */ -} - -/** - * @brief Reception complete callback in non-blocking mode. - * @param hcan: pointer to a CAN_HandleTypeDef structure that contains - * the configuration information for the specified CAN. - * @retval None - */ -__weak void HAL_CAN_RxCpltCallback(CAN_HandleTypeDef* hcan) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_CAN_RxCpltCallback could be implemented in the user file - */ -} - -/** - * @brief Error CAN callback. - * @param hcan: pointer to a CAN_HandleTypeDef structure that contains - * the configuration information for the specified CAN. - * @retval None - */ -__weak void HAL_CAN_ErrorCallback(CAN_HandleTypeDef *hcan) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_CAN_ErrorCallback could be implemented in the user file - */ -} - -/** - * @} - */ - -/** @defgroup CAN_Exported_Functions_Group3 Peripheral State and Error functions - * @brief CAN Peripheral State functions - * -@verbatim - ============================================================================== - ##### Peripheral State and Error functions ##### - ============================================================================== - [..] - This subsection provides functions allowing to : - (+) Check the CAN state. - (+) Check CAN Errors detected during interrupt process. - -@endverbatim - * @{ - */ - -/** - * @brief Return the CAN handle state. - * @param hcan: pointer to a CAN_HandleTypeDef structure that contains - * the configuration information for the specified CAN. - * @retval HAL state - */ -HAL_CAN_StateTypeDef HAL_CAN_GetState(CAN_HandleTypeDef* hcan) -{ - /* Return CAN handle state */ - return hcan->State; -} - -/** - * @brief Return the CAN error code. - * @param hcan: pointer to a CAN_HandleTypeDef structure that contains - * the configuration information for the specified CAN. - * @retval CAN Error Code - */ -uint32_t HAL_CAN_GetError(CAN_HandleTypeDef *hcan) -{ - return hcan->ErrorCode; -} - -/** - * @} - */ - -/** - * @} - */ - -/** @defgroup CAN_Private_Functions CAN Private Functions - * @{ - */ -/** - * @brief Initiate and transmit a CAN frame message. - * @param hcan: pointer to a CAN_HandleTypeDef structure that contains - * the configuration information for the specified CAN. - * @retval HAL status - */ -static HAL_StatusTypeDef CAN_Transmit_IT(CAN_HandleTypeDef* hcan) -{ - /* Disable Transmit mailbox empty Interrupt */ - __HAL_CAN_DISABLE_IT(hcan, CAN_IT_TME); - - if(hcan->State == HAL_CAN_STATE_BUSY_TX) - { - /* Disable interrupts: */ - /* - Disable Error warning Interrupt */ - /* - Disable Error passive Interrupt */ - /* - Disable Bus-off Interrupt */ - /* - Disable Last error code Interrupt */ - /* - Disable Error Interrupt */ - __HAL_CAN_DISABLE_IT(hcan, CAN_IT_EWG | - CAN_IT_EPV | - CAN_IT_BOF | - CAN_IT_LEC | - CAN_IT_ERR ); - } - - if(hcan->State == HAL_CAN_STATE_BUSY_TX_RX) - { - /* Change CAN state */ - hcan->State = HAL_CAN_STATE_BUSY_RX; - } - else - { - /* Change CAN state */ - hcan->State = HAL_CAN_STATE_READY; - } - - /* Transmission complete callback */ - HAL_CAN_TxCpltCallback(hcan); - - return HAL_OK; -} - -/** - * @brief Receive a correct CAN frame. - * @param hcan: Pointer to a CAN_HandleTypeDef structure that contains - * the configuration information for the specified CAN. - * @param FIFONumber: Specify the FIFO number - * @retval HAL status - */ -static HAL_StatusTypeDef CAN_Receive_IT(CAN_HandleTypeDef* hcan, uint8_t FIFONumber) -{ - /* Get the Id */ - hcan->pRxMsg->IDE = (uint8_t)0x04 & hcan->Instance->sFIFOMailBox[FIFONumber].RIR; - if (hcan->pRxMsg->IDE == CAN_ID_STD) - { - hcan->pRxMsg->StdId = (uint32_t)0x000007FF & (hcan->Instance->sFIFOMailBox[FIFONumber].RIR >> 21); - } - else - { - hcan->pRxMsg->ExtId = (uint32_t)0x1FFFFFFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RIR >> 3); - } - - hcan->pRxMsg->RTR = (uint8_t)0x02 & hcan->Instance->sFIFOMailBox[FIFONumber].RIR; - /* Get the DLC */ - hcan->pRxMsg->DLC = (uint8_t)0x0F & hcan->Instance->sFIFOMailBox[FIFONumber].RDTR; - /* Get the FMI */ - hcan->pRxMsg->FMI = (uint8_t)0xFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RDTR >> 8); - /* Get the data field */ - hcan->pRxMsg->Data[0] = (uint8_t)0xFF & hcan->Instance->sFIFOMailBox[FIFONumber].RDLR; - hcan->pRxMsg->Data[1] = (uint8_t)0xFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RDLR >> 8); - hcan->pRxMsg->Data[2] = (uint8_t)0xFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RDLR >> 16); - hcan->pRxMsg->Data[3] = (uint8_t)0xFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RDLR >> 24); - hcan->pRxMsg->Data[4] = (uint8_t)0xFF & hcan->Instance->sFIFOMailBox[FIFONumber].RDHR; - hcan->pRxMsg->Data[5] = (uint8_t)0xFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RDHR >> 8); - hcan->pRxMsg->Data[6] = (uint8_t)0xFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RDHR >> 16); - hcan->pRxMsg->Data[7] = (uint8_t)0xFF & (hcan->Instance->sFIFOMailBox[FIFONumber].RDHR >> 24); - /* Release the FIFO */ - /* Release FIFO0 */ - if (FIFONumber == CAN_FIFO0) - { - __HAL_CAN_FIFO_RELEASE(hcan, CAN_FIFO0); - - /* Disable FIFO 0 message pending Interrupt */ - __HAL_CAN_DISABLE_IT(hcan, CAN_IT_FMP0); - } - /* Release FIFO1 */ - else /* FIFONumber == CAN_FIFO1 */ - { - __HAL_CAN_FIFO_RELEASE(hcan, CAN_FIFO1); - - /* Disable FIFO 1 message pending Interrupt */ - __HAL_CAN_DISABLE_IT(hcan, CAN_IT_FMP1); - } - - if(hcan->State == HAL_CAN_STATE_BUSY_RX) - { - /* Disable interrupts: */ - /* - Disable Error warning Interrupt */ - /* - Disable Error passive Interrupt */ - /* - Disable Bus-off Interrupt */ - /* - Disable Last error code Interrupt */ - /* - Disable Error Interrupt */ - __HAL_CAN_DISABLE_IT(hcan, CAN_IT_EWG | - CAN_IT_EPV | - CAN_IT_BOF | - CAN_IT_LEC | - CAN_IT_ERR ); - } - - if(hcan->State == HAL_CAN_STATE_BUSY_TX_RX) - { - /* Disable CAN state */ - hcan->State = HAL_CAN_STATE_BUSY_TX; - } - else - { - /* Change CAN state */ - hcan->State = HAL_CAN_STATE_READY; - } - - /* Receive complete callback */ - HAL_CAN_RxCpltCallback(hcan); - - /* Return function status */ - return HAL_OK; -} -/** - * @} - */ - -#endif /* HAL_CAN_MODULE_ENABLED */ -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ -
--- a/Src/stm32l4xx_hal_comp.c Thu Nov 12 20:49:49 2015 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,758 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_comp.c - * @author MCD Application Team - * @version V1.1.0 - * @date 16-September-2015 - * @brief COMP HAL module driver. - * This file provides firmware functions to manage the following - * functionalities of the COMP peripheral: - * + Initialization and de-initialization functions - * + Start/Stop operation functions in polling mode. - * + Start/Stop operation functions in interrupt mode. - * + Peripheral Control functions - * + Peripheral State functions - * - @verbatim -================================================================================ - ##### COMP Peripheral features ##### -================================================================================ - - [..] - The STM32L4xx device family integrates two analog comparators COMP1 and COMP2: - (#) The non inverting input and inverting input can be set to GPIO pins - as shown in Table 1. COMP Inputs below. - - (#) The COMP output is not configurable by the HAL COMP as on STM32F3 and STM32F0 - series: redirection to TIMER peripheral is to set with HAL TIM input remapping functions. - - (#) The COMP output level is available using HAL_COMP_GetOutputLevel() - and can be set on GPIO pins. Refer to Table 2. COMP Outputs below. - - (#) The comparators COMP1 and COMP2 can be combined in window mode. - - (#) The comparators COMP1 and COMP2 have interrupt capability with wake-up - from Sleep and Stop modes (through the EXTI controller): - (++) COMP1 is internally connected to EXTI Line 21 - (++) COMP2 is internally connected to EXTI Line 22 - - From the corresponding IRQ handler, the right interrupt source can be retrieved with the - macros __HAL_COMP_COMP1_EXTI_GET_FLAG() and __HAL_COMP_COMP2_EXTI_GET_FLAG(). - - -[..] Table 1. COMP Inputs for the STM32L4xx devices - (+) +---------------------------------------------------------+ - (+) | | | COMP1 | COMP2 | - (+) |------------------------|----------------|---------------| - (+) | | 1/4 VREFINT | OK | OK | - (+) | | 1/2 VREFINT | OK | OK | - (+) | | 3/4 VREFINT | OK | OK | - (+) | Inverting Input | VREFINT | OK | OK | - (+) | (minus) | DAC1 OUT | OK | OK | - (+) | | DAC2 OUT | OK | OK | - (+) | | IO1 | PB1 | PB3 | - (+) | | IO2 | PC4 | PB7 | - (+) |------------------------|----------------|-------|-------| - (+) | Non Inverting Input | IO1 | PC5 | PB4 | - (+) | (plus) | IO2 | PB2 | PB6 | - (+) +--------------------------------------------------+ - - [..] Table 2. COMP Outputs for the STM32L4xx devices - (+) +------------------------------------+ - (+) | COMP1 | COMP2 | - (+) |------------------|-----------------| - (+) | PB0 (AF) | PB5 (AF) | - (+) | PB10 (AF) | PB11 (AF) | - (+) |------------------|-----------------| - (+) | Embedded TIMERS | Embedded TIMERS | - (+) | (cf. HAL TIM) | (cf. HAL TIM) | - (+) +------------------------------------+ - - - ##### How to use this driver ##### -================================================================================ - [..] - This driver provides functions to configure and program the Comparators of all STM32L4xx devices. - - To use the comparator, perform the following steps: - - (#) Initialize the COMP low level resources by implementing the HAL_COMP_MspInit(): - (++) Configure the inverting and non-inverting comparator inputs in analog mode using HAL_GPIO_Init(). - (++) Configure the comparator output in alternate function mode using HAL_GPIO_Init() to map the comparator - output to the GPIO pin. - (++) If required enable the COMP interrupt by configuring and enabling EXTI line in Interrupt mode and - selecting the desired sensitivity level using HAL_GPIO_Init() function. After that enable the comparator - interrupt vector using HAL_NVIC_EnableIRQ() function. - - (#) Configure the comparator using HAL_COMP_Init() function: - (++) Select the inverting input (input minus) - (++) Select the non-inverting input (input plus) - (++) Select the hysteresis - (++) Select the blanking source - (++) Select the output polarity - (++) Select the power mode - (++) Select the window mode - - -@@- HAL_COMP_Init() calls internally __HAL_RCC_SYSCFG_CLK_ENABLE() in order - to enable the comparator(s). - - (#) On-the-fly reconfiguration of comparator(s) may be done by calling again HAL_COMP_Init( - function with new input parameter values; HAL_COMP_MspInit() function shall be adapted - to support multi configurations. - - (#) Enable the comparator using HAL_COMP_Start() or HAL_COMP_Start_IT() functions. - - (#) Use HAL_COMP_TriggerCallback() and/or HAL_COMP_GetOutputLevel() functions - to manage comparator outputs (events and output level). - - (#) Disable the comparator using HAL_COMP_Stop() or HAL_COMP_Stop_IT() - function. - - (#) De-initialize the comparator using HAL_COMP_DeInit() function. - - (#) For safety purposes comparator(s) can be locked using HAL_COMP_Lock() function. - Only a MCU reset can reset that protection. - - @endverbatim - ****************************************************************************** - * @attention - * - * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @defgroup COMP COMP - * @brief COMP HAL module driver - * @{ - */ - -#ifdef HAL_COMP_MODULE_ENABLED - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -/** @addtogroup COMP_Private_Constants - * @{ - */ -/* CSR register reset value */ -#define COMP_CSR_RESET_VALUE ((uint32_t)0x00000000) - -/* CSR register Mask: all fields except read-only, lock and enable bits */ -#define COMP_CSR_UPDATE_PARAMETERS_MASK (COMP_CSR_PWRMODE | COMP_CSR_INMSEL | COMP_CSR_INPSEL | \ - COMP_CSR_WINMODE | COMP_CSR_POLARITY | COMP_CSR_HYST | \ - COMP_CSR_BLANKING | COMP_CSR_BRGEN | COMP_CSR_SCALEN) - -#define COMP_LOCK_DISABLE ((uint32_t)0x00000000) -#define COMP_LOCK_ENABLE COMP_CSR_LOCK - -#define COMP_STATE_BIT_LOCK ((uint32_t)0x10) - -/** - * @} - */ - -/* Private macro -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ -/* Exported functions --------------------------------------------------------*/ - -/** @defgroup COMP_Exported_Functions COMP Exported Functions - * @{ - */ - -/** @defgroup COMP_Exported_Functions_Group1 Initialization/de-initialization functions - * @brief Initialization and de-initialization functions. - * -@verbatim - =============================================================================== - ##### Initialization and de-initialization functions ##### - =============================================================================== - [..] This section provides functions to initialize and de-initialize comparators - -@endverbatim - * @{ - */ - -/** - * @brief Initialize the COMP according to the specified - * parameters in the COMP_InitTypeDef and initialize the associated handle. - * @note If the selected comparator is locked, initialization can't be performed. - * To unlock the configuration, perform a system reset. - * @param hcomp COMP handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_COMP_Init(COMP_HandleTypeDef *hcomp) -{ - uint32_t tmpcsr = 0; - HAL_StatusTypeDef status = HAL_OK; - - /* Check the COMP handle allocation and lock status */ - if((hcomp == NULL) || ((hcomp->State & COMP_STATE_BIT_LOCK) != RESET)) - { - status = HAL_ERROR; - } - else - { - /* Check the parameters */ - assert_param(IS_COMP_ALL_INSTANCE(hcomp->Instance)); - assert_param(IS_COMP_INVERTINGINPUT(hcomp->Init.InvertingInput)); - assert_param(IS_COMP_NONINVERTINGINPUT(hcomp->Init.NonInvertingInput)); - assert_param(IS_COMP_OUTPUTPOL(hcomp->Init.OutputPol)); - assert_param(IS_COMP_MODE(hcomp->Init.Mode)); - assert_param(IS_COMP_HYSTERESIS(hcomp->Init.Hysteresis)); - assert_param(IS_COMP_BLANKINGSRCE(hcomp->Init.BlankingSrce)); - assert_param(IS_COMP_BLANKINGSRCE_INSTANCE(hcomp->Instance, hcomp->Init.BlankingSrce)); - assert_param(IS_COMP_TRIGGERMODE(hcomp->Init.TriggerMode)); - - if(hcomp->Init.WindowMode != COMP_WINDOWMODE_DISABLE) - { - assert_param(IS_COMP_WINDOWMODE_INSTANCE(hcomp->Instance)); - assert_param(IS_COMP_WINDOWMODE(hcomp->Init.WindowMode)); - } - - /* Init SYSCFG and the low level hardware to access comparators */ - __HAL_RCC_SYSCFG_CLK_ENABLE(); - /* Init the low level hardware : SYSCFG to access comparators */ - HAL_COMP_MspInit(hcomp); - - if(hcomp->State == HAL_COMP_STATE_RESET) - { - /* Allocate lock resource and initialize it */ - hcomp->Lock = HAL_UNLOCKED; - } - - /* Change COMP peripheral state */ - hcomp->State = HAL_COMP_STATE_BUSY; - - /* Set COMP parameters */ - /* Set INMSEL bits according to hcomp->Init.InvertingInput value */ - /* Set INPSEL bits according to hcomp->Init.NonInvertingInput value */ - /* Set BLANKING bits according to hcomp->Init.BlankingSrce value */ - /* Set HYST bits according to hcomp->Init.Hysteresis value */ - /* Set POLARITY bit according to hcomp->Init.OutputPol value */ - /* Set POWERMODE bits according to hcomp->Init.Mode value */ - /* Set WINMODE bit according to hcomp->Init.WindowMode value */ - tmpcsr = hcomp->Init.InvertingInput | \ - hcomp->Init.NonInvertingInput | \ - hcomp->Init.BlankingSrce | \ - hcomp->Init.Hysteresis | \ - hcomp->Init.OutputPol | \ - hcomp->Init.Mode | \ - hcomp->Init.WindowMode; - - /* Check VREFINT use for NonInvertingInput */ - if(hcomp->Init.InvertingInput == COMP_INVERTINGINPUT_VREFINT) - { - /* Enable voltage scaler to output VREFINT */ - tmpcsr |= COMP_CSR_SCALEN; - } - else - { - if((hcomp->Init.InvertingInput == COMP_INVERTINGINPUT_1_4VREFINT) || - (hcomp->Init.InvertingInput == COMP_INVERTINGINPUT_1_2VREFINT) || - (hcomp->Init.InvertingInput == COMP_INVERTINGINPUT_3_4VREFINT)) - { - /* Enable voltage & bandgap scaler to output VREFINT */ - tmpcsr |= (COMP_CSR_BRGEN | COMP_CSR_SCALEN); - } - } - - MODIFY_REG(hcomp->Instance->CSR, COMP_CSR_UPDATE_PARAMETERS_MASK, tmpcsr); - - /* Initialize the COMP state*/ - hcomp->State = HAL_COMP_STATE_READY; - } - - return status; -} - -/** - * @brief DeInitialize the COMP peripheral. - * @note Deinitialization cannot be performed if the COMP configuration is locked. - * To unlock the configuration, perform a system reset. - * @param hcomp COMP handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_COMP_DeInit(COMP_HandleTypeDef *hcomp) -{ - HAL_StatusTypeDef status = HAL_OK; - - /* Check the COMP handle allocation and lock status */ - if((hcomp == NULL) || ((hcomp->State & COMP_STATE_BIT_LOCK) != RESET)) - { - status = HAL_ERROR; - } - else - { - /* Check the parameter */ - assert_param(IS_COMP_ALL_INSTANCE(hcomp->Instance)); - - /* Set COMP_CSR register to reset value */ - WRITE_REG(hcomp->Instance->CSR, COMP_CSR_RESET_VALUE); - - /* DeInit the low level hardware: SYSCFG, GPIO, CLOCK and NVIC */ - HAL_COMP_MspDeInit(hcomp); - - hcomp->State = HAL_COMP_STATE_RESET; - - /* Release Lock */ - __HAL_UNLOCK(hcomp); - } - - return status; -} - -/** - * @brief Initialize the COMP MSP. - * @param hcomp COMP handle - * @retval None - */ -__weak void HAL_COMP_MspInit(COMP_HandleTypeDef *hcomp) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_COMP_MspInit could be implemented in the user file - */ -} - -/** - * @brief DeInitialize the COMP MSP. - * @param hcomp COMP handle - * @retval None - */ -__weak void HAL_COMP_MspDeInit(COMP_HandleTypeDef *hcomp) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_COMP_MspDeInit could be implemented in the user file - */ -} - -/** - * @} - */ - -/** @defgroup COMP_Exported_Functions_Group2 Start-Stop operation functions - * @brief Start-Stop operation functions. - * -@verbatim - =============================================================================== - ##### COMP Start Stop operation functions ##### - =============================================================================== - [..] This section provides functions allowing to: - (+) Start a Comparator without interrupt. - (+) Stop a Comparator without interrupt. - (+) Start a Comparator with interrupt generation. - (+) Stop a Comparator with interrupt generation. - -@endverbatim - * @{ - */ - -/** - * @brief Start the comparator. - * @param hcomp COMP handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_COMP_Start(COMP_HandleTypeDef *hcomp) -{ - HAL_StatusTypeDef status = HAL_OK; - uint32_t extiline = 0; - - /* Check the COMP handle allocation and lock status */ - if((hcomp == NULL) || ((hcomp->State & COMP_STATE_BIT_LOCK) != RESET)) - { - status = HAL_ERROR; - } - else - { - /* Check the parameter */ - assert_param(IS_COMP_ALL_INSTANCE(hcomp->Instance)); - - if(hcomp->State == HAL_COMP_STATE_READY) - { - /* Get the EXTI Line output configuration */ - extiline = COMP_GET_EXTI_LINE(hcomp->Instance); - - /* Configure the event generation */ - if((hcomp->Init.TriggerMode & (COMP_TRIGGERMODE_EVENT_RISING|COMP_TRIGGERMODE_EVENT_FALLING)) != RESET) - { - /* Configure the event trigger rising edge */ - if((hcomp->Init.TriggerMode & COMP_TRIGGERMODE_EVENT_RISING) != RESET) - { - SET_BIT(EXTI->RTSR1, extiline); - } - else - { - CLEAR_BIT(EXTI->RTSR1, extiline); - } - - /* Configure the trigger falling edge */ - if((hcomp->Init.TriggerMode & COMP_TRIGGERMODE_EVENT_FALLING) != RESET) - { - SET_BIT(EXTI->FTSR1, extiline); - } - else - { - CLEAR_BIT(EXTI->FTSR1, extiline); - } - - /* Clear COMP EXTI pending bit if any */ - WRITE_REG(EXTI->PR1, extiline); - - /* Enable EXTI event generation */ - SET_BIT(EXTI->EMR1, extiline); - } - else - { - /* Make sur EXTI event generation is disabled */ - CLEAR_BIT(EXTI->EMR1, extiline); - } - - /* Enable the selected comparator */ - SET_BIT(hcomp->Instance->CSR, COMP_CSR_EN); - - hcomp->State = HAL_COMP_STATE_BUSY; - } - else - { - status = HAL_ERROR; - } - } - - return status; -} - -/** - * @brief Stop the comparator. - * @param hcomp COMP handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_COMP_Stop(COMP_HandleTypeDef *hcomp) -{ - HAL_StatusTypeDef status = HAL_OK; - - /* Check the COMP handle allocation and lock status */ - if((hcomp == NULL) || ((hcomp->State & COMP_STATE_BIT_LOCK) != RESET)) - { - status = HAL_ERROR; - } - else - { - /* Check the parameter */ - assert_param(IS_COMP_ALL_INSTANCE(hcomp->Instance)); - - if(hcomp->State == HAL_COMP_STATE_BUSY) - { - /* Disable the EXTI Line event mode if any */ - CLEAR_BIT(EXTI->EMR1, COMP_GET_EXTI_LINE(hcomp->Instance)); - - /* Disable the selected comparator */ - CLEAR_BIT(hcomp->Instance->CSR, COMP_CSR_EN); - - hcomp->State = HAL_COMP_STATE_READY; - } - else - { - status = HAL_ERROR; - } - } - - return status; -} - -/** - * @brief Start the comparator in Interrupt mode. - * @param hcomp COMP handle - * @retval HAL status. - */ -HAL_StatusTypeDef HAL_COMP_Start_IT(COMP_HandleTypeDef *hcomp) -{ - HAL_StatusTypeDef status = HAL_OK; - uint32_t extiline = 0; - - /* Check the COMP handle allocation and lock status */ - if((hcomp == NULL) || ((hcomp->State & COMP_STATE_BIT_LOCK) != RESET)) - { - status = HAL_ERROR; - } - else - { - /* Check the parameter */ - assert_param(IS_COMP_ALL_INSTANCE(hcomp->Instance)); - - if(hcomp->State == HAL_COMP_STATE_READY) - { - /* Configure the EXTI event generation */ - if((hcomp->Init.TriggerMode & (COMP_TRIGGERMODE_IT_RISING|COMP_TRIGGERMODE_IT_FALLING)) != RESET) - { - /* Get the EXTI Line output configuration */ - extiline = COMP_GET_EXTI_LINE(hcomp->Instance); - - /* Configure the trigger rising edge */ - if((hcomp->Init.TriggerMode & COMP_TRIGGERMODE_IT_RISING) != RESET) - { - SET_BIT(EXTI->RTSR1, extiline); - } - else - { - CLEAR_BIT(EXTI->RTSR1, extiline); - } - /* Configure the trigger falling edge */ - if((hcomp->Init.TriggerMode & COMP_TRIGGERMODE_IT_FALLING) != RESET) - { - SET_BIT(EXTI->FTSR1, extiline); - } - else - { - CLEAR_BIT(EXTI->FTSR1, extiline); - } - - /* Clear COMP EXTI pending bit if any */ - WRITE_REG(EXTI->PR1, extiline); - - /* Enable EXTI interrupt mode */ - SET_BIT(EXTI->IMR1, extiline); - - /* Enable the selected comparator */ - SET_BIT(hcomp->Instance->CSR, COMP_CSR_EN); - - hcomp->State = HAL_COMP_STATE_BUSY; - } - else - { - status = HAL_ERROR; - } - } - else - { - status = HAL_ERROR; - } - } - - return status; -} - -/** - * @brief Stop the comparator in Interrupt mode. - * @param hcomp COMP handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_COMP_Stop_IT(COMP_HandleTypeDef *hcomp) -{ - HAL_StatusTypeDef status = HAL_OK; - - /* Disable the EXTI Line interrupt mode */ - CLEAR_BIT(EXTI->IMR1, COMP_GET_EXTI_LINE(hcomp->Instance)); - - status = HAL_COMP_Stop(hcomp); - - return status; -} - -/** - * @brief Comparator IRQ Handler. - * @param hcomp COMP handle - * @retval HAL status - */ -void HAL_COMP_IRQHandler(COMP_HandleTypeDef *hcomp) -{ - uint32_t extiline = COMP_GET_EXTI_LINE(hcomp->Instance); - - /* Check COMP EXTI flag */ - if(READ_BIT(EXTI->PR1, extiline) != RESET) - { - /* Clear COMP EXTI pending bit */ - WRITE_REG(EXTI->PR1, extiline); - - /* COMP trigger user callback */ - HAL_COMP_TriggerCallback(hcomp); - } -} - -/** - * @} - */ - -/** @defgroup COMP_Exported_Functions_Group3 Peripheral Control functions - * @brief Management functions. - * -@verbatim - =============================================================================== - ##### Peripheral Control functions ##### - =============================================================================== - [..] - This subsection provides a set of functions allowing to control the comparators. - -@endverbatim - * @{ - */ - -/** - * @brief Lock the selected comparator configuration. - * @note A system reset is required to unlock the comparator configuration. - * @param hcomp COMP handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_COMP_Lock(COMP_HandleTypeDef *hcomp) -{ - HAL_StatusTypeDef status = HAL_OK; - - /* Check the COMP handle allocation and lock status */ - if((hcomp == NULL) || ((hcomp->State & COMP_STATE_BIT_LOCK) != RESET)) - { - status = HAL_ERROR; - } - else - { - /* Check the parameter */ - assert_param(IS_COMP_ALL_INSTANCE(hcomp->Instance)); - - /* Set lock flag on state */ - switch(hcomp->State) - { - case HAL_COMP_STATE_BUSY: - hcomp->State = HAL_COMP_STATE_BUSY_LOCKED; - break; - case HAL_COMP_STATE_READY: - hcomp->State = HAL_COMP_STATE_READY_LOCKED; - break; - default: - /* unexpected state */ - status = HAL_ERROR; - break; - } - } - - if(status == HAL_OK) - { - /* Set the lock bit corresponding to selected comparator */ - __HAL_COMP_LOCK(hcomp); - } - - return status; -} - -/** - * @brief Return the output level (high or low) of the selected comparator. - * The output level depends on the selected polarity. - * If the polarity is not inverted: - * - Comparator output is low when the non-inverting input is at a lower - * voltage than the inverting input - * - Comparator output is high when the non-inverting input is at a higher - * voltage than the inverting input - * If the polarity is inverted: - * - Comparator output is high when the non-inverting input is at a lower - * voltage than the inverting input - * - Comparator output is low when the non-inverting input is at a higher - * voltage than the inverting input - * @param hcomp COMP handle - * @retval Returns the selected comparator output level: - * @arg @ref COMP_OUTPUTLEVEL_LOW - * @arg @ref COMP_OUTPUTLEVEL_HIGH - * - */ -uint32_t HAL_COMP_GetOutputLevel(COMP_HandleTypeDef *hcomp) -{ - /* Check the parameter */ - assert_param(IS_COMP_ALL_INSTANCE(hcomp->Instance)); - - return((uint32_t)(hcomp->Instance->CSR & COMP_OUTPUTLEVEL_HIGH)); -} - -/** - * @brief Comparator callback. - * @param hcomp COMP handle - * @retval None - */ -__weak void HAL_COMP_TriggerCallback(COMP_HandleTypeDef *hcomp) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_COMP_TriggerCallback should be implemented in the user file - */ -} - - -/** - * @} - */ - -/** @defgroup COMP_Exported_Functions_Group4 Peripheral State functions - * @brief Peripheral State functions. - * -@verbatim - =============================================================================== - ##### Peripheral State functions ##### - =============================================================================== - [..] - This subsection permits to get in run-time the status of the peripheral. - -@endverbatim - * @{ - */ - -/** - * @brief Return the COMP handle state. - * @param hcomp COMP handle - * @retval HAL state - */ -HAL_COMP_StateTypeDef HAL_COMP_GetState(COMP_HandleTypeDef *hcomp) -{ - /* Check the COMP handle allocation */ - if(hcomp == NULL) - { - return HAL_COMP_STATE_RESET; - } - - /* Check the parameter */ - assert_param(IS_COMP_ALL_INSTANCE(hcomp->Instance)); - - /* Return COMP handle state */ - return hcomp->State; -} -/** - * @} - */ - -/** - * @} - */ - -#endif /* HAL_COMP_MODULE_ENABLED */ -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ -
--- a/Src/stm32l4xx_hal_crc.c Thu Nov 12 20:49:49 2015 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,533 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_crc.c - * @author MCD Application Team - * @version V1.1.0 - * @date 16-September-2015 - * @brief CRC HAL module driver. - * This file provides firmware functions to manage the following - * functionalities of the CRC peripheral: - * + Initialization and de-initialization functions - * + Peripheral Control functions - * + Peripheral State functions - * - @verbatim - =============================================================================== - ##### How to use this driver ##### - =============================================================================== - [..] - (+) Enable CRC AHB clock using __HAL_RCC_CRC_CLK_ENABLE(); - (+) Initialize CRC calculator - (++) specify generating polynomial (IP default or non-default one) - (++) specify initialization value (IP default or non-default one) - (++) specify input data format - (++) specify input or output data inversion mode if any - (+) Use HAL_CRC_Accumulate() function to compute the CRC value of the - input data buffer starting with the previously computed CRC as - initialization value - (+) Use HAL_CRC_Calculate() function to compute the CRC value of the - input data buffer starting with the defined initialization value - (default or non-default) to initiate CRC calculation - - @endverbatim - ****************************************************************************** - * @attention - * - * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @defgroup CRC CRC - * @brief CRC HAL module driver. - * @{ - */ - -#ifdef HAL_CRC_MODULE_ENABLED - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -/* Private macro -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ -/** @defgroup CRC_Private_Functions CRC Private Functions - * @{ - */ -static uint32_t CRC_Handle_8(CRC_HandleTypeDef *hcrc, uint8_t pBuffer[], uint32_t BufferLength); -static uint32_t CRC_Handle_16(CRC_HandleTypeDef *hcrc, uint16_t pBuffer[], uint32_t BufferLength); -/** - * @} - */ - -/* Exported functions --------------------------------------------------------*/ - -/** @defgroup CRC_Exported_Functions CRC Exported Functions - * @{ - */ - -/** @defgroup CRC_Exported_Functions_Group1 Initialization and de-initialization functions - * @brief Initialization and Configuration functions. - * -@verbatim - =============================================================================== - ##### Initialization and de-initialization functions ##### - =============================================================================== - [..] This section provides functions allowing to: - (+) Initialize the CRC according to the specified parameters - in the CRC_InitTypeDef and create the associated handle - (+) DeInitialize the CRC peripheral - (+) Initialize the CRC MSP (MCU Specific Package) - (+) DeInitialize the CRC MSP - -@endverbatim - * @{ - */ - -/** - * @brief Initialize the CRC according to the specified - * parameters in the CRC_InitTypeDef and create the associated handle. - * @param hcrc: CRC handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_CRC_Init(CRC_HandleTypeDef *hcrc) -{ - /* Check the CRC handle allocation */ - if(hcrc == NULL) - { - return HAL_ERROR; - } - - /* Check the parameters */ - assert_param(IS_CRC_ALL_INSTANCE(hcrc->Instance)); - - if(hcrc->State == HAL_CRC_STATE_RESET) - { - /* Allocate lock resource and initialize it */ - hcrc->Lock = HAL_UNLOCKED; - - /* Init the low level hardware */ - HAL_CRC_MspInit(hcrc); - } - - hcrc->State = HAL_CRC_STATE_BUSY; - - /* check whether or not non-default generating polynomial has been - * picked up by user */ - assert_param(IS_DEFAULT_POLYNOMIAL(hcrc->Init.DefaultPolynomialUse)); - if (hcrc->Init.DefaultPolynomialUse == DEFAULT_POLYNOMIAL_ENABLE) - { - /* initialize IP with default generating polynomial */ - WRITE_REG(hcrc->Instance->POL, DEFAULT_CRC32_POLY); - MODIFY_REG(hcrc->Instance->CR, CRC_CR_POLYSIZE, CRC_POLYLENGTH_32B); - } - else - { - /* initialize CRC IP with generating polynomial defined by user */ - if (HAL_CRCEx_Polynomial_Set(hcrc, hcrc->Init.GeneratingPolynomial, hcrc->Init.CRCLength) != HAL_OK) - { - return HAL_ERROR; - } - } - - /* check whether or not non-default CRC initial value has been - * picked up by user */ - assert_param(IS_DEFAULT_INIT_VALUE(hcrc->Init.DefaultInitValueUse)); - if (hcrc->Init.DefaultInitValueUse == DEFAULT_INIT_VALUE_ENABLE) - { - WRITE_REG(hcrc->Instance->INIT, DEFAULT_CRC_INITVALUE); - } - else - { - WRITE_REG(hcrc->Instance->INIT, hcrc->Init.InitValue); - } - - - /* set input data inversion mode */ - assert_param(IS_CRC_INPUTDATA_INVERSION_MODE(hcrc->Init.InputDataInversionMode)); - MODIFY_REG(hcrc->Instance->CR, CRC_CR_REV_IN, hcrc->Init.InputDataInversionMode); - - /* set output data inversion mode */ - assert_param(IS_CRC_OUTPUTDATA_INVERSION_MODE(hcrc->Init.OutputDataInversionMode)); - MODIFY_REG(hcrc->Instance->CR, CRC_CR_REV_OUT, hcrc->Init.OutputDataInversionMode); - - /* makes sure the input data format (bytes, halfwords or words stream) - * is properly specified by user */ - assert_param(IS_CRC_INPUTDATA_FORMAT(hcrc->InputDataFormat)); - - /* Change CRC peripheral state */ - hcrc->State = HAL_CRC_STATE_READY; - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief DeInitialize the CRC peripheral. - * @param hcrc: CRC handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_CRC_DeInit(CRC_HandleTypeDef *hcrc) -{ - /* Check the CRC handle allocation */ - if(hcrc == NULL) - { - return HAL_ERROR; - } - - /* Check the parameters */ - assert_param(IS_CRC_ALL_INSTANCE(hcrc->Instance)); - - /* Check the CRC peripheral state */ - if(hcrc->State == HAL_CRC_STATE_BUSY) - { - return HAL_BUSY; - } - - /* Change CRC peripheral state */ - hcrc->State = HAL_CRC_STATE_BUSY; - - /* Reset CRC calculation unit */ - __HAL_CRC_DR_RESET(hcrc); - - /* DeInit the low level hardware */ - HAL_CRC_MspDeInit(hcrc); - - /* Change CRC peripheral state */ - hcrc->State = HAL_CRC_STATE_RESET; - - /* Process unlocked */ - __HAL_UNLOCK(hcrc); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Initializes the CRC MSP. - * @param hcrc: CRC handle - * @retval None - */ -__weak void HAL_CRC_MspInit(CRC_HandleTypeDef *hcrc) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_CRC_MspInit can be implemented in the user file - */ -} - -/** - * @brief DeInitialize the CRC MSP. - * @param hcrc: CRC handle - * @retval None - */ -__weak void HAL_CRC_MspDeInit(CRC_HandleTypeDef *hcrc) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_CRC_MspDeInit can be implemented in the user file - */ -} - -/** - * @} - */ - -/** @defgroup CRC_Exported_Functions_Group2 Peripheral Control functions - * @brief management functions. - * -@verbatim - =============================================================================== - ##### Peripheral Control functions ##### - =============================================================================== - [..] This section provides functions allowing to: - (+) compute the 7, 8, 16 or 32-bit CRC value of an 8, 16 or 32-bit data buffer - using the combination of the previous CRC value and the new one - - [..] or - - (+) compute the 7, 8, 16 or 32-bit CRC value of an 8, 16 or 32-bit data buffer - independently of the previous CRC value. - -@endverbatim - * @{ - */ - -/** - * @brief Compute the 7, 8, 16 or 32-bit CRC value of an 8, 16 or 32-bit data buffer - * starting with the previously computed CRC as initialization value. - * @param hcrc: CRC handle - * @param pBuffer: pointer to the input data buffer, exact input data format is - * provided by hcrc->InputDataFormat. - * @param BufferLength: input data buffer length (number of bytes if pBuffer - * type is * uint8_t, number of half-words if pBuffer type is * uint16_t, - * number of words if pBuffer type is * uint32_t). - * @note By default, the API expects a uint32_t pointer as input buffer parameter. - * Input buffer pointers with other types simply need to be cast in uint32_t - * and the API will internally adjust its input data processing based on the - * handle field hcrc->InputDataFormat. - * @retval uint32_t CRC (returned value LSBs for CRC shorter than 32 bits) - */ -uint32_t HAL_CRC_Accumulate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength) -{ - uint32_t index = 0; /* CRC input data buffer index */ - uint32_t temp = 0; /* CRC output (read from hcrc->Instance->DR register) */ - - /* Process locked */ - __HAL_LOCK(hcrc); - - /* Change CRC peripheral state */ - hcrc->State = HAL_CRC_STATE_BUSY; - - switch (hcrc->InputDataFormat) - { - case CRC_INPUTDATA_FORMAT_WORDS: - /* Enter Data to the CRC calculator */ - for(index = 0; index < BufferLength; index++) - { - hcrc->Instance->DR = pBuffer[index]; - } - temp = hcrc->Instance->DR; - break; - - case CRC_INPUTDATA_FORMAT_BYTES: - temp = CRC_Handle_8(hcrc, (uint8_t*)pBuffer, BufferLength); - break; - - case CRC_INPUTDATA_FORMAT_HALFWORDS: - temp = CRC_Handle_16(hcrc, (uint16_t*)pBuffer, BufferLength); - break; - - default: - break; - } - - /* Change CRC peripheral state */ - hcrc->State = HAL_CRC_STATE_READY; - - /* Process unlocked */ - __HAL_UNLOCK(hcrc); - - /* Return the CRC computed value */ - return temp; -} - - -/** - * @brief Compute the 7, 8, 16 or 32-bit CRC value of an 8, 16 or 32-bit data buffer - * starting with hcrc->Instance->INIT as initialization value. - * @param hcrc: CRC handle - * @param pBuffer: pointer to the input data buffer, exact input data format is - * provided by hcrc->InputDataFormat. - * @param BufferLength: input data buffer length (number of bytes if pBuffer - * type is * uint8_t, number of half-words if pBuffer type is * uint16_t, - * number of words if pBuffer type is * uint32_t). - * @note By default, the API expects a uint32_t pointer as input buffer parameter. - * Input buffer pointers with other types simply need to be cast in uint32_t - * and the API will internally adjust its input data processing based on the - * handle field hcrc->InputDataFormat. - * @retval uint32_t CRC (returned value LSBs for CRC shorter than 32 bits) - */ -uint32_t HAL_CRC_Calculate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength) -{ - uint32_t index = 0; /* CRC input data buffer index */ - uint32_t temp = 0; /* CRC output (read from hcrc->Instance->DR register) */ - - /* Process locked */ - __HAL_LOCK(hcrc); - - /* Change CRC peripheral state */ - hcrc->State = HAL_CRC_STATE_BUSY; - - /* Reset CRC Calculation Unit (hcrc->Instance->INIT is - * written in hcrc->Instance->DR) */ - __HAL_CRC_DR_RESET(hcrc); - - switch (hcrc->InputDataFormat) - { - case CRC_INPUTDATA_FORMAT_WORDS: - /* Enter 32-bit input data to the CRC calculator */ - for(index = 0; index < BufferLength; index++) - { - hcrc->Instance->DR = pBuffer[index]; - } - temp = hcrc->Instance->DR; - break; - - case CRC_INPUTDATA_FORMAT_BYTES: - /* Specific 8-bit input data handling */ - temp = CRC_Handle_8(hcrc, (uint8_t*)pBuffer, BufferLength); - break; - - case CRC_INPUTDATA_FORMAT_HALFWORDS: - /* Specific 16-bit input data handling */ - temp = CRC_Handle_16(hcrc, (uint16_t*)pBuffer, BufferLength); - break; - - default: - break; - } - - /* Change CRC peripheral state */ - hcrc->State = HAL_CRC_STATE_READY; - - /* Process unlocked */ - __HAL_UNLOCK(hcrc); - - /* Return the CRC computed value */ - return temp; -} - -/** - * @} - */ - -/** @defgroup CRC_Exported_Functions_Group3 Peripheral State functions - * @brief Peripheral State functions. - * -@verbatim - =============================================================================== - ##### Peripheral State functions ##### - =============================================================================== - [..] - This subsection permits to get in run-time the status of the peripheral. - -@endverbatim - * @{ - */ - -/** - * @brief Return the CRC handle state. - * @param hcrc: CRC handle - * @retval HAL state - */ -HAL_CRC_StateTypeDef HAL_CRC_GetState(CRC_HandleTypeDef *hcrc) -{ - /* Return CRC handle state */ - return hcrc->State; -} - -/** - * @} - */ - -/** - * @} - */ - -/** @defgroup CRC_Private_Functions CRC Private Functions - * @{ - */ - -/** - * @brief Enter 8-bit input data to the CRC calculator. - * Specific data handling to optimize processing time. - * @param hcrc: CRC handle - * @param pBuffer: pointer to the input data buffer - * @param BufferLength: input data buffer length - * @retval uint32_t CRC (returned value LSBs for CRC shorter than 32 bits) - */ -static uint32_t CRC_Handle_8(CRC_HandleTypeDef *hcrc, uint8_t pBuffer[], uint32_t BufferLength) -{ - uint32_t i = 0; /* input data buffer index */ - - /* Processing time optimization: 4 bytes are entered in a row with a single word write, - * last bytes must be carefully fed to the CRC calculator to ensure a correct type - * handling by the IP */ - for(i = 0; i < (BufferLength/4); i++) - { - hcrc->Instance->DR = ((uint32_t)pBuffer[4*i]<<24) | ((uint32_t)pBuffer[4*i+1]<<16) | ((uint32_t)pBuffer[4*i+2]<<8) | (uint32_t)pBuffer[4*i+3]; - } - /* last bytes specific handling */ - if ((BufferLength%4) != 0) - { - if (BufferLength%4 == 1) - { - *(uint8_t volatile*) (&hcrc->Instance->DR) = pBuffer[4*i]; - } - if (BufferLength%4 == 2) - { - *(uint16_t volatile*) (&hcrc->Instance->DR) = ((uint32_t)pBuffer[4*i]<<8) | (uint32_t)pBuffer[4*i+1]; - } - if (BufferLength%4 == 3) - { - *(uint16_t volatile*) (&hcrc->Instance->DR) = ((uint32_t)pBuffer[4*i]<<8) | (uint32_t)pBuffer[4*i+1]; - *(uint8_t volatile*) (&hcrc->Instance->DR) = pBuffer[4*i+2]; - } - } - - /* Return the CRC computed value */ - return hcrc->Instance->DR; -} - - - -/** - * @brief Enter 16-bit input data to the CRC calculator. - * Specific data handling to optimize processing time. - * @param hcrc: CRC handle - * @param pBuffer: pointer to the input data buffer - * @param BufferLength: input data buffer length - * @retval uint32_t CRC (returned value LSBs for CRC shorter than 32 bits) - */ -static uint32_t CRC_Handle_16(CRC_HandleTypeDef *hcrc, uint16_t pBuffer[], uint32_t BufferLength) -{ - uint32_t i = 0; /* input data buffer index */ - - /* Processing time optimization: 2 HalfWords are entered in a row with a single word write, - * in case of odd length, last HalfWord must be carefully fed to the CRC calculator to ensure - * a correct type handling by the IP */ - for(i = 0; i < (BufferLength/2); i++) - { - hcrc->Instance->DR = ((uint32_t)pBuffer[2*i]<<16) | (uint32_t)pBuffer[2*i+1]; - } - if ((BufferLength%2) != 0) - { - *(uint16_t volatile*) (&hcrc->Instance->DR) = pBuffer[2*i]; - } - - /* Return the CRC computed value */ - return hcrc->Instance->DR; -} - -/** - * @} - */ - -#endif /* HAL_CRC_MODULE_ENABLED */ -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ -
--- a/Src/stm32l4xx_hal_crc_ex.c Thu Nov 12 20:49:49 2015 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,238 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_crc_ex.c - * @author MCD Application Team - * @version V1.1.0 - * @date 16-September-2015 - * @brief Extended CRC HAL module driver. - * This file provides firmware functions to manage the extended - * functionalities of the CRC peripheral. - * - @verbatim -================================================================================ - ##### How to use this driver ##### -================================================================================ - [..] - (+) Set user-defined generating polynomial thru HAL_CRCEx_Polynomial_Set() - (+) Configure Input or Output data inversion - - @endverbatim - ****************************************************************************** - * @attention - * - * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @defgroup CRCEx CRCEx - * @brief CRC Extended HAL module driver - * @{ - */ - -#ifdef HAL_CRC_MODULE_ENABLED - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -/* Private macro -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ -/* Exported functions --------------------------------------------------------*/ - -/** @defgroup CRCEx_Exported_Functions CRC Extended Exported Functions - * @{ - */ - -/** @defgroup CRCEx_Group1 Extended Initialization/de-initialization functions - * @brief Extended Initialization and Configuration functions. - * -@verbatim - =============================================================================== - ##### Extended configuration functions ##### - =============================================================================== - [..] This section provides functions allowing to: - (+) Configure the generating polynomial - (+) Configure the input data inversion - (+) Configure the output data inversion - -@endverbatim - * @{ - */ - - -/** - * @brief Initialize the CRC polynomial if different from default one. - * @param hcrc: CRC handle - * @param Pol: CRC generating polynomial (7, 8, 16 or 32-bit long). - * This parameter is written in normal representation, e.g. - * @arg for a polynomial of degree 7, X^7 + X^6 + X^5 + X^2 + 1 is written 0x65 - * @arg for a polynomial of degree 16, X^16 + X^12 + X^5 + 1 is written 0x1021 - * @param PolyLength: CRC polynomial length. - * This parameter can be one of the following values: - * @arg CRC_POLYLENGTH_7B: 7-bit long CRC (generating polynomial of degree 7) - * @arg CRC_POLYLENGTH_8B: 8-bit long CRC (generating polynomial of degree 8) - * @arg CRC_POLYLENGTH_16B: 16-bit long CRC (generating polynomial of degree 16) - * @arg CRC_POLYLENGTH_32B: 32-bit long CRC (generating polynomial of degree 32) - * @retval HAL status - */ -HAL_StatusTypeDef HAL_CRCEx_Polynomial_Set(CRC_HandleTypeDef *hcrc, uint32_t Pol, uint32_t PolyLength) -{ - uint32_t msb = 31; /* polynomial degree is 32 at most, so msb is initialized to max value */ - - /* Check the parameters */ - assert_param(IS_CRC_POL_LENGTH(PolyLength)); - - /* check polynomial definition vs polynomial size: - * polynomial length must be aligned with polynomial - * definition. HAL_ERROR is reported if Pol degree is - * larger than that indicated by PolyLength. - * Look for MSB position: msb will contain the degree of - * the second to the largest polynomial member. E.g., for - * X^7 + X^6 + X^5 + X^2 + 1, msb = 6. */ - while (((Pol & (1U << msb)) == 0) && (msb-- > 0)) {} - - switch (PolyLength) - { - case CRC_POLYLENGTH_7B: - if (msb >= HAL_CRC_LENGTH_7B) - { - return HAL_ERROR; - } - break; - case CRC_POLYLENGTH_8B: - if (msb >= HAL_CRC_LENGTH_8B) - { - return HAL_ERROR; - } - break; - case CRC_POLYLENGTH_16B: - if (msb >= HAL_CRC_LENGTH_16B) - { - return HAL_ERROR; - } - break; - case CRC_POLYLENGTH_32B: - /* no polynomial definition vs. polynomial length issue possible */ - break; - default: - break; - } - - /* set generating polynomial */ - WRITE_REG(hcrc->Instance->POL, Pol); - - /* set generating polynomial size */ - MODIFY_REG(hcrc->Instance->CR, CRC_CR_POLYSIZE, PolyLength); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Set the Reverse Input data mode. - * @param hcrc: CRC handle - * @param InputReverseMode: Input Data inversion mode. - * This parameter can be one of the following values: - * @arg CRC_INPUTDATA_NOINVERSION: no change in bit order (default value) - * @arg CRC_INPUTDATA_INVERSION_BYTE: Byte-wise bit reversal - * @arg CRC_INPUTDATA_INVERSION_HALFWORD: HalfWord-wise bit reversal - * @arg CRC_INPUTDATA_INVERSION_WORD: Word-wise bit reversal - * @retval HAL status - */ -HAL_StatusTypeDef HAL_CRCEx_Input_Data_Reverse(CRC_HandleTypeDef *hcrc, uint32_t InputReverseMode) -{ - /* Check the parameters */ - assert_param(IS_CRC_INPUTDATA_INVERSION_MODE(InputReverseMode)); - - /* Change CRC peripheral state */ - hcrc->State = HAL_CRC_STATE_BUSY; - - /* set input data inversion mode */ - MODIFY_REG(hcrc->Instance->CR, CRC_CR_REV_IN, InputReverseMode); - /* Change CRC peripheral state */ - hcrc->State = HAL_CRC_STATE_READY; - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Set the Reverse Output data mode. - * @param hcrc: CRC handle - * @param OutputReverseMode: Output Data inversion mode. - * This parameter can be one of the following values: - * @arg CRC_OUTPUTDATA_INVERSION_DISABLE: no CRC inversion (default value) - * @arg CRC_OUTPUTDATA_INVERSION_ENABLE: bit-level inversion (e.g. for a 8-bit CRC: 0xB5 becomes 0xAD) - * @retval HAL status - */ -HAL_StatusTypeDef HAL_CRCEx_Output_Data_Reverse(CRC_HandleTypeDef *hcrc, uint32_t OutputReverseMode) -{ - /* Check the parameters */ - assert_param(IS_CRC_OUTPUTDATA_INVERSION_MODE(OutputReverseMode)); - - /* Change CRC peripheral state */ - hcrc->State = HAL_CRC_STATE_BUSY; - - /* set output data inversion mode */ - MODIFY_REG(hcrc->Instance->CR, CRC_CR_REV_OUT, OutputReverseMode); - - /* Change CRC peripheral state */ - hcrc->State = HAL_CRC_STATE_READY; - - /* Return function status */ - return HAL_OK; -} - - - - -/** - * @} - */ - - -/** - * @} - */ - - -#endif /* HAL_CRC_MODULE_ENABLED */ -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ -
--- a/Src/stm32l4xx_hal_cryp.c Thu Nov 12 20:49:49 2015 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,1363 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_cryp.c - * @author MCD Application Team - * @version V1.1.0 - * @date 16-September-2015 - * @brief CRYP HAL module driver. - * This file provides firmware functions to manage the following - * functionalities of the Cryptography (CRYP) peripheral: - * + Initialization and de-initialization functions - * + Processing functions using polling mode - * + Processing functions using interrupt mode - * + Processing functions using DMA mode - * + Peripheral State functions - * - @verbatim - ============================================================================== - ##### How to use this driver ##### - ============================================================================== - [..] - The CRYP HAL driver can be used as follows: - - (#)Initialize the CRYP low level resources by implementing the HAL_CRYP_MspInit(): - (++) Enable the CRYP interface clock using __HAL_RCC_AES_CLK_ENABLE() - (++) In case of using interrupts (e.g. HAL_CRYP_AES_IT()) - (+++) Configure the CRYP interrupt priority using HAL_NVIC_SetPriority() - (+++) Enable the AES IRQ handler using HAL_NVIC_EnableIRQ() - (+++) In AES IRQ handler, call HAL_CRYP_IRQHandler() - (++) In case of using DMA to control data transfer (e.g. HAL_CRYPEx_AES_DMA()) - (+++) Enable the DMA2 interface clock using - __HAL_RCC_DMA2_CLK_ENABLE() - (+++) Configure and enable two DMA channels one for managing data transfer from - memory to peripheral (input channel) and another channel for managing data - transfer from peripheral to memory (output channel) - (+++) Associate the initialized DMA handle to the CRYP DMA handle - using __HAL_LINKDMA() - (+++) Configure the priority and enable the NVIC for the transfer complete - interrupt on the two DMA channels. The output channel should have higher - priority than the input channel. - Resort to HAL_NVIC_SetPriority() and HAL_NVIC_EnableIRQ() - - (#)Initialize the CRYP HAL using HAL_CRYP_Init(). This function configures: - (++) The data type: 1-bit, 8-bit, 16-bit and 32-bit - (++) The AES operating mode (encryption, key derivation and/or decryption) - (++) The AES chaining mode (ECB, CBC, CTR, GCM, GMAC, CMAC) - (++) The encryption/decryption key if so required - (++) The initialization vector or nonce if applicable (not used in ECB mode). - - (#)Three processing (encryption/decryption) functions are available: - (++) Polling mode: encryption and decryption APIs are blocking functions - i.e. they process the data and wait till the processing is finished - (++) Interrupt mode: encryption and decryption APIs are not blocking functions - i.e. they process the data under interrupt - (++) DMA mode: encryption and decryption APIs are not blocking functions - i.e. the data transfer is ensured by DMA - - (#)Call HAL_CRYP_DeInit() to deinitialize the CRYP peripheral. - - @endverbatim - ****************************************************************************** - * @attention - * - * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal.h" - -#ifdef HAL_CRYP_MODULE_ENABLED - -#if defined(STM32L485xx) || defined(STM32L486xx) - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @defgroup CRYP CRYP - * @brief CRYP HAL module driver. - * @{ - */ - - - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -/* Private macro -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private functions --------------------------------------------------------*/ - -/** @defgroup CRYP_Private_Functions CRYP Private Functions - * @{ - */ - -static HAL_StatusTypeDef CRYP_SetInitVector(CRYP_HandleTypeDef *hcryp); -static HAL_StatusTypeDef CRYP_SetKey(CRYP_HandleTypeDef *hcryp); -static HAL_StatusTypeDef CRYP_AES_IT(CRYP_HandleTypeDef *hcryp); - -/** - * @} - */ - -/* Exported functions ---------------------------------------------------------*/ - -/** @defgroup CRYP_Exported_Functions CRYP Exported Functions - * @{ - */ - -/** @defgroup CRYP_Group1 Initialization and deinitialization functions - * @brief Initialization and Configuration functions. - * -@verbatim - ============================================================================== - ##### Initialization and deinitialization functions ##### - ============================================================================== - [..] This section provides functions allowing to: - (+) Initialize the CRYP according to the specified parameters - in the CRYP_InitTypeDef and creates the associated handle - (+) DeInitialize the CRYP peripheral - (+) Initialize the CRYP MSP (MCU Specific Package) - (+) DeInitialize the CRC MSP - -@endverbatim - * @{ - */ - -/** - * @brief Initialize the CRYP according to the specified - * parameters in the CRYP_InitTypeDef and initialize the associated handle. - * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains - * the configuration information for CRYP module - * @retval HAL status - */ -HAL_StatusTypeDef HAL_CRYP_Init(CRYP_HandleTypeDef *hcryp) -{ - /* Check the CRYP handle allocation */ - if(hcryp == NULL) - { - return HAL_ERROR; - } - - /* Check the instance */ - assert_param(IS_AES_ALL_INSTANCE(hcryp->Instance)); - - /* Check the parameters */ - assert_param(IS_CRYP_KEYSIZE(hcryp->Init.KeySize)); - assert_param(IS_CRYP_DATATYPE(hcryp->Init.DataType)); - assert_param(IS_CRYP_ALGOMODE(hcryp->Init.OperatingMode)); - /* ChainingMode parameter is irrelevant when mode is set to Key derivation */ - if (hcryp->Init.OperatingMode != CRYP_ALGOMODE_KEYDERIVATION) - { - assert_param(IS_CRYP_CHAINMODE(hcryp->Init.ChainingMode)); - } - assert_param(IS_CRYP_WRITE(hcryp->Init.KeyWriteFlag)); - - /*========================================================*/ - /* Check the proper operating/chaining modes combinations */ - /*========================================================*/ - /* Check the proper chaining when the operating mode is key derivation and decryption */ - if ((hcryp->Init.OperatingMode == CRYP_ALGOMODE_KEYDERIVATION_DECRYPT) &&\ - ((hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_CTR) \ - || (hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_GCM_GMAC) \ - || (hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_CMAC))) - { - return HAL_ERROR; - } - /* Check that key derivation is not set in CMAC mode */ - if ((hcryp->Init.OperatingMode == CRYP_ALGOMODE_KEYDERIVATION) - && (hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_CMAC)) - { - return HAL_ERROR; - } - - - /*================*/ - /* Initialization */ - /*================*/ - /* Initialization start */ - if(hcryp->State == HAL_CRYP_STATE_RESET) - { - /* Allocate lock resource and initialize it */ - hcryp->Lock = HAL_UNLOCKED; - - /* Init the low level hardware */ - HAL_CRYP_MspInit(hcryp); - } - - /* Change the CRYP state */ - hcryp->State = HAL_CRYP_STATE_BUSY; - - /* Disable the Peripheral */ - __HAL_CRYP_DISABLE(); - - /*=============================================================*/ - /* AES initialization common to all operating modes */ - /*=============================================================*/ - /* Set the Key size selection */ - MODIFY_REG(hcryp->Instance->CR, AES_CR_KEYSIZE, hcryp->Init.KeySize); - - /* Set the default CRYP phase when this parameter is not used. - Phase is updated below in case of GCM/GMAC/CMAC setting. */ - hcryp->Phase = HAL_CRYP_PHASE_NOT_USED; - - - - /*=============================================================*/ - /* Carry on the initialization based on the AES operating mode */ - /*=============================================================*/ - /* Key derivation */ - if (hcryp->Init.OperatingMode == CRYP_ALGOMODE_KEYDERIVATION) - { - MODIFY_REG(hcryp->Instance->CR, AES_CR_MODE, CRYP_ALGOMODE_KEYDERIVATION); - - /* Configure the Key registers */ - if (CRYP_SetKey(hcryp) != HAL_OK) - { - return HAL_ERROR; - } - } - else - /* Encryption / Decryption (with or without key derivation) / authentication */ - { - /* Set data type, operating and chaining modes. - In case of GCM or GMAC, data type is forced to 0b00 */ - if (hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_GCM_GMAC) - { - MODIFY_REG(hcryp->Instance->CR, AES_CR_DATATYPE|AES_CR_MODE|AES_CR_CHMOD, hcryp->Init.OperatingMode|hcryp->Init.ChainingMode); - } - else - { - MODIFY_REG(hcryp->Instance->CR, AES_CR_DATATYPE|AES_CR_MODE|AES_CR_CHMOD, hcryp->Init.DataType|hcryp->Init.OperatingMode|hcryp->Init.ChainingMode); - } - - - /* Specify the encryption/decryption phase in case of Galois counter mode (GCM), - Galois message authentication code (GMAC) or cipher message authentication code (CMAC) */ - if ((hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_GCM_GMAC) - || (hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_CMAC)) - { - MODIFY_REG(hcryp->Instance->CR, AES_CR_GCMPH, hcryp->Init.GCMCMACPhase); - hcryp->Phase = HAL_CRYP_PHASE_START; - } - - - /* Configure the Key registers if no need to bypass this step */ - if (hcryp->Init.KeyWriteFlag == CRYP_KEY_WRITE_ENABLE) - { - if (CRYP_SetKey(hcryp) != HAL_OK) - { - return HAL_ERROR; - } - } - - /* If applicable, configure the Initialization Vector */ - if (hcryp->Init.ChainingMode != CRYP_CHAINMODE_AES_ECB) - { - if (CRYP_SetInitVector(hcryp) != HAL_OK) - { - return HAL_ERROR; - } - } - } - - /* Reset CrypInCount and CrypOutCount */ - hcryp->CrypInCount = 0; - hcryp->CrypOutCount = 0; - - /* Reset ErrorCode field */ - hcryp->ErrorCode = HAL_CRYP_ERROR_NONE; - - /* Reset Mode suspension request */ - hcryp->SuspendRequest = HAL_CRYP_SUSPEND_NONE; - - /* Change the CRYP state */ - hcryp->State = HAL_CRYP_STATE_READY; - - /* Enable the Peripheral */ - __HAL_CRYP_ENABLE(); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief DeInitialize the CRYP peripheral. - * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains - * the configuration information for CRYP module - * @retval HAL status - */ -HAL_StatusTypeDef HAL_CRYP_DeInit(CRYP_HandleTypeDef *hcryp) -{ - /* Check the CRYP handle allocation */ - if(hcryp == NULL) - { - return HAL_ERROR; - } - - /* Change the CRYP state */ - hcryp->State = HAL_CRYP_STATE_BUSY; - - /* Set the default CRYP phase */ - hcryp->Phase = HAL_CRYP_PHASE_READY; - - /* Reset CrypInCount and CrypOutCount */ - hcryp->CrypInCount = 0; - hcryp->CrypOutCount = 0; - - /* Disable the CRYP Peripheral Clock */ - __HAL_CRYP_DISABLE(); - - /* DeInit the low level hardware: CLOCK, NVIC.*/ - HAL_CRYP_MspDeInit(hcryp); - - /* Change the CRYP state */ - hcryp->State = HAL_CRYP_STATE_RESET; - - /* Release Lock */ - __HAL_UNLOCK(hcryp); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Initialize the CRYP MSP. - * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains - * the configuration information for CRYP module - * @retval None - */ -__weak void HAL_CRYP_MspInit(CRYP_HandleTypeDef *hcryp) -{ - /* NOTE : This function should not be modified; when the callback is needed, - the HAL_CRYP_MspInit can be implemented in the user file - */ -} - -/** - * @brief DeInitialize CRYP MSP. - * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains - * the configuration information for CRYP module - * @retval None - */ -__weak void HAL_CRYP_MspDeInit(CRYP_HandleTypeDef *hcryp) -{ - /* NOTE : This function should not be modified; when the callback is needed, - the HAL_CRYP_MspDeInit can be implemented in the user file - */ -} - -/** - * @} - */ - -/** @defgroup CRYP_Group2 AES processing functions - * @brief Processing functions. - * -@verbatim - ============================================================================== - ##### AES processing functions ##### - ============================================================================== - [..] This section provides functions allowing to: - (+) Encrypt plaintext using AES algorithm in different chaining modes - (+) Decrypt cyphertext using AES algorithm in different chaining modes - [..] Three processing functions are available: - (+) Polling mode - (+) Interrupt mode - (+) DMA mode - -@endverbatim - * @{ - */ - - -/** - * @brief Encrypt pPlainData in AES ECB encryption mode. The cypher data are available in pCypherData. - * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains - * the configuration information for CRYP module - * @param pPlainData: Pointer to the plaintext buffer - * @param Size: Length of the plaintext buffer in bytes, must be a multiple of 16. - * @param pCypherData: Pointer to the cyphertext buffer - * @param Timeout: Specify Timeout value - * @note This API is provided only to maintain compatibility with legacy software. Users should directly - * resort to generic HAL_CRYPEx_AES() API instead (usage recommended). - * @retval HAL status - */ -HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout) -{ - /* Re-initialize AES IP with proper parameters */ - if (HAL_CRYP_DeInit(hcryp) != HAL_OK) - { - return HAL_ERROR; - } - hcryp->Init.OperatingMode = CRYP_ALGOMODE_ENCRYPT; - hcryp->Init.ChainingMode = CRYP_CHAINMODE_AES_ECB; - hcryp->Init.KeyWriteFlag = CRYP_KEY_WRITE_ENABLE; - if (HAL_CRYP_Init(hcryp) != HAL_OK) - { - return HAL_ERROR; - } - - return HAL_CRYPEx_AES(hcryp, pPlainData, Size, pCypherData, Timeout); -} - - -/** - * @brief Encrypt pPlainData in AES CBC encryption mode with key derivation. The cypher data are available in pCypherData. - * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains - * the configuration information for CRYP module - * @param pPlainData: Pointer to the plaintext buffer - * @param Size: Length of the plaintext buffer in bytes, must be a multiple of 16. - * @param pCypherData: Pointer to the cyphertext buffer - * @param Timeout: Specify Timeout value - * @note This API is provided only to maintain compatibility with legacy software. Users should directly - * resort to generic HAL_CRYPEx_AES() API instead (usage recommended). - * @retval HAL status - */ -HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout) -{ - /* Re-initialize AES IP with proper parameters */ - if (HAL_CRYP_DeInit(hcryp) != HAL_OK) - { - return HAL_ERROR; - } - hcryp->Init.OperatingMode = CRYP_ALGOMODE_ENCRYPT; - hcryp->Init.ChainingMode = CRYP_CHAINMODE_AES_CBC; - hcryp->Init.KeyWriteFlag = CRYP_KEY_WRITE_ENABLE; - if (HAL_CRYP_Init(hcryp) != HAL_OK) - { - return HAL_ERROR; - } - - return HAL_CRYPEx_AES(hcryp, pPlainData, Size, pCypherData, Timeout); -} - - -/** - * @brief Encrypt pPlainData in AES CTR encryption mode. The cypher data are available in pCypherData - * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains - * the configuration information for CRYP module - * @param pPlainData: Pointer to the plaintext buffer - * @param Size: Length of the plaintext buffer in bytes, must be a multiple of 16. - * @param pCypherData: Pointer to the cyphertext buffer - * @param Timeout: Specify Timeout value - * @note This API is provided only to maintain compatibility with legacy software. Users should directly - * resort to generic HAL_CRYPEx_AES() API instead (usage recommended). - * @retval HAL status - */ -HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout) -{ - /* Re-initialize AES IP with proper parameters */ - if (HAL_CRYP_DeInit(hcryp) != HAL_OK) - { - return HAL_ERROR; - } - hcryp->Init.OperatingMode = CRYP_ALGOMODE_ENCRYPT; - hcryp->Init.ChainingMode = CRYP_CHAINMODE_AES_CTR; - hcryp->Init.KeyWriteFlag = CRYP_KEY_WRITE_ENABLE; - if (HAL_CRYP_Init(hcryp) != HAL_OK) - { - return HAL_ERROR; - } - - return HAL_CRYPEx_AES(hcryp, pPlainData, Size, pCypherData, Timeout); -} - -/** - * @brief Decrypt pCypherData in AES ECB decryption mode with key derivation, - * the decyphered data are available in pPlainData. - * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains - * the configuration information for CRYP module - * @param pCypherData: Pointer to the cyphertext buffer - * @param Size: Length of the plaintext buffer in bytes, must be a multiple of 16. - * @param pPlainData: Pointer to the plaintext buffer - * @param Timeout: Specify Timeout value - * @note This API is provided only to maintain compatibility with legacy software. Users should directly - * resort to generic HAL_CRYPEx_AES() API instead (usage recommended). - * @retval HAL status - */ -HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout) -{ - /* Re-initialize AES IP with proper parameters */ - if (HAL_CRYP_DeInit(hcryp) != HAL_OK) - { - return HAL_ERROR; - } - hcryp->Init.OperatingMode = CRYP_ALGOMODE_KEYDERIVATION_DECRYPT; - hcryp->Init.ChainingMode = CRYP_CHAINMODE_AES_ECB; - hcryp->Init.KeyWriteFlag = CRYP_KEY_WRITE_ENABLE; - if (HAL_CRYP_Init(hcryp) != HAL_OK) - { - return HAL_ERROR; - } - - return HAL_CRYPEx_AES(hcryp, pCypherData, Size, pPlainData, Timeout); -} - -/** - * @brief Decrypt pCypherData in AES ECB decryption mode with key derivation, - * the decyphered data are available in pPlainData. - * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains - * the configuration information for CRYP module - * @param pCypherData: Pointer to the cyphertext buffer - * @param Size: Length of the plaintext buffer in bytes, must be a multiple of 16. - * @param pPlainData: Pointer to the plaintext buffer - * @param Timeout: Specify Timeout value - * @note This API is provided only to maintain compatibility with legacy software. Users should directly - * resort to generic HAL_CRYPEx_AES() API instead (usage recommended). - * @retval HAL status - */ -HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout) -{ - /* Re-initialize AES IP with proper parameters */ - if (HAL_CRYP_DeInit(hcryp) != HAL_OK) - { - return HAL_ERROR; - } - hcryp->Init.OperatingMode = CRYP_ALGOMODE_KEYDERIVATION_DECRYPT; - hcryp->Init.ChainingMode = CRYP_CHAINMODE_AES_CBC; - hcryp->Init.KeyWriteFlag = CRYP_KEY_WRITE_ENABLE; - if (HAL_CRYP_Init(hcryp) != HAL_OK) - { - return HAL_ERROR; - } - - return HAL_CRYPEx_AES(hcryp, pCypherData, Size, pPlainData, Timeout); -} - -/** - * @brief Decrypt pCypherData in AES CTR decryption mode, - * the decyphered data are available in pPlainData. - * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains - * the configuration information for CRYP module - * @param pCypherData: Pointer to the cyphertext buffer - * @param Size: Length of the plaintext buffer in bytes, must be a multiple of 16. - * @param pPlainData: Pointer to the plaintext buffer - * @param Timeout: Specify Timeout value - * @note This API is provided only to maintain compatibility with legacy software. Users should directly - * resort to generic HAL_CRYPEx_AES() API instead (usage recommended). - * @retval HAL status - */ -HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout) -{ - /* Re-initialize AES IP with proper parameters */ - if (HAL_CRYP_DeInit(hcryp) != HAL_OK) - { - return HAL_ERROR; - } - hcryp->Init.OperatingMode = CRYP_ALGOMODE_DECRYPT; - hcryp->Init.ChainingMode = CRYP_CHAINMODE_AES_CTR; - hcryp->Init.KeyWriteFlag = CRYP_KEY_WRITE_ENABLE; - if (HAL_CRYP_Init(hcryp) != HAL_OK) - { - return HAL_ERROR; - } - - return HAL_CRYPEx_AES(hcryp, pCypherData, Size, pPlainData, Timeout); -} - -/** - * @brief Encrypt pPlainData in AES ECB encryption mode using Interrupt, - * the cypher data are available in pCypherData. - * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains - * the configuration information for CRYP module - * @param pPlainData: Pointer to the plaintext buffer - * @param Size: Length of the plaintext buffer in bytes, must be a multiple of 16. - * @param pCypherData: Pointer to the cyphertext buffer - * @note This API is provided only to maintain compatibility with legacy software. Users should directly - * resort to generic HAL_CRYPEx_AES_IT() API instead (usage recommended). - * @retval HAL status - */ -HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData) -{ - /* Re-initialize AES IP with proper parameters */ - if (HAL_CRYP_DeInit(hcryp) != HAL_OK) - { - return HAL_ERROR; - } - hcryp->Init.OperatingMode = CRYP_ALGOMODE_ENCRYPT; - hcryp->Init.ChainingMode = CRYP_CHAINMODE_AES_ECB; - hcryp->Init.KeyWriteFlag = CRYP_KEY_WRITE_ENABLE; - if (HAL_CRYP_Init(hcryp) != HAL_OK) - { - return HAL_ERROR; - } - - return HAL_CRYPEx_AES_IT(hcryp, pPlainData, Size, pCypherData); -} - -/** - * @brief Encrypt pPlainData in AES CBC encryption mode using Interrupt, - * the cypher data are available in pCypherData. - * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains - * the configuration information for CRYP module - * @param pPlainData: Pointer to the plaintext buffer - * @param Size: Length of the plaintext buffer in bytes, must be a multiple of 16. - * @param pCypherData: Pointer to the cyphertext buffer - * @note This API is provided only to maintain compatibility with legacy software. Users should directly - * resort to generic HAL_CRYPEx_AES_IT() API instead (usage recommended). - * @retval HAL status - */ -HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData) -{ - /* Re-initialize AES IP with proper parameters */ - if (HAL_CRYP_DeInit(hcryp) != HAL_OK) - { - return HAL_ERROR; - } - hcryp->Init.OperatingMode = CRYP_ALGOMODE_ENCRYPT; - hcryp->Init.ChainingMode = CRYP_CHAINMODE_AES_CBC; - hcryp->Init.KeyWriteFlag = CRYP_KEY_WRITE_ENABLE; - if (HAL_CRYP_Init(hcryp) != HAL_OK) - { - return HAL_ERROR; - } - - return HAL_CRYPEx_AES_IT(hcryp, pPlainData, Size, pCypherData); -} - - -/** - * @brief Encrypt pPlainData in AES CTR encryption mode using Interrupt, - * the cypher data are available in pCypherData. - * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains - * the configuration information for CRYP module - * @param pPlainData: Pointer to the plaintext buffer - * @param Size: Length of the plaintext buffer in bytes, must be a multiple of 16. - * @param pCypherData: Pointer to the cyphertext buffer - * @note This API is provided only to maintain compatibility with legacy software. Users should directly - * resort to generic HAL_CRYPEx_AES_IT() API instead (usage recommended). - * @retval HAL status - */ -HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData) -{ - /* Re-initialize AES IP with proper parameters */ - if (HAL_CRYP_DeInit(hcryp) != HAL_OK) - { - return HAL_ERROR; - } - hcryp->Init.OperatingMode = CRYP_ALGOMODE_ENCRYPT; - hcryp->Init.ChainingMode = CRYP_CHAINMODE_AES_CTR; - hcryp->Init.KeyWriteFlag = CRYP_KEY_WRITE_ENABLE; - if (HAL_CRYP_Init(hcryp) != HAL_OK) - { - return HAL_ERROR; - } - - return HAL_CRYPEx_AES_IT(hcryp, pPlainData, Size, pCypherData); -} - -/** - * @brief Decrypt pCypherData in AES ECB decryption mode using Interrupt, - * the decyphered data are available in pPlainData. - * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains - * the configuration information for CRYP module - * @param pCypherData: Pointer to the cyphertext buffer - * @param Size: Length of the plaintext buffer in bytes, must be a multiple of 16. - * @param pPlainData: Pointer to the plaintext buffer. - * @note This API is provided only to maintain compatibility with legacy software. Users should directly - * resort to generic HAL_CRYPEx_AES_IT() API instead (usage recommended). - * @retval HAL status - */ -HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData) -{ - /* Re-initialize AES IP with proper parameters */ - if (HAL_CRYP_DeInit(hcryp) != HAL_OK) - { - return HAL_ERROR; - } - hcryp->Init.OperatingMode = CRYP_ALGOMODE_KEYDERIVATION_DECRYPT; - hcryp->Init.ChainingMode = CRYP_CHAINMODE_AES_ECB; - hcryp->Init.KeyWriteFlag = CRYP_KEY_WRITE_ENABLE; - if (HAL_CRYP_Init(hcryp) != HAL_OK) - { - return HAL_ERROR; - } - - return HAL_CRYPEx_AES_IT(hcryp, pCypherData, Size, pPlainData); -} - -/** - * @brief Decrypt pCypherData in AES CBC decryption mode using Interrupt, - * the decyphered data are available in pPlainData. - * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains - * the configuration information for CRYP module - * @param pCypherData: Pointer to the cyphertext buffer - * @param Size: Length of the plaintext buffer in bytes, must be a multiple of 16. - * @param pPlainData: Pointer to the plaintext buffer - * @note This API is provided only to maintain compatibility with legacy software. Users should directly - * resort to generic HAL_CRYPEx_AES_IT() API instead (usage recommended). - * @retval HAL status - */ -HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData) -{ - /* Re-initialize AES IP with proper parameters */ - if (HAL_CRYP_DeInit(hcryp) != HAL_OK) - { - return HAL_ERROR; - } - hcryp->Init.OperatingMode = CRYP_ALGOMODE_KEYDERIVATION_DECRYPT; - hcryp->Init.ChainingMode = CRYP_CHAINMODE_AES_CBC; - hcryp->Init.KeyWriteFlag = CRYP_KEY_WRITE_ENABLE; - if (HAL_CRYP_Init(hcryp) != HAL_OK) - { - return HAL_ERROR; - } - - return HAL_CRYPEx_AES_IT(hcryp, pCypherData, Size, pPlainData); -} - -/** - * @brief Decrypt pCypherData in AES CTR decryption mode using Interrupt, - * the decyphered data are available in pPlainData. - * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains - * the configuration information for CRYP module - * @param pCypherData: Pointer to the cyphertext buffer - * @param Size: Length of the plaintext buffer in bytes, must be a multiple of 16. - * @param pPlainData: Pointer to the plaintext buffer - * @note This API is provided only to maintain compatibility with legacy software. Users should directly - * resort to generic HAL_CRYPEx_AES_IT() API instead (usage recommended). - * @retval HAL status - */ -HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData) -{ - /* Re-initialize AES IP with proper parameters */ - if (HAL_CRYP_DeInit(hcryp) != HAL_OK) - { - return HAL_ERROR; - } - hcryp->Init.OperatingMode = CRYP_ALGOMODE_DECRYPT; - hcryp->Init.ChainingMode = CRYP_CHAINMODE_AES_CTR; - hcryp->Init.KeyWriteFlag = CRYP_KEY_WRITE_ENABLE; - if (HAL_CRYP_Init(hcryp) != HAL_OK) - { - return HAL_ERROR; - } - - return HAL_CRYPEx_AES_IT(hcryp, pCypherData, Size, pPlainData); -} - -/** - * @brief Encrypt pPlainData in AES ECB encryption mode using DMA, - * the cypher data are available in pCypherData. - * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains - * the configuration information for CRYP module - * @param pPlainData: Pointer to the plaintext buffer - * @param Size: Length of the plaintext buffer in bytes, must be a multiple of 16. - * @param pCypherData: Pointer to the cyphertext buffer - * @note This API is provided only to maintain compatibility with legacy software. Users should directly - * resort to generic HAL_CRYPEx_AES_DMA() API instead (usage recommended). - * @note pPlainData and pCypherData buffers must be 32-bit aligned to ensure a correct DMA transfer to and from the IP. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData) -{ - /* Re-initialize AES IP with proper parameters */ - if (HAL_CRYP_DeInit(hcryp) != HAL_OK) - { - return HAL_ERROR; - } - hcryp->Init.OperatingMode = CRYP_ALGOMODE_ENCRYPT; - hcryp->Init.ChainingMode = CRYP_CHAINMODE_AES_ECB; - hcryp->Init.KeyWriteFlag = CRYP_KEY_WRITE_ENABLE; - if (HAL_CRYP_Init(hcryp) != HAL_OK) - { - return HAL_ERROR; - } - - return HAL_CRYPEx_AES_DMA(hcryp, pPlainData, Size, pCypherData); -} - - - -/** - * @brief Encrypt pPlainData in AES CBC encryption mode using DMA, - * the cypher data are available in pCypherData. - * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains - * the configuration information for CRYP module - * @param pPlainData: Pointer to the plaintext buffer - * @param Size: Length of the plaintext buffer, must be a multiple of 16. - * @param pCypherData: Pointer to the cyphertext buffer - * @note This API is provided only to maintain compatibility with legacy software. Users should directly - * resort to generic HAL_CRYPEx_AES_DMA() API instead (usage recommended). - * @note pPlainData and pCypherData buffers must be 32-bit aligned to ensure a correct DMA transfer to and from the IP. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData) -{ - /* Re-initialize AES IP with proper parameters */ - if (HAL_CRYP_DeInit(hcryp) != HAL_OK) - { - return HAL_ERROR; - } - hcryp->Init.OperatingMode = CRYP_ALGOMODE_ENCRYPT; - hcryp->Init.ChainingMode = CRYP_CHAINMODE_AES_CBC; - hcryp->Init.KeyWriteFlag = CRYP_KEY_WRITE_ENABLE; - if (HAL_CRYP_Init(hcryp) != HAL_OK) - { - return HAL_ERROR; - } - - return HAL_CRYPEx_AES_DMA(hcryp, pPlainData, Size, pCypherData); -} - -/** - * @brief Encrypt pPlainData in AES CTR encryption mode using DMA, - * the cypher data are available in pCypherData. - * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains - * the configuration information for CRYP module - * @param pPlainData: Pointer to the plaintext buffer - * @param Size: Length of the plaintext buffer in bytes, must be a multiple of 16. - * @param pCypherData: Pointer to the cyphertext buffer. - * @note This API is provided only to maintain compatibility with legacy software. Users should directly - * resort to generic HAL_CRYPEx_AES_DMA() API instead (usage recommended). - * @note pPlainData and pCypherData buffers must be 32-bit aligned to ensure a correct DMA transfer to and from the IP. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData) -{ - /* Re-initialize AES IP with proper parameters */ - if (HAL_CRYP_DeInit(hcryp) != HAL_OK) - { - return HAL_ERROR; - } - hcryp->Init.OperatingMode = CRYP_ALGOMODE_ENCRYPT; - hcryp->Init.ChainingMode = CRYP_CHAINMODE_AES_CTR; - hcryp->Init.KeyWriteFlag = CRYP_KEY_WRITE_ENABLE; - if (HAL_CRYP_Init(hcryp) != HAL_OK) - { - return HAL_ERROR; - } - - return HAL_CRYPEx_AES_DMA(hcryp, pPlainData, Size, pCypherData); -} - -/** - * @brief Decrypt pCypherData in AES ECB decryption mode using DMA, - * the decyphered data are available in pPlainData. - * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains - * the configuration information for CRYP module - * @param pCypherData: Pointer to the cyphertext buffer - * @param Size: Length of the plaintext buffer in bytes, must be a multiple of 16. - * @param pPlainData: Pointer to the plaintext buffer - * @note This API is provided only to maintain compatibility with legacy software. Users should directly - * resort to generic HAL_CRYPEx_AES_DMA() API instead (usage recommended). - * @note pPlainData and pCypherData buffers must be 32-bit aligned to ensure a correct DMA transfer to and from the IP. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData) -{ - /* Re-initialize AES IP with proper parameters */ - if (HAL_CRYP_DeInit(hcryp) != HAL_OK) - { - return HAL_ERROR; - } - hcryp->Init.OperatingMode = CRYP_ALGOMODE_KEYDERIVATION_DECRYPT; - hcryp->Init.ChainingMode = CRYP_CHAINMODE_AES_ECB; - hcryp->Init.KeyWriteFlag = CRYP_KEY_WRITE_ENABLE; - if (HAL_CRYP_Init(hcryp) != HAL_OK) - { - return HAL_ERROR; - } - - return HAL_CRYPEx_AES_DMA(hcryp, pCypherData, Size, pPlainData); -} - -/** - * @brief Decrypt pCypherData in AES CBC decryption mode using DMA, - * the decyphered data are available in pPlainData. - * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains - * the configuration information for CRYP module - * @param pCypherData: Pointer to the cyphertext buffer - * @param Size: Length of the plaintext buffer in bytes, must be a multiple of 16. - * @param pPlainData: Pointer to the plaintext buffer - * @note This API is provided only to maintain compatibility with legacy software. Users should directly - * resort to generic HAL_CRYPEx_AES_DMA() API instead (usage recommended). - * @note pPlainData and pCypherData buffers must be 32-bit aligned to ensure a correct DMA transfer to and from the IP. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData) -{ - /* Re-initialize AES IP with proper parameters */ - if (HAL_CRYP_DeInit(hcryp) != HAL_OK) - { - return HAL_ERROR; - } - hcryp->Init.OperatingMode = CRYP_ALGOMODE_KEYDERIVATION_DECRYPT; - hcryp->Init.ChainingMode = CRYP_CHAINMODE_AES_CBC; - hcryp->Init.KeyWriteFlag = CRYP_KEY_WRITE_ENABLE; - if (HAL_CRYP_Init(hcryp) != HAL_OK) - { - return HAL_ERROR; - } - - return HAL_CRYPEx_AES_DMA(hcryp, pCypherData, Size, pPlainData); -} - -/** - * @brief Decrypt pCypherData in AES CTR decryption mode using DMA, - * the decyphered data are available in pPlainData. - * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains - * the configuration information for CRYP module - * @param pCypherData: Pointer to the cyphertext buffer - * @param Size: Length of the plaintext buffer in bytes, must be a multiple of 16. - * @param pPlainData: Pointer to the plaintext buffer - * @note This API is provided only to maintain compatibility with legacy software. Users should directly - * resort to generic HAL_CRYPEx_AES_DMA() API instead (usage recommended). - * @note pPlainData and pCypherData buffers must be 32-bit aligned to ensure a correct DMA transfer to and from the IP. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData) -{ - /* Re-initialize AES IP with proper parameters */ - if (HAL_CRYP_DeInit(hcryp) != HAL_OK) - { - return HAL_ERROR; - } - hcryp->Init.OperatingMode = CRYP_ALGOMODE_DECRYPT; - hcryp->Init.ChainingMode = CRYP_CHAINMODE_AES_CTR; - hcryp->Init.KeyWriteFlag = CRYP_KEY_WRITE_ENABLE; - if (HAL_CRYP_Init(hcryp) != HAL_OK) - { - return HAL_ERROR; - } - - return HAL_CRYPEx_AES_DMA(hcryp, pCypherData, Size, pPlainData); -} - - -/** - * @} - */ - -/** @defgroup CRYP_Group3 Callback functions - * @brief Callback functions. - * -@verbatim - ============================================================================== - ##### Callback functions ##### - ============================================================================== - [..] This section provides Interruption and DMA callback functions: - (+) DMA Input data transfer complete - (+) DMA Output data transfer complete - (+) DMA or Interrupt error - -@endverbatim - * @{ - */ - -/** - * @brief CRYP error callback. - * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains - * the configuration information for CRYP module - * @retval None - */ - __weak void HAL_CRYP_ErrorCallback(CRYP_HandleTypeDef *hcryp) -{ - /* NOTE : This function should not be modified; when the callback is needed, - the HAL_CRYP_ErrorCallback can be implemented in the user file - */ -} - -/** - * @brief Input DMA transfer complete callback. - * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains - * the configuration information for CRYP module - * @retval None - */ -__weak void HAL_CRYP_InCpltCallback(CRYP_HandleTypeDef *hcryp) -{ - /* NOTE : This function should not be modified; when the callback is needed, - the HAL_CRYP_InCpltCallback can be implemented in the user file - */ -} - -/** - * @brief Output DMA transfer complete callback. - * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains - * the configuration information for CRYP module - * @retval None - */ -__weak void HAL_CRYP_OutCpltCallback(CRYP_HandleTypeDef *hcryp) -{ - /* NOTE : This function should not be modified; when the callback is needed, - the HAL_CRYP_OutCpltCallback can be implemented in the user file - */ -} - -/** - * @} - */ - -/** @defgroup CRYP_Group4 CRYP IRQ handler - * @brief AES IRQ handler. - * -@verbatim - ============================================================================== - ##### AES IRQ handler management ##### - ============================================================================== -[..] This section provides AES IRQ handler function. - -@endverbatim - * @{ - */ - -/** - * @brief Handle AES interrupt request. - * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains - * the configuration information for CRYP module - * @retval None - */ -void HAL_CRYP_IRQHandler(CRYP_HandleTypeDef *hcryp) -{ - /* Check if error occurred */ - if (__HAL_CRYP_GET_IT_SOURCE(CRYP_IT_ERRIE) != RESET) - { - /* If Write Error occurred */ - if (__HAL_CRYP_GET_FLAG(CRYP_IT_WRERR) != RESET) - { - hcryp->ErrorCode |= HAL_CRYP_WRITE_ERROR; - hcryp->State = HAL_CRYP_STATE_ERROR; - } - /* If Read Error occurred */ - if (__HAL_CRYP_GET_FLAG(CRYP_IT_RDERR) != RESET) - { - hcryp->ErrorCode |= HAL_CRYP_READ_ERROR; - hcryp->State = HAL_CRYP_STATE_ERROR; - } - - /* If an error has been reported */ - if (hcryp->State == HAL_CRYP_STATE_ERROR) - { - /* Disable Error and Computation Complete Interrupts */ - __HAL_CRYP_DISABLE_IT(CRYP_IT_CCFIE|CRYP_IT_ERRIE); - /* Clear all Interrupt flags */ - __HAL_CRYP_CLEAR_FLAG(CRYP_ERR_CLEAR|CRYP_CCF_CLEAR); - - /* Process Unlocked */ - __HAL_UNLOCK(hcryp); - - HAL_CRYP_ErrorCallback(hcryp); - - return; - } - } - - /* Check if computation complete interrupt is enabled - and if the computation complete flag is raised */ - if((__HAL_CRYP_GET_FLAG(CRYP_IT_CCF) != RESET) && (__HAL_CRYP_GET_IT_SOURCE(CRYP_IT_CCFIE) != RESET)) - { - if ((hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_GCM_GMAC) - || (hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_CMAC)) - { - /* To ensure proper suspension requests management, CCF flag - is reset in CRYP_AES_Auth_IT() according to the current - phase under handling */ - CRYP_AES_Auth_IT(hcryp); - } - else - { - /* Clear Computation Complete Flag */ - __HAL_CRYP_CLEAR_FLAG(CRYP_CCF_CLEAR); - CRYP_AES_IT(hcryp); - } - } -} - -/** - * @} - */ - -/** @defgroup CRYP_Group5 Peripheral State functions - * @brief Peripheral State functions. - * -@verbatim - ============================================================================== - ##### Peripheral State functions ##### - ============================================================================== - [..] - This subsection permits to get in run-time the status of the peripheral. - -@endverbatim - * @{ - */ - -/** - * @brief Return the CRYP handle state. - * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains - * the configuration information for CRYP module - * @retval HAL state - */ -HAL_CRYP_STATETypeDef HAL_CRYP_GetState(CRYP_HandleTypeDef *hcryp) -{ - /* Return CRYP handle state */ - return hcryp->State; -} - -/** - * @brief Return the CRYP peripheral error. - * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains - * the configuration information for CRYP module - * @note The returned error is a bit-map combination of possible errors - * @retval Error bit-map - */ -uint32_t HAL_CRYP_GetError(CRYP_HandleTypeDef *hcryp) -{ - return hcryp->ErrorCode; -} - -/** - * @} - */ - -/** - * @} - */ - -/** @addtogroup CRYP_Private_Functions - * @{ - */ - - -/** - * @brief Write the Key in KeyRx registers. - * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains - * the configuration information for CRYP module - * @retval HAL status - */ -static HAL_StatusTypeDef CRYP_SetKey(CRYP_HandleTypeDef *hcryp) -{ - uint32_t keyaddr = 0x0; - - if ((uint32_t)(hcryp->Init.pKey == NULL)) - { - return HAL_ERROR; - } - - - keyaddr = (uint32_t)(hcryp->Init.pKey); - - if (hcryp->Init.KeySize == CRYP_KEYSIZE_256B) - { - hcryp->Instance->KEYR7 = __REV(*(uint32_t*)(keyaddr)); - keyaddr+=4; - hcryp->Instance->KEYR6 = __REV(*(uint32_t*)(keyaddr)); - keyaddr+=4; - hcryp->Instance->KEYR5 = __REV(*(uint32_t*)(keyaddr)); - keyaddr+=4; - hcryp->Instance->KEYR4 = __REV(*(uint32_t*)(keyaddr)); - keyaddr+=4; - } - - hcryp->Instance->KEYR3 = __REV(*(uint32_t*)(keyaddr)); - keyaddr+=4; - hcryp->Instance->KEYR2 = __REV(*(uint32_t*)(keyaddr)); - keyaddr+=4; - hcryp->Instance->KEYR1 = __REV(*(uint32_t*)(keyaddr)); - keyaddr+=4; - hcryp->Instance->KEYR0 = __REV(*(uint32_t*)(keyaddr)); - - return HAL_OK; -} - -/** - * @brief Write the InitVector/InitCounter in IVRx registers. - * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains - * the configuration information for CRYP module - * @retval HAL status - */ -static HAL_StatusTypeDef CRYP_SetInitVector(CRYP_HandleTypeDef *hcryp) -{ - uint32_t ivaddr = 0x0; - - if (hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_CMAC) - { - hcryp->Instance->IVR3 = 0; - hcryp->Instance->IVR2 = 0; - hcryp->Instance->IVR1 = 0; - hcryp->Instance->IVR0 = 0; - } - else - { - if (hcryp->Init.pInitVect == NULL) - { - return HAL_ERROR; - } - - ivaddr = (uint32_t)(hcryp->Init.pInitVect); - - hcryp->Instance->IVR3 = __REV(*(uint32_t*)(ivaddr)); - ivaddr+=4; - hcryp->Instance->IVR2 = __REV(*(uint32_t*)(ivaddr)); - ivaddr+=4; - hcryp->Instance->IVR1 = __REV(*(uint32_t*)(ivaddr)); - ivaddr+=4; - hcryp->Instance->IVR0 = __REV(*(uint32_t*)(ivaddr)); - } - return HAL_OK; -} - - - -/** - * @brief Handle CRYP block input/output data handling under interruption. - * @note The function is called under interruption only, once - * interruptions have been enabled by HAL_CRYPEx_AES_IT(). - * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains - * the configuration information for CRYP module. - * @retval HAL status - */ -static HAL_StatusTypeDef CRYP_AES_IT(CRYP_HandleTypeDef *hcryp) -{ - uint32_t inputaddr = 0; - uint32_t outputaddr = 0; - - if(hcryp->State == HAL_CRYP_STATE_BUSY) - { - if (hcryp->Init.OperatingMode != CRYP_ALGOMODE_KEYDERIVATION) - { - /* Get the output data address */ - outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr; - - /* Read the last available output block from the Data Output Register */ - *(uint32_t*)(outputaddr) = hcryp->Instance->DOUTR; - outputaddr+=4; - *(uint32_t*)(outputaddr) = hcryp->Instance->DOUTR; - outputaddr+=4; - *(uint32_t*)(outputaddr) = hcryp->Instance->DOUTR; - outputaddr+=4; - *(uint32_t*)(outputaddr) = hcryp->Instance->DOUTR; - hcryp->pCrypOutBuffPtr += 16; - hcryp->CrypOutCount -= 16; - - } - else - { - /* Read the derived key from the Key registers */ - if (hcryp->Init.KeySize == CRYP_KEYSIZE_256B) - { - *(uint32_t*)(outputaddr) = __REV(hcryp->Instance->KEYR7); - outputaddr+=4; - *(uint32_t*)(outputaddr) = __REV(hcryp->Instance->KEYR6); - outputaddr+=4; - *(uint32_t*)(outputaddr) = __REV(hcryp->Instance->KEYR5); - outputaddr+=4; - *(uint32_t*)(outputaddr) = __REV(hcryp->Instance->KEYR4); - outputaddr+=4; - } - - *(uint32_t*)(outputaddr) = __REV(hcryp->Instance->KEYR3); - outputaddr+=4; - *(uint32_t*)(outputaddr) = __REV(hcryp->Instance->KEYR2); - outputaddr+=4; - *(uint32_t*)(outputaddr) = __REV(hcryp->Instance->KEYR1); - outputaddr+=4; - *(uint32_t*)(outputaddr) = __REV(hcryp->Instance->KEYR0); - } - - /* In case of ciphering or deciphering, check if all output text has been retrieved; - In case of key derivation, stop right there */ - if ((hcryp->CrypOutCount == 0) || (hcryp->Init.OperatingMode == CRYP_ALGOMODE_KEYDERIVATION)) - { - /* Disable Computation Complete Flag and Errors Interrupts */ - __HAL_CRYP_DISABLE_IT(CRYP_IT_CCFIE|CRYP_IT_ERRIE); - /* Change the CRYP state */ - hcryp->State = HAL_CRYP_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hcryp); - - /* Call computation complete callback */ - HAL_CRYPEx_ComputationCpltCallback(hcryp); - - return HAL_OK; - } - /* If suspension flag has been raised, suspend processing */ - else if (hcryp->SuspendRequest == HAL_CRYP_SUSPEND) - { - /* reset ModeSuspend */ - hcryp->SuspendRequest = HAL_CRYP_SUSPEND_NONE; - - /* Disable Computation Complete Flag and Errors Interrupts */ - __HAL_CRYP_DISABLE_IT(CRYP_IT_CCFIE|CRYP_IT_ERRIE); - /* Change the CRYP state */ - hcryp->State = HAL_CRYP_STATE_SUSPENDED; - - /* Process Unlocked */ - __HAL_UNLOCK(hcryp); - - return HAL_OK; - } - else /* Process the rest of input data */ - { - /* Get the Intput data address */ - inputaddr = (uint32_t)hcryp->pCrypInBuffPtr; - - /* Increment/decrement instance pointer/counter */ - hcryp->pCrypInBuffPtr += 16; - hcryp->CrypInCount -= 16; - - /* Write the next input block in the Data Input register */ - hcryp->Instance->DINR = *(uint32_t*)(inputaddr); - inputaddr+=4; - hcryp->Instance->DINR = *(uint32_t*)(inputaddr); - inputaddr+=4; - hcryp->Instance->DINR = *(uint32_t*)(inputaddr); - inputaddr+=4; - hcryp->Instance->DINR = *(uint32_t*)(inputaddr); - - return HAL_OK; - } - } - else - { - return HAL_BUSY; - } -} - - - - -/** - * @} - */ - - - -/** - * @} - */ - -/** - * @} - */ - -#endif /* defined(STM32L485xx) || defined(STM32L486xx) */ - -#endif /* HAL_CRYP_MODULE_ENABLED */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ -
--- a/Src/stm32l4xx_hal_cryp_ex.c Thu Nov 12 20:49:49 2015 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,2331 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_cryp_ex.c - * @author MCD Application Team - * @version V1.1.0 - * @date 16-September-2015 - * @brief CRYPEx HAL module driver. - * This file provides firmware functions to manage the extended - * functionalities of the Cryptography (CRYP) peripheral. - * - ****************************************************************************** - * @attention - * - * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal.h" - -#ifdef HAL_CRYP_MODULE_ENABLED - -#if defined(STM32L485xx) || defined(STM32L486xx) - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @defgroup CRYPEx CRYPEx - * @brief CRYP Extended HAL module driver - * @{ - */ - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -/** @defgroup CRYPEx_Private_Constants CRYPEx Private Constants - * @{ - */ -#define CRYP_CCF_TIMEOUTVALUE 22000 /*!< CCF flag raising time-out value */ -#define CRYP_BUSY_TIMEOUTVALUE 22000 /*!< BUSY flag reset time-out value */ -/** - * @} - */ - -/* Private macro -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ -/** @defgroup CRYPEx_Private_Functions CRYPEx Private Functions - * @{ - */ -static HAL_StatusTypeDef CRYP_ProcessData(CRYP_HandleTypeDef *hcryp, uint8_t* Input, uint16_t Ilength, uint8_t* Output, uint32_t Timeout); -static HAL_StatusTypeDef CRYP_ReadKey(CRYP_HandleTypeDef *hcryp, uint8_t* Output, uint32_t Timeout); -static void CRYP_SetDMAConfig(CRYP_HandleTypeDef *hcryp, uint32_t inputaddr, uint16_t Size, uint32_t outputaddr); -static void CRYP_GCMCMAC_SetDMAConfig(CRYP_HandleTypeDef *hcryp, uint32_t inputaddr, uint16_t Size, uint32_t outputaddr); -static void CRYP_GCMCMAC_DMAInCplt(DMA_HandleTypeDef *hdma); -static void CRYP_GCMCMAC_DMAError(DMA_HandleTypeDef *hdma); -static void CRYP_GCMCMAC_DMAOutCplt(DMA_HandleTypeDef *hdma); -static HAL_StatusTypeDef CRYP_WaitOnCCFlag(CRYP_HandleTypeDef *hcryp, uint32_t Timeout); -static HAL_StatusTypeDef CRYP_WaitOnBusyFlagReset(CRYP_HandleTypeDef *hcryp, uint32_t Timeout); -static void CRYP_DMAInCplt(DMA_HandleTypeDef *hdma); -static void CRYP_DMAOutCplt(DMA_HandleTypeDef *hdma); -static void CRYP_DMAError(DMA_HandleTypeDef *hdma); -/** - * @} - */ - -/* Exported functions ---------------------------------------------------------*/ - -/** @defgroup CRYPEx_Exported_Functions CRYPEx Exported Functions - * @{ - */ - - -/** @defgroup CRYPEx_Exported_Functions_Group1 Extended callback function - * @brief Extended callback functions. - * -@verbatim - =============================================================================== - ##### Extended callback functions ##### - =============================================================================== - [..] This section provides callback function: - (+) Computation completed. - -@endverbatim - * @{ - */ - - -/** - * @brief Computation completed callbacks. - * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains - * the configuration information for CRYP module - * @retval None - */ -__weak void HAL_CRYPEx_ComputationCpltCallback(CRYP_HandleTypeDef *hcryp) -{ - /* NOTE : This function should not be modified; when the callback is needed, - the HAL_CRYP_ErrorCallback can be implemented in the user file - */ -} - -/** - * @} - */ - -/** @defgroup CRYPEx_Exported_Functions_Group2 AES extended processing functions - * @brief Extended processing functions. - * -@verbatim - ============================================================================== - ##### AES extended processing functions ##### - ============================================================================== - [..] This section provides functions allowing to: - (+) Encrypt plaintext or decrypt cipher text using AES algorithm in different chaining modes. - Functions are generic (handles ECB, CBC and CTR and all modes) and are only differentiated - based on the processing type. Three processing types are available: - (++) Polling mode - (++) Interrupt mode - (++) DMA mode - (+) Generate and authentication tag in addition to encrypt/decrypt a plain/cipher text using AES - algorithm in different chaining modes. - Functions are generic (handles GCM, GMAC and CMAC) and process only one phase so that steps - can be skipped if so required. Functions are only differentiated based on the processing type. - Three processing types are available: - (++) Polling mode - (++) Interrupt mode - (++) DMA mode - -@endverbatim - * @{ - */ - -/** - * @brief Carry out in polling mode the ciphering or deciphering operation according to - * hcryp->Init structure fields, all operating modes (encryption, key derivation and/or decryption) and - * chaining modes ECB, CBC and CTR are managed by this function in polling mode. - * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains - * the configuration information for CRYP module - * @param pInputData: Pointer to the plain text in case of encryption or cipher text in case of decryption - * or key derivation+decryption. - * Parameter is meaningless in case of key derivation. - * @param Size: Length of the input data buffer in bytes, must be a multiple of 16. - * Parameter is meaningless in case of key derivation. - * @param pOutputData: Pointer to the cipher text in case of encryption or plain text in case of - * decryption/key derivation+decryption, or pointer to the derivative keys in - * case of key derivation only. - * @param Timeout: Specify Timeout value - * @retval HAL status - */ -HAL_StatusTypeDef HAL_CRYPEx_AES(CRYP_HandleTypeDef *hcryp, uint8_t *pInputData, uint16_t Size, uint8_t *pOutputData, uint32_t Timeout) -{ - - if (hcryp->State == HAL_CRYP_STATE_READY) - { - /* Check parameters setting */ - if (hcryp->Init.OperatingMode == CRYP_ALGOMODE_KEYDERIVATION) - { - if (pOutputData == NULL) - { - return HAL_ERROR; - } - } - else - { - if ((pInputData == NULL) || (pOutputData == NULL) || (Size == 0)) - { - return HAL_ERROR; - } - } - - /* Process Locked */ - __HAL_LOCK(hcryp); - - /* Change the CRYP state */ - hcryp->State = HAL_CRYP_STATE_BUSY; - - /* Call CRYP_ReadKey() API if the operating mode is set to - key derivation, CRYP_ProcessData() otherwise */ - if (hcryp->Init.OperatingMode == CRYP_ALGOMODE_KEYDERIVATION) - { - if(CRYP_ReadKey(hcryp, pOutputData, Timeout) != HAL_OK) - { - return HAL_TIMEOUT; - } - } - else - { - if(CRYP_ProcessData(hcryp, pInputData, Size, pOutputData, Timeout) != HAL_OK) - { - return HAL_TIMEOUT; - } - } - - /* If the state has not been set to SUSPENDED, set it to - READY, otherwise keep it as it is */ - if (hcryp->State != HAL_CRYP_STATE_SUSPENDED) - { - hcryp->State = HAL_CRYP_STATE_READY; - } - - /* Process Unlocked */ - __HAL_UNLOCK(hcryp); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - - - -/** - * @brief Carry out in interrupt mode the ciphering or deciphering operation according to - * hcryp->Init structure fields, all operating modes (encryption, key derivation and/or decryption) and - * chaining modes ECB, CBC and CTR are managed by this function in interrupt mode. - * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains - * the configuration information for CRYP module - * @param pInputData: Pointer to the plain text in case of encryption or cipher text in case of decryption - * or key derivation+decryption. - * Parameter is meaningless in case of key derivation. - * @param Size: Length of the input data buffer in bytes, must be a multiple of 16. - * Parameter is meaningless in case of key derivation. - * @param pOutputData: Pointer to the cipher text in case of encryption or plain text in case of - * decryption/key derivation+decryption, or pointer to the derivative keys in - * case of key derivation only. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_CRYPEx_AES_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pInputData, uint16_t Size, uint8_t *pOutputData) -{ - uint32_t inputaddr = 0; - - if(hcryp->State == HAL_CRYP_STATE_READY) - { - /* Check parameters setting */ - if (hcryp->Init.OperatingMode == CRYP_ALGOMODE_KEYDERIVATION) - { - if (pOutputData == NULL) - { - return HAL_ERROR; - } - } - else - { - if ((pInputData == NULL) || (pOutputData == NULL) || (Size == 0)) - { - return HAL_ERROR; - } - } - /* Process Locked */ - __HAL_LOCK(hcryp); - - /* If operating mode is not limited to key derivation only, - get the buffers addresses and sizes */ - if (hcryp->Init.OperatingMode != CRYP_ALGOMODE_KEYDERIVATION) - { - - hcryp->CrypInCount = Size; - hcryp->pCrypInBuffPtr = pInputData; - hcryp->pCrypOutBuffPtr = pOutputData; - hcryp->CrypOutCount = Size; - } - - /* Change the CRYP state */ - hcryp->State = HAL_CRYP_STATE_BUSY; - - /* Process Unlocked */ - __HAL_UNLOCK(hcryp); - - /* Enable Computation Complete Flag and Error Interrupts */ - __HAL_CRYP_ENABLE_IT(CRYP_IT_CCFIE|CRYP_IT_ERRIE); - - - /* If operating mode is key derivation only, the input data have - already been entered during the initialization process. For - the other operating modes, they are fed to the CRYP hardware - block at this point. */ - if (hcryp->Init.OperatingMode != CRYP_ALGOMODE_KEYDERIVATION) - { - /* Initiate the processing under interrupt in entering - the first input data */ - inputaddr = (uint32_t)hcryp->pCrypInBuffPtr; - /* Increment/decrement instance pointer/counter */ - hcryp->pCrypInBuffPtr += 16; - hcryp->CrypInCount -= 16; - /* Write the first input block in the Data Input register */ - hcryp->Instance->DINR = *(uint32_t*)(inputaddr); - inputaddr+=4; - hcryp->Instance->DINR = *(uint32_t*)(inputaddr); - inputaddr+=4; - hcryp->Instance->DINR = *(uint32_t*)(inputaddr); - inputaddr+=4; - hcryp->Instance->DINR = *(uint32_t*)(inputaddr); - } - - /* Return function status */ - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - - - - - -/** - * @brief Carry out in DMA mode the ciphering or deciphering operation according to - * hcryp->Init structure fields. - * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains - * the configuration information for CRYP module - * @param pInputData: Pointer to the plain text in case of encryption or cipher text in case of decryption - * or key derivation+decryption. - * @param Size: Length of the input data buffer in bytes, must be a multiple of 16. - * @param pOutputData: Pointer to the cipher text in case of encryption or plain text in case of - * decryption/key derivation+decryption. - * @note Chaining modes ECB, CBC and CTR are managed by this function in DMA mode. - * @note Supported operating modes are encryption, decryption and key derivation with decryption. - * @note No DMA channel is provided for key derivation only and therefore, access to AES_KEYRx - * registers must be done by software. - * @note This API is not applicable to key derivation only; for such a mode, access to AES_KEYRx - * registers must be done by software thru HAL_CRYPEx_AES() or HAL_CRYPEx_AES_IT() APIs. - * @note pInputData and pOutputData buffers must be 32-bit aligned to ensure a correct DMA transfer to and from the IP. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_CRYPEx_AES_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pInputData, uint16_t Size, uint8_t *pOutputData) -{ - uint32_t inputaddr = 0; - uint32_t outputaddr = 0; - - if (hcryp->State == HAL_CRYP_STATE_READY) - { - /* Check parameters setting */ - if (hcryp->Init.OperatingMode == CRYP_ALGOMODE_KEYDERIVATION) - { - /* no DMA channel is provided for key derivation operating mode, - access to AES_KEYRx registers must be done by software */ - return HAL_ERROR; - } - else - { - if ((pInputData == NULL) || (pOutputData == NULL) || (Size == 0)) - { - return HAL_ERROR; - } - } - - - /* Process Locked */ - __HAL_LOCK(hcryp); - - inputaddr = (uint32_t)pInputData; - outputaddr = (uint32_t)pOutputData; - - /* Change the CRYP state */ - hcryp->State = HAL_CRYP_STATE_BUSY; - - /* Set the input and output addresses and start DMA transfer */ - CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr); - - /* Process Unlocked */ - __HAL_UNLOCK(hcryp); - - /* Return function status */ - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - - - - - - -/** - * @brief Carry out in polling mode the authentication tag generation as well as the ciphering or deciphering - * operation according to hcryp->Init structure fields. - * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains - * the configuration information for CRYP module - * @param pInputData: Pointer to payload data in GCM payload phase, - * Parameter is meaningless in case of GCM/GMAC init, header and final phases, - * Pointer to B0 blocks in CMAC header phase, - * Pointer to C block in CMAC final phase. - * @param Size: Length of the input payload data buffer in bytes, must be a multiple of 16, - * Parameter is meaningless in case of GCM/GMAC init and header phases, - * Length of B blocks (in bytes, must be a multiple of 16) in CMAC header phase, - * Length of C block (in bytes) in CMAC final phase. - * @param pOutputData: Pointer to plain or cipher text in GCM payload phase, - * pointer to authentication tag in GCM/GMAC and CMAC final phases. - * Parameter is meaningless in case of GCM/GMAC init and header phases - * and in case of CMAC header phase. - * @param Timeout: Specify Timeout value - * @note Supported operating modes are encryption and decryption, supported chaining modes are GCM, GMAC and CMAC. - * @note Phases are singly processed according to hcryp->Init.GCMCMACPhase so that steps in these specific chaining modes - * can be skipped by the user if so required. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_CRYPEx_AES_Auth(CRYP_HandleTypeDef *hcryp, uint8_t *pInputData, uint64_t Size, uint8_t *pOutputData, uint32_t Timeout) -{ - uint32_t index = 0; - uint32_t inputaddr = 0; - uint32_t outputaddr = 0; - uint32_t tagaddr = 0; - uint64_t headerlength = 0; - uint64_t inputlength = 0; - - if (hcryp->State == HAL_CRYP_STATE_READY) - { - /* input/output parameters check */ - if (hcryp->Init.GCMCMACPhase == CRYP_GCMCMAC_HEADER_PHASE) - { - if ((hcryp->Init.Header == NULL) || (hcryp->Init.HeaderSize == 0)) - { - return HAL_ERROR; - } - if (hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_CMAC) - { - /* In case of CMAC header phase resumption, we can have pInputData = NULL and Size = 0 */ - if (((pInputData != NULL) && (Size == 0)) || ((pInputData == NULL) && (Size != 0))) - { - return HAL_ERROR; - } - } - } - else if (hcryp->Init.GCMCMACPhase == CRYP_GCM_PAYLOAD_PHASE) - { - if ((pInputData == NULL) || (pOutputData == NULL) || (Size == 0)) - { - return HAL_ERROR; - } - } - else if (hcryp->Init.GCMCMACPhase == CRYP_GCMCMAC_FINAL_PHASE) - { - if (pOutputData == NULL) - { - return HAL_ERROR; - } - if ((hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_CMAC) && (pInputData == NULL)) - { - return HAL_ERROR; - } - } - - - /* Process Locked */ - __HAL_LOCK(hcryp); - - /* Change the CRYP state */ - hcryp->State = HAL_CRYP_STATE_BUSY; - - /*=====================*/ - /* GCM/GMAC init phase */ - /*=====================*/ - /* In case of init phase, the input data (Key and Initialization Vector) have - already been entered during the initialization process. Therefore, the - API just waits for the CCF flag to be set. */ - if (hcryp->Init.GCMCMACPhase == CRYP_GCM_INIT_PHASE) - { - /* just wait for hash computation */ - if(CRYP_WaitOnCCFlag(hcryp, Timeout) != HAL_OK) - { - hcryp->State = HAL_CRYP_STATE_READY; - __HAL_UNLOCK(hcryp); - return HAL_TIMEOUT; - } - - /* Clear CCF Flag */ - __HAL_CRYP_CLEAR_FLAG(CRYP_CCF_CLEAR); - /* Mark that the initialization phase is over */ - hcryp->Phase = HAL_CRYP_PHASE_INIT_OVER; - } - /*===============================*/ - /* GCM/GMAC or CMAC header phase */ - /*===============================*/ - else if (hcryp->Init.GCMCMACPhase == CRYP_GCMCMAC_HEADER_PHASE) - { - /* Set header phase; for GCM or GMAC, set data-byte at this point */ - if (hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_GCM_GMAC) - { - MODIFY_REG(hcryp->Instance->CR, AES_CR_GCMPH|AES_CR_DATATYPE, CRYP_GCMCMAC_HEADER_PHASE|hcryp->Init.DataType); - } - else - { - MODIFY_REG(hcryp->Instance->CR, AES_CR_GCMPH, CRYP_GCMCMAC_HEADER_PHASE); - } - - /* Enable the Peripheral */ - __HAL_CRYP_ENABLE(); - - /* in case of CMAC, enter B0 block in header phase, before the header itself. */ - /* If Size = 0 (possible case of resumption after CMAC header phase suspension), - skip these steps and go directly to header buffer feeding to the HW */ - if ((hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_CMAC) && (Size != 0)) - { - inputaddr = (uint32_t)pInputData; - - for(index=0; (index < Size); index += 16) - { - /* Write the Input block in the Data Input register */ - hcryp->Instance->DINR = *(uint32_t*)(inputaddr); - inputaddr+=4; - hcryp->Instance->DINR = *(uint32_t*)(inputaddr); - inputaddr+=4; - hcryp->Instance->DINR = *(uint32_t*)(inputaddr); - inputaddr+=4; - hcryp->Instance->DINR = *(uint32_t*)(inputaddr); - inputaddr+=4; - - if(CRYP_WaitOnCCFlag(hcryp, Timeout) != HAL_OK) - { - hcryp->State = HAL_CRYP_STATE_READY; - __HAL_UNLOCK(hcryp); - return HAL_TIMEOUT; - } - /* Clear CCF Flag */ - __HAL_CRYP_CLEAR_FLAG(CRYP_CCF_CLEAR); - - /* If the suspension flag has been raised and if the processing is not about - to end, suspend processing */ - if ((hcryp->SuspendRequest == HAL_CRYP_SUSPEND) && ((index+16) < Size)) - { - /* reset SuspendRequest */ - hcryp->SuspendRequest = HAL_CRYP_SUSPEND_NONE; - /* Change the CRYP state */ - hcryp->State = HAL_CRYP_STATE_SUSPENDED; - /* Mark that the header phase is over */ - hcryp->Phase = HAL_CRYP_PHASE_HEADER_SUSPENDED; - - /* Save current reading and writing locations of Input and Output buffers */ - hcryp->pCrypInBuffPtr = (uint8_t *)inputaddr; - /* Save the total number of bytes (B blocks + header) that remain to be - processed at this point */ - hcryp->CrypInCount = hcryp->Init.HeaderSize + Size - (index+16); - - /* Process Unlocked */ - __HAL_UNLOCK(hcryp); - - return HAL_OK; - } - } /* for(index=0; (index < Size); index += 16) */ - } - - /* Enter header */ - inputaddr = (uint32_t)hcryp->Init.Header; - for(index=0; (index < hcryp->Init.HeaderSize); index += 16) - { - /* Write the Input block in the Data Input register */ - hcryp->Instance->DINR = *(uint32_t*)(inputaddr); - inputaddr+=4; - hcryp->Instance->DINR = *(uint32_t*)(inputaddr); - inputaddr+=4; - hcryp->Instance->DINR = *(uint32_t*)(inputaddr); - inputaddr+=4; - hcryp->Instance->DINR = *(uint32_t*)(inputaddr); - inputaddr+=4; - - if(CRYP_WaitOnCCFlag(hcryp, Timeout) != HAL_OK) - { - hcryp->State = HAL_CRYP_STATE_READY; - __HAL_UNLOCK(hcryp); - return HAL_TIMEOUT; - } - /* Clear CCF Flag */ - __HAL_CRYP_CLEAR_FLAG(CRYP_CCF_CLEAR); - - /* If the suspension flag has been raised and if the processing is not about - to end, suspend processing */ - if ((hcryp->SuspendRequest == HAL_CRYP_SUSPEND) && ((index+16) < hcryp->Init.HeaderSize)) - { - /* reset SuspendRequest */ - hcryp->SuspendRequest = HAL_CRYP_SUSPEND_NONE; - /* Change the CRYP state */ - hcryp->State = HAL_CRYP_STATE_SUSPENDED; - /* Mark that the header phase is over */ - hcryp->Phase = HAL_CRYP_PHASE_HEADER_SUSPENDED; - - /* Save current reading and writing locations of Input and Output buffers */ - hcryp->pCrypInBuffPtr = (uint8_t *)inputaddr; - /* Save the total number of bytes that remain to be processed at this point */ - hcryp->CrypInCount = hcryp->Init.HeaderSize - (index+16); - - /* Process Unlocked */ - __HAL_UNLOCK(hcryp); - - return HAL_OK; - } - } - /* Mark that the header phase is over */ - hcryp->Phase = HAL_CRYP_PHASE_HEADER_OVER; - } - /*========================*/ - /* GCM/GMAC payload phase */ - /*========================*/ - else if (hcryp->Init.GCMCMACPhase == CRYP_GCM_PAYLOAD_PHASE) - { - - MODIFY_REG(hcryp->Instance->CR, AES_CR_GCMPH, CRYP_GCM_PAYLOAD_PHASE); - - /* if the header phase has been bypassed, AES must be enabled again */ - if (hcryp->Phase == HAL_CRYP_PHASE_INIT_OVER) - { - __HAL_CRYP_ENABLE(); - } - - inputaddr = (uint32_t)pInputData; - outputaddr = (uint32_t)pOutputData; - - /* Enter payload */ - for(index=0; (index < Size); index += 16) - { - /* Write the Input block in the Data Input register */ - hcryp->Instance->DINR = *(uint32_t*)(inputaddr); - inputaddr+=4; - hcryp->Instance->DINR = *(uint32_t*)(inputaddr); - inputaddr+=4; - hcryp->Instance->DINR = *(uint32_t*)(inputaddr); - inputaddr+=4; - hcryp->Instance->DINR = *(uint32_t*)(inputaddr); - inputaddr+=4; - - if(CRYP_WaitOnCCFlag(hcryp, Timeout) != HAL_OK) - { - hcryp->State = HAL_CRYP_STATE_READY; - __HAL_UNLOCK(hcryp); - return HAL_TIMEOUT; - } - - /* Clear CCF Flag */ - __HAL_CRYP_CLEAR_FLAG(CRYP_CCF_CLEAR); - - /* Retrieve output data: read the output block - from the Data Output Register */ - *(uint32_t*)(outputaddr) = hcryp->Instance->DOUTR; - outputaddr+=4; - *(uint32_t*)(outputaddr) = hcryp->Instance->DOUTR; - outputaddr+=4; - *(uint32_t*)(outputaddr) = hcryp->Instance->DOUTR; - outputaddr+=4; - *(uint32_t*)(outputaddr) = hcryp->Instance->DOUTR; - outputaddr+=4; - - /* If the suspension flag has been raised and if the processing is not about - to end, suspend processing */ - if ((hcryp->SuspendRequest == HAL_CRYP_SUSPEND) && ((index+16) < Size)) - { - if (hcryp->Init.OperatingMode == CRYP_ALGOMODE_ENCRYPT) - { - /* Ensure that Busy flag is reset */ - if(CRYP_WaitOnBusyFlagReset(hcryp, CRYP_BUSY_TIMEOUTVALUE) != HAL_OK) - { - hcryp->State = HAL_CRYP_STATE_READY; - __HAL_UNLOCK(hcryp); - return HAL_TIMEOUT; - } - } - /* reset SuspendRequest */ - hcryp->SuspendRequest = HAL_CRYP_SUSPEND_NONE; - /* Change the CRYP state */ - hcryp->State = HAL_CRYP_STATE_SUSPENDED; - /* Mark that the header phase is over */ - hcryp->Phase = HAL_CRYP_PHASE_HEADER_SUSPENDED; - - /* Save current reading and writing locations of Input and Output buffers */ - hcryp->pCrypOutBuffPtr = (uint8_t *)outputaddr; - hcryp->pCrypInBuffPtr = (uint8_t *)inputaddr; - /* Save the number of bytes that remain to be processed at this point */ - hcryp->CrypInCount = Size - (index+16); - - /* Process Unlocked */ - __HAL_UNLOCK(hcryp); - - return HAL_OK; - } - - } - /* Mark that the payload phase is over */ - hcryp->Phase = HAL_CRYP_PHASE_PAYLOAD_OVER; - } - /*==============================*/ - /* GCM/GMAC or CMAC final phase */ - /*==============================*/ - else if (hcryp->Init.GCMCMACPhase == CRYP_GCMCMAC_FINAL_PHASE) - { - tagaddr = (uint32_t)pOutputData; - - MODIFY_REG(hcryp->Instance->CR, AES_CR_GCMPH, CRYP_GCMCMAC_FINAL_PHASE); - - /* if the header and payload phases have been bypassed, AES must be enabled again */ - if (hcryp->Phase == HAL_CRYP_PHASE_INIT_OVER) - { - __HAL_CRYP_ENABLE(); - } - - if (hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_GCM_GMAC) - { - headerlength = hcryp->Init.HeaderSize * 8; /* Header length in bits */ - inputlength = Size * 8; /* input length in bits */ - - - if(hcryp->Init.DataType == CRYP_DATATYPE_1B) - { - hcryp->Instance->DINR = __RBIT((headerlength)>>32); - hcryp->Instance->DINR = __RBIT(headerlength); - hcryp->Instance->DINR = __RBIT((inputlength)>>32); - hcryp->Instance->DINR = __RBIT(inputlength); - } - else if(hcryp->Init.DataType == CRYP_DATATYPE_8B) - { - hcryp->Instance->DINR = __REV((headerlength)>>32); - hcryp->Instance->DINR = __REV(headerlength); - hcryp->Instance->DINR = __REV((inputlength)>>32); - hcryp->Instance->DINR = __REV(inputlength); - } - else if(hcryp->Init.DataType == CRYP_DATATYPE_16B) - { - hcryp->Instance->DINR = __ROR((headerlength)>>32, 16); - hcryp->Instance->DINR = __ROR(headerlength, 16); - hcryp->Instance->DINR = __ROR((inputlength)>>32, 16); - hcryp->Instance->DINR = __ROR(inputlength, 16); - } - else if(hcryp->Init.DataType == CRYP_DATATYPE_32B) - { - hcryp->Instance->DINR = (uint32_t)(headerlength>>32); - hcryp->Instance->DINR = (uint32_t)(headerlength); - hcryp->Instance->DINR = (uint32_t)(inputlength>>32); - hcryp->Instance->DINR = (uint32_t)(inputlength); - } - } - else if (hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_CMAC) - { - inputaddr = (uint32_t)pInputData; - /* Enter the last block made of a 128-bit value formatted - from the original B0 packet. */ - hcryp->Instance->DINR = *(uint32_t*)(inputaddr); - inputaddr+=4; - hcryp->Instance->DINR = *(uint32_t*)(inputaddr); - inputaddr+=4; - hcryp->Instance->DINR = *(uint32_t*)(inputaddr); - inputaddr+=4; - hcryp->Instance->DINR = *(uint32_t*)(inputaddr); - } - - - if(CRYP_WaitOnCCFlag(hcryp, Timeout) != HAL_OK) - { - hcryp->State = HAL_CRYP_STATE_READY; - __HAL_UNLOCK(hcryp); - return HAL_TIMEOUT; - } - - /* Read the Auth TAG in the Data Out register */ - *(uint32_t*)(tagaddr) = hcryp->Instance->DOUTR; - tagaddr+=4; - *(uint32_t*)(tagaddr) = hcryp->Instance->DOUTR; - tagaddr+=4; - *(uint32_t*)(tagaddr) = hcryp->Instance->DOUTR; - tagaddr+=4; - *(uint32_t*)(tagaddr) = hcryp->Instance->DOUTR; - - - /* Clear CCF Flag */ - __HAL_CRYP_CLEAR_FLAG(CRYP_CCF_CLEAR); - /* Mark that the final phase is over */ - hcryp->Phase = HAL_CRYP_PHASE_FINAL_OVER; - /* Disable the Peripheral */ - __HAL_CRYP_DISABLE(); - } - /*=================================================*/ - /* case incorrect hcryp->Init.GCMCMACPhase setting */ - /*=================================================*/ - else - { - hcryp->State = HAL_CRYP_STATE_ERROR; - __HAL_UNLOCK(hcryp); - return HAL_ERROR; - } - - /* Change the CRYP state */ - hcryp->State = HAL_CRYP_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hcryp); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - - - - -/** - * @brief Carry out in interrupt mode the authentication tag generation as well as the ciphering or deciphering - * operation according to hcryp->Init structure fields. - * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains - * the configuration information for CRYP module - * @param pInputData: Pointer to payload data in GCM payload phase, - * Parameter is meaningless in case of GCM/GMAC init, header and final phases, - * Pointer to B0 blocks in CMAC header phase, - * Pointer to C block in CMAC final phase. - * @param Size: Length of the input payload data buffer in bytes, must be a multiple of 16, - * Parameter is meaningless in case of GCM/GMAC init and header phases, - * Length of B blocks (in bytes, must be a multiple of 16) in CMAC header phase, - * Length of C block (in bytes) in CMAC final phase. - * @param pOutputData: Pointer to plain or cipher text in GCM payload phase, - * pointer to authentication tag in GCM/GMAC and CMAC final phases. - * Parameter is meaningless in case of GCM/GMAC init and header phases - * and in case of CMAC header phase. - * @note Supported operating modes are encryption and decryption, supported chaining modes are GCM, GMAC and CMAC. - * @note Phases are singly processed according to hcryp->Init.GCMCMACPhase so that steps in these specific chaining modes - * can be skipped by the user if so required. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_CRYPEx_AES_Auth_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pInputData, uint64_t Size, uint8_t *pOutputData) -{ - - uint32_t inputaddr = 0; - uint64_t headerlength = 0; - uint64_t inputlength = 0; - - - if (hcryp->State == HAL_CRYP_STATE_READY) - { - /* input/output parameters check */ - if (hcryp->Init.GCMCMACPhase == CRYP_GCMCMAC_HEADER_PHASE) - { - if ((hcryp->Init.Header == NULL) || (hcryp->Init.HeaderSize == 0)) - { - return HAL_ERROR; - } - if (hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_CMAC) - { - /* In case of CMAC header phase resumption, we can have pInputData = NULL and Size = 0 */ - if (((pInputData != NULL) && (Size == 0)) || ((pInputData == NULL) && (Size != 0))) - { - return HAL_ERROR; - } - } - } - else if (hcryp->Init.GCMCMACPhase == CRYP_GCM_PAYLOAD_PHASE) - { - if ((pInputData == NULL) || (pOutputData == NULL) || (Size == 0)) - { - return HAL_ERROR; - } - } - else if (hcryp->Init.GCMCMACPhase == CRYP_GCMCMAC_FINAL_PHASE) - { - if (pOutputData == NULL) - { - return HAL_ERROR; - } - if ((hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_CMAC) && (pInputData == NULL)) - { - return HAL_ERROR; - } - } - - - /* Process Locked */ - __HAL_LOCK(hcryp); - - /* Change the CRYP state */ - hcryp->State = HAL_CRYP_STATE_BUSY; - - /* Process Unlocked */ - __HAL_UNLOCK(hcryp); - - /* Enable Computation Complete Flag and Error Interrupts */ - __HAL_CRYP_ENABLE_IT(CRYP_IT_CCFIE|CRYP_IT_ERRIE); - - - - /*=====================*/ - /* GCM/GMAC init phase */ - /*=====================*/ - if (hcryp->Init.GCMCMACPhase == CRYP_GCM_INIT_PHASE) - { - /* In case of init phase, the input data (Key and Initialization Vector) have - already been entered during the initialization process. Therefore, the - software just waits for the CCF interrupt to be raised and which will - be handled by CRYP_AES_Auth_IT() API. */ - } - /*===============================*/ - /* GCM/GMAC or CMAC header phase */ - /*===============================*/ - else if (hcryp->Init.GCMCMACPhase == CRYP_GCMCMAC_HEADER_PHASE) - { - if (hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_CMAC) - { - /* In case of CMAC, B blocks are first entered, before the header. - Therefore, B blocks and the header are entered back-to-back - as if it was only one single block. - However, in case of resumption after suspension, if all the - B blocks have been entered (in that case, Size = 0), only the - remainder of the non-processed header bytes are entered. */ - if (Size != 0) - { - hcryp->CrypInCount = Size + hcryp->Init.HeaderSize; - hcryp->pCrypInBuffPtr = pInputData; - } - else - { - hcryp->CrypInCount = hcryp->Init.HeaderSize; - hcryp->pCrypInBuffPtr = hcryp->Init.Header; - } - } - else - { - /* Get the header addresses and sizes */ - hcryp->CrypInCount = hcryp->Init.HeaderSize; - hcryp->pCrypInBuffPtr = hcryp->Init.Header; - } - - inputaddr = (uint32_t)hcryp->pCrypInBuffPtr; - - /* Set header phase; for GCM or GMAC, set data-byte at this point */ - if (hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_GCM_GMAC) - { - MODIFY_REG(hcryp->Instance->CR, AES_CR_GCMPH|AES_CR_DATATYPE, CRYP_GCMCMAC_HEADER_PHASE|hcryp->Init.DataType); - } - else - { - MODIFY_REG(hcryp->Instance->CR, AES_CR_GCMPH, CRYP_GCMCMAC_HEADER_PHASE); - } - - /* Enable the Peripheral */ - __HAL_CRYP_ENABLE(); - - /* Increment/decrement instance pointer/counter */ - hcryp->pCrypInBuffPtr += 16; - hcryp->CrypInCount -= 16; - - - if (hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_CMAC) - { - if (hcryp->CrypInCount == hcryp->Init.HeaderSize) - { - /* All B blocks will have been entered after the next - four DINR writing, so point at header buffer for - the next iteration */ - hcryp->pCrypInBuffPtr = hcryp->Init.Header; - } - } - - /* Enter header first block to initiate the process - in the Data Input register */ - hcryp->Instance->DINR = *(uint32_t*)(inputaddr); - inputaddr+=4; - hcryp->Instance->DINR = *(uint32_t*)(inputaddr); - inputaddr+=4; - hcryp->Instance->DINR = *(uint32_t*)(inputaddr); - inputaddr+=4; - hcryp->Instance->DINR = *(uint32_t*)(inputaddr); - } - /*========================*/ - /* GCM/GMAC payload phase */ - /*========================*/ - else if (hcryp->Init.GCMCMACPhase == CRYP_GCM_PAYLOAD_PHASE) - { - /* Get the buffer addresses and sizes */ - hcryp->CrypInCount = Size; - hcryp->pCrypInBuffPtr = pInputData; - hcryp->pCrypOutBuffPtr = pOutputData; - hcryp->CrypOutCount = Size; - - inputaddr = (uint32_t)hcryp->pCrypInBuffPtr; - - MODIFY_REG(hcryp->Instance->CR, AES_CR_GCMPH, CRYP_GCM_PAYLOAD_PHASE); - - /* if the header phase has been bypassed, AES must be enabled again */ - if (hcryp->Phase == HAL_CRYP_PHASE_INIT_OVER) - { - __HAL_CRYP_ENABLE(); - } - - /* Increment/decrement instance pointer/counter */ - hcryp->pCrypInBuffPtr += 16; - hcryp->CrypInCount -= 16; - - /* Enter payload first block to initiate the process - in the Data Input register */ - hcryp->Instance->DINR = *(uint32_t*)(inputaddr); - inputaddr+=4; - hcryp->Instance->DINR = *(uint32_t*)(inputaddr); - inputaddr+=4; - hcryp->Instance->DINR = *(uint32_t*)(inputaddr); - inputaddr+=4; - hcryp->Instance->DINR = *(uint32_t*)(inputaddr); - } - /*==============================*/ - /* GCM/GMAC or CMAC final phase */ - /*==============================*/ - else if (hcryp->Init.GCMCMACPhase == CRYP_GCMCMAC_FINAL_PHASE) - { - hcryp->pCrypOutBuffPtr = pOutputData; - - MODIFY_REG(hcryp->Instance->CR, AES_CR_GCMPH, CRYP_GCMCMAC_FINAL_PHASE); - - /* if the header and payload phases have been bypassed, AES must be enabled again */ - if (hcryp->Phase == HAL_CRYP_PHASE_INIT_OVER) - { - __HAL_CRYP_ENABLE(); - } - - if (hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_GCM_GMAC) - { - headerlength = hcryp->Init.HeaderSize * 8; /* Header length in bits */ - inputlength = Size * 8; /* input length in bits */ - /* Write the number of bits in the header on 64 bits followed by the number - of bits in the payload on 64 bits as well */ - if(hcryp->Init.DataType == CRYP_DATATYPE_1B) - { - hcryp->Instance->DINR = __RBIT((headerlength)>>32); - hcryp->Instance->DINR = __RBIT(headerlength); - hcryp->Instance->DINR = __RBIT((inputlength)>>32); - hcryp->Instance->DINR = __RBIT(inputlength); - } - else if(hcryp->Init.DataType == CRYP_DATATYPE_8B) - { - hcryp->Instance->DINR = __REV((headerlength)>>32); - hcryp->Instance->DINR = __REV(headerlength); - hcryp->Instance->DINR = __REV((inputlength)>>32); - hcryp->Instance->DINR = __REV(inputlength); - } - else if(hcryp->Init.DataType == CRYP_DATATYPE_16B) - { - hcryp->Instance->DINR = __ROR((headerlength)>>32, 16); - hcryp->Instance->DINR = __ROR(headerlength, 16); - hcryp->Instance->DINR = __ROR((inputlength)>>32, 16); - hcryp->Instance->DINR = __ROR(inputlength, 16); - } - else if(hcryp->Init.DataType == CRYP_DATATYPE_32B) - { - hcryp->Instance->DINR = (uint32_t)(headerlength>>32); - hcryp->Instance->DINR = (uint32_t)(headerlength); - hcryp->Instance->DINR = (uint32_t)(inputlength>>32); - hcryp->Instance->DINR = (uint32_t)(inputlength); - } - } - else if (hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_CMAC) - { - inputaddr = (uint32_t)pInputData; - /* Enter the last block made of a 128-bit value formatted - from the original B0 packet. */ - hcryp->Instance->DINR = *(uint32_t*)(inputaddr); - inputaddr+=4; - hcryp->Instance->DINR = *(uint32_t*)(inputaddr); - inputaddr+=4; - hcryp->Instance->DINR = *(uint32_t*)(inputaddr); - inputaddr+=4; - hcryp->Instance->DINR = *(uint32_t*)(inputaddr); - inputaddr+=4; - } - } - /*=================================================*/ - /* case incorrect hcryp->Init.GCMCMACPhase setting */ - /*=================================================*/ - else - { - hcryp->State = HAL_CRYP_STATE_ERROR; - return HAL_ERROR; - } - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - - - - -/** - * @brief Carry out in DMA mode the authentication tag generation as well as the ciphering or deciphering - * operation according to hcryp->Init structure fields. - * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains - * the configuration information for CRYP module - * @param pInputData: Pointer to payload data in GCM payload phase, - * Parameter is meaningless in case of GCM/GMAC init, header and final phases, - * Pointer to B0 blocks in CMAC header phase, - * Pointer to C block in CMAC final phase. - * @param Size: Length of the input payload data buffer in bytes, must be a multiple of 16, - * Parameter is meaningless in case of GCM/GMAC init and header phases, - * Length of B blocks (in bytes, must be a multiple of 16) in CMAC header phase, - * Length of C block (in bytes) in CMAC final phase. - * @param pOutputData: Pointer to plain or cipher text in GCM payload phase, - * pointer to authentication tag in GCM/GMAC and CMAC final phases. - * Parameter is meaningless in case of GCM/GMAC init and header phases - * and in case of CMAC header phase. - * @note Supported operating modes are encryption and decryption, supported chaining modes are GCM, GMAC and CMAC. - * @note Phases are singly processed according to hcryp->Init.GCMCMACPhase so that steps in these specific chaining modes - * can be skipped by the user if so required. - * @note pInputData and pOutputData buffers must be 32-bit aligned to ensure a correct DMA transfer to and from the IP. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_CRYPEx_AES_Auth_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pInputData, uint64_t Size, uint8_t *pOutputData) -{ - uint32_t inputaddr = 0; - uint32_t outputaddr = 0; - uint32_t tagaddr = 0; - uint64_t headerlength = 0; - uint64_t inputlength = 0; - - - if (hcryp->State == HAL_CRYP_STATE_READY) - { - /* input/output parameters check */ - if (hcryp->Init.GCMCMACPhase == CRYP_GCMCMAC_HEADER_PHASE) - { - if ((hcryp->Init.Header == NULL) || (hcryp->Init.HeaderSize == 0)) - { - return HAL_ERROR; - } - if (hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_CMAC) - { - if ((pInputData == NULL) || (Size == 0)) - { - return HAL_ERROR; - } - } - } - else if (hcryp->Init.GCMCMACPhase == CRYP_GCM_PAYLOAD_PHASE) - { - if ((pInputData == NULL) || (pOutputData == NULL) || (Size == 0)) - { - return HAL_ERROR; - } - } - else if (hcryp->Init.GCMCMACPhase == CRYP_GCMCMAC_FINAL_PHASE) - { - if (pOutputData == NULL) - { - return HAL_ERROR; - } - if ((hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_CMAC) && (pInputData == NULL)) - { - return HAL_ERROR; - } - } - - - /* Process Locked */ - __HAL_LOCK(hcryp); - - /* Change the CRYP state */ - hcryp->State = HAL_CRYP_STATE_BUSY; - - /*=====================*/ - /* GCM/GMAC init phase */ - /*=====================*/ - /* In case of init phase, the input data (Key and Initialization Vector) have - already been entered during the initialization process. No DMA transfer is - required at that point therefore, the software just waits for the CCF flag - to be raised. */ - if (hcryp->Init.GCMCMACPhase == CRYP_GCM_INIT_PHASE) - { - /* just wait for hash computation */ - if(CRYP_WaitOnCCFlag(hcryp, CRYP_CCF_TIMEOUTVALUE) != HAL_OK) - { - hcryp->State = HAL_CRYP_STATE_READY; - __HAL_UNLOCK(hcryp); - return HAL_TIMEOUT; - } - - /* Clear CCF Flag */ - __HAL_CRYP_CLEAR_FLAG(CRYP_CCF_CLEAR); - /* Mark that the initialization phase is over */ - hcryp->Phase = HAL_CRYP_PHASE_INIT_OVER; - hcryp->State = HAL_CRYP_STATE_READY; - } - /*===============================*/ - /* GCM/GMAC or CMAC header phase */ - /*===============================*/ - else if (hcryp->Init.GCMCMACPhase == CRYP_GCMCMAC_HEADER_PHASE) - { - /* Set header phase; for GCM or GMAC, set data-byte at this point */ - if (hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_GCM_GMAC) - { - MODIFY_REG(hcryp->Instance->CR, AES_CR_GCMPH|AES_CR_DATATYPE, CRYP_GCMCMAC_HEADER_PHASE|hcryp->Init.DataType); - } - else - { - MODIFY_REG(hcryp->Instance->CR, AES_CR_GCMPH, CRYP_GCMCMAC_HEADER_PHASE); - } - - /* enter first B0 block in polling mode (no DMA transfer for B0) */ - if (hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_CMAC) - { - /* Enable the CRYP peripheral */ - __HAL_CRYP_ENABLE(); - - inputaddr = (uint32_t)pInputData; - hcryp->Instance->DINR = *(uint32_t*)(inputaddr); - inputaddr+=4; - hcryp->Instance->DINR = *(uint32_t*)(inputaddr); - inputaddr+=4; - hcryp->Instance->DINR = *(uint32_t*)(inputaddr); - inputaddr+=4; - hcryp->Instance->DINR = *(uint32_t*)(inputaddr); - - if(CRYP_WaitOnCCFlag(hcryp, CRYP_CCF_TIMEOUTVALUE) != HAL_OK) - { - hcryp->State = HAL_CRYP_STATE_READY; - __HAL_UNLOCK(hcryp); - return HAL_TIMEOUT; - } - /* Clear CCF Flag */ - __HAL_CRYP_CLEAR_FLAG(CRYP_CCF_CLEAR); - } - - - inputaddr = (uint32_t)hcryp->Init.Header; - /* Set the input address and start DMA transfer */ - CRYP_GCMCMAC_SetDMAConfig(hcryp, inputaddr, hcryp->Init.HeaderSize, 0); - } - /*========================*/ - /* GCM/GMAC payload phase */ - /*========================*/ - else if (hcryp->Init.GCMCMACPhase == CRYP_GCM_PAYLOAD_PHASE) - { - MODIFY_REG(hcryp->Instance->CR, AES_CR_GCMPH, CRYP_GCM_PAYLOAD_PHASE); - - inputaddr = (uint32_t)pInputData; - outputaddr = (uint32_t)pOutputData; - /* Set the input and output addresses and start DMA transfer */ - CRYP_GCMCMAC_SetDMAConfig(hcryp, inputaddr, Size, outputaddr); - } - /*==============================*/ - /* GCM/GMAC or CMAC final phase */ - /*==============================*/ - else if (hcryp->Init.GCMCMACPhase == CRYP_GCMCMAC_FINAL_PHASE) - { - tagaddr = (uint32_t)pOutputData; - - MODIFY_REG(hcryp->Instance->CR, AES_CR_GCMPH, CRYP_GCMCMAC_FINAL_PHASE); - - /* if the header and payload phases have been bypassed, AES must be enabled again */ - if (hcryp->Phase == HAL_CRYP_PHASE_INIT_OVER) - { - __HAL_CRYP_ENABLE(); - } - - if (hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_GCM_GMAC) - { - headerlength = hcryp->Init.HeaderSize * 8; /* Header length in bits */ - inputlength = Size * 8; /* input length in bits */ - /* Write the number of bits in the header on 64 bits followed by the number - of bits in the payload on 64 bits as well */ - if(hcryp->Init.DataType == CRYP_DATATYPE_1B) - { - hcryp->Instance->DINR = __RBIT((headerlength)>>32); - hcryp->Instance->DINR = __RBIT(headerlength); - hcryp->Instance->DINR = __RBIT((inputlength)>>32); - hcryp->Instance->DINR = __RBIT(inputlength); - } - else if(hcryp->Init.DataType == CRYP_DATATYPE_8B) - { - hcryp->Instance->DINR = __REV((headerlength)>>32); - hcryp->Instance->DINR = __REV(headerlength); - hcryp->Instance->DINR = __REV((inputlength)>>32); - hcryp->Instance->DINR = __REV(inputlength); - } - else if(hcryp->Init.DataType == CRYP_DATATYPE_16B) - { - hcryp->Instance->DINR = __ROR((headerlength)>>32, 16); - hcryp->Instance->DINR = __ROR(headerlength, 16); - hcryp->Instance->DINR = __ROR((inputlength)>>32, 16); - hcryp->Instance->DINR = __ROR(inputlength, 16); - } - else if(hcryp->Init.DataType == CRYP_DATATYPE_32B) - { - hcryp->Instance->DINR = (uint32_t)(headerlength>>32); - hcryp->Instance->DINR = (uint32_t)(headerlength); - hcryp->Instance->DINR = (uint32_t)(inputlength>>32); - hcryp->Instance->DINR = (uint32_t)(inputlength); - } - } - else if (hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_CMAC) - { - __HAL_CRYP_CLEAR_FLAG(CRYP_CCF_CLEAR); - - inputaddr = (uint32_t)pInputData; - /* Enter the last block made of a 128-bit value formatted - from the original B0 packet. */ - hcryp->Instance->DINR = *(uint32_t*)(inputaddr); - inputaddr+=4; - hcryp->Instance->DINR = *(uint32_t*)(inputaddr); - inputaddr+=4; - hcryp->Instance->DINR = *(uint32_t*)(inputaddr); - inputaddr+=4; - hcryp->Instance->DINR = *(uint32_t*)(inputaddr); - inputaddr+=4; - } - - /* No DMA transfer is required at that point therefore, the software - just waits for the CCF flag to be raised. */ - if(CRYP_WaitOnCCFlag(hcryp, CRYP_CCF_TIMEOUTVALUE) != HAL_OK) - { - hcryp->State = HAL_CRYP_STATE_READY; - __HAL_UNLOCK(hcryp); - return HAL_TIMEOUT; - } - /* Clear CCF Flag */ - __HAL_CRYP_CLEAR_FLAG(CRYP_CCF_CLEAR); - /* Read the Auth TAG in the IN FIFO */ - *(uint32_t*)(tagaddr) = hcryp->Instance->DOUTR; - tagaddr+=4; - *(uint32_t*)(tagaddr) = hcryp->Instance->DOUTR; - tagaddr+=4; - *(uint32_t*)(tagaddr) = hcryp->Instance->DOUTR; - tagaddr+=4; - *(uint32_t*)(tagaddr) = hcryp->Instance->DOUTR; - - /* Mark that the final phase is over */ - hcryp->Phase = HAL_CRYP_PHASE_FINAL_OVER; - hcryp->State = HAL_CRYP_STATE_READY; - /* Disable the Peripheral */ - __HAL_CRYP_DISABLE(); - } - /*=================================================*/ - /* case incorrect hcryp->Init.GCMCMACPhase setting */ - /*=================================================*/ - else - { - hcryp->State = HAL_CRYP_STATE_ERROR; - __HAL_UNLOCK(hcryp); - return HAL_ERROR; - } - - /* Process Unlocked */ - __HAL_UNLOCK(hcryp); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @} - */ - -/** @defgroup CRYPEx_Exported_Functions_Group3 AES suspension/resumption functions - * @brief Extended processing functions. - * -@verbatim - ============================================================================== - ##### AES extended suspension and resumption functions ##### - ============================================================================== - [..] This section provides functions allowing to: - (+) save in memory the Initialization Vector, the Key registers, the Control register or - the Suspend registers when a process is suspended by a higher priority message - (+) write back in CRYP hardware block the saved values listed above when the suspended - lower priority message processing is resumed. - -@endverbatim - * @{ - */ - - -/** - * @brief In case of message processing suspension, read the Initialization Vector. - * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains - * the configuration information for CRYP module. - * @param Output: Pointer to the buffer containing the saved Initialization Vector. - * @note This value has to be stored for reuse by writing the AES_IVRx registers - * as soon as the interrupted processing has to be resumed. - * Applicable to all chaining modes. - * @note AES must be disabled when reading or resetting the IV values. - * @retval None - */ -void HAL_CRYPEx_Read_IVRegisters(CRYP_HandleTypeDef *hcryp, uint8_t* Output) -{ - uint32_t outputaddr = (uint32_t)Output; - - *(uint32_t*)(outputaddr) = __REV(hcryp->Instance->IVR3); - outputaddr+=4; - *(uint32_t*)(outputaddr) = __REV(hcryp->Instance->IVR2); - outputaddr+=4; - *(uint32_t*)(outputaddr) = __REV(hcryp->Instance->IVR1); - outputaddr+=4; - *(uint32_t*)(outputaddr) = __REV(hcryp->Instance->IVR0); -} - -/** - * @brief In case of message processing resumption, rewrite the Initialization - * Vector in the AES_IVRx registers. - * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains - * the configuration information for CRYP module. - * @param Input: Pointer to the buffer containing the saved Initialization Vector to - * write back in the CRYP hardware block. - * @note Applicable to all chaining modes. - * @note AES must be disabled when reading or resetting the IV values. - * @retval None - */ -void HAL_CRYPEx_Write_IVRegisters(CRYP_HandleTypeDef *hcryp, uint8_t* Input) -{ - uint32_t ivaddr = (uint32_t)Input; - - hcryp->Instance->IVR3 = __REV(*(uint32_t*)(ivaddr)); - ivaddr+=4; - hcryp->Instance->IVR2 = __REV(*(uint32_t*)(ivaddr)); - ivaddr+=4; - hcryp->Instance->IVR1 = __REV(*(uint32_t*)(ivaddr)); - ivaddr+=4; - hcryp->Instance->IVR0 = __REV(*(uint32_t*)(ivaddr)); -} - - -/** - * @brief In case of message GCM/GMAC or CMAC processing suspension, read the Suspend Registers. - * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains - * the configuration information for CRYP module. - * @param Output: Pointer to the buffer containing the saved Suspend Registers. - * @note These values have to be stored for reuse by writing back the AES_SUSPxR registers - * as soon as the interrupted processing has to be resumed. - * @retval None - */ -void HAL_CRYPEx_Read_SuspendRegisters(CRYP_HandleTypeDef *hcryp, uint8_t* Output) -{ - uint32_t outputaddr = (uint32_t)Output; - - *(uint32_t*)(outputaddr) = __REV(hcryp->Instance->SUSP7R); - outputaddr+=4; - *(uint32_t*)(outputaddr) = __REV(hcryp->Instance->SUSP6R); - outputaddr+=4; - *(uint32_t*)(outputaddr) = __REV(hcryp->Instance->SUSP5R); - outputaddr+=4; - *(uint32_t*)(outputaddr) = __REV(hcryp->Instance->SUSP4R); - outputaddr+=4; - *(uint32_t*)(outputaddr) = __REV(hcryp->Instance->SUSP3R); - outputaddr+=4; - *(uint32_t*)(outputaddr) = __REV(hcryp->Instance->SUSP2R); - outputaddr+=4; - *(uint32_t*)(outputaddr) = __REV(hcryp->Instance->SUSP1R); - outputaddr+=4; - *(uint32_t*)(outputaddr) = __REV(hcryp->Instance->SUSP0R); -} - -/** - * @brief In case of message GCM/GMAC or CMAC processing resumption, rewrite the Suspend - * Registers in the AES_SUSPxR registers. - * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains - * the configuration information for CRYP module. - * @param Input: Pointer to the buffer containing the saved suspend registers to - * write back in the CRYP hardware block. - * @retval None - */ -void HAL_CRYPEx_Write_SuspendRegisters(CRYP_HandleTypeDef *hcryp, uint8_t* Input) -{ - uint32_t ivaddr = (uint32_t)Input; - - hcryp->Instance->SUSP7R = __REV(*(uint32_t*)(ivaddr)); - ivaddr+=4; - hcryp->Instance->SUSP6R = __REV(*(uint32_t*)(ivaddr)); - ivaddr+=4; - hcryp->Instance->SUSP5R = __REV(*(uint32_t*)(ivaddr)); - ivaddr+=4; - hcryp->Instance->SUSP4R = __REV(*(uint32_t*)(ivaddr)); - ivaddr+=4; - hcryp->Instance->SUSP3R = __REV(*(uint32_t*)(ivaddr)); - ivaddr+=4; - hcryp->Instance->SUSP2R = __REV(*(uint32_t*)(ivaddr)); - ivaddr+=4; - hcryp->Instance->SUSP1R = __REV(*(uint32_t*)(ivaddr)); - ivaddr+=4; - hcryp->Instance->SUSP0R = __REV(*(uint32_t*)(ivaddr)); -} - - -/** - * @brief In case of message GCM/GMAC or CMAC processing suspension, read the Key Registers. - * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains - * the configuration information for CRYP module. - * @param Output: Pointer to the buffer containing the saved Key Registers. - * @param KeySize: Indicates the key size (128 or 256 bits). - * @note These values have to be stored for reuse by writing back the AES_KEYRx registers - * as soon as the interrupted processing has to be resumed. - * @retval None - */ -void HAL_CRYPEx_Read_KeyRegisters(CRYP_HandleTypeDef *hcryp, uint8_t* Output, uint32_t KeySize) -{ - uint32_t keyaddr = (uint32_t)Output; - - if (KeySize == CRYP_KEYSIZE_256B) - { - *(uint32_t*)(keyaddr) = __REV(hcryp->Instance->KEYR7); - keyaddr+=4; - *(uint32_t*)(keyaddr) = __REV(hcryp->Instance->KEYR6); - keyaddr+=4; - *(uint32_t*)(keyaddr) = __REV(hcryp->Instance->KEYR5); - keyaddr+=4; - *(uint32_t*)(keyaddr) = __REV(hcryp->Instance->KEYR4); - keyaddr+=4; - } - - *(uint32_t*)(keyaddr) = __REV(hcryp->Instance->KEYR3); - keyaddr+=4; - *(uint32_t*)(keyaddr) = __REV(hcryp->Instance->KEYR2); - keyaddr+=4; - *(uint32_t*)(keyaddr) = __REV(hcryp->Instance->KEYR1); - keyaddr+=4; - *(uint32_t*)(keyaddr) = __REV(hcryp->Instance->KEYR0); -} - -/** - * @brief In case of message GCM/GMAC or CMAC processing resumption, rewrite the Key - * Registers in the AES_KEYRx registers. - * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains - * the configuration information for CRYP module. - * @param Input: Pointer to the buffer containing the saved key registers to - * write back in the CRYP hardware block. - * @param KeySize: Indicates the key size (128 or 256 bits) - * @retval None - */ -void HAL_CRYPEx_Write_KeyRegisters(CRYP_HandleTypeDef *hcryp, uint8_t* Input, uint32_t KeySize) -{ - uint32_t keyaddr = (uint32_t)Input; - - if (KeySize == CRYP_KEYSIZE_256B) - { - hcryp->Instance->KEYR7 = __REV(*(uint32_t*)(keyaddr)); - keyaddr+=4; - hcryp->Instance->KEYR6 = __REV(*(uint32_t*)(keyaddr)); - keyaddr+=4; - hcryp->Instance->KEYR5 = __REV(*(uint32_t*)(keyaddr)); - keyaddr+=4; - hcryp->Instance->KEYR4 = __REV(*(uint32_t*)(keyaddr)); - keyaddr+=4; - } - - hcryp->Instance->KEYR3 = __REV(*(uint32_t*)(keyaddr)); - keyaddr+=4; - hcryp->Instance->KEYR2 = __REV(*(uint32_t*)(keyaddr)); - keyaddr+=4; - hcryp->Instance->KEYR1 = __REV(*(uint32_t*)(keyaddr)); - keyaddr+=4; - hcryp->Instance->KEYR0 = __REV(*(uint32_t*)(keyaddr)); -} - - -/** - * @brief In case of message GCM/GMAC or CMAC processing suspension, read the Control Register. - * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains - * the configuration information for CRYP module. - * @param Output: Pointer to the buffer containing the saved Control Register. - * @note This values has to be stored for reuse by writing back the AES_CR register - * as soon as the interrupted processing has to be resumed. - * @retval None - */ -void HAL_CRYPEx_Read_ControlRegister(CRYP_HandleTypeDef *hcryp, uint8_t* Output) -{ - *(uint32_t*)(Output) = hcryp->Instance->CR; -} - -/** - * @brief In case of message GCM/GMAC or CMAC processing resumption, rewrite the Control - * Registers in the AES_CR register. - * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains - * the configuration information for CRYP module. - * @param Input: Pointer to the buffer containing the saved Control Register to - * write back in the CRYP hardware block. - * @retval None - */ -void HAL_CRYPEx_Write_ControlRegister(CRYP_HandleTypeDef *hcryp, uint8_t* Input) -{ - hcryp->Instance->CR = *(uint32_t*)(Input); -} - -/** - * @brief Request CRYP processing suspension when in polling or interruption mode. - * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains - * the configuration information for CRYP module. - * @note Set the handle field SuspendRequest to the appropriate value so that - * the on-going CRYP processing is suspended as soon as the required - * conditions are met. - * @note It is advised not to suspend the CRYP processing when the DMA controller - * is managing the data transfer - * @retval None - */ -void HAL_CRYPEx_ProcessSuspend(CRYP_HandleTypeDef *hcryp) -{ - /* Set Handle Suspend Request field */ - hcryp->SuspendRequest = HAL_CRYP_SUSPEND; -} - -/** - * @} - */ - -/** - * @} - */ - -/** @addtogroup CRYPEx_Private_Functions - * @{ - */ - -/** - * @brief DMA CRYP Input Data process complete callback - * for GCM, GMAC or CMAC chainging modes. - * @note Specific setting of hcryp fields are required only - * in the case of header phase where no output data DMA - * transfer is on-going (only input data transfer is enabled - * in such a case). - * @param hdma: DMA handle. - * @retval None - */ -static void CRYP_GCMCMAC_DMAInCplt(DMA_HandleTypeDef *hdma) -{ - CRYP_HandleTypeDef* hcryp = (CRYP_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; - - /* Disable the DMA transfer for input request */ - CLEAR_BIT(hcryp->Instance->CR, AES_CR_DMAINEN); - - if (hcryp->Init.GCMCMACPhase == CRYP_GCMCMAC_HEADER_PHASE) - { - /* Clear CCF Flag */ - __HAL_CRYP_CLEAR_FLAG(CRYP_CCF_CLEAR); - /* Change the CRYP state */ - hcryp->State = HAL_CRYP_STATE_READY; - - /* Mark that the header phase is over */ - hcryp->Phase = HAL_CRYP_PHASE_HEADER_OVER; - } - - /* Call input data transfer complete callback */ - HAL_CRYP_InCpltCallback(hcryp); -} - -/** - * @brief DMA CRYP Output Data process complete callback - * for GCM, GMAC or CMAC chainging modes. - * @note This callback is called only in the payload phase. - * @param hdma: DMA handle. - * @retval None - */ -static void CRYP_GCMCMAC_DMAOutCplt(DMA_HandleTypeDef *hdma) -{ - CRYP_HandleTypeDef* hcryp = (CRYP_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; - - /* Disable the DMA transfer for output request */ - CLEAR_BIT(hcryp->Instance->CR, AES_CR_DMAOUTEN); - - /* Clear CCF Flag */ - __HAL_CRYP_CLEAR_FLAG(CRYP_CCF_CLEAR); - - /* Change the CRYP state to ready */ - hcryp->State = HAL_CRYP_STATE_READY; - /* Mark that the payload phase is over */ - hcryp->Phase = HAL_CRYP_PHASE_PAYLOAD_OVER; - - /* Call output data transfer complete callback */ - HAL_CRYP_OutCpltCallback(hcryp); -} - -/** - * @brief DMA CRYP communication error callback - * for GCM, GMAC or CMAC chainging modes. - * @param hdma: DMA handle - * @retval None - */ -static void CRYP_GCMCMAC_DMAError(DMA_HandleTypeDef *hdma) -{ - CRYP_HandleTypeDef* hcryp = (CRYP_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; - - hcryp->State= HAL_CRYP_STATE_ERROR; - hcryp->ErrorCode |= HAL_CRYP_DMA_ERROR; - HAL_CRYP_ErrorCallback(hcryp); - /* Clear Error Flag */ - __HAL_CRYP_CLEAR_FLAG(CRYP_ERR_CLEAR); -} - - - -/** - * @brief Handle CRYP block input/output data handling under interruption - * for GCM, GMAC or CMAC chainging modes. - * @note The function is called under interruption only, once - * interruptions have been enabled by HAL_CRYPEx_AES_Auth_IT(). - * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains - * the configuration information for CRYP module - * @retval HAL status - */ -HAL_StatusTypeDef CRYP_AES_Auth_IT(CRYP_HandleTypeDef *hcryp) -{ - uint32_t inputaddr = 0x0; - uint32_t outputaddr = 0x0; - - if(hcryp->State == HAL_CRYP_STATE_BUSY) - { - /*=====================*/ - /* GCM/GMAC init phase */ - /*=====================*/ - if (hcryp->Init.GCMCMACPhase == CRYP_GCM_INIT_PHASE) - { - /* Clear Computation Complete Flag */ - __HAL_CRYP_CLEAR_FLAG(CRYP_CCF_CLEAR); - /* Disable Computation Complete Flag and Errors Interrupts */ - __HAL_CRYP_DISABLE_IT(CRYP_IT_CCFIE|CRYP_IT_ERRIE); - /* Change the CRYP state */ - hcryp->State = HAL_CRYP_STATE_READY; - - /* Mark that the initialization phase is over */ - hcryp->Phase = HAL_CRYP_PHASE_INIT_OVER; - - /* Process Unlocked */ - __HAL_UNLOCK(hcryp); - /* Call computation complete callback */ - HAL_CRYPEx_ComputationCpltCallback(hcryp); - return HAL_OK; - } - /*===============================*/ - /* GCM/GMAC or CMAC header phase */ - /*===============================*/ - else if (hcryp->Init.GCMCMACPhase == CRYP_GCMCMAC_HEADER_PHASE) - { - /* Check if all input header data have been entered */ - if (hcryp->CrypInCount == 0) - { - /* Clear Computation Complete Flag */ - __HAL_CRYP_CLEAR_FLAG(CRYP_CCF_CLEAR); - /* Disable Computation Complete Flag and Errors Interrupts */ - __HAL_CRYP_DISABLE_IT(CRYP_IT_CCFIE|CRYP_IT_ERRIE); - /* Change the CRYP state */ - hcryp->State = HAL_CRYP_STATE_READY; - /* Mark that the header phase is over */ - hcryp->Phase = HAL_CRYP_PHASE_HEADER_OVER; - - /* Process Unlocked */ - __HAL_UNLOCK(hcryp); - - /* Call computation complete callback */ - HAL_CRYPEx_ComputationCpltCallback(hcryp); - - return HAL_OK; - } - /* If suspension flag has been raised, suspend processing */ - else if (hcryp->SuspendRequest == HAL_CRYP_SUSPEND) - { - /* Ensure that CCF flag is set */ - if(CRYP_WaitOnCCFlag(hcryp, CRYP_CCF_TIMEOUTVALUE) != HAL_OK) - { - hcryp->State = HAL_CRYP_STATE_READY; - __HAL_UNLOCK(hcryp); - return HAL_TIMEOUT; - } - /* Clear CCF Flag */ - __HAL_CRYP_CLEAR_FLAG(CRYP_CCF_CLEAR); - - /* reset SuspendRequest */ - hcryp->SuspendRequest = HAL_CRYP_SUSPEND_NONE; - /* Disable Computation Complete Flag and Errors Interrupts */ - __HAL_CRYP_DISABLE_IT(CRYP_IT_CCFIE|CRYP_IT_ERRIE); - /* Change the CRYP state */ - hcryp->State = HAL_CRYP_STATE_SUSPENDED; - /* Mark that the header phase is over */ - hcryp->Phase = HAL_CRYP_PHASE_HEADER_SUSPENDED; - - /* Process Unlocked */ - __HAL_UNLOCK(hcryp); - - return HAL_OK; - } - else /* Carry on feeding input data to the CRYP hardware block */ - { - /* Clear Computation Complete Flag */ - __HAL_CRYP_CLEAR_FLAG(CRYP_CCF_CLEAR); - /* Get the last Input data address */ - inputaddr = (uint32_t)hcryp->pCrypInBuffPtr; - - /* Increment/decrement instance pointer/counter */ - hcryp->pCrypInBuffPtr += 16; - hcryp->CrypInCount -= 16; - - if (hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_CMAC) - { - if (hcryp->CrypInCount == hcryp->Init.HeaderSize) - { - /* All B blocks will have been entered after the next - four DINR writing, so point at header buffer for - the next iteration */ - hcryp->pCrypInBuffPtr = hcryp->Init.Header; - } - } - - /* Write the Input block in the Data Input register */ - hcryp->Instance->DINR = *(uint32_t*)(inputaddr); - inputaddr+=4; - hcryp->Instance->DINR = *(uint32_t*)(inputaddr); - inputaddr+=4; - hcryp->Instance->DINR = *(uint32_t*)(inputaddr); - inputaddr+=4; - hcryp->Instance->DINR = *(uint32_t*)(inputaddr); - - return HAL_OK; - } - } - /*========================*/ - /* GCM/GMAC payload phase */ - /*========================*/ - else if (hcryp->Init.GCMCMACPhase == CRYP_GCM_PAYLOAD_PHASE) - { - /* Get the last output data address */ - outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr; - - /* Retrieve the last block available from the CRYP hardware block: - read the output block from the Data Output Register */ - *(uint32_t*)(outputaddr) = hcryp->Instance->DOUTR; - outputaddr+=4; - *(uint32_t*)(outputaddr) = hcryp->Instance->DOUTR; - outputaddr+=4; - *(uint32_t*)(outputaddr) = hcryp->Instance->DOUTR; - outputaddr+=4; - *(uint32_t*)(outputaddr) = hcryp->Instance->DOUTR; - - /* Increment/decrement instance pointer/counter */ - hcryp->pCrypOutBuffPtr += 16; - hcryp->CrypOutCount -= 16; - - /* Check if all output text has been retrieved */ - if (hcryp->CrypOutCount == 0) - { - /* Clear Computation Complete Flag */ - __HAL_CRYP_CLEAR_FLAG(CRYP_CCF_CLEAR); - /* Disable Computation Complete Flag and Errors Interrupts */ - __HAL_CRYP_DISABLE_IT(CRYP_IT_CCFIE|CRYP_IT_ERRIE); - /* Change the CRYP state */ - hcryp->State = HAL_CRYP_STATE_READY; - /* Mark that the payload phase is over */ - hcryp->Phase = HAL_CRYP_PHASE_PAYLOAD_OVER; - - /* Process Unlocked */ - __HAL_UNLOCK(hcryp); - - /* Call computation complete callback */ - HAL_CRYPEx_ComputationCpltCallback(hcryp); - - return HAL_OK; - } - /* If suspension flag has been raised, suspend processing */ - else if (hcryp->SuspendRequest == HAL_CRYP_SUSPEND) - { - if (hcryp->Init.OperatingMode == CRYP_ALGOMODE_ENCRYPT) - { - /* Ensure that Busy flag is reset */ - if(CRYP_WaitOnBusyFlagReset(hcryp, CRYP_BUSY_TIMEOUTVALUE) != HAL_OK) - { - hcryp->State = HAL_CRYP_STATE_READY; - __HAL_UNLOCK(hcryp); - return HAL_TIMEOUT; - } - } - /* Clear CCF Flag */ - __HAL_CRYP_CLEAR_FLAG(CRYP_CCF_CLEAR); - - /* reset SuspendRequest */ - hcryp->SuspendRequest = HAL_CRYP_SUSPEND_NONE; - /* Disable Computation Complete Flag and Errors Interrupts */ - __HAL_CRYP_DISABLE_IT(CRYP_IT_CCFIE|CRYP_IT_ERRIE); - /* Change the CRYP state */ - hcryp->State = HAL_CRYP_STATE_SUSPENDED; - /* Mark that the header phase is over */ - hcryp->Phase = HAL_CRYP_PHASE_HEADER_SUSPENDED; - - /* Process Unlocked */ - __HAL_UNLOCK(hcryp); - - return HAL_OK; - } - else /* Output data are still expected, carry on feeding the CRYP - hardware block with input data */ - { - /* Clear Computation Complete Flag */ - __HAL_CRYP_CLEAR_FLAG(CRYP_CCF_CLEAR); - /* Get the last Input data address */ - inputaddr = (uint32_t)hcryp->pCrypInBuffPtr; - - /* Increment/decrement instance pointer/counter */ - hcryp->pCrypInBuffPtr += 16; - hcryp->CrypInCount -= 16; - - /* Write the Input block in the Data Input register */ - hcryp->Instance->DINR = *(uint32_t*)(inputaddr); - inputaddr+=4; - hcryp->Instance->DINR = *(uint32_t*)(inputaddr); - inputaddr+=4; - hcryp->Instance->DINR = *(uint32_t*)(inputaddr); - inputaddr+=4; - hcryp->Instance->DINR = *(uint32_t*)(inputaddr); - - return HAL_OK; - } - } - /*==============================*/ - /* GCM/GMAC or CMAC final phase */ - /*==============================*/ - else if (hcryp->Init.GCMCMACPhase == CRYP_GCMCMAC_FINAL_PHASE) - { - /* Clear Computation Complete Flag */ - __HAL_CRYP_CLEAR_FLAG(CRYP_CCF_CLEAR); - - /* Get the last output data address */ - outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr; - - /* Retrieve the last expected data from the CRYP hardware block: - read the output block from the Data Output Register */ - *(uint32_t*)(outputaddr) = hcryp->Instance->DOUTR; - outputaddr+=4; - *(uint32_t*)(outputaddr) = hcryp->Instance->DOUTR; - outputaddr+=4; - *(uint32_t*)(outputaddr) = hcryp->Instance->DOUTR; - outputaddr+=4; - *(uint32_t*)(outputaddr) = hcryp->Instance->DOUTR; - - /* Disable Computation Complete Flag and Errors Interrupts */ - __HAL_CRYP_DISABLE_IT(CRYP_IT_CCFIE|CRYP_IT_ERRIE); - /* Change the CRYP state */ - hcryp->State = HAL_CRYP_STATE_READY; - /* Mark that the header phase is over */ - hcryp->Phase = HAL_CRYP_PHASE_FINAL_OVER; - - /* Disable the Peripheral */ - __HAL_CRYP_DISABLE(); - /* Process Unlocked */ - __HAL_UNLOCK(hcryp); - - /* Call computation complete callback */ - HAL_CRYPEx_ComputationCpltCallback(hcryp); - - return HAL_OK; - } - else - { - /* Clear Computation Complete Flag */ - __HAL_CRYP_CLEAR_FLAG(CRYP_CCF_CLEAR); - hcryp->State = HAL_CRYP_STATE_ERROR; - __HAL_UNLOCK(hcryp); - return HAL_ERROR; - } - } - else - { - return HAL_BUSY; - } -} - - - -/** - * @brief Set the DMA configuration and start the DMA transfer - * for GCM, GMAC or CMAC chainging modes. - * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains - * the configuration information for CRYP module. - * @param inputaddr: Address of the Input buffer. - * @param Size: Size of the Input buffer un bytes, must be a multiple of 16. - * @param outputaddr: Address of the Output buffer, null pointer when no output DMA stream - * has to be configured. - * @retval None - */ -static void CRYP_GCMCMAC_SetDMAConfig(CRYP_HandleTypeDef *hcryp, uint32_t inputaddr, uint16_t Size, uint32_t outputaddr) -{ - - /* Set the input CRYP DMA transfer complete callback */ - hcryp->hdmain->XferCpltCallback = CRYP_GCMCMAC_DMAInCplt; - /* Set the DMA error callback */ - hcryp->hdmain->XferErrorCallback = CRYP_GCMCMAC_DMAError; - - if (outputaddr != 0) - { - /* Set the output CRYP DMA transfer complete callback */ - hcryp->hdmaout->XferCpltCallback = CRYP_GCMCMAC_DMAOutCplt; - /* Set the DMA error callback */ - hcryp->hdmaout->XferErrorCallback = CRYP_GCMCMAC_DMAError; - } - - /* Enable the CRYP peripheral */ - __HAL_CRYP_ENABLE(); - - /* Enable the DMA input stream */ - HAL_DMA_Start_IT(hcryp->hdmain, inputaddr, (uint32_t)&hcryp->Instance->DINR, Size/4); - - /* Enable the DMA input request */ - SET_BIT(hcryp->Instance->CR, AES_CR_DMAINEN); - - - if (outputaddr != 0) - { - /* Enable the DMA output stream */ - HAL_DMA_Start_IT(hcryp->hdmaout, (uint32_t)&hcryp->Instance->DOUTR, outputaddr, Size/4); - - /* Enable the DMA output request */ - SET_BIT(hcryp->Instance->CR, AES_CR_DMAOUTEN); - } -} - - - -/** - * @brief Write/read input/output data in polling mode. - * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains - * the configuration information for CRYP module. - * @param Input: Pointer to the Input buffer. - * @param Ilength: Length of the Input buffer in bytes, must be a multiple of 16. - * @param Output: Pointer to the returned buffer. - * @param Timeout: Specify Timeout value. - * @retval HAL status - */ -static HAL_StatusTypeDef CRYP_ProcessData(CRYP_HandleTypeDef *hcryp, uint8_t* Input, uint16_t Ilength, uint8_t* Output, uint32_t Timeout) -{ - uint32_t index = 0; - uint32_t inputaddr = (uint32_t)Input; - uint32_t outputaddr = (uint32_t)Output; - - - for(index=0; (index < Ilength); index += 16) - { - /* Write the Input block in the Data Input register */ - hcryp->Instance->DINR = *(uint32_t*)(inputaddr); - inputaddr+=4; - hcryp->Instance->DINR = *(uint32_t*)(inputaddr); - inputaddr+=4; - hcryp->Instance->DINR = *(uint32_t*)(inputaddr); - inputaddr+=4; - hcryp->Instance->DINR = *(uint32_t*)(inputaddr); - inputaddr+=4; - - /* Wait for CCF flag to be raised */ - if(CRYP_WaitOnCCFlag(hcryp, Timeout) != HAL_OK) - { - hcryp->State = HAL_CRYP_STATE_READY; - __HAL_UNLOCK(hcryp); - return HAL_TIMEOUT; - } - - /* Clear CCF Flag */ - __HAL_CRYP_CLEAR_FLAG(CRYP_CCF_CLEAR); - - /* Read the Output block from the Data Output Register */ - *(uint32_t*)(outputaddr) = hcryp->Instance->DOUTR; - outputaddr+=4; - *(uint32_t*)(outputaddr) = hcryp->Instance->DOUTR; - outputaddr+=4; - *(uint32_t*)(outputaddr) = hcryp->Instance->DOUTR; - outputaddr+=4; - *(uint32_t*)(outputaddr) = hcryp->Instance->DOUTR; - outputaddr+=4; - - /* If the suspension flag has been raised and if the processing is not about - to end, suspend processing */ - if ((hcryp->SuspendRequest == HAL_CRYP_SUSPEND) && ((index+16) < Ilength)) - { - /* Reset SuspendRequest */ - hcryp->SuspendRequest = HAL_CRYP_SUSPEND_NONE; - - /* Save current reading and writing locations of Input and Output buffers */ - hcryp->pCrypOutBuffPtr = (uint8_t *)outputaddr; - hcryp->pCrypInBuffPtr = (uint8_t *)inputaddr; - /* Save the number of bytes that remain to be processed at this point */ - hcryp->CrypInCount = Ilength - (index+16); - - /* Change the CRYP state */ - hcryp->State = HAL_CRYP_STATE_SUSPENDED; - - return HAL_OK; - } - - - } - /* Return function status */ - return HAL_OK; - -} - - - - - -/** - * @brief Read derivative key in polling mode when CRYP hardware block is set - * in key derivation operating mode (mode 2). - * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains - * the configuration information for CRYP module. - * @param Output: Pointer to the returned buffer. - * @param Timeout: Specify Timeout value. - * @retval HAL status - */ -static HAL_StatusTypeDef CRYP_ReadKey(CRYP_HandleTypeDef *hcryp, uint8_t* Output, uint32_t Timeout) -{ - uint32_t outputaddr = (uint32_t)Output; - - /* Wait for CCF flag to be raised */ - if(CRYP_WaitOnCCFlag(hcryp, Timeout) != HAL_OK) - { - hcryp->State = HAL_CRYP_STATE_READY; - __HAL_UNLOCK(hcryp); - return HAL_TIMEOUT; - } - /* Clear CCF Flag */ - __HAL_CRYP_CLEAR_FLAG( CRYP_CCF_CLEAR); - - /* Read the derivative key from the AES_KEYRx registers */ - if (hcryp->Init.KeySize == CRYP_KEYSIZE_256B) - { - *(uint32_t*)(outputaddr) = __REV(hcryp->Instance->KEYR7); - outputaddr+=4; - *(uint32_t*)(outputaddr) = __REV(hcryp->Instance->KEYR6); - outputaddr+=4; - *(uint32_t*)(outputaddr) = __REV(hcryp->Instance->KEYR5); - outputaddr+=4; - *(uint32_t*)(outputaddr) = __REV(hcryp->Instance->KEYR4); - outputaddr+=4; - } - - *(uint32_t*)(outputaddr) = __REV(hcryp->Instance->KEYR3); - outputaddr+=4; - *(uint32_t*)(outputaddr) = __REV(hcryp->Instance->KEYR2); - outputaddr+=4; - *(uint32_t*)(outputaddr) = __REV(hcryp->Instance->KEYR1); - outputaddr+=4; - *(uint32_t*)(outputaddr) = __REV(hcryp->Instance->KEYR0); - - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Set the DMA configuration and start the DMA transfer. - * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains - * the configuration information for CRYP module. - * @param inputaddr: Address of the Input buffer. - * @param Size: Size of the Input buffer in bytes, must be a multiple of 16. - * @param outputaddr: Address of the Output buffer. - * @retval None - */ -static void CRYP_SetDMAConfig(CRYP_HandleTypeDef *hcryp, uint32_t inputaddr, uint16_t Size, uint32_t outputaddr) -{ - /* Set the CRYP DMA transfer complete callback */ - hcryp->hdmain->XferCpltCallback = CRYP_DMAInCplt; - /* Set the DMA error callback */ - hcryp->hdmain->XferErrorCallback = CRYP_DMAError; - - /* Set the CRYP DMA transfer complete callback */ - hcryp->hdmaout->XferCpltCallback = CRYP_DMAOutCplt; - /* Set the DMA error callback */ - hcryp->hdmaout->XferErrorCallback = CRYP_DMAError; - - /* Enable the DMA input stream */ - HAL_DMA_Start_IT(hcryp->hdmain, inputaddr, (uint32_t)&hcryp->Instance->DINR, Size/4); - - /* Enable the DMA output stream */ - HAL_DMA_Start_IT(hcryp->hdmaout, (uint32_t)&hcryp->Instance->DOUTR, outputaddr, Size/4); - - /* Enable In and Out DMA requests */ - SET_BIT(hcryp->Instance->CR, (AES_CR_DMAINEN | AES_CR_DMAOUTEN)); - - /* Enable the CRYP peripheral */ - __HAL_CRYP_ENABLE(); -} - - -/** - * @brief Handle CRYP hardware block Timeout when waiting for CCF flag to be raised. - * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains - * the configuration information for CRYP module. - * @param Timeout: Timeout duration. - * @retval HAL status - */ -static HAL_StatusTypeDef CRYP_WaitOnCCFlag(CRYP_HandleTypeDef *hcryp, uint32_t Timeout) -{ - uint32_t tickstart = 0; - - /* Get timeout */ - tickstart = HAL_GetTick(); - - while(HAL_IS_BIT_CLR(hcryp->Instance->SR, AES_SR_CCF)) - { - /* Check for the Timeout */ - if(Timeout != HAL_MAX_DELAY) - { - if((HAL_GetTick() - tickstart ) > Timeout) - { - return HAL_TIMEOUT; - } - } - } - return HAL_OK; -} - -/** - * @brief Wait for Busy Flag to be reset during a GCM payload encryption process suspension. - * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains - * the configuration information for CRYP module. - * @param Timeout: Timeout duration. - * @retval HAL status - */ -static HAL_StatusTypeDef CRYP_WaitOnBusyFlagReset(CRYP_HandleTypeDef *hcryp, uint32_t Timeout) -{ - uint32_t tickstart = 0; - - /* Get timeout */ - tickstart = HAL_GetTick(); - - while(HAL_IS_BIT_SET(hcryp->Instance->SR, AES_SR_BUSY)) - { - /* Check for the Timeout */ - if(Timeout != HAL_MAX_DELAY) - { - if((HAL_GetTick() - tickstart ) > Timeout) - { - return HAL_TIMEOUT; - } - } - } - return HAL_OK; -} - - -/** - * @brief DMA CRYP Input Data process complete callback. - * @param hdma: DMA handle. - * @retval None - */ -static void CRYP_DMAInCplt(DMA_HandleTypeDef *hdma) -{ - CRYP_HandleTypeDef* hcryp = (CRYP_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; - - /* Disable the DMA transfer for input request */ - CLEAR_BIT(hcryp->Instance->CR, AES_CR_DMAINEN); - - /* Call input data transfer complete callback */ - HAL_CRYP_InCpltCallback(hcryp); -} - -/** - * @brief DMA CRYP Output Data process complete callback. - * @param hdma: DMA handle. - * @retval None - */ -static void CRYP_DMAOutCplt(DMA_HandleTypeDef *hdma) -{ - CRYP_HandleTypeDef* hcryp = (CRYP_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; - - /* Disable the DMA transfer for output request */ - CLEAR_BIT(hcryp->Instance->CR, AES_CR_DMAOUTEN); - - /* Clear CCF Flag */ - __HAL_CRYP_CLEAR_FLAG(CRYP_CCF_CLEAR); - - /* Disable CRYP */ - __HAL_CRYP_DISABLE(); - - /* Change the CRYP state to ready */ - hcryp->State = HAL_CRYP_STATE_READY; - - /* Call output data transfer complete callback */ - HAL_CRYP_OutCpltCallback(hcryp); -} - -/** - * @brief DMA CRYP communication error callback. - * @param hdma: DMA handle. - * @retval None - */ -static void CRYP_DMAError(DMA_HandleTypeDef *hdma) -{ - CRYP_HandleTypeDef* hcryp = (CRYP_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; - - hcryp->State= HAL_CRYP_STATE_ERROR; - hcryp->ErrorCode |= HAL_CRYP_DMA_ERROR; - HAL_CRYP_ErrorCallback(hcryp); - /* Clear Error Flag */ - __HAL_CRYP_CLEAR_FLAG(CRYP_ERR_CLEAR); -} - - -/** - * @} - */ - -/** - * @} - */ - -/** - * @} - */ - -#endif /* defined(STM32L485xx) || defined(STM32L486xx) */ - -#endif /* HAL_CRYP_MODULE_ENABLED */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ -
--- a/Src/stm32l4xx_hal_dac.c Thu Nov 12 20:49:49 2015 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,1166 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_dac.c - * @author MCD Application Team - * @version V1.1.0 - * @date 16-September-2015 - * @brief DAC HAL module driver. - * This file provides firmware functions to manage the following - * functionalities of the Digital to Analog Converter (DAC) peripheral: - * + Initialization and de-initialization functions - * + IO operation functions - * + Peripheral Control functions - * + Peripheral State and Errors functions - * - * - @verbatim - ============================================================================== - ##### DAC Peripheral features ##### - ============================================================================== - [..] - *** DAC Channels *** - ==================== - [..] - STM32L4 devices integrate two 12-bit Digital Analog Converters - - The 2 converters (i.e. channel1 & channel2) - can be used independently or simultaneously (dual mode): - (#) DAC channel1 with DAC_OUT1 (PA4) as output or connected to on-chip - peripherals (ex. OPAMPs, comparators). - (#) DAC channel2 with DAC_OUT2 (PA5) as output or connected to on-chip - peripherals (ex. OPAMPs, comparators). - - *** DAC Triggers *** - ==================== - [..] - Digital to Analog conversion can be non-triggered using DAC_TRIGGER_NONE - and DAC_OUT1/DAC_OUT2 is available once writing to DHRx register. - [..] - Digital to Analog conversion can be triggered by: - (#) External event: EXTI Line 9 (any GPIOx_PIN_9) using DAC_TRIGGER_EXT_IT9. - The used pin (GPIOx_PIN_9) must be configured in input mode. - - (#) Timers TRGO: TIM2, TIM3, TIM4, TIM5, TIM6 and TIM7 - (DAC_TRIGGER_T2_TRGO, DAC_TRIGGER_T3_TRGO...) - - (#) Software using DAC_TRIGGER_SOFTWARE - - *** DAC Buffer mode feature *** - =============================== - [..] - Each DAC channel integrates an output buffer that can be used to - reduce the output impedance, and to drive external loads directly - without having to add an external operational amplifier. - To enable, the output buffer use - sConfig.DAC_OutputBuffer = DAC_OUTPUTBUFFER_ENABLE; - [..] - (@) Refer to the device datasheet for more details about output - impedance value with and without output buffer. - - *** DAC connect feature *** - =============================== - [..] - Each DAC channel can be connected internally. - To connect, use - sConfig.DAC_ConnectOnChipPeripheral = DAC_CHIPCONNECT_ENABLE; - - *** GPIO configurations guidelines *** - ===================== - [..] - When a DAC channel is used (ex channel1 on PA4) and the other is not - (ex channel2 on PA5 is configured in Analog and disabled). - Channel1 may disturb channel2 as coupling effect. - Note that there is no coupling on channel2 as soon as channel2 is turned on. - Coupling on adjacent channel could be avoided as follows: - when unused PA5 is configured as INPUT PULL-UP or DOWN. - PA5 is configured in ANALOG just before it is turned on. - - *** DAC Sample and Hold feature *** - ======================== - [..] - For each converter, 2 modes are supported: normal mode and - "sample and hold" mode (i.e. low power mode). - In the sample and hold mode, the DAC core converts data, then holds the - converted voltage on a capacitor. When not converting, the DAC cores and - buffer are completely turned off between samples and the DAC output is - tri-stated, therefore reducing the overall power consumption. A new - stabilization period is needed before each new conversion. - - The sample and hold allow setting internal or external voltage @ - low power consumption cost (output value can be at any given rate either - by CPU or DMA). - - The Sample and hold block and registers uses either LSI & run in - several power modes: run mode, sleep mode, low power run, low power sleep - mode & stop1 mode. - - Low power stop1 mode allows only static conversion. - - To enable Sample and Hold mode - Enable LSI using HAL_RCC_OscConfig with RCC_OSCILLATORTYPE_LSI & - RCC_LSI_ON parameters. - - Use DAC_InitStructure.DAC_SampleAndHold = DAC_SAMPLEANDHOLD_ENABLE; - & DAC_ChannelConfTypeDef.DAC_SampleAndHoldConfig.DAC_SampleTime, - DAC_HoldTime & DAC_RefreshTime; - - - - *** DAC calibration feature *** - =================================== - [..] - (#) The 2 converters (channel1 & channel2) provide calibration capabilities. - (++) Calibration aims at correcting some offset of output buffer. - (++) The DAC uses either factory calibration settings OR user defined - calibration (trimming) settings (i.e. trimming mode). - (++) The user defined settings can be figured out using self calibration - handled by HAL_DACEx_SelfCalibrate. - (++) HAL_DACEx_SelfCalibrate: - (+++) Runs automatically the calibration. - (+++) Enables the user trimming mode - (+++) Updates a structure with trimming values with fresh calibration - results. - The user may store the calibration results for larger - (ex monitoring the trimming as a function of temperature - for instance) - - *** DAC wave generation feature *** - =================================== - [..] - Both DAC channels can be used to generate - (#) Noise wave - (#) Triangle wave - - *** DAC data format *** - ======================= - [..] - The DAC data format can be: - (#) 8-bit right alignment using DAC_ALIGN_8B_R - (#) 12-bit left alignment using DAC_ALIGN_12B_L - (#) 12-bit right alignment using DAC_ALIGN_12B_R - - *** DAC data value to voltage correspondence *** - ================================================ - [..] - The analog output voltage on each DAC channel pin is determined - by the following equation: - [..] - DAC_OUTx = VREF+ * DOR / 4095 - (+) with DOR is the Data Output Register - [..] - VEF+ is the input voltage reference (refer to the device datasheet) - [..] - e.g. To set DAC_OUT1 to 0.7V, use - (+) Assuming that VREF+ = 3.3V, DAC_OUT1 = (3.3 * 868) / 4095 = 0.7V - - *** DMA requests *** - ===================== - [..] - A DMA1 request can be generated when an external trigger (but not a software trigger) - occurs if DMA1 requests are enabled using HAL_DAC_Start_DMA(). - DMA requests are mapped as following: - (#) DAC channel1: mapped either on - (++) DMA1 request 6 channel3 - (++) or DMA2 request channel4 which must be already configured - (#) DAC channel2: mapped either on - (++) DMA1 request 5 channel4 - (++) or DMA2 request 3 channel5 which must be already configured - [..] - (@) For Dual mode and specific signal (Triangle and noise) generation please - refer to Extended Features Driver description - - ##### How to use this driver ##### - ============================================================================== - [..] - (+) DAC APB clock must be enabled to get write access to DAC - registers using HAL_DAC_Init() - (+) Configure DAC_OUTx (DAC_OUT1: PA4, DAC_OUT2: PA5) in analog mode. - (+) Configure the DAC channel using HAL_DAC_ConfigChannel() function. - (+) Enable the DAC channel using HAL_DAC_Start() or HAL_DAC_Start_DMA() functions. - - *** Calibration mode IO operation *** - ====================================== - [..] - (+) Retrieve the factory trimming (calibration settings) using HAL_DACEx_GetTrimOffset() - (+) Run the calibration using HAL_DACEx_SelfCalibrate() - (+) Update the trimming while DAC running using HAL_DACEx_SetUserTrimming() - - *** Polling mode IO operation *** - ================================= - [..] - (+) Start the DAC peripheral using HAL_DAC_Start() - (+) To read the DAC last data output value, use the HAL_DAC_GetValue() function. - (+) Stop the DAC peripheral using HAL_DAC_Stop() - - *** DMA mode IO operation *** - ============================== - [..] - (+) Start the DAC peripheral using HAL_DAC_Start_DMA(), at this stage the user specify the length - of data to be transferred at each end of conversion - (+) At the middle of data transfer HAL_DAC_ConvHalfCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2() - function is executed and user can add his own code by customization of function pointer - HAL_DAC_ConvHalfCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2() - (+) At The end of data transfer HAL_DAC_ConvCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2() - function is executed and user can add his own code by customization of function pointer - HAL_DAC_ConvCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2() - (+) In case of transfer Error, HAL_DAC_ErrorCallbackCh1() function is executed and user can - add his own code by customization of function pointer HAL_DAC_ErrorCallbackCh1 - (+) In case of DMA underrun, DAC interruption triggers and execute internal function HAL_DAC_IRQHandler. - HAL_DAC_DMAUnderrunCallbackCh1() or HAL_DACEx_DMAUnderrunCallbackCh2() - function is executed and user can add his own code by customization of function pointer - HAL_DAC_DMAUnderrunCallbackCh1() or HAL_DACEx_DMAUnderrunCallbackCh2() and - add his own code by customization of function pointer HAL_DAC_ErrorCallbackCh1() - (+) Stop the DAC peripheral using HAL_DAC_Stop_DMA() - - *** DAC HAL driver macros list *** - ============================================= - [..] - Below the list of most used macros in DAC HAL driver. - - (+) __HAL_DAC_ENABLE : Enable the DAC peripheral - (+) __HAL_DAC_DISABLE : Disable the DAC peripheral - (+) __HAL_DAC_CLEAR_FLAG: Clear the DAC's pending flags - (+) __HAL_DAC_GET_FLAG: Get the selected DAC's flag status - - [..] - (@) You can refer to the DAC HAL driver header file for more useful macros - - @endverbatim - ****************************************************************************** - * @attention - * - * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - - /** @defgroup DAC DAC - * @brief DAC driver modules - * @{ - */ - -#ifdef HAL_DAC_MODULE_ENABLED - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -/* Private constants ---------------------------------------------------------*/ -/** @addtogroup DAC_Private_Constants DAC Private Constants - * @{ - */ -#define TIMEOUT_DAC_CALIBCONFIG ((uint32_t)1) /* 1ms */ -/** - * @} - */ - -/* Private macro -------------------------------------------------------------*/ -/* Private macro -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ -/** @defgroup DAC_Private_Functions DAC Private Functions - * @{ - */ -static void DAC_DMAConvCpltCh1(DMA_HandleTypeDef *hdma); -static void DAC_DMAErrorCh1(DMA_HandleTypeDef *hdma); -static void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma); -/** - * @} - */ -/* Exported functions -------------------------------------------------------*/ - -/** @defgroup DAC_Exported_Functions DAC Exported Functions - * @{ - */ - -/** @defgroup DAC_Exported_Functions_Group1 Initialization and de-initialization functions - * @brief Initialization and Configuration functions - * -@verbatim - ============================================================================== - ##### Initialization and de-initialization functions ##### - ============================================================================== - [..] This section provides functions allowing to: - (+) Initialize and configure the DAC. - (+) De-initialize the DAC. - -@endverbatim - * @{ - */ - -/** - * @brief Initialize the DAC peripheral according to the specified parameters - * in the DAC_InitStruct and initialize the associated handle. - * @param hdac: pointer to a DAC_HandleTypeDef structure that contains - * the configuration information for the specified DAC. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef* hdac) -{ - /* Check DAC handle */ - if(hdac == NULL) - { - return HAL_ERROR; - } - /* Check the parameters */ - assert_param(IS_DAC_ALL_INSTANCE(hdac->Instance)); - - if(hdac->State == HAL_DAC_STATE_RESET) - { - /* Allocate lock resource and initialize it */ - hdac->Lock = HAL_UNLOCKED; - - /* Init the low level hardware */ - HAL_DAC_MspInit(hdac); - } - - /* Initialize the DAC state*/ - hdac->State = HAL_DAC_STATE_BUSY; - - /* Set DAC error code to none */ - hdac->ErrorCode = HAL_DAC_ERROR_NONE; - - /* Initialize the DAC state*/ - hdac->State = HAL_DAC_STATE_READY; - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Deinitialize the DAC peripheral registers to their default reset values. - * @param hdac: pointer to a DAC_HandleTypeDef structure that contains - * the configuration information for the specified DAC. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef* hdac) -{ - /* Check DAC handle */ - if(hdac == NULL) - { - return HAL_ERROR; - } - - /* Check the parameters */ - assert_param(IS_DAC_ALL_INSTANCE(hdac->Instance)); - - /* Change DAC state */ - hdac->State = HAL_DAC_STATE_BUSY; - - /* DeInit the low level hardware */ - HAL_DAC_MspDeInit(hdac); - - /* Set DAC error code to none */ - hdac->ErrorCode = HAL_DAC_ERROR_NONE; - - /* Change DAC state */ - hdac->State = HAL_DAC_STATE_RESET; - - /* Release Lock */ - __HAL_UNLOCK(hdac); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Initialize the DAC MSP. - * @param hdac: pointer to a DAC_HandleTypeDef structure that contains - * the configuration information for the specified DAC. - * @retval None - */ -__weak void HAL_DAC_MspInit(DAC_HandleTypeDef* hdac) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_DAC_MspInit could be implemented in the user file - */ -} - -/** - * @brief DeInitialize the DAC MSP. - * @param hdac: pointer to a DAC_HandleTypeDef structure that contains - * the configuration information for the specified DAC. - * @retval None - */ -__weak void HAL_DAC_MspDeInit(DAC_HandleTypeDef* hdac) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_DAC_MspDeInit could be implemented in the user file - */ -} - -/** - * @} - */ - -/** @defgroup DAC_Exported_Functions_Group2 IO operation functions - * @brief IO operation functions - * -@verbatim - ============================================================================== - ##### IO operation functions ##### - ============================================================================== - [..] This section provides functions allowing to: - (+) Start conversion. - (+) Stop conversion. - (+) Start conversion and enable DMA transfer. - (+) Stop conversion and disable DMA transfer. - (+) Get result of conversion. - -@endverbatim - * @{ - */ - -/** - * @brief Enables DAC and starts conversion of channel. - * @param hdac: pointer to a DAC_HandleTypeDef structure that contains - * the configuration information for the specified DAC. - * @param Channel: The selected DAC channel. - * This parameter can be one of the following values: - * @arg DAC_CHANNEL_1: DAC Channel1 selected - * @arg DAC_CHANNEL_2: DAC Channel2 selected - * @retval HAL status - */ -HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef* hdac, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_DAC_CHANNEL(Channel)); - - /* Process locked */ - __HAL_LOCK(hdac); - - /* Change DAC state */ - hdac->State = HAL_DAC_STATE_BUSY; - - /* Enable the Peripheral */ - __HAL_DAC_ENABLE(hdac, Channel); - - if(Channel == DAC_CHANNEL_1) - { - /* Check if software trigger enabled */ - if((hdac->Instance->CR & (DAC_CR_TEN1 | DAC_CR_TSEL1)) == (DAC_CR_TEN1 | DAC_CR_TSEL1)) - { - /* Enable the selected DAC software conversion */ - SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG1); - } - } - else - { - /* Check if software trigger enabled */ - if((hdac->Instance->CR & (DAC_CR_TEN2 | DAC_CR_TSEL2)) == (DAC_CR_TEN2 | DAC_CR_TSEL2)) - { - /* Enable the selected DAC software conversion*/ - SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG2); - } - } - - /* Change DAC state */ - hdac->State = HAL_DAC_STATE_READY; - - /* Process unlocked */ - __HAL_UNLOCK(hdac); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Disables DAC and stop conversion of channel. - * @param hdac: pointer to a DAC_HandleTypeDef structure that contains - * the configuration information for the specified DAC. - * @param Channel: The selected DAC channel. - * This parameter can be one of the following values: - * @arg DAC_CHANNEL_1: DAC Channel1 selected - * @arg DAC_CHANNEL_2: DAC Channel2 selected - * @retval HAL status - */ -HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef* hdac, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_DAC_CHANNEL(Channel)); - - /* Disable the Peripheral */ - __HAL_DAC_DISABLE(hdac, Channel); - - /* Change DAC state */ - hdac->State = HAL_DAC_STATE_READY; - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Enables DAC and starts conversion of channel. - * @param hdac: pointer to a DAC_HandleTypeDef structure that contains - * the configuration information for the specified DAC. - * @param Channel: The selected DAC channel. - * This parameter can be one of the following values: - * @arg DAC_CHANNEL_1: DAC Channel1 selected - * @arg DAC_CHANNEL_2: DAC Channel2 selected - * @param pData: The destination peripheral Buffer address. - * @param Length: The length of data to be transferred from memory to DAC peripheral - * @param Alignment: Specifies the data alignment for DAC channel. - * This parameter can be one of the following values: - * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected - * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected - * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected - * @retval HAL status - */ -HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t* pData, uint32_t Length, uint32_t Alignment) -{ - uint32_t tmpreg = 0; - - /* Check the parameters */ - assert_param(IS_DAC_CHANNEL(Channel)); - assert_param(IS_DAC_ALIGN(Alignment)); - - /* Process locked */ - __HAL_LOCK(hdac); - - /* Change DAC state */ - hdac->State = HAL_DAC_STATE_BUSY; - - if(Channel == DAC_CHANNEL_1) - { - /* Set the DMA transfer complete callback for channel1 */ - hdac->DMA_Handle1->XferCpltCallback = DAC_DMAConvCpltCh1; - - /* Set the DMA half transfer complete callback for channel1 */ - hdac->DMA_Handle1->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh1; - - /* Set the DMA error callback for channel1 */ - hdac->DMA_Handle1->XferErrorCallback = DAC_DMAErrorCh1; - - /* Enable the selected DAC channel1 DMA request */ - SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN1); - - /* Case of use of channel 1 */ - switch(Alignment) - { - case DAC_ALIGN_12B_R: - /* Get DHR12R1 address */ - tmpreg = (uint32_t)&hdac->Instance->DHR12R1; - break; - case DAC_ALIGN_12B_L: - /* Get DHR12L1 address */ - tmpreg = (uint32_t)&hdac->Instance->DHR12L1; - break; - case DAC_ALIGN_8B_R: - /* Get DHR8R1 address */ - tmpreg = (uint32_t)&hdac->Instance->DHR8R1; - break; - default: - break; - } - } - else - { - /* Set the DMA transfer complete callback for channel2 */ - hdac->DMA_Handle2->XferCpltCallback = DAC_DMAConvCpltCh2; - - /* Set the DMA half transfer complete callback for channel2 */ - hdac->DMA_Handle2->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh2; - - /* Set the DMA error callback for channel2 */ - hdac->DMA_Handle2->XferErrorCallback = DAC_DMAErrorCh2; - - /* Enable the selected DAC channel2 DMA request */ - SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN2); - - /* Case of use of channel 2 */ - switch(Alignment) - { - case DAC_ALIGN_12B_R: - /* Get DHR12R2 address */ - tmpreg = (uint32_t)&hdac->Instance->DHR12R2; - break; - case DAC_ALIGN_12B_L: - /* Get DHR12L2 address */ - tmpreg = (uint32_t)&hdac->Instance->DHR12L2; - break; - case DAC_ALIGN_8B_R: - /* Get DHR8R2 address */ - tmpreg = (uint32_t)&hdac->Instance->DHR8R2; - break; - default: - break; - } - } - - /* Enable the DMA channel */ - if(Channel == DAC_CHANNEL_1) - { - /* Enable the DAC DMA underrun interrupt */ - __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR1); - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(hdac->DMA_Handle1, (uint32_t)pData, tmpreg, Length); - } - else - { - /* Enable the DAC DMA underrun interrupt */ - __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR2); - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(hdac->DMA_Handle2, (uint32_t)pData, tmpreg, Length); - } - - /* Process Unlocked */ - __HAL_UNLOCK(hdac); - - /* Enable the Peripheral */ - __HAL_DAC_ENABLE(hdac, Channel); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Disables DAC and stop conversion of channel. - * @param hdac: pointer to a DAC_HandleTypeDef structure that contains - * the configuration information for the specified DAC. - * @param Channel: The selected DAC channel. - * This parameter can be one of the following values: - * @arg DAC_CHANNEL_1: DAC Channel1 selected - * @arg DAC_CHANNEL_2: DAC Channel2 selected - * @retval HAL status - */ -HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel) -{ - HAL_StatusTypeDef status = HAL_OK; - - /* Check the parameters */ - assert_param(IS_DAC_CHANNEL(Channel)); - - /* Disable the selected DAC channel DMA request */ - hdac->Instance->CR &= ~(DAC_CR_DMAEN1 << Channel); - - /* Disable the Peripheral */ - __HAL_DAC_DISABLE(hdac, Channel); - - /* Disable the DMA channel */ - /* Channel1 is used */ - if (Channel == DAC_CHANNEL_1) - { - /* Disable the DMA channel */ - status = HAL_DMA_Abort(hdac->DMA_Handle1); - - /* Disable the DAC DMA underrun interrupt */ - __HAL_DAC_DISABLE_IT(hdac, DAC_IT_DMAUDR1); - } - else /* Channel2 is used for */ - { - /* Disable the DMA channel */ - status = HAL_DMA_Abort(hdac->DMA_Handle2); - - /* Disable the DAC DMA underrun interrupt */ - __HAL_DAC_DISABLE_IT(hdac, DAC_IT_DMAUDR2); - } - - /* Check if DMA Channel effectively disabled */ - if (status != HAL_OK) - { - /* Update DAC state machine to error */ - hdac->State = HAL_DAC_STATE_ERROR; - } - else - { - /* Change DAC state */ - hdac->State = HAL_DAC_STATE_READY; - } - - /* Return function status */ - return status; -} - -/* DAC channel 2 is available on top of DAC channel 1 */ - -/** - * @brief Handles DAC interrupt request - * This function uses the interruption of DMA - * underrun. - * @param hdac: pointer to a DAC_HandleTypeDef structure that contains - * the configuration information for the specified DAC. - * @retval None - */ -void HAL_DAC_IRQHandler(DAC_HandleTypeDef* hdac) -{ - if(__HAL_DAC_GET_IT_SOURCE(hdac, DAC_IT_DMAUDR1)) - { - /* Check underrun flag of DAC channel 1 */ - if(__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR1)) - { - /* Change DAC state to error state */ - hdac->State = HAL_DAC_STATE_ERROR; - - /* Set DAC error code to chanel1 DMA underrun error */ - SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_DMAUNDERRUNCH1); - - /* Clear the underrun flag */ - __HAL_DAC_CLEAR_FLAG(hdac,DAC_FLAG_DMAUDR1); - - /* Disable the selected DAC channel1 DMA request */ - CLEAR_BIT(hdac->Instance->CR, DAC_CR_DMAEN1); - - /* Error callback */ - HAL_DAC_DMAUnderrunCallbackCh1(hdac); - } - } - if(__HAL_DAC_GET_IT_SOURCE(hdac, DAC_IT_DMAUDR2)) - { - /* Check underrun flag of DAC channel 1 */ - if(__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR2)) - { - /* Change DAC state to error state */ - hdac->State = HAL_DAC_STATE_ERROR; - - /* Set DAC error code to channel2 DMA underrun error */ - SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_DMAUNDERRUNCH2); - - /* Clear the underrun flag */ - __HAL_DAC_CLEAR_FLAG(hdac,DAC_FLAG_DMAUDR2); - - /* Disable the selected DAC channel1 DMA request */ - CLEAR_BIT(hdac->Instance->CR, DAC_CR_DMAEN2); - - /* Error callback */ - HAL_DACEx_DMAUnderrunCallbackCh2(hdac); - } - } -} - -/** - * @brief Set the specified data holding register value for DAC channel. - * @param hdac: pointer to a DAC_HandleTypeDef structure that contains - * the configuration information for the specified DAC. - * @param Channel: The selected DAC channel. - * This parameter can be one of the following values: - * @arg DAC_CHANNEL_1: DAC Channel1 selected - * @arg DAC_CHANNEL_2: DAC Channel2 selected - * @param Alignment: Specifies the data alignment. - * This parameter can be one of the following values: - * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected - * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected - * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected - * @param Data: Data to be loaded in the selected data holding register. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data) -{ - __IO uint32_t tmp = 0; - - /* Check the parameters */ - assert_param(IS_DAC_CHANNEL(Channel)); - assert_param(IS_DAC_ALIGN(Alignment)); - assert_param(IS_DAC_DATA(Data)); - - tmp = (uint32_t)hdac->Instance; - if(Channel == DAC_CHANNEL_1) - { - tmp += DAC_DHR12R1_ALIGNMENT(Alignment); - } - else - { - tmp += DAC_DHR12R2_ALIGNMENT(Alignment); - } - - /* Set the DAC channel selected data holding register */ - *(__IO uint32_t *) tmp = Data; - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Conversion complete callback in non-blocking mode for Channel1 - * @param hdac: pointer to a DAC_HandleTypeDef structure that contains - * the configuration information for the specified DAC. - * @retval None - */ -__weak void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef* hdac) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_DAC_ConvCpltCallbackCh1 could be implemented in the user file - */ -} - -/** - * @brief Conversion half DMA transfer callback in non-blocking mode for Channel1 - * @param hdac: pointer to a DAC_HandleTypeDef structure that contains - * the configuration information for the specified DAC. - * @retval None - */ -__weak void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef* hdac) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_DAC_ConvHalfCpltCallbackCh1 could be implemented in the user file - */ -} - -/** - * @brief Error DAC callback for Channel1. - * @param hdac: pointer to a DAC_HandleTypeDef structure that contains - * the configuration information for the specified DAC. - * @retval None - */ -__weak void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_DAC_ErrorCallbackCh1 could be implemented in the user file - */ -} - -/** - * @brief DMA underrun DAC callback for channel1. - * @param hdac: pointer to a DAC_HandleTypeDef structure that contains - * the configuration information for the specified DAC. - * @retval None - */ -__weak void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_DAC_DMAUnderrunCallbackCh1 could be implemented in the user file - */ -} - -/** - * @} - */ - -/** @defgroup DAC_Exported_Functions_Group3 Peripheral Control functions - * @brief Peripheral Control functions - * -@verbatim - ============================================================================== - ##### Peripheral Control functions ##### - ============================================================================== - [..] This section provides functions allowing to: - (+) Configure channels. - (+) Set the specified data holding register value for DAC channel. - -@endverbatim - * @{ - */ - -/** - * @brief Returns the last data output value of the selected DAC channel. - * @param hdac: pointer to a DAC_HandleTypeDef structure that contains - * the configuration information for the specified DAC. - * @param Channel: The selected DAC channel. - * This parameter can be one of the following values: - * @arg DAC_CHANNEL_1: DAC Channel1 selected - * @arg DAC_CHANNEL_2: DAC Channel2 selected - * @retval The selected DAC channel data output value. - */ -uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef* hdac, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_DAC_CHANNEL(Channel)); - - /* Returns the DAC channel data output register value */ - if(Channel == DAC_CHANNEL_1) - { - return hdac->Instance->DOR1; - } - else - { - return hdac->Instance->DOR2; - } -} - -/** - * @brief Configures the selected DAC channel. - * @param hdac: pointer to a DAC_HandleTypeDef structure that contains - * the configuration information for the specified DAC. - * @param sConfig: DAC configuration structure. - * @param Channel: The selected DAC channel. - * This parameter can be one of the following values: - * @arg DAC_CHANNEL_1: DAC Channel1 selected - * @arg DAC_CHANNEL_2: DAC Channel2 selected - * @retval HAL status - */ -HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef* hdac, DAC_ChannelConfTypeDef* sConfig, uint32_t Channel) -{ - uint32_t tmpreg1 = 0, tmpreg2 = 0; - uint32_t tickstart = 0; - - /* Check the DAC parameters */ - assert_param(IS_DAC_TRIGGER(sConfig->DAC_Trigger)); - assert_param(IS_DAC_OUTPUT_BUFFER_STATE(sConfig->DAC_OutputBuffer)); - assert_param(IS_DAC_CHIP_CONNECTION(sConfig->DAC_ConnectOnChipPeripheral)); - assert_param(IS_DAC_TRIMMING(sConfig->DAC_UserTrimming)); - if ((sConfig->DAC_UserTrimming) == DAC_TRIMMING_USER) - { - assert_param(IS_DAC_TRIMMINGVALUE(sConfig->DAC_TrimmingValue)); - } - assert_param(IS_DAC_SAMPLEANDHOLD(sConfig->DAC_SampleAndHold)); - if ((sConfig->DAC_SampleAndHold) == DAC_SAMPLEANDHOLD_ENABLE) - { - assert_param(IS_DAC_SAMPLETIME(sConfig->DAC_SampleAndHoldConfig.DAC_SampleTime)); - assert_param(IS_DAC_HOLDTIME(sConfig->DAC_SampleAndHoldConfig.DAC_HoldTime)); - assert_param(IS_DAC_REFRESHTIME(sConfig->DAC_SampleAndHoldConfig.DAC_RefreshTime)); - } - assert_param(IS_DAC_CHANNEL(Channel)); - - /* Process locked */ - __HAL_LOCK(hdac); - - /* Change DAC state */ - hdac->State = HAL_DAC_STATE_BUSY; - - if(sConfig->DAC_SampleAndHold == DAC_SAMPLEANDHOLD_ENABLE) - /* Sample on old configuration */ - { - /* SampleTime */ - if (Channel == DAC_CHANNEL_1) - { - /* Get timeout */ - tickstart = HAL_GetTick(); - - /* SHSR1 can be written when BWST1 equals RESET */ - while (((hdac->Instance->SR) & DAC_SR_BWST1)!= RESET) - { - /* Check for the Timeout */ - if((HAL_GetTick() - tickstart) > TIMEOUT_DAC_CALIBCONFIG) - { - /* Update error code */ - SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_TIMEOUT); - - /* Change the DMA state */ - hdac->State = HAL_DAC_STATE_TIMEOUT; - - return HAL_TIMEOUT; - } - } - HAL_Delay(1); - hdac->Instance->SHSR1 = sConfig->DAC_SampleAndHoldConfig.DAC_SampleTime; - } - else /* Channel 2 */ - { - /* SHSR2 can be written when BWST2 equals RESET */ - - while (((hdac->Instance->SR) & DAC_SR_BWST2)!= RESET) - { - /* Check for the Timeout */ - if((HAL_GetTick() - tickstart) > TIMEOUT_DAC_CALIBCONFIG) - { - /* Update error code */ - SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_TIMEOUT); - - /* Change the DMA state */ - hdac->State = HAL_DAC_STATE_TIMEOUT; - - return HAL_TIMEOUT; - } - } - HAL_Delay(1); - hdac->Instance->SHSR2 = sConfig->DAC_SampleAndHoldConfig.DAC_SampleTime; - } - /* HoldTime */ - hdac->Instance->SHHR = (sConfig->DAC_SampleAndHoldConfig.DAC_HoldTime)<<Channel; - /* RefreshTime */ - hdac->Instance->SHRR = (sConfig->DAC_SampleAndHoldConfig.DAC_RefreshTime)<<Channel; - } - - if(sConfig->DAC_UserTrimming == DAC_TRIMMING_USER) - /* USER TRIMMING */ - { - /* Get the DAC CCR value */ - tmpreg1 = hdac->Instance->CCR; - /* Clear trimming value */ - tmpreg1 &= ~(((uint32_t)(DAC_CCR_OTRIM1)) << Channel); - /* Configure for the selected trimming offset */ - tmpreg2 = sConfig->DAC_TrimmingValue; - /* Calculate CCR register value depending on DAC_Channel */ - tmpreg1 |= tmpreg2 << Channel; - /* Write to DAC CCR */ - hdac->Instance->CCR = tmpreg1; - } - /* else factory trimming is used (factory setting are available at reset)*/ - /* SW Nothing has nothing to do */ - - /* Get the DAC MCR value */ - tmpreg1 = hdac->Instance->MCR; - /* Clear DAC_MCR_MODE2_0, DAC_MCR_MODE2_1 and DAC_MCR_MODE2_2 bits */ - tmpreg1 &= ~(((uint32_t)(DAC_MCR_MODE1)) << Channel); - /* Configure for the selected DAC channel: mode, buffer output & on chip peripheral connect */ - tmpreg2 = (sConfig->DAC_SampleAndHold | sConfig->DAC_OutputBuffer | sConfig->DAC_ConnectOnChipPeripheral); - /* Calculate MCR register value depending on DAC_Channel */ - tmpreg1 |= tmpreg2 << Channel; - /* Write to DAC MCR */ - hdac->Instance->MCR = tmpreg1; - - /* DAC in normal operating mode hence clear DAC_CR_CENx bit */ - CLEAR_BIT (hdac->Instance->CR, DAC_CR_CEN1 << Channel); - - /* Get the DAC CR value */ - tmpreg1 = hdac->Instance->CR; - /* Clear TENx, TSELx, WAVEx and MAMPx bits */ - tmpreg1 &= ~(((uint32_t)(DAC_CR_MAMP1 | DAC_CR_WAVE1 | DAC_CR_TSEL1 | DAC_CR_TEN1)) << Channel); - /* Configure for the selected DAC channel: trigger */ - /* Set TSELx and TENx bits according to DAC_Trigger value */ - tmpreg2 = (sConfig->DAC_Trigger); - /* Calculate CR register value depending on DAC_Channel */ - tmpreg1 |= tmpreg2 << Channel; - /* Write to DAC CR */ - hdac->Instance->CR = tmpreg1; - - /* Disable wave generation */ - hdac->Instance->CR &= ~(DAC_CR_WAVE1 << Channel); - - /* Change DAC state */ - hdac->State = HAL_DAC_STATE_READY; - - /* Process unlocked */ - __HAL_UNLOCK(hdac); - - /* Return function status */ - return HAL_OK; -} - -/** - * @} - */ - -/** @defgroup DAC_Exported_Functions_Group4 Peripheral State and Errors functions - * @brief Peripheral State and Errors functions - * -@verbatim - ============================================================================== - ##### Peripheral State and Errors functions ##### - ============================================================================== - [..] - This subsection provides functions allowing to - (+) Check the DAC state. - (+) Check the DAC Errors. - -@endverbatim - * @{ - */ - -/** - * @brief return the DAC handle state - * @param hdac: pointer to a DAC_HandleTypeDef structure that contains - * the configuration information for the specified DAC. - * @retval HAL state - */ -HAL_DAC_StateTypeDef HAL_DAC_GetState(DAC_HandleTypeDef* hdac) -{ - /* Return DAC handle state */ - return hdac->State; -} - - -/** - * @brief Return the DAC error code - * @param hdac: pointer to a DAC_HandleTypeDef structure that contains - * the configuration information for the specified DAC. - * @retval DAC Error Code - */ -uint32_t HAL_DAC_GetError(DAC_HandleTypeDef *hdac) -{ - return hdac->ErrorCode; -} - -/** - * @} - */ - -/** - * @} - */ - -/** @addtogroup DAC_Private_Functions - * @{ - */ - -/** - * @brief DMA conversion complete callback. - * @param hdma: pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA module. - * @retval None - */ -static void DAC_DMAConvCpltCh1(DMA_HandleTypeDef *hdma) -{ - DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; - - HAL_DAC_ConvCpltCallbackCh1(hdac); - - hdac->State= HAL_DAC_STATE_READY; -} - -/** - * @brief DMA half transfer complete callback. - * @param hdma: pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA module. - * @retval None - */ -static void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma) -{ - DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; - /* Conversion complete callback */ - HAL_DAC_ConvHalfCpltCallbackCh1(hdac); -} - -/** - * @brief DMA error callback - * @param hdma: pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA module. - * @retval None - */ -static void DAC_DMAErrorCh1(DMA_HandleTypeDef *hdma) -{ - DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; - - /* Set DAC error code to DMA error */ - hdac->ErrorCode |= HAL_DAC_ERROR_DMA; - - HAL_DAC_ErrorCallbackCh1(hdac); - - hdac->State= HAL_DAC_STATE_READY; -} - -/** - * @} - */ - -#endif /* HAL_DAC_MODULE_ENABLED */ - -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ -
--- a/Src/stm32l4xx_hal_dac_ex.c Thu Nov 12 20:49:49 2015 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,609 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_dac_ex.c - * @author MCD Application Team - * @version V1.1.0 - * @date 16-September-2015 - * @brief DAC HAL module driver. - * This file provides firmware functions to manage the extended - * functionalities of the DAC peripheral. - * - * - @verbatim - ============================================================================== - ##### How to use this driver ##### - ============================================================================== - [..] - (+) When Dual mode is enabled (i.e. DAC Channel1 and Channel2 are used simultaneously) : - Use HAL_DACEx_DualGetValue() to get digital data to be converted and use - HAL_DACEx_DualSetValue() to set digital value to converted simultaneously in Channel 1 and Channel 2. - (+) Use HAL_DACEx_TriangleWaveGenerate() to generate Triangle signal. - (+) Use HAL_DACEx_NoiseWaveGenerate() to generate Noise signal. - - (+) HAL_DACEx_SelfCalibrate to calibrate one DAC channel. - (+) HAL_DACEx_SetUserTrimming to set user trimming value. - (+) HAL_DACEx_GetTrimOffset to retrieve trimming value (factory setting - after reset, user setting if HAL_DACEx_SetUserTrimming have been used - at least one time after reset). - - @endverbatim - ****************************************************************************** - * @attention - * - * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @defgroup DACEx DACEx - * @brief DAC Extended HAL module driver - * @{ - */ - -#ifdef HAL_DAC_MODULE_ENABLED - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -/* Private macro -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ -/* Exported functions --------------------------------------------------------*/ - -/** @defgroup DACEx_Exported_Functions DACEx Exported Functions - * @{ - */ - -/** @defgroup DACEx_Exported_Functions_Group2 IO operation functions - * @brief Extended IO operation functions - * -@verbatim - ============================================================================== - ##### Extended features functions ##### - ============================================================================== - [..] This section provides functions allowing to: - (+) Start conversion. - (+) Stop conversion. - (+) Start conversion and enable DMA transfer. - (+) Stop conversion and disable DMA transfer. - (+) Get result of conversion. - (+) Get result of dual mode conversion. - -@endverbatim - * @{ - */ - -/** - * @brief Enable or disable the selected DAC channel wave generation. - * @param hdac: pointer to a DAC_HandleTypeDef structure that contains - * the configuration information for the specified DAC. - * @param Channel: The selected DAC channel. - * This parameter can be one of the following values: - * DAC_CHANNEL_1 / DAC_CHANNEL_2 - * @param Amplitude: Select max triangle amplitude. - * This parameter can be one of the following values: - * @arg DAC_TRIANGLEAMPLITUDE_1: Select max triangle amplitude of 1 - * @arg DAC_TRIANGLEAMPLITUDE_3: Select max triangle amplitude of 3 - * @arg DAC_TRIANGLEAMPLITUDE_7: Select max triangle amplitude of 7 - * @arg DAC_TRIANGLEAMPLITUDE_15: Select max triangle amplitude of 15 - * @arg DAC_TRIANGLEAMPLITUDE_31: Select max triangle amplitude of 31 - * @arg DAC_TRIANGLEAMPLITUDE_63: Select max triangle amplitude of 63 - * @arg DAC_TRIANGLEAMPLITUDE_127: Select max triangle amplitude of 127 - * @arg DAC_TRIANGLEAMPLITUDE_255: Select max triangle amplitude of 255 - * @arg DAC_TRIANGLEAMPLITUDE_511: Select max triangle amplitude of 511 - * @arg DAC_TRIANGLEAMPLITUDE_1023: Select max triangle amplitude of 1023 - * @arg DAC_TRIANGLEAMPLITUDE_2047: Select max triangle amplitude of 2047 - * @arg DAC_TRIANGLEAMPLITUDE_4095: Select max triangle amplitude of 4095 - * @retval HAL status - */ -HAL_StatusTypeDef HAL_DACEx_TriangleWaveGenerate(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Amplitude) -{ - /* Check the parameters */ - assert_param(IS_DAC_CHANNEL(Channel)); - assert_param(IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(Amplitude)); - - /* Process locked */ - __HAL_LOCK(hdac); - - /* Change DAC state */ - hdac->State = HAL_DAC_STATE_BUSY; - - /* Enable the triangle wave generation for the selected DAC channel */ - MODIFY_REG(hdac->Instance->CR, ((DAC_CR_WAVE1)|(DAC_CR_MAMP1))<<Channel, (DAC_CR_WAVE1_1 | Amplitude) << Channel); - - /* Change DAC state */ - hdac->State = HAL_DAC_STATE_READY; - - /* Process unlocked */ - __HAL_UNLOCK(hdac); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Enable or disable the selected DAC channel wave generation. - * @param hdac: pointer to a DAC_HandleTypeDef structure that contains - * the configuration information for the specified DAC. - * @param Channel: The selected DAC channel. - * This parameter can be one of the following values: - * DAC_CHANNEL_1 / DAC_CHANNEL_2 - * @param Amplitude: Unmask DAC channel LFSR for noise wave generation. - * This parameter can be one of the following values: - * @arg DAC_LFSRUNMASK_BIT0: Unmask DAC channel LFSR bit0 for noise wave generation - * @arg DAC_LFSRUNMASK_BITS1_0: Unmask DAC channel LFSR bit[1:0] for noise wave generation - * @arg DAC_LFSRUNMASK_BITS2_0: Unmask DAC channel LFSR bit[2:0] for noise wave generation - * @arg DAC_LFSRUNMASK_BITS3_0: Unmask DAC channel LFSR bit[3:0] for noise wave generation - * @arg DAC_LFSRUNMASK_BITS4_0: Unmask DAC channel LFSR bit[4:0] for noise wave generation - * @arg DAC_LFSRUNMASK_BITS5_0: Unmask DAC channel LFSR bit[5:0] for noise wave generation - * @arg DAC_LFSRUNMASK_BITS6_0: Unmask DAC channel LFSR bit[6:0] for noise wave generation - * @arg DAC_LFSRUNMASK_BITS7_0: Unmask DAC channel LFSR bit[7:0] for noise wave generation - * @arg DAC_LFSRUNMASK_BITS8_0: Unmask DAC channel LFSR bit[8:0] for noise wave generation - * @arg DAC_LFSRUNMASK_BITS9_0: Unmask DAC channel LFSR bit[9:0] for noise wave generation - * @arg DAC_LFSRUNMASK_BITS10_0: Unmask DAC channel LFSR bit[10:0] for noise wave generation - * @arg DAC_LFSRUNMASK_BITS11_0: Unmask DAC channel LFSR bit[11:0] for noise wave generation - * @retval HAL status - */ -HAL_StatusTypeDef HAL_DACEx_NoiseWaveGenerate(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Amplitude) -{ - /* Check the parameters */ - assert_param(IS_DAC_CHANNEL(Channel)); - assert_param(IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(Amplitude)); - - /* Process locked */ - __HAL_LOCK(hdac); - - /* Change DAC state */ - hdac->State = HAL_DAC_STATE_BUSY; - - /* Enable the noise wave generation for the selected DAC channel */ - MODIFY_REG(hdac->Instance->CR, ((DAC_CR_WAVE1)|(DAC_CR_MAMP1))<<Channel, (DAC_CR_WAVE1_0 | Amplitude) << Channel); - - /* Change DAC state */ - hdac->State = HAL_DAC_STATE_READY; - - /* Process unlocked */ - __HAL_UNLOCK(hdac); - - /* Return function status */ - return HAL_OK; -} - - - -/** - * @brief Set the specified data holding register value for dual DAC channel. - * @param hdac: pointer to a DAC_HandleTypeDef structure that contains - * the configuration information for the specified DAC. - * @param Alignment: Specifies the data alignment for dual channel DAC. - * This parameter can be one of the following values: - * DAC_ALIGN_8B_R: 8bit right data alignment selected - * DAC_ALIGN_12B_L: 12bit left data alignment selected - * DAC_ALIGN_12B_R: 12bit right data alignment selected - * @param Data1: Data for DAC Channel2 to be loaded in the selected data holding register. - * @param Data2: Data for DAC Channel1 to be loaded in the selected data holding register. - * @note In dual mode, a unique register access is required to write in both - * DAC channels at the same time. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_DACEx_DualSetValue(DAC_HandleTypeDef* hdac, uint32_t Alignment, uint32_t Data1, uint32_t Data2) -{ - uint32_t data = 0, tmp = 0; - - /* Check the parameters */ - assert_param(IS_DAC_ALIGN(Alignment)); - assert_param(IS_DAC_DATA(Data1)); - assert_param(IS_DAC_DATA(Data2)); - - /* Calculate and set dual DAC data holding register value */ - if (Alignment == DAC_ALIGN_8B_R) - { - data = ((uint32_t)Data2 << 8) | Data1; - } - else - { - data = ((uint32_t)Data2 << 16) | Data1; - } - - tmp = (uint32_t)hdac->Instance; - tmp += DAC_DHR12RD_ALIGNMENT(Alignment); - - /* Set the dual DAC selected data holding register */ - *(__IO uint32_t *)tmp = data; - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Conversion complete callback in non-blocking mode for Channel2. - * @param hdac: pointer to a DAC_HandleTypeDef structure that contains - * the configuration information for the specified DAC. - * @retval None - */ -__weak void HAL_DACEx_ConvCpltCallbackCh2(DAC_HandleTypeDef* hdac) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_DACEx_ConvCpltCallbackCh2 could be implemented in the user file - */ -} - -/** - * @brief Conversion half DMA transfer callback in non-blocking mode for Channel2. - * @param hdac: pointer to a DAC_HandleTypeDef structure that contains - * the configuration information for the specified DAC. - * @retval None - */ -__weak void HAL_DACEx_ConvHalfCpltCallbackCh2(DAC_HandleTypeDef* hdac) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_DACEx_ConvHalfCpltCallbackCh2 could be implemented in the user file - */ -} - -/** - * @brief Error DAC callback for Channel2. - * @param hdac: pointer to a DAC_HandleTypeDef structure that contains - * the configuration information for the specified DAC. - * @retval None - */ -__weak void HAL_DACEx_ErrorCallbackCh2(DAC_HandleTypeDef *hdac) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_DACEx_ErrorCallbackCh2 could be implemented in the user file - */ -} - -/** - * @brief DMA underrun DAC callback for Channel2. - * @param hdac: pointer to a DAC_HandleTypeDef structure that contains - * the configuration information for the specified DAC. - * @retval None - */ -__weak void HAL_DACEx_DMAUnderrunCallbackCh2(DAC_HandleTypeDef *hdac) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_DACEx_DMAUnderrunCallbackCh2 could be implemented in the user file - */ -} - -/** - * @brief Run the self calibration of one DAC channel. - * @param hdac: pointer to a DAC_HandleTypeDef structure that contains - * the configuration information for the specified DAC. - * @param sConfig: DAC channel configuration structure. - * @param Channel: The selected DAC channel. - * This parameter can be one of the following values: - * @arg DAC_CHANNEL_1: DAC Channel1 selected - * @arg DAC_CHANNEL_2: DAC Channel2 selected - * @retval Updates DAC_TrimmingValue. , DAC_UserTrimming set to DAC_UserTrimming - * @retval HAL status - * @note Calibration runs about 7 ms. - */ - -HAL_StatusTypeDef HAL_DACEx_SelfCalibrate (DAC_HandleTypeDef* hdac, DAC_ChannelConfTypeDef* sConfig, uint32_t Channel) -{ - HAL_StatusTypeDef status = HAL_OK; - - __IO uint32_t tmp = 0; - uint32_t trimmingvalue = 0; - uint32_t delta; - - /* store/restore channel configuration structure purpose */ - uint32_t oldmodeconfiguration = 0; - - /* Check the parameters */ - assert_param(IS_DAC_CHANNEL(Channel)); - - /* Check the DAC handle allocation */ - /* Check if DAC running */ - if((hdac == NULL) || (hdac->State == HAL_DAC_STATE_BUSY)) - { - status = HAL_ERROR; - } - - /* Process locked */ - __HAL_LOCK(hdac); - - /* Store configuration */ - oldmodeconfiguration = (hdac->Instance->MCR & (DAC_MCR_MODE1 << Channel)); - - /* Disable the selected DAC channel */ - CLEAR_BIT ((hdac->Instance->CR), (DAC_CR_EN1 << Channel)); - - /* Set mode in MCR for calibration */ - MODIFY_REG(hdac->Instance->MCR, (DAC_MCR_MODE1 << Channel), 0); - - /* Set DAC Channel1 DHR register to the middle value */ - /* HAL_DAC_SetValue(hdac, Channel, DAC_ALIGN_12B_R, 0x0800); */ - tmp = (uint32_t)hdac->Instance; - if(Channel == DAC_CHANNEL_1) - { - tmp += DAC_DHR12R1_ALIGNMENT(DAC_ALIGN_12B_R); - } - else - { - tmp += DAC_DHR12R2_ALIGNMENT(DAC_ALIGN_12B_R); - } - *(__IO uint32_t *) tmp = 0x0800; - - /* Enable the selected DAC channel calibration */ - /* i.e. set DAC_CR_CENx bit */ - SET_BIT ((hdac->Instance->CR), (DAC_CR_CEN1 << Channel)); - - /* Init trimming counter */ - /* Medium value */ - trimmingvalue = 16; - delta = 8; - while (delta != 0) - { - /* Set candidate trimming */ - MODIFY_REG(hdac->Instance->CCR, (DAC_CCR_OTRIM1<<Channel), (trimmingvalue<<Channel)); - - /* tOFFTRIMmax delay x ms as per datasheet (electrical characteristics */ - /* i.e. minimum time needed between two calibration steps */ - HAL_Delay(1); - - if ((hdac->Instance->SR & (DAC_SR_CAL_FLAG1<<Channel)) == RESET) - { - /* DAC_SR_CAL_FLAGx is HIGH try higher trimming */ - trimmingvalue += delta; - } - else - { - /* DAC_SR_CAL_FLAGx is LOW try lower trimming */ - trimmingvalue -= delta; - } - delta >>= 1; - } - - /* Still need to check if right calibration is current value or one step below */ - /* Indeed the first value that causes the DAC_SR_CAL_FLAGx bit to change from 0 to 1 */ - /* Set candidate trimming */ - MODIFY_REG(hdac->Instance->CCR, (DAC_CCR_OTRIM1<<Channel), (trimmingvalue<<Channel)); - - /* tOFFTRIMmax delay x ms as per datasheet (electrical characteristics */ - /* i.e. minimum time needed between two calibration steps */ - HAL_Delay(1); - - if ((hdac->Instance->SR & (DAC_SR_CAL_FLAG1<<Channel)) == RESET) - { - /* OPAMP_CSR_OUTCAL is actually one value more */ - trimmingvalue++; - /* Set right trimming */ - MODIFY_REG(hdac->Instance->CCR, (DAC_CCR_OTRIM1<<Channel), (trimmingvalue<<Channel)); - } - - /* Disable the selected DAC channel calibration */ - /* i.e. clear DAC_CR_CENx bit */ - CLEAR_BIT ((hdac->Instance->CR), (DAC_CR_CEN1 << Channel)); - - sConfig->DAC_TrimmingValue = trimmingvalue; - sConfig->DAC_UserTrimming = DAC_TRIMMING_USER; - - /* Restore configuration */ - MODIFY_REG(hdac->Instance->MCR, (DAC_MCR_MODE1 << Channel), oldmodeconfiguration); - - /* Process unlocked */ - __HAL_UNLOCK(hdac); - - return status; -} - -/** - * @brief Set the trimming mode and trimming value (user trimming mode applied). - * @param hdac: pointer to a DAC_HandleTypeDef structure that contains - * the configuration information for the specified DAC. - * @param sConfig: DAC configuration structure updated with new DAC trimming value. - * @param Channel: The selected DAC channel. - * This parameter can be one of the following values: - * @arg DAC_CHANNEL_1: DAC Channel1 selected - * @arg DAC_CHANNEL_2: DAC Channel2 selected - * @param NewTrimmingValue: DAC new trimming value - * @retval HAL status - */ - -HAL_StatusTypeDef HAL_DACEx_SetUserTrimming (DAC_HandleTypeDef* hdac, DAC_ChannelConfTypeDef* sConfig, uint32_t Channel, uint32_t NewTrimmingValue) -{ - HAL_StatusTypeDef status = HAL_OK; - - /* Check the parameters */ - assert_param(IS_DAC_CHANNEL(Channel)); - assert_param(IS_DAC_NEWTRIMMINGVALUE(NewTrimmingValue)); - - /* Check the DAC handle allocation */ - if(hdac == NULL) - { - status = HAL_ERROR; - } - - /* Process locked */ - __HAL_LOCK(hdac); - - /* Set new trimming */ - MODIFY_REG(hdac->Instance->CCR, (DAC_CCR_OTRIM1<<Channel), (NewTrimmingValue<<Channel)); - - /* Update trimming mode */ - sConfig->DAC_UserTrimming = DAC_TRIMMING_USER; - sConfig->DAC_TrimmingValue = NewTrimmingValue; - - /* Process unlocked */ - __HAL_UNLOCK(hdac); - - return status; -} - -/** - * @brief Return the DAC trimming value. - * @param hdac : DAC handle - * @param Channel: The selected DAC channel. - * This parameter can be one of the following values: - * @arg DAC_CHANNEL_1: DAC Channel1 selected - * @arg DAC_CHANNEL_2: DAC Channel2 selected - * @retval Trimming value : range: 0->31 - * - */ - -uint32_t HAL_DACEx_GetTrimOffset (DAC_HandleTypeDef *hdac, uint32_t Channel) -{ - uint32_t trimmingvalue = 0; - - /* Check the DAC handle allocation */ - /* And not in Reset state */ - if((hdac == NULL) || (hdac->State == HAL_DAC_STATE_RESET)) - { - return HAL_ERROR; - } - else - { - /* Check the parameter */ - assert_param(IS_DAC_CHANNEL(Channel)); - - /* Retrieve trimming */ - trimmingvalue = ((hdac->Instance->CCR & (DAC_CCR_OTRIM1 << Channel)) >> Channel); - } - return trimmingvalue; -} - -/** - * @} - */ - -/** @defgroup DACEx_Exported_Functions_Group3 Peripheral Control functions - * @brief Extended Peripheral Control functions - * -@verbatim - ============================================================================== - ##### Peripheral Control functions ##### - ============================================================================== - [..] This section provides functions allowing to: - (+) Configure channels. - (+) Set the specified data holding register value for DAC channel. - -@endverbatim - * @{ - */ - -/** - * @brief Return the last data output value of the selected DAC channel. - * @param hdac: pointer to a DAC_HandleTypeDef structure that contains - * the configuration information for the specified DAC. - * @retval The selected DAC channel data output value. - */ -uint32_t HAL_DACEx_DualGetValue(DAC_HandleTypeDef* hdac) -{ - uint32_t tmp = 0; - - tmp |= hdac->Instance->DOR1; - - tmp |= hdac->Instance->DOR2 << 16; - - /* Returns the DAC channel data output register value */ - return tmp; -} - -/** - * @} - */ - -/** - * @} - */ - -/* Private functions ---------------------------------------------------------*/ -/** @defgroup DACEx_Private_Functions DACEx private functions - * @brief Extended private functions - * @{ - */ - -/** - * @brief DMA conversion complete callback. - * @param hdma: pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA module. - * @retval None - */ -void DAC_DMAConvCpltCh2(DMA_HandleTypeDef *hdma) -{ - DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; - - HAL_DACEx_ConvCpltCallbackCh2(hdac); - - hdac->State= HAL_DAC_STATE_READY; -} - -/** - * @brief DMA half transfer complete callback. - * @param hdma: pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA module. - * @retval None - */ -void DAC_DMAHalfConvCpltCh2(DMA_HandleTypeDef *hdma) -{ - DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; - /* Conversion complete callback */ - HAL_DACEx_ConvHalfCpltCallbackCh2(hdac); -} - -/** - * @brief DMA error callback. - * @param hdma: pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA module. - * @retval None - */ -void DAC_DMAErrorCh2(DMA_HandleTypeDef *hdma) -{ - DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; - - /* Set DAC error code to DMA error */ - hdac->ErrorCode |= HAL_DAC_ERROR_DMA; - - HAL_DACEx_ErrorCallbackCh2(hdac); - - hdac->State= HAL_DAC_STATE_READY; -} - -/** - * @} - */ - -#endif /* HAL_DAC_MODULE_ENABLED */ - -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ -
--- a/Src/stm32l4xx_hal_firewall.c Thu Nov 12 20:49:49 2015 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,309 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_firewall.c - * @author MCD Application Team - * @version V1.1.0 - * @date 16-September-2015 - * @brief FIREWALL HAL module driver. - * This file provides firmware functions to manage the Firewall - * Peripheral initialization and enabling. - * - * - @verbatim - =============================================================================== - ##### How to use this driver ##### - =============================================================================== - [..] - The FIREWALL HAL driver can be used as follows: - - (#) Declare a FIREWALL_InitTypeDef initialization structure. - - (#) Resort to HAL_FIREWALL_Config() API to initialize the Firewall - - (#) Enable the FIREWALL in calling HAL_FIREWALL_EnableFirewall() API - - (#) To ensure that any code executed outside the protected segment closes the - FIREWALL, the user must set the flag FIREWALL_PRE_ARM_SET in calling - __HAL_FIREWALL_PREARM_ENABLE() macro if called within a protected code segment - or - HAL_FIREWALL_EnablePreArmFlag() API if called outside of protected code segment - after HAL_FIREWALL_Config() call. - - - @endverbatim - ****************************************************************************** - * @attention - * - * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @defgroup FIREWALL FIREWALL - * @brief HAL FIREWALL module driver - * @{ - */ -#ifdef HAL_FIREWALL_MODULE_ENABLED - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -/* Private macro -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ -/* Private functions ---------------------------------------------------------*/ - - -/** @defgroup FIREWALL_Exported_Functions FIREWALL Exported Functions - * @{ - */ - -/** @defgroup FIREWALL_Exported_Functions_Group1 Initialization Functions - * @brief Initialization and Configuration Functions - * -@verbatim -=============================================================================== - ##### Initialization and Configuration functions ##### - =============================================================================== - [..] - This subsection provides the functions allowing to initialize the Firewall. - Initialization is done by HAL_FIREWALL_Config(): - - (+) Enable the Firewall clock thru __HAL_RCC_FIREWALL_CLK_ENABLE() macro. - - (+) Set the protected code segment address start and length. - - (+) Set the protected non-volatile and/or volatile data segments - address starts and lengths if applicable. - - (+) Set the volatile data segment execution and sharing status. - - (+) Length must be set to 0 for an unprotected segment. - -@endverbatim - * @{ - */ - -/** - * @brief Initialize the Firewall according to the FIREWALL_InitTypeDef structure parameters. - * @param fw_init: Firewall initialization structure - * @note The API returns HAL_ERROR if the Firewall is already enabled. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_FIREWALL_Config(FIREWALL_InitTypeDef * fw_init) -{ - /* Check the Firewall initialization structure allocation */ - if(fw_init == NULL) - { - return HAL_ERROR; - } - - /* Enable Firewall clock */ - __HAL_RCC_FIREWALL_CLK_ENABLE(); - - /* Make sure that Firewall is not enabled already */ - if (__HAL_FIREWALL_IS_ENABLED() != RESET) - { - return HAL_ERROR; - } - - /* Check Firewall configuration addresses and lengths when segment is protected */ - /* Code segment */ - if (fw_init->CodeSegmentLength != 0) - { - assert_param(IS_FIREWALL_CODE_SEGMENT_ADDRESS(fw_init->CodeSegmentStartAddress)); - assert_param(IS_FIREWALL_CODE_SEGMENT_LENGTH(fw_init->CodeSegmentStartAddress, fw_init->CodeSegmentLength)); - } - /* Non volatile data segment */ - if (fw_init->NonVDataSegmentLength != 0) - { - assert_param(IS_FIREWALL_NONVOLATILEDATA_SEGMENT_ADDRESS(fw_init->NonVDataSegmentStartAddress)); - assert_param(IS_FIREWALL_NONVOLATILEDATA_SEGMENT_LENGTH(fw_init->NonVDataSegmentStartAddress, fw_init->NonVDataSegmentLength)); - } - /* Volatile data segment */ - if (fw_init->VDataSegmentLength != 0) - { - assert_param(IS_FIREWALL_VOLATILEDATA_SEGMENT_ADDRESS(fw_init->VDataSegmentStartAddress)); - assert_param(IS_FIREWALL_VOLATILEDATA_SEGMENT_LENGTH(fw_init->VDataSegmentStartAddress, fw_init->VDataSegmentLength)); - } - - /* Check Firewall Configuration Register parameters */ - assert_param(IS_FIREWALL_VOLATILEDATA_EXECUTE(fw_init->VolatileDataExecution)); - assert_param(IS_FIREWALL_VOLATILEDATA_SHARE(fw_init->VolatileDataShared)); - - - /* Configuration */ - - /* Protected code segment start address configuration */ - WRITE_REG(FIREWALL->CSSA, (FW_CSSA_ADD & fw_init->CodeSegmentStartAddress)); - /* Protected code segment length configuration */ - WRITE_REG(FIREWALL->CSL, (FW_CSL_LENG & fw_init->CodeSegmentLength)); - - /* Protected non volatile data segment start address configuration */ - WRITE_REG(FIREWALL->NVDSSA, (FW_NVDSSA_ADD & fw_init->NonVDataSegmentStartAddress)); - /* Protected non volatile data segment length configuration */ - WRITE_REG(FIREWALL->NVDSL, (FW_NVDSL_LENG & fw_init->NonVDataSegmentLength)); - - /* Protected volatile data segment start address configuration */ - WRITE_REG(FIREWALL->VDSSA, (FW_VDSSA_ADD & fw_init->VDataSegmentStartAddress)); - /* Protected volatile data segment length configuration */ - WRITE_REG(FIREWALL->VDSL, (FW_VDSL_LENG & fw_init->VDataSegmentLength)); - - /* Set Firewall Configuration Register VDE and VDS bits - (volatile data execution and shared configuration) */ - MODIFY_REG(FIREWALL->CR, FW_CR_VDS|FW_CR_VDE, fw_init->VolatileDataExecution|fw_init->VolatileDataShared); - - return HAL_OK; -} - -/** - * @brief Retrieve the Firewall configuration. - * @param fw_config: Firewall configuration, type is same as initialization structure - * @note This API can't be executed inside a code area protected by the Firewall - * when the Firewall is enabled - * @note If NVDSL register is different from 0, that is, if the non volatile data segment - * is defined, this API can't be executed when the Firewall is enabled. - * @note User should resort to __HAL_FIREWALL_GET_PREARM() macro to retrieve FPA bit status - * @retval None - */ -void HAL_FIREWALL_GetConfig(FIREWALL_InitTypeDef * fw_config) -{ - - /* Enable Firewall clock, in case no Firewall configuration has been carried - out up to this point */ - __HAL_RCC_FIREWALL_CLK_ENABLE(); - - /* Retrieve code segment protection setting */ - fw_config->CodeSegmentStartAddress = (READ_REG(FIREWALL->CSSA) & FW_CSSA_ADD); - fw_config->CodeSegmentLength = (READ_REG(FIREWALL->CSL) & FW_CSL_LENG); - - /* Retrieve non volatile data segment protection setting */ - fw_config->NonVDataSegmentStartAddress = (READ_REG(FIREWALL->NVDSSA) & FW_NVDSSA_ADD); - fw_config->NonVDataSegmentLength = (READ_REG(FIREWALL->NVDSL) & FW_NVDSL_LENG); - - /* Retrieve volatile data segment protection setting */ - fw_config->VDataSegmentStartAddress = (READ_REG(FIREWALL->VDSSA) & FW_VDSSA_ADD); - fw_config->VDataSegmentLength = (READ_REG(FIREWALL->VDSL) & FW_VDSL_LENG); - - /* Retrieve volatile data execution setting */ - fw_config->VolatileDataExecution = (READ_REG(FIREWALL->CR) & FW_CR_VDE); - - /* Retrieve volatile data shared setting */ - fw_config->VolatileDataShared = (READ_REG(FIREWALL->CR) & FW_CR_VDS); - - return; -} - - - -/** - * @brief Enable FIREWALL. - * @note Firewall is enabled in clearing FWDIS bit of SYSCFG CFGR1 register. - * Once enabled, the Firewall cannot be disabled by software. Only a - * system reset can set again FWDIS bit. - * @retval None - */ -void HAL_FIREWALL_EnableFirewall(void) -{ - /* Clears FWDIS bit of SYSCFG CFGR1 register */ - CLEAR_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_FWDIS); - -} - -/** - * @brief Enable FIREWALL pre arm. - * @note When FPA bit is set, any code executed outside the protected segment - * will close the Firewall. - * @note This API provides the same service as __HAL_FIREWALL_PREARM_ENABLE() macro - * but can't be executed inside a code area protected by the Firewall. - * @note When the Firewall is disabled, user can resort to HAL_FIREWALL_EnablePreArmFlag() API any time. - * @note When the Firewall is enabled and NVDSL register is equal to 0 (that is, - * when the non volatile data segment is not defined), - * ** this API can be executed when the Firewall is closed - * ** when the Firewall is opened, user should resort to - * __HAL_FIREWALL_PREARM_ENABLE() macro instead - * @note When the Firewall is enabled and NVDSL register is different from 0 - * (that is, when the non volatile data segment is defined) - * ** FW_CR register can be accessed only when the Firewall is opened: - * user should resort to __HAL_FIREWALL_PREARM_ENABLE() macro instead. - * @retval None - */ -void HAL_FIREWALL_EnablePreArmFlag(void) -{ - /* Set FPA bit */ - SET_BIT(FIREWALL->CR, FW_CR_FPA); -} - - -/** - * @brief Disable FIREWALL pre arm. - * @note When FPA bit is reset, any code executed outside the protected segment - * when the Firewall is opened will generate a system reset. - * @note This API provides the same service as __HAL_FIREWALL_PREARM_DISABLE() macro - * but can't be executed inside a code area protected by the Firewall. - * @note When the Firewall is disabled, user can resort to HAL_FIREWALL_EnablePreArmFlag() API any time. - * @note When the Firewall is enabled and NVDSL register is equal to 0 (that is, - * when the non volatile data segment is not defined), - * ** this API can be executed when the Firewall is closed - * ** when the Firewall is opened, user should resort to - * __HAL_FIREWALL_PREARM_DISABLE() macro instead - * @note When the Firewall is enabled and NVDSL register is different from 0 - * (that is, when the non volatile data segment is defined) - * ** FW_CR register can be accessed only when the Firewall is opened: - * user should resort to __HAL_FIREWALL_PREARM_DISABLE() macro instead. - - * @retval None - */ -void HAL_FIREWALL_DisablePreArmFlag(void) -{ - /* Clear FPA bit */ - CLEAR_BIT(FIREWALL->CR, FW_CR_FPA); -} - -/** - * @} - */ - -/** - * @} - */ - -#endif /* HAL_FIREWALL_MODULE_ENABLED */ -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ -
--- a/Src/stm32l4xx_hal_hcd.c Thu Nov 12 20:49:49 2015 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,1224 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_hcd.c - * @author MCD Application Team - * @version V1.1.0 - * @date 16-September-2015 - * @brief HCD HAL module driver. - * This file provides firmware functions to manage the following - * functionalities of the USB Peripheral Controller: - * + Initialization and de-initialization functions - * + IO operation functions - * + Peripheral Control functions - * + Peripheral State functions - * - @verbatim - ============================================================================== - ##### How to use this driver ##### - ============================================================================== - [..] - (#)Declare a HCD_HandleTypeDef handle structure, for example: - HCD_HandleTypeDef hhcd; - - (#)Fill parameters of Init structure in HCD handle - - (#)Call HAL_HCD_Init() API to initialize the HCD peripheral (Core, Host core, ...) - - (#)Initialize the HCD low level resources through the HAL_HCD_MspInit() API: - (##) Enable the HCD/USB Low Level interface clock using the following macro - (+++) __HAL_RCC_USB_OTG_FS_CLK_ENABLE() - - (##) Initialize the related GPIO clocks - (##) Configure HCD pin-out - (##) Configure HCD NVIC interrupt - - (#)Associate the Upper USB Host stack to the HAL HCD Driver: - (##) hhcd.pData = phost; - - (#)Enable HCD transmission and reception: - (##) HAL_HCD_Start(); - - @endverbatim - ****************************************************************************** - * @attention - * - * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal.h" - -#if defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @defgroup HCD HCD - * @brief HCD HAL module driver - * @{ - */ - -#ifdef HAL_HCD_MODULE_ENABLED - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -/* Private macro -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ -/** @defgroup HCD_Private_Functions HCD Private Functions - * @{ - */ -static void HCD_HC_IN_IRQHandler(HCD_HandleTypeDef *hhcd, uint8_t chnum); -static void HCD_HC_OUT_IRQHandler(HCD_HandleTypeDef *hhcd, uint8_t chnum); -static void HCD_RXQLVL_IRQHandler(HCD_HandleTypeDef *hhcd); -static void HCD_Port_IRQHandler(HCD_HandleTypeDef *hhcd); -/** - * @} - */ - -/* Exported functions --------------------------------------------------------*/ -/** @defgroup HCD_Exported_Functions HCD Exported Functions - * @{ - */ - -/** @defgroup HCD_Exported_Functions_Group1 Initialization and de-initialization functions - * @brief Initialization and Configuration functions - * -@verbatim - =============================================================================== - ##### Initialization and de-initialization functions ##### - =============================================================================== - [..] This section provides functions allowing to: - -@endverbatim - * @{ - */ - -/** - * @brief Initialize the Host driver. - * @param hhcd: HCD handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_HCD_Init(HCD_HandleTypeDef *hhcd) -{ - /* Check the HCD handle allocation */ - if(hhcd == NULL) - { - return HAL_ERROR; - } - - /* Check the parameters */ - assert_param(IS_HCD_ALL_INSTANCE(hhcd->Instance)); - - if(hhcd->State == HAL_HCD_STATE_RESET) - { - /* Allocate lock resource and initialize it */ - hhcd->Lock = HAL_UNLOCKED; - - /* Init the low level hardware : GPIO, CLOCK, NVIC... */ - HAL_HCD_MspInit(hhcd); - } - - hhcd->State = HAL_HCD_STATE_BUSY; - - /* Disable the Interrupts */ - __HAL_HCD_DISABLE(hhcd); - - /*Init the Core (common init.) */ - USB_CoreInit(hhcd->Instance, hhcd->Init); - - /* Force Host Mode*/ - USB_SetCurrentMode(hhcd->Instance , USB_OTG_HOST_MODE); - - /* Init Host */ - USB_HostInit(hhcd->Instance, hhcd->Init); - - hhcd->State= HAL_HCD_STATE_READY; - - return HAL_OK; -} - -/** - * @brief Initialize a Host channel. - * @param hhcd: HCD handle - * @param ch_num: Channel number. - * This parameter can be a value from 1 to 15 - * @param epnum: Endpoint number. - * This parameter can be a value from 1 to 15 - * @param dev_address : Current device address - * This parameter can be a value from 0 to 255 - * @param speed: Current device speed. - * This parameter can be one of these values: - * HCD_SPEED_HIGH: High speed mode, - * HCD_SPEED_FULL: Full speed mode, - * HCD_SPEED_LOW: Low speed mode - * @param ep_type: Endpoint Type. - * This parameter can be one of these values: - * EP_TYPE_CTRL: Control type, - * EP_TYPE_ISOC: Isochronous type, - * EP_TYPE_BULK: Bulk type, - * EP_TYPE_INTR: Interrupt type - * @param mps: Max Packet Size. - * This parameter can be a value from 0 to32K - * @retval HAL status - */ -HAL_StatusTypeDef HAL_HCD_HC_Init(HCD_HandleTypeDef *hhcd, - uint8_t ch_num, - uint8_t epnum, - uint8_t dev_address, - uint8_t speed, - uint8_t ep_type, - uint16_t mps) -{ - HAL_StatusTypeDef status = HAL_OK; - - __HAL_LOCK(hhcd); - - hhcd->hc[ch_num].dev_addr = dev_address; - hhcd->hc[ch_num].max_packet = mps; - hhcd->hc[ch_num].ch_num = ch_num; - hhcd->hc[ch_num].ep_type = ep_type; - hhcd->hc[ch_num].ep_num = epnum & 0x7F; - hhcd->hc[ch_num].ep_is_in = ((epnum & 0x80) == 0x80); - hhcd->hc[ch_num].speed = speed; - - status = USB_HC_Init(hhcd->Instance, - ch_num, - epnum, - dev_address, - speed, - ep_type, - mps); - __HAL_UNLOCK(hhcd); - - return status; -} - -/** - * @brief Halt a Host channel. - * @param hhcd: HCD handle - * @param ch_num: Channel number. - * This parameter can be a value from 1 to 15 - * @retval HAL status - */ -HAL_StatusTypeDef HAL_HCD_HC_Halt(HCD_HandleTypeDef *hhcd, uint8_t ch_num) -{ - HAL_StatusTypeDef status = HAL_OK; - - __HAL_LOCK(hhcd); - USB_HC_Halt(hhcd->Instance, ch_num); - __HAL_UNLOCK(hhcd); - - return status; -} - -/** - * @brief DeInitialize the Host driver. - * @param hhcd: HCD handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_HCD_DeInit(HCD_HandleTypeDef *hhcd) -{ - /* Check the HCD handle allocation */ - if(hhcd == NULL) - { - return HAL_ERROR; - } - - hhcd->State = HAL_HCD_STATE_BUSY; - - /* DeInit the low level hardware */ - HAL_HCD_MspDeInit(hhcd); - - __HAL_HCD_DISABLE(hhcd); - - hhcd->State = HAL_HCD_STATE_RESET; - - return HAL_OK; -} - -/** - * @brief Initialize the HCD MSP. - * @param hhcd: HCD handle - * @retval None - */ -__weak void HAL_HCD_MspInit(HCD_HandleTypeDef *hhcd) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_PCD_MspInit could be implemented in the user file - */ -} - -/** - * @brief DeInitialize the HCD MSP. - * @param hhcd: HCD handle - * @retval None - */ -__weak void HAL_HCD_MspDeInit(HCD_HandleTypeDef *hhcd) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_PCD_MspDeInit could be implemented in the user file - */ -} - -/** - * @} - */ - -/** @defgroup HCD_Exported_Functions_Group2 Input and Output operation functions - * @brief HCD IO operation functions - * -@verbatim - =============================================================================== - ##### IO operation functions ##### - =============================================================================== - [..] This subsection provides a set of functions allowing to manage the USB Host Data - Transfer - -@endverbatim - * @{ - */ - -/** - * @brief Submit a new URB for processing. - * @param hhcd: HCD handle - * @param ch_num: Channel number. - * This parameter can be a value from 1 to 15 - * @param direction: Channel number. - * This parameter can be one of these values: - * 0 : Output / 1 : Input - * @param ep_type: Endpoint Type. - * This parameter can be one of these values: - * EP_TYPE_CTRL: Control type/ - * EP_TYPE_ISOC: Isochronous type/ - * EP_TYPE_BULK: Bulk type/ - * EP_TYPE_INTR: Interrupt type/ - * @param token: Endpoint Type. - * This parameter can be one of these values: - * 0: HC_PID_SETUP / 1: HC_PID_DATA1 - * @param pbuff: pointer to URB data - * @param length: Length of URB data - * @param do_ping: activate do ping protocol (for high speed only). - * This parameter can be one of these values: - * 0 : do ping inactive / 1 : do ping active - * @retval HAL status - */ -HAL_StatusTypeDef HAL_HCD_HC_SubmitRequest(HCD_HandleTypeDef *hhcd, - uint8_t ch_num, - uint8_t direction , - uint8_t ep_type, - uint8_t token, - uint8_t* pbuff, - uint16_t length, - uint8_t do_ping) -{ - hhcd->hc[ch_num].ep_is_in = direction; - hhcd->hc[ch_num].ep_type = ep_type; - - if(token == 0) - { - hhcd->hc[ch_num].data_pid = HC_PID_SETUP; - } - else - { - hhcd->hc[ch_num].data_pid = HC_PID_DATA1; - } - - /* Manage Data Toggle */ - switch(ep_type) - { - case EP_TYPE_CTRL: - if((token == 1) && (direction == 0)) /*send data */ - { - if ( length == 0 ) - { /* For Status OUT stage, Length==0, Status Out PID = 1 */ - hhcd->hc[ch_num].toggle_out = 1; - } - - /* Set the Data Toggle bit as per the Flag */ - if ( hhcd->hc[ch_num].toggle_out == 0) - { /* Put the PID 0 */ - hhcd->hc[ch_num].data_pid = HC_PID_DATA0; - } - else - { /* Put the PID 1 */ - hhcd->hc[ch_num].data_pid = HC_PID_DATA1 ; - } - if(hhcd->hc[ch_num].urb_state != URB_NOTREADY) - { - hhcd->hc[ch_num].do_ping = do_ping; - } - } - break; - - case EP_TYPE_BULK: - if(direction == 0) - { - /* Set the Data Toggle bit as per the Flag */ - if ( hhcd->hc[ch_num].toggle_out == 0) - { /* Put the PID 0 */ - hhcd->hc[ch_num].data_pid = HC_PID_DATA0; - } - else - { /* Put the PID 1 */ - hhcd->hc[ch_num].data_pid = HC_PID_DATA1 ; - } - if(hhcd->hc[ch_num].urb_state != URB_NOTREADY) - { - hhcd->hc[ch_num].do_ping = do_ping; - } - } - else - { - if( hhcd->hc[ch_num].toggle_in == 0) - { - hhcd->hc[ch_num].data_pid = HC_PID_DATA0; - } - else - { - hhcd->hc[ch_num].data_pid = HC_PID_DATA1; - } - } - - break; - case EP_TYPE_INTR: - if(direction == 0) - { - /* Set the Data Toggle bit as per the Flag */ - if ( hhcd->hc[ch_num].toggle_out == 0) - { /* Put the PID 0 */ - hhcd->hc[ch_num].data_pid = HC_PID_DATA0; - } - else - { /* Put the PID 1 */ - hhcd->hc[ch_num].data_pid = HC_PID_DATA1 ; - } - } - else - { - if( hhcd->hc[ch_num].toggle_in == 0) - { - hhcd->hc[ch_num].data_pid = HC_PID_DATA0; - } - else - { - hhcd->hc[ch_num].data_pid = HC_PID_DATA1; - } - } - break; - - case EP_TYPE_ISOC: - hhcd->hc[ch_num].data_pid = HC_PID_DATA0; - break; - } - - hhcd->hc[ch_num].xfer_buff = pbuff; - hhcd->hc[ch_num].xfer_len = length; - hhcd->hc[ch_num].urb_state = URB_IDLE; - hhcd->hc[ch_num].xfer_count = 0 ; - hhcd->hc[ch_num].ch_num = ch_num; - hhcd->hc[ch_num].state = HC_IDLE; - - return USB_HC_StartXfer(hhcd->Instance, &(hhcd->hc[ch_num]), hhcd->Init.dma_enable); -} - -/** - * @brief Handle HCD interrupt request. - * @param hhcd: HCD handle - * @retval None - */ -void HAL_HCD_IRQHandler(HCD_HandleTypeDef *hhcd) -{ - USB_OTG_GlobalTypeDef *USBx = hhcd->Instance; - uint32_t i = 0 , interrupt = 0; - - /* ensure that we are in device mode */ - if (USB_GetMode(hhcd->Instance) == USB_OTG_MODE_HOST) - { - /* avoid spurious interrupt */ - if(__HAL_HCD_IS_INVALID_INTERRUPT(hhcd)) - { - return; - } - - if(__HAL_HCD_GET_FLAG(hhcd, USB_OTG_GINTSTS_PXFR_INCOMPISOOUT)) - { - /* incorrect mode, acknowledge the interrupt */ - __HAL_HCD_CLEAR_FLAG(hhcd, USB_OTG_GINTSTS_PXFR_INCOMPISOOUT); - } - - if(__HAL_HCD_GET_FLAG(hhcd, USB_OTG_GINTSTS_IISOIXFR)) - { - /* incorrect mode, acknowledge the interrupt */ - __HAL_HCD_CLEAR_FLAG(hhcd, USB_OTG_GINTSTS_IISOIXFR); - } - - if(__HAL_HCD_GET_FLAG(hhcd, USB_OTG_GINTSTS_PTXFE)) - { - /* incorrect mode, acknowledge the interrupt */ - __HAL_HCD_CLEAR_FLAG(hhcd, USB_OTG_GINTSTS_PTXFE); - } - - if(__HAL_HCD_GET_FLAG(hhcd, USB_OTG_GINTSTS_MMIS)) - { - /* incorrect mode, acknowledge the interrupt */ - __HAL_HCD_CLEAR_FLAG(hhcd, USB_OTG_GINTSTS_MMIS); - } - - /* Handle Host Disconnect Interrupts */ - if(__HAL_HCD_GET_FLAG(hhcd, USB_OTG_GINTSTS_DISCINT)) - { - - /* Cleanup HPRT */ - USBx_HPRT0 &= ~(USB_OTG_HPRT_PENA | USB_OTG_HPRT_PCDET |\ - USB_OTG_HPRT_PENCHNG | USB_OTG_HPRT_POCCHNG ); - - /* Handle Host Port Interrupts */ - HAL_HCD_Disconnect_Callback(hhcd); - USB_InitFSLSPClkSel(hhcd->Instance ,HCFG_48_MHZ ); - __HAL_HCD_CLEAR_FLAG(hhcd, USB_OTG_GINTSTS_DISCINT); - } - - /* Handle Host Port Interrupts */ - if(__HAL_HCD_GET_FLAG(hhcd, USB_OTG_GINTSTS_HPRTINT)) - { - HCD_Port_IRQHandler (hhcd); - } - - /* Handle Host SOF Interrupts */ - if(__HAL_HCD_GET_FLAG(hhcd, USB_OTG_GINTSTS_SOF)) - { - HAL_HCD_SOF_Callback(hhcd); - __HAL_HCD_CLEAR_FLAG(hhcd, USB_OTG_GINTSTS_SOF); - } - - /* Handle Host channel Interrupts */ - if(__HAL_HCD_GET_FLAG(hhcd, USB_OTG_GINTSTS_HCINT)) - { - interrupt = USB_HC_ReadInterrupt(hhcd->Instance); - for (i = 0; i < hhcd->Init.Host_channels ; i++) - { - if (interrupt & (1 << i)) - { - if ((USBx_HC(i)->HCCHAR) & USB_OTG_HCCHAR_EPDIR) - { - HCD_HC_IN_IRQHandler (hhcd, i); - } - else - { - HCD_HC_OUT_IRQHandler (hhcd, i); - } - } - } - __HAL_HCD_CLEAR_FLAG(hhcd, USB_OTG_GINTSTS_HCINT); - } - - /* Handle Rx Queue Level Interrupts */ - if(__HAL_HCD_GET_FLAG(hhcd, USB_OTG_GINTSTS_RXFLVL)) - { - USB_MASK_INTERRUPT(hhcd->Instance, USB_OTG_GINTSTS_RXFLVL); - - HCD_RXQLVL_IRQHandler (hhcd); - - USB_UNMASK_INTERRUPT(hhcd->Instance, USB_OTG_GINTSTS_RXFLVL); - } - } -} - -/** - * @brief SOF callback. - * @param hhcd: HCD handle - * @retval None - */ -__weak void HAL_HCD_SOF_Callback(HCD_HandleTypeDef *hhcd) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_HCD_SOF_Callback could be implemented in the user file - */ -} - -/** - * @brief Connection Event callback. - * @param hhcd: HCD handle - * @retval None - */ -__weak void HAL_HCD_Connect_Callback(HCD_HandleTypeDef *hhcd) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_HCD_Connect_Callback could be implemented in the user file - */ -} - -/** - * @brief Disconnection Event callback. - * @param hhcd: HCD handle - * @retval None - */ -__weak void HAL_HCD_Disconnect_Callback(HCD_HandleTypeDef *hhcd) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_HCD_Disconnect_Callback could be implemented in the user file - */ -} - -/** - * @brief Notify URB state change callback. - * @param hhcd: HCD handle - * @param chnum: Channel number. - * This parameter can be a value from 1 to 15 - * @param urb_state: - * This parameter can be one of these values: - * URB_IDLE/ - * URB_DONE/ - * URB_NOTREADY/ - * URB_NYET/ - * URB_ERROR/ - * URB_STALL/ - * @retval None - */ -__weak void HAL_HCD_HC_NotifyURBChange_Callback(HCD_HandleTypeDef *hhcd, uint8_t chnum, HCD_URBStateTypeDef urb_state) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_HCD_HC_NotifyURBChange_Callback could be implemented in the user file - */ -} - -/** - * @} - */ - -/** @defgroup HCD_Exported_Functions_Group3 Peripheral Control functions - * @brief Management functions - * -@verbatim - =============================================================================== - ##### Peripheral Control functions ##### - =============================================================================== - [..] - This subsection provides a set of functions allowing to control the HCD data - transfers. - -@endverbatim - * @{ - */ - -/** - * @brief Start the Host driver. - * @param hhcd: HCD handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_HCD_Start(HCD_HandleTypeDef *hhcd) -{ - __HAL_LOCK(hhcd); - __HAL_HCD_ENABLE(hhcd); - USB_DriveVbus(hhcd->Instance, 1); - __HAL_UNLOCK(hhcd); - return HAL_OK; -} - -/** - * @brief Stop the Host driver. - * @param hhcd: HCD handle - * @retval HAL status - */ - -HAL_StatusTypeDef HAL_HCD_Stop(HCD_HandleTypeDef *hhcd) -{ - __HAL_LOCK(hhcd); - USB_StopHost(hhcd->Instance); - __HAL_UNLOCK(hhcd); - return HAL_OK; -} - -/** - * @brief Reset the Host port. - * @param hhcd: HCD handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_HCD_ResetPort(HCD_HandleTypeDef *hhcd) -{ - return (USB_ResetPort(hhcd->Instance)); -} - -/** - * @} - */ - -/** @defgroup HCD_Exported_Functions_Group4 Peripheral State functions - * @brief Peripheral State functions - * -@verbatim - =============================================================================== - ##### Peripheral State functions ##### - =============================================================================== - [..] - This subsection permits to get in run-time the status of the peripheral - and the data flow. - -@endverbatim - * @{ - */ - -/** - * @brief Return the HCD handle state. - * @param hhcd: HCD handle - * @retval HAL state - */ -HCD_StateTypeDef HAL_HCD_GetState(HCD_HandleTypeDef *hhcd) -{ - return hhcd->State; -} - -/** - * @brief Return URB state for a channel. - * @param hhcd: HCD handle - * @param chnum: Channel number. - * This parameter can be a value from 1 to 15 - * @retval URB state. - * This parameter can be one of these values: - * URB_IDLE/ - * URB_DONE/ - * URB_NOTREADY/ - * URB_NYET/ - * URB_ERROR/ - * URB_STALL - */ -HCD_URBStateTypeDef HAL_HCD_HC_GetURBState(HCD_HandleTypeDef *hhcd, uint8_t chnum) -{ - return hhcd->hc[chnum].urb_state; -} - - -/** - * @brief Return the last Host transfer size. - * @param hhcd: HCD handle - * @param chnum: Channel number. - * This parameter can be a value from 1 to 15 - * @retval last transfer size in byte - */ -uint32_t HAL_HCD_HC_GetXferCount(HCD_HandleTypeDef *hhcd, uint8_t chnum) -{ - return hhcd->hc[chnum].xfer_count; -} - -/** - * @brief Return the Host Channel state. - * @param hhcd: HCD handle - * @param chnum: Channel number. - * This parameter can be a value from 1 to 15 - * @retval Host channel state - * This parameter can be one of these values: - * HC_IDLE/ - * HC_XFRC/ - * HC_HALTED/ - * HC_NYET/ - * HC_NAK/ - * HC_STALL/ - * HC_XACTERR/ - * HC_BBLERR/ - * HC_DATATGLERR - */ -HCD_HCStateTypeDef HAL_HCD_HC_GetState(HCD_HandleTypeDef *hhcd, uint8_t chnum) -{ - return hhcd->hc[chnum].state; -} - -/** - * @brief Return the current Host frame number. - * @param hhcd: HCD handle - * @retval Current Host frame number - */ -uint32_t HAL_HCD_GetCurrentFrame(HCD_HandleTypeDef *hhcd) -{ - return (USB_GetCurrentFrame(hhcd->Instance)); -} - -/** - * @brief Return the Host enumeration speed. - * @param hhcd: HCD handle - * @retval Enumeration speed - */ -uint32_t HAL_HCD_GetCurrentSpeed(HCD_HandleTypeDef *hhcd) -{ - return (USB_GetHostSpeed(hhcd->Instance)); -} - -/** - * @} - */ - -/** - * @} - */ - -/** @addtogroup HCD_Private_Functions - * @{ - */ -/** - * @brief Handle Host Channel IN interrupt requests. - * @param hhcd: HCD handle - * @param chnum: Channel number. - * This parameter can be a value from 1 to 15 - * @retval none - */ -static void HCD_HC_IN_IRQHandler (HCD_HandleTypeDef *hhcd, uint8_t chnum) -{ - USB_OTG_GlobalTypeDef *USBx = hhcd->Instance; - uint32_t tmpreg = 0; - - if ((USBx_HC(chnum)->HCINT) & USB_OTG_HCINT_AHBERR) - { - __HAL_HCD_CLEAR_HC_INT(chnum, USB_OTG_HCINT_AHBERR); - __HAL_HCD_UNMASK_HALT_HC_INT(chnum); - } - else if ((USBx_HC(chnum)->HCINT) & USB_OTG_HCINT_ACK) - { - __HAL_HCD_CLEAR_HC_INT(chnum, USB_OTG_HCINT_ACK); - } - - else if ((USBx_HC(chnum)->HCINT) & USB_OTG_HCINT_STALL) - { - __HAL_HCD_UNMASK_HALT_HC_INT(chnum); - hhcd->hc[chnum].state = HC_STALL; - __HAL_HCD_CLEAR_HC_INT(chnum, USB_OTG_HCINT_NAK); - __HAL_HCD_CLEAR_HC_INT(chnum, USB_OTG_HCINT_STALL); - USB_HC_Halt(hhcd->Instance, chnum); - } - else if ((USBx_HC(chnum)->HCINT) & USB_OTG_HCINT_DTERR) - { - __HAL_HCD_UNMASK_HALT_HC_INT(chnum); - USB_HC_Halt(hhcd->Instance, chnum); - __HAL_HCD_CLEAR_HC_INT(chnum, USB_OTG_HCINT_NAK); - hhcd->hc[chnum].state = HC_DATATGLERR; - __HAL_HCD_CLEAR_HC_INT(chnum, USB_OTG_HCINT_DTERR); - } - - if ((USBx_HC(chnum)->HCINT) & USB_OTG_HCINT_FRMOR) - { - __HAL_HCD_UNMASK_HALT_HC_INT(chnum); - USB_HC_Halt(hhcd->Instance, chnum); - __HAL_HCD_CLEAR_HC_INT(chnum, USB_OTG_HCINT_FRMOR); - } - - else if ((USBx_HC(chnum)->HCINT) & USB_OTG_HCINT_XFRC) - { - - if (hhcd->Init.dma_enable) - { - hhcd->hc[chnum].xfer_count = hhcd->hc[chnum].xfer_len - \ - (USBx_HC(chnum)->HCTSIZ & USB_OTG_HCTSIZ_XFRSIZ); - } - - hhcd->hc[chnum].state = HC_XFRC; - hhcd->hc[chnum].ErrCnt = 0; - __HAL_HCD_CLEAR_HC_INT(chnum, USB_OTG_HCINT_XFRC); - - - if ((hhcd->hc[chnum].ep_type == EP_TYPE_CTRL)|| - (hhcd->hc[chnum].ep_type == EP_TYPE_BULK)) - { - __HAL_HCD_UNMASK_HALT_HC_INT(chnum); - USB_HC_Halt(hhcd->Instance, chnum); - __HAL_HCD_CLEAR_HC_INT(chnum, USB_OTG_HCINT_NAK); - - } - else if(hhcd->hc[chnum].ep_type == EP_TYPE_INTR) - { - USBx_HC(chnum)->HCCHAR |= USB_OTG_HCCHAR_ODDFRM; - hhcd->hc[chnum].urb_state = URB_DONE; - HAL_HCD_HC_NotifyURBChange_Callback(hhcd, chnum, hhcd->hc[chnum].urb_state); - } - hhcd->hc[chnum].toggle_in ^= 1; - - } - else if ((USBx_HC(chnum)->HCINT) & USB_OTG_HCINT_CHH) - { - __HAL_HCD_MASK_HALT_HC_INT(chnum); - - if(hhcd->hc[chnum].state == HC_XFRC) - { - hhcd->hc[chnum].urb_state = URB_DONE; - } - - else if (hhcd->hc[chnum].state == HC_STALL) - { - hhcd->hc[chnum].urb_state = URB_STALL; - } - - else if((hhcd->hc[chnum].state == HC_XACTERR) || - (hhcd->hc[chnum].state == HC_DATATGLERR)) - { - if(hhcd->hc[chnum].ErrCnt++ > 3) - { - hhcd->hc[chnum].ErrCnt = 0; - hhcd->hc[chnum].urb_state = URB_ERROR; - } - else - { - hhcd->hc[chnum].urb_state = URB_NOTREADY; - } - - /* re-activate the channel */ - tmpreg = USBx_HC(chnum)->HCCHAR; - tmpreg &= ~USB_OTG_HCCHAR_CHDIS; - tmpreg |= USB_OTG_HCCHAR_CHENA; - USBx_HC(chnum)->HCCHAR = tmpreg; - } - __HAL_HCD_CLEAR_HC_INT(chnum, USB_OTG_HCINT_CHH); - HAL_HCD_HC_NotifyURBChange_Callback(hhcd, chnum, hhcd->hc[chnum].urb_state); - } - - else if ((USBx_HC(chnum)->HCINT) & USB_OTG_HCINT_TXERR) - { - __HAL_HCD_UNMASK_HALT_HC_INT(chnum); - hhcd->hc[chnum].ErrCnt++; - hhcd->hc[chnum].state = HC_XACTERR; - USB_HC_Halt(hhcd->Instance, chnum); - __HAL_HCD_CLEAR_HC_INT(chnum, USB_OTG_HCINT_TXERR); - } - else if ((USBx_HC(chnum)->HCINT) & USB_OTG_HCINT_NAK) - { - if(hhcd->hc[chnum].ep_type == EP_TYPE_INTR) - { - __HAL_HCD_UNMASK_HALT_HC_INT(chnum); - USB_HC_Halt(hhcd->Instance, chnum); - } - else if ((hhcd->hc[chnum].ep_type == EP_TYPE_CTRL)|| - (hhcd->hc[chnum].ep_type == EP_TYPE_BULK)) - { - /* re-activate the channel */ - tmpreg = USBx_HC(chnum)->HCCHAR; - tmpreg &= ~USB_OTG_HCCHAR_CHDIS; - tmpreg |= USB_OTG_HCCHAR_CHENA; - USBx_HC(chnum)->HCCHAR = tmpreg; - } - hhcd->hc[chnum].state = HC_NAK; - __HAL_HCD_CLEAR_HC_INT(chnum, USB_OTG_HCINT_NAK); - } -} - -/** - * @brief Handle Host Channel OUT interrupt requests. - * @param hhcd: HCD handle - * @param chnum: Channel number. - * This parameter can be a value from 1 to 15 - * @retval none - */ -static void HCD_HC_OUT_IRQHandler (HCD_HandleTypeDef *hhcd, uint8_t chnum) -{ - USB_OTG_GlobalTypeDef *USBx = hhcd->Instance; - uint32_t tmpreg = 0; - - if ((USBx_HC(chnum)->HCINT) & USB_OTG_HCINT_AHBERR) - { - __HAL_HCD_CLEAR_HC_INT(chnum, USB_OTG_HCINT_AHBERR); - __HAL_HCD_UNMASK_HALT_HC_INT(chnum); - } - else if ((USBx_HC(chnum)->HCINT) & USB_OTG_HCINT_ACK) - { - __HAL_HCD_CLEAR_HC_INT(chnum, USB_OTG_HCINT_ACK); - - if( hhcd->hc[chnum].do_ping == 1) - { - hhcd->hc[chnum].state = HC_NYET; - __HAL_HCD_UNMASK_HALT_HC_INT(chnum); - USB_HC_Halt(hhcd->Instance, chnum); - hhcd->hc[chnum].urb_state = URB_NOTREADY; - } - } - - else if ((USBx_HC(chnum)->HCINT) & USB_OTG_HCINT_NYET) - { - hhcd->hc[chnum].state = HC_NYET; - hhcd->hc[chnum].ErrCnt= 0; - __HAL_HCD_UNMASK_HALT_HC_INT(chnum); - USB_HC_Halt(hhcd->Instance, chnum); - __HAL_HCD_CLEAR_HC_INT(chnum, USB_OTG_HCINT_NYET); - - } - - else if ((USBx_HC(chnum)->HCINT) & USB_OTG_HCINT_FRMOR) - { - __HAL_HCD_UNMASK_HALT_HC_INT(chnum); - USB_HC_Halt(hhcd->Instance, chnum); - __HAL_HCD_CLEAR_HC_INT(chnum, USB_OTG_HCINT_FRMOR); - } - - else if ((USBx_HC(chnum)->HCINT) & USB_OTG_HCINT_XFRC) - { - hhcd->hc[chnum].ErrCnt = 0; - __HAL_HCD_UNMASK_HALT_HC_INT(chnum); - USB_HC_Halt(hhcd->Instance, chnum); - __HAL_HCD_CLEAR_HC_INT(chnum, USB_OTG_HCINT_XFRC); - hhcd->hc[chnum].state = HC_XFRC; - - } - - else if ((USBx_HC(chnum)->HCINT) & USB_OTG_HCINT_STALL) - { - __HAL_HCD_CLEAR_HC_INT(chnum, USB_OTG_HCINT_STALL); - __HAL_HCD_UNMASK_HALT_HC_INT(chnum); - USB_HC_Halt(hhcd->Instance, chnum); - hhcd->hc[chnum].state = HC_STALL; - } - - else if ((USBx_HC(chnum)->HCINT) & USB_OTG_HCINT_NAK) - { - hhcd->hc[chnum].ErrCnt = 0; - __HAL_HCD_UNMASK_HALT_HC_INT(chnum); - USB_HC_Halt(hhcd->Instance, chnum); - hhcd->hc[chnum].state = HC_NAK; - __HAL_HCD_CLEAR_HC_INT(chnum, USB_OTG_HCINT_NAK); - } - - else if ((USBx_HC(chnum)->HCINT) & USB_OTG_HCINT_TXERR) - { - __HAL_HCD_UNMASK_HALT_HC_INT(chnum); - USB_HC_Halt(hhcd->Instance, chnum); - hhcd->hc[chnum].state = HC_XACTERR; - __HAL_HCD_CLEAR_HC_INT(chnum, USB_OTG_HCINT_TXERR); - } - - else if ((USBx_HC(chnum)->HCINT) & USB_OTG_HCINT_DTERR) - { - __HAL_HCD_UNMASK_HALT_HC_INT(chnum); - USB_HC_Halt(hhcd->Instance, chnum); - __HAL_HCD_CLEAR_HC_INT(chnum, USB_OTG_HCINT_NAK); - __HAL_HCD_CLEAR_HC_INT(chnum, USB_OTG_HCINT_DTERR); - hhcd->hc[chnum].state = HC_DATATGLERR; - } - - - else if ((USBx_HC(chnum)->HCINT) & USB_OTG_HCINT_CHH) - { - __HAL_HCD_MASK_HALT_HC_INT(chnum); - - if(hhcd->hc[chnum].state == HC_XFRC) - { - hhcd->hc[chnum].urb_state = URB_DONE; - if (hhcd->hc[chnum].ep_type == EP_TYPE_BULK) - { - hhcd->hc[chnum].toggle_out ^= 1; - } - } - else if (hhcd->hc[chnum].state == HC_NAK) - { - hhcd->hc[chnum].urb_state = URB_NOTREADY; - } - - else if (hhcd->hc[chnum].state == HC_NYET) - { - hhcd->hc[chnum].urb_state = URB_NOTREADY; - hhcd->hc[chnum].do_ping = 0; - } - - else if (hhcd->hc[chnum].state == HC_STALL) - { - hhcd->hc[chnum].urb_state = URB_STALL; - } - - else if((hhcd->hc[chnum].state == HC_XACTERR) || - (hhcd->hc[chnum].state == HC_DATATGLERR)) - { - if(hhcd->hc[chnum].ErrCnt++ > 3) - { - hhcd->hc[chnum].ErrCnt = 0; - hhcd->hc[chnum].urb_state = URB_ERROR; - } - else - { - hhcd->hc[chnum].urb_state = URB_NOTREADY; - } - - /* re-activate the channel */ - tmpreg = USBx_HC(chnum)->HCCHAR; - tmpreg &= ~USB_OTG_HCCHAR_CHDIS; - tmpreg |= USB_OTG_HCCHAR_CHENA; - USBx_HC(chnum)->HCCHAR = tmpreg; - } - - __HAL_HCD_CLEAR_HC_INT(chnum, USB_OTG_HCINT_CHH); - HAL_HCD_HC_NotifyURBChange_Callback(hhcd, chnum, hhcd->hc[chnum].urb_state); - } -} - -/** - * @brief Handle Rx Queue Level interrupt requests. - * @param hhcd: HCD handle - * @retval none - */ -static void HCD_RXQLVL_IRQHandler (HCD_HandleTypeDef *hhcd) -{ - USB_OTG_GlobalTypeDef *USBx = hhcd->Instance; - uint8_t channelnum =0; - uint32_t pktsts; - uint32_t pktcnt; - uint32_t temp = 0; - uint32_t tmpreg = 0; - - temp = hhcd->Instance->GRXSTSP ; - channelnum = temp & USB_OTG_GRXSTSP_EPNUM; - pktsts = (temp & USB_OTG_GRXSTSP_PKTSTS) >> 17; - pktcnt = (temp & USB_OTG_GRXSTSP_BCNT) >> 4; - - switch (pktsts) - { - case GRXSTS_PKTSTS_IN: - /* Read the data into the Host buffer. */ - if ((pktcnt > 0) && (hhcd->hc[channelnum].xfer_buff != (void *)0)) - { - - USB_ReadPacket(hhcd->Instance, hhcd->hc[channelnum].xfer_buff, pktcnt); - - /*manage multiple Xfer */ - hhcd->hc[channelnum].xfer_buff += pktcnt; - hhcd->hc[channelnum].xfer_count += pktcnt; - - if((USBx_HC(channelnum)->HCTSIZ & USB_OTG_HCTSIZ_PKTCNT) > 0) - { - /* re-activate the channel when more packets are expected */ - tmpreg = USBx_HC(channelnum)->HCCHAR; - tmpreg &= ~USB_OTG_HCCHAR_CHDIS; - tmpreg |= USB_OTG_HCCHAR_CHENA; - USBx_HC(channelnum)->HCCHAR = tmpreg; - hhcd->hc[channelnum].toggle_in ^= 1; - } - } - break; - - case GRXSTS_PKTSTS_DATA_TOGGLE_ERR: - break; - case GRXSTS_PKTSTS_IN_XFER_COMP: - case GRXSTS_PKTSTS_CH_HALTED: - default: - break; - } -} - -/** - * @brief Handle Host Port interrupt requests. - * @param hhcd: HCD handle - * @retval None - */ -static void HCD_Port_IRQHandler (HCD_HandleTypeDef *hhcd) -{ - USB_OTG_GlobalTypeDef *USBx = hhcd->Instance; - __IO uint32_t hprt0, hprt0_dup; - - /* Handle Host Port Interrupts */ - hprt0 = USBx_HPRT0; - hprt0_dup = USBx_HPRT0; - - hprt0_dup &= ~(USB_OTG_HPRT_PENA | USB_OTG_HPRT_PCDET |\ - USB_OTG_HPRT_PENCHNG | USB_OTG_HPRT_POCCHNG ); - - /* Check whether Port Connect Detected */ - if((hprt0 & USB_OTG_HPRT_PCDET) == USB_OTG_HPRT_PCDET) - { - if((hprt0 & USB_OTG_HPRT_PCSTS) == USB_OTG_HPRT_PCSTS) - { - USB_MASK_INTERRUPT(hhcd->Instance, USB_OTG_GINTSTS_DISCINT); - HAL_HCD_Connect_Callback(hhcd); - } - hprt0_dup |= USB_OTG_HPRT_PCDET; - - } - - /* Check whether Port Enable Changed */ - if((hprt0 & USB_OTG_HPRT_PENCHNG) == USB_OTG_HPRT_PENCHNG) - { - hprt0_dup |= USB_OTG_HPRT_PENCHNG; - - if((hprt0 & USB_OTG_HPRT_PENA) == USB_OTG_HPRT_PENA) - { - if(hhcd->Init.phy_itface == USB_OTG_EMBEDDED_PHY) - { - if ((hprt0 & USB_OTG_HPRT_PSPD) == (HPRT0_PRTSPD_LOW_SPEED << 17)) - { - USB_InitFSLSPClkSel(hhcd->Instance ,HCFG_6_MHZ ); - } - else - { - USB_InitFSLSPClkSel(hhcd->Instance ,HCFG_48_MHZ ); - } - } - else - { - if(hhcd->Init.speed == HCD_SPEED_FULL) - { - USBx_HOST->HFIR = (uint32_t)60000; - } - } - HAL_HCD_Connect_Callback(hhcd); - - if(hhcd->Init.speed == HCD_SPEED_HIGH) - { - USB_UNMASK_INTERRUPT(hhcd->Instance, USB_OTG_GINTSTS_DISCINT); - } - } - else - { - /* Cleanup HPRT */ - USBx_HPRT0 &= ~(USB_OTG_HPRT_PENA | USB_OTG_HPRT_PCDET |\ - USB_OTG_HPRT_PENCHNG | USB_OTG_HPRT_POCCHNG ); - - USB_UNMASK_INTERRUPT(hhcd->Instance, USB_OTG_GINTSTS_DISCINT); - } - } - - /* Check For an overcurrent */ - if((hprt0 & USB_OTG_HPRT_POCCHNG) == USB_OTG_HPRT_POCCHNG) - { - hprt0_dup |= USB_OTG_HPRT_POCCHNG; - } - - /* Clear Port Interrupts */ - USBx_HPRT0 = hprt0_dup; -} - -/** - * @} - */ - -/** - * @} - */ - -#endif /* HAL_HCD_MODULE_ENABLED */ -/** - * @} - */ - -/** - * @} - */ - -#endif /* STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ -
--- a/Src/stm32l4xx_hal_irda.c Thu Nov 12 20:49:49 2015 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,1570 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_irda.c - * @author MCD Application Team - * @version V1.1.0 - * @date 16-September-2015 - * @brief IRDA HAL module driver. - * This file provides firmware functions to manage the following - * functionalities of the IrDA (Infrared Data Association) Peripheral - * (IRDA) - * + Initialization and de-initialization functions - * + IO operation functions - * + Peripheral State and Errors functions - * + Peripheral Control functions - * - @verbatim - ============================================================================== - ##### How to use this driver ##### - ============================================================================== - [..] - The IRDA HAL driver can be used as follows: - - (#) Declare a IRDA_HandleTypeDef handle structure (eg. IRDA_HandleTypeDef hirda). - (#) Initialize the IRDA low level resources by implementing the HAL_IRDA_MspInit() API - in setting the associated USART or UART in IRDA mode: - (++) Enable the USARTx/UARTx interface clock. - (++) USARTx/UARTx pins configuration: - (+++) Enable the clock for the USARTx/UARTx GPIOs. - (+++) Configure these USARTx/UARTx pins (TX as alternate function pull-up, RX as alternate function Input). - (++) NVIC configuration if you need to use interrupt process (HAL_IRDA_Transmit_IT() - and HAL_IRDA_Receive_IT() APIs): - (+++) Configure the USARTx/UARTx interrupt priority. - (+++) Enable the NVIC USARTx/UARTx IRQ handle. - (+++) The specific IRDA interrupts (Transmission complete interrupt, - RXNE interrupt and Error Interrupts) will be managed using the macros - __HAL_IRDA_ENABLE_IT() and __HAL_IRDA_DISABLE_IT() inside the transmit and receive process. - - (++) DMA Configuration if you need to use DMA process (HAL_IRDA_Transmit_DMA() - and HAL_IRDA_Receive_DMA() APIs): - (+++) Declare a DMA handle structure for the Tx/Rx channel. - (+++) Enable the DMAx interface clock. - (+++) Configure the declared DMA handle structure with the required Tx/Rx parameters. - (+++) Configure the DMA Tx/Rx channel. - (+++) Associate the initialized DMA handle to the IRDA DMA Tx/Rx handle. - (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the DMA Tx/Rx channel. - - (#) Program the Baud Rate, Word Length and Parity and Mode(Receiver/Transmitter), - the normal or low power mode and the clock prescaler in the hirda handle Init structure. - - (#) Initialize the IRDA registers by calling the HAL_IRDA_Init() API: - (++) This API configures also the low level Hardware GPIO, CLOCK, CORTEX...etc) - by calling the customized HAL_IRDA_MspInit() API. - - -@@- The specific IRDA interrupts (Transmission complete interrupt, - RXNE interrupt and Error Interrupts) will be managed using the macros - __HAL_IRDA_ENABLE_IT() and __HAL_IRDA_DISABLE_IT() inside the transmit and receive process. - - (#) Three operation modes are available within this driver : - - *** Polling mode IO operation *** - ================================= - [..] - (+) Send an amount of data in blocking mode using HAL_IRDA_Transmit() - (+) Receive an amount of data in blocking mode using HAL_IRDA_Receive() - - *** Interrupt mode IO operation *** - =================================== - [..] - (+) Send an amount of data in non-blocking mode using HAL_IRDA_Transmit_IT() - (+) At transmission end of transfer HAL_IRDA_TxCpltCallback() is executed and user can - add his own code by customization of function pointer HAL_IRDA_TxCpltCallback() - (+) Receive an amount of data in non-blocking mode using HAL_IRDA_Receive_IT() - (+) At reception end of transfer HAL_IRDA_RxCpltCallback() is executed and user can - add his own code by customization of function pointer HAL_IRDA_RxCpltCallback() - (+) In case of transfer Error, HAL_IRDA_ErrorCallback() function is executed and user can - add his own code by customization of function pointer HAL_IRDA_ErrorCallback() - - *** DMA mode IO operation *** - ============================== - [..] - (+) Send an amount of data in non-blocking mode (DMA) using HAL_IRDA_Transmit_DMA() - (+) At transmission half of transfer HAL_IRDA_TxHalfCpltCallback() is executed and user can - add his own code by customization of function pointer HAL_IRDA_TxHalfCpltCallback() - (+) At transmission end of transfer HAL_IRDA_TxCpltCallback() is executed and user can - add his own code by customization of function pointer HAL_IRDA_TxCpltCallback() - (+) Receive an amount of data in non-blocking mode (DMA) using HAL_IRDA_Receive_DMA() - (+) At reception half of transfer HAL_IRDA_RxHalfCpltCallback() is executed and user can - add his own code by customization of function pointer HAL_IRDA_RxHalfCpltCallback() - (+) At reception end of transfer HAL_IRDA_RxCpltCallback() is executed and user can - add his own code by customization of function pointer HAL_IRDA_RxCpltCallback() - (+) In case of transfer Error, HAL_IRDA_ErrorCallback() function is executed and user can - add his own code by customization of function pointer HAL_IRDA_ErrorCallback() - - *** IRDA HAL driver macros list *** - ==================================== - [..] - Below the list of most used macros in IRDA HAL driver. - - (+) __HAL_IRDA_ENABLE: Enable the IRDA peripheral - (+) __HAL_IRDA_DISABLE: Disable the IRDA peripheral - (+) __HAL_IRDA_GET_FLAG : Check whether the specified IRDA flag is set or not - (+) __HAL_IRDA_CLEAR_FLAG : Clear the specified IRDA pending flag - (+) __HAL_IRDA_ENABLE_IT: Enable the specified IRDA interrupt - (+) __HAL_IRDA_DISABLE_IT: Disable the specified IRDA interrupt - (+) __HAL_IRDA_GET_IT_SOURCE: Check whether or not the specified IRDA interrupt is enabled - - [..] - (@) You can refer to the IRDA HAL driver header file for more useful macros - - @endverbatim - ****************************************************************************** - * @attention - * - * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @defgroup IRDA IRDA - * @brief HAL IRDA module driver - * @{ - */ - -#ifdef HAL_IRDA_MODULE_ENABLED - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -/** @defgroup IRDA_Private_Constants IRDA Private Constants - * @{ - */ -#define IRDA_TEACK_REACK_TIMEOUT 1000 /*!< IRDA TX or RX enable acknowledge time-out value */ -#define IRDA_CR1_FIELDS ((uint32_t)(USART_CR1_M | USART_CR1_PCE \ - | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE)) /*!< UART or USART CR1 fields of parameters set by IRDA_SetConfig API */ -/** - * @} - */ - -/* Private macros ------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ -/** @addtogroup IRDA_Private_Functions - * @{ - */ -static HAL_StatusTypeDef IRDA_Transmit_IT(IRDA_HandleTypeDef *hirda); -static HAL_StatusTypeDef IRDA_EndTransmit_IT(IRDA_HandleTypeDef *hirda); -static HAL_StatusTypeDef IRDA_Receive_IT(IRDA_HandleTypeDef *hirda); -static HAL_StatusTypeDef IRDA_SetConfig(IRDA_HandleTypeDef *hirda); -static HAL_StatusTypeDef IRDA_CheckIdleState(IRDA_HandleTypeDef *hirda); -static void IRDA_DMATransmitCplt(DMA_HandleTypeDef *hdma); -static void IRDA_DMATransmitHalfCplt(DMA_HandleTypeDef *hdma); -static void IRDA_DMAReceiveCplt(DMA_HandleTypeDef *hdma); -static void IRDA_DMAReceiveHalfCplt(DMA_HandleTypeDef *hdma); -static void IRDA_DMAError(DMA_HandleTypeDef *hdma); -static HAL_StatusTypeDef IRDA_WaitOnFlagUntilTimeout(IRDA_HandleTypeDef *hirda, uint32_t Flag, FlagStatus Status, uint32_t Timeout); -/** - * @} - */ - -/* Exported functions --------------------------------------------------------*/ - -/** @defgroup IRDA_Exported_Functions IRDA Exported Functions - * @{ - */ - -/** @defgroup IRDA_Exported_Functions_Group1 Initialization and de-initialization functions - * @brief Initialization and Configuration functions - * -@verbatim - ============================================================================== - ##### Initialization and Configuration functions ##### - ============================================================================== - [..] - This subsection provides a set of functions allowing to initialize the USARTx - in asynchronous IRDA mode. - (+) For the asynchronous mode only these parameters can be configured: - (++) Baud Rate - (++) Word Length - (++) Parity: If the parity is enabled, then the MSB bit of the data written - in the data register is transmitted but is changed by the parity bit. - Depending on the frame length defined by the M1 and M0 bits (7-bit, - 8-bit or 9-bit), the possible IRDA frame formats are listed in the - following table. - (+++) Table 1. IRDA frame format. - (+++) +-----------------------------------------------------------------------+ - (+++) | M1 bit | M0 bit | PCE bit | IRDA frame | - (+++) |---------|---------|-----------|---------------------------------------| - (+++) | 0 | 0 | 0 | | SB | 8 bit data | STB | | - (+++) |---------|---------|-----------|---------------------------------------| - (+++) | 0 | 0 | 1 | | SB | 7 bit data | PB | STB | | - (+++) |---------|---------|-----------|---------------------------------------| - (+++) | 0 | 1 | 0 | | SB | 9 bit data | STB | | - (+++) |---------|---------|-----------|---------------------------------------| - (+++) | 0 | 1 | 1 | | SB | 8 bit data | PB | STB | | - (+++) |---------|---------|-----------|---------------------------------------| - (+++) | 1 | 0 | 0 | | SB | 7 bit data | STB | | - (+++) |---------|---------|-----------|---------------------------------------| - (+++) | 1 | 0 | 1 | | SB | 6 bit data | PB | STB | | - (+++) +-----------------------------------------------------------------------+ - - (++) Power mode - (++) Prescaler setting - (++) Receiver/transmitter modes - - [..] - The HAL_IRDA_Init() API follows the USART asynchronous configuration procedures - (details for the procedures are available in reference manual). - -@endverbatim - * @{ - */ - -/** - * @brief Initialize the IRDA mode according to the specified - * parameters in the IRDA_InitTypeDef and initialize the associated handle. - * @param hirda: Pointer to a IRDA_HandleTypeDef structure that contains - * the configuration information for the specified IRDA module. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_IRDA_Init(IRDA_HandleTypeDef *hirda) -{ - /* Check the IRDA handle allocation */ - if(hirda == NULL) - { - return HAL_ERROR; - } - - /* Check the USART/UART associated to the IRDA handle */ - assert_param(IS_IRDA_INSTANCE(hirda->Instance)); - - if(hirda->State == HAL_IRDA_STATE_RESET) - { - /* Allocate lock resource and initialize it */ - hirda->Lock = HAL_UNLOCKED; - - /* Init the low level hardware : GPIO, CLOCK */ - HAL_IRDA_MspInit(hirda); - } - - hirda->State = HAL_IRDA_STATE_BUSY; - - /* Disable the Peripheral to update the configuration registers */ - __HAL_IRDA_DISABLE(hirda); - - /* Set the IRDA Communication parameters */ - if (IRDA_SetConfig(hirda) == HAL_ERROR) - { - return HAL_ERROR; - } - - /* In IRDA mode, the following bits must be kept cleared: - - LINEN, STOP and CLKEN bits in the USART_CR2 register, - - SCEN and HDSEL bits in the USART_CR3 register.*/ - hirda->Instance->CR2 &= ~(USART_CR2_LINEN | USART_CR2_CLKEN | USART_CR2_STOP); - hirda->Instance->CR3 &= ~(USART_CR3_SCEN | USART_CR3_HDSEL); - - /* set the UART/USART in IRDA mode */ - hirda->Instance->CR3 |= USART_CR3_IREN; - - /* Enable the Peripheral */ - __HAL_IRDA_ENABLE(hirda); - - /* TEACK and/or REACK to check before moving hirda->State to Ready */ - return (IRDA_CheckIdleState(hirda)); -} - -/** - * @brief DeInitialize the IRDA peripheral. - * @param hirda: Pointer to a IRDA_HandleTypeDef structure that contains - * the configuration information for the specified IRDA module. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_IRDA_DeInit(IRDA_HandleTypeDef *hirda) -{ - /* Check the IRDA handle allocation */ - if(hirda == NULL) - { - return HAL_ERROR; - } - - /* Check the USART/UART associated to the IRDA handle */ - assert_param(IS_IRDA_INSTANCE(hirda->Instance)); - - hirda->State = HAL_IRDA_STATE_BUSY; - - /* DeInit the low level hardware */ - HAL_IRDA_MspDeInit(hirda); - /* Disable the Peripheral */ - __HAL_IRDA_DISABLE(hirda); - - hirda->ErrorCode = HAL_IRDA_ERROR_NONE; - hirda->State = HAL_IRDA_STATE_RESET; - - /* Process Unlock */ - __HAL_UNLOCK(hirda); - - return HAL_OK; -} - -/** - * @brief Initialize the IRDA MSP. - * @param hirda: Pointer to a IRDA_HandleTypeDef structure that contains - * the configuration information for the specified IRDA module. - * @retval None - */ - __weak void HAL_IRDA_MspInit(IRDA_HandleTypeDef *hirda) -{ - /* NOTE: This function should not be modified, when the callback is needed, - the HAL_IRDA_MspInit can be implemented in the user file - */ -} - -/** - * @brief DeInitialize the IRDA MSP. - * @param hirda: Pointer to a IRDA_HandleTypeDef structure that contains - * the configuration information for the specified IRDA module. - * @retval None - */ - __weak void HAL_IRDA_MspDeInit(IRDA_HandleTypeDef *hirda) -{ - /* NOTE: This function should not be modified, when the callback is needed, - the HAL_IRDA_MspDeInit can be implemented in the user file - */ -} - -/** - * @} - */ - -/** @defgroup IRDA_Exported_Functions_Group2 IO operation functions - * @brief IRDA Transmit and Receive functions - * -@verbatim - ============================================================================== - ##### IO operation functions ##### - ============================================================================== - [..] - This subsection provides a set of functions allowing to manage the IRDA data transfers. - - [..] - IrDA is a half duplex communication protocol. If the Transmitter is busy, any data - on the IrDA receive line will be ignored by the IrDA decoder and if the Receiver - is busy, data on the TX from the USART to IrDA will not be encoded by IrDA. - While receiving data, transmission should be avoided as the data to be transmitted - could be corrupted. - - (#) There are two modes of transfer: - (++) Blocking mode: the communication is performed in polling mode. - The HAL status of all data processing is returned by the same function - after finishing transfer. - (++) No-Blocking mode: the communication is performed using Interrupts - or DMA, these API's return the HAL status. - The end of the data processing will be indicated through the - dedicated IRDA IRQ when using Interrupt mode or the DMA IRQ when - using DMA mode. - The HAL_IRDA_TxCpltCallback(), HAL_IRDA_RxCpltCallback() user callbacks - will be executed respectively at the end of the Transmit or Receive process - The HAL_IRDA_ErrorCallback() user callback will be executed when a communication error is detected - - (#) Blocking mode APIs are : - (++) HAL_IRDA_Transmit() - (++) HAL_IRDA_Receive() - - (#) Non Blocking mode APIs with Interrupt are : - (++) HAL_IRDA_Transmit_IT() - (++) HAL_IRDA_Receive_IT() - (++) HAL_IRDA_IRQHandler() - - (#) Non Blocking mode functions with DMA are : - (++) HAL_IRDA_Transmit_DMA() - (++) HAL_IRDA_Receive_DMA() - (++) HAL_IRDA_DMAPause() - (++) HAL_IRDA_DMAResume() - (++) HAL_IRDA_DMAStop() - - (#) A set of Transfer Complete Callbacks are provided in Non Blocking mode: - (++) HAL_IRDA_TxHalfCpltCallback() - (++) HAL_IRDA_TxCpltCallback() - (++) HAL_IRDA_RxHalfCpltCallback() - (++) HAL_IRDA_RxCpltCallback() - (++) HAL_IRDA_ErrorCallback() - -@endverbatim - * @{ - */ - -/** - * @brief Send an amount of data in blocking mode. - * @param hirda: Pointer to a IRDA_HandleTypeDef structure that contains - * the configuration information for the specified IRDA module. - * @param pData: Pointer to data buffer. - * @param Size: Amount of data to be sent. - * @param Timeout: Specify timeout value. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_IRDA_Transmit(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size, uint32_t Timeout) -{ - uint16_t* tmp; - - if((hirda->State == HAL_IRDA_STATE_READY) || (hirda->State == HAL_IRDA_STATE_BUSY_RX)) - { - if((pData == NULL) || (Size == 0)) - { - return HAL_ERROR; - } - - /* Process Locked */ - __HAL_LOCK(hirda); - - hirda->ErrorCode = HAL_IRDA_ERROR_NONE; - - if(hirda->State == HAL_IRDA_STATE_BUSY_RX) - { - hirda->State = HAL_IRDA_STATE_BUSY_TX_RX; - } - else - { - hirda->State = HAL_IRDA_STATE_BUSY_TX; - } - - hirda->TxXferSize = Size; - hirda->TxXferCount = Size; - while(hirda->TxXferCount > 0) - { - hirda->TxXferCount--; - - if(IRDA_WaitOnFlagUntilTimeout(hirda, IRDA_FLAG_TXE, RESET, Timeout) != HAL_OK) - { - return HAL_TIMEOUT; - } - if ((hirda->Init.WordLength == IRDA_WORDLENGTH_9B) && (hirda->Init.Parity == IRDA_PARITY_NONE)) - { - tmp = (uint16_t*) pData; - hirda->Instance->TDR = (*tmp & (uint16_t)0x01FF); - pData +=2; - } - else - { - hirda->Instance->TDR = (*pData++ & (uint8_t)0xFF); - } - } - - if(IRDA_WaitOnFlagUntilTimeout(hirda, IRDA_FLAG_TC, RESET, Timeout) != HAL_OK) - { - return HAL_TIMEOUT; - } - - if(hirda->State == HAL_IRDA_STATE_BUSY_TX_RX) - { - hirda->State = HAL_IRDA_STATE_BUSY_RX; - } - else - { - hirda->State = HAL_IRDA_STATE_READY; - } - - /* Process Unlocked */ - __HAL_UNLOCK(hirda); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Receive an amount of data in blocking mode. - * @param hirda: Pointer to a IRDA_HandleTypeDef structure that contains - * the configuration information for the specified IRDA module. - * @param pData: Pointer to data buffer. - * @param Size: Amount of data to be received. - * @param Timeout: Specify timeout value. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_IRDA_Receive(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size, uint32_t Timeout) -{ - uint16_t* tmp; - uint16_t uhMask; - - if((hirda->State == HAL_IRDA_STATE_READY) || (hirda->State == HAL_IRDA_STATE_BUSY_TX)) - { - if((pData == NULL) || (Size == 0)) - { - return HAL_ERROR; - } - - /* Process Locked */ - __HAL_LOCK(hirda); - - hirda->ErrorCode = HAL_IRDA_ERROR_NONE; - - if(hirda->State == HAL_IRDA_STATE_BUSY_TX) - { - hirda->State = HAL_IRDA_STATE_BUSY_TX_RX; - } - else - { - hirda->State = HAL_IRDA_STATE_BUSY_RX; - } - - hirda->RxXferSize = Size; - hirda->RxXferCount = Size; - - /* Computation of the mask to apply to the RDR register - of the UART associated to the IRDA */ - IRDA_MASK_COMPUTATION(hirda); - uhMask = hirda->Mask; - - /* Check data remaining to be received */ - while(hirda->RxXferCount > 0) - { - hirda->RxXferCount--; - - if(IRDA_WaitOnFlagUntilTimeout(hirda, IRDA_FLAG_RXNE, RESET, Timeout) != HAL_OK) - { - return HAL_TIMEOUT; - } - if ((hirda->Init.WordLength == IRDA_WORDLENGTH_9B) && (hirda->Init.Parity == IRDA_PARITY_NONE)) - { - tmp = (uint16_t*) pData ; - *tmp = (uint16_t)(hirda->Instance->RDR & uhMask); - pData +=2; - } - else - { - *pData++ = (uint8_t)(hirda->Instance->RDR & (uint8_t)uhMask); - } - } - - if(hirda->State == HAL_IRDA_STATE_BUSY_TX_RX) - { - hirda->State = HAL_IRDA_STATE_BUSY_TX; - } - else - { - hirda->State = HAL_IRDA_STATE_READY; - } - - /* Process Unlocked */ - __HAL_UNLOCK(hirda); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Send an amount of data in interrupt mode. - * @param hirda: Pointer to a IRDA_HandleTypeDef structure that contains - * the configuration information for the specified IRDA module. - * @param pData: Pointer to data buffer. - * @param Size: Amount of data to be sent. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_IRDA_Transmit_IT(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size) -{ - if((hirda->State == HAL_IRDA_STATE_READY) || (hirda->State == HAL_IRDA_STATE_BUSY_RX)) - { - if((pData == NULL) || (Size == 0)) - { - return HAL_ERROR; - } - - /* Process Locked */ - __HAL_LOCK(hirda); - - hirda->pTxBuffPtr = pData; - hirda->TxXferSize = Size; - hirda->TxXferCount = Size; - - hirda->ErrorCode = HAL_IRDA_ERROR_NONE; - - if(hirda->State == HAL_IRDA_STATE_BUSY_RX) - { - hirda->State = HAL_IRDA_STATE_BUSY_TX_RX; - } - else - { - hirda->State = HAL_IRDA_STATE_BUSY_TX; - } - - /* Process Unlocked */ - __HAL_UNLOCK(hirda); - - /* Enable the IRDA Error Interrupt: (Frame error, noise error, overrun error) */ - __HAL_IRDA_ENABLE_IT(hirda, IRDA_IT_ERR); - /* Enable the IRDA Transmit Data Register Empty Interrupt */ - __HAL_IRDA_ENABLE_IT(hirda, IRDA_IT_TXE); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Receive an amount of data in interrupt mode. - * @param hirda: Pointer to a IRDA_HandleTypeDef structure that contains - * the configuration information for the specified IRDA module. - * @param pData: Pointer to data buffer. - * @param Size: Amount of data to be received. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_IRDA_Receive_IT(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size) -{ - if((hirda->State == HAL_IRDA_STATE_READY) || (hirda->State == HAL_IRDA_STATE_BUSY_TX)) - { - if((pData == NULL) || (Size == 0)) - { - return HAL_ERROR; - } - - /* Process Locked */ - __HAL_LOCK(hirda); - - hirda->pRxBuffPtr = pData; - hirda->RxXferSize = Size; - hirda->RxXferCount = Size; - - /* Computation of the mask to apply to the RDR register - of the UART associated to the IRDA */ - IRDA_MASK_COMPUTATION(hirda); - - hirda->ErrorCode = HAL_IRDA_ERROR_NONE; - - if(hirda->State == HAL_IRDA_STATE_BUSY_TX) - { - hirda->State = HAL_IRDA_STATE_BUSY_TX_RX; - } - else - { - hirda->State = HAL_IRDA_STATE_BUSY_RX; - } - - /* Process Unlocked */ - __HAL_UNLOCK(hirda); - - /* Enable the IRDA Data Register not empty Interrupt */ - __HAL_IRDA_ENABLE_IT(hirda, IRDA_IT_RXNE); - - /* Enable the IRDA Parity Error Interrupt */ - __HAL_IRDA_ENABLE_IT(hirda, IRDA_IT_PE); - - /* Enable the IRDA Error Interrupt: (Frame error, noise error, overrun error) */ - __HAL_IRDA_ENABLE_IT(hirda, IRDA_IT_ERR); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Send an amount of data in DMA mode. - * @param hirda: Pointer to a IRDA_HandleTypeDef structure that contains - * the configuration information for the specified IRDA module. - * @param pData: pointer to data buffer. - * @param Size: amount of data to be sent. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_IRDA_Transmit_DMA(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size) -{ - uint32_t *tmp; - - if((hirda->State == HAL_IRDA_STATE_READY) || (hirda->State == HAL_IRDA_STATE_BUSY_RX)) - { - if((pData == NULL) || (Size == 0)) - { - return HAL_ERROR; - } - - /* Process Locked */ - __HAL_LOCK(hirda); - - hirda->pTxBuffPtr = pData; - hirda->TxXferSize = Size; - hirda->TxXferCount = Size; - - hirda->ErrorCode = HAL_IRDA_ERROR_NONE; - - if(hirda->State == HAL_IRDA_STATE_BUSY_RX) - { - hirda->State = HAL_IRDA_STATE_BUSY_TX_RX; - } - else - { - hirda->State = HAL_IRDA_STATE_BUSY_TX; - } - - /* Set the IRDA DMA transfer complete callback */ - hirda->hdmatx->XferCpltCallback = IRDA_DMATransmitCplt; - - /* Set the IRDA DMA half transfer complete callback */ - hirda->hdmatx->XferHalfCpltCallback = IRDA_DMATransmitHalfCplt; - - /* Set the DMA error callback */ - hirda->hdmatx->XferErrorCallback = IRDA_DMAError; - - /* Enable the IRDA transmit DMA channel */ - tmp = (uint32_t*)&pData; - HAL_DMA_Start_IT(hirda->hdmatx, *(uint32_t*)tmp, (uint32_t)&hirda->Instance->TDR, Size); - - /* Clear the TC flag in the ICR register */ - __HAL_IRDA_CLEAR_FLAG(hirda, IRDA_CLEAR_TCF); - - /* Enable the DMA transfer for transmit request by setting the DMAT bit - in the USART CR3 register */ - hirda->Instance->CR3 |= USART_CR3_DMAT; - - /* Process Unlocked */ - __HAL_UNLOCK(hirda); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Receive an amount of data in DMA mode. - * @param hirda: Pointer to a IRDA_HandleTypeDef structure that contains - * the configuration information for the specified IRDA module. - * @param pData: Pointer to data buffer. - * @param Size: Amount of data to be received. - * @note When the IRDA parity is enabled (PCE = 1) the received data contains - * the parity bit (MSB position). - * @retval HAL status - */ -HAL_StatusTypeDef HAL_IRDA_Receive_DMA(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size) -{ - uint32_t *tmp; - - if((hirda->State == HAL_IRDA_STATE_READY) || (hirda->State == HAL_IRDA_STATE_BUSY_TX)) - { - if((pData == NULL) || (Size == 0)) - { - return HAL_ERROR; - } - - /* Process Locked */ - __HAL_LOCK(hirda); - - hirda->pRxBuffPtr = pData; - hirda->RxXferSize = Size; - - hirda->ErrorCode = HAL_IRDA_ERROR_NONE; - - if(hirda->State == HAL_IRDA_STATE_BUSY_TX) - { - hirda->State = HAL_IRDA_STATE_BUSY_TX_RX; - } - else - { - hirda->State = HAL_IRDA_STATE_BUSY_RX; - } - - /* Set the IRDA DMA transfer complete callback */ - hirda->hdmarx->XferCpltCallback = IRDA_DMAReceiveCplt; - - /* Set the IRDA DMA half transfer complete callback */ - hirda->hdmarx->XferHalfCpltCallback = IRDA_DMAReceiveHalfCplt; - - /* Set the DMA error callback */ - hirda->hdmarx->XferErrorCallback = IRDA_DMAError; - - /* Enable the DMA channel */ - tmp = (uint32_t*)&pData; - HAL_DMA_Start_IT(hirda->hdmarx, (uint32_t)&hirda->Instance->RDR, *(uint32_t*)tmp, Size); - - /* Enable the DMA transfer for the receiver request by setting the DMAR bit - in the USART CR3 register */ - hirda->Instance->CR3 |= USART_CR3_DMAR; - - /* Process Unlocked */ - __HAL_UNLOCK(hirda); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - - -/** - * @brief Pause the DMA Transfer. - * @param hirda: Pointer to a IRDA_HandleTypeDef structure that contains - * the configuration information for the specified IRDA module. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_IRDA_DMAPause(IRDA_HandleTypeDef *hirda) -{ - /* Process Locked */ - __HAL_LOCK(hirda); - - if(hirda->State == HAL_IRDA_STATE_BUSY_TX) - { - /* Disable the IRDA DMA Tx request */ - CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAT); - } - else if(hirda->State == HAL_IRDA_STATE_BUSY_RX) - { - /* Disable the IRDA DMA Rx request */ - CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAR); - } - else if (hirda->State == HAL_IRDA_STATE_BUSY_TX_RX) - { - /* Disable the IRDA DMA Tx & Rx requests */ - CLEAR_BIT(hirda->Instance->CR3, (USART_CR3_DMAT | USART_CR3_DMAR)); - } - else - { - /* Process Unlocked */ - __HAL_UNLOCK(hirda); - - return HAL_ERROR; - } - - /* Process Unlocked */ - __HAL_UNLOCK(hirda); - - return HAL_OK; -} - -/** - * @brief Resume the DMA Transfer. - * @param hirda: Pointer to a IRDA_HandleTypeDef structure that contains - * the configuration information for the specified UART module. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_IRDA_DMAResume(IRDA_HandleTypeDef *hirda) -{ - /* Process Locked */ - __HAL_LOCK(hirda); - - if(hirda->State == HAL_IRDA_STATE_BUSY_TX) - { - /* Enable the IRDA DMA Tx request */ - SET_BIT(hirda->Instance->CR3, USART_CR3_DMAT); - } - else if(hirda->State == HAL_IRDA_STATE_BUSY_RX) - { - /* Clear the Overrun flag before resuming the Rx transfer*/ - __HAL_IRDA_CLEAR_OREFLAG(hirda); - /* Enable the IRDA DMA Rx request */ - SET_BIT(hirda->Instance->CR3, USART_CR3_DMAR); - } - else if(hirda->State == HAL_IRDA_STATE_BUSY_TX_RX) - { - /* Clear the Overrun flag before resuming the Rx transfer*/ - __HAL_IRDA_CLEAR_OREFLAG(hirda); - /* Enable the IRDA DMA Tx & Rx request */ - SET_BIT(hirda->Instance->CR3, (USART_CR3_DMAT | USART_CR3_DMAR)); - } - else - { - /* Process Unlocked */ - __HAL_UNLOCK(hirda); - - return HAL_ERROR; - } - - /* Process Unlocked */ - __HAL_UNLOCK(hirda); - - return HAL_OK; -} - -/** - * @brief Stop the DMA Transfer. - * @param hirda: Pointer to a IRDA_HandleTypeDef structure that contains - * the configuration information for the specified UART module. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_IRDA_DMAStop(IRDA_HandleTypeDef *hirda) -{ - /* The Lock is not implemented on this API to allow the user application - to call the HAL IRDA API under callbacks HAL_IRDA_TxCpltCallback() / HAL_IRDA_RxCpltCallback() / - HAL_IRDA_TxHalfCpltCallback / HAL_IRDA_RxHalfCpltCallback: - indeed, when HAL_DMA_Abort() API is called, the DMA TX/RX Transfer or Half Transfer complete - interrupt is generated if the DMA transfer interruption occurs at the middle or at the end of - the stream and the corresponding call back is executed. */ - - /* Disable the IRDA Tx/Rx DMA requests */ - CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAT); - CLEAR_BIT(hirda->Instance->CR3, USART_CR3_DMAR); - - /* Abort the IRDA DMA tx channel */ - if(hirda->hdmatx != NULL) - { - HAL_DMA_Abort(hirda->hdmatx); - } - /* Abort the IRDA DMA rx channel */ - if(hirda->hdmarx != NULL) - { - HAL_DMA_Abort(hirda->hdmarx); - } - - hirda->State = HAL_IRDA_STATE_READY; - - return HAL_OK; -} - - -/** - * @brief Handle IRDA interrupt request. - * @param hirda: Pointer to a IRDA_HandleTypeDef structure that contains - * the configuration information for the specified IRDA module. - * @retval None - */ -void HAL_IRDA_IRQHandler(IRDA_HandleTypeDef *hirda) -{ - /* IRDA parity error interrupt occurred -------------------------------------*/ - if((__HAL_IRDA_GET_IT(hirda, IRDA_IT_PE) != RESET) && (__HAL_IRDA_GET_IT_SOURCE(hirda, IRDA_IT_PE) != RESET)) - { - __HAL_IRDA_CLEAR_IT(hirda, IRDA_CLEAR_PEF); - - hirda->ErrorCode |= HAL_IRDA_ERROR_PE; - /* Set the IRDA state ready to be able to start again the process */ - hirda->State = HAL_IRDA_STATE_READY; - } - - /* IRDA frame error interrupt occurred --------------------------------------*/ - if((__HAL_IRDA_GET_IT(hirda, IRDA_IT_FE) != RESET) && (__HAL_IRDA_GET_IT_SOURCE(hirda, IRDA_IT_ERR) != RESET)) - { - __HAL_IRDA_CLEAR_IT(hirda, IRDA_CLEAR_FEF); - - hirda->ErrorCode |= HAL_IRDA_ERROR_FE; - /* Set the IRDA state ready to be able to start again the process */ - hirda->State = HAL_IRDA_STATE_READY; - } - - /* IRDA noise error interrupt occurred --------------------------------------*/ - if((__HAL_IRDA_GET_IT(hirda, IRDA_IT_NE) != RESET) && (__HAL_IRDA_GET_IT_SOURCE(hirda, IRDA_IT_ERR) != RESET)) - { - __HAL_IRDA_CLEAR_IT(hirda, IRDA_CLEAR_NEF); - - hirda->ErrorCode |= HAL_IRDA_ERROR_NE; - /* Set the IRDA state ready to be able to start again the process */ - hirda->State = HAL_IRDA_STATE_READY; - } - - /* IRDA Over-Run interrupt occurred -----------------------------------------*/ - if((__HAL_IRDA_GET_IT(hirda, IRDA_IT_ORE) != RESET) && (__HAL_IRDA_GET_IT_SOURCE(hirda, IRDA_IT_ERR) != RESET)) - { - __HAL_IRDA_CLEAR_IT(hirda, IRDA_CLEAR_OREF); - - hirda->ErrorCode |= HAL_IRDA_ERROR_ORE; - /* Set the IRDA state ready to be able to start again the process */ - hirda->State = HAL_IRDA_STATE_READY; - } - - /* Call IRDA Error Call back function if need be --------------------------*/ - if(hirda->ErrorCode != HAL_IRDA_ERROR_NONE) - { - HAL_IRDA_ErrorCallback(hirda); - } - - /* IRDA in mode Receiver ---------------------------------------------------*/ - if((__HAL_IRDA_GET_IT(hirda, IRDA_IT_RXNE) != RESET) && (__HAL_IRDA_GET_IT_SOURCE(hirda, IRDA_IT_RXNE) != RESET)) - { - IRDA_Receive_IT(hirda); - /* Clear RXNE interrupt flag */ - __HAL_IRDA_SEND_REQ(hirda, IRDA_RXDATA_FLUSH_REQUEST); - } - - - /* IRDA in mode Transmitter ------------------------------------------------*/ - if((__HAL_IRDA_GET_IT(hirda, IRDA_IT_TXE) != RESET) &&(__HAL_IRDA_GET_IT_SOURCE(hirda, IRDA_IT_TXE) != RESET)) - { - IRDA_Transmit_IT(hirda); - } - - /* IRDA in mode Transmitter (transmission end) -----------------------------*/ - if((__HAL_IRDA_GET_IT(hirda, IRDA_IT_TC) != RESET) &&(__HAL_IRDA_GET_IT_SOURCE(hirda, IRDA_IT_TC) != RESET)) - { - IRDA_EndTransmit_IT(hirda); - } - -} - -/** - * @brief Tx Transfer completed callback. - * @param hirda: Pointer to a IRDA_HandleTypeDef structure that contains - * the configuration information for the specified IRDA module. - * @retval None - */ - __weak void HAL_IRDA_TxCpltCallback(IRDA_HandleTypeDef *hirda) -{ - /* NOTE: This function should not be modified, when the callback is needed, - the HAL_IRDA_TxCpltCallback can be implemented in the user file. - */ -} - -/** - * @brief Tx Half Transfer completed callback. - * @param hirda: Pointer to a IRDA_HandleTypeDef structure that contains - * the configuration information for the specified USART module. - * @retval None - */ - __weak void HAL_IRDA_TxHalfCpltCallback(IRDA_HandleTypeDef *hirda) -{ - /* NOTE: This function should not be modified, when the callback is needed, - the HAL_IRDA_TxHalfCpltCallback can be implemented in the user file. - */ -} - -/** - * @brief Rx Transfer completed callback. - * @param hirda: Pointer to a IRDA_HandleTypeDef structure that contains - * the configuration information for the specified IRDA module. - * @retval None - */ -__weak void HAL_IRDA_RxCpltCallback(IRDA_HandleTypeDef *hirda) -{ - /* NOTE: This function should not be modified, when the callback is needed, - the HAL_IRDA_RxCpltCallback can be implemented in the user file. - */ -} - -/** - * @brief Rx Half Transfer complete callback. - * @param hirda: Pointer to a IRDA_HandleTypeDef structure that contains - * the configuration information for the specified IRDA module. - * @retval None - */ -__weak void HAL_IRDA_RxHalfCpltCallback(IRDA_HandleTypeDef *hirda) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_IRDA_RxHalfCpltCallback can be implemented in the user file. - */ -} - -/** - * @brief IRDA error callback. - * @param hirda: Pointer to a IRDA_HandleTypeDef structure that contains - * the configuration information for the specified IRDA module. - * @retval None - */ - __weak void HAL_IRDA_ErrorCallback(IRDA_HandleTypeDef *hirda) -{ - /* NOTE: This function should not be modified, when the callback is needed, - the HAL_IRDA_ErrorCallback can be implemented in the user file. - */ -} - -/** - * @} - */ - -/** @defgroup IRDA_Exported_Functions_Group4 Peripheral State and Error functions - * @brief IRDA State and Errors functions - * -@verbatim - ============================================================================== - ##### Peripheral State and Errors functions ##### - ============================================================================== - [..] - This subsection provides a set of functions allowing to return the State of IrDA - communication process and also return Peripheral Errors occurred during communication process - (+) HAL_IRDA_GetState() API can be helpful to check in run-time the state - of the IRDA peripheral handle. - (+) HAL_IRDA_GetError() checks in run-time errors that could occur during - communication. - -@endverbatim - * @{ - */ - -/** - * @brief Return the IRDA handle state. - * @param hirda: Pointer to a IRDA_HandleTypeDef structure that contains - * the configuration information for the specified IRDA module. - * @retval HAL state - */ -HAL_IRDA_StateTypeDef HAL_IRDA_GetState(IRDA_HandleTypeDef *hirda) -{ - /* Return IRDA handle state */ - return hirda->State; -} - -/** - * @brief Return the IRDA handle error code. - * @param hirda: Pointer to a IRDA_HandleTypeDef structure that contains - * the configuration information for the specified IRDA module. - * @retval IRDA Error Code - */ -uint32_t HAL_IRDA_GetError(IRDA_HandleTypeDef *hirda) -{ - return hirda->ErrorCode; -} - -/** - * @} - */ - -/** - * @} - */ - -/** @defgroup IRDA_Private_Functions IRDA Private Functions - * @{ - */ - -/** - * @brief DMA IRDA transmit process complete callback. - * @param hdma: Pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA module. - * @retval None - */ -static void IRDA_DMATransmitCplt(DMA_HandleTypeDef *hdma) -{ - IRDA_HandleTypeDef* hirda = ( IRDA_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; - - /* DMA Normal mode */ - if ( HAL_IS_BIT_CLR(hdma->Instance->CCR, DMA_CCR_CIRC) ) - { - hirda->TxXferCount = 0; - - /* Disable the DMA transfer for transmit request by resetting the DMAT bit - in the IRDA CR3 register */ - hirda->Instance->CR3 &= ~(USART_CR3_DMAT); - - /* Enable the IRDA Transmit Complete Interrupt */ - __HAL_IRDA_ENABLE_IT(hirda, IRDA_IT_TC); - } - /* DMA Circular mode */ - else - { - HAL_IRDA_TxCpltCallback(hirda); - } -} - -/** - * @brief DMA IRDA receive process half complete callback. - * @param hdma: Pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA module. - * @retval None - */ -static void IRDA_DMATransmitHalfCplt(DMA_HandleTypeDef *hdma) -{ - IRDA_HandleTypeDef* hirda = ( IRDA_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; - - HAL_IRDA_TxHalfCpltCallback(hirda); -} - -/** - * @brief DMA IRDA receive process complete callback. - * @param hdma: Pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA module. - * @retval None - */ -static void IRDA_DMAReceiveCplt(DMA_HandleTypeDef *hdma) -{ - IRDA_HandleTypeDef* hirda = ( IRDA_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; - - /* DMA Normal mode */ - if ( HAL_IS_BIT_CLR(hdma->Instance->CCR, DMA_CCR_CIRC) ) - { - hirda->RxXferCount = 0; - - /* Disable the DMA transfer for the receiver request by resetting the DMAR bit - in the IRDA CR3 register */ - hirda->Instance->CR3 &= ~(USART_CR3_DMAR); - - if(hirda->State == HAL_IRDA_STATE_BUSY_TX_RX) - { - hirda->State = HAL_IRDA_STATE_BUSY_TX; - } - else - { - hirda->State = HAL_IRDA_STATE_READY; - } - } - - HAL_IRDA_RxCpltCallback(hirda); -} - -/** - * @brief DMA IRDA receive process half complete callback. - * @param hdma: Pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA module. - * @retval None - */ -static void IRDA_DMAReceiveHalfCplt(DMA_HandleTypeDef *hdma) -{ - IRDA_HandleTypeDef* hirda = ( IRDA_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; - - HAL_IRDA_RxHalfCpltCallback(hirda); -} - -/** - * @brief DMA IRDA communication error callback. - * @param hdma: Pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA module. - * @retval None - */ -static void IRDA_DMAError(DMA_HandleTypeDef *hdma) -{ - IRDA_HandleTypeDef* hirda = ( IRDA_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; - - hirda->RxXferCount = 0; - hirda->TxXferCount = 0; - hirda->ErrorCode |= HAL_IRDA_ERROR_DMA; - hirda->State= HAL_IRDA_STATE_READY; - - HAL_IRDA_ErrorCallback(hirda); -} - -/** - * @brief Handle IRDA Communication Timeout. - * @param hirda: Pointer to a IRDA_HandleTypeDef structure that contains - * the configuration information for the specified IRDA module. - * @param Flag: specifies the IRDA flag to check. - * @param Status: the new flag status (SET or RESET). The function is locked in a while loop as long as the flag remains set to Status. - * @param Timeout: Timeout duration - * @retval HAL status - */ -static HAL_StatusTypeDef IRDA_WaitOnFlagUntilTimeout(IRDA_HandleTypeDef *hirda, uint32_t Flag, FlagStatus Status, uint32_t Timeout) -{ - uint32_t tickstart = HAL_GetTick(); - - /* Wait until flag is set */ - if(Status == RESET) - { - while(__HAL_IRDA_GET_FLAG(hirda, Flag) == RESET) - { - /* Check for the Timeout */ - if(Timeout != HAL_MAX_DELAY) - { - if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout)) - { - /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */ - __HAL_IRDA_DISABLE_IT(hirda, IRDA_IT_TXE); - __HAL_IRDA_DISABLE_IT(hirda, IRDA_IT_RXNE); - __HAL_IRDA_DISABLE_IT(hirda, IRDA_IT_PE); - __HAL_IRDA_DISABLE_IT(hirda, IRDA_IT_ERR); - - hirda->State= HAL_IRDA_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hirda); - - return HAL_TIMEOUT; - } - } - } - } - else - { - while(__HAL_IRDA_GET_FLAG(hirda, Flag) != RESET) - { - /* Check for the Timeout */ - if(Timeout != HAL_MAX_DELAY) - { - if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout)) - { - /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */ - __HAL_IRDA_DISABLE_IT(hirda, IRDA_IT_TXE); - __HAL_IRDA_DISABLE_IT(hirda, IRDA_IT_RXNE); - __HAL_IRDA_DISABLE_IT(hirda, IRDA_IT_PE); - __HAL_IRDA_DISABLE_IT(hirda, IRDA_IT_ERR); - - hirda->State= HAL_IRDA_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hirda); - - return HAL_TIMEOUT; - } - } - } - } - return HAL_OK; -} - -/** - * @brief Send an amount of data in non-blocking mode. - * @note Function is called under interruption only, once - * interruptions have been enabled by HAL_IRDA_Transmit_IT(). - * @param hirda: Pointer to a IRDA_HandleTypeDef structure that contains - * the configuration information for the specified IRDA module. - * @retval HAL status - */ -static HAL_StatusTypeDef IRDA_Transmit_IT(IRDA_HandleTypeDef *hirda) -{ - uint16_t* tmp; - - if((hirda->State == HAL_IRDA_STATE_BUSY_TX) || (hirda->State == HAL_IRDA_STATE_BUSY_TX_RX)) - { - if(hirda->TxXferCount == 0) - { - /* Disable the IRDA Transmit Data Register Empty Interrupt */ - __HAL_IRDA_DISABLE_IT(hirda, IRDA_IT_TXE); - - /* Enable the IRDA Transmit Complete Interrupt */ - __HAL_IRDA_ENABLE_IT(hirda, IRDA_IT_TC); - - return HAL_OK; - } - else - { - if ((hirda->Init.WordLength == IRDA_WORDLENGTH_9B) && (hirda->Init.Parity == IRDA_PARITY_NONE)) - { - tmp = (uint16_t*) hirda->pTxBuffPtr; - hirda->Instance->TDR = (*tmp & (uint16_t)0x01FF); - hirda->pTxBuffPtr += 2; - } - else - { - hirda->Instance->TDR = (uint8_t)(*hirda->pTxBuffPtr++ & (uint8_t)0xFF); - } - hirda->TxXferCount--; - - return HAL_OK; - } - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Wrap up transmission in non-blocking mode. - * @param hirda: pointer to a IRDA_HandleTypeDef structure that contains - * the configuration information for the specified IRDA module. - * @retval HAL status - */ -static HAL_StatusTypeDef IRDA_EndTransmit_IT(IRDA_HandleTypeDef *hirda) -{ - /* Disable the IRDA Transmit Complete Interrupt */ - __HAL_IRDA_DISABLE_IT(hirda, IRDA_IT_TC); - - /* Check if a receive process is ongoing or not */ - if(hirda->State == HAL_IRDA_STATE_BUSY_TX_RX) - { - hirda->State = HAL_IRDA_STATE_BUSY_RX; - } - else - { - /* Disable the IRDA Error Interrupt: (Frame error, noise error, overrun error) */ - __HAL_IRDA_DISABLE_IT(hirda, IRDA_IT_ERR); - - hirda->State = HAL_IRDA_STATE_READY; - } - - HAL_IRDA_TxCpltCallback(hirda); - - return HAL_OK; -} - - -/** - * @brief Receive an amount of data in non-blocking mode. - * Function is called under interruption only, once - * interruptions have been enabled by HAL_IRDA_Receive_IT(). - * @param hirda: Pointer to a IRDA_HandleTypeDef structure that contains - * the configuration information for the specified IRDA module. - * @retval HAL status - */ -static HAL_StatusTypeDef IRDA_Receive_IT(IRDA_HandleTypeDef *hirda) -{ - uint16_t* tmp; - uint16_t uhMask = hirda->Mask; - - if ((hirda->State == HAL_IRDA_STATE_BUSY_RX) || (hirda->State == HAL_IRDA_STATE_BUSY_TX_RX)) - { - - if ((hirda->Init.WordLength == IRDA_WORDLENGTH_9B) && (hirda->Init.Parity == IRDA_PARITY_NONE)) - { - tmp = (uint16_t*) hirda->pRxBuffPtr ; - *tmp = (uint16_t)(hirda->Instance->RDR & uhMask); - hirda->pRxBuffPtr +=2; - } - else - { - *hirda->pRxBuffPtr++ = (uint8_t)(hirda->Instance->RDR & (uint8_t)uhMask); - } - - if(--hirda->RxXferCount == 0) - { - __HAL_IRDA_DISABLE_IT(hirda, IRDA_IT_RXNE); - - if(hirda->State == HAL_IRDA_STATE_BUSY_TX_RX) - { - hirda->State = HAL_IRDA_STATE_BUSY_TX; - } - else - { - /* Disable the IRDA Parity Error Interrupt */ - __HAL_IRDA_DISABLE_IT(hirda, IRDA_IT_PE); - - /* Disable the IRDA Error Interrupt: (Frame error, noise error, overrun error) */ - __HAL_IRDA_DISABLE_IT(hirda, IRDA_IT_ERR); - - hirda->State = HAL_IRDA_STATE_READY; - } - - HAL_IRDA_RxCpltCallback(hirda); - - return HAL_OK; - } - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Configure the IRDA peripheral. - * @param hirda: Pointer to a IRDA_HandleTypeDef structure that contains - * the configuration information for the specified IRDA module. - * @retval None - */ -static HAL_StatusTypeDef IRDA_SetConfig(IRDA_HandleTypeDef *hirda) -{ - uint32_t tmpreg = 0x00000000; - IRDA_ClockSourceTypeDef clocksource = IRDA_CLOCKSOURCE_UNDEFINED; - HAL_StatusTypeDef ret = HAL_OK; - - /* Check the communication parameters */ - assert_param(IS_IRDA_BAUDRATE(hirda->Init.BaudRate)); - assert_param(IS_IRDA_WORD_LENGTH(hirda->Init.WordLength)); - assert_param(IS_IRDA_PARITY(hirda->Init.Parity)); - assert_param(IS_IRDA_TX_RX_MODE(hirda->Init.Mode)); - assert_param(IS_IRDA_PRESCALER(hirda->Init.Prescaler)); - assert_param(IS_IRDA_POWERMODE(hirda->Init.PowerMode)); - - /*-------------------------- USART CR1 Configuration -----------------------*/ - /* Configure the IRDA Word Length, Parity and transfer Mode: - Set the M bits according to hirda->Init.WordLength value - Set PCE and PS bits according to hirda->Init.Parity value - Set TE and RE bits according to hirda->Init.Mode value */ - tmpreg = (uint32_t)hirda->Init.WordLength | hirda->Init.Parity | hirda->Init.Mode ; - - MODIFY_REG(hirda->Instance->CR1, IRDA_CR1_FIELDS, tmpreg); - - /*-------------------------- USART CR3 Configuration -----------------------*/ - MODIFY_REG(hirda->Instance->CR3, USART_CR3_IRLP, hirda->Init.PowerMode); - - /*-------------------------- USART GTPR Configuration ----------------------*/ - MODIFY_REG(hirda->Instance->GTPR, USART_GTPR_PSC, hirda->Init.Prescaler); - - /*-------------------------- USART BRR Configuration -----------------------*/ - IRDA_GETCLOCKSOURCE(hirda, clocksource); - switch (clocksource) - { - case IRDA_CLOCKSOURCE_PCLK1: - hirda->Instance->BRR = (uint16_t)(HAL_RCC_GetPCLK1Freq() / hirda->Init.BaudRate); - break; - case IRDA_CLOCKSOURCE_PCLK2: - hirda->Instance->BRR = (uint16_t)(HAL_RCC_GetPCLK2Freq() / hirda->Init.BaudRate); - break; - case IRDA_CLOCKSOURCE_HSI: - hirda->Instance->BRR = (uint16_t)(HSI_VALUE / hirda->Init.BaudRate); - break; - case IRDA_CLOCKSOURCE_SYSCLK: - hirda->Instance->BRR = (uint16_t)(HAL_RCC_GetSysClockFreq() / hirda->Init.BaudRate); - break; - case IRDA_CLOCKSOURCE_LSE: - hirda->Instance->BRR = (uint16_t)(LSE_VALUE / hirda->Init.BaudRate); - break; - case IRDA_CLOCKSOURCE_UNDEFINED: - default: - ret = HAL_ERROR; - break; - } - - return ret; -} - -/** - * @brief Check the IRDA Idle State. - * @param hirda: Pointer to a IRDA_HandleTypeDef structure that contains - * the configuration information for the specified IRDA module. - * @retval HAL status - */ -static HAL_StatusTypeDef IRDA_CheckIdleState(IRDA_HandleTypeDef *hirda) -{ - - /* Initialize the IRDA ErrorCode */ - hirda->ErrorCode = HAL_IRDA_ERROR_NONE; - - /* Check if the Transmitter is enabled */ - if((hirda->Instance->CR1 & USART_CR1_TE) == USART_CR1_TE) - { - /* Wait until TEACK flag is set */ - if(IRDA_WaitOnFlagUntilTimeout(hirda, USART_ISR_TEACK, RESET, IRDA_TEACK_REACK_TIMEOUT) != HAL_OK) - { - /* Timeout occurred */ - return HAL_TIMEOUT; - } - } - /* Check if the Receiver is enabled */ - if((hirda->Instance->CR1 & USART_CR1_RE) == USART_CR1_RE) - { - if(IRDA_WaitOnFlagUntilTimeout(hirda, USART_ISR_REACK, RESET, IRDA_TEACK_REACK_TIMEOUT) != HAL_OK) - { - /* Timeout occurred */ - return HAL_TIMEOUT; - } - } - - /* Initialize the IRDA state*/ - hirda->State= HAL_IRDA_STATE_READY; - /* Process Unlocked */ - __HAL_UNLOCK(hirda); - - return HAL_OK; -} - -/** - * @} - */ - -#endif /* HAL_IRDA_MODULE_ENABLED */ -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ -
--- a/Src/stm32l4xx_hal_iwdg.c Thu Nov 12 20:49:49 2015 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,420 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_iwdg.c - * @author MCD Application Team - * @version V1.1.0 - * @date 16-September-2015 - * @brief IWDG HAL module driver. - * This file provides firmware functions to manage the following - * functionalities of the Independent Watchdog (IWDG) peripheral: - * + Initialization and de-initialization functions - * + IO operation functions - * + Peripheral State functions - * - @verbatim - ============================================================================== - ##### IWDG Generic features ##### - ============================================================================== - [..] - (+) The IWDG can be started by either software or hardware (configurable - through option byte). - - (+) The IWDG is clocked by its own dedicated Low-Speed clock (LSI) and - thus stays active even if the main clock fails. - Once the IWDG is started, the LSI is forced ON and cannot be disabled - (LSI cannot be disabled too), and the counter starts counting down from - the reset value of 0xFFF. When it reaches the end of count value (0x000) - a system reset is generated. - - (+) The IWDG counter should be refreshed at regular intervals, otherwise the - watchdog generates an MCU reset when the counter reaches 0. - - (+) The IWDG is implemented in the VDD voltage domain that is still functional - in STOP and STANDBY mode (IWDG reset can wake-up from STANDBY). - IWDGRST flag in RCC_CSR register can be used to inform when an IWDG - reset occurs. - - [..] Min-max timeout value @32KHz (LSI): ~125us / ~32.7s - The IWDG timeout may vary due to LSI frequency dispersion. STM32L4xx - devices provide the capability to measure the LSI frequency (LSI clock - connected internally to TIM16 CH1 input capture). The measured value - can be used to have an IWDG timeout with an acceptable accuracy. - - - ##### How to use this driver ##### - ============================================================================== - [..] - If Window option is disabled - - (+) Use IWDG using HAL_IWDG_Init() function to : - (++) Enable write access to IWDG_PR, IWDG_RLR. - (++) Configure the IWDG prescaler, counter reload value. - This reload value will be loaded in the IWDG counter each time the counter - is reloaded, then the IWDG will start counting down from this value. - (+) Use IWDG using HAL_IWDG_Start() function to : - (++) Reload IWDG counter with value defined in the IWDG_RLR register. - (++) Start the IWDG, when the IWDG is used in software mode (no need - to enable the LSI, it will be enabled by hardware). - (+) Then the application program must refresh the IWDG counter at regular - intervals during normal operation to prevent an MCU reset, using - HAL_IWDG_Refresh() function. - [..] - if Window option is enabled: - - (+) Use IWDG using HAL_IWDG_Start() function to enable IWDG downcounter - (+) Use IWDG using HAL_IWDG_Init() function to : - (++) Enable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers. - (++) Configure the IWDG prescaler, reload value and window value. - (+) Then the application program must refresh the IWDG counter at regular - intervals during normal operation to prevent an MCU reset, using - HAL_IWDG_Refresh() function. - - *** IWDG HAL driver macros list *** - ==================================== - [..] - Below the list of most used macros in IWDG HAL driver. - - (+) __HAL_IWDG_START: Enable the IWDG peripheral - (+) __HAL_IWDG_RELOAD_COUNTER: Reloads IWDG counter with value defined in the reload register - (+) __HAL_IWDG_GET_FLAG: Get the selected IWDG's flag status - - @endverbatim - ****************************************************************************** - * @attention - * - * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @defgroup IWDG IWDG - * @brief IWDG HAL module driver. - * @{ - */ - -#ifdef HAL_IWDG_MODULE_ENABLED - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -/** @defgroup IWDG_Private_Defines IWDG Private Defines - * @{ - */ - -#define HAL_IWDG_DEFAULT_TIMEOUT (uint32_t)1000 -/* Local define used to check the SR status register */ -#define IWDG_SR_FLAGS (IWDG_FLAG_PVU | IWDG_FLAG_RVU | IWDG_FLAG_WVU) - -/** - * @} - */ -/* Private macro -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ -/* Exported functions --------------------------------------------------------*/ - -/** @defgroup IWDG_Exported_Functions IWDG Exported Functions - * @{ - */ - -/** @defgroup IWDG_Exported_Functions_Group1 Initialization and de-initialization functions - * @brief Initialization and Configuration functions. - * -@verbatim - =============================================================================== - ##### Initialization and de-initialization functions ##### - =============================================================================== - [..] This section provides functions allowing to: - (+) Initialize the IWDG according to the specified parameters - in the IWDG_InitTypeDef and create the associated handle - (+) Manage Window option - (+) Initialize the IWDG MSP - (+) DeInitialize the IWDG MSP - -@endverbatim - * @{ - */ - -/** - * @brief Initialize the IWDG according to the specified - * parameters in the IWDG_InitTypeDef and initialize the associated handle. - * @param hiwdg: pointer to a IWDG_HandleTypeDef structure that contains - * the configuration information for the specified IWDG module. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg) -{ - uint32_t tickstart = 0; - - /* Check the IWDG handle allocation */ - if(hiwdg == NULL) - { - return HAL_ERROR; - } - - /* Check the parameters */ - assert_param(IS_IWDG_PRESCALER(hiwdg->Init.Prescaler)); - assert_param(IS_IWDG_RELOAD(hiwdg->Init.Reload)); - assert_param(IS_IWDG_WINDOW(hiwdg->Init.Window)); - - /* Check pending flag, if previous update not done, return error */ - if(((hiwdg->Instance->SR) & IWDG_SR_FLAGS) != 0) - { - return HAL_ERROR; - } - - if(hiwdg->State == HAL_IWDG_STATE_RESET) - { - /* Allocate lock resource and initialize it */ - hiwdg->Lock = HAL_UNLOCKED; - - /* Init the low level hardware */ - HAL_IWDG_MspInit(hiwdg); - } - - /* Change IWDG peripheral state */ - hiwdg->State = HAL_IWDG_STATE_BUSY; - - /* Enable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers */ - /* by writing 0x5555 in KR */ - IWDG_ENABLE_WRITE_ACCESS(hiwdg); - - /* Write to IWDG registers the IWDG_Prescaler & IWDG_Reload values to work with */ - MODIFY_REG(hiwdg->Instance->PR, IWDG_PR_PR, hiwdg->Init.Prescaler); - MODIFY_REG(hiwdg->Instance->RLR, IWDG_RLR_RL, hiwdg->Init.Reload); - - /* check if window option is enabled */ - if (((hiwdg->Init.Window) != IWDG_WINDOW_DISABLE) || ((hiwdg->Instance->WINR) != IWDG_WINDOW_DISABLE)) - { - tickstart = HAL_GetTick(); - - /* Wait for register to be updated */ - while(((hiwdg->Instance->SR) & IWDG_SR_FLAGS) != 0) - { - if((HAL_GetTick() - tickstart ) > HAL_IWDG_DEFAULT_TIMEOUT) - { - /* Set IWDG state */ - hiwdg->State = HAL_IWDG_STATE_TIMEOUT; - return HAL_TIMEOUT; - } - } - - /* Write to IWDG WINR the IWDG_Window value to compare with */ - MODIFY_REG(hiwdg->Instance->WINR, IWDG_WINR_WIN, hiwdg->Init.Window); - } - - /* Change IWDG peripheral state */ - hiwdg->State = HAL_IWDG_STATE_READY; - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Initialize the IWDG MSP. - * @param hiwdg: pointer to a IWDG_HandleTypeDef structure that contains - * the configuration information for the specified IWDG module. - * @retval None - */ -__weak void HAL_IWDG_MspInit(IWDG_HandleTypeDef *hiwdg) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_IWDG_MspInit could be implemented in the user file - */ -} - -/** - * @} - */ - -/** @defgroup IWDG_Exported_Functions_Group2 IO operation functions - * @brief IO operation functions - * -@verbatim - =============================================================================== - ##### IO operation functions ##### - =============================================================================== - [..] This section provides functions allowing to: - (+) Start the IWDG. - (+) Refresh the IWDG. - -@endverbatim - * @{ - */ - -/** - * @brief Start the IWDG. - * @param hiwdg: pointer to a IWDG_HandleTypeDef structure that contains - * the configuration information for the specified IWDG module. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_IWDG_Start(IWDG_HandleTypeDef *hiwdg) -{ - uint32_t tickstart = 0; - - /* Process locked */ - __HAL_LOCK(hiwdg); - - /* Change IWDG peripheral state */ - hiwdg->State = HAL_IWDG_STATE_BUSY; - - /* Reload IWDG counter with value defined in the RLR register */ - if ((hiwdg->Init.Window) == IWDG_WINDOW_DISABLE) - { - __HAL_IWDG_RELOAD_COUNTER(hiwdg); - } - - /* Start the IWDG peripheral */ - __HAL_IWDG_START(hiwdg); - - tickstart = HAL_GetTick(); - - /* Wait until PVU, RVU, WVU flag are RESET */ - while(((hiwdg->Instance->SR) & IWDG_SR_FLAGS) != 0) - { - - if((HAL_GetTick() - tickstart ) > HAL_IWDG_DEFAULT_TIMEOUT) - { - /* Set IWDG state */ - hiwdg->State = HAL_IWDG_STATE_TIMEOUT; - - /* Process unlocked */ - __HAL_UNLOCK(hiwdg); - - return HAL_TIMEOUT; - } - } - - /* Change IWDG peripheral state */ - hiwdg->State = HAL_IWDG_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hiwdg); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Refresh the IWDG. - * @param hiwdg: pointer to a IWDG_HandleTypeDef structure that contains - * the configuration information for the specified IWDG module. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg) -{ - uint32_t tickstart = 0; - - /* Process Locked */ - __HAL_LOCK(hiwdg); - - /* Change IWDG peripheral state */ - hiwdg->State = HAL_IWDG_STATE_BUSY; - - tickstart = HAL_GetTick(); - - /* Wait until RVU flag is RESET */ - while(__HAL_IWDG_GET_FLAG(hiwdg, IWDG_FLAG_RVU) != RESET) - { - if((HAL_GetTick() - tickstart ) > HAL_IWDG_DEFAULT_TIMEOUT) - { - /* Set IWDG state */ - hiwdg->State = HAL_IWDG_STATE_TIMEOUT; - - /* Process unlocked */ - __HAL_UNLOCK(hiwdg); - - return HAL_TIMEOUT; - } - } - - /* Reload IWDG counter with value defined in the reload register */ - __HAL_IWDG_RELOAD_COUNTER(hiwdg); - - /* Change IWDG peripheral state */ - hiwdg->State = HAL_IWDG_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hiwdg); - - /* Return function status */ - return HAL_OK; -} - -/** - * @} - */ - -/** @defgroup IWDG_Exported_Functions_Group3 Peripheral State functions - * @brief Peripheral State functions. - * -@verbatim - =============================================================================== - ##### Peripheral State functions ##### - =============================================================================== - [..] - This subsection permits to get in run-time the status of the peripheral. - -@endverbatim - * @{ - */ - -/** - * @brief Return the IWDG handle state. - * @param hiwdg: pointer to a IWDG_HandleTypeDef structure that contains - * the configuration information for the specified IWDG module. - * @retval HAL state - */ -HAL_IWDG_StateTypeDef HAL_IWDG_GetState(IWDG_HandleTypeDef *hiwdg) -{ - /* Return IWDG handle state */ - return hiwdg->State; -} - -/** - * @} - */ - -/** - * @} - */ - -#endif /* HAL_IWDG_MODULE_ENABLED */ -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ -
--- a/Src/stm32l4xx_hal_nand.c Thu Nov 12 20:49:49 2015 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,1115 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_nand.c - * @author MCD Application Team - * @version V1.1.0 - * @date 16-September-2015 - * @brief NAND HAL module driver. - * This file provides a generic firmware to drive NAND memories mounted - * as external device. - * - @verbatim - ============================================================================== - ##### How to use this driver ##### - ============================================================================== - [..] - This driver is a generic layered driver which contains a set of APIs used to - control NAND flash memories. It uses the FMC layer functions to interface - with NAND devices. This driver is used as follows: - - (+) NAND flash memory configuration sequence using the function HAL_NAND_Init() - with control and timing parameters for both common and attribute spaces. - - (+) Read NAND flash memory maker and device IDs using the function - HAL_NAND_Read_ID(). The read information is stored in the NAND_ID_TypeDef - structure declared by the function caller. - - (+) Access NAND flash memory by read/write operations using the functions - HAL_NAND_Read_Page()/HAL_NAND_Read_SpareArea(), HAL_NAND_Write_Page()/HAL_NAND_Write_SpareArea() - to read/write page(s)/spare area(s). These functions use specific device - information (Block, page size..) predefined by the user in the HAL_NAND_Info_TypeDef - structure. The read/write address information is contained by the Nand_Address_Typedef - structure passed as parameter. - - (+) Perform NAND flash Reset chip operation using the function HAL_NAND_Reset(). - - (+) Perform NAND flash erase block operation using the function HAL_NAND_Erase_Block(). - The erase block address information is contained in the Nand_Address_Typedef - structure passed as parameter. - - (+) Read the NAND flash status operation using the function HAL_NAND_Read_Status(). - - (+) You can also control the NAND device by calling the control APIs HAL_NAND_ECC_Enable()/ - HAL_NAND_ECC_Disable() to respectively enable/disable the ECC code correction - feature or the function HAL_NAND_GetECC() to get the ECC correction code. - - (+) You can monitor the NAND device HAL state by calling the function - HAL_NAND_GetState() - - [..] - (@) This driver is a set of generic APIs which handle standard NAND flash operations. - If a NAND flash device contains different operations and/or implementations, - it should be implemented separately. - - @endverbatim - ****************************************************************************** - * @attention - * - * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -#ifdef HAL_NAND_MODULE_ENABLED - -/** @defgroup NAND NAND - * @brief NAND HAL module driver - * @{ - */ - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -/** @defgroup NAND_Private_Constants NAND Private Constants - * @{ - */ - -/** - * @} - */ - -/* Private macro -------------------------------------------------------------*/ -/** @defgroup NAND_Private_Macros NAND Private Macros - * @{ - */ - -/** - * @} - */ - -/* Private variables ---------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ -/** @defgroup NAND_Private_Functions NAND Private Functions - * @{ - */ -static uint32_t NAND_AddressIncrement(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef* Address); -/** - * @} - */ - -/* Exported functions ---------------------------------------------------------*/ - -/** @defgroup NAND_Exported_Functions NAND Exported Functions - * @{ - */ - -/** @defgroup NAND_Exported_Functions_Group1 Initialization and de-initialization functions - * @brief Initialization and Configuration functions - * - @verbatim - ============================================================================== - ##### NAND Initialization and de-initialization functions ##### - ============================================================================== - [..] - This section provides functions allowing to initialize/de-initialize - the NAND memory - -@endverbatim - * @{ - */ - -/** - * @brief Perform NAND memory Initialization sequence. - * @param hnand: pointer to a NAND_HandleTypeDef structure that contains - * the configuration information for NAND module. - * @param ComSpace_Timing: pointer to Common space timing structure - * @param AttSpace_Timing: pointer to Attribute space timing structure - * @retval HAL status - */ -HAL_StatusTypeDef HAL_NAND_Init(NAND_HandleTypeDef *hnand, FMC_NAND_PCC_TimingTypeDef *ComSpace_Timing, FMC_NAND_PCC_TimingTypeDef *AttSpace_Timing) -{ - /* Check the NAND handle state */ - if(hnand == NULL) - { - return HAL_ERROR; - } - - if(hnand->State == HAL_NAND_STATE_RESET) - { - /* Allocate lock resource and initialize it */ - hnand->Lock = HAL_UNLOCKED; - - /* Initialize the low level hardware (MSP) */ - HAL_NAND_MspInit(hnand); - } - - /* Initialize NAND control Interface */ - FMC_NAND_Init(hnand->Instance, &(hnand->Init)); - - /* Initialize NAND common space timing Interface */ - FMC_NAND_CommonSpace_Timing_Init(hnand->Instance, ComSpace_Timing, hnand->Init.NandBank); - - /* Initialize NAND attribute space timing Interface */ - FMC_NAND_AttributeSpace_Timing_Init(hnand->Instance, AttSpace_Timing, hnand->Init.NandBank); - - /* Enable the NAND device */ - __FMC_NAND_ENABLE(hnand->Instance, hnand->Init.NandBank); - - /* Update the NAND controller state */ - hnand->State = HAL_NAND_STATE_READY; - - return HAL_OK; -} - -/** - * @brief Perform NAND memory De-Initialization sequence. - * @param hnand: pointer to a NAND_HandleTypeDef structure that contains - * the configuration information for NAND module. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_NAND_DeInit(NAND_HandleTypeDef *hnand) -{ - /* Initialize the low level hardware (MSP) */ - HAL_NAND_MspDeInit(hnand); - - /* Configure the NAND registers with their reset values */ - FMC_NAND_DeInit(hnand->Instance, hnand->Init.NandBank); - - /* Reset the NAND controller state */ - hnand->State = HAL_NAND_STATE_RESET; - - /* Release Lock */ - __HAL_UNLOCK(hnand); - - return HAL_OK; -} - -/** - * @brief Initialize the NAND MSP. - * @param hnand: pointer to a NAND_HandleTypeDef structure that contains - * the configuration information for NAND module. - * @retval None - */ -__weak void HAL_NAND_MspInit(NAND_HandleTypeDef *hnand) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_NAND_MspInit could be implemented in the user file - */ -} - -/** - * @brief DeInitialize the NAND MSP. - * @param hnand: pointer to a NAND_HandleTypeDef structure that contains - * the configuration information for NAND module. - * @retval None - */ -__weak void HAL_NAND_MspDeInit(NAND_HandleTypeDef *hnand) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_NAND_MspDeInit could be implemented in the user file - */ -} - - -/** - * @brief This function handles NAND device interrupt request. - * @param hnand: pointer to a NAND_HandleTypeDef structure that contains - * the configuration information for NAND module. - * @retval HAL status -*/ -void HAL_NAND_IRQHandler(NAND_HandleTypeDef *hnand) -{ - /* Check NAND interrupt Rising edge flag */ - if(__FMC_NAND_GET_FLAG(hnand->Instance, hnand->Init.NandBank, FMC_FLAG_RISING_EDGE)) - { - /* NAND interrupt callback*/ - HAL_NAND_ITCallback(hnand); - - /* Clear NAND interrupt Rising edge pending bit */ - __FMC_NAND_CLEAR_FLAG(hnand->Instance, hnand->Init.NandBank, FMC_FLAG_RISING_EDGE); - } - - /* Check NAND interrupt Level flag */ - if(__FMC_NAND_GET_FLAG(hnand->Instance, hnand->Init.NandBank, FMC_FLAG_LEVEL)) - { - /* NAND interrupt callback*/ - HAL_NAND_ITCallback(hnand); - - /* Clear NAND interrupt Level pending bit */ - __FMC_NAND_CLEAR_FLAG(hnand->Instance, hnand->Init.NandBank, FMC_FLAG_LEVEL); - } - - /* Check NAND interrupt Falling edge flag */ - if(__FMC_NAND_GET_FLAG(hnand->Instance, hnand->Init.NandBank, FMC_FLAG_FALLING_EDGE)) - { - /* NAND interrupt callback*/ - HAL_NAND_ITCallback(hnand); - - /* Clear NAND interrupt Falling edge pending bit */ - __FMC_NAND_CLEAR_FLAG(hnand->Instance, hnand->Init.NandBank, FMC_FLAG_FALLING_EDGE); - } - - /* Check NAND interrupt FIFO empty flag */ - if(__FMC_NAND_GET_FLAG(hnand->Instance, hnand->Init.NandBank, FMC_FLAG_FEMPT)) - { - /* NAND interrupt callback*/ - HAL_NAND_ITCallback(hnand); - - /* Clear NAND interrupt FIFO empty pending bit */ - __FMC_NAND_CLEAR_FLAG(hnand->Instance, hnand->Init.NandBank, FMC_FLAG_FEMPT); - } -} - -/** - * @brief NAND interrupt feature callback. - * @param hnand: pointer to a NAND_HandleTypeDef structure that contains - * the configuration information for NAND module. - * @retval None - */ -__weak void HAL_NAND_ITCallback(NAND_HandleTypeDef *hnand) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_NAND_ITCallback could be implemented in the user file - */ -} - -/** - * @} - */ - -/** @defgroup NAND_Exported_Functions_Group2 Input and Output functions - * @brief Input Output and memory control functions - * - @verbatim - ============================================================================== - ##### NAND Input and Output functions ##### - ============================================================================== - [..] - This section provides functions allowing to use and control the NAND - memory - -@endverbatim - * @{ - */ - -/** - * @brief Read the NAND memory electronic signature. - * @param hnand: pointer to a NAND_HandleTypeDef structure that contains - * the configuration information for NAND module. - * @param pNAND_ID: NAND ID structure - * @retval HAL status - */ -HAL_StatusTypeDef HAL_NAND_Read_ID(NAND_HandleTypeDef *hnand, NAND_IDTypeDef *pNAND_ID) -{ - __IO uint32_t data = 0; - uint32_t deviceaddress = 0; - - /* Process Locked */ - __HAL_LOCK(hnand); - - /* Check the NAND controller state */ - if(hnand->State == HAL_NAND_STATE_BUSY) - { - return HAL_BUSY; - } - - /* Identify the device address */ - deviceaddress = NAND_DEVICE; - - /* Update the NAND controller state */ - hnand->State = HAL_NAND_STATE_BUSY; - - /* Send Read ID command sequence */ - *(__IO uint8_t *)((uint32_t)(deviceaddress | CMD_AREA)) = NAND_CMD_READID; - *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = 0x00; - - /* Read the electronic signature from NAND flash */ - data = *(__IO uint32_t *)deviceaddress; - - /* Return the data read */ - pNAND_ID->Maker_Id = ADDR_1ST_CYCLE(data); - pNAND_ID->Device_Id = ADDR_2ND_CYCLE(data); - pNAND_ID->Third_Id = ADDR_3RD_CYCLE(data); - pNAND_ID->Fourth_Id = ADDR_4TH_CYCLE(data); - - /* Update the NAND controller state */ - hnand->State = HAL_NAND_STATE_READY; - - /* Process unlocked */ - __HAL_UNLOCK(hnand); - - return HAL_OK; -} - -/** - * @brief NAND memory reset. - * @param hnand: pointer to a NAND_HandleTypeDef structure that contains - * the configuration information for NAND module. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_NAND_Reset(NAND_HandleTypeDef *hnand) -{ - uint32_t deviceaddress = 0; - - /* Process Locked */ - __HAL_LOCK(hnand); - - /* Check the NAND controller state */ - if(hnand->State == HAL_NAND_STATE_BUSY) - { - return HAL_BUSY; - } - - /* Identify the device address */ - deviceaddress = NAND_DEVICE; - - /* Update the NAND controller state */ - hnand->State = HAL_NAND_STATE_BUSY; - - /* Send NAND reset command */ - *(__IO uint8_t *)((uint32_t)(deviceaddress | CMD_AREA)) = 0xFF; - - - /* Update the NAND controller state */ - hnand->State = HAL_NAND_STATE_READY; - - /* Process unlocked */ - __HAL_UNLOCK(hnand); - - return HAL_OK; - -} - -/** - * @brief Read Page(s) from NAND memory block. - * @param hnand: pointer to a NAND_HandleTypeDef structure that contains - * the configuration information for NAND module. - * @param pAddress: pointer to NAND address structure - * @param pBuffer: pointer to destination read buffer - * @param NumPageToRead: number of pages to read from block - * @retval HAL status - */ -HAL_StatusTypeDef HAL_NAND_Read_Page(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumPageToRead) -{ - __IO uint32_t index = 0; - uint32_t deviceaddress = 0, size = 0, numpagesread = 0, addressstatus = NAND_VALID_ADDRESS; - NAND_AddressTypeDef nandaddress; - uint32_t addressoffset = 0; - - /* Process Locked */ - __HAL_LOCK(hnand); - - /* Check the NAND controller state */ - if(hnand->State == HAL_NAND_STATE_BUSY) - { - return HAL_BUSY; - } - - /* Identify the device address */ - deviceaddress = NAND_DEVICE; - - /* Update the NAND controller state */ - hnand->State = HAL_NAND_STATE_BUSY; - - /* Save the content of pAddress as it will be modified */ - nandaddress.Block = pAddress->Block; - nandaddress.Page = pAddress->Page; - nandaddress.Zone = pAddress->Zone; - - /* Page(s) read loop */ - while((NumPageToRead != 0) && (addressstatus == NAND_VALID_ADDRESS)) - { - /* update the buffer size */ - size = hnand->Info.PageSize + ((hnand->Info.PageSize) * numpagesread); - - /* Get the address offset */ - addressoffset = ARRAY_ADDRESS(&nandaddress, hnand); - - /* Send read page command sequence */ - *(__IO uint8_t *)((uint32_t)(deviceaddress | CMD_AREA)) = NAND_CMD_AREA_A; - - *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = 0x00; - *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_1ST_CYCLE(addressoffset); - *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_2ND_CYCLE(addressoffset); - *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_3RD_CYCLE(addressoffset); - - /* for 512 and 1 GB devices, 4th cycle is required */ - if(hnand->Info.BlockNbr >= 1024) - { - *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_4TH_CYCLE(addressoffset); - } - - *(__IO uint8_t *)((uint32_t)(deviceaddress | CMD_AREA)) = NAND_CMD_AREA_TRUE1; - - /* Get Data into Buffer */ - for(; index < size; index++) - { - *(uint8_t *)pBuffer++ = *(uint8_t *)deviceaddress; - } - - /* Increment read pages number */ - numpagesread++; - - /* Decrement pages to read */ - NumPageToRead--; - - /* Increment the NAND address */ - addressstatus = NAND_AddressIncrement(hnand, &nandaddress); - } - - /* Update the NAND controller state */ - hnand->State = HAL_NAND_STATE_READY; - - /* Process unlocked */ - __HAL_UNLOCK(hnand); - - return HAL_OK; - -} - -/** - * @brief Write Page(s) to NAND memory block. - * @param hnand: pointer to a NAND_HandleTypeDef structure that contains - * the configuration information for NAND module. - * @param pAddress: pointer to NAND address structure - * @param pBuffer: pointer to source buffer to write - * @param NumPageToWrite: number of pages to write to block - * @retval HAL status - */ -HAL_StatusTypeDef HAL_NAND_Write_Page(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumPageToWrite) -{ - __IO uint32_t index = 0; - uint32_t tickstart = 0; - uint32_t deviceaddress = 0 , size = 0, numpageswritten = 0, addressstatus = NAND_VALID_ADDRESS; - NAND_AddressTypeDef nandaddress; - uint32_t addressoffset = 0; - - /* Process Locked */ - __HAL_LOCK(hnand); - - /* Check the NAND controller state */ - if(hnand->State == HAL_NAND_STATE_BUSY) - { - return HAL_BUSY; - } - - /* Identify the device address */ - deviceaddress = NAND_DEVICE; - - /* Update the NAND controller state */ - hnand->State = HAL_NAND_STATE_BUSY; - - /* Save the content of pAddress as it will be modified */ - nandaddress.Block = pAddress->Block; - nandaddress.Page = pAddress->Page; - nandaddress.Zone = pAddress->Zone; - - /* Page(s) write loop */ - while((NumPageToWrite != 0) && (addressstatus == NAND_VALID_ADDRESS)) - { - /* update the buffer size */ - size = hnand->Info.PageSize + ((hnand->Info.PageSize) * numpageswritten); - - /* Get the address offset */ - addressoffset = ARRAY_ADDRESS(&nandaddress, hnand); - - /* Send write page command sequence */ - *(__IO uint8_t *)((uint32_t)(deviceaddress | CMD_AREA)) = NAND_CMD_AREA_A; - *(__IO uint8_t *)((uint32_t)(deviceaddress | CMD_AREA)) = NAND_CMD_WRITE0; - - *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = 0x00; - *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_1ST_CYCLE(addressoffset); - *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_2ND_CYCLE(addressoffset); - *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_3RD_CYCLE(addressoffset); - - /* for 512 and 1 GB devices, 4th cycle is required */ - if(hnand->Info.BlockNbr >= 1024) - { - *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_4TH_CYCLE(addressoffset); - } - - /* Write data to memory */ - for(; index < size; index++) - { - *(__IO uint8_t *)deviceaddress = *(uint8_t *)pBuffer++; - } - - *(__IO uint8_t *)((uint32_t)(deviceaddress | CMD_AREA)) = NAND_CMD_WRITE_TRUE1; - - /* Get tick */ - tickstart = HAL_GetTick(); - - /* Read status until NAND is ready */ - while(HAL_NAND_Read_Status(hnand) != NAND_READY) - { - if((HAL_GetTick() - tickstart ) > NAND_WRITE_TIMEOUT) - { - return HAL_TIMEOUT; - } - } - - /* Increment written pages number */ - numpageswritten++; - - /* Decrement pages to write */ - NumPageToWrite--; - - /* Increment the NAND address */ - addressstatus = NAND_AddressIncrement(hnand, &nandaddress); - } - - /* Update the NAND controller state */ - hnand->State = HAL_NAND_STATE_READY; - - /* Process unlocked */ - __HAL_UNLOCK(hnand); - - return HAL_OK; -} - -/** - * @brief Read Spare area(s) from NAND memory. - * @param hnand: pointer to a NAND_HandleTypeDef structure that contains - * the configuration information for NAND module. - * @param pAddress: pointer to NAND address structure - * @param pBuffer: pointer to source buffer to write - * @param NumSpareAreaToRead: Number of spare area to read - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_NAND_Read_SpareArea(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumSpareAreaToRead) -{ - __IO uint32_t index = 0; - uint32_t deviceaddress = 0, size = 0, num_spare_area_read = 0, addressstatus = NAND_VALID_ADDRESS; - NAND_AddressTypeDef nandaddress; - uint32_t addressoffset = 0; - - /* Process Locked */ - __HAL_LOCK(hnand); - - /* Check the NAND controller state */ - if(hnand->State == HAL_NAND_STATE_BUSY) - { - return HAL_BUSY; - } - - /* Identify the device address */ - deviceaddress = NAND_DEVICE; - - /* Update the NAND controller state */ - hnand->State = HAL_NAND_STATE_BUSY; - - /* Save the content of pAddress as it will be modified */ - nandaddress.Block = pAddress->Block; - nandaddress.Page = pAddress->Page; - nandaddress.Zone = pAddress->Zone; - - /* Spare area(s) read loop */ - while((NumSpareAreaToRead != 0) && (addressstatus == NAND_VALID_ADDRESS)) - { - /* update the buffer size */ - size = (hnand->Info.SpareAreaSize) + ((hnand->Info.SpareAreaSize) * num_spare_area_read); - - /* Get the address offset */ - addressoffset = ARRAY_ADDRESS(&nandaddress, hnand); - - /* Send read spare area command sequence */ - *(__IO uint8_t *)((uint32_t)(deviceaddress | CMD_AREA)) = NAND_CMD_AREA_C; - - *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = 0x00; - *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_1ST_CYCLE(addressoffset); - *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_2ND_CYCLE(addressoffset); - *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_3RD_CYCLE(addressoffset); - - /* for 512 and 1 GB devices, 4th cycle is required */ - if(hnand->Info.BlockNbr >= 1024) - { - *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_4TH_CYCLE(addressoffset); - } - - *(__IO uint8_t *)((uint32_t)(deviceaddress | CMD_AREA)) = NAND_CMD_AREA_TRUE1; - - /* Get Data into Buffer */ - for ( ;index < size; index++) - { - *(uint8_t *)pBuffer++ = *(uint8_t *)deviceaddress; - } - - /* Increment read spare areas number */ - num_spare_area_read++; - - /* Decrement spare areas to read */ - NumSpareAreaToRead--; - - /* Increment the NAND address */ - addressstatus = NAND_AddressIncrement(hnand, &nandaddress); - } - - /* Update the NAND controller state */ - hnand->State = HAL_NAND_STATE_READY; - - /* Process unlocked */ - __HAL_UNLOCK(hnand); - - return HAL_OK; -} - -/** - * @brief Write Spare area(s) to NAND memory. - * @param hnand: pointer to a NAND_HandleTypeDef structure that contains - * the configuration information for NAND module. - * @param pAddress: pointer to NAND address structure - * @param pBuffer: pointer to source buffer to write - * @param NumSpareAreaTowrite: number of spare areas to write to block - * @retval HAL status - */ -HAL_StatusTypeDef HAL_NAND_Write_SpareArea(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumSpareAreaTowrite) -{ - __IO uint32_t index = 0; - uint32_t tickstart = 0; - uint32_t deviceaddress = 0, size = 0, num_spare_area_written = 0, addressstatus = NAND_VALID_ADDRESS; - NAND_AddressTypeDef nandaddress; - uint32_t addressoffset = 0; - - /* Process Locked */ - __HAL_LOCK(hnand); - - /* Check the NAND controller state */ - if(hnand->State == HAL_NAND_STATE_BUSY) - { - return HAL_BUSY; - } - - /* Identify the device address */ - deviceaddress = NAND_DEVICE; - - /* Update the FMC_NAND controller state */ - hnand->State = HAL_NAND_STATE_BUSY; - - /* Save the content of pAddress as it will be modified */ - nandaddress.Block = pAddress->Block; - nandaddress.Page = pAddress->Page; - nandaddress.Zone = pAddress->Zone; - - /* Spare area(s) write loop */ - while((NumSpareAreaTowrite != 0) && (addressstatus == NAND_VALID_ADDRESS)) - { - /* update the buffer size */ - size = (hnand->Info.SpareAreaSize) + ((hnand->Info.SpareAreaSize) * num_spare_area_written); - - /* Get the address offset */ - addressoffset = ARRAY_ADDRESS(&nandaddress, hnand); - - /* Send write Spare area command sequence */ - *(__IO uint8_t *)((uint32_t)(deviceaddress | CMD_AREA)) = NAND_CMD_AREA_C; - *(__IO uint8_t *)((uint32_t)(deviceaddress | CMD_AREA)) = NAND_CMD_WRITE0; - - *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = 0x00; - *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_1ST_CYCLE(addressoffset); - *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_2ND_CYCLE(addressoffset); - *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_3RD_CYCLE(addressoffset); - - /* for 512 and 1 GB devices, 4th cycle is required */ - if(hnand->Info.BlockNbr >= 1024) - { - *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_4TH_CYCLE(addressoffset); - } - - /* Write data to memory */ - for(; index < size; index++) - { - *(__IO uint8_t *)deviceaddress = *(uint8_t *)pBuffer++; - } - - *(__IO uint8_t *)((uint32_t)(deviceaddress | CMD_AREA)) = NAND_CMD_WRITE_TRUE1; - - /* Get tick */ - tickstart = HAL_GetTick(); - - /* Read status until NAND is ready */ - while(HAL_NAND_Read_Status(hnand) != NAND_READY) - { - if((HAL_GetTick() - tickstart ) > NAND_WRITE_TIMEOUT) - { - return HAL_TIMEOUT; - } - } - - /* Increment written spare areas number */ - num_spare_area_written++; - - /* Decrement spare areas to write */ - NumSpareAreaTowrite--; - - /* Increment the NAND address */ - addressstatus = NAND_AddressIncrement(hnand, &nandaddress); - } - - /* Update the NAND controller state */ - hnand->State = HAL_NAND_STATE_READY; - - /* Process unlocked */ - __HAL_UNLOCK(hnand); - - return HAL_OK; -} - -/** - * @brief NAND memory Block erase. - * @param hnand: pointer to a NAND_HandleTypeDef structure that contains - * the configuration information for NAND module. - * @param pAddress: pointer to NAND address structure - * @retval HAL status - */ -HAL_StatusTypeDef HAL_NAND_Erase_Block(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress) -{ - uint32_t deviceaddress = 0; - uint32_t tickstart = 0; - - /* Process Locked */ - __HAL_LOCK(hnand); - - /* Check the NAND controller state */ - if(hnand->State == HAL_NAND_STATE_BUSY) - { - return HAL_BUSY; - } - - /* Identify the device address */ - deviceaddress = NAND_DEVICE; - - /* Update the NAND controller state */ - hnand->State = HAL_NAND_STATE_BUSY; - - /* Send Erase block command sequence */ - *(__IO uint8_t *)((uint32_t)(deviceaddress | CMD_AREA)) = NAND_CMD_ERASE0; - - *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_1ST_CYCLE(ARRAY_ADDRESS(pAddress, hnand)); - *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_2ND_CYCLE(ARRAY_ADDRESS(pAddress, hnand)); - *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_3RD_CYCLE(ARRAY_ADDRESS(pAddress, hnand)); - - /* for 512 and 1 GB devices, 4th cycle is required */ - if(hnand->Info.BlockNbr >= 1024) - { - *(__IO uint8_t *)((uint32_t)(deviceaddress | ADDR_AREA)) = ADDR_4TH_CYCLE(ARRAY_ADDRESS(pAddress, hnand)); - } - - *(__IO uint8_t *)((uint32_t)(deviceaddress | CMD_AREA)) = NAND_CMD_ERASE1; - - /* Update the NAND controller state */ - hnand->State = HAL_NAND_STATE_READY; - - /* Get tick */ - tickstart = HAL_GetTick(); - - /* Read status until NAND is ready */ - while(HAL_NAND_Read_Status(hnand) != NAND_READY) - { - if((HAL_GetTick() - tickstart ) > NAND_WRITE_TIMEOUT) - { - /* Process unlocked */ - __HAL_UNLOCK(hnand); - - return HAL_TIMEOUT; - } - } - - /* Process unlocked */ - __HAL_UNLOCK(hnand); - - return HAL_OK; -} - -/** - * @brief NAND memory read status. - * @param hnand: pointer to a NAND_HandleTypeDef structure that contains - * the configuration information for NAND module. - * @retval NAND status - */ -uint32_t HAL_NAND_Read_Status(NAND_HandleTypeDef *hnand) -{ - uint32_t data = 0; - uint32_t deviceaddress = 0; - - /* Identify the device address */ - deviceaddress = NAND_DEVICE; - - /* Send Read status operation command */ - *(__IO uint8_t *)((uint32_t)(deviceaddress | CMD_AREA)) = NAND_CMD_STATUS; - - /* Read status register data */ - data = *(__IO uint8_t *)deviceaddress; - - /* Return the status */ - if((data & NAND_ERROR) == NAND_ERROR) - { - return NAND_ERROR; - } - else if((data & NAND_READY) == NAND_READY) - { - return NAND_READY; - } - - return NAND_BUSY; -} - -/** - * @brief Increment the NAND memory address. - * @param hnand: pointer to a NAND_HandleTypeDef structure that contains - * the configuration information for NAND module. - * @param pAddress: pointer to NAND address structure - * @retval The new status of the increment address operation. It can be: - * - NAND_VALID_ADDRESS: When the new address is valid address - * - NAND_INVALID_ADDRESS: When the new address is invalid address - */ -uint32_t HAL_NAND_Address_Inc(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress) -{ - uint32_t status = NAND_VALID_ADDRESS; - - /* Increment page address */ - pAddress->Page++; - - /* Check NAND address is valid */ - if(pAddress->Page == hnand->Info.BlockSize) - { - pAddress->Page = 0; - pAddress->Block++; - - if(pAddress->Block == hnand->Info.ZoneSize) - { - pAddress->Block = 0; - pAddress->Zone++; - - if(pAddress->Zone == (hnand->Info.ZoneSize/ hnand->Info.BlockNbr)) - { - status = NAND_INVALID_ADDRESS; - } - } - } - - return (status); -} -/** - * @} - */ - -/** @defgroup NAND_Exported_Functions_Group3 Peripheral Control functions - * @brief management functions - * -@verbatim - ============================================================================== - ##### NAND Control functions ##### - ============================================================================== - [..] - This subsection provides a set of functions allowing to control dynamically - the NAND interface. - -@endverbatim - * @{ - */ - - -/** - * @brief Enable dynamically NAND ECC feature. - * @param hnand: pointer to a NAND_HandleTypeDef structure that contains - * the configuration information for NAND module. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_NAND_ECC_Enable(NAND_HandleTypeDef *hnand) -{ - /* Check the NAND controller state */ - if(hnand->State == HAL_NAND_STATE_BUSY) - { - return HAL_BUSY; - } - - /* Update the NAND state */ - hnand->State = HAL_NAND_STATE_BUSY; - - /* Enable ECC feature */ - FMC_NAND_ECC_Enable(hnand->Instance, hnand->Init.NandBank); - - /* Update the NAND state */ - hnand->State = HAL_NAND_STATE_READY; - - return HAL_OK; -} - -/** - * @brief Disable dynamically NAND ECC feature. - * @param hnand: pointer to a NAND_HandleTypeDef structure that contains - * the configuration information for NAND module. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_NAND_ECC_Disable(NAND_HandleTypeDef *hnand) -{ - /* Check the NAND controller state */ - if(hnand->State == HAL_NAND_STATE_BUSY) - { - return HAL_BUSY; - } - - /* Update the NAND state */ - hnand->State = HAL_NAND_STATE_BUSY; - - /* Disable ECC feature */ - FMC_NAND_ECC_Disable(hnand->Instance, hnand->Init.NandBank); - - /* Update the NAND state */ - hnand->State = HAL_NAND_STATE_READY; - - return HAL_OK; -} - -/** - * @brief Disable dynamically NAND ECC feature. - * @param hnand: pointer to a NAND_HandleTypeDef structure that contains - * the configuration information for NAND module. - * @param ECCval: pointer to ECC value - * @param Timeout: maximum timeout to wait - * @retval HAL status - */ -HAL_StatusTypeDef HAL_NAND_GetECC(NAND_HandleTypeDef *hnand, uint32_t *ECCval, uint32_t Timeout) -{ - HAL_StatusTypeDef status = HAL_OK; - - /* Check the NAND controller state */ - if(hnand->State == HAL_NAND_STATE_BUSY) - { - return HAL_BUSY; - } - - /* Update the NAND state */ - hnand->State = HAL_NAND_STATE_BUSY; - - /* Get NAND ECC value */ - status = FMC_NAND_GetECC(hnand->Instance, ECCval, hnand->Init.NandBank, Timeout); - - /* Update the NAND state */ - hnand->State = HAL_NAND_STATE_READY; - - return status; -} - -/** - * @} - */ - - -/** @defgroup NAND_Exported_Functions_Group4 Peripheral State functions - * @brief Peripheral State functions - * -@verbatim - ============================================================================== - ##### NAND State functions ##### - ============================================================================== - [..] - This subsection permits to get in run-time the status of the NAND controller - and the data flow. - -@endverbatim - * @{ - */ - -/** - * @brief Return the NAND handle state. - * @param hnand: pointer to a NAND_HandleTypeDef structure that contains - * the configuration information for NAND module. - * @retval HAL state - */ -HAL_NAND_StateTypeDef HAL_NAND_GetState(NAND_HandleTypeDef *hnand) -{ - /* Return NAND handle state */ - return hnand->State; -} - -/** - * @} - */ - -/** - * @} - */ - -/** @addtogroup NAND_Private_Functions - * @{ - */ - -/** - * @brief Increment the NAND memory address. - * @param hnand: pointer to a NAND_HandleTypeDef structure that contains - * the configuration information for NAND module. - * @param Address: address to be incremented. - * @retval The new status of the increment address operation. It can be: - * - NAND_VALID_ADDRESS: When the new address is valid address - * - NAND_INVALID_ADDRESS: When the new address is invalid address - */ -static uint32_t NAND_AddressIncrement(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef* Address) -{ - uint32_t status = NAND_VALID_ADDRESS; - - Address->Page++; - - if(Address->Page == hnand->Info.BlockSize) - { - Address->Page = 0; - Address->Block++; - - if(Address->Block == hnand->Info.ZoneSize) - { - Address->Block = 0; - Address->Zone++; - - if(Address->Zone == hnand->Info.BlockNbr) - { - status = NAND_INVALID_ADDRESS; - } - } - } - - return (status); -} - -/** - * @} - */ - -/** - * @} - */ - -#endif /* HAL_NAND_MODULE_ENABLED */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ -
--- a/Src/stm32l4xx_hal_nor.c Thu Nov 12 20:49:49 2015 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,1049 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_nor.c - * @author MCD Application Team - * @version V1.1.0 - * @date 16-September-2015 - * @brief NOR HAL module driver. - * This file provides a generic firmware to drive NOR memories mounted - * as external device. - * - @verbatim - ============================================================================== - ##### How to use this driver ##### - ============================================================================== - [..] - This driver is a generic layered driver which contains a set of APIs used to - control NOR flash memories. It uses the FMC layer functions to interface - with NOR devices. This driver is used as follows: - - (+) NOR flash memory configuration sequence using the function HAL_NOR_Init() - with control and timing parameters for both normal and extended mode. - - (+) Read NOR flash memory manufacturer code and device IDs using the function - HAL_NOR_Read_ID(). The read information is stored in the NOR_ID_TypeDef - structure declared by the function caller. - - (+) Access NOR flash memory by read/write data unit operations using the functions - HAL_NOR_Read(), HAL_NOR_Program(). - - (+) Perform NOR flash erase block/chip operations using the functions - HAL_NOR_Erase_Block() and HAL_NOR_Erase_Chip(). - - (+) Read the NOR flash CFI (common flash interface) IDs using the function - HAL_NOR_Read_CFI(). The read information is stored in the NOR_CFI_TypeDef - structure declared by the function caller. - - (+) You can also control the NOR device by calling the control APIs HAL_NOR_WriteOperation_Enable()/ - HAL_NOR_WriteOperation_Disable() to respectively enable/disable the NOR write operation - - (+) You can monitor the NOR device HAL state by calling the function - HAL_NOR_GetState() - [..] - (@) This driver is a set of generic APIs which handle standard NOR flash operations. - If a NOR flash device contains different operations and/or implementations, - it should be implemented separately. - - *** NOR HAL driver macros list *** - ============================================= - [..] - Below the list of most used macros in NOR HAL driver. - - (+) NOR_WRITE : NOR memory write data to specified address - - @endverbatim - ****************************************************************************** - * @attention - * - * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -#ifdef HAL_NOR_MODULE_ENABLED - -/** @defgroup NOR NOR - * @brief NOR HAL module driver - * @{ - */ -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -/** @defgroup NOR_Private_Constants NOR Private Constants - * @{ - */ - -/* Constants to define address to set to write a command */ -#define NOR_CMD_ADDRESS_FIRST (uint16_t)0x0555 -#define NOR_CMD_ADDRESS_FIRST_CFI (uint16_t)0x0055 -#define NOR_CMD_ADDRESS_SECOND (uint16_t)0x02AA -#define NOR_CMD_ADDRESS_THIRD (uint16_t)0x0555 -#define NOR_CMD_ADDRESS_FOURTH (uint16_t)0x0555 -#define NOR_CMD_ADDRESS_FIFTH (uint16_t)0x02AA -#define NOR_CMD_ADDRESS_SIXTH (uint16_t)0x0555 - -/* Constants to define data to program a command */ -#define NOR_CMD_DATA_READ_RESET (uint16_t)0x00F0 -#define NOR_CMD_DATA_FIRST (uint16_t)0x00AA -#define NOR_CMD_DATA_SECOND (uint16_t)0x0055 -#define NOR_CMD_DATA_AUTO_SELECT (uint16_t)0x0090 -#define NOR_CMD_DATA_PROGRAM (uint16_t)0x00A0 -#define NOR_CMD_DATA_CHIP_BLOCK_ERASE_THIRD (uint16_t)0x0080 -#define NOR_CMD_DATA_CHIP_BLOCK_ERASE_FOURTH (uint16_t)0x00AA -#define NOR_CMD_DATA_CHIP_BLOCK_ERASE_FIFTH (uint16_t)0x0055 -#define NOR_CMD_DATA_CHIP_ERASE (uint16_t)0x0010 -#define NOR_CMD_DATA_CFI (uint16_t)0x0098 - -#define NOR_CMD_DATA_BUFFER_AND_PROG (uint8_t)0x25 -#define NOR_CMD_DATA_BUFFER_AND_PROG_CONFIRM (uint8_t)0x29 -#define NOR_CMD_DATA_BLOCK_ERASE (uint8_t)0x30 - -/* Mask on NOR STATUS REGISTER */ -#define NOR_MASK_STATUS_DQ5 (uint16_t)0x0020 -#define NOR_MASK_STATUS_DQ6 (uint16_t)0x0040 - -/** - * @} - */ - -/* Private macro -------------------------------------------------------------*/ -/** @defgroup NOR_Private_Macros NOR Private Macros - * @{ - */ - -/** - * @} - */ - -/* Private variables ---------------------------------------------------------*/ - -/** @defgroup NOR_Private_Variables NOR Private Variables - * @{ - */ - -static uint32_t uwNORMemoryDataWidth = NOR_MEMORY_8B; - -/** - * @} - */ - -/* Exported functions ---------------------------------------------------------*/ - -/** @defgroup NOR_Exported_Functions NOR Exported Functions - * @{ - */ - -/** @defgroup NOR_Exported_Functions_Group1 Initialization and de-initialization functions - * @brief Initialization and Configuration functions - * - @verbatim - ============================================================================== - ##### NOR Initialization and de-initialization functions ##### - ============================================================================== - [..] - This section provides functions allowing to initialize/de-initialize - the NOR memory - -@endverbatim - * @{ - */ - -/** - * @brief Perform the NOR memory Initialization sequence. - * @param hnor: pointer to a NOR_HandleTypeDef structure that contains - * the configuration information for NOR module. - * @param Timing: pointer to NOR control timing structure - * @param ExtTiming: pointer to NOR extended mode timing structure - * @retval HAL status - */ -HAL_StatusTypeDef HAL_NOR_Init(NOR_HandleTypeDef *hnor, FMC_NORSRAM_TimingTypeDef *Timing, FMC_NORSRAM_TimingTypeDef *ExtTiming) -{ - /* Check the NOR handle parameter */ - if(hnor == NULL) - { - return HAL_ERROR; - } - - if(hnor->State == HAL_NOR_STATE_RESET) - { - /* Allocate lock resource and initialize it */ - hnor->Lock = HAL_UNLOCKED; - - /* Initialize the low level hardware (MSP) */ - HAL_NOR_MspInit(hnor); - } - - /* Initialize NOR control Interface */ - FMC_NORSRAM_Init(hnor->Instance, &(hnor->Init)); - - /* Initialize NOR timing Interface */ - FMC_NORSRAM_Timing_Init(hnor->Instance, Timing, hnor->Init.NSBank); - - /* Initialize NOR extended mode timing Interface */ - FMC_NORSRAM_Extended_Timing_Init(hnor->Extended, ExtTiming, hnor->Init.NSBank, hnor->Init.ExtendedMode); - - /* Enable the NORSRAM device */ - __FMC_NORSRAM_ENABLE(hnor->Instance, hnor->Init.NSBank); - - /* Initialize NOR Memory Data Width*/ - if (hnor->Init.MemoryDataWidth == FMC_NORSRAM_MEM_BUS_WIDTH_8) - { - uwNORMemoryDataWidth = NOR_MEMORY_8B; - } - else - { - uwNORMemoryDataWidth = NOR_MEMORY_16B; - } - - /* Check the NOR controller state */ - hnor->State = HAL_NOR_STATE_READY; - - return HAL_OK; -} - -/** - * @brief Perform NOR memory De-Initialization sequence. - * @param hnor: pointer to a NOR_HandleTypeDef structure that contains - * the configuration information for NOR module. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_NOR_DeInit(NOR_HandleTypeDef *hnor) -{ - /* De-Initialize the low level hardware (MSP) */ - HAL_NOR_MspDeInit(hnor); - - /* Configure the NOR registers with their reset values */ - FMC_NORSRAM_DeInit(hnor->Instance, hnor->Extended, hnor->Init.NSBank); - - /* Update the NOR controller state */ - hnor->State = HAL_NOR_STATE_RESET; - - /* Release Lock */ - __HAL_UNLOCK(hnor); - - return HAL_OK; -} - -/** - * @brief Initialize the NOR MSP. - * @param hnor: pointer to a NOR_HandleTypeDef structure that contains - * the configuration information for NOR module. - * @retval None - */ -__weak void HAL_NOR_MspInit(NOR_HandleTypeDef *hnor) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_NOR_MspInit could be implemented in the user file - */ -} - -/** - * @brief DeInitialize the NOR MSP. - * @param hnor: pointer to a NOR_HandleTypeDef structure that contains - * the configuration information for NOR module. - * @retval None - */ -__weak void HAL_NOR_MspDeInit(NOR_HandleTypeDef *hnor) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_NOR_MspDeInit could be implemented in the user file - */ -} - -/** - * @brief NOR MSP Wait for Ready/Busy signal. - * @param hnor: pointer to a NOR_HandleTypeDef structure that contains - * the configuration information for NOR module. - * @param Timeout: Maximum timeout value - * @retval None - */ -__weak void HAL_NOR_MspWait(NOR_HandleTypeDef *hnor, uint32_t Timeout) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_NOR_MspWait could be implemented in the user file - */ -} - -/** - * @} - */ - -/** @defgroup NOR_Exported_Functions_Group2 Input and Output functions - * @brief Input Output and memory control functions - * - @verbatim - ============================================================================== - ##### NOR Input and Output functions ##### - ============================================================================== - [..] - This section provides functions allowing to use and control the NOR memory - -@endverbatim - * @{ - */ - -/** - * @brief Read NOR flash IDs. - * @param hnor: pointer to a NOR_HandleTypeDef structure that contains - * the configuration information for NOR module. - * @param pNOR_ID : pointer to NOR ID structure - * @retval HAL status - */ -HAL_StatusTypeDef HAL_NOR_Read_ID(NOR_HandleTypeDef *hnor, NOR_IDTypeDef *pNOR_ID) -{ - uint32_t deviceaddress = 0; - - /* Process Locked */ - __HAL_LOCK(hnor); - - /* Check the NOR controller state */ - if(hnor->State == HAL_NOR_STATE_BUSY) - { - return HAL_BUSY; - } - - /* Select the NOR device address */ - if (hnor->Init.NSBank == FMC_NORSRAM_BANK1) - { - deviceaddress = NOR_MEMORY_ADRESS1; - } - else if (hnor->Init.NSBank == FMC_NORSRAM_BANK2) - { - deviceaddress = NOR_MEMORY_ADRESS2; - } - else if (hnor->Init.NSBank == FMC_NORSRAM_BANK3) - { - deviceaddress = NOR_MEMORY_ADRESS3; - } - else /* FMC_NORSRAM_BANK4 */ - { - deviceaddress = NOR_MEMORY_ADRESS4; - } - - /* Update the NOR controller state */ - hnor->State = HAL_NOR_STATE_BUSY; - - /* Send read ID command */ - NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST), NOR_CMD_DATA_FIRST); - NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_SECOND), NOR_CMD_DATA_SECOND); - NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_THIRD), NOR_CMD_DATA_AUTO_SELECT); - - /* Read the NOR IDs */ - pNOR_ID->Manufacturer_Code = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, MC_ADDRESS); - pNOR_ID->Device_Code1 = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, DEVICE_CODE1_ADDR); - pNOR_ID->Device_Code2 = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, DEVICE_CODE2_ADDR); - pNOR_ID->Device_Code3 = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, DEVICE_CODE3_ADDR); - - /* Check the NOR controller state */ - hnor->State = HAL_NOR_STATE_READY; - - /* Process unlocked */ - __HAL_UNLOCK(hnor); - - return HAL_OK; -} - -/** - * @brief Return the NOR memory to Read mode. - * @param hnor: pointer to a NOR_HandleTypeDef structure that contains - * the configuration information for NOR module. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_NOR_ReturnToReadMode(NOR_HandleTypeDef *hnor) -{ - uint32_t deviceaddress = 0; - - /* Process Locked */ - __HAL_LOCK(hnor); - - /* Check the NOR controller state */ - if(hnor->State == HAL_NOR_STATE_BUSY) - { - return HAL_BUSY; - } - - /* Select the NOR device address */ - if (hnor->Init.NSBank == FMC_NORSRAM_BANK1) - { - deviceaddress = NOR_MEMORY_ADRESS1; - } - else if (hnor->Init.NSBank == FMC_NORSRAM_BANK2) - { - deviceaddress = NOR_MEMORY_ADRESS2; - } - else if (hnor->Init.NSBank == FMC_NORSRAM_BANK3) - { - deviceaddress = NOR_MEMORY_ADRESS3; - } - else /* FMC_NORSRAM_BANK4 */ - { - deviceaddress = NOR_MEMORY_ADRESS4; - } - - NOR_WRITE(deviceaddress, NOR_CMD_DATA_READ_RESET); - - /* Check the NOR controller state */ - hnor->State = HAL_NOR_STATE_READY; - - /* Process unlocked */ - __HAL_UNLOCK(hnor); - - return HAL_OK; -} - -/** - * @brief Read data from NOR memory. - * @param hnor: pointer to a NOR_HandleTypeDef structure that contains - * the configuration information for NOR module. - * @param pAddress: pointer to Device address - * @param pData : pointer to read data - * @retval HAL status - */ -HAL_StatusTypeDef HAL_NOR_Read(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData) -{ - uint32_t deviceaddress = 0; - - /* Process Locked */ - __HAL_LOCK(hnor); - - /* Check the NOR controller state */ - if(hnor->State == HAL_NOR_STATE_BUSY) - { - return HAL_BUSY; - } - - /* Select the NOR device address */ - if (hnor->Init.NSBank == FMC_NORSRAM_BANK1) - { - deviceaddress = NOR_MEMORY_ADRESS1; - } - else if (hnor->Init.NSBank == FMC_NORSRAM_BANK2) - { - deviceaddress = NOR_MEMORY_ADRESS2; - } - else if (hnor->Init.NSBank == FMC_NORSRAM_BANK3) - { - deviceaddress = NOR_MEMORY_ADRESS3; - } - else /* FMC_NORSRAM_BANK4 */ - { - deviceaddress = NOR_MEMORY_ADRESS4; - } - - /* Update the NOR controller state */ - hnor->State = HAL_NOR_STATE_BUSY; - - /* Send read data command */ - NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST), NOR_CMD_DATA_FIRST); - NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_SECOND), NOR_CMD_DATA_SECOND); - NOR_WRITE((uint32_t)pAddress, NOR_CMD_DATA_READ_RESET); - - /* Read the data */ - *pData = *(__IO uint32_t *)(uint32_t)pAddress; - - /* Check the NOR controller state */ - hnor->State = HAL_NOR_STATE_READY; - - /* Process unlocked */ - __HAL_UNLOCK(hnor); - - return HAL_OK; -} - -/** - * @brief Program data to NOR memory. - * @param hnor: pointer to a NOR_HandleTypeDef structure that contains - * the configuration information for NOR module. - * @param pAddress: Device address - * @param pData : pointer to the data to write - * @retval HAL status - */ -HAL_StatusTypeDef HAL_NOR_Program(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData) -{ - uint32_t deviceaddress = 0; - - /* Process Locked */ - __HAL_LOCK(hnor); - - /* Check the NOR controller state */ - if(hnor->State == HAL_NOR_STATE_BUSY) - { - return HAL_BUSY; - } - - /* Select the NOR device address */ - if (hnor->Init.NSBank == FMC_NORSRAM_BANK1) - { - deviceaddress = NOR_MEMORY_ADRESS1; - } - else if (hnor->Init.NSBank == FMC_NORSRAM_BANK2) - { - deviceaddress = NOR_MEMORY_ADRESS2; - } - else if (hnor->Init.NSBank == FMC_NORSRAM_BANK3) - { - deviceaddress = NOR_MEMORY_ADRESS3; - } - else /* FMC_NORSRAM_BANK4 */ - { - deviceaddress = NOR_MEMORY_ADRESS4; - } - - /* Update the NOR controller state */ - hnor->State = HAL_NOR_STATE_BUSY; - - /* Send program data command */ - NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST), NOR_CMD_DATA_FIRST); - NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_SECOND), NOR_CMD_DATA_SECOND); - NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_THIRD), NOR_CMD_DATA_PROGRAM); - - /* Write the data */ - NOR_WRITE(pAddress, *pData); - - /* Check the NOR controller state */ - hnor->State = HAL_NOR_STATE_READY; - - /* Process unlocked */ - __HAL_UNLOCK(hnor); - - return HAL_OK; -} - -/** - * @brief Read a block of data from the FMC NOR memory. - * @param hnor: pointer to a NOR_HandleTypeDef structure that contains - * the configuration information for NOR module. - * @param uwAddress: NOR memory internal address to read from. - * @param pData: pointer to the buffer that receives the data read from the - * NOR memory. - * @param uwBufferSize : number of Half word to read. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_NOR_ReadBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData, uint32_t uwBufferSize) -{ - uint32_t deviceaddress = 0; - - /* Process Locked */ - __HAL_LOCK(hnor); - - /* Check the NOR controller state */ - if(hnor->State == HAL_NOR_STATE_BUSY) - { - return HAL_BUSY; - } - - /* Select the NOR device address */ - if (hnor->Init.NSBank == FMC_NORSRAM_BANK1) - { - deviceaddress = NOR_MEMORY_ADRESS1; - } - else if (hnor->Init.NSBank == FMC_NORSRAM_BANK2) - { - deviceaddress = NOR_MEMORY_ADRESS2; - } - else if (hnor->Init.NSBank == FMC_NORSRAM_BANK3) - { - deviceaddress = NOR_MEMORY_ADRESS3; - } - else /* FMC_NORSRAM_BANK4 */ - { - deviceaddress = NOR_MEMORY_ADRESS4; - } - - /* Update the NOR controller state */ - hnor->State = HAL_NOR_STATE_BUSY; - - /* Send read data command */ - NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST), NOR_CMD_DATA_FIRST); - NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_SECOND), NOR_CMD_DATA_SECOND); - NOR_WRITE(uwAddress, NOR_CMD_DATA_READ_RESET); - - /* Read buffer */ - while( uwBufferSize > 0) - { - *pData++ = *(__IO uint16_t *)uwAddress; - uwAddress += 2; - uwBufferSize--; - } - - /* Check the NOR controller state */ - hnor->State = HAL_NOR_STATE_READY; - - /* Process unlocked */ - __HAL_UNLOCK(hnor); - - return HAL_OK; -} - -/** - * @brief Write a half-word buffer to the FMC NOR memory. This function - * must be used only with S29GL128P NOR memory. - * @param hnor: pointer to a NOR_HandleTypeDef structure that contains - * the configuration information for NOR module. - * @param uwAddress: NOR memory internal address from which the data - * @note Some NOR memory need Address aligned to xx bytes (can be aligned to - * 64 bytes boundary for example). - * @param pData: pointer to source data buffer. - * @param uwBufferSize: number of Half words to write. - * @note The maximum buffer size allowed is NOR memory dependent - * (can be 64 Bytes max for example). - * @retval HAL status - */ -HAL_StatusTypeDef HAL_NOR_ProgramBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData, uint32_t uwBufferSize) -{ - uint16_t * p_currentaddress = (uint16_t *)NULL; - uint16_t * p_endaddress = (uint16_t *)NULL; - uint32_t lastloadedaddress = 0, deviceaddress = 0; - - /* Process Locked */ - __HAL_LOCK(hnor); - - /* Check the NOR controller state */ - if(hnor->State == HAL_NOR_STATE_BUSY) - { - return HAL_BUSY; - } - - /* Select the NOR device address */ - if (hnor->Init.NSBank == FMC_NORSRAM_BANK1) - { - deviceaddress = NOR_MEMORY_ADRESS1; - } - else if (hnor->Init.NSBank == FMC_NORSRAM_BANK2) - { - deviceaddress = NOR_MEMORY_ADRESS2; - } - else if (hnor->Init.NSBank == FMC_NORSRAM_BANK3) - { - deviceaddress = NOR_MEMORY_ADRESS3; - } - else /* FMC_NORSRAM_BANK4 */ - { - deviceaddress = NOR_MEMORY_ADRESS4; - } - - /* Update the NOR controller state */ - hnor->State = HAL_NOR_STATE_BUSY; - - /* Initialize variables */ - p_currentaddress = (uint16_t*)((uint32_t)(uwAddress)); - p_endaddress = p_currentaddress + (uwBufferSize-1); - lastloadedaddress = (uint32_t)(uwAddress); - - /* Issue unlock command sequence */ - NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST), NOR_CMD_DATA_FIRST); - NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_SECOND), NOR_CMD_DATA_SECOND); - - /* Write Buffer Load Command */ - NOR_WRITE((uint32_t)(p_currentaddress), NOR_CMD_DATA_BUFFER_AND_PROG); - NOR_WRITE((uint32_t)(p_currentaddress), (uwBufferSize-1)); - - /* Load Data into NOR Buffer */ - while(p_currentaddress <= p_endaddress) - { - /* Store last loaded address & data value (for polling) */ - lastloadedaddress = (uint32_t)p_currentaddress; - - NOR_WRITE(p_currentaddress, *pData++); - - p_currentaddress++; - } - - NOR_WRITE((uint32_t)(lastloadedaddress), NOR_CMD_DATA_BUFFER_AND_PROG_CONFIRM); - - /* Check the NOR controller state */ - hnor->State = HAL_NOR_STATE_READY; - - /* Process unlocked */ - __HAL_UNLOCK(hnor); - - return HAL_OK; - -} - -/** - * @brief Erase the specified block of the NOR memory. - * @param hnor: pointer to a NOR_HandleTypeDef structure that contains - * the configuration information for NOR module. - * @param BlockAddress : Block to erase address - * @param Address: Device address - * @retval HAL status - */ -HAL_StatusTypeDef HAL_NOR_Erase_Block(NOR_HandleTypeDef *hnor, uint32_t BlockAddress, uint32_t Address) -{ - uint32_t deviceaddress = 0; - - /* Process Locked */ - __HAL_LOCK(hnor); - - /* Check the NOR controller state */ - if(hnor->State == HAL_NOR_STATE_BUSY) - { - return HAL_BUSY; - } - - /* Select the NOR device address */ - if (hnor->Init.NSBank == FMC_NORSRAM_BANK1) - { - deviceaddress = NOR_MEMORY_ADRESS1; - } - else if (hnor->Init.NSBank == FMC_NORSRAM_BANK2) - { - deviceaddress = NOR_MEMORY_ADRESS2; - } - else if (hnor->Init.NSBank == FMC_NORSRAM_BANK3) - { - deviceaddress = NOR_MEMORY_ADRESS3; - } - else /* FMC_NORSRAM_BANK4 */ - { - deviceaddress = NOR_MEMORY_ADRESS4; - } - - /* Update the NOR controller state */ - hnor->State = HAL_NOR_STATE_BUSY; - - /* Send block erase command sequence */ - NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST), NOR_CMD_DATA_FIRST); - NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_SECOND), NOR_CMD_DATA_SECOND); - NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_THIRD), NOR_CMD_DATA_CHIP_BLOCK_ERASE_THIRD); - NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FOURTH), NOR_CMD_DATA_CHIP_BLOCK_ERASE_FOURTH); - NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIFTH), NOR_CMD_DATA_CHIP_BLOCK_ERASE_FIFTH); - NOR_WRITE((uint32_t)(BlockAddress + Address), NOR_CMD_DATA_BLOCK_ERASE); - - /* Check the NOR memory status and update the controller state */ - hnor->State = HAL_NOR_STATE_READY; - - /* Process unlocked */ - __HAL_UNLOCK(hnor); - - return HAL_OK; - -} - -/** - * @brief Erase the entire NOR chip. - * @param hnor: pointer to a NOR_HandleTypeDef structure that contains - * the configuration information for NOR module. - * @param Address : Device address - * @retval HAL status - */ -HAL_StatusTypeDef HAL_NOR_Erase_Chip(NOR_HandleTypeDef *hnor, uint32_t Address) -{ - uint32_t deviceaddress = 0; - - /* Process Locked */ - __HAL_LOCK(hnor); - - /* Check the NOR controller state */ - if(hnor->State == HAL_NOR_STATE_BUSY) - { - return HAL_BUSY; - } - - /* Select the NOR device address */ - if (hnor->Init.NSBank == FMC_NORSRAM_BANK1) - { - deviceaddress = NOR_MEMORY_ADRESS1; - } - else if (hnor->Init.NSBank == FMC_NORSRAM_BANK2) - { - deviceaddress = NOR_MEMORY_ADRESS2; - } - else if (hnor->Init.NSBank == FMC_NORSRAM_BANK3) - { - deviceaddress = NOR_MEMORY_ADRESS3; - } - else /* FMC_NORSRAM_BANK4 */ - { - deviceaddress = NOR_MEMORY_ADRESS4; - } - - /* Update the NOR controller state */ - hnor->State = HAL_NOR_STATE_BUSY; - - /* Send NOR chip erase command sequence */ - NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST), NOR_CMD_DATA_FIRST); - NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_SECOND), NOR_CMD_DATA_SECOND); - NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_THIRD), NOR_CMD_DATA_CHIP_BLOCK_ERASE_THIRD); - NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FOURTH), NOR_CMD_DATA_CHIP_BLOCK_ERASE_FOURTH); - NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIFTH), NOR_CMD_DATA_CHIP_BLOCK_ERASE_FIFTH); - NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_SIXTH), NOR_CMD_DATA_CHIP_ERASE); - - /* Check the NOR memory status and update the controller state */ - hnor->State = HAL_NOR_STATE_READY; - - /* Process unlocked */ - __HAL_UNLOCK(hnor); - - return HAL_OK; -} - -/** - * @brief Read NOR flash CFI IDs. - * @param hnor: pointer to a NOR_HandleTypeDef structure that contains - * the configuration information for NOR module. - * @param pNOR_CFI : pointer to NOR CFI IDs structure - * @retval HAL status - */ -HAL_StatusTypeDef HAL_NOR_Read_CFI(NOR_HandleTypeDef *hnor, NOR_CFITypeDef *pNOR_CFI) -{ - uint32_t deviceaddress = 0; - - /* Process Locked */ - __HAL_LOCK(hnor); - - /* Check the NOR controller state */ - if(hnor->State == HAL_NOR_STATE_BUSY) - { - return HAL_BUSY; - } - - /* Select the NOR device address */ - if (hnor->Init.NSBank == FMC_NORSRAM_BANK1) - { - deviceaddress = NOR_MEMORY_ADRESS1; - } - else if (hnor->Init.NSBank == FMC_NORSRAM_BANK2) - { - deviceaddress = NOR_MEMORY_ADRESS2; - } - else if (hnor->Init.NSBank == FMC_NORSRAM_BANK3) - { - deviceaddress = NOR_MEMORY_ADRESS3; - } - else /* FMC_NORSRAM_BANK4 */ - { - deviceaddress = NOR_MEMORY_ADRESS4; - } - - /* Update the NOR controller state */ - hnor->State = HAL_NOR_STATE_BUSY; - - /* Send read CFI query command */ - NOR_WRITE(NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, NOR_CMD_ADDRESS_FIRST_CFI), NOR_CMD_DATA_CFI); - - /* read the NOR CFI information */ - pNOR_CFI->CFI_1 = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, CFI1_ADDRESS); - pNOR_CFI->CFI_2 = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, CFI2_ADDRESS); - pNOR_CFI->CFI_3 = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, CFI3_ADDRESS); - pNOR_CFI->CFI_4 = *(__IO uint16_t *) NOR_ADDR_SHIFT(deviceaddress, uwNORMemoryDataWidth, CFI4_ADDRESS); - - /* Check the NOR controller state */ - hnor->State = HAL_NOR_STATE_READY; - - /* Process unlocked */ - __HAL_UNLOCK(hnor); - - return HAL_OK; -} - -/** - * @} - */ - -/** @defgroup NOR_Exported_Functions_Group3 Peripheral Control functions - * @brief management functions - * -@verbatim - ============================================================================== - ##### NOR Control functions ##### - ============================================================================== - [..] - This subsection provides a set of functions allowing to control dynamically - the NOR interface. - -@endverbatim - * @{ - */ - -/** - * @brief Enable dynamically NOR write operation. - * @param hnor: pointer to a NOR_HandleTypeDef structure that contains - * the configuration information for NOR module. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_NOR_WriteOperation_Enable(NOR_HandleTypeDef *hnor) -{ - /* Process Locked */ - __HAL_LOCK(hnor); - - /* Enable write operation */ - FMC_NORSRAM_WriteOperation_Enable(hnor->Instance, hnor->Init.NSBank); - - /* Update the NOR controller state */ - hnor->State = HAL_NOR_STATE_READY; - - /* Process unlocked */ - __HAL_UNLOCK(hnor); - - return HAL_OK; -} - -/** - * @brief Disable dynamically NOR write operation. - * @param hnor: pointer to a NOR_HandleTypeDef structure that contains - * the configuration information for NOR module. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_NOR_WriteOperation_Disable(NOR_HandleTypeDef *hnor) -{ - /* Process Locked */ - __HAL_LOCK(hnor); - - /* Update the SRAM controller state */ - hnor->State = HAL_NOR_STATE_BUSY; - - /* Disable write operation */ - FMC_NORSRAM_WriteOperation_Disable(hnor->Instance, hnor->Init.NSBank); - - /* Update the NOR controller state */ - hnor->State = HAL_NOR_STATE_PROTECTED; - - /* Process unlocked */ - __HAL_UNLOCK(hnor); - - return HAL_OK; -} - -/** - * @} - */ - -/** @defgroup NOR_Exported_Functions_Group4 Peripheral State functions - * @brief Peripheral State functions - * -@verbatim - ============================================================================== - ##### NOR State functions ##### - ============================================================================== - [..] - This subsection permits to get in run-time the status of the NOR controller - and the data flow. - -@endverbatim - * @{ - */ - -/** - * @brief Return the NOR controller handle state. - * @param hnor: pointer to a NOR_HandleTypeDef structure that contains - * the configuration information for NOR module. - * @retval NOR controller state - */ -HAL_NOR_StateTypeDef HAL_NOR_GetState(NOR_HandleTypeDef *hnor) -{ - /* Return NOR handle state */ - return hnor->State; -} - -/** - * @brief Return the NOR operation status. - * @param hnor: pointer to a NOR_HandleTypeDef structure that contains - * the configuration information for NOR module. - * @param Address: Device address - * @param Timeout: NOR programming Timeout - * @retval NOR_Status: The returned value can be: HAL_NOR_STATUS_SUCCESS, HAL_NOR_STATUS_ERROR - * or HAL_NOR_STATUS_TIMEOUT - */ -HAL_NOR_StatusTypeDef HAL_NOR_GetStatus(NOR_HandleTypeDef *hnor, uint32_t Address, uint32_t Timeout) -{ - HAL_NOR_StatusTypeDef status = HAL_NOR_STATUS_ONGOING; - uint16_t tmp_sr1 = 0, tmp_sr2 = 0; - uint32_t tickstart = 0; - - /* Poll on NOR memory Ready/Busy signal ------------------------------------*/ - HAL_NOR_MspWait(hnor, Timeout); - - /* Get tick */ - tickstart = HAL_GetTick(); - while((status != HAL_NOR_STATUS_SUCCESS) && (status != HAL_NOR_STATUS_TIMEOUT)) - { - /* Check for the Timeout */ - if(Timeout != HAL_MAX_DELAY) - { - if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout)) - { - status = HAL_NOR_STATUS_TIMEOUT; - } - } - - /* Read NOR status register (DQ6 and DQ5) */ - tmp_sr1 = *(__IO uint16_t *)Address; - tmp_sr2 = *(__IO uint16_t *)Address; - - /* If DQ6 did not toggle between the two reads then return NOR_Success */ - if((tmp_sr1 & NOR_MASK_STATUS_DQ6) == (tmp_sr2 & NOR_MASK_STATUS_DQ6)) - { - return HAL_NOR_STATUS_SUCCESS; - } - - if((tmp_sr1 & NOR_MASK_STATUS_DQ5) != NOR_MASK_STATUS_DQ5) - { - status = HAL_NOR_STATUS_ONGOING; - } - - tmp_sr1 = *(__IO uint16_t *)Address; - tmp_sr2 = *(__IO uint16_t *)Address; - - /* If DQ6 did not toggle between the two reads then return NOR_Success */ - if((tmp_sr1 & NOR_MASK_STATUS_DQ6) == (tmp_sr2 & NOR_MASK_STATUS_DQ6)) - { - return HAL_NOR_STATUS_SUCCESS; - } - else if((tmp_sr1 & NOR_MASK_STATUS_DQ5) == NOR_MASK_STATUS_DQ5) - { - return HAL_NOR_STATUS_ERROR; - } - } - - /* Return the operation status */ - return status; -} - -/** - * @} - */ - -/** - * @} - */ -/** - * @} - */ -#endif /* HAL_NOR_MODULE_ENABLED */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ -
--- a/Src/stm32l4xx_hal_opamp.c Thu Nov 12 20:49:49 2015 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,972 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_opamp.c - * @author MCD Application Team - * @version V1.1.0 - * @date 16-September-2015 - * @brief OPAMP HAL module driver. - * This file provides firmware functions to manage the following - * functionalities of the operational amplifier(s) peripheral: - * + OPAMP configuration - * + OPAMP calibration - * Thanks to - * + Initialization and de-initialization functions - * + IO operation functions - * + Peripheral Control functions - * + Peripheral State functions - * - @verbatim -================================================================================ - ##### OPAMP Peripheral Features ##### -================================================================================ - - [..] The device integrates 2 operational amplifiers OPAMP1 & OPAMP2 - - (#) The OPAMP(s) provide(s) several exclusive running modes. - (++) Standalone mode - (++) Programmable Gain Amplifier (PGA) mode (Resistor feedback output) - (++) Follower mode - - (#) All OPAMP (same for all OPAMPs) can operate in - (++) Either Low range (VDDA < 2.4V) power supply - (++) Or High range (VDDA > 2.4V) power supply - - (#) Each OPAMP(s) can be configured in normal and low power mode. - - (#) The OPAMP(s) provide(s) calibration capabilities. - (++) Calibration aims at correcting some offset for running mode. - (++) The OPAMP uses either factory calibration settings OR user defined - calibration (trimming) settings (i.e. trimming mode). - (++) The user defined settings can be figured out using self calibration - handled by HAL_OPAMP_SelfCalibrate, HAL_OPAMPEx_SelfCalibrateAll - (++) HAL_OPAMP_SelfCalibrate: - (+++) Runs automatically the calibration. - (+++) Enables the user trimming mode - (+++) Updates the init structure with trimming values with fresh calibration - results. - The user may store the calibration results for larger - (ex monitoring the trimming as a function of temperature - for instance) - (+++) HAL_OPAMPEx_SelfCalibrateAll - runs calibration of all OPAMPs in parallel to save search time. - - (#) Running mode: Standalone mode - (++) Gain is set externally (gain depends on external loads). - (++) Follower mode also possible externally by connecting the inverting input to - the output. - - (#) Running mode: Follower mode - (++) No Inverting Input is connected. - - (#) Running mode: Programmable Gain Amplifier (PGA) mode - (Resistor feedback output) - (++) The OPAMP(s) output(s) can be internally connected to resistor feedback - output. - (++) OPAMP gain is either 2, 4, 8 or 16. - - (#) The OPAMPs inverting input can be - selected among the list shown by table below. - - (#) The OPAMPs non inverting input can be - selected among the list shown by table below. - - [..] Table 1. OPAMPs inverting/non-inverting inputs for the STM32L4 devices: - - (+) +------------------------------------------------------------------------| - (+) | | | OPAMP1 | OPAMP2 | - (+) |-----------------|---------|----------------------|---------------------| - (+) | Inverting Input | VM_SEL | | | - (+) | | | IO0-> PA1 | IO0-> PA7 | - (+) | | | LOW LEAKAGE IO (2) | LOW LEAKAGE IO (2) | - (+) | | | Not connected | Not connected | - (+) | (1) | | PGA mode only | PGA mode only | - (+) |-----------------|---------|----------------------|---------------------| - (+) | Non Inverting | VP_SEL | | | - (+) | | | IO0-> PA0 (GPIO) | IO0-> PA6 (GPIO) | - (+) | Input | | DAC1_OUT1 internal | DAC1_OUT2 internal | - (+) +------------------------------------------------------------------------| - [..] (1): NA in follower mode. - [..](2): Available on some package only (ex. BGA132). - - [..] Table 2. OPAMPs outputs for the STM32L4 devices: - - (+) +------------------------------------------------------------------------- - (+) | | | OPAMP1 | OPAMP2 | - (+) |-----------------|--------|-----------------------|---------------------| - (+) | Output | VOUT | PA3 | PB0 | - (+) | | | & (2) ADC12_IN if | & (2) ADC12_IN if | - (+) | | | connected internally | connected internally| - (+) |-----------------|--------|-----------------------|---------------------| - [..] (2): ADC1 or ADC2 shall select IN15. - - ##### How to use this driver ##### -================================================================================ - [..] - - *** Power supply range *** - ============================================ - [..] To run in low power mode: - - (#) Configure the OPAMP using HAL_OPAMP_Init() function: - (++) Select OPAMP_POWERSUPPLY_LOW (VDDA lower than 2.4V) - (++) Otherwise select OPAMP_POWERSUPPLY_HIGH (VDDA higher than 2.4V) - - *** Low / normal power mode *** - ============================================ - [..] To run in low power mode: - - (#) Configure the OPAMP using HAL_OPAMP_Init() function: - (++) Select OPAMP_POWERMODE_LOWPOWER - (++) Otherwise select OPAMP_POWERMODE_NORMAL - - *** Calibration *** - ============================================ - [..] To run the OPAMP calibration self calibration: - - (#) Start calibration using HAL_OPAMP_SelfCalibrate. - Store the calibration results. - - *** Running mode *** - ============================================ - - [..] To use the OPAMP, perform the following steps: - - (#) Fill in the HAL_OPAMP_MspInit() to - (++) Enable the OPAMP Peripheral clock using macro __HAL_RCC_OPAMP_CLK_ENABLE() - (++) Configure the OPAMP input AND output in analog mode using - HAL_GPIO_Init() to map the OPAMP output to the GPIO pin. - - (#) Configure the OPAMP using HAL_OPAMP_Init() function: - (++) Select the mode - (++) Select the inverting input - (++) Select the non-inverting input - (++) If PGA mode is enabled, Select if inverting input is connected. - (++) Select either factory or user defined trimming mode. - (++) If the user-defined trimming mode is enabled, select PMOS & NMOS trimming values - (typically values set by HAL_OPAMP_SelfCalibrate function). - - (#) Enable the OPAMP using HAL_OPAMP_Start() function. - - (#) Disable the OPAMP using HAL_OPAMP_Stop() function. - - (#) Lock the OPAMP in running mode using HAL_OPAMP_Lock() function. - Caution: On STM32L4, HAL OPAMP lock is software lock only (not - hardware lock as on some other STM32 devices) - - (#) If needed, unlock the OPAMP using HAL_OPAMPEx_Unlock() function. - - *** Running mode: change of configuration while OPAMP ON *** - ============================================ - [..] To Re-configure OPAMP when OPAMP is ON (change on the fly) - (#) If needed, fill in the HAL_OPAMP_MspInit() - (++) This is the case for instance if you wish to use new OPAMP I/O - - (#) Configure the OPAMP using HAL_OPAMP_Init() function: - (++) As in configure case, select first the parameters you wish to modify. - - (#) Change from low power mode to normal power mode (& vice versa) requires - first HAL_OPAMP_DeInit() (force OPAMP OFF) and then HAL_OPAMP_Init(). - In other words, of OPAMP is ON, HAL_OPAMP_Init can NOT change power mode - alone. - - @endverbatim - ****************************************************************************** - * @attention - * - * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @defgroup OPAMP OPAMP - * @brief OPAMP module driver - * @{ - */ - -#ifdef HAL_OPAMP_MODULE_ENABLED - -/* Private types -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private constants ---------------------------------------------------------*/ -/** @addtogroup OPAMP_Private_Constants - * @{ - */ - -/* CSR register reset value */ -#define OPAMP_CSR_RESET_VALUE ((uint32_t)0x00000000) - -#define OPAMP_CSR_RESET_BITS (OPAMP_CSR_OPAMPxEN | OPAMP_CSR_OPALPM | OPAMP_CSR_OPAMODE \ - | OPAMP_CSR_PGGAIN | OPAMP_CSR_VMSEL | OPAMP_CSR_VPSEL \ - | OPAMP_CSR_CALON | OPAMP_CSR_USERTRIM) - -/* CSR Init masks */ -#define OPAMP_CSR_INIT_MASK_PGA (OPAMP_CSR_OPALPM | OPAMP_CSR_OPAMODE| OPAMP_CSR_PGGAIN \ - | OPAMP_CSR_VMSEL | OPAMP_CSR_VPSEL | OPAMP_CSR_USERTRIM) - -#define OPAMP_CSR_INIT_MASK_FOLLOWER (OPAMP_CSR_OPALPM | OPAMP_CSR_OPAMODE| OPAMP_CSR_VPSEL \ - | OPAMP_CSR_USERTRIM) - -#define OPAMP_CSR_INIT_MASK_STANDALONE (OPAMP_CSR_OPALPM | OPAMP_CSR_OPAMODE| OPAMP_CSR_VPSEL \ - | OPAMP_CSR_VMSEL | OPAMP_CSR_USERTRIM) - - -/** - * @} - */ - -/* Private macros ------------------------------------------------------------*/ -/* Private functions ---------------------------------------------------------*/ -/* Exported functions --------------------------------------------------------*/ - -/** @defgroup OPAMP_Exported_Functions OPAMP Exported Functions - * @{ - */ - -/** @defgroup OPAMP_Exported_Functions_Group1 Initialization and de-initialization functions - * @brief Initialization and Configuration functions - * -@verbatim - ============================================================================== - ##### Initialization and de-initialization functions ##### - ============================================================================== - -@endverbatim - * @{ - */ - -/** - * @brief Initializes the OPAMP according to the specified - * parameters in the OPAMP_InitTypeDef and initialize the associated handle. - * @note If the selected opamp is locked, initialization can't be performed. - * To unlock the configuration, perform a system reset. - * @param hopamp: OPAMP handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_OPAMP_Init(OPAMP_HandleTypeDef *hopamp) -{ - HAL_StatusTypeDef status = HAL_OK; - uint32_t updateotrlpotr = 0; - - /* Check the OPAMP handle allocation and lock status */ - /* Init not allowed if calibration is ongoing */ - if((hopamp == NULL) || (hopamp->State == HAL_OPAMP_STATE_BUSYLOCKED) - || (hopamp->State == HAL_OPAMP_STATE_CALIBBUSY)) - { - return HAL_ERROR; - } - else - { - /* Check the parameter */ - assert_param(IS_OPAMP_ALL_INSTANCE(hopamp->Instance)); - - /* Set OPAMP parameters */ - assert_param(IS_OPAMP_POWER_SUPPLY_RANGE(hopamp->Init.PowerSupplyRange)); - assert_param(IS_OPAMP_POWERMODE(hopamp->Init.PowerMode)); - assert_param(IS_OPAMP_FUNCTIONAL_NORMALMODE(hopamp->Init.Mode)); - assert_param(IS_OPAMP_NONINVERTING_INPUT(hopamp->Init.NonInvertingInput)); - - if ((hopamp->Init.Mode) == OPAMP_STANDALONE_MODE) - { - assert_param(IS_OPAMP_INVERTING_INPUT_STANDALONE(hopamp->Init.InvertingInput)); - } - - if ((hopamp->Init.Mode) == OPAMP_PGA_MODE) - { - assert_param(IS_OPAMP_INVERTING_INPUT_PGA(hopamp->Init.InvertingInput)); - } - - if ((hopamp->Init.Mode) == OPAMP_PGA_MODE) - { - assert_param(IS_OPAMP_PGA_GAIN(hopamp->Init.PgaGain)); - } - - assert_param(IS_OPAMP_TRIMMING(hopamp->Init.UserTrimming)); - if ((hopamp->Init.UserTrimming) == OPAMP_TRIMMING_USER) - { - if (hopamp->Init.PowerMode == OPAMP_POWERMODE_NORMAL) - { - assert_param(IS_OPAMP_TRIMMINGVALUE(hopamp->Init.TrimmingValueP)); - assert_param(IS_OPAMP_TRIMMINGVALUE(hopamp->Init.TrimmingValueN)); - } - else - { - assert_param(IS_OPAMP_TRIMMINGVALUE(hopamp->Init.TrimmingValuePLowPower)); - assert_param(IS_OPAMP_TRIMMINGVALUE(hopamp->Init.TrimmingValueNLowPower)); - } - } - - if(hopamp->State == HAL_OPAMP_STATE_RESET) - { - /* Allocate lock resource and initialize it */ - hopamp->Lock = HAL_UNLOCKED; - } - - /* Call MSP init function */ - HAL_OPAMP_MspInit(hopamp); - - /* Set operating mode */ - CLEAR_BIT(hopamp->Instance->CSR, OPAMP_CSR_CALON); - - if (hopamp->Init.Mode == OPAMP_PGA_MODE) - { - MODIFY_REG(hopamp->Instance->CSR, OPAMP_CSR_INIT_MASK_PGA, \ - hopamp->Init.PowerMode | \ - hopamp->Init.Mode | \ - hopamp->Init.PgaGain | \ - hopamp->Init.InvertingInput | \ - hopamp->Init.NonInvertingInput | \ - hopamp->Init.UserTrimming); - } - - if (hopamp->Init.Mode == OPAMP_FOLLOWER_MODE) - { - /* In Follower mode InvertingInput is Not Applicable */ - MODIFY_REG(hopamp->Instance->CSR, OPAMP_CSR_INIT_MASK_FOLLOWER, \ - hopamp->Init.PowerMode | \ - hopamp->Init.Mode | \ - hopamp->Init.NonInvertingInput | \ - hopamp->Init.UserTrimming); - } - - if (hopamp->Init.Mode == OPAMP_STANDALONE_MODE) - { - MODIFY_REG(hopamp->Instance->CSR, OPAMP_CSR_INIT_MASK_STANDALONE, \ - hopamp->Init.PowerMode | \ - hopamp->Init.Mode | \ - hopamp->Init.InvertingInput | \ - hopamp->Init.NonInvertingInput | \ - hopamp->Init.UserTrimming); - } - - if (hopamp->Init.UserTrimming == OPAMP_TRIMMING_USER) - { - /* Set power mode and associated calibration parameters */ - if (hopamp->Init.PowerMode != OPAMP_POWERMODE_LOWPOWER) - { - /* OPAMP_POWERMODE_NORMAL */ - /* Set calibration mode (factory or user) and values for */ - /* transistors differential pair high (PMOS) and low (NMOS) for */ - /* normal mode. */ - updateotrlpotr = (((hopamp->Init.TrimmingValueP) << (OPAMP_INPUT_NONINVERTING)) \ - | (hopamp->Init.TrimmingValueN)); - MODIFY_REG(hopamp->Instance->OTR, OPAMP_OTR_TRIMOFFSETN | OPAMP_OTR_TRIMOFFSETP, updateotrlpotr); - } - else - { - /* OPAMP_POWERMODE_LOWPOWER */ - /* transistors differential pair high (PMOS) and low (NMOS) for */ - /* low power mode. */ - updateotrlpotr = (((hopamp->Init.TrimmingValuePLowPower) << (OPAMP_INPUT_NONINVERTING)) \ - | (hopamp->Init.TrimmingValueNLowPower)); - MODIFY_REG(hopamp->Instance->LPOTR, OPAMP_OTR_TRIMOFFSETN | OPAMP_OTR_TRIMOFFSETP, updateotrlpotr); - } - } - - /* Configure the power supply range */ - /* The OPAMP_CSR_OPARANGE is common configuration for all OPAMPs */ - /* bit OPAMP1_CSR_OPARANGE is used for both OPAMPs */ - MODIFY_REG(OPAMP1->CSR, OPAMP1_CSR_OPARANGE, hopamp->Init.PowerSupplyRange); - - /* Update the OPAMP state*/ - if (hopamp->State == HAL_OPAMP_STATE_RESET) - { - /* From RESET state to READY State */ - hopamp->State = HAL_OPAMP_STATE_READY; - } - /* else: remain in READY or BUSY state (no update) */ - return status; - } -} - -/** - * @brief DeInitialize the OPAMP peripheral. - * @note Deinitialization can be performed if the OPAMP configuration is locked. - * (the lock is SW in L4) - * @param hopamp: OPAMP handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_OPAMP_DeInit(OPAMP_HandleTypeDef *hopamp) -{ - HAL_StatusTypeDef status = HAL_OK; - - /* Check the OPAMP handle allocation */ - /* DeInit not allowed if calibration is ongoing */ - if((hopamp == NULL) || (hopamp->State == HAL_OPAMP_STATE_CALIBBUSY)) - { - status = HAL_ERROR; - } - else - { - /* Check the parameter */ - assert_param(IS_OPAMP_ALL_INSTANCE(hopamp->Instance)); - - /* Set OPAMP_CSR register to reset value */ - /* Mind that OPAMP1_CSR_OPARANGE of CSR of OPAMP1 remains unchanged (applies to both OPAMPs) */ - /* OPAMP shall be disabled first separately */ - CLEAR_BIT(hopamp->Instance->CSR, OPAMP_CSR_OPAMPxEN); - MODIFY_REG(hopamp->Instance->CSR, OPAMP_CSR_RESET_BITS, OPAMP_CSR_RESET_VALUE); - - /* DeInit the low level hardware: GPIO, CLOCK and NVIC */ - HAL_OPAMP_MspDeInit(hopamp); - - /* Update the OPAMP state*/ - hopamp->State = HAL_OPAMP_STATE_RESET; - } - - /* Process unlocked */ - __HAL_UNLOCK(hopamp); - - return status; -} - - -/** - * @brief Initialize the OPAMP MSP. - * @param hopamp: OPAMP handle - * @retval None - */ -__weak void HAL_OPAMP_MspInit(OPAMP_HandleTypeDef *hopamp) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the function "HAL_OPAMP_MspInit()" must be implemented in the user file. - */ -} - -/** - * @brief DeInitialize OPAMP MSP. - * @param hopamp: OPAMP handle - * @retval None - */ -__weak void HAL_OPAMP_MspDeInit(OPAMP_HandleTypeDef *hopamp) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the function "HAL_OPAMP_MspDeInit()" must be implemented in the user file. - */ -} - -/** - * @} - */ - - -/** @defgroup OPAMP_Exported_Functions_Group2 IO operation functions - * @brief IO operation functions - * -@verbatim - =============================================================================== - ##### IO operation functions ##### - =============================================================================== - [..] - This subsection provides a set of functions allowing to manage the OPAMP - start, stop and calibration actions. - -@endverbatim - * @{ - */ - -/** - * @brief Start the OPAMP. - * @param hopamp: OPAMP handle - * @retval HAL status - */ - -HAL_StatusTypeDef HAL_OPAMP_Start(OPAMP_HandleTypeDef *hopamp) -{ - HAL_StatusTypeDef status = HAL_OK; - - /* Check the OPAMP handle allocation */ - /* Check if OPAMP locked */ - if((hopamp == NULL) || (hopamp->State == HAL_OPAMP_STATE_BUSYLOCKED)) - { - status = HAL_ERROR; - } - else - { - /* Check the parameter */ - assert_param(IS_OPAMP_ALL_INSTANCE(hopamp->Instance)); - - if(hopamp->State == HAL_OPAMP_STATE_READY) - { - /* Enable the selected opamp */ - SET_BIT (hopamp->Instance->CSR, OPAMP_CSR_OPAMPxEN); - - /* Update the OPAMP state*/ - /* From HAL_OPAMP_STATE_READY to HAL_OPAMP_STATE_BUSY */ - hopamp->State = HAL_OPAMP_STATE_BUSY; - } - else - { - status = HAL_ERROR; - } - - } - return status; -} - -/** - * @brief Stop the OPAMP. - * @param hopamp: OPAMP handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_OPAMP_Stop(OPAMP_HandleTypeDef *hopamp) -{ - HAL_StatusTypeDef status = HAL_OK; - - /* Check the OPAMP handle allocation */ - /* Check if OPAMP locked */ - /* Check if OPAMP calibration ongoing */ - if((hopamp == NULL) || (hopamp->State == HAL_OPAMP_STATE_BUSYLOCKED) \ - || (hopamp->State == HAL_OPAMP_STATE_CALIBBUSY)) - { - status = HAL_ERROR; - } - else - { - /* Check the parameter */ - assert_param(IS_OPAMP_ALL_INSTANCE(hopamp->Instance)); - - if(hopamp->State == HAL_OPAMP_STATE_BUSY) - { - /* Disable the selected opamp */ - CLEAR_BIT (hopamp->Instance->CSR, OPAMP_CSR_OPAMPxEN); - - /* Update the OPAMP state*/ - /* From HAL_OPAMP_STATE_BUSY to HAL_OPAMP_STATE_READY*/ - hopamp->State = HAL_OPAMP_STATE_READY; - } - else - { - status = HAL_ERROR; - } - } - return status; -} - -/** - * @brief Run the self calibration of one OPAMP. - * @note Calibration is performed in the mode specified in OPAMP init - * structure (mode normal or low-power). To perform calibration for - * both modes, repeat this function twice after OPAMP init structure - * accordingly updated. - * @note Calibration runs about 10 ms. - * @param hopamp handle - * @retval Updated offset trimming values (PMOS & NMOS), user trimming is enabled - * @retval HAL status - - */ - -HAL_StatusTypeDef HAL_OPAMP_SelfCalibrate(OPAMP_HandleTypeDef *hopamp) -{ - - HAL_StatusTypeDef status = HAL_OK; - - uint32_t trimmingvaluen = 0; - uint32_t trimmingvaluep = 0; - uint32_t delta; - - __IO uint32_t* tmp_opamp_reg_trimming; /* Selection of register of trimming depending on power mode: OTR or LPOTR */ - - /* Check the OPAMP handle allocation */ - /* Check if OPAMP locked */ - if((hopamp == NULL) || (hopamp->State == HAL_OPAMP_STATE_BUSYLOCKED)) - { - status = HAL_ERROR; - } - else - { - - /* Check if OPAMP in calibration mode and calibration not yet enable */ - if(hopamp->State == HAL_OPAMP_STATE_READY) - { - /* Check the parameter */ - assert_param(IS_OPAMP_ALL_INSTANCE(hopamp->Instance)); - assert_param(IS_OPAMP_POWERMODE(hopamp->Init.PowerMode)); - - /* user trimming values are used for offset calibration */ - SET_BIT(hopamp->Instance->CSR, OPAMP_CSR_USERTRIM); - - /* Select trimming settings depending on power mode */ - if (hopamp->Init.PowerMode == OPAMP_POWERMODE_NORMAL) - { - tmp_opamp_reg_trimming = &hopamp->Instance->OTR; - } - else - { - tmp_opamp_reg_trimming = &hopamp->Instance->LPOTR; - } - - /* Enable calibration */ - SET_BIT (hopamp->Instance->CSR, OPAMP_CSR_CALON); - - /* 1st calibration - N */ - CLEAR_BIT (hopamp->Instance->CSR, OPAMP_CSR_CALSEL); - - /* Enable the selected opamp */ - SET_BIT (hopamp->Instance->CSR, OPAMP_CSR_OPAMPxEN); - - /* Init trimming counter */ - /* Medium value */ - trimmingvaluen = 16; - delta = 8; - - while (delta != 0) - { - /* Set candidate trimming */ - /* OPAMP_POWERMODE_NORMAL */ - MODIFY_REG(*tmp_opamp_reg_trimming, OPAMP_OTR_TRIMOFFSETN, trimmingvaluen); - - /* OFFTRIMmax delay 1 ms as per datasheet (electrical characteristics */ - /* Offset trim time: during calibration, minimum time needed between */ - /* two steps to have 1 mV accuracy */ - HAL_Delay(OPAMP_TRIMMING_DELAY); - - if (READ_BIT(hopamp->Instance->CSR, OPAMP_CSR_CALOUT) != RESET) - { - /* OPAMP_CSR_CALOUT is HIGH try higher trimming */ - trimmingvaluen -= delta; - } - else - { - /* OPAMP_CSR_CALOUT is LOW try lower trimming */ - trimmingvaluen += delta; - } - /* Divide range by 2 to continue dichotomy sweep */ - delta >>= 1; - } - - /* Still need to check if right calibration is current value or one step below */ - /* Indeed the first value that causes the OUTCAL bit to change from 0 to 1 */ - /* Set candidate trimming */ - MODIFY_REG(*tmp_opamp_reg_trimming, OPAMP_OTR_TRIMOFFSETN, trimmingvaluen); - - /* OFFTRIMmax delay 1 ms as per datasheet (electrical characteristics */ - /* Offset trim time: during calibration, minimum time needed between */ - /* two steps to have 1 mV accuracy */ - HAL_Delay(OPAMP_TRIMMING_DELAY); - - if ((READ_BIT(hopamp->Instance->CSR, OPAMP_CSR_CALOUT)) == 0) - { - /* Trimming value is actually one value more */ - trimmingvaluen++; - /* Set right trimming */ - MODIFY_REG(*tmp_opamp_reg_trimming, OPAMP_OTR_TRIMOFFSETN, trimmingvaluen); - } - - /* 2nd calibration - P */ - SET_BIT (hopamp->Instance->CSR, OPAMP_CSR_CALSEL); - - /* Init trimming counter */ - /* Medium value */ - trimmingvaluep = 16; - delta = 8; - - while (delta != 0) - { - /* Set candidate trimming */ - /* OPAMP_POWERMODE_NORMAL */ - MODIFY_REG(*tmp_opamp_reg_trimming, OPAMP_OTR_TRIMOFFSETP, (trimmingvaluep<<OPAMP_INPUT_NONINVERTING)); - - /* OFFTRIMmax delay 1 ms as per datasheet (electrical characteristics */ - /* Offset trim time: during calibration, minimum time needed between */ - /* two steps to have 1 mV accuracy */ - HAL_Delay(OPAMP_TRIMMING_DELAY); - - if (READ_BIT(hopamp->Instance->CSR, OPAMP_CSR_CALOUT) != RESET) - { - /* OPAMP_CSR_CALOUT is HIGH try higher trimming */ - trimmingvaluep += delta; - } - else - { - /* OPAMP_CSR_CALOUT is LOW try lower trimming */ - trimmingvaluep -= delta; - } - - /* Divide range by 2 to continue dichotomy sweep */ - delta >>= 1; - } - - /* Still need to check if right calibration is current value or one step below */ - /* Indeed the first value that causes the OUTCAL bit to change from 1 to 0 */ - /* Set candidate trimming */ - MODIFY_REG(*tmp_opamp_reg_trimming, OPAMP_OTR_TRIMOFFSETP, (trimmingvaluep<<OPAMP_INPUT_NONINVERTING)); - - /* OFFTRIMmax delay 1 ms as per datasheet (electrical characteristics */ - /* Offset trim time: during calibration, minimum time needed between */ - /* two steps to have 1 mV accuracy */ - HAL_Delay(OPAMP_TRIMMING_DELAY); - - if (READ_BIT(hopamp->Instance->CSR, OPAMP_CSR_CALOUT) != RESET) - { - /* Trimming value is actually one value more */ - trimmingvaluep++; - MODIFY_REG(*tmp_opamp_reg_trimming, OPAMP_OTR_TRIMOFFSETP, (trimmingvaluep<<OPAMP_INPUT_NONINVERTING)); - } - - /* Disable the OPAMP */ - CLEAR_BIT (hopamp->Instance->CSR, OPAMP_CSR_OPAMPxEN); - - /* Disable calibration & set normal mode (operating mode) */ - CLEAR_BIT (hopamp->Instance->CSR, OPAMP_CSR_CALON); - - /* Self calibration is successful */ - /* Store calibration(user trimming) results in init structure. */ - - /* Set user trimming mode */ - hopamp->Init.UserTrimming = OPAMP_TRIMMING_USER; - - /* Affect calibration parameters depending on mode normal/low power */ - if (hopamp->Init.PowerMode != OPAMP_POWERMODE_LOWPOWER) - { - /* Write calibration result N */ - hopamp->Init.TrimmingValueN = trimmingvaluen; - /* Write calibration result P */ - hopamp->Init.TrimmingValueP = trimmingvaluep; - } - else - { - /* Write calibration result N */ - hopamp->Init.TrimmingValueNLowPower = trimmingvaluen; - /* Write calibration result P */ - hopamp->Init.TrimmingValuePLowPower = trimmingvaluep; - } - } - - else - { - /* OPAMP can not be calibrated from this mode */ - status = HAL_ERROR; - } - } - return status; -} - -/** - * @} - */ - -/** @defgroup OPAMP_Exported_Functions_Group3 Peripheral Control functions - * @brief Peripheral Control functions - * -@verbatim - =============================================================================== - ##### Peripheral Control functions ##### - =============================================================================== - [..] - This subsection provides a set of functions allowing to control the OPAMP data - transfers. - - - -@endverbatim - * @{ - */ - -/** - * @brief Lock the selected OPAMP configuration. - * @note On STM32L4, HAL OPAMP lock is software lock only (in - * contrast of hardware lock available on some other STM32 - * devices). - * @param hopamp: OPAMP handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_OPAMP_Lock(OPAMP_HandleTypeDef *hopamp) -{ - HAL_StatusTypeDef status = HAL_OK; - - /* Check the OPAMP handle allocation */ - /* Check if OPAMP locked */ - /* OPAMP can be locked when enabled and running in normal mode */ - /* It is meaningless otherwise */ - if((hopamp == NULL) || (hopamp->State == HAL_OPAMP_STATE_RESET) \ - || (hopamp->State == HAL_OPAMP_STATE_READY) \ - || (hopamp->State == HAL_OPAMP_STATE_CALIBBUSY)\ - || (hopamp->State == HAL_OPAMP_STATE_BUSYLOCKED)) - - { - status = HAL_ERROR; - } - - else - { - /* Check the parameter */ - assert_param(IS_OPAMP_ALL_INSTANCE(hopamp->Instance)); - - /* OPAMP state changed to locked */ - hopamp->State = HAL_OPAMP_STATE_BUSYLOCKED; - } - return status; -} - -/** - * @brief Return the OPAMP factory trimming value. - * @note On STM32L4 OPAMP, user can retrieve factory trimming if - * OPAMP has never been set to user trimming before. - * Therefore, this function must be called when OPAMP init - * parameter "UserTrimming" is set to trimming factory, - * and before OPAMP calibration (function - * "HAL_OPAMP_SelfCalibrate()"). - * Otherwise, factory trimming value cannot be retrieved and - * error status is returned. - * @param hopamp : OPAMP handle - * @param trimmingoffset : Trimming offset (P or N) - * This parameter must be a value of @ref OPAMP_FactoryTrimming - * @note Calibration parameter retrieved is corresponding to the mode - * specified in OPAMP init structure (mode normal or low-power). - * To retrieve calibration parameters for both modes, repeat this - * function after OPAMP init structure accordingly updated. - * @retval Trimming value (P or N): range: 0->31 - * or OPAMP_FACTORYTRIMMING_DUMMY if trimming value is not available - * - */ - -HAL_OPAMP_TrimmingValueTypeDef HAL_OPAMP_GetTrimOffset (OPAMP_HandleTypeDef *hopamp, uint32_t trimmingoffset) -{ - HAL_OPAMP_TrimmingValueTypeDef trimmingvalue; - __IO uint32_t* tmp_opamp_reg_trimming; /* Selection of register of trimming depending on power mode: OTR or LPOTR */ - - /* Check the OPAMP handle allocation */ - /* Value can be retrieved in HAL_OPAMP_STATE_READY state */ - if((hopamp == NULL) || (hopamp->State == HAL_OPAMP_STATE_RESET) \ - || (hopamp->State == HAL_OPAMP_STATE_BUSY) \ - || (hopamp->State == HAL_OPAMP_STATE_CALIBBUSY)\ - || (hopamp->State == HAL_OPAMP_STATE_BUSYLOCKED)) - { - return OPAMP_FACTORYTRIMMING_DUMMY; - } - else - { - /* Check the parameter */ - assert_param(IS_OPAMP_ALL_INSTANCE(hopamp->Instance)); - assert_param(IS_OPAMP_FACTORYTRIMMING(trimmingoffset)); - assert_param(IS_OPAMP_POWERMODE(hopamp->Init.PowerMode)); - - /* Check the trimming mode */ - if (READ_BIT(hopamp->Instance->CSR,OPAMP_CSR_USERTRIM) != RESET) - { - /* This function must called when OPAMP init parameter "UserTrimming" */ - /* is set to trimming factory, and before OPAMP calibration (function */ - /* "HAL_OPAMP_SelfCalibrate()"). */ - /* Otherwise, factory trimming value cannot be retrieved and error */ - /* status is returned. */ - trimmingvalue = OPAMP_FACTORYTRIMMING_DUMMY; - } - else - { - /* Select trimming settings depending on power mode */ - if (hopamp->Init.PowerMode == OPAMP_POWERMODE_NORMAL) - { - tmp_opamp_reg_trimming = &OPAMP->OTR; - } - else - { - tmp_opamp_reg_trimming = &OPAMP->LPOTR; - } - - /* Get factory trimming */ - if (trimmingoffset == OPAMP_FACTORYTRIMMING_P) - { - /* OPAMP_FACTORYTRIMMING_P */ - trimmingvalue = ((*tmp_opamp_reg_trimming) & OPAMP_OTR_TRIMOFFSETP) >> OPAMP_INPUT_NONINVERTING; - } - else - { - /* OPAMP_FACTORYTRIMMING_N */ - trimmingvalue = (*tmp_opamp_reg_trimming) & OPAMP_OTR_TRIMOFFSETN; - } - } - } - return trimmingvalue; -} - -/** - * @} - */ - - -/** @defgroup OPAMP_Exported_Functions_Group4 Peripheral State functions - * @brief Peripheral State functions - * -@verbatim - =============================================================================== - ##### Peripheral State functions ##### - =============================================================================== - [..] - This subsection permits to get in run-time the status of the peripheral. - -@endverbatim - * @{ - */ - -/** - * @brief Return the OPAMP handle state. - * @param hopamp : OPAMP handle - * @retval HAL state - */ -HAL_OPAMP_StateTypeDef HAL_OPAMP_GetState(OPAMP_HandleTypeDef *hopamp) -{ - /* Check the OPAMP handle allocation */ - if(hopamp == NULL) - { - return HAL_OPAMP_STATE_RESET; - } - - /* Check the parameter */ - assert_param(IS_OPAMP_ALL_INSTANCE(hopamp->Instance)); - - /* Return OPAMP handle state */ - return hopamp->State; -} - -/** - * @} - */ - -/** - * @} - */ - - /** - * @} - */ - -#endif /* HAL_OPAMP_MODULE_ENABLED */ -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ -
--- a/Src/stm32l4xx_hal_opamp_ex.c Thu Nov 12 20:49:49 2015 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,437 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_opamp_ex.c - * @author MCD Application Team - * @version V1.1.0 - * @date 16-September-2015 - * @brief Extended OPAMP HAL module driver. - * This file provides firmware functions to manage the following - * functionalities of the operational amplifier(s)(OPAMP1, OPAMP2 etc) - * peripheral: - * + Extended Initialization and de-initialization functions - * + Extended Peripheral Control functions - * - @verbatim - ****************************************************************************** - * @attention - * - * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @defgroup OPAMPEx OPAMPEx - * @brief OPAMP Extended HAL module driver - * @{ - */ - -#ifdef HAL_OPAMP_MODULE_ENABLED - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -/* Private macro -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ -/* Exported functions --------------------------------------------------------*/ - -/** @defgroup OPAMP_Exported_Functions OPAMP Exported Functions - * @{ - */ - -/** @addtogroup OPAMPEx_Exported_Functions_Group1 - * @brief Extended operation functions - * -@verbatim - =============================================================================== - ##### Extended IO operation functions ##### - =============================================================================== - [..] - (+) OPAMP Self calibration. - -@endverbatim - * @{ - */ - -/* 2 OPAMPS available */ -/* 2 OPAMPS can be calibrated in parallel */ - -/** - * @brief Run the self calibration of the 2 OPAMPs in parallel. - * @note Trimming values (PMOS & NMOS) are updated and user trimming is - * enabled is calibration is successful. - * @note Calibration is performed in the mode specified in OPAMP init - * structure (mode normal or low-power). To perform calibration for - * both modes, repeat this function twice after OPAMP init structure - * accordingly updated. - * @note Calibration runs about 10 ms (5 dichotomy steps, repeated for P - * and N transistors: 10 steps with 1 ms for each step). - * @param hopamp1 handle - * @param hopamp2 handle - * @retval HAL status - */ - -HAL_StatusTypeDef HAL_OPAMPEx_SelfCalibrateAll(OPAMP_HandleTypeDef *hopamp1, OPAMP_HandleTypeDef *hopamp2) -{ - HAL_StatusTypeDef status = HAL_OK; - - uint32_t trimmingvaluen1 = 0; - uint32_t trimmingvaluep1 = 0; - uint32_t trimmingvaluen2 = 0; - uint32_t trimmingvaluep2 = 0; - -/* Selection of register of trimming depending on power mode: OTR or LPOTR */ - __IO uint32_t* tmp_opamp1_reg_trimming; - __IO uint32_t* tmp_opamp2_reg_trimming; - - uint32_t delta; - - if((hopamp1 == NULL) || (hopamp1->State == HAL_OPAMP_STATE_BUSYLOCKED) || \ - (hopamp2 == NULL) || (hopamp2->State == HAL_OPAMP_STATE_BUSYLOCKED)) - { - status = HAL_ERROR; - } - else - { - /* Check if OPAMP in calibration mode and calibration not yet enable */ - if((hopamp1->State == HAL_OPAMP_STATE_READY) && (hopamp2->State == HAL_OPAMP_STATE_READY)) - { - /* Check the parameter */ - assert_param(IS_OPAMP_ALL_INSTANCE(hopamp1->Instance)); - assert_param(IS_OPAMP_ALL_INSTANCE(hopamp2->Instance)); - - assert_param(IS_OPAMP_POWERMODE(hopamp1->Init.PowerMode)); - assert_param(IS_OPAMP_POWERMODE(hopamp2->Init.PowerMode)); - - /* user trimming values are used for offset calibration */ - SET_BIT(hopamp1->Instance->CSR, OPAMP_CSR_USERTRIM); - SET_BIT(hopamp2->Instance->CSR, OPAMP_CSR_USERTRIM); - - /* Select trimming settings depending on power mode */ - if (hopamp1->Init.PowerMode == OPAMP_POWERMODE_NORMAL) - { - tmp_opamp1_reg_trimming = &OPAMP1->OTR; - } - else - { - tmp_opamp1_reg_trimming = &OPAMP1->LPOTR; - } - - if (hopamp2->Init.PowerMode == OPAMP_POWERMODE_NORMAL) - { - tmp_opamp2_reg_trimming = &OPAMP2->OTR; - } - else - { - tmp_opamp2_reg_trimming = &OPAMP2->LPOTR; - } - - /* Enable calibration */ - SET_BIT (hopamp1->Instance->CSR, OPAMP_CSR_CALON); - SET_BIT (hopamp2->Instance->CSR, OPAMP_CSR_CALON); - - /* 1st calibration - N */ - CLEAR_BIT (hopamp1->Instance->CSR, OPAMP_CSR_CALSEL); - CLEAR_BIT (hopamp2->Instance->CSR, OPAMP_CSR_CALSEL); - - /* Enable the selected opamp */ - SET_BIT (hopamp1->Instance->CSR, OPAMP_CSR_OPAMPxEN); - SET_BIT (hopamp2->Instance->CSR, OPAMP_CSR_OPAMPxEN); - - /* Init trimming counter */ - /* Medium value */ - trimmingvaluen1 = 16; - trimmingvaluen2 = 16; - delta = 8; - - while (delta != 0) - { - /* Set candidate trimming */ - /* OPAMP_POWERMODE_NORMAL */ - MODIFY_REG(*tmp_opamp1_reg_trimming, OPAMP_OTR_TRIMOFFSETN, trimmingvaluen1); - MODIFY_REG(*tmp_opamp2_reg_trimming, OPAMP_OTR_TRIMOFFSETN, trimmingvaluen2); - - /* OFFTRIMmax delay 1 ms as per datasheet (electrical characteristics */ - /* Offset trim time: during calibration, minimum time needed between */ - /* two steps to have 1 mV accuracy */ - HAL_Delay(OPAMP_TRIMMING_DELAY); - - if (READ_BIT(hopamp1->Instance->CSR, OPAMP_CSR_CALOUT) != RESET) - { - /* OPAMP_CSR_CALOUT is HIGH try lower trimming */ - trimmingvaluen1 -= delta; - } - else - { - /* OPAMP_CSR_CALOUT is LOW try higher trimming */ - trimmingvaluen1 += delta; - } - - if (READ_BIT(hopamp2->Instance->CSR, OPAMP_CSR_CALOUT) != RESET) - { - /* OPAMP_CSR_CALOUT is HIGH try lower trimming */ - trimmingvaluen2 -= delta; - } - else - { - /* OPAMP_CSR_CALOUT is LOW try higher trimming */ - trimmingvaluen2 += delta; - } - /* Divide range by 2 to continue dichotomy sweep */ - delta >>= 1; - } - - /* Still need to check if right calibration is current value or one step below */ - /* Indeed the first value that causes the OUTCAL bit to change from 0 to 1 */ - /* Set candidate trimming */ - MODIFY_REG(*tmp_opamp1_reg_trimming, OPAMP_OTR_TRIMOFFSETN, trimmingvaluen1); - MODIFY_REG(*tmp_opamp2_reg_trimming, OPAMP_OTR_TRIMOFFSETN, trimmingvaluen2); - - /* OFFTRIMmax delay 1 ms as per datasheet (electrical characteristics */ - /* Offset trim time: during calibration, minimum time needed between */ - /* two steps to have 1 mV accuracy */ - HAL_Delay(OPAMP_TRIMMING_DELAY); - - if ((READ_BIT(hopamp1->Instance->CSR, OPAMP_CSR_CALOUT)) == 0) - { - /* Trimming value is actually one value more */ - trimmingvaluen1++; - MODIFY_REG(*tmp_opamp1_reg_trimming, OPAMP_OTR_TRIMOFFSETN, trimmingvaluen1); - } - - if ((READ_BIT(hopamp2->Instance->CSR, OPAMP_CSR_CALOUT)) == 0) - { - /* Trimming value is actually one value more */ - trimmingvaluen2++; - MODIFY_REG(*tmp_opamp2_reg_trimming, OPAMP_OTR_TRIMOFFSETN, trimmingvaluen2); - } - - /* 2nd calibration - P */ - SET_BIT (hopamp1->Instance->CSR, OPAMP_CSR_CALSEL); - SET_BIT (hopamp2->Instance->CSR, OPAMP_CSR_CALSEL); - - /* Init trimming counter */ - /* Medium value */ - trimmingvaluep1 = 16; - trimmingvaluep2 = 16; - delta = 8; - - while (delta != 0) - { - /* Set candidate trimming */ - /* OPAMP_POWERMODE_NORMAL */ - MODIFY_REG(*tmp_opamp1_reg_trimming, OPAMP_OTR_TRIMOFFSETP, (trimmingvaluep1<<OPAMP_INPUT_NONINVERTING)); - MODIFY_REG(*tmp_opamp2_reg_trimming, OPAMP_OTR_TRIMOFFSETP, (trimmingvaluep2<<OPAMP_INPUT_NONINVERTING)); - - /* OFFTRIMmax delay 1 ms as per datasheet (electrical characteristics */ - /* Offset trim time: during calibration, minimum time needed between */ - /* two steps to have 1 mV accuracy */ - HAL_Delay(OPAMP_TRIMMING_DELAY); - - if (READ_BIT(hopamp1->Instance->CSR, OPAMP_CSR_CALOUT) != RESET) - { - /* OPAMP_CSR_CALOUT is HIGH try higher trimming */ - trimmingvaluep1 += delta; - } - else - { - /* OPAMP_CSR_CALOUT is HIGH try lower trimming */ - trimmingvaluep1 -= delta; - } - - if (READ_BIT(hopamp2->Instance->CSR, OPAMP_CSR_CALOUT) != RESET) - { - /* OPAMP_CSR_CALOUT is HIGH try higher trimming */ - trimmingvaluep2 += delta; - } - else - { - /* OPAMP_CSR_CALOUT is LOW try lower trimming */ - trimmingvaluep2 -= delta; - } - /* Divide range by 2 to continue dichotomy sweep */ - delta >>= 1; - } - - /* Still need to check if right calibration is current value or one step below */ - /* Indeed the first value that causes the OUTCAL bit to change from 1 to 0 */ - /* Set candidate trimming */ - MODIFY_REG(*tmp_opamp1_reg_trimming, OPAMP_OTR_TRIMOFFSETP, (trimmingvaluep1<<OPAMP_INPUT_NONINVERTING)); - MODIFY_REG(*tmp_opamp2_reg_trimming, OPAMP_OTR_TRIMOFFSETP, (trimmingvaluep2<<OPAMP_INPUT_NONINVERTING)); - - /* OFFTRIMmax delay 1 ms as per datasheet (electrical characteristics */ - /* Offset trim time: during calibration, minimum time needed between */ - /* two steps to have 1 mV accuracy */ - HAL_Delay(OPAMP_TRIMMING_DELAY); - - if (READ_BIT(hopamp1->Instance->CSR, OPAMP_CSR_CALOUT) != RESET) - { - /* Trimming value is actually one value more */ - trimmingvaluep1++; - MODIFY_REG(*tmp_opamp1_reg_trimming, OPAMP_OTR_TRIMOFFSETP, (trimmingvaluep1<<OPAMP_INPUT_NONINVERTING)); - } - - if (READ_BIT(hopamp2->Instance->CSR, OPAMP_CSR_CALOUT) != RESET) - { - /* Trimming value is actually one value more */ - trimmingvaluep2++; - MODIFY_REG(*tmp_opamp2_reg_trimming, OPAMP_OTR_TRIMOFFSETP, (trimmingvaluep2<<OPAMP_INPUT_NONINVERTING)); - } - - /* Disable the OPAMPs */ - CLEAR_BIT (hopamp1->Instance->CSR, OPAMP_CSR_OPAMPxEN); - CLEAR_BIT (hopamp2->Instance->CSR, OPAMP_CSR_OPAMPxEN); - - /* Disable calibration & set normal mode (operating mode) */ - CLEAR_BIT (hopamp1->Instance->CSR, OPAMP_CSR_CALON); - CLEAR_BIT (hopamp2->Instance->CSR, OPAMP_CSR_CALON); - - /* Self calibration is successful */ - /* Store calibration (user trimming) results in init structure. */ - - /* Set user trimming mode */ - hopamp1->Init.UserTrimming = OPAMP_TRIMMING_USER; - hopamp2->Init.UserTrimming = OPAMP_TRIMMING_USER; - - /* Affect calibration parameters depending on mode normal/low power */ - if (hopamp1->Init.PowerMode != OPAMP_POWERMODE_LOWPOWER) - { - /* Write calibration result N */ - hopamp1->Init.TrimmingValueN = trimmingvaluen1; - /* Write calibration result P */ - hopamp1->Init.TrimmingValueP = trimmingvaluep1; - } - else - { - /* Write calibration result N */ - hopamp1->Init.TrimmingValueNLowPower = trimmingvaluen1; - /* Write calibration result P */ - hopamp1->Init.TrimmingValuePLowPower = trimmingvaluep1; - } - - if (hopamp2->Init.PowerMode != OPAMP_POWERMODE_LOWPOWER) - { - /* Write calibration result N */ - hopamp2->Init.TrimmingValueN = trimmingvaluen2; - /* Write calibration result P */ - hopamp2->Init.TrimmingValueP = trimmingvaluep2; - } - else - { - /* Write calibration result N */ - hopamp2->Init.TrimmingValueNLowPower = trimmingvaluen2; - /* Write calibration result P */ - hopamp2->Init.TrimmingValuePLowPower = trimmingvaluep2; - } - - /* Update OPAMP state */ - hopamp1->State = HAL_OPAMP_STATE_READY; - hopamp2->State = HAL_OPAMP_STATE_READY; - - } - - else - { - /* At least one OPAMP can not be calibrated */ - status = HAL_ERROR; - } - } - return status; -} - -/** - * @} - */ - -/** @defgroup OPAMPEx_Exported_Functions_Group2 Peripheral Control functions - * @brief Peripheral Control functions - * -@verbatim - =============================================================================== - ##### Peripheral Control functions ##### - =============================================================================== - [..] - (+) OPAMP unlock. - -@endverbatim - * @{ - */ - -/** - * @brief Unlock the selected OPAMP configuration. - * @note This function must be called only when OPAMP is in state "locked". - * @param hopamp: OPAMP handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_OPAMPEx_Unlock(OPAMP_HandleTypeDef* hopamp) -{ - HAL_StatusTypeDef status = HAL_OK; - - /* Check the OPAMP handle allocation */ - /* Check if OPAMP locked */ - if((hopamp == NULL) || (hopamp->State == HAL_OPAMP_STATE_RESET) - || (hopamp->State == HAL_OPAMP_STATE_READY) - || (hopamp->State == HAL_OPAMP_STATE_CALIBBUSY) - || (hopamp->State == HAL_OPAMP_STATE_BUSY)) - - { - status = HAL_ERROR; - } - else - { - /* Check the parameter */ - assert_param(IS_OPAMP_ALL_INSTANCE(hopamp->Instance)); - - /* OPAMP state changed to locked */ - hopamp->State = HAL_OPAMP_STATE_BUSY; - } - return status; -} - -/** - * @} - */ - -/** - * @} - */ - -#endif /* HAL_OPAMP_MODULE_ENABLED */ -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ -
--- a/Src/stm32l4xx_hal_pcd.c Thu Nov 12 20:49:49 2015 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,1213 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_pcd.c - * @author MCD Application Team - * @version V1.1.0 - * @date 16-September-2015 - * @brief PCD HAL module driver. - * This file provides firmware functions to manage the following - * functionalities of the USB Peripheral Controller: - * + Initialization and de-initialization functions - * + IO operation functions - * + Peripheral Control functions - * + Peripheral State functions - * - @verbatim - ============================================================================== - ##### How to use this driver ##### - ============================================================================== - [..] - The PCD HAL driver can be used as follows: - - (#) Declare a PCD_HandleTypeDef handle structure, for example: - PCD_HandleTypeDef hpcd; - - (#) Fill parameters of Init structure in HCD handle - - (#) Call HAL_PCD_Init() API to initialize the PCD peripheral (Core, Device core, ...) - - (#) Initialize the PCD low level resources through the HAL_PCD_MspInit() API: - (##) Enable the PCD/USB Low Level interface clock using - (+++) __HAL_RCC_USB_OTG_FS_CLK_ENABLE(); - (##) Initialize the related GPIO clocks - (##) Configure PCD pin-out - (##) Configure PCD NVIC interrupt - - (#)Associate the Upper USB device stack to the HAL PCD Driver: - (##) hpcd.pData = pdev; - - (#)Enable PCD transmission and reception: - (##) HAL_PCD_Start(); - - @endverbatim - ****************************************************************************** - * @attention - * - * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal.h" - -#if defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @defgroup PCD PCD - * @brief PCD HAL module driver - * @{ - */ - -#ifdef HAL_PCD_MODULE_ENABLED - -/* Private types -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private constants ---------------------------------------------------------*/ -/* Private macros ------------------------------------------------------------*/ -/** @defgroup PCD_Private_Macros PCD Private Macros - * @{ - */ -#define PCD_MIN(a, b) (((a) < (b)) ? (a) : (b)) -#define PCD_MAX(a, b) (((a) > (b)) ? (a) : (b)) -/** - * @} - */ - -/* Private functions prototypes ----------------------------------------------*/ -/** @defgroup PCD_Private_Functions PCD Private Functions - * @{ - */ -static HAL_StatusTypeDef PCD_WriteEmptyTxFifo(PCD_HandleTypeDef *hpcd, uint32_t epnum); -/** - * @} - */ - -/* Exported functions --------------------------------------------------------*/ -/** @defgroup PCD_Exported_Functions PCD Exported Functions - * @{ - */ - -/** @defgroup PCD_Exported_Functions_Group1 Initialization and de-initialization functions - * @brief Initialization and Configuration functions - * -@verbatim - =============================================================================== - ##### Initialization and de-initialization functions ##### - =============================================================================== - [..] This section provides functions allowing to: - -@endverbatim - * @{ - */ - -/** - * @brief Initializes the PCD according to the specified - * parameters in the PCD_InitTypeDef and initialize the associated handle. - * @param hpcd: PCD handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd) -{ - uint32_t i = 0; - - /* Check the PCD handle allocation */ - if(hpcd == NULL) - { - return HAL_ERROR; - } - - /* Check the parameters */ - assert_param(IS_PCD_ALL_INSTANCE(hpcd->Instance)); - - if(hpcd->State == HAL_PCD_STATE_RESET) - { - /* Allocate lock resource and initialize it */ - hpcd->Lock = HAL_UNLOCKED; - - /* Init the low level hardware : GPIO, CLOCK, NVIC... */ - HAL_PCD_MspInit(hpcd); - } - - hpcd->State = HAL_PCD_STATE_BUSY; - - /* Disable the Interrupts */ - __HAL_PCD_DISABLE(hpcd); - - /*Init the Core (common init.) */ - USB_CoreInit(hpcd->Instance, hpcd->Init); - - /* Force Device Mode*/ - USB_SetCurrentMode(hpcd->Instance , USB_OTG_DEVICE_MODE); - - /* Init endpoints structures */ - for (i = 0; i < hpcd->Init.dev_endpoints ; i++) - { - /* Init ep structure */ - hpcd->IN_ep[i].is_in = 1; - hpcd->IN_ep[i].num = i; - hpcd->IN_ep[i].tx_fifo_num = i; - /* Control until ep is activated */ - hpcd->IN_ep[i].type = EP_TYPE_CTRL; - hpcd->IN_ep[i].maxpacket = 0; - hpcd->IN_ep[i].xfer_buff = 0; - hpcd->IN_ep[i].xfer_len = 0; - } - - for (i = 0; i < hpcd->Init.dev_endpoints ; i++) - { - hpcd->OUT_ep[i].is_in = 0; - hpcd->OUT_ep[i].num = i; - hpcd->IN_ep[i].tx_fifo_num = i; - /* Control until ep is activated */ - hpcd->OUT_ep[i].type = EP_TYPE_CTRL; - hpcd->OUT_ep[i].maxpacket = 0; - hpcd->OUT_ep[i].xfer_buff = 0; - hpcd->OUT_ep[i].xfer_len = 0; - - hpcd->Instance->DIEPTXF[i] = 0; - } - - /* Init Device */ - USB_DevInit(hpcd->Instance, hpcd->Init); - - hpcd->State= HAL_PCD_STATE_READY; - - /* Activate LPM */ - if (hpcd->Init.lpm_enable ==1) - { - HAL_PCDEx_ActivateLPM(hpcd); - } - /* Activate Battery charging */ - if (hpcd->Init.battery_charging_enable ==1) - { - HAL_PCDEx_ActivateBCD(hpcd); - } - USB_DevDisconnect (hpcd->Instance); - return HAL_OK; -} - -/** - * @brief DeInitializes the PCD peripheral. - * @param hpcd: PCD handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_DeInit(PCD_HandleTypeDef *hpcd) -{ - /* Check the PCD handle allocation */ - if(hpcd == NULL) - { - return HAL_ERROR; - } - - hpcd->State = HAL_PCD_STATE_BUSY; - - /* Stop Device */ - HAL_PCD_Stop(hpcd); - - /* DeInit the low level hardware */ - HAL_PCD_MspDeInit(hpcd); - - hpcd->State = HAL_PCD_STATE_RESET; - - return HAL_OK; -} - -/** - * @brief Initializes the PCD MSP. - * @param hpcd: PCD handle - * @retval None - */ -__weak void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_PCD_MspInit could be implemented in the user file - */ -} - -/** - * @brief DeInitializes PCD MSP. - * @param hpcd: PCD handle - * @retval None - */ -__weak void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_PCD_MspDeInit could be implemented in the user file - */ -} - -/** - * @} - */ - -/** @defgroup PCD_Exported_Functions_Group2 Input and Output operation functions - * @brief Data transfers functions - * -@verbatim - =============================================================================== - ##### IO operation functions ##### - =============================================================================== - [..] - This subsection provides a set of functions allowing to manage the PCD data - transfers. - -@endverbatim - * @{ - */ - -/** - * @brief Start The USB OTG Device. - * @param hpcd: PCD handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd) -{ - __HAL_LOCK(hpcd); - USB_DevConnect (hpcd->Instance); - __HAL_PCD_ENABLE(hpcd); - __HAL_UNLOCK(hpcd); - return HAL_OK; -} - -/** - * @brief Stop The USB OTG Device. - * @param hpcd: PCD handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd) -{ - __HAL_LOCK(hpcd); - __HAL_PCD_DISABLE(hpcd); - USB_StopDevice(hpcd->Instance); - USB_DevDisconnect (hpcd->Instance); - __HAL_UNLOCK(hpcd); - return HAL_OK; -} - -/** - * @brief Handles PCD interrupt request. - * @param hpcd: PCD handle - * @retval HAL status - */ -void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd) -{ - USB_OTG_GlobalTypeDef *USBx = hpcd->Instance; - uint32_t i = 0, ep_intr = 0, epint = 0, epnum = 0; - uint32_t fifoemptymsk = 0, temp = 0; - USB_OTG_EPTypeDef *ep; - - /* ensure that we are in device mode */ - if (USB_GetMode(hpcd->Instance) == USB_OTG_MODE_DEVICE) - { - /* avoid spurious interrupt */ - if(__HAL_PCD_IS_INVALID_INTERRUPT(hpcd)) - { - return; - } - - if(__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_MMIS)) - { - /* incorrect mode, acknowledge the interrupt */ - __HAL_PCD_CLEAR_FLAG(hpcd, USB_OTG_GINTSTS_MMIS); - } - - if(__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_OEPINT)) - { - epnum = 0; - - /* Read in the device interrupt bits */ - ep_intr = USB_ReadDevAllOutEpInterrupt(hpcd->Instance); - - while ( ep_intr ) - { - if (ep_intr & 0x1) - { - epint = USB_ReadDevOutEPInterrupt(hpcd->Instance, epnum); - - if(( epint & USB_OTG_DOEPINT_XFRC) == USB_OTG_DOEPINT_XFRC) - { - CLEAR_OUT_EP_INTR(epnum, USB_OTG_DOEPINT_XFRC); - - if ((( (USBx_OUTEP(0)->DOEPINT & 0x8000) == 0)) ) - { - - if(hpcd->Init.dma_enable == 1) - { - hpcd->OUT_ep[epnum].xfer_count = hpcd->OUT_ep[epnum].maxpacket- (USBx_OUTEP(epnum)->DOEPTSIZ & USB_OTG_DOEPTSIZ_XFRSIZ); - hpcd->OUT_ep[epnum].xfer_buff += hpcd->OUT_ep[epnum].maxpacket; - } - - HAL_PCD_DataOutStageCallback(hpcd, epnum); - - if(hpcd->Init.dma_enable == 1) - { - if((epnum == 0) && (hpcd->OUT_ep[epnum].xfer_len == 0)) - { - /* this is ZLP, so prepare EP0 for next setup */ - USB_EP0_OutStart(hpcd->Instance, 1, (uint8_t *)hpcd->Setup); - } - } - } - /* Clear the SetPktRcvd flag*/ - USBx_OUTEP(0)->DOEPINT |= 0x8020; - } - - if(( epint & USB_OTG_DOEPINT_STUP) == USB_OTG_DOEPINT_STUP) - { - /* Inform the upper layer that a setup packet is available */ - HAL_PCD_SetupStageCallback(hpcd); - CLEAR_OUT_EP_INTR(epnum, USB_OTG_DOEPINT_STUP); - } - - if(( epint & USB_OTG_DOEPINT_OTEPDIS) == USB_OTG_DOEPINT_OTEPDIS) - { - CLEAR_OUT_EP_INTR(epnum, USB_OTG_DOEPINT_OTEPDIS); - } - } - epnum++; - ep_intr >>= 1; - } - } - - if(__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_IEPINT)) - { - /* Read in the device interrupt bits */ - ep_intr = USB_ReadDevAllInEpInterrupt(hpcd->Instance); - - epnum = 0; - - while ( ep_intr ) - { - if (ep_intr & 0x1) /* In ITR */ - { - epint = USB_ReadDevInEPInterrupt(hpcd->Instance, epnum); - - if(( epint & USB_OTG_DIEPINT_XFRC) == USB_OTG_DIEPINT_XFRC) - { - fifoemptymsk = 0x1 << epnum; - USBx_DEVICE->DIEPEMPMSK &= ~fifoemptymsk; - - CLEAR_IN_EP_INTR(epnum, USB_OTG_DIEPINT_XFRC); - - if (hpcd->Init.dma_enable == 1) - { - hpcd->IN_ep[epnum].xfer_buff += hpcd->IN_ep[epnum].maxpacket; - } - - HAL_PCD_DataInStageCallback(hpcd, epnum); - - if (hpcd->Init.dma_enable == 1) - { - /* this is ZLP, so prepare EP0 for next setup */ - if((epnum == 0) && (hpcd->IN_ep[epnum].xfer_len == 0)) - { - /* prepare to rx more setup packets */ - USB_EP0_OutStart(hpcd->Instance, 1, (uint8_t *)hpcd->Setup); - } - } - } - if(( epint & USB_OTG_DIEPINT_TOC) == USB_OTG_DIEPINT_TOC) - { - CLEAR_IN_EP_INTR(epnum, USB_OTG_DIEPINT_TOC); - } - if(( epint & USB_OTG_DIEPINT_ITTXFE) == USB_OTG_DIEPINT_ITTXFE) - { - CLEAR_IN_EP_INTR(epnum, USB_OTG_DIEPINT_ITTXFE); - } - if(( epint & USB_OTG_DIEPINT_INEPNE) == USB_OTG_DIEPINT_INEPNE) - { - CLEAR_IN_EP_INTR(epnum, USB_OTG_DIEPINT_INEPNE); - } - if(( epint & USB_OTG_DIEPINT_EPDISD) == USB_OTG_DIEPINT_EPDISD) - { - CLEAR_IN_EP_INTR(epnum, USB_OTG_DIEPINT_EPDISD); - } - if(( epint & USB_OTG_DIEPINT_TXFE) == USB_OTG_DIEPINT_TXFE) - { - PCD_WriteEmptyTxFifo(hpcd , epnum); - } - } - epnum++; - ep_intr >>= 1; - } - } - - /* Handle Resume Interrupt */ - if(__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_WKUINT)) - { - /* Clear the Remote Wake-up Signaling */ - USBx_DEVICE->DCTL &= ~USB_OTG_DCTL_RWUSIG; - - if(hpcd->LPM_State == LPM_L1) - { - hpcd->LPM_State = LPM_L0; - HAL_PCDEx_LPM_Callback(hpcd, PCD_LPM_L0_ACTIVE); - } - else - { - HAL_PCD_ResumeCallback(hpcd); - } - - __HAL_PCD_CLEAR_FLAG(hpcd, USB_OTG_GINTSTS_WKUINT); - } - - /* Handle Suspend Interrupt */ - if(__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_USBSUSP)) - { - if((USBx_DEVICE->DSTS & USB_OTG_DSTS_SUSPSTS) == USB_OTG_DSTS_SUSPSTS) - { - - HAL_PCD_SuspendCallback(hpcd); - } - __HAL_PCD_CLEAR_FLAG(hpcd, USB_OTG_GINTSTS_USBSUSP); - } - - /* Handle LPM Interrupt */ - if(__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_LPMINT)) - { - __HAL_PCD_CLEAR_FLAG(hpcd, USB_OTG_GINTSTS_LPMINT); - if( hpcd->LPM_State == LPM_L0) - { - hpcd->LPM_State = LPM_L1; - hpcd->BESL = (hpcd->Instance->GLPMCFG & USB_OTG_GLPMCFG_BESL) >>2 ; - HAL_PCDEx_LPM_Callback(hpcd, PCD_LPM_L1_ACTIVE); - } - else - { - HAL_PCD_SuspendCallback(hpcd); - } - } - - /* Handle Reset Interrupt */ - if(__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_USBRST)) - { - USBx_DEVICE->DCTL &= ~USB_OTG_DCTL_RWUSIG; - USB_FlushTxFifo(hpcd->Instance , 0 ); - - for (i = 0; i < hpcd->Init.dev_endpoints ; i++) - { - USBx_INEP(i)->DIEPINT = 0xFF; - USBx_OUTEP(i)->DOEPINT = 0xFF; - } - USBx_DEVICE->DAINT = 0xFFFFFFFF; - USBx_DEVICE->DAINTMSK |= 0x10001; - - if(hpcd->Init.use_dedicated_ep1) - { - USBx_DEVICE->DOUTEP1MSK |= (USB_OTG_DOEPMSK_STUPM | USB_OTG_DOEPMSK_XFRCM | USB_OTG_DOEPMSK_EPDM); - USBx_DEVICE->DINEP1MSK |= (USB_OTG_DIEPMSK_TOM | USB_OTG_DIEPMSK_XFRCM | USB_OTG_DIEPMSK_EPDM); - } - else - { - USBx_DEVICE->DOEPMSK |= (USB_OTG_DOEPMSK_STUPM | USB_OTG_DOEPMSK_XFRCM | USB_OTG_DOEPMSK_EPDM); - USBx_DEVICE->DIEPMSK |= (USB_OTG_DIEPMSK_TOM | USB_OTG_DIEPMSK_XFRCM | USB_OTG_DIEPMSK_EPDM); - } - - /* Set Default Address to 0 */ - USBx_DEVICE->DCFG &= ~USB_OTG_DCFG_DAD; - - /* setup EP0 to receive SETUP packets */ - USB_EP0_OutStart(hpcd->Instance, hpcd->Init.dma_enable, (uint8_t *)hpcd->Setup); - - __HAL_PCD_CLEAR_FLAG(hpcd, USB_OTG_GINTSTS_USBRST); - } - - /* Handle Enumeration done Interrupt */ - if(__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_ENUMDNE)) - { - USB_ActivateSetup(hpcd->Instance); - hpcd->Instance->GUSBCFG &= ~USB_OTG_GUSBCFG_TRDT; - - hpcd->Init.speed = USB_OTG_SPEED_FULL; - hpcd->Init.ep0_mps = USB_OTG_FS_MAX_PACKET_SIZE ; - hpcd->Instance->GUSBCFG |= (uint32_t)((USBD_FS_TRDT_VALUE << 10) & USB_OTG_GUSBCFG_TRDT); - - HAL_PCD_ResetCallback(hpcd); - - __HAL_PCD_CLEAR_FLAG(hpcd, USB_OTG_GINTSTS_ENUMDNE); - } - - /* Handle RxQLevel Interrupt */ - if(__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_RXFLVL)) - { - USB_MASK_INTERRUPT(hpcd->Instance, USB_OTG_GINTSTS_RXFLVL); - - temp = USBx->GRXSTSP; - - ep = &hpcd->OUT_ep[temp & USB_OTG_GRXSTSP_EPNUM]; - - if(((temp & USB_OTG_GRXSTSP_PKTSTS) >> 17) == STS_DATA_UPDT) - { - if((temp & USB_OTG_GRXSTSP_BCNT) != 0) - { - USB_ReadPacket(USBx, ep->xfer_buff, (temp & USB_OTG_GRXSTSP_BCNT) >> 4); - ep->xfer_buff += (temp & USB_OTG_GRXSTSP_BCNT) >> 4; - ep->xfer_count += (temp & USB_OTG_GRXSTSP_BCNT) >> 4; - } - } - else if (((temp & USB_OTG_GRXSTSP_PKTSTS) >> 17) == STS_SETUP_UPDT) - { - USB_ReadPacket(USBx, (uint8_t *)hpcd->Setup, 8); - ep->xfer_count += (temp & USB_OTG_GRXSTSP_BCNT) >> 4; - } - USB_UNMASK_INTERRUPT(hpcd->Instance, USB_OTG_GINTSTS_RXFLVL); - } - - /* Handle SOF Interrupt */ - if(__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_SOF)) - { - HAL_PCD_SOFCallback(hpcd); - __HAL_PCD_CLEAR_FLAG(hpcd, USB_OTG_GINTSTS_SOF); - } - - /* Handle Incomplete ISO IN Interrupt */ - if(__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_IISOIXFR)) - { - HAL_PCD_ISOINIncompleteCallback(hpcd, epnum); - __HAL_PCD_CLEAR_FLAG(hpcd, USB_OTG_GINTSTS_IISOIXFR); - } - - /* Handle Incomplete ISO OUT Interrupt */ - if(__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_PXFR_INCOMPISOOUT)) - { - HAL_PCD_ISOOUTIncompleteCallback(hpcd, epnum); - __HAL_PCD_CLEAR_FLAG(hpcd, USB_OTG_GINTSTS_PXFR_INCOMPISOOUT); - } - - /* Handle Connection event Interrupt */ - if(__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_SRQINT)) - { - HAL_PCD_ConnectCallback(hpcd); - __HAL_PCD_CLEAR_FLAG(hpcd, USB_OTG_GINTSTS_SRQINT); - } - - /* Handle Disconnection event Interrupt */ - if(__HAL_PCD_GET_FLAG(hpcd, USB_OTG_GINTSTS_OTGINT)) - { - temp = hpcd->Instance->GOTGINT; - - if((temp & USB_OTG_GOTGINT_SEDET) == USB_OTG_GOTGINT_SEDET) - { - HAL_PCD_DisconnectCallback(hpcd); - } - hpcd->Instance->GOTGINT |= temp; - } - } -} - -/** - * @brief Data OUT stage callback. - * @param hpcd: PCD handle - * @param epnum: endpoint number - * @retval None - */ - __weak void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_PCD_DataOutStageCallback could be implemented in the user file - */ -} - -/** - * @brief Data IN stage callback. - * @param hpcd: PCD handle - * @param epnum: endpoint number - * @retval None - */ - __weak void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_PCD_DataInStageCallback could be implemented in the user file - */ -} -/** - * @brief Setup stage callback. - * @param hpcd: PCD handle - * @retval None - */ - __weak void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_PCD_SetupStageCallback could be implemented in the user file - */ -} - -/** - * @brief USB Start Of Frame callback. - * @param hpcd: PCD handle - * @retval None - */ - __weak void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_PCD_SOFCallback could be implemented in the user file - */ -} - -/** - * @brief USB Reset callback. - * @param hpcd: PCD handle - * @retval None - */ - __weak void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_PCD_ResetCallback could be implemented in the user file - */ -} - -/** - * @brief Suspend event callback. - * @param hpcd: PCD handle - * @retval None - */ - __weak void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_PCD_SuspendCallback could be implemented in the user file - */ -} - -/** - * @brief Resume event callback. - * @param hpcd: PCD handle - * @retval None - */ - __weak void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_PCD_ResumeCallback could be implemented in the user file - */ -} - -/** - * @brief Incomplete ISO OUT callback. - * @param hpcd: PCD handle - * @param epnum: endpoint number - * @retval None - */ - __weak void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_PCD_ISOOUTIncompleteCallback could be implemented in the user file - */ -} - -/** - * @brief Incomplete ISO IN callback. - * @param hpcd: PCD handle - * @param epnum: endpoint number - * @retval None - */ - __weak void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_PCD_ISOINIncompleteCallback could be implemented in the user file - */ -} - -/** - * @brief Connection event callback. - * @param hpcd: PCD handle - * @retval None - */ - __weak void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_PCD_ConnectCallback could be implemented in the user file - */ -} - -/** - * @brief Disconnection event callback. - * @param hpcd: PCD handle - * @retval None - */ - __weak void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_PCD_DisconnectCallback could be implemented in the user file - */ -} - -/** - * @} - */ - -/** @defgroup PCD_Exported_Functions_Group3 Peripheral Control functions - * @brief management functions - * -@verbatim - =============================================================================== - ##### Peripheral Control functions ##### - =============================================================================== - [..] - This subsection provides a set of functions allowing to control the PCD data - transfers. - -@endverbatim - * @{ - */ - -/** - * @brief Connect the USB device. - * @param hpcd: PCD handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd) -{ - __HAL_LOCK(hpcd); - USB_DevConnect(hpcd->Instance); - __HAL_UNLOCK(hpcd); - return HAL_OK; -} - -/** - * @brief Disconnect the USB device. - * @param hpcd: PCD handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd) -{ - __HAL_LOCK(hpcd); - USB_DevDisconnect(hpcd->Instance); - __HAL_UNLOCK(hpcd); - return HAL_OK; -} - -/** - * @brief Set the USB Device address. - * @param hpcd: PCD handle - * @param address: new device address - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address) -{ - __HAL_LOCK(hpcd); - USB_SetDevAddress(hpcd->Instance, address); - __HAL_UNLOCK(hpcd); - return HAL_OK; -} -/** - * @brief Open and configure an endpoint. - * @param hpcd: PCD handle - * @param ep_addr: endpoint address - * @param ep_mps: endpoint max packet size - * @param ep_type: endpoint type - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type) -{ - HAL_StatusTypeDef ret = HAL_OK; - USB_OTG_EPTypeDef *ep; - - if ((ep_addr & 0x80) == 0x80) - { - ep = &hpcd->IN_ep[ep_addr & 0x7F]; - } - else - { - ep = &hpcd->OUT_ep[ep_addr & 0x7F]; - } - ep->num = ep_addr & 0x7F; - - ep->is_in = (0x80 & ep_addr) != 0; - ep->maxpacket = ep_mps; - ep->type = ep_type; - if (ep->is_in) - { - /* Assign a Tx FIFO */ - ep->tx_fifo_num = ep->num; - } - /* Set initial data PID. */ - if (ep_type == EP_TYPE_BULK ) - { - ep->data_pid_start = 0; - } - - __HAL_LOCK(hpcd); - USB_ActivateEndpoint(hpcd->Instance , ep); - __HAL_UNLOCK(hpcd); - return ret; -} - - -/** - * @brief Deactivate an endpoint. - * @param hpcd: PCD handle - * @param ep_addr: endpoint address - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr) -{ - USB_OTG_EPTypeDef *ep; - - if ((ep_addr & 0x80) == 0x80) - { - ep = &hpcd->IN_ep[ep_addr & 0x7F]; - } - else - { - ep = &hpcd->OUT_ep[ep_addr & 0x7F]; - } - ep->num = ep_addr & 0x7F; - - ep->is_in = (0x80 & ep_addr) != 0; - - __HAL_LOCK(hpcd); - USB_DeactivateEndpoint(hpcd->Instance , ep); - __HAL_UNLOCK(hpcd); - return HAL_OK; -} - - -/** - * @brief Receive an amount of data. - * @param hpcd: PCD handle - * @param ep_addr: endpoint address - * @param pBuf: pointer to the reception buffer - * @param len: amount of data to be received - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len) -{ - USB_OTG_EPTypeDef *ep; - - ep = &hpcd->OUT_ep[ep_addr & 0x7F]; - - /*setup and start the Xfer */ - ep->xfer_buff = pBuf; - ep->xfer_len = len; - ep->xfer_count = 0; - ep->is_in = 0; - ep->num = ep_addr & 0x7F; - - if (hpcd->Init.dma_enable == 1) - { - ep->dma_addr = (uint32_t)pBuf; - } - - __HAL_LOCK(hpcd); - - if ((ep_addr & 0x7F) == 0 ) - { - USB_EP0StartXfer(hpcd->Instance , ep, hpcd->Init.dma_enable); - } - else - { - USB_EPStartXfer(hpcd->Instance , ep, hpcd->Init.dma_enable); - } - __HAL_UNLOCK(hpcd); - - return HAL_OK; -} - -/** - * @brief Get Received Data Size. - * @param hpcd: PCD handle - * @param ep_addr: endpoint address - * @retval Data Size - */ -uint16_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr) -{ - return hpcd->OUT_ep[ep_addr & 0x7F].xfer_count; -} -/** - * @brief Send an amount of data. - * @param hpcd: PCD handle - * @param ep_addr: endpoint address - * @param pBuf: pointer to the transmission buffer - * @param len: amount of data to be sent - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len) -{ - USB_OTG_EPTypeDef *ep; - - ep = &hpcd->IN_ep[ep_addr & 0x7F]; - - /*setup and start the Xfer */ - ep->xfer_buff = pBuf; - ep->xfer_len = len; - ep->xfer_count = 0; - ep->is_in = 1; - ep->num = ep_addr & 0x7F; - - if (hpcd->Init.dma_enable == 1) - { - ep->dma_addr = (uint32_t)pBuf; - } - - __HAL_LOCK(hpcd); - - if ((ep_addr & 0x7F) == 0 ) - { - USB_EP0StartXfer(hpcd->Instance , ep, hpcd->Init.dma_enable); - } - else - { - USB_EPStartXfer(hpcd->Instance , ep, hpcd->Init.dma_enable); - } - - __HAL_UNLOCK(hpcd); - - return HAL_OK; -} - -/** - * @brief Set a STALL condition over an endpoint. - * @param hpcd: PCD handle - * @param ep_addr: endpoint address - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr) -{ - USB_OTG_EPTypeDef *ep; - - if ((0x80 & ep_addr) == 0x80) - { - ep = &hpcd->IN_ep[ep_addr & 0x7F]; - } - else - { - ep = &hpcd->OUT_ep[ep_addr]; - } - - ep->is_stall = 1; - ep->num = ep_addr & 0x7F; - ep->is_in = ((ep_addr & 0x80) == 0x80); - - - __HAL_LOCK(hpcd); - USB_EPSetStall(hpcd->Instance , ep); - if((ep_addr & 0x7F) == 0) - { - USB_EP0_OutStart(hpcd->Instance, hpcd->Init.dma_enable, (uint8_t *)hpcd->Setup); - } - __HAL_UNLOCK(hpcd); - - return HAL_OK; -} - -/** - * @brief Clear a STALL condition over in an endpoint. - * @param hpcd: PCD handle - * @param ep_addr: endpoint address - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr) -{ - USB_OTG_EPTypeDef *ep; - - if ((0x80 & ep_addr) == 0x80) - { - ep = &hpcd->IN_ep[ep_addr & 0x7F]; - } - else - { - ep = &hpcd->OUT_ep[ep_addr]; - } - - ep->is_stall = 0; - ep->num = ep_addr & 0x7F; - ep->is_in = ((ep_addr & 0x80) == 0x80); - - __HAL_LOCK(hpcd); - USB_EPClearStall(hpcd->Instance , ep); - __HAL_UNLOCK(hpcd); - - return HAL_OK; -} - -/** - * @brief Flush an endpoint. - * @param hpcd: PCD handle - * @param ep_addr: endpoint address - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr) -{ - __HAL_LOCK(hpcd); - - if ((ep_addr & 0x80) == 0x80) - { - USB_FlushTxFifo(hpcd->Instance, ep_addr & 0x7F); - } - else - { - USB_FlushRxFifo(hpcd->Instance); - } - - __HAL_UNLOCK(hpcd); - - return HAL_OK; -} - -/** - * @brief Activate remote wakeup signalling. - * @param hpcd: PCD handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd) -{ - USB_OTG_GlobalTypeDef *USBx = hpcd->Instance; - - if((USBx_DEVICE->DSTS & USB_OTG_DSTS_SUSPSTS) == USB_OTG_DSTS_SUSPSTS) - { - /* Activate Remote wakeup signaling */ - USBx_DEVICE->DCTL |= USB_OTG_DCTL_RWUSIG; - } - return HAL_OK; -} - -/** - * @brief De-activate remote wakeup signalling. - * @param hpcd: PCD handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd) -{ - USB_OTG_GlobalTypeDef *USBx = hpcd->Instance; - - /* De-activate Remote wakeup signaling */ - USBx_DEVICE->DCTL &= ~(USB_OTG_DCTL_RWUSIG); - return HAL_OK; -} -/** - * @} - */ - -/** @defgroup PCD_Exported_Functions_Group4 Peripheral State functions - * @brief Peripheral State functions - * -@verbatim - =============================================================================== - ##### Peripheral State functions ##### - =============================================================================== - [..] - This subsection permits to get in run-time the status of the peripheral - and the data flow. - -@endverbatim - * @{ - */ - -/** - * @brief Return the PCD handle state. - * @param hpcd: PCD handle - * @retval HAL state - */ -PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd) -{ - return hpcd->State; -} -/** - * @} - */ - -/** - * @} - */ - -/* Private functions ---------------------------------------------------------*/ -/** @addtogroup PCD_Private_Functions - * @{ - */ - -/** - * @brief Check FIFO for the next packet to be loaded. - * @param hpcd: PCD handle - * @param epnum: endpoint number - * @retval HAL status - */ -static HAL_StatusTypeDef PCD_WriteEmptyTxFifo(PCD_HandleTypeDef *hpcd, uint32_t epnum) -{ - USB_OTG_GlobalTypeDef *USBx = hpcd->Instance; - USB_OTG_EPTypeDef *ep; - int32_t len = 0; - uint32_t len32b; - uint32_t fifoemptymsk = 0; - - ep = &hpcd->IN_ep[epnum]; - len = ep->xfer_len - ep->xfer_count; - - if (len > ep->maxpacket) - { - len = ep->maxpacket; - } - - - len32b = (len + 3) / 4; - - while ( (USBx_INEP(epnum)->DTXFSTS & USB_OTG_DTXFSTS_INEPTFSAV) > len32b && - ep->xfer_count < ep->xfer_len && - ep->xfer_len != 0) - { - /* Write the FIFO */ - len = ep->xfer_len - ep->xfer_count; - - if (len > ep->maxpacket) - { - len = ep->maxpacket; - } - len32b = (len + 3) / 4; - - USB_WritePacket(USBx, ep->xfer_buff, epnum, len, hpcd->Init.dma_enable); - - ep->xfer_buff += len; - ep->xfer_count += len; - } - - if(len <= 0) - { - fifoemptymsk = 0x1 << epnum; - USBx_DEVICE->DIEPEMPMSK &= ~fifoemptymsk; - - } - - return HAL_OK; -} - -/** - * @} - */ - -#endif /* HAL_PCD_MODULE_ENABLED */ -/** - * @} - */ - -/** - * @} - */ - -#endif /* STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ -
--- a/Src/stm32l4xx_hal_pcd_ex.c Thu Nov 12 20:49:49 2015 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,310 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_pcd_ex.c - * @author MCD Application Team - * @version V1.1.0 - * @date 16-September-2015 - * @brief PCD Extended HAL module driver. - * This file provides firmware functions to manage the following - * functionalities of the USB Peripheral Controller: - * + Extended features functions - * - ****************************************************************************** - * @attention - * - * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal.h" - -#if defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @defgroup PCDEx PCDEx - * @brief PCD Extended HAL module driver - * @{ - */ -#ifdef HAL_PCD_MODULE_ENABLED - -/* Private types -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private constants ---------------------------------------------------------*/ -/* Private macros ------------------------------------------------------------*/ -/* Private functions ---------------------------------------------------------*/ -/* Exported functions --------------------------------------------------------*/ - -/** @defgroup PCDEx_Exported_Functions PCDEx Exported Functions - * @{ - */ - -/** @defgroup PCDEx_Exported_Functions_Group1 Peripheral Control functions - * @brief PCDEx control functions - * -@verbatim - =============================================================================== - ##### Extended features functions ##### - =============================================================================== - [..] This section provides functions allowing to: - (+) Update FIFO configuration - -@endverbatim - * @{ - */ - -/** - * @brief Set Tx FIFO - * @param hpcd: PCD handle - * @param fifo: The number of Tx fifo - * @param size: Fifo size - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCDEx_SetTxFiFo(PCD_HandleTypeDef *hpcd, uint8_t fifo, uint16_t size) -{ - uint8_t i = 0; - uint32_t Tx_Offset = 0; - - /* TXn min size = 16 words. (n : Transmit FIFO index) - When a TxFIFO is not used, the Configuration should be as follows: - case 1 : n > m and Txn is not used (n,m : Transmit FIFO indexes) - --> Txm can use the space allocated for Txn. - case2 : n < m and Txn is not used (n,m : Transmit FIFO indexes) - --> Txn should be configured with the minimum space of 16 words - The FIFO is used optimally when used TxFIFOs are allocated in the top - of the FIFO.Ex: use EP1 and EP2 as IN instead of EP1 and EP3 as IN ones. - When DMA is used 3n * FIFO locations should be reserved for internal DMA registers */ - - Tx_Offset = hpcd->Instance->GRXFSIZ; - - if(fifo == 0) - { - hpcd->Instance->DIEPTXF0_HNPTXFSIZ = (size << 16) | Tx_Offset; - } - else - { - Tx_Offset += (hpcd->Instance->DIEPTXF0_HNPTXFSIZ) >> 16; - for (i = 0; i < (fifo - 1); i++) - { - Tx_Offset += (hpcd->Instance->DIEPTXF[i] >> 16); - } - - /* Multiply Tx_Size by 2 to get higher performance */ - hpcd->Instance->DIEPTXF[fifo - 1] = (size << 16) | Tx_Offset; - } - - return HAL_OK; -} - -/** - * @brief Set Rx FIFO - * @param hpcd: PCD handle - * @param size: Size of Rx fifo - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCDEx_SetRxFiFo(PCD_HandleTypeDef *hpcd, uint16_t size) -{ - hpcd->Instance->GRXFSIZ = size; - - return HAL_OK; -} - -/** - * @brief Activate LPM feature. - * @param hpcd: PCD handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCDEx_ActivateLPM(PCD_HandleTypeDef *hpcd) -{ - USB_OTG_GlobalTypeDef *USBx = hpcd->Instance; - - hpcd->lpm_active = ENABLE; - hpcd->LPM_State = LPM_L0; - USBx->GINTMSK |= USB_OTG_GINTMSK_LPMINTM; - USBx->GLPMCFG |= (USB_OTG_GLPMCFG_LPMEN | USB_OTG_GLPMCFG_LPMACK | USB_OTG_GLPMCFG_ENBESL); - - return HAL_OK; -} - -/** - * @brief Deactivate LPM feature. - * @param hpcd: PCD handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCDEx_DeActivateLPM(PCD_HandleTypeDef *hpcd) -{ - USB_OTG_GlobalTypeDef *USBx = hpcd->Instance; - - hpcd->lpm_active = DISABLE; - USBx->GINTMSK &= ~USB_OTG_GINTMSK_LPMINTM; - USBx->GLPMCFG &= ~(USB_OTG_GLPMCFG_LPMEN | USB_OTG_GLPMCFG_LPMACK | USB_OTG_GLPMCFG_ENBESL); - - return HAL_OK; -} - -/** - * @brief Handle BatteryCharging Process. - * @param hpcd: PCD handle - * @retval HAL status - */ -void HAL_PCDEx_BCD_VBUSDetect(PCD_HandleTypeDef *hpcd) -{ - USB_OTG_GlobalTypeDef *USBx = hpcd->Instance; - uint32_t tickstart = HAL_GetTick(); - - /* Start BCD When device is connected */ - if (USBx_DEVICE->DCTL & USB_OTG_DCTL_SDIS) - { - /* Enable DCD : Data Contact Detect */ - USBx->GCCFG |= USB_OTG_GCCFG_DCDEN; - - /* Wait Detect flag or a timeout is happen*/ - while ((USBx->GCCFG & USB_OTG_GCCFG_DCDET) == 0) - { - /* Check for the Timeout */ - if((HAL_GetTick() - tickstart ) > 1000) - { - HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_ERROR); - return; - } - } - - /* Right response got */ - HAL_Delay(100); - - /* Check Detect flag*/ - if (USBx->GCCFG & USB_OTG_GCCFG_DCDET) - { - HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_CONTACT_DETECTION); - } - - /*Primary detection: checks if connected to Standard Downstream Port - (without charging capability) */ - USBx->GCCFG &=~ USB_OTG_GCCFG_DCDEN; - USBx->GCCFG |= USB_OTG_GCCFG_PDEN; - HAL_Delay(100); - - if (!(USBx->GCCFG & USB_OTG_GCCFG_PDET)) - { - /* Case of Standard Downstream Port */ - HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_STD_DOWNSTREAM_PORT); - } - else - { - /* start secondary detection to check connection to Charging Downstream - Port or Dedicated Charging Port */ - USBx->GCCFG &=~ USB_OTG_GCCFG_PDEN; - USBx->GCCFG |= USB_OTG_GCCFG_SDEN; - HAL_Delay(100); - - if ((USBx->GCCFG) & USB_OTG_GCCFG_SDET) - { - /* case Dedicated Charging Port */ - HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_DEDICATED_CHARGING_PORT); - } - else - { - /* case Charging Downstream Port */ - HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_CHARGING_DOWNSTREAM_PORT); - } - } - /* Battery Charging capability discovery finished */ - HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_DISCOVERY_COMPLETED); - } -} - -/** - * @brief Activate BatteryCharging feature. - * @param hpcd: PCD handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCDEx_ActivateBCD(PCD_HandleTypeDef *hpcd) -{ - USB_OTG_GlobalTypeDef *USBx = hpcd->Instance; - - hpcd->battery_charging_active = ENABLE; - USBx->GCCFG |= (USB_OTG_GCCFG_BCDEN); - - return HAL_OK; -} - -/** - * @brief Deactivate BatteryCharging feature. - * @param hpcd: PCD handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_PCDEx_DeActivateBCD(PCD_HandleTypeDef *hpcd) -{ - USB_OTG_GlobalTypeDef *USBx = hpcd->Instance; - hpcd->battery_charging_active = DISABLE; - USBx->GCCFG &= ~(USB_OTG_GCCFG_BCDEN); - return HAL_OK; -} - -/** - * @brief Send LPM message to user layer callback. - * @param hpcd: PCD handle - * @param msg: LPM message - * @retval HAL status - */ -__weak void HAL_PCDEx_LPM_Callback(PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef msg) -{ -} - -/** - * @brief Send BatteryCharging message to user layer callback. - * @param hpcd: PCD handle - * @param msg: LPM message - * @retval HAL status - */ -__weak void HAL_PCDEx_BCD_Callback(PCD_HandleTypeDef *hpcd, PCD_BCD_MsgTypeDef msg) -{ -} - -/** - * @} - */ - -/** - * @} - */ - -#endif /* HAL_PCD_MODULE_ENABLED */ -/** - * @} - */ - -/** - * @} - */ - -#endif /* STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ -
--- a/Src/stm32l4xx_hal_rng.c Thu Nov 12 20:49:49 2015 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,507 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_rng.c - * @author MCD Application Team - * @version V1.1.0 - * @date 16-September-2015 - * @brief RNG HAL module driver. - * This file provides firmware functions to manage the following - * functionalities of the Random Number Generator (RNG) peripheral: - * + Initialization/de-initialization functions - * + Peripheral Control functions - * + Peripheral State functions - * - @verbatim - ============================================================================== - ##### How to use this driver ##### - ============================================================================== - [..] - The RNG HAL driver can be used as follows: - - (#) Enable the RNG controller clock using __HAL_RCC_RNG_CLK_ENABLE() macro - in HAL_RNG_MspInit(). - (#) Activate the RNG peripheral using HAL_RNG_Init() function. - (#) Wait until the 32-bit Random Number Generator contains a valid - random data using (polling/interrupt) mode. - (#) Get the 32 bit random number using HAL_RNG_GenerateRandomNumber() function. - - @endverbatim - ****************************************************************************** - * @attention - * - * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @defgroup RNG RNG - * @brief RNG HAL module driver. - * @{ - */ - -#ifdef HAL_RNG_MODULE_ENABLED - - - -/* Private types -------------------------------------------------------------*/ -/* Private defines -----------------------------------------------------------*/ -/** @defgroup RNG_Private_Constants RNG_Private_Constants - * @{ - */ -#define RNG_TIMEOUT_VALUE 2 -/** - * @} - */ - -/* Private macros ------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ -/* Private functions ---------------------------------------------------------*/ -/* Exported functions --------------------------------------------------------*/ - -/** @addtogroup RNG_Exported_Functions - * @{ - */ - -/** @addtogroup RNG_Exported_Functions_Group1 - * @brief Initialization and de-initialization functions - * -@verbatim - =============================================================================== - ##### Initialization and de-initialization functions ##### - =============================================================================== - [..] This section provides functions allowing to: - (+) Initialize the RNG according to the specified parameters - in the RNG_InitTypeDef and create the associated handle - (+) DeInitialize the RNG peripheral - (+) Initialize the RNG MSP (MCU Specific Package) - (+) DeInitialize the RNG MSP - -@endverbatim - * @{ - */ - -/** - * @brief Initialize the RNG peripheral and initialize the associated handle. - * @param hrng: pointer to a RNG_HandleTypeDef structure. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RNG_Init(RNG_HandleTypeDef *hrng) -{ - /* Check the RNG handle allocation */ - if(hrng == NULL) - { - return HAL_ERROR; - } - - assert_param(IS_RNG_ALL_INSTANCE(hrng->Instance)); - - __HAL_LOCK(hrng); - - if(hrng->State == HAL_RNG_STATE_RESET) - { - /* Allocate lock resource and initialize it */ - hrng->Lock = HAL_UNLOCKED; - - /* Init the low level hardware */ - HAL_RNG_MspInit(hrng); - } - - /* Change RNG peripheral state */ - hrng->State = HAL_RNG_STATE_BUSY; - - /* Enable the RNG Peripheral */ - __HAL_RNG_ENABLE(hrng); - - /* Initialize the RNG state */ - hrng->State = HAL_RNG_STATE_READY; - - __HAL_UNLOCK(hrng); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief DeInitialize the RNG peripheral. - * @param hrng: pointer to a RNG_HandleTypeDef structure. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RNG_DeInit(RNG_HandleTypeDef *hrng) -{ - /* Check the RNG handle allocation */ - if(hrng == NULL) - { - return HAL_ERROR; - } - /* Disable the RNG Peripheral */ - CLEAR_BIT(hrng->Instance->CR, RNG_CR_IE | RNG_CR_RNGEN); - - /* Clear RNG interrupt status flags */ - CLEAR_BIT(hrng->Instance->SR, RNG_SR_CEIS | RNG_SR_SEIS); - - /* DeInit the low level hardware */ - HAL_RNG_MspDeInit(hrng); - - /* Update the RNG state */ - hrng->State = HAL_RNG_STATE_RESET; - - /* Release Lock */ - __HAL_UNLOCK(hrng); - - /* Return the function status */ - return HAL_OK; -} - -/** - * @brief Initialize the RNG MSP. - * @param hrng: pointer to a RNG_HandleTypeDef structure. - * @retval None - */ -__weak void HAL_RNG_MspInit(RNG_HandleTypeDef *hrng) -{ - /* NOTE : This function should not be modified. When the callback is needed, - function HAL_RNG_MspInit must be implemented in the user file. - */ -} - -/** - * @brief DeInitialize the RNG MSP. - * @param hrng: pointer to a RNG_HandleTypeDef structure. - * @retval None - */ -__weak void HAL_RNG_MspDeInit(RNG_HandleTypeDef *hrng) -{ - /* NOTE : This function should not be modified. When the callback is needed, - function HAL_RNG_MspDeInit must be implemented in the user file. - */ -} - -/** - * @} - */ - -/** @addtogroup RNG_Exported_Functions_Group2 - * @brief Management functions. - * -@verbatim - =============================================================================== - ##### Peripheral Control functions ##### - =============================================================================== - [..] This section provides functions allowing to: - (+) Get the 32 bit Random number - (+) Get the 32 bit Random number with interrupt enabled - (+) Handle RNG interrupt request - -@endverbatim - * @{ - */ - -/** - * @brief Generate a 32-bit random number. - * @note Each time the random number data is read the RNG_FLAG_DRDY flag - * is automatically cleared. - * @param hrng: pointer to a RNG_HandleTypeDef structure. - * @param random32bit: pointer to generated random number variable if successful. - * @retval HAL status - */ - -HAL_StatusTypeDef HAL_RNG_GenerateRandomNumber(RNG_HandleTypeDef *hrng, uint32_t *random32bit) -{ - uint32_t tickstart = 0; - HAL_StatusTypeDef status = HAL_OK; - - /* Process Locked */ - __HAL_LOCK(hrng); - - /* Check RNS peripheral state */ - if(hrng->State == HAL_RNG_STATE_READY) - { - /* Change RNG peripheral state */ - hrng->State = HAL_RNG_STATE_BUSY; - - /* Get tick */ - tickstart = HAL_GetTick(); - - /* Check if data register contains valid random data */ - while(__HAL_RNG_GET_FLAG(hrng, RNG_FLAG_DRDY) == RESET) - { - if((HAL_GetTick() - tickstart ) > RNG_TIMEOUT_VALUE) - { - hrng->State = HAL_RNG_STATE_ERROR; - - /* Process Unlocked */ - __HAL_UNLOCK(hrng); - - return HAL_TIMEOUT; - } - } - - /* Get a 32bit Random number */ - hrng->RandomNumber = hrng->Instance->DR; - *random32bit = hrng->RandomNumber; - - hrng->State = HAL_RNG_STATE_READY; - } - else - { - status = HAL_ERROR; - } - - /* Process Unlocked */ - __HAL_UNLOCK(hrng); - - return status; -} - -/** - * @brief Generate a 32-bit random number in interrupt mode. - * @param hrng: pointer to a RNG_HandleTypeDef structure. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_RNG_GenerateRandomNumber_IT(RNG_HandleTypeDef *hrng) -{ - HAL_StatusTypeDef status = HAL_OK; - - /* Process Locked */ - __HAL_LOCK(hrng); - - /* Check RNG peripheral state */ - if(hrng->State == HAL_RNG_STATE_READY) - { - /* Change RNG peripheral state */ - hrng->State = HAL_RNG_STATE_BUSY; - - /* Process Unlocked */ - __HAL_UNLOCK(hrng); - - /* Enable the RNG Interrupts: Data Ready, Clock error, Seed error */ - __HAL_RNG_ENABLE_IT(hrng); - } - else - { - /* Process Unlocked */ - __HAL_UNLOCK(hrng); - - status = HAL_ERROR; - } - - return status; -} - -/** - * @brief Handle RNG interrupt request. - * @note In the case of a clock error, the RNG is no more able to generate - * random numbers because the PLL48CLK clock is not correct. User has - * to check that the clock controller is correctly configured to provide - * the RNG clock and clear the CEIS bit using __HAL_RNG_CLEAR_IT(). - * The clock error has no impact on the previously generated - * random numbers, and the RNG_DR register contents can be used. - * @note In the case of a seed error, the generation of random numbers is - * interrupted as long as the SECS bit is '1'. If a number is - * available in the RNG_DR register, it must not be used because it may - * not have enough entropy. In this case, it is recommended to clear the - * SEIS bit using __HAL_RNG_CLEAR_IT(), then disable and enable - * the RNG peripheral to reinitialize and restart the RNG. - * @note User-written HAL_RNG_ErrorCallback() API is called once whether SEIS - * or CEIS are set. - * @param hrng: pointer to a RNG_HandleTypeDef structure. - * @retval None - - */ -void HAL_RNG_IRQHandler(RNG_HandleTypeDef *hrng) -{ - /* RNG clock error interrupt occurred */ - if((__HAL_RNG_GET_IT(hrng, RNG_IT_CEI) != RESET) || (__HAL_RNG_GET_IT(hrng, RNG_IT_SEI) != RESET)) - { - /* Change RNG peripheral state */ - hrng->State = HAL_RNG_STATE_ERROR; - - HAL_RNG_ErrorCallback(hrng); - - /* Clear the clock error flag */ - __HAL_RNG_CLEAR_IT(hrng, RNG_IT_CEI|RNG_IT_SEI); - - } - - /* Check RNG data ready interrupt occurred */ - if(__HAL_RNG_GET_IT(hrng, RNG_IT_DRDY) != RESET) - { - /* Generate random number once, so disable the IT */ - __HAL_RNG_DISABLE_IT(hrng); - - /* Get the 32bit Random number (DRDY flag automatically cleared) */ - hrng->RandomNumber = hrng->Instance->DR; - - if(hrng->State != HAL_RNG_STATE_ERROR) - { - /* Change RNG peripheral state */ - hrng->State = HAL_RNG_STATE_READY; - - /* Data Ready callback */ - HAL_RNG_ReadyDataCallback(hrng, hrng->RandomNumber); - } - } -} - -/** - * @brief Return generated random number in polling mode (Obsolete). - * @note Use HAL_RNG_GenerateRandomNumber() API instead. - * @param hrng: pointer to a RNG_HandleTypeDef structure that contains - * the configuration information for RNG. - * @retval random value - */ -uint32_t HAL_RNG_GetRandomNumber(RNG_HandleTypeDef *hrng) -{ - if(HAL_RNG_GenerateRandomNumber(hrng, &(hrng->RandomNumber)) == HAL_OK) - { - return hrng->RandomNumber; - } - else - { - return 0; - } -} - - -/** - * @brief Return a 32-bit random number with interrupt enabled (Obsolete). - * @note Use HAL_RNG_GenerateRandomNumber_IT() API instead. - * @param hrng: RNG handle - * @retval 32-bit random number - */ -uint32_t HAL_RNG_GetRandomNumber_IT(RNG_HandleTypeDef *hrng) -{ - uint32_t random32bit = 0; - - /* Process locked */ - __HAL_LOCK(hrng); - - /* Change RNG peripheral state */ - hrng->State = HAL_RNG_STATE_BUSY; - - /* Get a 32bit Random number */ - random32bit = hrng->Instance->DR; - - /* Enable the RNG Interrupts: Data Ready, Clock error, Seed error */ - __HAL_RNG_ENABLE_IT(hrng); - - /* Return the 32 bit random number */ - return random32bit; -} - - - -/** - * @brief Read latest generated random number. - * @param hrng: pointer to a RNG_HandleTypeDef structure. - * @retval random value - */ -uint32_t HAL_RNG_ReadLastRandomNumber(RNG_HandleTypeDef *hrng) -{ - return(hrng->RandomNumber); -} - -/** - * @brief Data Ready callback in non-blocking mode. - * @param hrng: pointer to a RNG_HandleTypeDef structure. - * @param random32bit: generated random value - * @retval None - */ -__weak void HAL_RNG_ReadyDataCallback(RNG_HandleTypeDef *hrng, uint32_t random32bit) -{ - /* NOTE : This function should not be modified. When the callback is needed, - function HAL_RNG_ReadyDataCallback must be implemented in the user file. - */ -} - -/** - * @brief RNG error callback. - * @param hrng: pointer to a RNG_HandleTypeDef structure. - * @retval None - */ -__weak void HAL_RNG_ErrorCallback(RNG_HandleTypeDef *hrng) -{ - /* NOTE : This function should not be modified. When the callback is needed, - function HAL_RNG_ErrorCallback must be implemented in the user file. - */ -} - -/** - * @} - */ - -/** @addtogroup RNG_Exported_Functions_Group3 - * @brief Peripheral State functions. - * -@verbatim - =============================================================================== - ##### Peripheral State functions ##### - =============================================================================== - [..] - This subsection permits to get in run-time the status of the peripheral. - -@endverbatim - * @{ - */ - -/** - * @brief Return the RNG handle state. - * @param hrng: pointer to a RNG_HandleTypeDef structure. - * @retval HAL state - */ -HAL_RNG_StateTypeDef HAL_RNG_GetState(RNG_HandleTypeDef *hrng) -{ - /* Return RNG handle state */ - return hrng->State; -} - -/** - * @} - */ - -/** - * @} - */ - - -#endif /* HAL_RNG_MODULE_ENABLED */ -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ -
--- a/Src/stm32l4xx_hal_sd.c Thu Nov 12 20:49:49 2015 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,3389 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_sd.c - * @author MCD Application Team - * @version V1.1.0 - * @date 16-September-2015 - * @brief SD card HAL module driver. - * This file provides firmware functions to manage the following - * functionalities of the Secure Digital (SD) peripheral: - * + Initialization and de-initialization functions - * + IO operation functions - * + Peripheral Control functions - * + Peripheral State functions - * - @verbatim - ============================================================================== - ##### How to use this driver ##### - ============================================================================== - [..] - This driver implements a high level communication layer for read and write from/to - this memory. The needed STM32 hardware resources (SDMMC1 and GPIO) are performed by - the user in HAL_SD_MspInit() function (MSP layer). - Basically, the MSP layer configuration should be the same as we provide in the - examples. - You can easily tailor this configuration according to hardware resources. - - [..] - This driver is a generic layered driver for SDMMC memories which uses the HAL - SDMMC driver functions to interface with SD and uSD cards devices. - It is used as follows: - - (#)Initialize the SDMMC1 low level resources by implementing the HAL_SD_MspInit() API: - (##) Call the function HAL_RCCEx_PeriphCLKConfig with RCC_PERIPHCLK_SDMMC1 for - PeriphClockSelection and select SDMMC1 clock source (MSI, main PLL or PLLSAI1) - (##) Enable the SDMMC1 interface clock using __HAL_RCC_SDMMC1_CLK_ENABLE(); - (##) SDMMC pins configuration for SD card - (+++) Enable the clock for the SDMMC GPIOs using the functions __HAL_RCC_GPIOx_CLK_ENABLE(); - (+++) Configure these SDMMC pins as alternate function pull-up using HAL_GPIO_Init() - and according to your pin assignment; - (##) DMA Configuration if you need to use DMA process (HAL_SD_ReadBlocks_DMA() - and HAL_SD_WriteBlocks_DMA() APIs). - (+++) Enable the DMAx interface clock using __HAL_RCC_DMAx_CLK_ENABLE(); - (+++) Configure the DMA using the function HAL_DMA_Init() with predeclared and filled. - (##) NVIC configuration if you need to use interrupt process when using DMA transfer. - (+++) Configure the SDMMC and DMA interrupt priorities using functions - HAL_NVIC_SetPriority(); DMA priority is superior to SDMMC's priority - (+++) Enable the NVIC DMA and SDMMC IRQs using function HAL_NVIC_EnableIRQ() - (+++) SDMMC interrupts are managed using the macros __HAL_SD_SDMMC_ENABLE_IT() - and __HAL_SD_SDMMC_DISABLE_IT() inside the communication process. - (+++) SDMMC interrupts pending bits are managed using the macros __HAL_SD_SDMMC_GET_IT() - and __HAL_SD_SDMMC_CLEAR_IT() - (#) At this stage, you can perform SD read/write/erase operations after SD card initialization - - - *** SD Card Initialization and configuration *** - ================================================ - [..] - To initialize the SD Card, use the HAL_SD_Init() function. It Initializes - the SD Card and put it into StandBy State (Ready for data transfer). - This function provide the following operations: - - (#) Apply the SD Card initialization process at 400KHz and check the SD Card - type (Standard Capacity or High Capacity). You can change or adapt this - frequency by adjusting the "ClockDiv" field. - The SD Card frequency (SDMMC_CK) is computed as follows: - (++) - - SDMMC_CK = SDMMCCLK / (ClockDiv + 2) - - -@@- In initialization mode and according to the SD Card standard, - make sure that the SDMMC_CK frequency doesn't exceed 400KHz. - - (#) Get the SD CID and CSD data. All these information are managed by the SDCardInfo - structure. This structure provide also ready computed SD Card capacity - and Block size. - - -@- These information are stored in SD handle structure in case of future use. - - (#) Configure the SD Card Data transfer frequency. By Default, the card transfer - frequency is set to 24MHz. You can change or adapt this frequency by adjusting - the "ClockDiv" field. - In transfer mode and according to the SD Card standard, make sure that the - SDMMC_CK frequency doesn't exceed 25MHz and 50MHz in High-speed mode switch. - To be able to use a frequency higher than 24MHz, you should use the SDMMC - peripheral in bypass mode. Refer to the corresponding reference manual - for more details. - - (#) Select the corresponding SD Card according to the address read with the step 2. - - (#) Configure the SD Card in wide bus mode: 4-bits data. - - *** SD Card Read operation *** - ============================== - [..] - (+) You can read from SD card in polling mode by using function HAL_SD_ReadBlocks(). - This function support only 512-bytes block length (the block size should be - chosen as 512 bytes). - You can choose either one block read operation or multiple block read operation - by adjusting the "NumberOfBlocks" parameter. - - (+) You can read from SD card in DMA mode by using function HAL_SD_ReadBlocks_DMA(). - This function support only 512-bytes block length (the block size should be - chosen as 512 bytes). - You can choose either one block read operation or multiple block read operation - by adjusting the "NumberOfBlocks" parameter. - After this, you have to call the function HAL_SD_CheckReadOperation(), to insure - that the read transfer is done correctly in both DMA and SD sides. - - *** SD Card Write operation *** - =============================== - [..] - (+) You can write to SD card in polling mode by using function HAL_SD_WriteBlocks(). - This function support only 512-bytes block length (the block size should be - chosen as 512 bytes). - You can choose either one block read operation or multiple block read operation - by adjusting the "NumberOfBlocks" parameter. - - (+) You can write to SD card in DMA mode by using function HAL_SD_WriteBlocks_DMA(). - This function support only 512-bytes block length (the block size should be - chosen as 512 byte). - You can choose either one block read operation or multiple block read operation - by adjusting the "NumberOfBlocks" parameter. - After this, you have to call the function HAL_SD_CheckWriteOperation(), to insure - that the write transfer is done correctly in both DMA and SD sides. - - *** SD card status *** - ====================== - [..] - (+) At any time, you can check the SD Card status and get the SD card state - by using the HAL_SD_GetStatus() function. This function checks first if the - SD card is still connected and then get the internal SD Card transfer state. - (+) You can also get the SD card SD Status register by using the HAL_SD_SendSDStatus() - function. - - *** SD HAL driver macros list *** - ================================== - [..] - Below the list of most used macros in SD HAL driver. - - (+) __HAL_SD_SDMMC_ENABLE : Enable the SD device - (+) __HAL_SD_SDMMC_DISABLE : Disable the SD device - (+) __HAL_SD_SDMMC_DMA_ENABLE: Enable the SDMMC DMA transfer - (+) __HAL_SD_SDMMC_DMA_DISABLE: Disable the SDMMC DMA transfer - (+) __HAL_SD_SDMMC_ENABLE_IT: Enable the SD device interrupt - (+) __HAL_SD_SDMMC_DISABLE_IT: Disable the SD device interrupt - (+) __HAL_SD_SDMMC_GET_FLAG:Check whether the specified SD flag is set or not - (+) __HAL_SD_SDMMC_CLEAR_FLAG: Clear the SD's pending flags - [..] - (@) You can refer to the SD HAL driver header file for more useful macros - - @endverbatim - ****************************************************************************** - * @attention - * - * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @addtogroup SD - * @{ - */ - -#ifdef HAL_SD_MODULE_ENABLED - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -/** @addtogroup SD_Private_Defines - * @{ - */ -/** - * @brief SDMMC Data block size - */ -#define DATA_BLOCK_SIZE ((uint32_t)(9 << 4)) -/** - * @brief SDMMC Static flags, Timeout, FIFO Address - */ -#define SDMMC_STATIC_FLAGS ((uint32_t)(SDMMC_FLAG_CCRCFAIL | SDMMC_FLAG_DCRCFAIL | SDMMC_FLAG_CTIMEOUT |\ - SDMMC_FLAG_DTIMEOUT | SDMMC_FLAG_TXUNDERR | SDMMC_FLAG_RXOVERR |\ - SDMMC_FLAG_CMDREND | SDMMC_FLAG_CMDSENT | SDMMC_FLAG_DATAEND |\ - SDMMC_FLAG_DBCKEND)) - -#define SDMMC_CMD0TIMEOUT ((uint32_t)0x00010000) - -/** - * @brief Mask for errors Card Status R1 (OCR Register) - */ -#define SD_OCR_ADDR_OUT_OF_RANGE ((uint32_t)0x80000000) -#define SD_OCR_ADDR_MISALIGNED ((uint32_t)0x40000000) -#define SD_OCR_BLOCK_LEN_ERR ((uint32_t)0x20000000) -#define SD_OCR_ERASE_SEQ_ERR ((uint32_t)0x10000000) -#define SD_OCR_BAD_ERASE_PARAM ((uint32_t)0x08000000) -#define SD_OCR_WRITE_PROT_VIOLATION ((uint32_t)0x04000000) -#define SD_OCR_LOCK_UNLOCK_FAILED ((uint32_t)0x01000000) -#define SD_OCR_COM_CRC_FAILED ((uint32_t)0x00800000) -#define SD_OCR_ILLEGAL_CMD ((uint32_t)0x00400000) -#define SD_OCR_CARD_ECC_FAILED ((uint32_t)0x00200000) -#define SD_OCR_CC_ERROR ((uint32_t)0x00100000) -#define SD_OCR_GENERAL_UNKNOWN_ERROR ((uint32_t)0x00080000) -#define SD_OCR_STREAM_READ_UNDERRUN ((uint32_t)0x00040000) -#define SD_OCR_STREAM_WRITE_OVERRUN ((uint32_t)0x00020000) -#define SD_OCR_CID_CSD_OVERWRITE ((uint32_t)0x00010000) -#define SD_OCR_WP_ERASE_SKIP ((uint32_t)0x00008000) -#define SD_OCR_CARD_ECC_DISABLED ((uint32_t)0x00004000) -#define SD_OCR_ERASE_RESET ((uint32_t)0x00002000) -#define SD_OCR_AKE_SEQ_ERROR ((uint32_t)0x00000008) -#define SD_OCR_ERRORBITS ((uint32_t)0xFDFFE008) - -/** - * @brief Masks for R6 Response - */ -#define SD_R6_GENERAL_UNKNOWN_ERROR ((uint32_t)0x00002000) -#define SD_R6_ILLEGAL_CMD ((uint32_t)0x00004000) -#define SD_R6_COM_CRC_FAILED ((uint32_t)0x00008000) - -#define SD_VOLTAGE_WINDOW_SD ((uint32_t)0x80100000) -#define SD_HIGH_CAPACITY ((uint32_t)0x40000000) -#define SD_STD_CAPACITY ((uint32_t)0x00000000) -#define SD_CHECK_PATTERN ((uint32_t)0x000001AA) - -#define SD_MAX_VOLT_TRIAL ((uint32_t)0x0000FFFF) -#define SD_ALLZERO ((uint32_t)0x00000000) - -#define SD_WIDE_BUS_SUPPORT ((uint32_t)0x00040000) -#define SD_SINGLE_BUS_SUPPORT ((uint32_t)0x00010000) -#define SD_CARD_LOCKED ((uint32_t)0x02000000) - -#define SD_DATATIMEOUT ((uint32_t)0xFFFFFFFF) -#define SD_0TO7BITS ((uint32_t)0x000000FF) -#define SD_8TO15BITS ((uint32_t)0x0000FF00) -#define SD_16TO23BITS ((uint32_t)0x00FF0000) -#define SD_24TO31BITS ((uint32_t)0xFF000000) -#define SD_MAX_DATA_LENGTH ((uint32_t)0x01FFFFFF) - -#define SD_HALFFIFO ((uint32_t)0x00000008) -#define SD_HALFFIFOBYTES ((uint32_t)0x00000020) - -/** - * @brief Command Class Supported - */ -#define SD_CCCC_LOCK_UNLOCK ((uint32_t)0x00000080) -#define SD_CCCC_WRITE_PROT ((uint32_t)0x00000040) -#define SD_CCCC_ERASE ((uint32_t)0x00000020) - -/** - * @brief Following commands are SD Card Specific commands. - * SDMMC_APP_CMD should be sent before sending these commands. - */ -#define SD_SDMMC_SEND_IF_COND ((uint32_t)SD_CMD_HS_SEND_EXT_CSD) -/** - * @} - */ - -/* Private macro -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ -/** @addtogroup SD_Private_Functions_Prototypes - * @{ - */ -static HAL_SD_ErrorTypedef SD_Initialize_Cards(SD_HandleTypeDef *hsd); -static HAL_SD_ErrorTypedef SD_Select_Deselect(SD_HandleTypeDef *hsd, uint64_t addr); -static HAL_SD_ErrorTypedef SD_PowerON(SD_HandleTypeDef *hsd); -static HAL_SD_ErrorTypedef SD_PowerOFF(SD_HandleTypeDef *hsd); -static HAL_SD_ErrorTypedef SD_SendStatus(SD_HandleTypeDef *hsd, uint32_t *pCardStatus); -static HAL_SD_CardStateTypedef SD_GetState(SD_HandleTypeDef *hsd); -static HAL_SD_ErrorTypedef SD_IsCardProgramming(SD_HandleTypeDef *hsd, uint8_t *pStatus); -static HAL_SD_ErrorTypedef SD_CmdError(SD_HandleTypeDef *hsd); -static HAL_SD_ErrorTypedef SD_CmdResp1Error(SD_HandleTypeDef *hsd, uint8_t SD_CMD); -static HAL_SD_ErrorTypedef SD_CmdResp7Error(SD_HandleTypeDef *hsd); -static HAL_SD_ErrorTypedef SD_CmdResp3Error(SD_HandleTypeDef *hsd); -static HAL_SD_ErrorTypedef SD_CmdResp2Error(SD_HandleTypeDef *hsd); -static HAL_SD_ErrorTypedef SD_CmdResp6Error(SD_HandleTypeDef *hsd, uint8_t SD_CMD, uint16_t *pRCA); -static HAL_SD_ErrorTypedef SD_WideBus_Enable(SD_HandleTypeDef *hsd); -static HAL_SD_ErrorTypedef SD_WideBus_Disable(SD_HandleTypeDef *hsd); -static HAL_SD_ErrorTypedef SD_FindSCR(SD_HandleTypeDef *hsd, uint32_t *pSCR); -static void SD_DMA_RxCplt(DMA_HandleTypeDef *hdma); -static void SD_DMA_RxError(DMA_HandleTypeDef *hdma); -static void SD_DMA_TxCplt(DMA_HandleTypeDef *hdma); -static void SD_DMA_TxError(DMA_HandleTypeDef *hdma); -/** - * @} - */ -/* Exported functions --------------------------------------------------------*/ -/** @addtogroup SD_Exported_Functions - * @{ - */ - -/** @addtogroup SD_Exported_Functions_Group1 - * @brief Initialization and de-initialization functions - * -@verbatim - ============================================================================== - ##### Initialization and de-initialization functions ##### - ============================================================================== - [..] - This section provides functions allowing to initialize/de-initialize the SD - card device to be ready for use. - - -@endverbatim - * @{ - */ - -/** - * @brief Initializes the SD card according to the specified parameters in the - SD_HandleTypeDef and initialize the associated handle. - * @param hsd: SD handle - * @param SDCardInfo: HAL_SD_CardInfoTypedef structure for SD card information - * @retval HAL SD error state - */ -HAL_SD_ErrorTypedef HAL_SD_Init(SD_HandleTypeDef *hsd, HAL_SD_CardInfoTypedef *SDCardInfo) -{ - __IO HAL_SD_ErrorTypedef errorstate = SD_OK; - SD_InitTypeDef tmpinit; - - /* Initialize the low level hardware (MSP) */ - HAL_SD_MspInit(hsd); - - /* Default SDMMC peripheral configuration for SD card initialization */ - tmpinit.ClockEdge = SDMMC_CLOCK_EDGE_RISING; - tmpinit.ClockBypass = SDMMC_CLOCK_BYPASS_DISABLE; - tmpinit.ClockPowerSave = SDMMC_CLOCK_POWER_SAVE_DISABLE; - tmpinit.BusWide = SDMMC_BUS_WIDE_1B; - tmpinit.HardwareFlowControl = SDMMC_HARDWARE_FLOW_CONTROL_DISABLE; - tmpinit.ClockDiv = SDMMC_INIT_CLK_DIV; - - /* Initialize SDMMC peripheral interface with default configuration */ - SDMMC_Init(hsd->Instance, tmpinit); - - /* Identify card operating voltage */ - errorstate = SD_PowerON(hsd); - - if(errorstate != SD_OK) - { - return errorstate; - } - - /* Initialize the present SDMMC card(s) and put them in idle state */ - errorstate = SD_Initialize_Cards(hsd); - - if (errorstate != SD_OK) - { - return errorstate; - } - - /* Read CSD/CID MSD registers */ - errorstate = HAL_SD_Get_CardInfo(hsd, SDCardInfo); - - if (errorstate == SD_OK) - { - /* Select the Card */ - errorstate = SD_Select_Deselect(hsd, (uint32_t)(((uint32_t)SDCardInfo->RCA) << 16)); - } - - /* Configure SDMMC peripheral interface */ - SDMMC_Init(hsd->Instance, hsd->Init); - - return errorstate; -} - -/** - * @brief De-Initializes the SD card. - * @param hsd: SD handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SD_DeInit(SD_HandleTypeDef *hsd) -{ - - /* Set SD power state to off */ - SD_PowerOFF(hsd); - - /* De-Initialize the MSP layer */ - HAL_SD_MspDeInit(hsd); - - return HAL_OK; -} - - -/** - * @brief Initializes the SD MSP. - * @param hsd: SD handle - * @retval None - */ -__weak void HAL_SD_MspInit(SD_HandleTypeDef *hsd) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_SD_MspInit could be implemented in the user file - */ -} - -/** - * @brief De-Initialize SD MSP. - * @param hsd: SD handle - * @retval None - */ -__weak void HAL_SD_MspDeInit(SD_HandleTypeDef *hsd) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_SD_MspDeInit could be implemented in the user file - */ -} - -/** - * @} - */ - -/** @addtogroup SD_Exported_Functions_Group2 - * @brief Data transfer functions - * -@verbatim - ============================================================================== - ##### IO operation functions ##### - ============================================================================== - [..] - This subsection provides a set of functions allowing to manage the data - transfer from/to SD card. - -@endverbatim - * @{ - */ - -/** - * @brief Reads block(s) from a specified address in a card. The Data transfer - * is managed by polling mode. - * @param hsd: SD handle - * @param pReadBuffer: pointer to the buffer that will contain the received data - * @param ReadAddr: Address from where data is to be read - * @param BlockSize: SD card Data block size - * @note BlockSize must be 512 bytes. - * @param NumberOfBlocks: Number of SD blocks to read - * @retval SD Card error state - */ -HAL_SD_ErrorTypedef HAL_SD_ReadBlocks(SD_HandleTypeDef *hsd, uint32_t *pReadBuffer, uint64_t ReadAddr, uint32_t BlockSize, uint32_t NumberOfBlocks) -{ - SDMMC_CmdInitTypeDef sdmmc_cmdinitstructure; - SDMMC_DataInitTypeDef sdmmc_datainitstructure; - HAL_SD_ErrorTypedef errorstate = SD_OK; - uint32_t count = 0, *tempbuff = (uint32_t *)pReadBuffer; - - /* Initialize data control register */ - hsd->Instance->DCTRL = 0; - - if (hsd->CardType == HIGH_CAPACITY_SD_CARD) - { - BlockSize = 512; - ReadAddr /= 512; - } - - /* Set Block Size for Card */ - sdmmc_cmdinitstructure.Argument = (uint32_t) BlockSize; - sdmmc_cmdinitstructure.CmdIndex = SD_CMD_SET_BLOCKLEN; - sdmmc_cmdinitstructure.Response = SDMMC_RESPONSE_SHORT; - sdmmc_cmdinitstructure.WaitForInterrupt = SDMMC_WAIT_NO; - sdmmc_cmdinitstructure.CPSM = SDMMC_CPSM_ENABLE; - SDMMC_SendCommand(hsd->Instance, &sdmmc_cmdinitstructure); - - /* Check for error conditions */ - errorstate = SD_CmdResp1Error(hsd, SD_CMD_SET_BLOCKLEN); - - if (errorstate != SD_OK) - { - return errorstate; - } - - /* Configure the SD DPSM (Data Path State Machine) */ - sdmmc_datainitstructure.DataTimeOut = SD_DATATIMEOUT; - sdmmc_datainitstructure.DataLength = NumberOfBlocks * BlockSize; - sdmmc_datainitstructure.DataBlockSize = DATA_BLOCK_SIZE; - sdmmc_datainitstructure.TransferDir = SDMMC_TRANSFER_DIR_TO_SDMMC; - sdmmc_datainitstructure.TransferMode = SDMMC_TRANSFER_MODE_BLOCK; - sdmmc_datainitstructure.DPSM = SDMMC_DPSM_ENABLE; - SDMMC_DataConfig(hsd->Instance, &sdmmc_datainitstructure); - - if(NumberOfBlocks > 1) - { - /* Send CMD18 READ_MULT_BLOCK with argument data address */ - sdmmc_cmdinitstructure.CmdIndex = SD_CMD_READ_MULT_BLOCK; - } - else - { - /* Send CMD17 READ_SINGLE_BLOCK */ - sdmmc_cmdinitstructure.CmdIndex = SD_CMD_READ_SINGLE_BLOCK; - } - - sdmmc_cmdinitstructure.Argument = (uint32_t)ReadAddr; - SDMMC_SendCommand(hsd->Instance, &sdmmc_cmdinitstructure); - - /* Read block(s) in polling mode */ - if(NumberOfBlocks > 1) - { - /* Check for error conditions */ - errorstate = SD_CmdResp1Error(hsd, SD_CMD_READ_MULT_BLOCK); - - if (errorstate != SD_OK) - { - return errorstate; - } - - /* Poll on SDMMC flags */ - while(!__HAL_SD_SDMMC_GET_FLAG(hsd, SDMMC_FLAG_RXOVERR | SDMMC_FLAG_DCRCFAIL | SDMMC_FLAG_DTIMEOUT | SDMMC_FLAG_DATAEND)) - { - if (__HAL_SD_SDMMC_GET_FLAG(hsd, SDMMC_FLAG_RXFIFOHF)) - { - /* Read data from SDMMC Rx FIFO */ - for (count = 0; count < 8; count++) - { - *(tempbuff + count) = SDMMC_ReadFIFO(hsd->Instance); - } - - tempbuff += 8; - } - } - } - else - { - /* Check for error conditions */ - errorstate = SD_CmdResp1Error(hsd, SD_CMD_READ_SINGLE_BLOCK); - - if (errorstate != SD_OK) - { - return errorstate; - } - - /* In case of single block transfer, no need of stop transfer at all */ - while(!__HAL_SD_SDMMC_GET_FLAG(hsd, SDMMC_FLAG_RXOVERR | SDMMC_FLAG_DCRCFAIL | SDMMC_FLAG_DTIMEOUT | SDMMC_FLAG_DBCKEND)) - { - if (__HAL_SD_SDMMC_GET_FLAG(hsd, SDMMC_FLAG_RXFIFOHF)) - { - /* Read data from SDMMC Rx FIFO */ - for (count = 0; count < 8; count++) - { - *(tempbuff + count) = SDMMC_ReadFIFO(hsd->Instance); - } - - tempbuff += 8; - } - } - } - - /* Send stop transmission command in case of multiblock read */ - if (__HAL_SD_SDMMC_GET_FLAG(hsd, SDMMC_FLAG_DATAEND) && (NumberOfBlocks > 1)) - { - if ((hsd->CardType == STD_CAPACITY_SD_CARD_V1_1) ||\ - (hsd->CardType == STD_CAPACITY_SD_CARD_V2_0) ||\ - (hsd->CardType == HIGH_CAPACITY_SD_CARD)) - { - /* Send stop transmission command */ - errorstate = HAL_SD_StopTransfer(hsd); - } - } - - /* Get error state */ - if (__HAL_SD_SDMMC_GET_FLAG(hsd, SDMMC_FLAG_DTIMEOUT)) - { - __HAL_SD_SDMMC_CLEAR_FLAG(hsd, SDMMC_FLAG_DTIMEOUT); - - errorstate = SD_DATA_TIMEOUT; - - return errorstate; - } - else if (__HAL_SD_SDMMC_GET_FLAG(hsd, SDMMC_FLAG_DCRCFAIL)) - { - __HAL_SD_SDMMC_CLEAR_FLAG(hsd, SDMMC_FLAG_DCRCFAIL); - - errorstate = SD_DATA_CRC_FAIL; - - return errorstate; - } - else if (__HAL_SD_SDMMC_GET_FLAG(hsd, SDMMC_FLAG_RXOVERR)) - { - __HAL_SD_SDMMC_CLEAR_FLAG(hsd, SDMMC_FLAG_RXOVERR); - - errorstate = SD_RX_OVERRUN; - - return errorstate; - } - else - { - /* No error flag set */ - } - - count = SD_DATATIMEOUT; - - /* Empty FIFO if there is still any data */ - while ((__HAL_SD_SDMMC_GET_FLAG(hsd, SDMMC_FLAG_RXDAVL)) && (count > 0)) - { - *tempbuff = SDMMC_ReadFIFO(hsd->Instance); - tempbuff++; - count--; - } - - /* Clear all the static flags */ - __HAL_SD_SDMMC_CLEAR_FLAG(hsd, SDMMC_STATIC_FLAGS); - - return errorstate; -} - -/** - * @brief Allows to write block(s) to a specified address in a card. The Data - * transfer is managed by polling mode. - * @param hsd: SD handle - * @param pWriteBuffer: pointer to the buffer that will contain the data to transmit - * @param WriteAddr: Address from where data is to be written - * @param BlockSize: SD card Data block size - * @note BlockSize must be 512 bytes. - * @param NumberOfBlocks: Number of SD blocks to write - * @retval SD Card error state - */ -HAL_SD_ErrorTypedef HAL_SD_WriteBlocks(SD_HandleTypeDef *hsd, uint32_t *pWriteBuffer, uint64_t WriteAddr, uint32_t BlockSize, uint32_t NumberOfBlocks) -{ - SDMMC_CmdInitTypeDef sdmmc_cmdinitstructure; - SDMMC_DataInitTypeDef sdmmc_datainitstructure; - HAL_SD_ErrorTypedef errorstate = SD_OK; - uint32_t totalnumberofbytes = 0, bytestransferred = 0, count = 0, restwords = 0; - uint32_t *tempbuff = (uint32_t *)pWriteBuffer; - uint8_t cardstate = 0; - - /* Initialize data control register */ - hsd->Instance->DCTRL = 0; - - if (hsd->CardType == HIGH_CAPACITY_SD_CARD) - { - BlockSize = 512; - WriteAddr /= 512; - } - - /* Set Block Size for Card */ - sdmmc_cmdinitstructure.Argument = (uint32_t)BlockSize; - sdmmc_cmdinitstructure.CmdIndex = SD_CMD_SET_BLOCKLEN; - sdmmc_cmdinitstructure.Response = SDMMC_RESPONSE_SHORT; - sdmmc_cmdinitstructure.WaitForInterrupt = SDMMC_WAIT_NO; - sdmmc_cmdinitstructure.CPSM = SDMMC_CPSM_ENABLE; - SDMMC_SendCommand(hsd->Instance, &sdmmc_cmdinitstructure); - - /* Check for error conditions */ - errorstate = SD_CmdResp1Error(hsd, SD_CMD_SET_BLOCKLEN); - - if (errorstate != SD_OK) - { - return errorstate; - } - - if(NumberOfBlocks > 1) - { - /* Send CMD25 WRITE_MULT_BLOCK with argument data address */ - sdmmc_cmdinitstructure.CmdIndex = SD_CMD_WRITE_MULT_BLOCK; - } - else - { - /* Send CMD24 WRITE_SINGLE_BLOCK */ - sdmmc_cmdinitstructure.CmdIndex = SD_CMD_WRITE_SINGLE_BLOCK; - } - - sdmmc_cmdinitstructure.Argument = (uint32_t)WriteAddr; - SDMMC_SendCommand(hsd->Instance, &sdmmc_cmdinitstructure); - - /* Check for error conditions */ - if(NumberOfBlocks > 1) - { - errorstate = SD_CmdResp1Error(hsd, SD_CMD_WRITE_MULT_BLOCK); - } - else - { - errorstate = SD_CmdResp1Error(hsd, SD_CMD_WRITE_SINGLE_BLOCK); - } - - if (errorstate != SD_OK) - { - return errorstate; - } - - /* Set total number of bytes to write */ - totalnumberofbytes = NumberOfBlocks * BlockSize; - - /* Configure the SD DPSM (Data Path State Machine) */ - sdmmc_datainitstructure.DataTimeOut = SD_DATATIMEOUT; - sdmmc_datainitstructure.DataLength = NumberOfBlocks * BlockSize; - sdmmc_datainitstructure.DataBlockSize = SDMMC_DATABLOCK_SIZE_512B; - sdmmc_datainitstructure.TransferDir = SDMMC_TRANSFER_DIR_TO_CARD; - sdmmc_datainitstructure.TransferMode = SDMMC_TRANSFER_MODE_BLOCK; - sdmmc_datainitstructure.DPSM = SDMMC_DPSM_ENABLE; - SDMMC_DataConfig(hsd->Instance, &sdmmc_datainitstructure); - - /* Write block(s) in polling mode */ - if(NumberOfBlocks > 1) - { - while(!__HAL_SD_SDMMC_GET_FLAG(hsd, SDMMC_FLAG_TXUNDERR | SDMMC_FLAG_DCRCFAIL | SDMMC_FLAG_DTIMEOUT | SDMMC_FLAG_DATAEND)) - { - if (__HAL_SD_SDMMC_GET_FLAG(hsd, SDMMC_FLAG_TXFIFOHE)) - { - if ((totalnumberofbytes - bytestransferred) < 32) - { - restwords = ((totalnumberofbytes - bytestransferred) % 4 == 0) ? ((totalnumberofbytes - bytestransferred) / 4) : (( totalnumberofbytes - bytestransferred) / 4 + 1); - - /* Write data to SDMMC Tx FIFO */ - for (count = 0; count < restwords; count++) - { - SDMMC_WriteFIFO(hsd->Instance, tempbuff); - tempbuff++; - bytestransferred += 4; - } - } - else - { - /* Write data to SDMMC Tx FIFO */ - for (count = 0; count < 8; count++) - { - SDMMC_WriteFIFO(hsd->Instance, (tempbuff + count)); - } - - tempbuff += 8; - bytestransferred += 32; - } - } - } - } - else - { - /* In case of single data block transfer no need of stop command at all */ - while(!__HAL_SD_SDMMC_GET_FLAG(hsd, SDMMC_FLAG_TXUNDERR | SDMMC_FLAG_DCRCFAIL | SDMMC_FLAG_DTIMEOUT | SDMMC_FLAG_DBCKEND)) - { - if (__HAL_SD_SDMMC_GET_FLAG(hsd, SDMMC_FLAG_TXFIFOHE)) - { - if ((totalnumberofbytes - bytestransferred) < 32) - { - restwords = ((totalnumberofbytes - bytestransferred) % 4 == 0) ? ((totalnumberofbytes - bytestransferred) / 4) : (( totalnumberofbytes - bytestransferred) / 4 + 1); - - /* Write data to SDMMC Tx FIFO */ - for (count = 0; count < restwords; count++) - { - SDMMC_WriteFIFO(hsd->Instance, tempbuff); - tempbuff++; - bytestransferred += 4; - } - } - else - { - /* Write data to SDMMC Tx FIFO */ - for (count = 0; count < 8; count++) - { - SDMMC_WriteFIFO(hsd->Instance, (tempbuff + count)); - } - - tempbuff += 8; - bytestransferred += 32; - } - } - } - } - - /* Send stop transmission command in case of multiblock write */ - if (__HAL_SD_SDMMC_GET_FLAG(hsd, SDMMC_FLAG_DATAEND) && (NumberOfBlocks > 1)) - { - if ((hsd->CardType == STD_CAPACITY_SD_CARD_V1_1) || (hsd->CardType == STD_CAPACITY_SD_CARD_V2_0) ||\ - (hsd->CardType == HIGH_CAPACITY_SD_CARD)) - { - /* Send stop transmission command */ - errorstate = HAL_SD_StopTransfer(hsd); - } - } - - /* Get error state */ - if (__HAL_SD_SDMMC_GET_FLAG(hsd, SDMMC_FLAG_DTIMEOUT)) - { - __HAL_SD_SDMMC_CLEAR_FLAG(hsd, SDMMC_FLAG_DTIMEOUT); - - errorstate = SD_DATA_TIMEOUT; - - return errorstate; - } - else if (__HAL_SD_SDMMC_GET_FLAG(hsd, SDMMC_FLAG_DCRCFAIL)) - { - __HAL_SD_SDMMC_CLEAR_FLAG(hsd, SDMMC_FLAG_DCRCFAIL); - - errorstate = SD_DATA_CRC_FAIL; - - return errorstate; - } - else if (__HAL_SD_SDMMC_GET_FLAG(hsd, SDMMC_FLAG_TXUNDERR)) - { - __HAL_SD_SDMMC_CLEAR_FLAG(hsd, SDMMC_FLAG_TXUNDERR); - - errorstate = SD_TX_UNDERRUN; - - return errorstate; - } - else - { - /* No error flag set */ - } - - /* Clear all the static flags */ - __HAL_SD_SDMMC_CLEAR_FLAG(hsd, SDMMC_STATIC_FLAGS); - - /* Wait till the card is in programming state */ - errorstate = SD_IsCardProgramming(hsd, &cardstate); - - while ((errorstate == SD_OK) && ((cardstate == SD_CARD_PROGRAMMING) || (cardstate == SD_CARD_RECEIVING))) - { - errorstate = SD_IsCardProgramming(hsd, &cardstate); - } - - return errorstate; -} - -/** - * @brief Reads block(s) from a specified address in a card. The Data transfer - * is managed by DMA mode. - * @note This API should be followed by the function HAL_SD_CheckReadOperation() - * to check the completion of the read process - * @param hsd: SD handle - * @param pReadBuffer: Pointer to the buffer that will contain the received data - * @param ReadAddr: Address from where data is to be read - * @param BlockSize: SD card Data block size - * @note BlockSize must be 512 bytes. - * @param NumberOfBlocks: Number of blocks to read. - * @retval SD Card error state - */ -HAL_SD_ErrorTypedef HAL_SD_ReadBlocks_DMA(SD_HandleTypeDef *hsd, uint32_t *pReadBuffer, uint64_t ReadAddr, uint32_t BlockSize, uint32_t NumberOfBlocks) -{ - SDMMC_CmdInitTypeDef sdmmc_cmdinitstructure; - SDMMC_DataInitTypeDef sdmmc_datainitstructure; - HAL_SD_ErrorTypedef errorstate = SD_OK; - - /* Initialize data control register */ - hsd->Instance->DCTRL = 0; - - /* Initialize handle flags */ - hsd->SdTransferCplt = 0; - hsd->DmaTransferCplt = 0; - hsd->SdTransferErr = SD_OK; - - /* Initialize SD Read operation */ - if(NumberOfBlocks > 1) - { - hsd->SdOperation = SD_READ_MULTIPLE_BLOCK; - } - else - { - hsd->SdOperation = SD_READ_SINGLE_BLOCK; - } - - /* Enable transfer interrupts */ - __HAL_SD_SDMMC_ENABLE_IT(hsd, (SDMMC_IT_DCRCFAIL |\ - SDMMC_IT_DTIMEOUT |\ - SDMMC_IT_DATAEND |\ - SDMMC_IT_RXOVERR)); - - /* Enable SDMMC DMA transfer */ - __HAL_SD_SDMMC_DMA_ENABLE(hsd); - - /* Configure DMA user callbacks */ - hsd->hdmarx->XferCpltCallback = SD_DMA_RxCplt; - hsd->hdmarx->XferErrorCallback = SD_DMA_RxError; - - /* Change DMA direction Periph to Memory */ - hsd->hdmarx->Init.Direction = DMA_PERIPH_TO_MEMORY; - hsd->hdmarx->Instance->CCR &= ~DMA_MEMORY_TO_PERIPH; - - /* Enable the DMA Channel */ - HAL_DMA_Start_IT(hsd->hdmarx, (uint32_t)&hsd->Instance->FIFO, (uint32_t)pReadBuffer, (uint32_t)(BlockSize * NumberOfBlocks)/4); - - if (hsd->CardType == HIGH_CAPACITY_SD_CARD) - { - BlockSize = 512; - ReadAddr /= 512; - } - - /* Set Block Size for Card */ - sdmmc_cmdinitstructure.Argument = (uint32_t)BlockSize; - sdmmc_cmdinitstructure.CmdIndex = SD_CMD_SET_BLOCKLEN; - sdmmc_cmdinitstructure.Response = SDMMC_RESPONSE_SHORT; - sdmmc_cmdinitstructure.WaitForInterrupt = SDMMC_WAIT_NO; - sdmmc_cmdinitstructure.CPSM = SDMMC_CPSM_ENABLE; - SDMMC_SendCommand(hsd->Instance, &sdmmc_cmdinitstructure); - - /* Check for error conditions */ - errorstate = SD_CmdResp1Error(hsd, SD_CMD_SET_BLOCKLEN); - - if (errorstate != SD_OK) - { - return errorstate; - } - - /* Configure the SD DPSM (Data Path State Machine) */ - sdmmc_datainitstructure.DataTimeOut = SD_DATATIMEOUT; - sdmmc_datainitstructure.DataLength = BlockSize * NumberOfBlocks; - sdmmc_datainitstructure.DataBlockSize = SDMMC_DATABLOCK_SIZE_512B; - sdmmc_datainitstructure.TransferDir = SDMMC_TRANSFER_DIR_TO_SDMMC; - sdmmc_datainitstructure.TransferMode = SDMMC_TRANSFER_MODE_BLOCK; - sdmmc_datainitstructure.DPSM = SDMMC_DPSM_ENABLE; - SDMMC_DataConfig(hsd->Instance, &sdmmc_datainitstructure); - - /* Check number of blocks command */ - if(NumberOfBlocks > 1) - { - /* Send CMD18 READ_MULT_BLOCK with argument data address */ - sdmmc_cmdinitstructure.CmdIndex = SD_CMD_READ_MULT_BLOCK; - } - else - { - /* Send CMD17 READ_SINGLE_BLOCK */ - sdmmc_cmdinitstructure.CmdIndex = SD_CMD_READ_SINGLE_BLOCK; - } - - sdmmc_cmdinitstructure.Argument = (uint32_t)ReadAddr; - SDMMC_SendCommand(hsd->Instance, &sdmmc_cmdinitstructure); - - /* Check for error conditions */ - if(NumberOfBlocks > 1) - { - errorstate = SD_CmdResp1Error(hsd, SD_CMD_READ_MULT_BLOCK); - } - else - { - errorstate = SD_CmdResp1Error(hsd, SD_CMD_READ_SINGLE_BLOCK); - } - - /* Update the SD transfer error in SD handle */ - hsd->SdTransferErr = errorstate; - - return errorstate; -} - - -/** - * @brief Writes block(s) to a specified address in a card. The Data transfer - * is managed by DMA mode. - * @note This API should be followed by the function HAL_SD_CheckWriteOperation() - * to check the completion of the write process (by SD current status polling). - * @param hsd: SD handle - * @param pWriteBuffer: pointer to the buffer that will contain the data to transmit - * @param WriteAddr: Address from where data is to be read - * @param BlockSize: the SD card Data block size - * @note BlockSize must be 512 bytes. - * @param NumberOfBlocks: Number of blocks to write - * @retval SD Card error state - */ -HAL_SD_ErrorTypedef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, uint32_t *pWriteBuffer, uint64_t WriteAddr, uint32_t BlockSize, uint32_t NumberOfBlocks) -{ - SDMMC_CmdInitTypeDef sdmmc_cmdinitstructure; - SDMMC_DataInitTypeDef sdmmc_datainitstructure; - HAL_SD_ErrorTypedef errorstate = SD_OK; - - /* Initialize data control register */ - hsd->Instance->DCTRL = 0; - - /* Initialize handle flags */ - hsd->SdTransferCplt = 0; - hsd->DmaTransferCplt = 0; - hsd->SdTransferErr = SD_OK; - - /* Initialize SD Write operation */ - if(NumberOfBlocks > 1) - { - hsd->SdOperation = SD_WRITE_MULTIPLE_BLOCK; - } - else - { - hsd->SdOperation = SD_WRITE_SINGLE_BLOCK; - } - - /* Enable transfer interrupts */ - __HAL_SD_SDMMC_ENABLE_IT(hsd, (SDMMC_IT_DCRCFAIL |\ - SDMMC_IT_DTIMEOUT |\ - SDMMC_IT_DATAEND |\ - SDMMC_IT_TXUNDERR)); - - /* Configure DMA user callbacks */ - hsd->hdmatx->XferCpltCallback = SD_DMA_TxCplt; - hsd->hdmatx->XferErrorCallback = SD_DMA_TxError; - - /* Change DMA direction Memory to Periph */ - hsd->hdmatx->Init.Direction = DMA_MEMORY_TO_PERIPH; - hsd->hdmatx->Instance->CCR |= DMA_MEMORY_TO_PERIPH; - - /* Enable the DMA Channel */ - HAL_DMA_Start_IT(hsd->hdmatx, (uint32_t)pWriteBuffer, (uint32_t)&hsd->Instance->FIFO, (uint32_t)(BlockSize * NumberOfBlocks)/4); - - /* Enable SDMMC DMA transfer */ - __HAL_SD_SDMMC_DMA_ENABLE(hsd); - - if (hsd->CardType == HIGH_CAPACITY_SD_CARD) - { - BlockSize = 512; - WriteAddr /= 512; - } - - /* Set Block Size for Card */ - sdmmc_cmdinitstructure.Argument = (uint32_t)BlockSize; - sdmmc_cmdinitstructure.CmdIndex = SD_CMD_SET_BLOCKLEN; - sdmmc_cmdinitstructure.Response = SDMMC_RESPONSE_SHORT; - sdmmc_cmdinitstructure.WaitForInterrupt = SDMMC_WAIT_NO; - sdmmc_cmdinitstructure.CPSM = SDMMC_CPSM_ENABLE; - SDMMC_SendCommand(hsd->Instance, &sdmmc_cmdinitstructure); - - /* Check for error conditions */ - errorstate = SD_CmdResp1Error(hsd, SD_CMD_SET_BLOCKLEN); - - if (errorstate != SD_OK) - { - return errorstate; - } - - /* Check number of blocks command */ - if(NumberOfBlocks <= 1) - { - /* Send CMD24 WRITE_SINGLE_BLOCK */ - sdmmc_cmdinitstructure.CmdIndex = SD_CMD_WRITE_SINGLE_BLOCK; - } - else - { - /* Send CMD25 WRITE_MULT_BLOCK with argument data address */ - sdmmc_cmdinitstructure.CmdIndex = SD_CMD_WRITE_MULT_BLOCK; - } - - sdmmc_cmdinitstructure.Argument = (uint32_t)WriteAddr; - SDMMC_SendCommand(hsd->Instance, &sdmmc_cmdinitstructure); - - /* Check for error conditions */ - if(NumberOfBlocks > 1) - { - errorstate = SD_CmdResp1Error(hsd, SD_CMD_WRITE_MULT_BLOCK); - } - else - { - errorstate = SD_CmdResp1Error(hsd, SD_CMD_WRITE_SINGLE_BLOCK); - } - - if (errorstate != SD_OK) - { - return errorstate; - } - - /* Configure the SD DPSM (Data Path State Machine) */ - sdmmc_datainitstructure.DataTimeOut = SD_DATATIMEOUT; - sdmmc_datainitstructure.DataLength = BlockSize * NumberOfBlocks; - sdmmc_datainitstructure.DataBlockSize = SDMMC_DATABLOCK_SIZE_512B; - sdmmc_datainitstructure.TransferDir = SDMMC_TRANSFER_DIR_TO_CARD; - sdmmc_datainitstructure.TransferMode = SDMMC_TRANSFER_MODE_BLOCK; - sdmmc_datainitstructure.DPSM = SDMMC_DPSM_ENABLE; - SDMMC_DataConfig(hsd->Instance, &sdmmc_datainitstructure); - - hsd->SdTransferErr = errorstate; - - return errorstate; -} - -/** - * @brief This function waits until the SD DMA data read transfer is finished. - * This API should be called after HAL_SD_ReadBlocks_DMA() function - * to insure that all data sent by the card is already transferred by the - * DMA controller. - * @param hsd: SD handle - * @param Timeout: Timeout duration - * @retval SD Card error state - */ -HAL_SD_ErrorTypedef HAL_SD_CheckReadOperation(SD_HandleTypeDef *hsd, uint32_t Timeout) -{ - HAL_SD_ErrorTypedef errorstate = SD_OK; - uint32_t timeout = Timeout; - uint32_t tmp1, tmp2; - HAL_SD_ErrorTypedef tmp3; - - /* Wait for DMA/SD transfer end or SD error variables to be in SD handle */ - tmp1 = hsd->DmaTransferCplt; - tmp2 = hsd->SdTransferCplt; - tmp3 = (HAL_SD_ErrorTypedef)hsd->SdTransferErr; - - while (((tmp1 & tmp2) == 0) && (tmp3 == SD_OK) && (timeout > 0)) - { - tmp1 = hsd->DmaTransferCplt; - tmp2 = hsd->SdTransferCplt; - tmp3 = (HAL_SD_ErrorTypedef)hsd->SdTransferErr; - timeout--; - } - - timeout = Timeout; - - /* Wait until the Rx transfer is no longer active */ - while((__HAL_SD_SDMMC_GET_FLAG(hsd, SDMMC_FLAG_RXACT)) && (timeout > 0)) - { - timeout--; - } - - /* Send stop command in multiblock read */ - if (hsd->SdOperation == SD_READ_MULTIPLE_BLOCK) - { - errorstate = HAL_SD_StopTransfer(hsd); - } - - if ((timeout == 0) && (errorstate == SD_OK)) - { - errorstate = SD_DATA_TIMEOUT; - } - - /* Clear all the static flags */ - __HAL_SD_SDMMC_CLEAR_FLAG(hsd, SDMMC_STATIC_FLAGS); - - /* Return error state */ - if (hsd->SdTransferErr != SD_OK) - { - return (HAL_SD_ErrorTypedef)(hsd->SdTransferErr); - } - - return errorstate; -} - -/** - * @brief This function waits until the SD DMA data write transfer is finished. - * This API should be called after HAL_SD_WriteBlocks_DMA() function - * to insure that all data sent by the card is already transferred by the - * DMA controller. - * @param hsd: SD handle - * @param Timeout: Timeout duration - * @retval SD Card error state - */ -HAL_SD_ErrorTypedef HAL_SD_CheckWriteOperation(SD_HandleTypeDef *hsd, uint32_t Timeout) -{ - HAL_SD_ErrorTypedef errorstate = SD_OK; - uint32_t timeout = Timeout; - uint32_t tmp1, tmp2; - HAL_SD_ErrorTypedef tmp3; - - /* Wait for DMA/SD transfer end or SD error variables to be in SD handle */ - tmp1 = hsd->DmaTransferCplt; - tmp2 = hsd->SdTransferCplt; - tmp3 = (HAL_SD_ErrorTypedef)hsd->SdTransferErr; - - while (((tmp1 & tmp2) == 0) && (tmp3 == SD_OK) && (timeout > 0)) - { - tmp1 = hsd->DmaTransferCplt; - tmp2 = hsd->SdTransferCplt; - tmp3 = (HAL_SD_ErrorTypedef)hsd->SdTransferErr; - timeout--; - } - - timeout = Timeout; - - /* Wait until the Tx transfer is no longer active */ - while((__HAL_SD_SDMMC_GET_FLAG(hsd, SDMMC_FLAG_TXACT)) && (timeout > 0)) - { - timeout--; - } - - /* Send stop command in multiblock write */ - if (hsd->SdOperation == SD_WRITE_MULTIPLE_BLOCK) - { - errorstate = HAL_SD_StopTransfer(hsd); - } - - if ((timeout == 0) && (errorstate == SD_OK)) - { - errorstate = SD_DATA_TIMEOUT; - } - - /* Clear all the static flags */ - __HAL_SD_SDMMC_CLEAR_FLAG(hsd, SDMMC_STATIC_FLAGS); - - /* Return error state */ - if (hsd->SdTransferErr != SD_OK) - { - return (HAL_SD_ErrorTypedef)(hsd->SdTransferErr); - } - - /* Wait until write is complete */ - while(HAL_SD_GetStatus(hsd) != SD_TRANSFER_OK) - { - } - - return errorstate; -} - -/** - * @brief Erases the specified memory area of the given SD card. - * @param hsd: SD handle - * @param startaddr: Start byte address - * @param endaddr: End byte address - * @retval SD Card error state - */ -HAL_SD_ErrorTypedef HAL_SD_Erase(SD_HandleTypeDef *hsd, uint64_t startaddr, uint64_t endaddr) -{ - HAL_SD_ErrorTypedef errorstate = SD_OK; - SDMMC_CmdInitTypeDef sdmmc_cmdinitstructure; - - uint32_t delay = 0; - __IO uint32_t maxdelay = 0; - uint8_t cardstate = 0; - - /* Check if the card command class supports erase command */ - if (((hsd->CSD[1] >> 20) & SD_CCCC_ERASE) == 0) - { - errorstate = SD_REQUEST_NOT_APPLICABLE; - - return errorstate; - } - - /* Get max delay value */ - maxdelay = 120000 / (((hsd->Instance->CLKCR) & 0xFF) + 2); - - if((SDMMC_GetResponse(hsd->Instance, SDMMC_RESP1) & SD_CARD_LOCKED) == SD_CARD_LOCKED) - { - errorstate = SD_LOCK_UNLOCK_FAILED; - - return errorstate; - } - - /* Get start and end block for high capacity cards */ - if (hsd->CardType == HIGH_CAPACITY_SD_CARD) - { - startaddr /= 512; - endaddr /= 512; - } - - /* According to sd-card spec 1.0 ERASE_GROUP_START (CMD32) and erase_group_end(CMD33) */ - if ((hsd->CardType == STD_CAPACITY_SD_CARD_V1_1) || (hsd->CardType == STD_CAPACITY_SD_CARD_V2_0) ||\ - (hsd->CardType == HIGH_CAPACITY_SD_CARD)) - { - /* Send CMD32 SD_ERASE_GRP_START with argument as addr */ - sdmmc_cmdinitstructure.Argument =(uint32_t)startaddr; - sdmmc_cmdinitstructure.CmdIndex = SD_CMD_SD_ERASE_GRP_START; - sdmmc_cmdinitstructure.Response = SDMMC_RESPONSE_SHORT; - sdmmc_cmdinitstructure.WaitForInterrupt = SDMMC_WAIT_NO; - sdmmc_cmdinitstructure.CPSM = SDMMC_CPSM_ENABLE; - SDMMC_SendCommand(hsd->Instance, &sdmmc_cmdinitstructure); - - /* Check for error conditions */ - errorstate = SD_CmdResp1Error(hsd, SD_CMD_SD_ERASE_GRP_START); - - if (errorstate != SD_OK) - { - return errorstate; - } - - /* Send CMD33 SD_ERASE_GRP_END with argument as addr */ - sdmmc_cmdinitstructure.Argument = (uint32_t)endaddr; - sdmmc_cmdinitstructure.CmdIndex = SD_CMD_SD_ERASE_GRP_END; - SDMMC_SendCommand(hsd->Instance, &sdmmc_cmdinitstructure); - - /* Check for error conditions */ - errorstate = SD_CmdResp1Error(hsd, SD_CMD_SD_ERASE_GRP_END); - - if (errorstate != SD_OK) - { - return errorstate; - } - } - - /* Send CMD38 ERASE */ - sdmmc_cmdinitstructure.Argument = 0; - sdmmc_cmdinitstructure.CmdIndex = SD_CMD_ERASE; - SDMMC_SendCommand(hsd->Instance, &sdmmc_cmdinitstructure); - - /* Check for error conditions */ - errorstate = SD_CmdResp1Error(hsd, SD_CMD_ERASE); - - if (errorstate != SD_OK) - { - return errorstate; - } - - for (; delay < maxdelay; delay++) - { - } - - /* Wait until the card is in programming state */ - errorstate = SD_IsCardProgramming(hsd, &cardstate); - - delay = SD_DATATIMEOUT; - - while ((delay > 0) && (errorstate == SD_OK) && ((cardstate == SD_CARD_PROGRAMMING) || (cardstate == SD_CARD_RECEIVING))) - { - errorstate = SD_IsCardProgramming(hsd, &cardstate); - delay--; - } - - return errorstate; -} - -/** - * @brief This function handles SD card interrupt request. - * @param hsd: SD handle - * @retval None - */ -void HAL_SD_IRQHandler(SD_HandleTypeDef *hsd) -{ - /* Check for SDMMC interrupt flags */ - if (__HAL_SD_SDMMC_GET_FLAG(hsd, SDMMC_IT_DATAEND)) - { - __HAL_SD_SDMMC_CLEAR_FLAG(hsd, SDMMC_IT_DATAEND); - - /* SD transfer is complete */ - hsd->SdTransferCplt = 1; - - /* No transfer error */ - hsd->SdTransferErr = SD_OK; - - HAL_SD_XferCpltCallback(hsd); - } - else if (__HAL_SD_SDMMC_GET_FLAG(hsd, SDMMC_IT_DCRCFAIL)) - { - __HAL_SD_SDMMC_CLEAR_FLAG(hsd, SDMMC_FLAG_DCRCFAIL); - - hsd->SdTransferErr = SD_DATA_CRC_FAIL; - - HAL_SD_XferErrorCallback(hsd); - - } - else if (__HAL_SD_SDMMC_GET_FLAG(hsd, SDMMC_IT_DTIMEOUT)) - { - __HAL_SD_SDMMC_CLEAR_FLAG(hsd, SDMMC_FLAG_DTIMEOUT); - - hsd->SdTransferErr = SD_DATA_TIMEOUT; - - HAL_SD_XferErrorCallback(hsd); - } - else if (__HAL_SD_SDMMC_GET_FLAG(hsd, SDMMC_IT_RXOVERR)) - { - __HAL_SD_SDMMC_CLEAR_FLAG(hsd, SDMMC_FLAG_RXOVERR); - - hsd->SdTransferErr = SD_RX_OVERRUN; - - HAL_SD_XferErrorCallback(hsd); - } - else if (__HAL_SD_SDMMC_GET_FLAG(hsd, SDMMC_IT_TXUNDERR)) - { - __HAL_SD_SDMMC_CLEAR_FLAG(hsd, SDMMC_FLAG_TXUNDERR); - - hsd->SdTransferErr = SD_TX_UNDERRUN; - - HAL_SD_XferErrorCallback(hsd); - } - else - { - /* No error flag set */ - } - - /* Disable all SDMMC peripheral interrupt sources */ - __HAL_SD_SDMMC_DISABLE_IT(hsd, SDMMC_IT_DCRCFAIL | SDMMC_IT_DTIMEOUT | SDMMC_IT_DATAEND |\ - SDMMC_IT_TXFIFOHE | SDMMC_IT_RXFIFOHF | SDMMC_IT_TXUNDERR |\ - SDMMC_IT_RXOVERR); -} - - -/** - * @brief SD end of transfer callback. - * @param hsd: SD handle - * @retval None - */ -__weak void HAL_SD_XferCpltCallback(SD_HandleTypeDef *hsd) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_SD_XferCpltCallback could be implemented in the user file - */ -} - -/** - * @brief SD Transfer Error callback. - * @param hsd: SD handle - * @retval None - */ -__weak void HAL_SD_XferErrorCallback(SD_HandleTypeDef *hsd) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_SD_XferErrorCallback could be implemented in the user file - */ -} - -/** - * @brief SD Transfer complete Rx callback in non-blocking mode. - * @param hdma: pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA module. - * @retval None - */ -__weak void HAL_SD_DMA_RxCpltCallback(DMA_HandleTypeDef *hdma) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_SD_DMA_RxCpltCallback could be implemented in the user file - */ -} - -/** - * @brief SD DMA transfer complete Rx error callback. - * @param hdma: pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA module. - * @retval None - */ -__weak void HAL_SD_DMA_RxErrorCallback(DMA_HandleTypeDef *hdma) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_SD_DMA_RxErrorCallback could be implemented in the user file - */ -} - -/** - * @brief SD Transfer complete Tx callback in non-blocking mode. - * @param hdma: pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA module. - * @retval None - */ -__weak void HAL_SD_DMA_TxCpltCallback(DMA_HandleTypeDef *hdma) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_SD_DMA_TxCpltCallback could be implemented in the user file - */ -} - -/** - * @brief SD DMA transfer complete error Tx callback. - * @param hdma: pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA module. - * @retval None - */ -__weak void HAL_SD_DMA_TxErrorCallback(DMA_HandleTypeDef *hdma) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_SD_DMA_TxErrorCallback could be implemented in the user file - */ -} - -/** - * @} - */ - -/** @addtogroup SD_Exported_Functions_Group3 - * @brief management functions - * -@verbatim - ============================================================================== - ##### Peripheral Control functions ##### - ============================================================================== - [..] - This subsection provides a set of functions allowing to control the SD card - operations. - -@endverbatim - * @{ - */ - -/** - * @brief Returns information about specific card. - * @param hsd: SD handle - * @param pCardInfo: Pointer to a HAL_SD_CardInfoTypedef structure that - * contains all SD cardinformation - * @retval SD Card error state - */ -HAL_SD_ErrorTypedef HAL_SD_Get_CardInfo(SD_HandleTypeDef *hsd, HAL_SD_CardInfoTypedef *pCardInfo) -{ - HAL_SD_ErrorTypedef errorstate = SD_OK; - uint32_t tmp = 0; - - pCardInfo->CardType = (uint8_t)(hsd->CardType); - pCardInfo->RCA = (uint16_t)(hsd->RCA); - - /* Byte 0 */ - tmp = (hsd->CSD[0] & 0xFF000000) >> 24; - pCardInfo->SD_csd.CSDStruct = (uint8_t)((tmp & 0xC0) >> 6); - pCardInfo->SD_csd.SysSpecVersion = (uint8_t)((tmp & 0x3C) >> 2); - pCardInfo->SD_csd.Reserved1 = tmp & 0x03; - - /* Byte 1 */ - tmp = (hsd->CSD[0] & 0x00FF0000) >> 16; - pCardInfo->SD_csd.TAAC = (uint8_t)tmp; - - /* Byte 2 */ - tmp = (hsd->CSD[0] & 0x0000FF00) >> 8; - pCardInfo->SD_csd.NSAC = (uint8_t)tmp; - - /* Byte 3 */ - tmp = hsd->CSD[0] & 0x000000FF; - pCardInfo->SD_csd.MaxBusClkFrec = (uint8_t)tmp; - - /* Byte 4 */ - tmp = (hsd->CSD[1] & 0xFF000000) >> 24; - pCardInfo->SD_csd.CardComdClasses = (uint16_t)(tmp << 4); - - /* Byte 5 */ - tmp = (hsd->CSD[1] & 0x00FF0000) >> 16; - pCardInfo->SD_csd.CardComdClasses |= (uint16_t)((tmp & 0xF0) >> 4); - pCardInfo->SD_csd.RdBlockLen = (uint8_t)(tmp & 0x0F); - - /* Byte 6 */ - tmp = (hsd->CSD[1] & 0x0000FF00) >> 8; - pCardInfo->SD_csd.PartBlockRead = (uint8_t)((tmp & 0x80) >> 7); - pCardInfo->SD_csd.WrBlockMisalign = (uint8_t)((tmp & 0x40) >> 6); - pCardInfo->SD_csd.RdBlockMisalign = (uint8_t)((tmp & 0x20) >> 5); - pCardInfo->SD_csd.DSRImpl = (uint8_t)((tmp & 0x10) >> 4); - pCardInfo->SD_csd.Reserved2 = 0; /*!< Reserved */ - - if ((hsd->CardType == STD_CAPACITY_SD_CARD_V1_1) || (hsd->CardType == STD_CAPACITY_SD_CARD_V2_0)) - { - pCardInfo->SD_csd.DeviceSize = (tmp & 0x03) << 10; - - /* Byte 7 */ - tmp = (uint8_t)(hsd->CSD[1] & 0x000000FF); - pCardInfo->SD_csd.DeviceSize |= (tmp) << 2; - - /* Byte 8 */ - tmp = (uint8_t)((hsd->CSD[2] & 0xFF000000) >> 24); - pCardInfo->SD_csd.DeviceSize |= (tmp & 0xC0) >> 6; - - pCardInfo->SD_csd.MaxRdCurrentVDDMin = (tmp & 0x38) >> 3; - pCardInfo->SD_csd.MaxRdCurrentVDDMax = (tmp & 0x07); - - /* Byte 9 */ - tmp = (uint8_t)((hsd->CSD[2] & 0x00FF0000) >> 16); - pCardInfo->SD_csd.MaxWrCurrentVDDMin = (tmp & 0xE0) >> 5; - pCardInfo->SD_csd.MaxWrCurrentVDDMax = (tmp & 0x1C) >> 2; - pCardInfo->SD_csd.DeviceSizeMul = (tmp & 0x03) << 1; - /* Byte 10 */ - tmp = (uint8_t)((hsd->CSD[2] & 0x0000FF00) >> 8); - pCardInfo->SD_csd.DeviceSizeMul |= (tmp & 0x80) >> 7; - - pCardInfo->CardCapacity = (pCardInfo->SD_csd.DeviceSize + 1) ; - pCardInfo->CardCapacity *= (1 << (pCardInfo->SD_csd.DeviceSizeMul + 2)); - pCardInfo->CardBlockSize = 1 << (pCardInfo->SD_csd.RdBlockLen); - pCardInfo->CardCapacity *= pCardInfo->CardBlockSize; - } - else if (hsd->CardType == HIGH_CAPACITY_SD_CARD) - { - /* Byte 7 */ - tmp = (uint8_t)(hsd->CSD[1] & 0x000000FF); - pCardInfo->SD_csd.DeviceSize = (tmp & 0x3F) << 16; - - /* Byte 8 */ - tmp = (uint8_t)((hsd->CSD[2] & 0xFF000000) >> 24); - - pCardInfo->SD_csd.DeviceSize |= (tmp << 8); - - /* Byte 9 */ - tmp = (uint8_t)((hsd->CSD[2] & 0x00FF0000) >> 16); - - pCardInfo->SD_csd.DeviceSize |= (tmp); - - /* Byte 10 */ - tmp = (uint8_t)((hsd->CSD[2] & 0x0000FF00) >> 8); - - pCardInfo->CardCapacity = ((pCardInfo->SD_csd.DeviceSize + 1)) * 512 * 1024; - pCardInfo->CardBlockSize = 512; - } - else - { - /* Not supported card type */ - errorstate = SD_ERROR; - } - - pCardInfo->SD_csd.EraseGrSize = (tmp & 0x40) >> 6; - pCardInfo->SD_csd.EraseGrMul = (tmp & 0x3F) << 1; - - /* Byte 11 */ - tmp = (uint8_t)(hsd->CSD[2] & 0x000000FF); - pCardInfo->SD_csd.EraseGrMul |= (tmp & 0x80) >> 7; - pCardInfo->SD_csd.WrProtectGrSize = (tmp & 0x7F); - - /* Byte 12 */ - tmp = (uint8_t)((hsd->CSD[3] & 0xFF000000) >> 24); - pCardInfo->SD_csd.WrProtectGrEnable = (tmp & 0x80) >> 7; - pCardInfo->SD_csd.ManDeflECC = (tmp & 0x60) >> 5; - pCardInfo->SD_csd.WrSpeedFact = (tmp & 0x1C) >> 2; - pCardInfo->SD_csd.MaxWrBlockLen = (tmp & 0x03) << 2; - - /* Byte 13 */ - tmp = (uint8_t)((hsd->CSD[3] & 0x00FF0000) >> 16); - pCardInfo->SD_csd.MaxWrBlockLen |= (tmp & 0xC0) >> 6; - pCardInfo->SD_csd.WriteBlockPaPartial = (tmp & 0x20) >> 5; - pCardInfo->SD_csd.Reserved3 = 0; - pCardInfo->SD_csd.ContentProtectAppli = (tmp & 0x01); - - /* Byte 14 */ - tmp = (uint8_t)((hsd->CSD[3] & 0x0000FF00) >> 8); - pCardInfo->SD_csd.FileFormatGrouop = (tmp & 0x80) >> 7; - pCardInfo->SD_csd.CopyFlag = (tmp & 0x40) >> 6; - pCardInfo->SD_csd.PermWrProtect = (tmp & 0x20) >> 5; - pCardInfo->SD_csd.TempWrProtect = (tmp & 0x10) >> 4; - pCardInfo->SD_csd.FileFormat = (tmp & 0x0C) >> 2; - pCardInfo->SD_csd.ECC = (tmp & 0x03); - - /* Byte 15 */ - tmp = (uint8_t)(hsd->CSD[3] & 0x000000FF); - pCardInfo->SD_csd.CSD_CRC = (tmp & 0xFE) >> 1; - pCardInfo->SD_csd.Reserved4 = 1; - - /* Byte 0 */ - tmp = (uint8_t)((hsd->CID[0] & 0xFF000000) >> 24); - pCardInfo->SD_cid.ManufacturerID = tmp; - - /* Byte 1 */ - tmp = (uint8_t)((hsd->CID[0] & 0x00FF0000) >> 16); - pCardInfo->SD_cid.OEM_AppliID = tmp << 8; - - /* Byte 2 */ - tmp = (uint8_t)((hsd->CID[0] & 0x000000FF00) >> 8); - pCardInfo->SD_cid.OEM_AppliID |= tmp; - - /* Byte 3 */ - tmp = (uint8_t)(hsd->CID[0] & 0x000000FF); - pCardInfo->SD_cid.ProdName1 = tmp << 24; - - /* Byte 4 */ - tmp = (uint8_t)((hsd->CID[1] & 0xFF000000) >> 24); - pCardInfo->SD_cid.ProdName1 |= tmp << 16; - - /* Byte 5 */ - tmp = (uint8_t)((hsd->CID[1] & 0x00FF0000) >> 16); - pCardInfo->SD_cid.ProdName1 |= tmp << 8; - - /* Byte 6 */ - tmp = (uint8_t)((hsd->CID[1] & 0x0000FF00) >> 8); - pCardInfo->SD_cid.ProdName1 |= tmp; - - /* Byte 7 */ - tmp = (uint8_t)(hsd->CID[1] & 0x000000FF); - pCardInfo->SD_cid.ProdName2 = tmp; - - /* Byte 8 */ - tmp = (uint8_t)((hsd->CID[2] & 0xFF000000) >> 24); - pCardInfo->SD_cid.ProdRev = tmp; - - /* Byte 9 */ - tmp = (uint8_t)((hsd->CID[2] & 0x00FF0000) >> 16); - pCardInfo->SD_cid.ProdSN = tmp << 24; - - /* Byte 10 */ - tmp = (uint8_t)((hsd->CID[2] & 0x0000FF00) >> 8); - pCardInfo->SD_cid.ProdSN |= tmp << 16; - - /* Byte 11 */ - tmp = (uint8_t)(hsd->CID[2] & 0x000000FF); - pCardInfo->SD_cid.ProdSN |= tmp << 8; - - /* Byte 12 */ - tmp = (uint8_t)((hsd->CID[3] & 0xFF000000) >> 24); - pCardInfo->SD_cid.ProdSN |= tmp; - - /* Byte 13 */ - tmp = (uint8_t)((hsd->CID[3] & 0x00FF0000) >> 16); - pCardInfo->SD_cid.Reserved1 |= (tmp & 0xF0) >> 4; - pCardInfo->SD_cid.ManufactDate = (tmp & 0x0F) << 8; - - /* Byte 14 */ - tmp = (uint8_t)((hsd->CID[3] & 0x0000FF00) >> 8); - pCardInfo->SD_cid.ManufactDate |= tmp; - - /* Byte 15 */ - tmp = (uint8_t)(hsd->CID[3] & 0x000000FF); - pCardInfo->SD_cid.CID_CRC = (tmp & 0xFE) >> 1; - pCardInfo->SD_cid.Reserved2 = 1; - - return errorstate; -} - -/** - * @brief Enables wide bus operation for the requested card if supported by - * card. - * @param hsd: SD handle - * @param WideMode: Specifies the SD card wide bus mode - * This parameter can be one of the following values: - * @arg SDMMC_BUS_WIDE_8B: 8-bit data transfer (Only for MMC) - * @arg SDMMC_BUS_WIDE_4B: 4-bit data transfer - * @arg SDMMC_BUS_WIDE_1B: 1-bit data transfer - * @retval SD Card error state - */ -HAL_SD_ErrorTypedef HAL_SD_WideBusOperation_Config(SD_HandleTypeDef *hsd, uint32_t WideMode) -{ - HAL_SD_ErrorTypedef errorstate = SD_OK; - SDMMC_InitTypeDef tmpinit; - - /* MMC Card does not support this feature */ - if (hsd->CardType == MULTIMEDIA_CARD) - { - errorstate = SD_UNSUPPORTED_FEATURE; - - return errorstate; - } - else if ((hsd->CardType == STD_CAPACITY_SD_CARD_V1_1) || (hsd->CardType == STD_CAPACITY_SD_CARD_V2_0) ||\ - (hsd->CardType == HIGH_CAPACITY_SD_CARD)) - { - if (WideMode == SDMMC_BUS_WIDE_8B) - { - errorstate = SD_UNSUPPORTED_FEATURE; - } - else if (WideMode == SDMMC_BUS_WIDE_4B) - { - errorstate = SD_WideBus_Enable(hsd); - } - else if (WideMode == SDMMC_BUS_WIDE_1B) - { - errorstate = SD_WideBus_Disable(hsd); - } - else - { - /* WideMode is not a valid argument*/ - errorstate = SD_INVALID_PARAMETER; - } - - if (errorstate == SD_OK) - { - /* Configure the SDMMC peripheral */ - tmpinit.ClockEdge = hsd->Init.ClockEdge; - tmpinit.ClockBypass = hsd->Init.ClockBypass; - tmpinit.ClockPowerSave = hsd->Init.ClockPowerSave; - tmpinit.BusWide = WideMode; - tmpinit.HardwareFlowControl = hsd->Init.HardwareFlowControl; - tmpinit.ClockDiv = hsd->Init.ClockDiv; - SDMMC_Init(hsd->Instance, tmpinit); - } - } - - return errorstate; -} - -/** - * @brief Aborts an ongoing data transfer. - * @param hsd: SD handle - * @retval SD Card error state - */ -HAL_SD_ErrorTypedef HAL_SD_StopTransfer(SD_HandleTypeDef *hsd) -{ - SDMMC_CmdInitTypeDef sdmmc_cmdinitstructure; - HAL_SD_ErrorTypedef errorstate = SD_OK; - - /* Send CMD12 STOP_TRANSMISSION */ - sdmmc_cmdinitstructure.Argument = 0; - sdmmc_cmdinitstructure.CmdIndex = SD_CMD_STOP_TRANSMISSION; - sdmmc_cmdinitstructure.Response = SDMMC_RESPONSE_SHORT; - sdmmc_cmdinitstructure.WaitForInterrupt = SDMMC_WAIT_NO; - sdmmc_cmdinitstructure.CPSM = SDMMC_CPSM_ENABLE; - SDMMC_SendCommand(hsd->Instance, &sdmmc_cmdinitstructure); - - /* Check for error conditions */ - errorstate = SD_CmdResp1Error(hsd, SD_CMD_STOP_TRANSMISSION); - - return errorstate; -} - -/** - * @brief Switches the SD card to High Speed mode. - * This API must be used after "Transfer State" - * @note This operation should be followed by the configuration - * of PLL to have SDMMCCK clock between 67 and 75 MHz - * @param hsd: SD handle - * @retval SD Card error state - */ -HAL_SD_ErrorTypedef HAL_SD_HighSpeed (SD_HandleTypeDef *hsd) -{ - HAL_SD_ErrorTypedef errorstate = SD_OK; - SDMMC_CmdInitTypeDef sdmmc_cmdinitstructure; - SDMMC_DataInitTypeDef sdmmc_datainitstructure; - - uint8_t SD_hs[64] = {0}; - uint32_t SD_scr[2] = {0, 0}; - uint32_t SD_SPEC = 0 ; - uint32_t count = 0, *tempbuff = (uint32_t *)SD_hs; - - /* Initialize the Data control register */ - hsd->Instance->DCTRL = 0; - - /* Get SCR Register */ - errorstate = SD_FindSCR(hsd, SD_scr); - - if (errorstate != SD_OK) - { - return errorstate; - } - - /* Test the Version supported by the card*/ - SD_SPEC = (SD_scr[1] & 0x01000000) | (SD_scr[1] & 0x02000000); - - if (SD_SPEC != SD_ALLZERO) - { - /* Set Block Size for Card */ - sdmmc_cmdinitstructure.Argument = (uint32_t)64; - sdmmc_cmdinitstructure.CmdIndex = SD_CMD_SET_BLOCKLEN; - sdmmc_cmdinitstructure.Response = SDMMC_RESPONSE_SHORT; - sdmmc_cmdinitstructure.WaitForInterrupt = SDMMC_WAIT_NO; - sdmmc_cmdinitstructure.CPSM = SDMMC_CPSM_ENABLE; - SDMMC_SendCommand(hsd->Instance, &sdmmc_cmdinitstructure); - - /* Check for error conditions */ - errorstate = SD_CmdResp1Error(hsd, SD_CMD_SET_BLOCKLEN); - - if (errorstate != SD_OK) - { - return errorstate; - } - - /* Configure the SD DPSM (Data Path State Machine) */ - sdmmc_datainitstructure.DataTimeOut = SD_DATATIMEOUT; - sdmmc_datainitstructure.DataLength = 64; - sdmmc_datainitstructure.DataBlockSize = SDMMC_DATABLOCK_SIZE_64B ; - sdmmc_datainitstructure.TransferDir = SDMMC_TRANSFER_DIR_TO_SDMMC; - sdmmc_datainitstructure.TransferMode = SDMMC_TRANSFER_MODE_BLOCK; - sdmmc_datainitstructure.DPSM = SDMMC_DPSM_ENABLE; - SDMMC_DataConfig(hsd->Instance, &sdmmc_datainitstructure); - - /* Send CMD6 switch mode */ - sdmmc_cmdinitstructure.Argument = 0x80FFFF01; - sdmmc_cmdinitstructure.CmdIndex = SD_CMD_HS_SWITCH; - SDMMC_SendCommand(hsd->Instance, &sdmmc_cmdinitstructure); - - /* Check for error conditions */ - errorstate = SD_CmdResp1Error(hsd, SD_CMD_HS_SWITCH); - - if (errorstate != SD_OK) - { - return errorstate; - } - - while(!__HAL_SD_SDMMC_GET_FLAG(hsd, SDMMC_FLAG_RXOVERR | SDMMC_FLAG_DCRCFAIL | SDMMC_FLAG_DTIMEOUT | SDMMC_FLAG_DBCKEND)) - { - if (__HAL_SD_SDMMC_GET_FLAG(hsd, SDMMC_FLAG_RXFIFOHF)) - { - for (count = 0; count < 8; count++) - { - *(tempbuff + count) = SDMMC_ReadFIFO(hsd->Instance); - } - - tempbuff += 8; - } - } - - if (__HAL_SD_SDMMC_GET_FLAG(hsd, SDMMC_FLAG_DTIMEOUT)) - { - __HAL_SD_SDMMC_CLEAR_FLAG(hsd, SDMMC_FLAG_DTIMEOUT); - - errorstate = SD_DATA_TIMEOUT; - - return errorstate; - } - else if (__HAL_SD_SDMMC_GET_FLAG(hsd, SDMMC_FLAG_DCRCFAIL)) - { - __HAL_SD_SDMMC_CLEAR_FLAG(hsd, SDMMC_FLAG_DCRCFAIL); - - errorstate = SD_DATA_CRC_FAIL; - - return errorstate; - } - else if (__HAL_SD_SDMMC_GET_FLAG(hsd, SDMMC_FLAG_RXOVERR)) - { - __HAL_SD_SDMMC_CLEAR_FLAG(hsd, SDMMC_FLAG_RXOVERR); - - errorstate = SD_RX_OVERRUN; - - return errorstate; - } - else - { - /* No error flag set */ - } - - count = SD_DATATIMEOUT; - - while ((__HAL_SD_SDMMC_GET_FLAG(hsd, SDMMC_FLAG_RXDAVL)) && (count > 0)) - { - *tempbuff = SDMMC_ReadFIFO(hsd->Instance); - tempbuff++; - count--; - } - - /* Clear all the static flags */ - __HAL_SD_SDMMC_CLEAR_FLAG(hsd, SDMMC_STATIC_FLAGS); - - /* Test if the switch mode HS is ok */ - if ((SD_hs[13]& 2) != 2) - { - errorstate = SD_UNSUPPORTED_FEATURE; - } - } - - return errorstate; -} - -/** - * @} - */ - -/** @addtogroup SD_Exported_Functions_Group4 - * @brief Peripheral State functions - * -@verbatim - ============================================================================== - ##### Peripheral State functions ##### - ============================================================================== - [..] - This subsection permits to get in runtime the status of the peripheral - and the data flow. - -@endverbatim - * @{ - */ - -/** - * @brief Returns the current SD card's status. - * @param hsd: SD handle - * @param pSDstatus: Pointer to the buffer that will contain the SD card status - * SD Status register) - * @retval SD Card error state - */ -HAL_SD_ErrorTypedef HAL_SD_SendSDStatus(SD_HandleTypeDef *hsd, uint32_t *pSDstatus) -{ - SDMMC_CmdInitTypeDef sdmmc_cmdinitstructure; - SDMMC_DataInitTypeDef sdmmc_datainitstructure; - HAL_SD_ErrorTypedef errorstate = SD_OK; - uint32_t count = 0; - - /* Check SD response */ - if ((SDMMC_GetResponse(hsd->Instance, SDMMC_RESP1) & SD_CARD_LOCKED) == SD_CARD_LOCKED) - { - errorstate = SD_LOCK_UNLOCK_FAILED; - - return errorstate; - } - - /* Set block size for card if it is not equal to current block size for card */ - sdmmc_cmdinitstructure.Argument = 64; - sdmmc_cmdinitstructure.CmdIndex = SD_CMD_SET_BLOCKLEN; - sdmmc_cmdinitstructure.Response = SDMMC_RESPONSE_SHORT; - sdmmc_cmdinitstructure.WaitForInterrupt = SDMMC_WAIT_NO; - sdmmc_cmdinitstructure.CPSM = SDMMC_CPSM_ENABLE; - SDMMC_SendCommand(hsd->Instance, &sdmmc_cmdinitstructure); - - /* Check for error conditions */ - errorstate = SD_CmdResp1Error(hsd, SD_CMD_SET_BLOCKLEN); - - if (errorstate != SD_OK) - { - return errorstate; - } - - /* Send CMD55 */ - sdmmc_cmdinitstructure.Argument = (uint32_t)(hsd->RCA << 16); - sdmmc_cmdinitstructure.CmdIndex = SD_CMD_APP_CMD; - SDMMC_SendCommand(hsd->Instance, &sdmmc_cmdinitstructure); - - /* Check for error conditions */ - errorstate = SD_CmdResp1Error(hsd, SD_CMD_APP_CMD); - - if (errorstate != SD_OK) - { - return errorstate; - } - - /* Configure the SD DPSM (Data Path State Machine) */ - sdmmc_datainitstructure.DataTimeOut = SD_DATATIMEOUT; - sdmmc_datainitstructure.DataLength = 64; - sdmmc_datainitstructure.DataBlockSize = SDMMC_DATABLOCK_SIZE_64B; - sdmmc_datainitstructure.TransferDir = SDMMC_TRANSFER_DIR_TO_SDMMC; - sdmmc_datainitstructure.TransferMode = SDMMC_TRANSFER_MODE_BLOCK; - sdmmc_datainitstructure.DPSM = SDMMC_DPSM_ENABLE; - SDMMC_DataConfig(hsd->Instance, &sdmmc_datainitstructure); - - /* Send ACMD13 (SD_APP_STAUS) with argument as card's RCA */ - sdmmc_cmdinitstructure.Argument = 0; - sdmmc_cmdinitstructure.CmdIndex = SD_CMD_SD_APP_STATUS; - SDMMC_SendCommand(hsd->Instance, &sdmmc_cmdinitstructure); - - /* Check for error conditions */ - errorstate = SD_CmdResp1Error(hsd, SD_CMD_SD_APP_STATUS); - - if (errorstate != SD_OK) - { - return errorstate; - } - - /* Get status data */ - while(!__HAL_SD_SDMMC_GET_FLAG(hsd, SDMMC_FLAG_RXOVERR | SDMMC_FLAG_DCRCFAIL | SDMMC_FLAG_DTIMEOUT | SDMMC_FLAG_DBCKEND)) - { - if (__HAL_SD_SDMMC_GET_FLAG(hsd, SDMMC_FLAG_RXFIFOHF)) - { - for (count = 0; count < 8; count++) - { - *(pSDstatus + count) = SDMMC_ReadFIFO(hsd->Instance); - } - - pSDstatus += 8; - } - } - - if (__HAL_SD_SDMMC_GET_FLAG(hsd, SDMMC_FLAG_DTIMEOUT)) - { - __HAL_SD_SDMMC_CLEAR_FLAG(hsd, SDMMC_FLAG_DTIMEOUT); - - errorstate = SD_DATA_TIMEOUT; - - return errorstate; - } - else if (__HAL_SD_SDMMC_GET_FLAG(hsd, SDMMC_FLAG_DCRCFAIL)) - { - __HAL_SD_SDMMC_CLEAR_FLAG(hsd, SDMMC_FLAG_DCRCFAIL); - - errorstate = SD_DATA_CRC_FAIL; - - return errorstate; - } - else if (__HAL_SD_SDMMC_GET_FLAG(hsd, SDMMC_FLAG_RXOVERR)) - { - __HAL_SD_SDMMC_CLEAR_FLAG(hsd, SDMMC_FLAG_RXOVERR); - - errorstate = SD_RX_OVERRUN; - - return errorstate; - } - else - { - /* No error flag set */ - } - - count = SD_DATATIMEOUT; - while ((__HAL_SD_SDMMC_GET_FLAG(hsd, SDMMC_FLAG_RXDAVL)) && (count > 0)) - { - *pSDstatus = SDMMC_ReadFIFO(hsd->Instance); - pSDstatus++; - count--; - } - - /* Clear all the static status flags*/ - __HAL_SD_SDMMC_CLEAR_FLAG(hsd, SDMMC_STATIC_FLAGS); - - return errorstate; -} - -/** - * @brief Gets the current sd card data status. - * @param hsd: SD handle - * @retval Data Transfer state - */ -HAL_SD_TransferStateTypedef HAL_SD_GetStatus(SD_HandleTypeDef *hsd) -{ - HAL_SD_CardStateTypedef cardstate = SD_CARD_TRANSFER; - - /* Get SD card state */ - cardstate = SD_GetState(hsd); - - /* Find SD status according to card state*/ - if (cardstate == SD_CARD_TRANSFER) - { - return SD_TRANSFER_OK; - } - else if(cardstate == SD_CARD_ERROR) - { - return SD_TRANSFER_ERROR; - } - else - { - return SD_TRANSFER_BUSY; - } -} - -/** - * @brief Gets the SD card status. - * @param hsd: SD handle - * @param pCardStatus: Pointer to the HAL_SD_CardStatusTypedef structure that - * will contain the SD card status information - * @retval SD Card error state - */ -HAL_SD_ErrorTypedef HAL_SD_GetCardStatus(SD_HandleTypeDef *hsd, HAL_SD_CardStatusTypedef *pCardStatus) -{ - HAL_SD_ErrorTypedef errorstate = SD_OK; - uint32_t tmp = 0; - uint32_t sd_status[16]; - - errorstate = HAL_SD_SendSDStatus(hsd, sd_status); - - if (errorstate != SD_OK) - { - return errorstate; - } - - /* Byte 0 */ - tmp = (sd_status[0] & 0xC0) >> 6; - pCardStatus->DAT_BUS_WIDTH = (uint8_t)tmp; - - /* Byte 0 */ - tmp = (sd_status[0] & 0x20) >> 5; - pCardStatus->SECURED_MODE = (uint8_t)tmp; - - /* Byte 2 */ - tmp = (sd_status[2] & 0xFF); - pCardStatus->SD_CARD_TYPE = (uint8_t)(tmp << 8); - - /* Byte 3 */ - tmp = (sd_status[3] & 0xFF); - pCardStatus->SD_CARD_TYPE |= (uint8_t)tmp; - - /* Byte 4 */ - tmp = (sd_status[4] & 0xFF); - pCardStatus->SIZE_OF_PROTECTED_AREA = (uint8_t)(tmp << 24); - - /* Byte 5 */ - tmp = (sd_status[5] & 0xFF); - pCardStatus->SIZE_OF_PROTECTED_AREA |= (uint8_t)(tmp << 16); - - /* Byte 6 */ - tmp = (sd_status[6] & 0xFF); - pCardStatus->SIZE_OF_PROTECTED_AREA |= (uint8_t)(tmp << 8); - - /* Byte 7 */ - tmp = (sd_status[7] & 0xFF); - pCardStatus->SIZE_OF_PROTECTED_AREA |= (uint8_t)tmp; - - /* Byte 8 */ - tmp = (sd_status[8] & 0xFF); - pCardStatus->SPEED_CLASS = (uint8_t)tmp; - - /* Byte 9 */ - tmp = (sd_status[9] & 0xFF); - pCardStatus->PERFORMANCE_MOVE = (uint8_t)tmp; - - /* Byte 10 */ - tmp = (sd_status[10] & 0xF0) >> 4; - pCardStatus->AU_SIZE = (uint8_t)tmp; - - /* Byte 11 */ - tmp = (sd_status[11] & 0xFF); - pCardStatus->ERASE_SIZE = (uint8_t)(tmp << 8); - - /* Byte 12 */ - tmp = (sd_status[12] & 0xFF); - pCardStatus->ERASE_SIZE |= (uint8_t)tmp; - - /* Byte 13 */ - tmp = (sd_status[13] & 0xFC) >> 2; - pCardStatus->ERASE_TIMEOUT = (uint8_t)tmp; - - /* Byte 13 */ - tmp = (sd_status[13] & 0x3); - pCardStatus->ERASE_OFFSET = (uint8_t)tmp; - - return errorstate; -} - -/** - * @} - */ - -/** - * @} - */ - -/* Private function ----------------------------------------------------------*/ -/** @addtogroup SD_Private_Functions - * @{ - */ - -/** - * @brief SD DMA transfer complete Rx callback. - * @param hdma: pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA module. - * @retval None - */ -static void SD_DMA_RxCplt(DMA_HandleTypeDef *hdma) -{ - SD_HandleTypeDef *hsd = (SD_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; - - /* DMA transfer is complete */ - hsd->DmaTransferCplt = 1; - - /* Wait until SD transfer is complete */ - while(hsd->SdTransferCplt == 0) - { - } - - /* Disable the DMA channel */ - HAL_DMA_Abort(hdma); - - /* Transfer complete user callback */ - HAL_SD_DMA_RxCpltCallback(hsd->hdmarx); -} - -/** - * @brief SD DMA transfer Error Rx callback. - * @param hdma: pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA module. - * @retval None - */ -static void SD_DMA_RxError(DMA_HandleTypeDef *hdma) -{ - SD_HandleTypeDef *hsd = (SD_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; - - /* Transfer complete user callback */ - HAL_SD_DMA_RxErrorCallback(hsd->hdmarx); -} - -/** - * @brief SD DMA transfer complete Tx callback. - * @param hdma: pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA module. - * @retval None - */ -static void SD_DMA_TxCplt(DMA_HandleTypeDef *hdma) -{ - SD_HandleTypeDef *hsd = (SD_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; - - /* DMA transfer is complete */ - hsd->DmaTransferCplt = 1; - - /* Wait until SD transfer is complete */ - while(hsd->SdTransferCplt == 0) - { - } - - /* Disable the DMA channel */ - HAL_DMA_Abort(hdma); - - /* Transfer complete user callback */ - HAL_SD_DMA_TxCpltCallback(hsd->hdmatx); -} - -/** - * @brief SD DMA transfer Error Tx callback. - * @param hdma: pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA module. - * @retval None - */ -static void SD_DMA_TxError(DMA_HandleTypeDef *hdma) -{ - SD_HandleTypeDef *hsd = ( SD_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; - - /* Transfer complete user callback */ - HAL_SD_DMA_TxErrorCallback(hsd->hdmatx); -} - -/** - * @brief Returns the SD current state. - * @param hsd: SD handle - * @retval SD card current state - */ -static HAL_SD_CardStateTypedef SD_GetState(SD_HandleTypeDef *hsd) -{ - uint32_t resp1 = 0; - - if (SD_SendStatus(hsd, &resp1) != SD_OK) - { - return SD_CARD_ERROR; - } - else - { - return (HAL_SD_CardStateTypedef)((resp1 >> 9) & 0x0F); - } -} - -/** - * @brief Initializes all cards or single card as the case may be Card(s) come - * into standby state. - * @param hsd: SD handle - * @retval SD Card error state - */ -static HAL_SD_ErrorTypedef SD_Initialize_Cards(SD_HandleTypeDef *hsd) -{ - SDMMC_CmdInitTypeDef sdmmc_cmdinitstructure; - HAL_SD_ErrorTypedef errorstate = SD_OK; - uint16_t sd_rca = 1; - - if(SDMMC_GetPowerState(hsd->Instance) == 0) /* Power off */ - { - errorstate = SD_REQUEST_NOT_APPLICABLE; - - return errorstate; - } - - if(hsd->CardType != SECURE_DIGITAL_IO_CARD) - { - /* Send CMD2 ALL_SEND_CID */ - sdmmc_cmdinitstructure.Argument = 0; - sdmmc_cmdinitstructure.CmdIndex = SD_CMD_ALL_SEND_CID; - sdmmc_cmdinitstructure.Response = SDMMC_RESPONSE_LONG; - sdmmc_cmdinitstructure.WaitForInterrupt = SDMMC_WAIT_NO; - sdmmc_cmdinitstructure.CPSM = SDMMC_CPSM_ENABLE; - SDMMC_SendCommand(hsd->Instance, &sdmmc_cmdinitstructure); - - /* Check for error conditions */ - errorstate = SD_CmdResp2Error(hsd); - - if(errorstate != SD_OK) - { - return errorstate; - } - - /* Get Card identification number data */ - hsd->CID[0] = SDMMC_GetResponse(hsd->Instance, SDMMC_RESP1); - hsd->CID[1] = SDMMC_GetResponse(hsd->Instance, SDMMC_RESP2); - hsd->CID[2] = SDMMC_GetResponse(hsd->Instance, SDMMC_RESP3); - hsd->CID[3] = SDMMC_GetResponse(hsd->Instance, SDMMC_RESP4); - } - - if((hsd->CardType == STD_CAPACITY_SD_CARD_V1_1) || (hsd->CardType == STD_CAPACITY_SD_CARD_V2_0) ||\ - (hsd->CardType == SECURE_DIGITAL_IO_COMBO_CARD) || (hsd->CardType == HIGH_CAPACITY_SD_CARD)) - { - /* Send CMD3 SET_REL_ADDR with argument 0 */ - /* SD Card publishes its RCA. */ - sdmmc_cmdinitstructure.CmdIndex = SD_CMD_SET_REL_ADDR; - sdmmc_cmdinitstructure.Response = SDMMC_RESPONSE_SHORT; - SDMMC_SendCommand(hsd->Instance, &sdmmc_cmdinitstructure); - - /* Check for error conditions */ - errorstate = SD_CmdResp6Error(hsd, SD_CMD_SET_REL_ADDR, &sd_rca); - - if(errorstate != SD_OK) - { - return errorstate; - } - } - - if (hsd->CardType != SECURE_DIGITAL_IO_CARD) - { - /* Get the SD card RCA */ - hsd->RCA = sd_rca; - - /* Send CMD9 SEND_CSD with argument as card's RCA */ - sdmmc_cmdinitstructure.Argument = (uint32_t)(hsd->RCA << 16); - sdmmc_cmdinitstructure.CmdIndex = SD_CMD_SEND_CSD; - sdmmc_cmdinitstructure.Response = SDMMC_RESPONSE_LONG; - SDMMC_SendCommand(hsd->Instance, &sdmmc_cmdinitstructure); - - /* Check for error conditions */ - errorstate = SD_CmdResp2Error(hsd); - - if(errorstate != SD_OK) - { - return errorstate; - } - - /* Get Card Specific Data */ - hsd->CSD[0] = SDMMC_GetResponse(hsd->Instance, SDMMC_RESP1); - hsd->CSD[1] = SDMMC_GetResponse(hsd->Instance, SDMMC_RESP2); - hsd->CSD[2] = SDMMC_GetResponse(hsd->Instance, SDMMC_RESP3); - hsd->CSD[3] = SDMMC_GetResponse(hsd->Instance, SDMMC_RESP4); - } - - /* All cards are initialized */ - return errorstate; -} - -/** - * @brief Selects or Deselects the corresponding card. - * @param hsd: SD handle - * @param addr: Address of the card to be selected - * @retval SD Card error state - */ -static HAL_SD_ErrorTypedef SD_Select_Deselect(SD_HandleTypeDef *hsd, uint64_t addr) -{ - SDMMC_CmdInitTypeDef sdmmc_cmdinitstructure; - HAL_SD_ErrorTypedef errorstate = SD_OK; - - /* Send CMD7 SDMMC_SEL_DESEL_CARD */ - sdmmc_cmdinitstructure.Argument = (uint32_t)addr; - sdmmc_cmdinitstructure.CmdIndex = SD_CMD_SEL_DESEL_CARD; - sdmmc_cmdinitstructure.Response = SDMMC_RESPONSE_SHORT; - sdmmc_cmdinitstructure.WaitForInterrupt = SDMMC_WAIT_NO; - sdmmc_cmdinitstructure.CPSM = SDMMC_CPSM_ENABLE; - SDMMC_SendCommand(hsd->Instance, &sdmmc_cmdinitstructure); - - /* Check for error conditions */ - errorstate = SD_CmdResp1Error(hsd, SD_CMD_SEL_DESEL_CARD); - - return errorstate; -} - -/** - * @brief Enquires cards about their operating voltage and configures clock - * controls and stores SD information that will be needed in future - * in the SD handle. - * @param hsd: SD handle - * @retval SD Card error state - */ -static HAL_SD_ErrorTypedef SD_PowerON(SD_HandleTypeDef *hsd) -{ - SDMMC_CmdInitTypeDef sdmmc_cmdinitstructure; - __IO HAL_SD_ErrorTypedef errorstate = SD_OK; - uint32_t response = 0, count = 0, validvoltage = 0; - uint32_t sdtype = SD_STD_CAPACITY; - - /* Power ON Sequence -------------------------------------------------------*/ - /* Disable SDMMC Clock */ - __HAL_SD_SDMMC_DISABLE(hsd); - - /* Set Power State to ON */ - SDMMC_PowerState_ON(hsd->Instance); - - /* 1ms: required power up waiting time before starting the SD initialization - sequence */ - HAL_Delay(1); - - /* Enable SDMMC Clock */ - __HAL_SD_SDMMC_ENABLE(hsd); - - /* CMD0: GO_IDLE_STATE -----------------------------------------------------*/ - /* No CMD response required */ - sdmmc_cmdinitstructure.Argument = 0; - sdmmc_cmdinitstructure.CmdIndex = SD_CMD_GO_IDLE_STATE; - sdmmc_cmdinitstructure.Response = SDMMC_RESPONSE_NO; - sdmmc_cmdinitstructure.WaitForInterrupt = SDMMC_WAIT_NO; - sdmmc_cmdinitstructure.CPSM = SDMMC_CPSM_ENABLE; - SDMMC_SendCommand(hsd->Instance, &sdmmc_cmdinitstructure); - - /* Check for error conditions */ - errorstate = SD_CmdError(hsd); - - if(errorstate != SD_OK) - { - /* CMD Response Timeout (wait for CMDSENT flag) */ - return errorstate; - } - - /* CMD8: SEND_IF_COND ------------------------------------------------------*/ - /* Send CMD8 to verify SD card interface operating condition */ - /* Argument: - [31:12]: Reserved (shall be set to '0') - - [11:8]: Supply Voltage (VHS) 0x1 (Range: 2.7-3.6 V) - - [7:0]: Check Pattern (recommended 0xAA) */ - /* CMD Response: R7 */ - sdmmc_cmdinitstructure.Argument = SD_CHECK_PATTERN; - sdmmc_cmdinitstructure.CmdIndex = SD_SDMMC_SEND_IF_COND; - sdmmc_cmdinitstructure.Response = SDMMC_RESPONSE_SHORT; - SDMMC_SendCommand(hsd->Instance, &sdmmc_cmdinitstructure); - - /* Check for error conditions */ - errorstate = SD_CmdResp7Error(hsd); - - if (errorstate == SD_OK) - { - /* SD Card 2.0 */ - hsd->CardType = STD_CAPACITY_SD_CARD_V2_0; - sdtype = SD_HIGH_CAPACITY; - } - - /* Send CMD55 */ - sdmmc_cmdinitstructure.Argument = 0; - sdmmc_cmdinitstructure.CmdIndex = SD_CMD_APP_CMD; - SDMMC_SendCommand(hsd->Instance, &sdmmc_cmdinitstructure); - - /* Check for error conditions */ - errorstate = SD_CmdResp1Error(hsd, SD_CMD_APP_CMD); - - /* If errorstate is Command Timeout, it is a MMC card */ - /* If errorstate is SD_OK it is a SD card: SD card 2.0 (voltage range mismatch) - or SD card 1.x */ - if(errorstate == SD_OK) - { - /* SD CARD */ - /* Send ACMD41 SD_APP_OP_COND with Argument 0x80100000 */ - while((!validvoltage) && (count < SD_MAX_VOLT_TRIAL)) - { - - /* SEND CMD55 APP_CMD with RCA as 0 */ - sdmmc_cmdinitstructure.Argument = 0; - sdmmc_cmdinitstructure.CmdIndex = SD_CMD_APP_CMD; - sdmmc_cmdinitstructure.Response = SDMMC_RESPONSE_SHORT; - sdmmc_cmdinitstructure.WaitForInterrupt = SDMMC_WAIT_NO; - sdmmc_cmdinitstructure.CPSM = SDMMC_CPSM_ENABLE; - SDMMC_SendCommand(hsd->Instance, &sdmmc_cmdinitstructure); - - /* Check for error conditions */ - errorstate = SD_CmdResp1Error(hsd, SD_CMD_APP_CMD); - - if(errorstate != SD_OK) - { - return errorstate; - } - - /* Send CMD41 */ - sdmmc_cmdinitstructure.Argument = SD_VOLTAGE_WINDOW_SD | sdtype; - sdmmc_cmdinitstructure.CmdIndex = SD_CMD_SD_APP_OP_COND; - sdmmc_cmdinitstructure.Response = SDMMC_RESPONSE_SHORT; - sdmmc_cmdinitstructure.WaitForInterrupt = SDMMC_WAIT_NO; - sdmmc_cmdinitstructure.CPSM = SDMMC_CPSM_ENABLE; - SDMMC_SendCommand(hsd->Instance, &sdmmc_cmdinitstructure); - - /* Check for error conditions */ - errorstate = SD_CmdResp3Error(hsd); - - if(errorstate != SD_OK) - { - return errorstate; - } - - /* Get command response */ - response = SDMMC_GetResponse(hsd->Instance, SDMMC_RESP1); - - /* Get operating voltage*/ - validvoltage = (((response >> 31) == 1) ? 1 : 0); - - count++; - } - - if(count >= SD_MAX_VOLT_TRIAL) - { - errorstate = SD_INVALID_VOLTRANGE; - - return errorstate; - } - - if((response & SD_HIGH_CAPACITY) == SD_HIGH_CAPACITY) /* (response &= SD_HIGH_CAPACITY) */ - { - hsd->CardType = HIGH_CAPACITY_SD_CARD; - } - - } /* else MMC Card */ - - return errorstate; -} - -/** - * @brief Turns the SDMMC output signals off. - * @param hsd: SD handle - * @retval SD Card error state - */ -static HAL_SD_ErrorTypedef SD_PowerOFF(SD_HandleTypeDef *hsd) -{ - HAL_SD_ErrorTypedef errorstate = SD_OK; - - /* Set Power State to OFF */ - SDMMC_PowerState_OFF(hsd->Instance); - - return errorstate; -} - -/** - * @brief Returns the current card's status. - * @param hsd: SD handle - * @param pCardStatus: pointer to the buffer that will contain the SD card - * status (Card Status register) - * @retval SD Card error state - */ -static HAL_SD_ErrorTypedef SD_SendStatus(SD_HandleTypeDef *hsd, uint32_t *pCardStatus) -{ - SDMMC_CmdInitTypeDef sdmmc_cmdinitstructure; - HAL_SD_ErrorTypedef errorstate = SD_OK; - - if(pCardStatus == NULL) - { - errorstate = SD_INVALID_PARAMETER; - - return errorstate; - } - - /* Send Status command */ - sdmmc_cmdinitstructure.Argument = (uint32_t)(hsd->RCA << 16); - sdmmc_cmdinitstructure.CmdIndex = SD_CMD_SEND_STATUS; - sdmmc_cmdinitstructure.Response = SDMMC_RESPONSE_SHORT; - sdmmc_cmdinitstructure.WaitForInterrupt = SDMMC_WAIT_NO; - sdmmc_cmdinitstructure.CPSM = SDMMC_CPSM_ENABLE; - SDMMC_SendCommand(hsd->Instance, &sdmmc_cmdinitstructure); - - /* Check for error conditions */ - errorstate = SD_CmdResp1Error(hsd, SD_CMD_SEND_STATUS); - - if(errorstate != SD_OK) - { - return errorstate; - } - - /* Get SD card status */ - *pCardStatus = SDMMC_GetResponse(hsd->Instance, SDMMC_RESP1); - - return errorstate; -} - -/** - * @brief Checks for error conditions for CMD0. - * @param hsd: SD handle - * @retval SD Card error state - */ -static HAL_SD_ErrorTypedef SD_CmdError(SD_HandleTypeDef *hsd) -{ - HAL_SD_ErrorTypedef errorstate = SD_OK; - uint32_t timeout, tmp; - - timeout = SDMMC_CMD0TIMEOUT; - - tmp = __HAL_SD_SDMMC_GET_FLAG(hsd, SDMMC_FLAG_CMDSENT); - - while((timeout > 0) && (!tmp)) - { - tmp = __HAL_SD_SDMMC_GET_FLAG(hsd, SDMMC_FLAG_CMDSENT); - timeout--; - } - - if(timeout == 0) - { - errorstate = SD_CMD_RSP_TIMEOUT; - return errorstate; - } - - /* Clear all the static flags */ - __HAL_SD_SDMMC_CLEAR_FLAG(hsd, SDMMC_STATIC_FLAGS); - - return errorstate; -} - -/** - * @brief Checks for error conditions for R7 response. - * @param hsd: SD handle - * @retval SD Card error state - */ -static HAL_SD_ErrorTypedef SD_CmdResp7Error(SD_HandleTypeDef *hsd) -{ - HAL_SD_ErrorTypedef errorstate = SD_ERROR; - uint32_t timeout = SDMMC_CMD0TIMEOUT, tmp; - - tmp = __HAL_SD_SDMMC_GET_FLAG(hsd, SDMMC_FLAG_CCRCFAIL | SDMMC_FLAG_CMDREND | SDMMC_FLAG_CTIMEOUT); - - while((!tmp) && (timeout > 0)) - { - tmp = __HAL_SD_SDMMC_GET_FLAG(hsd, SDMMC_FLAG_CCRCFAIL | SDMMC_FLAG_CMDREND | SDMMC_FLAG_CTIMEOUT); - timeout--; - } - - tmp = __HAL_SD_SDMMC_GET_FLAG(hsd, SDMMC_FLAG_CTIMEOUT); - - if((timeout == 0) || tmp) - { - /* Card is not V2.0 compliant or card does not support the set voltage range */ - errorstate = SD_CMD_RSP_TIMEOUT; - - __HAL_SD_SDMMC_CLEAR_FLAG(hsd, SDMMC_FLAG_CTIMEOUT); - - return errorstate; - } - - if(__HAL_SD_SDMMC_GET_FLAG(hsd, SDMMC_FLAG_CMDREND)) - { - /* Card is SD V2.0 compliant */ - errorstate = SD_OK; - - __HAL_SD_SDMMC_CLEAR_FLAG(hsd, SDMMC_FLAG_CMDREND); - - return errorstate; - } - - return errorstate; -} - -/** - * @brief Checks for error conditions for R1 response. - * @param hsd: SD handle - * @param SD_CMD: The sent command index - * @retval SD Card error state - */ -static HAL_SD_ErrorTypedef SD_CmdResp1Error(SD_HandleTypeDef *hsd, uint8_t SD_CMD) -{ - HAL_SD_ErrorTypedef errorstate = SD_OK; - uint32_t response_r1; - - while(!__HAL_SD_SDMMC_GET_FLAG(hsd, SDMMC_FLAG_CCRCFAIL | SDMMC_FLAG_CMDREND | SDMMC_FLAG_CTIMEOUT)) - { - } - - if(__HAL_SD_SDMMC_GET_FLAG(hsd, SDMMC_FLAG_CTIMEOUT)) - { - errorstate = SD_CMD_RSP_TIMEOUT; - - __HAL_SD_SDMMC_CLEAR_FLAG(hsd, SDMMC_FLAG_CTIMEOUT); - - return errorstate; - } - else if(__HAL_SD_SDMMC_GET_FLAG(hsd, SDMMC_FLAG_CCRCFAIL)) - { - errorstate = SD_CMD_CRC_FAIL; - - __HAL_SD_SDMMC_CLEAR_FLAG(hsd, SDMMC_FLAG_CCRCFAIL); - - return errorstate; - } - - /* Check response received is of desired command */ - if(SDMMC_GetCommandResponse(hsd->Instance) != SD_CMD) - { - errorstate = SD_ILLEGAL_CMD; - - return errorstate; - } - - /* Clear all the static flags */ - __HAL_SD_SDMMC_CLEAR_FLAG(hsd, SDMMC_STATIC_FLAGS); - - /* We have received response, retrieve it for analysis */ - response_r1 = SDMMC_GetResponse(hsd->Instance, SDMMC_RESP1); - - if((response_r1 & SD_OCR_ERRORBITS) == SD_ALLZERO) - { - return errorstate; - } - - if((response_r1 & SD_OCR_ADDR_OUT_OF_RANGE) == SD_OCR_ADDR_OUT_OF_RANGE) - { - return(SD_ADDR_OUT_OF_RANGE); - } - - if((response_r1 & SD_OCR_ADDR_MISALIGNED) == SD_OCR_ADDR_MISALIGNED) - { - return(SD_ADDR_MISALIGNED); - } - - if((response_r1 & SD_OCR_BLOCK_LEN_ERR) == SD_OCR_BLOCK_LEN_ERR) - { - return(SD_BLOCK_LEN_ERR); - } - - if((response_r1 & SD_OCR_ERASE_SEQ_ERR) == SD_OCR_ERASE_SEQ_ERR) - { - return(SD_ERASE_SEQ_ERR); - } - - if((response_r1 & SD_OCR_BAD_ERASE_PARAM) == SD_OCR_BAD_ERASE_PARAM) - { - return(SD_BAD_ERASE_PARAM); - } - - if((response_r1 & SD_OCR_WRITE_PROT_VIOLATION) == SD_OCR_WRITE_PROT_VIOLATION) - { - return(SD_WRITE_PROT_VIOLATION); - } - - if((response_r1 & SD_OCR_LOCK_UNLOCK_FAILED) == SD_OCR_LOCK_UNLOCK_FAILED) - { - return(SD_LOCK_UNLOCK_FAILED); - } - - if((response_r1 & SD_OCR_COM_CRC_FAILED) == SD_OCR_COM_CRC_FAILED) - { - return(SD_COM_CRC_FAILED); - } - - if((response_r1 & SD_OCR_ILLEGAL_CMD) == SD_OCR_ILLEGAL_CMD) - { - return(SD_ILLEGAL_CMD); - } - - if((response_r1 & SD_OCR_CARD_ECC_FAILED) == SD_OCR_CARD_ECC_FAILED) - { - return(SD_CARD_ECC_FAILED); - } - - if((response_r1 & SD_OCR_CC_ERROR) == SD_OCR_CC_ERROR) - { - return(SD_CC_ERROR); - } - - if((response_r1 & SD_OCR_GENERAL_UNKNOWN_ERROR) == SD_OCR_GENERAL_UNKNOWN_ERROR) - { - return(SD_GENERAL_UNKNOWN_ERROR); - } - - if((response_r1 & SD_OCR_STREAM_READ_UNDERRUN) == SD_OCR_STREAM_READ_UNDERRUN) - { - return(SD_STREAM_READ_UNDERRUN); - } - - if((response_r1 & SD_OCR_STREAM_WRITE_OVERRUN) == SD_OCR_STREAM_WRITE_OVERRUN) - { - return(SD_STREAM_WRITE_OVERRUN); - } - - if((response_r1 & SD_OCR_CID_CSD_OVERWRITE) == SD_OCR_CID_CSD_OVERWRITE) - { - return(SD_CID_CSD_OVERWRITE); - } - - if((response_r1 & SD_OCR_WP_ERASE_SKIP) == SD_OCR_WP_ERASE_SKIP) - { - return(SD_WP_ERASE_SKIP); - } - - if((response_r1 & SD_OCR_CARD_ECC_DISABLED) == SD_OCR_CARD_ECC_DISABLED) - { - return(SD_CARD_ECC_DISABLED); - } - - if((response_r1 & SD_OCR_ERASE_RESET) == SD_OCR_ERASE_RESET) - { - return(SD_ERASE_RESET); - } - - if((response_r1 & SD_OCR_AKE_SEQ_ERROR) == SD_OCR_AKE_SEQ_ERROR) - { - return(SD_AKE_SEQ_ERROR); - } - - return errorstate; -} - -/** - * @brief Checks for error conditions for R3 (OCR) response. - * @param hsd: SD handle - * @retval SD Card error state - */ -static HAL_SD_ErrorTypedef SD_CmdResp3Error(SD_HandleTypeDef *hsd) -{ - HAL_SD_ErrorTypedef errorstate = SD_OK; - - while (!__HAL_SD_SDMMC_GET_FLAG(hsd, SDMMC_FLAG_CCRCFAIL | SDMMC_FLAG_CMDREND | SDMMC_FLAG_CTIMEOUT)) - { - } - - if (__HAL_SD_SDMMC_GET_FLAG(hsd, SDMMC_FLAG_CTIMEOUT)) - { - errorstate = SD_CMD_RSP_TIMEOUT; - - __HAL_SD_SDMMC_CLEAR_FLAG(hsd, SDMMC_FLAG_CTIMEOUT); - - return errorstate; - } - - /* Clear all the static flags */ - __HAL_SD_SDMMC_CLEAR_FLAG(hsd, SDMMC_STATIC_FLAGS); - - return errorstate; -} - -/** - * @brief Checks for error conditions for R2 (CID or CSD) response. - * @param hsd: SD handle - * @retval SD Card error state - */ -static HAL_SD_ErrorTypedef SD_CmdResp2Error(SD_HandleTypeDef *hsd) -{ - HAL_SD_ErrorTypedef errorstate = SD_OK; - - while (!__HAL_SD_SDMMC_GET_FLAG(hsd, SDMMC_FLAG_CCRCFAIL | SDMMC_FLAG_CMDREND | SDMMC_FLAG_CTIMEOUT)) - { - } - - if (__HAL_SD_SDMMC_GET_FLAG(hsd, SDMMC_FLAG_CTIMEOUT)) - { - errorstate = SD_CMD_RSP_TIMEOUT; - - __HAL_SD_SDMMC_CLEAR_FLAG(hsd, SDMMC_FLAG_CTIMEOUT); - - return errorstate; - } - else if (__HAL_SD_SDMMC_GET_FLAG(hsd, SDMMC_FLAG_CCRCFAIL)) - { - errorstate = SD_CMD_CRC_FAIL; - - __HAL_SD_SDMMC_CLEAR_FLAG(hsd, SDMMC_FLAG_CCRCFAIL); - - return errorstate; - } - else - { - /* No error flag set */ - } - - /* Clear all the static flags */ - __HAL_SD_SDMMC_CLEAR_FLAG(hsd, SDMMC_STATIC_FLAGS); - - return errorstate; -} - -/** - * @brief Checks for error conditions for R6 (RCA) response. - * @param hsd: SD handle - * @param SD_CMD: The sent command index - * @param pRCA: Pointer to the variable that will contain the SD card relative - * address RCA - * @retval SD Card error state - */ -static HAL_SD_ErrorTypedef SD_CmdResp6Error(SD_HandleTypeDef *hsd, uint8_t SD_CMD, uint16_t *pRCA) -{ - HAL_SD_ErrorTypedef errorstate = SD_OK; - uint32_t response_r1; - - while(!__HAL_SD_SDMMC_GET_FLAG(hsd, SDMMC_FLAG_CCRCFAIL | SDMMC_FLAG_CMDREND | SDMMC_FLAG_CTIMEOUT)) - { - } - - if(__HAL_SD_SDMMC_GET_FLAG(hsd, SDMMC_FLAG_CTIMEOUT)) - { - errorstate = SD_CMD_RSP_TIMEOUT; - - __HAL_SD_SDMMC_CLEAR_FLAG(hsd, SDMMC_FLAG_CTIMEOUT); - - return errorstate; - } - else if(__HAL_SD_SDMMC_GET_FLAG(hsd, SDMMC_FLAG_CCRCFAIL)) - { - errorstate = SD_CMD_CRC_FAIL; - - __HAL_SD_SDMMC_CLEAR_FLAG(hsd, SDMMC_FLAG_CCRCFAIL); - - return errorstate; - } - else - { - /* No error flag set */ - } - - /* Check response received is of desired command */ - if(SDMMC_GetCommandResponse(hsd->Instance) != SD_CMD) - { - errorstate = SD_ILLEGAL_CMD; - - return errorstate; - } - - /* Clear all the static flags */ - __HAL_SD_SDMMC_CLEAR_FLAG(hsd, SDMMC_STATIC_FLAGS); - - /* We have received response, retrieve it. */ - response_r1 = SDMMC_GetResponse(hsd->Instance, SDMMC_RESP1); - - if((response_r1 & (SD_R6_GENERAL_UNKNOWN_ERROR | SD_R6_ILLEGAL_CMD | SD_R6_COM_CRC_FAILED)) == SD_ALLZERO) - { - *pRCA = (uint16_t) (response_r1 >> 16); - - return errorstate; - } - - if((response_r1 & SD_R6_GENERAL_UNKNOWN_ERROR) == SD_R6_GENERAL_UNKNOWN_ERROR) - { - return(SD_GENERAL_UNKNOWN_ERROR); - } - - if((response_r1 & SD_R6_ILLEGAL_CMD) == SD_R6_ILLEGAL_CMD) - { - return(SD_ILLEGAL_CMD); - } - - if((response_r1 & SD_R6_COM_CRC_FAILED) == SD_R6_COM_CRC_FAILED) - { - return(SD_COM_CRC_FAILED); - } - - return errorstate; -} - -/** - * @brief Enables the SDMMC wide bus mode. - * @param hsd: SD handle - * @retval SD Card error state - */ -static HAL_SD_ErrorTypedef SD_WideBus_Enable(SD_HandleTypeDef *hsd) -{ - SDMMC_CmdInitTypeDef sdmmc_cmdinitstructure; - HAL_SD_ErrorTypedef errorstate = SD_OK; - - uint32_t scr[2] = {0, 0}; - - if((SDMMC_GetResponse(hsd->Instance, SDMMC_RESP1) & SD_CARD_LOCKED) == SD_CARD_LOCKED) - { - errorstate = SD_LOCK_UNLOCK_FAILED; - - return errorstate; - } - - /* Get SCR Register */ - errorstate = SD_FindSCR(hsd, scr); - - if(errorstate != SD_OK) - { - return errorstate; - } - - /* If requested card supports wide bus operation */ - if((scr[1] & SD_WIDE_BUS_SUPPORT) != SD_ALLZERO) - { - /* Send CMD55 APP_CMD with argument as card's RCA.*/ - sdmmc_cmdinitstructure.Argument = (uint32_t)(hsd->RCA << 16); - sdmmc_cmdinitstructure.CmdIndex = SD_CMD_APP_CMD; - sdmmc_cmdinitstructure.Response = SDMMC_RESPONSE_SHORT; - sdmmc_cmdinitstructure.WaitForInterrupt = SDMMC_WAIT_NO; - sdmmc_cmdinitstructure.CPSM = SDMMC_CPSM_ENABLE; - SDMMC_SendCommand(hsd->Instance, &sdmmc_cmdinitstructure); - - /* Check for error conditions */ - errorstate = SD_CmdResp1Error(hsd, SD_CMD_APP_CMD); - - if(errorstate != SD_OK) - { - return errorstate; - } - - /* Send ACMD6 APP_CMD with argument as 2 for wide bus mode */ - sdmmc_cmdinitstructure.Argument = 2; - sdmmc_cmdinitstructure.CmdIndex = SD_CMD_APP_SD_SET_BUSWIDTH; - SDMMC_SendCommand(hsd->Instance, &sdmmc_cmdinitstructure); - - /* Check for error conditions */ - errorstate = SD_CmdResp1Error(hsd, SD_CMD_APP_SD_SET_BUSWIDTH); - - if(errorstate != SD_OK) - { - return errorstate; - } - - return errorstate; - } - else - { - errorstate = SD_REQUEST_NOT_APPLICABLE; - - return errorstate; - } -} - -/** - * @brief Disables the SDMMC wide bus mode. - * @param hsd: SD handle - * @retval SD Card error state - */ -static HAL_SD_ErrorTypedef SD_WideBus_Disable(SD_HandleTypeDef *hsd) -{ - SDMMC_CmdInitTypeDef sdmmc_cmdinitstructure; - HAL_SD_ErrorTypedef errorstate = SD_OK; - - uint32_t scr[2] = {0, 0}; - - if((SDMMC_GetResponse(hsd->Instance, SDMMC_RESP1) & SD_CARD_LOCKED) == SD_CARD_LOCKED) - { - errorstate = SD_LOCK_UNLOCK_FAILED; - - return errorstate; - } - - /* Get SCR Register */ - errorstate = SD_FindSCR(hsd, scr); - - if(errorstate != SD_OK) - { - return errorstate; - } - - /* If requested card supports 1 bit mode operation */ - if((scr[1] & SD_SINGLE_BUS_SUPPORT) != SD_ALLZERO) - { - /* Send CMD55 APP_CMD with argument as card's RCA */ - sdmmc_cmdinitstructure.Argument = (uint32_t)(hsd->RCA << 16); - sdmmc_cmdinitstructure.CmdIndex = SD_CMD_APP_CMD; - sdmmc_cmdinitstructure.Response = SDMMC_RESPONSE_SHORT; - sdmmc_cmdinitstructure.WaitForInterrupt = SDMMC_WAIT_NO; - sdmmc_cmdinitstructure.CPSM = SDMMC_CPSM_ENABLE; - SDMMC_SendCommand(hsd->Instance, &sdmmc_cmdinitstructure); - - /* Check for error conditions */ - errorstate = SD_CmdResp1Error(hsd, SD_CMD_APP_CMD); - - if(errorstate != SD_OK) - { - return errorstate; - } - - /* Send ACMD6 APP_CMD with argument as 0 for single bus mode */ - sdmmc_cmdinitstructure.Argument = 0; - sdmmc_cmdinitstructure.CmdIndex = SD_CMD_APP_SD_SET_BUSWIDTH; - SDMMC_SendCommand(hsd->Instance, &sdmmc_cmdinitstructure); - - /* Check for error conditions */ - errorstate = SD_CmdResp1Error(hsd, SD_CMD_APP_SD_SET_BUSWIDTH); - - if(errorstate != SD_OK) - { - return errorstate; - } - - return errorstate; - } - else - { - errorstate = SD_REQUEST_NOT_APPLICABLE; - - return errorstate; - } -} - - -/** - * @brief Finds the SD card SCR register value. - * @param hsd: SD handle - * @param pSCR: pointer to the buffer that will contain the SCR value - * @retval SD Card error state - */ -static HAL_SD_ErrorTypedef SD_FindSCR(SD_HandleTypeDef *hsd, uint32_t *pSCR) -{ - SDMMC_CmdInitTypeDef sdmmc_cmdinitstructure; - SDMMC_DataInitTypeDef sdmmc_datainitstructure; - HAL_SD_ErrorTypedef errorstate = SD_OK; - uint32_t index = 0; - uint32_t tempscr[2] = {0, 0}; - - /* Set Block Size To 8 Bytes */ - /* Send CMD55 APP_CMD with argument as card's RCA */ - sdmmc_cmdinitstructure.Argument = (uint32_t)8; - sdmmc_cmdinitstructure.CmdIndex = SD_CMD_SET_BLOCKLEN; - sdmmc_cmdinitstructure.Response = SDMMC_RESPONSE_SHORT; - sdmmc_cmdinitstructure.WaitForInterrupt = SDMMC_WAIT_NO; - sdmmc_cmdinitstructure.CPSM = SDMMC_CPSM_ENABLE; - SDMMC_SendCommand(hsd->Instance, &sdmmc_cmdinitstructure); - - /* Check for error conditions */ - errorstate = SD_CmdResp1Error(hsd, SD_CMD_SET_BLOCKLEN); - - if(errorstate != SD_OK) - { - return errorstate; - } - - /* Send CMD55 APP_CMD with argument as card's RCA */ - sdmmc_cmdinitstructure.Argument = (uint32_t)((hsd->RCA) << 16); - sdmmc_cmdinitstructure.CmdIndex = SD_CMD_APP_CMD; - SDMMC_SendCommand(hsd->Instance, &sdmmc_cmdinitstructure); - - /* Check for error conditions */ - errorstate = SD_CmdResp1Error(hsd, SD_CMD_APP_CMD); - - if(errorstate != SD_OK) - { - return errorstate; - } - sdmmc_datainitstructure.DataTimeOut = SD_DATATIMEOUT; - sdmmc_datainitstructure.DataLength = 8; - sdmmc_datainitstructure.DataBlockSize = SDMMC_DATABLOCK_SIZE_8B; - sdmmc_datainitstructure.TransferDir = SDMMC_TRANSFER_DIR_TO_SDMMC; - sdmmc_datainitstructure.TransferMode = SDMMC_TRANSFER_MODE_BLOCK; - sdmmc_datainitstructure.DPSM = SDMMC_DPSM_ENABLE; - SDMMC_DataConfig(hsd->Instance, &sdmmc_datainitstructure); - - /* Send ACMD51 SD_APP_SEND_SCR with argument as 0 */ - sdmmc_cmdinitstructure.Argument = 0; - sdmmc_cmdinitstructure.CmdIndex = SD_CMD_SD_APP_SEND_SCR; - SDMMC_SendCommand(hsd->Instance, &sdmmc_cmdinitstructure); - - /* Check for error conditions */ - errorstate = SD_CmdResp1Error(hsd, SD_CMD_SD_APP_SEND_SCR); - - if(errorstate != SD_OK) - { - return errorstate; - } - - while(!__HAL_SD_SDMMC_GET_FLAG(hsd, SDMMC_FLAG_RXOVERR | SDMMC_FLAG_DCRCFAIL | SDMMC_FLAG_DTIMEOUT | SDMMC_FLAG_DBCKEND)) - { - if(__HAL_SD_SDMMC_GET_FLAG(hsd, SDMMC_FLAG_RXDAVL)) - { - *(tempscr + index) = SDMMC_ReadFIFO(hsd->Instance); - index++; - } - } - - if(__HAL_SD_SDMMC_GET_FLAG(hsd, SDMMC_FLAG_DTIMEOUT)) - { - __HAL_SD_SDMMC_CLEAR_FLAG(hsd, SDMMC_FLAG_DTIMEOUT); - - errorstate = SD_DATA_TIMEOUT; - - return errorstate; - } - else if(__HAL_SD_SDMMC_GET_FLAG(hsd, SDMMC_FLAG_DCRCFAIL)) - { - __HAL_SD_SDMMC_CLEAR_FLAG(hsd, SDMMC_FLAG_DCRCFAIL); - - errorstate = SD_DATA_CRC_FAIL; - - return errorstate; - } - else if(__HAL_SD_SDMMC_GET_FLAG(hsd, SDMMC_FLAG_RXOVERR)) - { - __HAL_SD_SDMMC_CLEAR_FLAG(hsd, SDMMC_FLAG_RXOVERR); - - errorstate = SD_RX_OVERRUN; - - return errorstate; - } - else - { - /* No error flag set */ - } - - /* Clear all the static flags */ - __HAL_SD_SDMMC_CLEAR_FLAG(hsd, SDMMC_STATIC_FLAGS); - - *(pSCR + 1) = ((tempscr[0] & SD_0TO7BITS) << 24) | ((tempscr[0] & SD_8TO15BITS) << 8) |\ - ((tempscr[0] & SD_16TO23BITS) >> 8) | ((tempscr[0] & SD_24TO31BITS) >> 24); - - *(pSCR) = ((tempscr[1] & SD_0TO7BITS) << 24) | ((tempscr[1] & SD_8TO15BITS) << 8) |\ - ((tempscr[1] & SD_16TO23BITS) >> 8) | ((tempscr[1] & SD_24TO31BITS) >> 24); - - return errorstate; -} - -/** - * @brief Checks if the SD card is in programming state. - * @param hsd: SD handle - * @param pStatus: pointer to the variable that will contain the SD card state - * @retval SD Card error state - */ -static HAL_SD_ErrorTypedef SD_IsCardProgramming(SD_HandleTypeDef *hsd, uint8_t *pStatus) -{ - SDMMC_CmdInitTypeDef sdmmc_cmdinitstructure; - HAL_SD_ErrorTypedef errorstate = SD_OK; - __IO uint32_t responseR1 = 0; - - sdmmc_cmdinitstructure.Argument = (uint32_t)(hsd->RCA << 16); - sdmmc_cmdinitstructure.CmdIndex = SD_CMD_SEND_STATUS; - sdmmc_cmdinitstructure.Response = SDMMC_RESPONSE_SHORT; - sdmmc_cmdinitstructure.WaitForInterrupt = SDMMC_WAIT_NO; - sdmmc_cmdinitstructure.CPSM = SDMMC_CPSM_ENABLE; - SDMMC_SendCommand(hsd->Instance, &sdmmc_cmdinitstructure); - - while(!__HAL_SD_SDMMC_GET_FLAG(hsd, SDMMC_FLAG_CCRCFAIL | SDMMC_FLAG_CMDREND | SDMMC_FLAG_CTIMEOUT)) - { - } - - if(__HAL_SD_SDMMC_GET_FLAG(hsd, SDMMC_FLAG_CTIMEOUT)) - { - errorstate = SD_CMD_RSP_TIMEOUT; - - __HAL_SD_SDMMC_CLEAR_FLAG(hsd, SDMMC_FLAG_CTIMEOUT); - - return errorstate; - } - else if(__HAL_SD_SDMMC_GET_FLAG(hsd, SDMMC_FLAG_CCRCFAIL)) - { - errorstate = SD_CMD_CRC_FAIL; - - __HAL_SD_SDMMC_CLEAR_FLAG(hsd, SDMMC_FLAG_CCRCFAIL); - - return errorstate; - } - else - { - /* No error flag set */ - } - - /* Check response received is of desired command */ - if((uint32_t)SDMMC_GetCommandResponse(hsd->Instance) != SD_CMD_SEND_STATUS) - { - errorstate = SD_ILLEGAL_CMD; - - return errorstate; - } - - /* Clear all the static flags */ - __HAL_SD_SDMMC_CLEAR_FLAG(hsd, SDMMC_STATIC_FLAGS); - - - /* We have received response, retrieve it for analysis */ - responseR1 = SDMMC_GetResponse(hsd->Instance, SDMMC_RESP1); - - /* Find out card status */ - *pStatus = (uint8_t)((responseR1 >> 9) & 0x0000000F); - - if((responseR1 & SD_OCR_ERRORBITS) == SD_ALLZERO) - { - return errorstate; - } - - if((responseR1 & SD_OCR_ADDR_OUT_OF_RANGE) == SD_OCR_ADDR_OUT_OF_RANGE) - { - return(SD_ADDR_OUT_OF_RANGE); - } - - if((responseR1 & SD_OCR_ADDR_MISALIGNED) == SD_OCR_ADDR_MISALIGNED) - { - return(SD_ADDR_MISALIGNED); - } - - if((responseR1 & SD_OCR_BLOCK_LEN_ERR) == SD_OCR_BLOCK_LEN_ERR) - { - return(SD_BLOCK_LEN_ERR); - } - - if((responseR1 & SD_OCR_ERASE_SEQ_ERR) == SD_OCR_ERASE_SEQ_ERR) - { - return(SD_ERASE_SEQ_ERR); - } - - if((responseR1 & SD_OCR_BAD_ERASE_PARAM) == SD_OCR_BAD_ERASE_PARAM) - { - return(SD_BAD_ERASE_PARAM); - } - - if((responseR1 & SD_OCR_WRITE_PROT_VIOLATION) == SD_OCR_WRITE_PROT_VIOLATION) - { - return(SD_WRITE_PROT_VIOLATION); - } - - if((responseR1 & SD_OCR_LOCK_UNLOCK_FAILED) == SD_OCR_LOCK_UNLOCK_FAILED) - { - return(SD_LOCK_UNLOCK_FAILED); - } - - if((responseR1 & SD_OCR_COM_CRC_FAILED) == SD_OCR_COM_CRC_FAILED) - { - return(SD_COM_CRC_FAILED); - } - - if((responseR1 & SD_OCR_ILLEGAL_CMD) == SD_OCR_ILLEGAL_CMD) - { - return(SD_ILLEGAL_CMD); - } - - if((responseR1 & SD_OCR_CARD_ECC_FAILED) == SD_OCR_CARD_ECC_FAILED) - { - return(SD_CARD_ECC_FAILED); - } - - if((responseR1 & SD_OCR_CC_ERROR) == SD_OCR_CC_ERROR) - { - return(SD_CC_ERROR); - } - - if((responseR1 & SD_OCR_GENERAL_UNKNOWN_ERROR) == SD_OCR_GENERAL_UNKNOWN_ERROR) - { - return(SD_GENERAL_UNKNOWN_ERROR); - } - - if((responseR1 & SD_OCR_STREAM_READ_UNDERRUN) == SD_OCR_STREAM_READ_UNDERRUN) - { - return(SD_STREAM_READ_UNDERRUN); - } - - if((responseR1 & SD_OCR_STREAM_WRITE_OVERRUN) == SD_OCR_STREAM_WRITE_OVERRUN) - { - return(SD_STREAM_WRITE_OVERRUN); - } - - if((responseR1 & SD_OCR_CID_CSD_OVERWRITE) == SD_OCR_CID_CSD_OVERWRITE) - { - return(SD_CID_CSD_OVERWRITE); - } - - if((responseR1 & SD_OCR_WP_ERASE_SKIP) == SD_OCR_WP_ERASE_SKIP) - { - return(SD_WP_ERASE_SKIP); - } - - if((responseR1 & SD_OCR_CARD_ECC_DISABLED) == SD_OCR_CARD_ECC_DISABLED) - { - return(SD_CARD_ECC_DISABLED); - } - - if((responseR1 & SD_OCR_ERASE_RESET) == SD_OCR_ERASE_RESET) - { - return(SD_ERASE_RESET); - } - - if((responseR1 & SD_OCR_AKE_SEQ_ERROR) == SD_OCR_AKE_SEQ_ERROR) - { - return(SD_AKE_SEQ_ERROR); - } - - return errorstate; -} - -/** - * @} - */ - -#endif /* HAL_SD_MODULE_ENABLED */ - -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ -
--- a/Src/stm32l4xx_hal_smartcard.c Thu Nov 12 20:49:49 2015 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,1490 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_smartcard.c - * @author MCD Application Team - * @version V1.1.0 - * @date 16-September-2015 - * @brief SMARTCARD HAL module driver. - * This file provides firmware functions to manage the following - * functionalities of the SMARTCARD peripheral: - * + Initialization and de-initialization functions - * + IO operation functions - * + Peripheral Control functions - * + Peripheral State and Error functions - * - @verbatim - ============================================================================== - ##### How to use this driver ##### - ============================================================================== - [..] - The SMARTCARD HAL driver can be used as follows: - - (#) Declare a SMARTCARD_HandleTypeDef handle structure (eg. SMARTCARD_HandleTypeDef hsmartcard). - (#) Associate a USART to the SMARTCARD handle hsmartcard. - (#) Initialize the SMARTCARD low level resources by implementing the HAL_SMARTCARD_MspInit() API: - (++) Enable the USARTx interface clock. - (++) USART pins configuration: - (+++) Enable the clock for the USART GPIOs. - (+++) Configure the USART pins (TX as alternate function pull-up, RX as alternate function Input). - (++) NVIC configuration if you need to use interrupt process (HAL_SMARTCARD_Transmit_IT() - and HAL_SMARTCARD_Receive_IT() APIs): - (++) Configure the USARTx interrupt priority. - (++) Enable the NVIC USART IRQ handle. - (++) DMA Configuration if you need to use DMA process (HAL_SMARTCARD_Transmit_DMA() - and HAL_SMARTCARD_Receive_DMA() APIs): - (+++) Declare a DMA handle structure for the Tx/Rx channel. - (+++) Enable the DMAx interface clock. - (+++) Configure the declared DMA handle structure with the required Tx/Rx parameters. - (+++) Configure the DMA Tx/Rx channel. - (+++) Associate the initialized DMA handle to the SMARTCARD DMA Tx/Rx handle. - (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the DMA Tx/Rx channel. - - (#) Program the Baud Rate, Parity, Mode(Receiver/Transmitter), clock enabling/disabling and accordingly, - the clock parameters (parity, phase, last bit), prescaler value, guard time and NACK on transmission - error enabling or disabling in the hsmartcard handle Init structure. - - (#) If required, program SMARTCARD advanced features (TX/RX pins swap, TimeOut, auto-retry counter,...) - in the hsmartcard handle AdvancedInit structure. - - (#) Initialize the SMARTCARD registers by calling the HAL_SMARTCARD_Init() API: - (++) This API configures also the low level Hardware GPIO, CLOCK, CORTEX...etc) - by calling the customized HAL_SMARTCARD_MspInit() API. - [..] - (@) The specific SMARTCARD interrupts (Transmission complete interrupt, - RXNE interrupt and Error Interrupts) will be managed using the macros - __HAL_SMARTCARD_ENABLE_IT() and __HAL_SMARTCARD_DISABLE_IT() inside the transmit and receive process. - - [..] - [..] Three operation modes are available within this driver : - - *** Polling mode IO operation *** - ================================= - [..] - (+) Send an amount of data in blocking mode using HAL_SMARTCARD_Transmit() - (+) Receive an amount of data in blocking mode using HAL_SMARTCARD_Receive() - - *** Interrupt mode IO operation *** - =================================== - [..] - (+) Send an amount of data in non-blocking mode using HAL_SMARTCARD_Transmit_IT() - (+) At transmission end of transfer HAL_SMARTCARD_TxCpltCallback() is executed and user can - add his own code by customization of function pointer HAL_SMARTCARD_TxCpltCallback() - (+) Receive an amount of data in non-blocking mode using HAL_SMARTCARD_Receive_IT() - (+) At reception end of transfer HAL_SMARTCARD_RxCpltCallback() is executed and user can - add his own code by customization of function pointer HAL_SMARTCARD_RxCpltCallback() - (+) In case of transfer Error, HAL_SMARTCARD_ErrorCallback() function is executed and user can - add his own code by customization of function pointer HAL_SMARTCARD_ErrorCallback() - - *** DMA mode IO operation *** - ============================== - [..] - (+) Send an amount of data in non-blocking mode (DMA) using HAL_SMARTCARD_Transmit_DMA() - (+) At transmission end of transfer HAL_SMARTCARD_TxCpltCallback() is executed and user can - add his own code by customization of function pointer HAL_SMARTCARD_TxCpltCallback() - (+) Receive an amount of data in non-blocking mode (DMA) using HAL_SMARTCARD_Receive_DMA() - (+) At reception end of transfer HAL_SMARTCARD_RxCpltCallback() is executed and user can - add his own code by customization of function pointer HAL_SMARTCARD_RxCpltCallback() - (+) In case of transfer Error, HAL_SMARTCARD_ErrorCallback() function is executed and user can - add his own code by customization of function pointer HAL_SMARTCARD_ErrorCallback() - - *** SMARTCARD HAL driver macros list *** - ======================================== - [..] - Below the list of most used macros in SMARTCARD HAL driver. - - (+) __HAL_SMARTCARD_GET_FLAG : Check whether or not the specified SMARTCARD flag is set - (+) __HAL_SMARTCARD_CLEAR_FLAG : Clear the specified SMARTCARD pending flag - (+) __HAL_SMARTCARD_ENABLE_IT: Enable the specified SMARTCARD interrupt - (+) __HAL_SMARTCARD_DISABLE_IT: Disable the specified SMARTCARD interrupt - (+) __HAL_SMARTCARD_GET_IT_SOURCE: Check whether or not the specified SMARTCARD interrupt is enabled - - [..] - (@) You can refer to the SMARTCARD HAL driver header file for more useful macros - - @endverbatim - ****************************************************************************** - * @attention - * - * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @defgroup SMARTCARD SMARTCARD - * @brief HAL SMARTCARD module driver - * @{ - */ - -#ifdef HAL_SMARTCARD_MODULE_ENABLED - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -/** @defgroup SMARTCARD_Private_Constants SMARTCARD Private Constants - * @{ - */ -#define SMARTCARD_TEACK_REACK_TIMEOUT 1000 /*!< SMARTCARD TX or RX enable acknowledge time-out value */ - -#define USART_CR1_FIELDS ((uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | \ - USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8)) /*!< USART CR1 fields of parameters set by SMARTCARD_SetConfig API */ -#define USART_CR2_CLK_FIELDS ((uint32_t)(USART_CR2_CLKEN|USART_CR2_CPOL|USART_CR2_CPHA|USART_CR2_LBCL)) /*!< SMARTCARD clock-related USART CR2 fields of parameters */ -#define USART_CR2_FIELDS ((uint32_t)(USART_CR2_RTOEN|USART_CR2_CLK_FIELDS|USART_CR2_STOP)) /*!< USART CR2 fields of parameters set by SMARTCARD_SetConfig API */ -#define USART_CR3_FIELDS ((uint32_t)(USART_CR3_ONEBIT|USART_CR3_NACK|USART_CR3_SCARCNT)) /*!< USART CR3 fields of parameters set by SMARTCARD_SetConfig API */ -/** - * @} - */ - -/* Private macros ------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ -/** @addtogroup SMARTCARD_Private_Functions - * @{ - */ -static void SMARTCARD_DMATransmitCplt(DMA_HandleTypeDef *hdma); -static void SMARTCARD_DMAReceiveCplt(DMA_HandleTypeDef *hdma); -static void SMARTCARD_DMAError(DMA_HandleTypeDef *hdma); -static HAL_StatusTypeDef SMARTCARD_SetConfig(SMARTCARD_HandleTypeDef *hsmartcard); -static void SMARTCARD_AdvFeatureConfig(SMARTCARD_HandleTypeDef *hsmartcard); -static HAL_StatusTypeDef SMARTCARD_WaitOnFlagUntilTimeout(SMARTCARD_HandleTypeDef *hsmartcard, uint32_t Flag, FlagStatus Status, uint32_t Timeout); -static HAL_StatusTypeDef SMARTCARD_CheckIdleState(SMARTCARD_HandleTypeDef *hsmartcard); -static HAL_StatusTypeDef SMARTCARD_Transmit_IT(SMARTCARD_HandleTypeDef *hsmartcard); -static HAL_StatusTypeDef SMARTCARD_EndTransmit_IT(SMARTCARD_HandleTypeDef *hsmartcard); -static HAL_StatusTypeDef SMARTCARD_Receive_IT(SMARTCARD_HandleTypeDef *hsmartcard); -/** - * @} - */ - -/* Exported functions --------------------------------------------------------*/ - -/** @defgroup SMARTCARD_Exported_Functions SMARTCARD Exported Functions - * @{ - */ - -/** @defgroup SMARTCARD_Exported_Functions_Group1 Initialization and de-initialization functions - * @brief Initialization and Configuration functions - * -@verbatim - =============================================================================== - ##### Initialization and Configuration functions ##### - =============================================================================== - [..] - This subsection provides a set of functions allowing to initialize the USARTx - associated to the SmartCard. - (+) These parameters can be configured: - (++) Baud Rate - (++) Parity: parity should be enabled, - Frame Length is fixed to 8 bits plus parity: - the USART frame format is given in the following table: - - (+++) Table 1. USART frame format. - (+++) +---------------------------------------------------------------+ - (+++) | M1M0 bits | PCE bit | USART frame | - (+++) |-----------------------|---------------------------------------| - (+++) | 01 | 1 | | SB | 8 bit data | PB | STB | | - (+++) +---------------------------------------------------------------+ - - (++) Receiver/transmitter modes - (++) Synchronous mode (and if enabled, phase, polarity and last bit parameters) - (++) Prescaler value - (++) Guard bit time - (++) NACK enabling or disabling on transmission error - - (+) The following advanced features can be configured as well: - (++) TX and/or RX pin level inversion - (++) data logical level inversion - (++) RX and TX pins swap - (++) RX overrun detection disabling - (++) DMA disabling on RX error - (++) MSB first on communication line - (++) Time out enabling (and if activated, timeout value) - (++) Block length - (++) Auto-retry counter - [..] - The HAL_SMARTCARD_Init() API follows the USART synchronous configuration procedures - (details for the procedures are available in reference manual). - -@endverbatim - * @{ - */ - -/** - * @brief Initialize the SMARTCARD mode according to the specified - * parameters in the SMARTCARD_HandleTypeDef and initialize the associated handle. - * @param hsmartcard: Pointer to a SMARTCARD_HandleTypeDef structure that contains - * the configuration information for the specified SMARTCARD module. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SMARTCARD_Init(SMARTCARD_HandleTypeDef *hsmartcard) -{ - /* Check the SMARTCARD handle allocation */ - if(hsmartcard == NULL) - { - return HAL_ERROR; - } - - /* Check the USART associated to the SmartCard */ - assert_param(IS_SMARTCARD_INSTANCE(hsmartcard->Instance)); - - if(hsmartcard->State == HAL_SMARTCARD_STATE_RESET) - { - /* Allocate lock resource and initialize it */ - hsmartcard->Lock = HAL_UNLOCKED; - - /* Init the low level hardware : GPIO, CLOCK */ - HAL_SMARTCARD_MspInit(hsmartcard); - } - - hsmartcard->State = HAL_SMARTCARD_STATE_BUSY; - - /* Disable the Peripheral to set smartcard mode */ - CLEAR_BIT(hsmartcard->Instance->CR1, USART_CR1_UE); - - /* In SmartCard mode, the following bits must be kept cleared: - - LINEN in the USART_CR2 register, - - HDSEL and IREN bits in the USART_CR3 register.*/ - CLEAR_BIT(hsmartcard->Instance->CR2, USART_CR2_LINEN); - CLEAR_BIT(hsmartcard->Instance->CR3, (USART_CR3_HDSEL | USART_CR3_IREN)); - - /* set the USART in SMARTCARD mode */ - SET_BIT(hsmartcard->Instance->CR3, USART_CR3_SCEN); - - /* Set the SMARTCARD Communication parameters */ - if (SMARTCARD_SetConfig(hsmartcard) == HAL_ERROR) - { - return HAL_ERROR; - } - - if (hsmartcard->AdvancedInit.AdvFeatureInit != SMARTCARD_ADVFEATURE_NO_INIT) - { - SMARTCARD_AdvFeatureConfig(hsmartcard); - } - - /* Enable the Peripheral */ - SET_BIT(hsmartcard->Instance->CR1, USART_CR1_UE); - - /* TEACK and/or REACK to check before moving hsmartcard->State to Ready */ - return (SMARTCARD_CheckIdleState(hsmartcard)); -} - - -/** - * @brief DeInitialize the SMARTCARD peripheral. - * @param hsmartcard: Pointer to a SMARTCARD_HandleTypeDef structure that contains - * the configuration information for the specified SMARTCARD module. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SMARTCARD_DeInit(SMARTCARD_HandleTypeDef *hsmartcard) -{ - /* Check the SMARTCARD handle allocation */ - if(hsmartcard == NULL) - { - return HAL_ERROR; - } - - /* Check the parameters */ - assert_param(IS_SMARTCARD_INSTANCE(hsmartcard->Instance)); - - hsmartcard->State = HAL_SMARTCARD_STATE_BUSY; - - /* Disable the Peripheral */ - CLEAR_BIT(hsmartcard->Instance->CR1, USART_CR1_UE); - - WRITE_REG(hsmartcard->Instance->CR1, 0x0); - WRITE_REG(hsmartcard->Instance->CR2, 0x0); - WRITE_REG(hsmartcard->Instance->CR3, 0x0); - WRITE_REG(hsmartcard->Instance->RTOR, 0x0); - WRITE_REG(hsmartcard->Instance->GTPR, 0x0); - - /* DeInit the low level hardware */ - HAL_SMARTCARD_MspDeInit(hsmartcard); - - hsmartcard->ErrorCode = HAL_SMARTCARD_ERROR_NONE; - hsmartcard->State = HAL_SMARTCARD_STATE_RESET; - - /* Process Unlock */ - __HAL_UNLOCK(hsmartcard); - - return HAL_OK; -} - -/** - * @brief Initialize the SMARTCARD MSP. - * @param hsmartcard: Pointer to a SMARTCARD_HandleTypeDef structure that contains - * the configuration information for the specified SMARTCARD module. - * @retval None - */ - __weak void HAL_SMARTCARD_MspInit(SMARTCARD_HandleTypeDef *hsmartcard) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_SMARTCARD_MspInit can be implemented in the user file - */ -} - -/** - * @brief DeInitialize the SMARTCARD MSP. - * @param hsmartcard: Pointer to a SMARTCARD_HandleTypeDef structure that contains - * the configuration information for the specified SMARTCARD module. - * @retval None - */ - __weak void HAL_SMARTCARD_MspDeInit(SMARTCARD_HandleTypeDef *hsmartcard) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_SMARTCARD_MspDeInit can be implemented in the user file - */ -} - -/** - * @} - */ - -/** @defgroup SMARTCARD_Exported_Functions_Group2 IO operation functions - * @brief SMARTCARD Transmit and Receive functions - * -@verbatim - ============================================================================== - ##### IO operation functions ##### - ============================================================================== - [..] - This subsection provides a set of functions allowing to manage the SMARTCARD data transfers. - - [..] - Smartcard is a single wire half duplex communication protocol. - The Smartcard interface is designed to support asynchronous protocol Smartcards as - defined in the ISO 7816-3 standard. The USART should be configured as: - (+) 8 bits plus parity: where M=1 and PCE=1 in the USART_CR1 register - (+) 1.5 stop bits when transmitting and receiving: where STOP=11 in the USART_CR2 register. - - [..] - (+) There are two modes of transfer: - (++) Blocking mode: The communication is performed in polling mode. - The HAL status of all data processing is returned by the same function - after finishing transfer. - (++) No-Blocking mode: The communication is performed using Interrupts - or DMA, the relevant API's return the HAL status. - The end of the data processing will be indicated through the - dedicated SMARTCARD IRQ when using Interrupt mode or the DMA IRQ when - using DMA mode. - (++) The HAL_SMARTCARD_TxCpltCallback(), HAL_SMARTCARD_RxCpltCallback() user callbacks - will be executed respectively at the end of the Transmit or Receive process - The HAL_SMARTCARD_ErrorCallback() user callback will be executed when a communication - error is detected. - - (+) Blocking mode APIs are : - (++) HAL_SMARTCARD_Transmit() - (++) HAL_SMARTCARD_Receive() - - (+) Non Blocking mode APIs with Interrupt are : - (++) HAL_SMARTCARD_Transmit_IT() - (++) HAL_SMARTCARD_Receive_IT() - (++) HAL_SMARTCARD_IRQHandler() - - (+) Non Blocking mode functions with DMA are : - (++) HAL_SMARTCARD_Transmit_DMA() - (++) HAL_SMARTCARD_Receive_DMA() - - (+) A set of Transfer Complete Callbacks are provided in non Blocking mode: - (++) HAL_SMARTCARD_TxCpltCallback() - (++) HAL_SMARTCARD_RxCpltCallback() - (++) HAL_SMARTCARD_ErrorCallback() - -@endverbatim - * @{ - */ - -/** - * @brief Send an amount of data in blocking mode. - * @param hsmartcard: Pointer to a SMARTCARD_HandleTypeDef structure that contains - * the configuration information for the specified SMARTCARD module. - * @param pData: pointer to data buffer. - * @param Size: amount of data to be sent. - * @param Timeout : Timeout duration. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SMARTCARD_Transmit(SMARTCARD_HandleTypeDef *hsmartcard, uint8_t *pData, uint16_t Size, uint32_t Timeout) -{ - if ((hsmartcard->State == HAL_SMARTCARD_STATE_READY) || (hsmartcard->State == HAL_SMARTCARD_STATE_BUSY_RX)) - { - if((pData == NULL) || (Size == 0)) - { - return HAL_ERROR; - } - - /* Process Locked */ - __HAL_LOCK(hsmartcard); - - /* Check if a receive process is ongoing or not */ - if(hsmartcard->State == HAL_SMARTCARD_STATE_BUSY_RX) - { - hsmartcard->State = HAL_SMARTCARD_STATE_BUSY_TX_RX; - } - else - { - hsmartcard->State = HAL_SMARTCARD_STATE_BUSY_TX; - } - - /* Disable the Peripheral first to update mode for TX master */ - CLEAR_BIT(hsmartcard->Instance->CR1, USART_CR1_UE); - - /* Disable Rx, enable Tx */ - CLEAR_BIT(hsmartcard->Instance->CR1, USART_CR1_RE); - SET_BIT(hsmartcard->Instance->RQR, SMARTCARD_RXDATA_FLUSH_REQUEST); - SET_BIT(hsmartcard->Instance->CR1, USART_CR1_TE); - - /* Enable the Peripheral */ - SET_BIT(hsmartcard->Instance->CR1, USART_CR1_UE); - - hsmartcard->ErrorCode = HAL_SMARTCARD_ERROR_NONE; - hsmartcard->TxXferSize = Size; - hsmartcard->TxXferCount = Size; - - while(hsmartcard->TxXferCount > 0) - { - hsmartcard->TxXferCount--; - if(SMARTCARD_WaitOnFlagUntilTimeout(hsmartcard, SMARTCARD_FLAG_TXE, RESET, Timeout) != HAL_OK) - { - return HAL_TIMEOUT; - } - hsmartcard->Instance->TDR = (*pData++ & (uint8_t)0xFF); - } - if(SMARTCARD_WaitOnFlagUntilTimeout(hsmartcard, SMARTCARD_FLAG_TC, RESET, Timeout) != HAL_OK) - { - return HAL_TIMEOUT; - } - /* Re-enable Rx at end of transmission if initial mode is Rx/Tx */ - if(hsmartcard->Init.Mode == SMARTCARD_MODE_TX_RX) - { - /* Disable the Peripheral first to update modes */ - CLEAR_BIT(hsmartcard->Instance->CR1, USART_CR1_UE); - SET_BIT(hsmartcard->Instance->CR1, USART_CR1_RE); - /* Enable the Peripheral */ - SET_BIT(hsmartcard->Instance->CR1, USART_CR1_UE); - } - - /* Check if a receive process is ongoing or not */ - if(hsmartcard->State == HAL_SMARTCARD_STATE_BUSY_TX_RX) - { - hsmartcard->State = HAL_SMARTCARD_STATE_BUSY_RX; - } - else - { - hsmartcard->State = HAL_SMARTCARD_STATE_READY; - } - - /* Process Unlocked */ - __HAL_UNLOCK(hsmartcard); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Receive an amount of data in blocking mode. - * @param hsmartcard: Pointer to a SMARTCARD_HandleTypeDef structure that contains - * the configuration information for the specified SMARTCARD module. - * @param pData: pointer to data buffer. - * @param Size: amount of data to be received. - * @param Timeout : Timeout duration. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SMARTCARD_Receive(SMARTCARD_HandleTypeDef *hsmartcard, uint8_t *pData, uint16_t Size, uint32_t Timeout) -{ - if ((hsmartcard->State == HAL_SMARTCARD_STATE_READY) || (hsmartcard->State == HAL_SMARTCARD_STATE_BUSY_TX)) - { - if((pData == NULL) || (Size == 0)) - { - return HAL_ERROR; - } - - /* Process Locked */ - __HAL_LOCK(hsmartcard); - - /* Check if a non-blocking transmit process is ongoing or not */ - if(hsmartcard->State == HAL_SMARTCARD_STATE_BUSY_TX) - { - hsmartcard->State = HAL_SMARTCARD_STATE_BUSY_TX_RX; - } - else - { - hsmartcard->State = HAL_SMARTCARD_STATE_BUSY_RX; - } - - hsmartcard->ErrorCode = HAL_SMARTCARD_ERROR_NONE; - hsmartcard->RxXferSize = Size; - hsmartcard->RxXferCount = Size; - - /* Check the remain data to be received */ - while(hsmartcard->RxXferCount > 0) - { - hsmartcard->RxXferCount--; - if(SMARTCARD_WaitOnFlagUntilTimeout(hsmartcard, SMARTCARD_FLAG_RXNE, RESET, Timeout) != HAL_OK) - { - return HAL_TIMEOUT; - } - *pData++ = (uint8_t)(hsmartcard->Instance->RDR & (uint8_t)0x00FF); - } - - /* Check if a non-blocking transmit process is ongoing or not */ - if(hsmartcard->State == HAL_SMARTCARD_STATE_BUSY_TX_RX) - { - hsmartcard->State = HAL_SMARTCARD_STATE_BUSY_TX; - } - else - { - hsmartcard->State = HAL_SMARTCARD_STATE_READY; - } - - /* Process Unlocked */ - __HAL_UNLOCK(hsmartcard); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Send an amount of data in interrupt mode. - * @param hsmartcard: Pointer to a SMARTCARD_HandleTypeDef structure that contains - * the configuration information for the specified SMARTCARD module. - * @param pData: pointer to data buffer. - * @param Size: amount of data to be sent. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SMARTCARD_Transmit_IT(SMARTCARD_HandleTypeDef *hsmartcard, uint8_t *pData, uint16_t Size) -{ - if ((hsmartcard->State == HAL_SMARTCARD_STATE_READY) || (hsmartcard->State == HAL_SMARTCARD_STATE_BUSY_RX)) - { - if((pData == NULL) || (Size == 0)) - { - return HAL_ERROR; - } - - /* Process Locked */ - __HAL_LOCK(hsmartcard); - - /* Check if a receive process is ongoing or not */ - if(hsmartcard->State == HAL_SMARTCARD_STATE_BUSY_RX) - { - hsmartcard->State = HAL_SMARTCARD_STATE_BUSY_TX_RX; - } - else - { - hsmartcard->State = HAL_SMARTCARD_STATE_BUSY_TX; - } - - hsmartcard->ErrorCode = HAL_SMARTCARD_ERROR_NONE; - hsmartcard->pTxBuffPtr = pData; - hsmartcard->TxXferSize = Size; - hsmartcard->TxXferCount = Size; - - /* Disable the Peripheral first to update mode for TX master */ - CLEAR_BIT(hsmartcard->Instance->CR1, USART_CR1_UE); - - /* Disable Rx, enable Tx */ - CLEAR_BIT(hsmartcard->Instance->CR1, USART_CR1_RE); - SET_BIT(hsmartcard->Instance->RQR, SMARTCARD_RXDATA_FLUSH_REQUEST); - SET_BIT(hsmartcard->Instance->CR1, USART_CR1_TE); - - /* Enable the Peripheral */ - SET_BIT(hsmartcard->Instance->CR1, USART_CR1_UE); - - /* Enable the SMARTCARD Error Interrupt: (Frame error, noise error, overrun error) */ - __HAL_SMARTCARD_ENABLE_IT(hsmartcard, SMARTCARD_IT_ERR); - - /* Process Unlocked */ - __HAL_UNLOCK(hsmartcard); - - /* Enable the SMARTCARD Transmit Data Register Empty Interrupt */ - __HAL_SMARTCARD_ENABLE_IT(hsmartcard, SMARTCARD_IT_TXE); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Receive an amount of data in interrupt mode. - * @param hsmartcard: Pointer to a SMARTCARD_HandleTypeDef structure that contains - * the configuration information for the specified SMARTCARD module. - * @param pData: pointer to data buffer. - * @param Size: amount of data to be received. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SMARTCARD_Receive_IT(SMARTCARD_HandleTypeDef *hsmartcard, uint8_t *pData, uint16_t Size) -{ - if ((hsmartcard->State == HAL_SMARTCARD_STATE_READY) || (hsmartcard->State == HAL_SMARTCARD_STATE_BUSY_TX)) - { - if((pData == NULL) || (Size == 0)) - { - return HAL_ERROR; - } - - /* Process Locked */ - __HAL_LOCK(hsmartcard); - - /* Check if a transmit process is ongoing or not */ - if(hsmartcard->State == HAL_SMARTCARD_STATE_BUSY_TX) - { - hsmartcard->State = HAL_SMARTCARD_STATE_BUSY_TX_RX; - } - else - { - hsmartcard->State = HAL_SMARTCARD_STATE_BUSY_RX; - } - - hsmartcard->ErrorCode = HAL_SMARTCARD_ERROR_NONE; - hsmartcard->pRxBuffPtr = pData; - hsmartcard->RxXferSize = Size; - hsmartcard->RxXferCount = Size; - - /* Enable the SMARTCARD Parity Error Interrupt */ - __HAL_SMARTCARD_ENABLE_IT(hsmartcard, SMARTCARD_IT_PE); - - /* Enable the SMARTCARD Error Interrupt: (Frame error, noise error, overrun error) */ - __HAL_SMARTCARD_ENABLE_IT(hsmartcard, SMARTCARD_IT_ERR); - - /* Process Unlocked */ - __HAL_UNLOCK(hsmartcard); - - /* Enable the SMARTCARD Data Register not empty Interrupt */ - __HAL_SMARTCARD_ENABLE_IT(hsmartcard, SMARTCARD_IT_RXNE); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Send an amount of data in DMA mode. - * @param hsmartcard: Pointer to a SMARTCARD_HandleTypeDef structure that contains - * the configuration information for the specified SMARTCARD module. - * @param pData: pointer to data buffer. - * @param Size: amount of data to be sent. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SMARTCARD_Transmit_DMA(SMARTCARD_HandleTypeDef *hsmartcard, uint8_t *pData, uint16_t Size) -{ - uint32_t *tmp; - - if ((hsmartcard->State == HAL_SMARTCARD_STATE_READY) || (hsmartcard->State == HAL_SMARTCARD_STATE_BUSY_RX)) - { - if((pData == NULL) || (Size == 0)) - { - return HAL_ERROR; - } - - /* Process Locked */ - __HAL_LOCK(hsmartcard); - - /* Check if a receive process is ongoing or not */ - if(hsmartcard->State == HAL_SMARTCARD_STATE_BUSY_RX) - { - hsmartcard->State = HAL_SMARTCARD_STATE_BUSY_TX_RX; - } - else - { - hsmartcard->State = HAL_SMARTCARD_STATE_BUSY_TX; - } - - hsmartcard->ErrorCode = HAL_SMARTCARD_ERROR_NONE; - hsmartcard->pTxBuffPtr = pData; - hsmartcard->TxXferSize = Size; - hsmartcard->TxXferCount = Size; - - /* Disable the Peripheral first to update mode for TX master */ - CLEAR_BIT(hsmartcard->Instance->CR1, USART_CR1_UE); - - /* Disable Rx, enable Tx */ - CLEAR_BIT(hsmartcard->Instance->CR1, USART_CR1_RE); - SET_BIT(hsmartcard->Instance->RQR, SMARTCARD_RXDATA_FLUSH_REQUEST); - SET_BIT(hsmartcard->Instance->CR1, USART_CR1_TE); - - /* Enable the Peripheral */ - SET_BIT(hsmartcard->Instance->CR1, USART_CR1_UE); - - /* Set the SMARTCARD DMA transfer complete callback */ - hsmartcard->hdmatx->XferCpltCallback = SMARTCARD_DMATransmitCplt; - - /* Set the SMARTCARD error callback */ - hsmartcard->hdmatx->XferErrorCallback = SMARTCARD_DMAError; - - /* Enable the SMARTCARD transmit DMA channel */ - tmp = (uint32_t*)&pData; - HAL_DMA_Start_IT(hsmartcard->hdmatx, *(uint32_t*)tmp, (uint32_t)&hsmartcard->Instance->TDR, Size); - - /* Enable the DMA transfer for transmit request by setting the DMAT bit - in the SMARTCARD associated USART CR3 register */ - SET_BIT(hsmartcard->Instance->CR3, USART_CR3_DMAT); - - /* Process Unlocked */ - __HAL_UNLOCK(hsmartcard); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Receive an amount of data in DMA mode. - * @param hsmartcard: Pointer to a SMARTCARD_HandleTypeDef structure that contains - * the configuration information for the specified SMARTCARD module. - * @param pData: pointer to data buffer. - * @param Size: amount of data to be received. - * @note The SMARTCARD-associated USART parity is enabled (PCE = 1), - * the received data contain the parity bit (MSB position). - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SMARTCARD_Receive_DMA(SMARTCARD_HandleTypeDef *hsmartcard, uint8_t *pData, uint16_t Size) -{ - uint32_t *tmp; - - if ((hsmartcard->State == HAL_SMARTCARD_STATE_READY) || (hsmartcard->State == HAL_SMARTCARD_STATE_BUSY_TX)) - { - if((pData == NULL) || (Size == 0)) - { - return HAL_ERROR; - } - - /* Process Locked */ - __HAL_LOCK(hsmartcard); - - /* Check if a transmit process is ongoing or not */ - if(hsmartcard->State == HAL_SMARTCARD_STATE_BUSY_TX) - { - hsmartcard->State = HAL_SMARTCARD_STATE_BUSY_TX_RX; - } - else - { - hsmartcard->State = HAL_SMARTCARD_STATE_BUSY_RX; - } - - hsmartcard->ErrorCode = HAL_SMARTCARD_ERROR_NONE; - hsmartcard->pRxBuffPtr = pData; - hsmartcard->RxXferSize = Size; - - /* Set the SMARTCARD DMA transfer complete callback */ - hsmartcard->hdmarx->XferCpltCallback = SMARTCARD_DMAReceiveCplt; - - /* Set the SMARTCARD DMA error callback */ - hsmartcard->hdmarx->XferErrorCallback = SMARTCARD_DMAError; - - /* Enable the DMA channel */ - tmp = (uint32_t*)&pData; - HAL_DMA_Start_IT(hsmartcard->hdmarx, (uint32_t)&hsmartcard->Instance->RDR, *(uint32_t*)tmp, Size); - - /* Enable the DMA transfer for the receiver request by setting the DMAR bit - in the SMARTCARD associated USART CR3 register */ - SET_BIT(hsmartcard->Instance->CR3, USART_CR3_DMAR); - - /* Process Unlocked */ - __HAL_UNLOCK(hsmartcard); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Handle SMARTCARD interrupt requests. - * @param hsmartcard: Pointer to a SMARTCARD_HandleTypeDef structure that contains - * the configuration information for the specified SMARTCARD module. - * @retval None - */ -void HAL_SMARTCARD_IRQHandler(SMARTCARD_HandleTypeDef *hsmartcard) -{ - /* SMARTCARD parity error interrupt occurred -------------------------------------*/ - if((__HAL_SMARTCARD_GET_IT(hsmartcard, SMARTCARD_IT_PE) != RESET) && (__HAL_SMARTCARD_GET_IT_SOURCE(hsmartcard, SMARTCARD_IT_PE) != RESET)) - { - __HAL_SMARTCARD_CLEAR_IT(hsmartcard, SMARTCARD_CLEAR_PEF); - hsmartcard->ErrorCode |= HAL_SMARTCARD_ERROR_PE; - /* Set the SMARTCARD state ready to be able to start again the process */ - hsmartcard->State = HAL_SMARTCARD_STATE_READY; - } - - /* SMARTCARD frame error interrupt occurred --------------------------------------*/ - if((__HAL_SMARTCARD_GET_IT(hsmartcard, SMARTCARD_IT_FE) != RESET) && (__HAL_SMARTCARD_GET_IT_SOURCE(hsmartcard, SMARTCARD_IT_ERR) != RESET)) - { - __HAL_SMARTCARD_CLEAR_IT(hsmartcard, SMARTCARD_CLEAR_FEF); - hsmartcard->ErrorCode |= HAL_SMARTCARD_ERROR_FE; - /* Set the SMARTCARD state ready to be able to start again the process */ - hsmartcard->State = HAL_SMARTCARD_STATE_READY; - } - - /* SMARTCARD noise error interrupt occurred --------------------------------------*/ - if((__HAL_SMARTCARD_GET_IT(hsmartcard, SMARTCARD_IT_NE) != RESET) && (__HAL_SMARTCARD_GET_IT_SOURCE(hsmartcard, SMARTCARD_IT_ERR) != RESET)) - { - __HAL_SMARTCARD_CLEAR_IT(hsmartcard, SMARTCARD_CLEAR_NEF); - hsmartcard->ErrorCode |= HAL_SMARTCARD_ERROR_NE; - /* Set the SMARTCARD state ready to be able to start again the process */ - hsmartcard->State = HAL_SMARTCARD_STATE_READY; - } - - /* SMARTCARD Over-Run interrupt occurred -----------------------------------------*/ - if((__HAL_SMARTCARD_GET_IT(hsmartcard, SMARTCARD_IT_ORE) != RESET) && (__HAL_SMARTCARD_GET_IT_SOURCE(hsmartcard, SMARTCARD_IT_ERR) != RESET)) - { - __HAL_SMARTCARD_CLEAR_IT(hsmartcard, SMARTCARD_CLEAR_OREF); - hsmartcard->ErrorCode |= HAL_SMARTCARD_ERROR_ORE; - /* Set the SMARTCARD state ready to be able to start again the process */ - hsmartcard->State = HAL_SMARTCARD_STATE_READY; - } - - /* SMARTCARD receiver timeout interrupt occurred -----------------------------------------*/ - if((__HAL_SMARTCARD_GET_IT(hsmartcard, SMARTCARD_IT_RTO) != RESET) && (__HAL_SMARTCARD_GET_IT_SOURCE(hsmartcard, SMARTCARD_IT_RTO) != RESET)) - { - __HAL_SMARTCARD_CLEAR_IT(hsmartcard, SMARTCARD_CLEAR_RTOF); - hsmartcard->ErrorCode |= HAL_SMARTCARD_ERROR_RTO; - /* Set the SMARTCARD state ready to be able to start again the process */ - hsmartcard->State = HAL_SMARTCARD_STATE_READY; - } - - /* Call SMARTCARD Error Call back function if need be --------------------------*/ - if(hsmartcard->ErrorCode != HAL_SMARTCARD_ERROR_NONE) - { - HAL_SMARTCARD_ErrorCallback(hsmartcard); - } - - /* SMARTCARD in mode Receiver ---------------------------------------------------*/ - if((__HAL_SMARTCARD_GET_IT(hsmartcard, SMARTCARD_IT_RXNE) != RESET) && (__HAL_SMARTCARD_GET_IT_SOURCE(hsmartcard, SMARTCARD_IT_RXNE) != RESET)) - { - SMARTCARD_Receive_IT(hsmartcard); - /* Clear RXNE interrupt flag done by reading RDR in SMARTCARD_Receive_IT() */ - } - - /* SMARTCARD in mode Receiver, end of block interruption ------------------------*/ - if((__HAL_SMARTCARD_GET_IT(hsmartcard, SMARTCARD_IT_EOB) != RESET) && (__HAL_SMARTCARD_GET_IT_SOURCE(hsmartcard, SMARTCARD_IT_EOB) != RESET)) - { - hsmartcard->State = HAL_SMARTCARD_STATE_READY; - __HAL_UNLOCK(hsmartcard); - HAL_SMARTCARD_RxCpltCallback(hsmartcard); - /* Clear EOBF interrupt after HAL_SMARTCARD_RxCpltCallback() call for the End of Block information - * to be available during HAL_SMARTCARD_RxCpltCallback() processing */ - __HAL_SMARTCARD_CLEAR_IT(hsmartcard, SMARTCARD_CLEAR_EOBF); - } - - /* SMARTCARD in mode Transmitter ------------------------------------------------*/ - if((__HAL_SMARTCARD_GET_IT(hsmartcard, SMARTCARD_IT_TXE) != RESET) &&(__HAL_SMARTCARD_GET_IT_SOURCE(hsmartcard, SMARTCARD_IT_TXE) != RESET)) - { - SMARTCARD_Transmit_IT(hsmartcard); - } - - /* SMARTCARD in mode Transmitter (transmission end) ------------------------*/ - if((__HAL_SMARTCARD_GET_IT(hsmartcard, SMARTCARD_IT_TC) != RESET) &&(__HAL_SMARTCARD_GET_IT_SOURCE(hsmartcard, SMARTCARD_IT_TC) != RESET)) - { - SMARTCARD_EndTransmit_IT(hsmartcard); - } -} - -/** - * @brief Tx Transfer completed callback. - * @param hsmartcard: Pointer to a SMARTCARD_HandleTypeDef structure that contains - * the configuration information for the specified SMARTCARD module. - * @retval None - */ - __weak void HAL_SMARTCARD_TxCpltCallback(SMARTCARD_HandleTypeDef *hsmartcard) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_SMARTCARD_TxCpltCallback can be implemented in the user file. - */ -} - -/** - * @brief Rx Transfer completed callback. - * @param hsmartcard: Pointer to a SMARTCARD_HandleTypeDef structure that contains - * the configuration information for the specified SMARTCARD module. - * @retval None - */ -__weak void HAL_SMARTCARD_RxCpltCallback(SMARTCARD_HandleTypeDef *hsmartcard) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_SMARTCARD_RxCpltCallback can be implemented in the user file. - */ -} - -/** - * @brief SMARTCARD error callback. - * @param hsmartcard: Pointer to a SMARTCARD_HandleTypeDef structure that contains - * the configuration information for the specified SMARTCARD module. - * @retval None - */ -__weak void HAL_SMARTCARD_ErrorCallback(SMARTCARD_HandleTypeDef *hsmartcard) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_SMARTCARD_ErrorCallback can be implemented in the user file. - */ -} - -/** - * @} - */ - -/** @defgroup SMARTCARD_Exported_Functions_Group4 Peripheral State and Errors functions - * @brief SMARTCARD State and Errors functions - * -@verbatim - ============================================================================== - ##### Peripheral State and Errors functions ##### - ============================================================================== - [..] - This subsection provides a set of functions allowing to return the State of SmartCard - handle and also return Peripheral Errors occurred during communication process - (+) HAL_SMARTCARD_GetState() API can be helpful to check in run-time the state - of the SMARTCARD peripheral. - (+) HAL_SMARTCARD_GetError() checks in run-time errors that could occur during - communication. - -@endverbatim - * @{ - */ - - -/** - * @brief Return the SMARTCARD handle state. - * @param hsmartcard: Pointer to a SMARTCARD_HandleTypeDef structure that contains - * the configuration information for the specified SMARTCARD module. - * @retval SMARTCARD handle state - */ -HAL_SMARTCARD_StateTypeDef HAL_SMARTCARD_GetState(SMARTCARD_HandleTypeDef *hsmartcard) -{ - return hsmartcard->State; -} - -/** - * @brief Return the SMARTCARD handle error code. - * @param hsmartcard: Pointer to a SMARTCARD_HandleTypeDef structure that contains - * the configuration information for the specified SMARTCARD module. -* @retval SMARTCARD handle Error Code -*/ -uint32_t HAL_SMARTCARD_GetError(SMARTCARD_HandleTypeDef *hsmartcard) -{ - return hsmartcard->ErrorCode; -} - -/** - * @} - */ - -/** - * @} - */ - -/** @defgroup SMARTCARD_Private_Functions SMARTCARD Private Functions - * @{ - */ - -/** - * @brief Send an amount of data in non-blocking mode. - * @param hsmartcard: Pointer to a SMARTCARD_HandleTypeDef structure that contains - * the configuration information for the specified SMARTCARD module. - * Function called under interruption only, once - * interruptions have been enabled by HAL_SMARTCARD_Transmit_IT() - * @retval HAL status - */ -static HAL_StatusTypeDef SMARTCARD_Transmit_IT(SMARTCARD_HandleTypeDef *hsmartcard) -{ - if ((hsmartcard->State == HAL_SMARTCARD_STATE_BUSY_TX) || (hsmartcard->State == HAL_SMARTCARD_STATE_BUSY_TX_RX)) - { - - if(hsmartcard->TxXferCount == 0) - { - /* Disable the SMARTCARD Transmit Data Register Empty Interrupt */ - __HAL_SMARTCARD_DISABLE_IT(hsmartcard, SMARTCARD_IT_TXE); - - /* Enable the SMARTCARD Transmit Complete Interrupt */ - __HAL_SMARTCARD_ENABLE_IT(hsmartcard, SMARTCARD_IT_TC); - - return HAL_OK; - } - else - { - hsmartcard->Instance->TDR = (*hsmartcard->pTxBuffPtr++ & (uint8_t)0xFF); - hsmartcard->TxXferCount--; - - return HAL_OK; - } - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Wrap up transmission in non-blocking mode. - * @param hsmartcard: Pointer to a SMARTCARD_HandleTypeDef structure that contains - * the configuration information for the specified SMARTCARD module. - * @retval HAL status - */ -static HAL_StatusTypeDef SMARTCARD_EndTransmit_IT(SMARTCARD_HandleTypeDef *hsmartcard) -{ - /* Disable the SMARTCARD Transmit Complete Interrupt */ - __HAL_SMARTCARD_DISABLE_IT(hsmartcard, SMARTCARD_IT_TC); - - /* Check if a receive process is ongoing or not */ - if(hsmartcard->State == HAL_SMARTCARD_STATE_BUSY_TX_RX) - { - hsmartcard->State = HAL_SMARTCARD_STATE_BUSY_RX; - - /* Re-enable Rx at end of transmission if initial mode is Rx/Tx */ - if(hsmartcard->Init.Mode == SMARTCARD_MODE_TX_RX) - { - /* Disable the Peripheral first to update modes */ - CLEAR_BIT(hsmartcard->Instance->CR1, USART_CR1_UE); - SET_BIT(hsmartcard->Instance->CR1, USART_CR1_RE); - /* Enable the Peripheral */ - SET_BIT(hsmartcard->Instance->CR1, USART_CR1_UE); - } - } - else - { - /* Disable the SMARTCARD Error Interrupt: (Frame error, noise error, overrun error) */ - __HAL_SMARTCARD_DISABLE_IT(hsmartcard, SMARTCARD_IT_ERR); - - hsmartcard->State = HAL_SMARTCARD_STATE_READY; - } - - HAL_SMARTCARD_TxCpltCallback(hsmartcard); - - return HAL_OK; -} - - -/** - * @brief Receive an amount of data in non-blocking mode. - * @param hsmartcard: Pointer to a SMARTCARD_HandleTypeDef structure that contains - * the configuration information for the specified SMARTCARD module. - * Function called under interruption only, once - * interruptions have been enabled by HAL_SMARTCARD_Receive_IT(). - * @retval HAL status - */ -static HAL_StatusTypeDef SMARTCARD_Receive_IT(SMARTCARD_HandleTypeDef *hsmartcard) -{ - if ((hsmartcard->State == HAL_SMARTCARD_STATE_BUSY_RX) || (hsmartcard->State == HAL_SMARTCARD_STATE_BUSY_TX_RX)) - { - - *hsmartcard->pRxBuffPtr++ = (uint8_t)(hsmartcard->Instance->RDR & (uint8_t)0xFF); - - if(--hsmartcard->RxXferCount == 0) - { - __HAL_SMARTCARD_DISABLE_IT(hsmartcard, SMARTCARD_IT_RXNE); - - /* Check if a transmit process is ongoing or not */ - if(hsmartcard->State == HAL_SMARTCARD_STATE_BUSY_TX_RX) - { - hsmartcard->State = HAL_SMARTCARD_STATE_BUSY_TX; - } - else - { - /* Disable the SMARTCARD Parity Error Interrupt */ - __HAL_SMARTCARD_DISABLE_IT(hsmartcard, SMARTCARD_IT_PE); - - /* Disable the SMARTCARD Error Interrupt: (Frame error, noise error, overrun error) */ - __HAL_SMARTCARD_DISABLE_IT(hsmartcard, SMARTCARD_IT_ERR); - - hsmartcard->State = HAL_SMARTCARD_STATE_READY; - } - - HAL_SMARTCARD_RxCpltCallback(hsmartcard); - - return HAL_OK; - } - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Handle SMARTCARD Communication Timeout. - * @param hsmartcard: Pointer to a SMARTCARD_HandleTypeDef structure that contains - * the configuration information for the specified SMARTCARD module. - * @param Flag: specifies the SMARTCARD flag to check. - * @param Status: The new Flag status (SET or RESET). - * @param Timeout: Timeout duration. - * @retval HAL status - */ -static HAL_StatusTypeDef SMARTCARD_WaitOnFlagUntilTimeout(SMARTCARD_HandleTypeDef *hsmartcard, uint32_t Flag, FlagStatus Status, uint32_t Timeout) -{ - uint32_t tickstart = HAL_GetTick(); - - /* Wait until flag is set */ - if(Status == RESET) - { - while(__HAL_SMARTCARD_GET_FLAG(hsmartcard, Flag) == RESET) - { - /* Check for the Timeout */ - if(Timeout != HAL_MAX_DELAY) - { - if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout)) - { - /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */ - __HAL_SMARTCARD_DISABLE_IT(hsmartcard, SMARTCARD_IT_TXE); - __HAL_SMARTCARD_DISABLE_IT(hsmartcard, SMARTCARD_IT_RXNE); - __HAL_SMARTCARD_DISABLE_IT(hsmartcard, SMARTCARD_IT_PE); - __HAL_SMARTCARD_DISABLE_IT(hsmartcard, SMARTCARD_IT_ERR); - - hsmartcard->State= HAL_SMARTCARD_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hsmartcard); - - return HAL_TIMEOUT; - } - } - } - } - else - { - while(__HAL_SMARTCARD_GET_FLAG(hsmartcard, Flag) != RESET) - { - /* Check for the Timeout */ - if(Timeout != HAL_MAX_DELAY) - { - if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout)) - { - /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */ - __HAL_SMARTCARD_DISABLE_IT(hsmartcard, SMARTCARD_IT_TXE); - __HAL_SMARTCARD_DISABLE_IT(hsmartcard, SMARTCARD_IT_RXNE); - __HAL_SMARTCARD_DISABLE_IT(hsmartcard, SMARTCARD_IT_PE); - __HAL_SMARTCARD_DISABLE_IT(hsmartcard, SMARTCARD_IT_ERR); - - hsmartcard->State= HAL_SMARTCARD_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hsmartcard); - - return HAL_TIMEOUT; - } - } - } - } - return HAL_OK; -} - -/** - * @brief DMA SMARTCARD transmit process complete callback. - * @param hdma: Pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA module. - * @retval None - */ -static void SMARTCARD_DMATransmitCplt(DMA_HandleTypeDef *hdma) -{ - SMARTCARD_HandleTypeDef* hsmartcard = ( SMARTCARD_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; - hsmartcard->TxXferCount = 0; - - /* Disable the DMA transfer for transmit request by resetting the DMAT bit - in the SMARTCARD associated USART CR3 register */ - CLEAR_BIT(hsmartcard->Instance->CR3, USART_CR3_DMAT); - - /* Enable the SMARTCARD Transmit Complete Interrupt */ - __HAL_SMARTCARD_ENABLE_IT(hsmartcard, SMARTCARD_IT_TC); -} - -/** - * @brief DMA SMARTCARD receive process complete callback. - * @param hdma: Pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA module. - * @retval None - */ -static void SMARTCARD_DMAReceiveCplt(DMA_HandleTypeDef *hdma) -{ - SMARTCARD_HandleTypeDef* hsmartcard = ( SMARTCARD_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; - hsmartcard->RxXferCount = 0; - - /* Disable the DMA transfer for the receiver request by resetting the DMAR bit - in the SMARTCARD associated USART CR3 register */ - CLEAR_BIT(hsmartcard->Instance->CR3, USART_CR3_DMAR); - - /* Check if a transmit process is ongoing or not */ - if(hsmartcard->State == HAL_SMARTCARD_STATE_BUSY_TX_RX) - { - hsmartcard->State = HAL_SMARTCARD_STATE_BUSY_TX; - } - else - { - hsmartcard->State = HAL_SMARTCARD_STATE_READY; - } - - HAL_SMARTCARD_RxCpltCallback(hsmartcard); -} - -/** - * @brief DMA SMARTCARD communication error callback. - * @param hdma: Pointer to a DMA_HandleTypeDef structure that contains - * the configuration information for the specified DMA module. - * @retval None - */ -static void SMARTCARD_DMAError(DMA_HandleTypeDef *hdma) -{ - SMARTCARD_HandleTypeDef* hsmartcard = ( SMARTCARD_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; - hsmartcard->RxXferCount = 0; - hsmartcard->TxXferCount = 0; - hsmartcard->State= HAL_SMARTCARD_STATE_READY; - hsmartcard->ErrorCode |= HAL_SMARTCARD_ERROR_DMA; - HAL_SMARTCARD_ErrorCallback(hsmartcard); -} - -/** - * @brief Configure the SMARTCARD associated USART peripheral. - * @param hsmartcard: Pointer to a SMARTCARD_HandleTypeDef structure that contains - * the configuration information for the specified SMARTCARD module. - * @retval None - */ -static HAL_StatusTypeDef SMARTCARD_SetConfig(SMARTCARD_HandleTypeDef *hsmartcard) -{ - uint32_t tmpreg = 0x00000000; - SMARTCARD_ClockSourceTypeDef clocksource = SMARTCARD_CLOCKSOURCE_UNDEFINED; - HAL_StatusTypeDef ret = HAL_OK; - - /* Check the parameters */ - assert_param(IS_SMARTCARD_INSTANCE(hsmartcard->Instance)); - assert_param(IS_SMARTCARD_BAUDRATE(hsmartcard->Init.BaudRate)); - assert_param(IS_SMARTCARD_WORD_LENGTH(hsmartcard->Init.WordLength)); - assert_param(IS_SMARTCARD_STOPBITS(hsmartcard->Init.StopBits)); - assert_param(IS_SMARTCARD_PARITY(hsmartcard->Init.Parity)); - assert_param(IS_SMARTCARD_MODE(hsmartcard->Init.Mode)); - assert_param(IS_SMARTCARD_POLARITY(hsmartcard->Init.CLKPolarity)); - assert_param(IS_SMARTCARD_PHASE(hsmartcard->Init.CLKPhase)); - assert_param(IS_SMARTCARD_LASTBIT(hsmartcard->Init.CLKLastBit)); - assert_param(IS_SMARTCARD_ONE_BIT_SAMPLE(hsmartcard->Init.OneBitSampling)); - assert_param(IS_SMARTCARD_NACK(hsmartcard->Init.NACKEnable)); - assert_param(IS_SMARTCARD_TIMEOUT(hsmartcard->Init.TimeOutEnable)); - assert_param(IS_SMARTCARD_AUTORETRY_COUNT(hsmartcard->Init.AutoRetryCount)); - - /*-------------------------- USART CR1 Configuration -----------------------*/ - /* In SmartCard mode, M and PCE are forced to 1 (8 bits + parity). - * Oversampling is forced to 16 (OVER8 = 0). - * Configure the Parity and Mode: - * set PS bit according to hsmartcard->Init.Parity value - * set TE and RE bits according to hsmartcard->Init.Mode value */ - tmpreg = (uint32_t) hsmartcard->Init.Parity | hsmartcard->Init.Mode; - tmpreg |= (uint32_t) hsmartcard->Init.WordLength; - MODIFY_REG(hsmartcard->Instance->CR1, USART_CR1_FIELDS, tmpreg); - - /*-------------------------- USART CR2 Configuration -----------------------*/ - /* Stop bits are forced to 1.5 (STOP = 11) */ - tmpreg = hsmartcard->Init.StopBits; - /* Synchronous mode is activated by default */ - tmpreg |= (uint32_t) USART_CR2_CLKEN | hsmartcard->Init.CLKPolarity; - tmpreg |= (uint32_t) hsmartcard->Init.CLKPhase | hsmartcard->Init.CLKLastBit; - tmpreg |= (uint32_t) hsmartcard->Init.TimeOutEnable; - MODIFY_REG(hsmartcard->Instance->CR2, USART_CR2_FIELDS, tmpreg); - - /*-------------------------- USART CR3 Configuration -----------------------*/ - /* Configure - * - one-bit sampling method versus three samples' majority rule - * according to hsmartcard->Init.OneBitSampling - * - NACK transmission in case of parity error according - * to hsmartcard->Init.NACKEnable - * - autoretry counter according to hsmartcard->Init.AutoRetryCount */ - tmpreg = (uint32_t) hsmartcard->Init.OneBitSampling | hsmartcard->Init.NACKEnable; - tmpreg |= ((uint32_t)hsmartcard->Init.AutoRetryCount << SMARTCARD_CR3_SCARCNT_LSB_POS); - MODIFY_REG(hsmartcard->Instance-> CR3,USART_CR3_FIELDS, tmpreg); - - /*-------------------------- USART GTPR Configuration ----------------------*/ - tmpreg = (hsmartcard->Init.Prescaler | (((uint32_t)hsmartcard->Init.GuardTime-12) << SMARTCARD_GTPR_GT_LSB_POS)); - MODIFY_REG(hsmartcard->Instance->GTPR, (USART_GTPR_GT|USART_GTPR_PSC), tmpreg); - - /*-------------------------- USART RTOR Configuration ----------------------*/ - tmpreg = ((uint32_t)hsmartcard->Init.BlockLength << SMARTCARD_RTOR_BLEN_LSB_POS); - if (hsmartcard->Init.TimeOutEnable == SMARTCARD_TIMEOUT_ENABLE) - { - assert_param(IS_SMARTCARD_TIMEOUT_VALUE(hsmartcard->Init.TimeOutValue)); - tmpreg |= (uint32_t) hsmartcard->Init.TimeOutValue; - } - MODIFY_REG(hsmartcard->Instance->RTOR, (USART_RTOR_RTO|USART_RTOR_BLEN), tmpreg); - - /*-------------------------- USART BRR Configuration -----------------------*/ - SMARTCARD_GETCLOCKSOURCE(hsmartcard, clocksource); - switch (clocksource) - { - case SMARTCARD_CLOCKSOURCE_PCLK1: - hsmartcard->Instance->BRR = (uint16_t)(HAL_RCC_GetPCLK1Freq() / hsmartcard->Init.BaudRate); - break; - case SMARTCARD_CLOCKSOURCE_PCLK2: - hsmartcard->Instance->BRR = (uint16_t)(HAL_RCC_GetPCLK2Freq() / hsmartcard->Init.BaudRate); - break; - case SMARTCARD_CLOCKSOURCE_HSI: - hsmartcard->Instance->BRR = (uint16_t)(HSI_VALUE / hsmartcard->Init.BaudRate); - break; - case SMARTCARD_CLOCKSOURCE_SYSCLK: - hsmartcard->Instance->BRR = (uint16_t)(HAL_RCC_GetSysClockFreq() / hsmartcard->Init.BaudRate); - break; - case SMARTCARD_CLOCKSOURCE_LSE: - hsmartcard->Instance->BRR = (uint16_t)(LSE_VALUE / hsmartcard->Init.BaudRate); - break; - case SMARTCARD_CLOCKSOURCE_UNDEFINED: - default: - ret = HAL_ERROR; - break; - } - - return ret; -} - - -/** - * @brief Configure the SMARTCARD associated USART peripheral advanced features. - * @param hsmartcard: Pointer to a SMARTCARD_HandleTypeDef structure that contains - * the configuration information for the specified SMARTCARD module. - * @retval None - */ -static void SMARTCARD_AdvFeatureConfig(SMARTCARD_HandleTypeDef *hsmartcard) -{ - /* Check whether the set of advanced features to configure is properly set */ - assert_param(IS_SMARTCARD_ADVFEATURE_INIT(hsmartcard->AdvancedInit.AdvFeatureInit)); - - /* if required, configure TX pin active level inversion */ - if (HAL_IS_BIT_SET(hsmartcard->AdvancedInit.AdvFeatureInit, SMARTCARD_ADVFEATURE_TXINVERT_INIT)) - { - assert_param(IS_SMARTCARD_ADVFEATURE_TXINV(hsmartcard->AdvancedInit.TxPinLevelInvert)); - MODIFY_REG(hsmartcard->Instance->CR2, USART_CR2_TXINV, hsmartcard->AdvancedInit.TxPinLevelInvert); - } - - /* if required, configure RX pin active level inversion */ - if (HAL_IS_BIT_SET(hsmartcard->AdvancedInit.AdvFeatureInit, SMARTCARD_ADVFEATURE_RXINVERT_INIT)) - { - assert_param(IS_SMARTCARD_ADVFEATURE_RXINV(hsmartcard->AdvancedInit.RxPinLevelInvert)); - MODIFY_REG(hsmartcard->Instance->CR2, USART_CR2_RXINV, hsmartcard->AdvancedInit.RxPinLevelInvert); - } - - /* if required, configure data inversion */ - if (HAL_IS_BIT_SET(hsmartcard->AdvancedInit.AdvFeatureInit, SMARTCARD_ADVFEATURE_DATAINVERT_INIT)) - { - assert_param(IS_SMARTCARD_ADVFEATURE_DATAINV(hsmartcard->AdvancedInit.DataInvert)); - MODIFY_REG(hsmartcard->Instance->CR2, USART_CR2_DATAINV, hsmartcard->AdvancedInit.DataInvert); - } - - /* if required, configure RX/TX pins swap */ - if (HAL_IS_BIT_SET(hsmartcard->AdvancedInit.AdvFeatureInit, SMARTCARD_ADVFEATURE_SWAP_INIT)) - { - assert_param(IS_SMARTCARD_ADVFEATURE_SWAP(hsmartcard->AdvancedInit.Swap)); - MODIFY_REG(hsmartcard->Instance->CR2, USART_CR2_SWAP, hsmartcard->AdvancedInit.Swap); - } - - /* if required, configure RX overrun detection disabling */ - if (HAL_IS_BIT_SET(hsmartcard->AdvancedInit.AdvFeatureInit, SMARTCARD_ADVFEATURE_RXOVERRUNDISABLE_INIT)) - { - assert_param(IS_SMARTCARD_OVERRUN(hsmartcard->AdvancedInit.OverrunDisable)); - MODIFY_REG(hsmartcard->Instance->CR3, USART_CR3_OVRDIS, hsmartcard->AdvancedInit.OverrunDisable); - } - - /* if required, configure DMA disabling on reception error */ - if (HAL_IS_BIT_SET(hsmartcard->AdvancedInit.AdvFeatureInit, SMARTCARD_ADVFEATURE_DMADISABLEONERROR_INIT)) - { - assert_param(IS_SMARTCARD_ADVFEATURE_DMAONRXERROR(hsmartcard->AdvancedInit.DMADisableonRxError)); - MODIFY_REG(hsmartcard->Instance->CR3, USART_CR3_DDRE, hsmartcard->AdvancedInit.DMADisableonRxError); - } - - /* if required, configure MSB first on communication line */ - if (HAL_IS_BIT_SET(hsmartcard->AdvancedInit.AdvFeatureInit, SMARTCARD_ADVFEATURE_MSBFIRST_INIT)) - { - assert_param(IS_SMARTCARD_ADVFEATURE_MSBFIRST(hsmartcard->AdvancedInit.MSBFirst)); - MODIFY_REG(hsmartcard->Instance->CR2, USART_CR2_MSBFIRST, hsmartcard->AdvancedInit.MSBFirst); - } - -} - -/** - * @brief Check the SMARTCARD Idle State. - * @param hsmartcard: Pointer to a SMARTCARD_HandleTypeDef structure that contains - * the configuration information for the specified SMARTCARD module. - * @retval HAL status - */ -static HAL_StatusTypeDef SMARTCARD_CheckIdleState(SMARTCARD_HandleTypeDef *hsmartcard) -{ - - /* Initialize the SMARTCARD ErrorCode */ - hsmartcard->ErrorCode = HAL_SMARTCARD_ERROR_NONE; - - /* Check if the Transmitter is enabled */ - if((hsmartcard->Instance->CR1 & USART_CR1_TE) == USART_CR1_TE) - { - /* Wait until TEACK flag is set */ - if(SMARTCARD_WaitOnFlagUntilTimeout(hsmartcard, USART_ISR_TEACK, RESET, SMARTCARD_TEACK_REACK_TIMEOUT) != HAL_OK) - { - return HAL_TIMEOUT; - } - } - /* Check if the Receiver is enabled */ - if((hsmartcard->Instance->CR1 & USART_CR1_RE) == USART_CR1_RE) - { - /* Wait until REACK flag is set */ - if(SMARTCARD_WaitOnFlagUntilTimeout(hsmartcard, USART_ISR_REACK, RESET, SMARTCARD_TEACK_REACK_TIMEOUT) != HAL_OK) - { - return HAL_TIMEOUT; - } - } - - /* Initialize the SMARTCARD state*/ - hsmartcard->State= HAL_SMARTCARD_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hsmartcard); - - return HAL_OK; -} - -/** - * @} - */ - -#endif /* HAL_SMARTCARD_MODULE_ENABLED */ -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ -
--- a/Src/stm32l4xx_hal_smartcard_ex.c Thu Nov 12 20:49:49 2015 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,209 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_smartcard_ex.c - * @author MCD Application Team - * @version V1.1.0 - * @date 16-September-2015 - * @brief SMARTCARD HAL module driver. - * This file provides extended firmware functions to manage the following - * functionalities of the SmartCard. - * + Initialization and de-initialization functions - * + Peripheral Control functions - * - * - @verbatim - ============================================================================= - ##### SMARTCARD peripheral extended features ##### - ============================================================================= - [..] - The Extended SMARTCARD HAL driver can be used as follows: - - (#) After having configured the SMARTCARD basic features with HAL_SMARTCARD_Init(), - then program SMARTCARD advanced features if required (TX/RX pins swap, TimeOut, - auto-retry counter,...) in the hsmartcard AdvancedInit structure. - - - - @endverbatim - ****************************************************************************** - * @attention - * - * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @defgroup SMARTCARDEx SMARTCARDEx - * @brief SMARTCARD Extended HAL module driver - * @{ - */ -#ifdef HAL_SMARTCARD_MODULE_ENABLED - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -/* Private macros ------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ - -/* Exported functions --------------------------------------------------------*/ -/** @defgroup SMARTCARDEx_Exported_Functions SMARTCARD Extended Exported Functions - * @{ - */ - -/** @defgroup SMARTCARDEx_Exported_Functions_Group1 Extended Peripheral Control functions - * @brief Extended control functions - * -@verbatim - =============================================================================== - ##### Peripheral Control functions ##### - =============================================================================== - [..] - This subsection provides a set of functions allowing to initialize the SMARTCARD. - (+) HAL_SMARTCARDEx_BlockLength_Config() API allows to configure the Block Length on the fly - (+) HAL_SMARTCARDEx_TimeOut_Config() API allows to configure the receiver timeout value on the fly - (+) HAL_SMARTCARDEx_EnableReceiverTimeOut() API enables the receiver timeout feature - (+) HAL_SMARTCARDEx_DisableReceiverTimeOut() API disables the receiver timeout feature - -@endverbatim - * @{ - */ - -/** - * @brief Update on the fly the SMARTCARD block length in RTOR register. - * @param hsmartcard: Pointer to a SMARTCARD_HandleTypeDef structure that contains - * the configuration information for the specified SMARTCARD module. - * @param BlockLength: SMARTCARD block length (8-bit long at most) - * @retval None - */ -void HAL_SMARTCARDEx_BlockLength_Config(SMARTCARD_HandleTypeDef *hsmartcard, uint8_t BlockLength) -{ - MODIFY_REG(hsmartcard->Instance->RTOR, USART_RTOR_BLEN, ((uint32_t)BlockLength << SMARTCARD_RTOR_BLEN_LSB_POS)); -} - -/** - * @brief Update on the fly the receiver timeout value in RTOR register. - * @param hsmartcard: Pointer to a SMARTCARD_HandleTypeDef structure that contains - * the configuration information for the specified SMARTCARD module. - * @param TimeOutValue: receiver timeout value in number of baud blocks. The timeout - * value must be less or equal to 0x0FFFFFFFF. - * @retval None - */ -void HAL_SMARTCARDEx_TimeOut_Config(SMARTCARD_HandleTypeDef *hsmartcard, uint32_t TimeOutValue) -{ - assert_param(IS_SMARTCARD_TIMEOUT_VALUE(hsmartcard->Init.TimeOutValue)); - MODIFY_REG(hsmartcard->Instance->RTOR, USART_RTOR_RTO, TimeOutValue); -} - -/** - * @brief Enable the SMARTCARD receiver timeout feature. - * @param hsmartcard: Pointer to a SMARTCARD_HandleTypeDef structure that contains - * the configuration information for the specified SMARTCARD module. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SMARTCARDEx_EnableReceiverTimeOut(SMARTCARD_HandleTypeDef *hsmartcard) -{ - - if(hsmartcard->State == HAL_SMARTCARD_STATE_READY) - { - /* Process Locked */ - __HAL_LOCK(hsmartcard); - - hsmartcard->State = HAL_SMARTCARD_STATE_BUSY; - - /* Set the USART RTOEN bit */ - SET_BIT(hsmartcard->Instance->CR2, USART_CR2_RTOEN); - - hsmartcard->State = HAL_SMARTCARD_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hsmartcard); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Disable the SMARTCARD receiver timeout feature. - * @param hsmartcard: Pointer to a SMARTCARD_HandleTypeDef structure that contains - * the configuration information for the specified SMARTCARD module. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SMARTCARDEx_DisableReceiverTimeOut(SMARTCARD_HandleTypeDef *hsmartcard) -{ - - if(hsmartcard->State == HAL_SMARTCARD_STATE_READY) - { - /* Process Locked */ - __HAL_LOCK(hsmartcard); - - hsmartcard->State = HAL_SMARTCARD_STATE_BUSY; - - /* Clear the USART RTOEN bit */ - CLEAR_BIT(hsmartcard->Instance->CR2, USART_CR2_RTOEN); - - hsmartcard->State = HAL_SMARTCARD_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hsmartcard); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @} - */ - -/** - * @} - */ - -#endif /* HAL_SMARTCARD_MODULE_ENABLED */ - -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ -
--- a/Src/stm32l4xx_hal_smbus.c Thu Nov 12 20:49:49 2015 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,1943 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_smbus.c - * @author MCD Application Team - * @version V1.1.0 - * @date 16-September-2015 - * @brief SMBUS HAL module driver. - * This file provides firmware functions to manage the following - * functionalities of the System Management Bus (SMBus) peripheral, - * based on I2C principles of operation : - * + Initialization and de-initialization functions - * + IO operation functions - * + Peripheral State and Errors functions - * - @verbatim - ============================================================================== - ##### How to use this driver ##### - ============================================================================== - [..] - The SMBUS HAL driver can be used as follows: - - (#) Declare a SMBUS_HandleTypeDef handle structure, for example: - SMBUS_HandleTypeDef hsmbus; - - (#)Initialize the SMBUS low level resources by implementing the HAL_SMBUS_MspInit() API: - (++) Enable the SMBUSx interface clock with __HAL_RCC_I2Cx_CLK_ENABLE() - (++) SMBUS pins configuration - (+++) Enable the clock for the SMBUS GPIOs - (+++) Configure SMBUS pins as alternate function open-drain - (++) NVIC configuration if you need to use interrupt process - (+++) Configure the SMBUSx interrupt priority - (+++) Enable the NVIC SMBUS IRQ Channel - - (#) Configure the Communication Clock Timing, Bus Timeout, Own Address1, Master Addressing Mode, - Dual Addressing mode, Own Address2, Own Address2 Mask, General call, Nostretch mode, - Peripheral mode and Packet Error Check mode in the hsmbus Init structure. - - (#) Initialize the SMBUS registers by calling the HAL_SMBUS_Init() API: - (++) These API's configures also the low level Hardware GPIO, CLOCK, CORTEX...etc) - by calling the customized HAL_SMBUS_MspInit(&hsmbus) API. - - (#) To check if target device is ready for communication, use the function HAL_SMBUS_IsDeviceReady() - - (#) For SMBUS IO operations, only one mode of operations is available within this driver : - - *** Interrupt mode IO operation *** - =================================== - [..] - (+) Transmit in master/host SMBUS mode an amount of data in non-blocking mode using HAL_SMBUS_Master_Transmit_IT() - (++) At transmission end of transfer HAL_SMBUS_MasterTxCpltCallback() is executed and user can - add his own code by customization of function pointer HAL_SMBUS_MasterTxCpltCallback() - (+) Receive in master/host SMBUS mode an amount of data in non-blocking mode using HAL_SMBUS_Master_Receive_IT() - (++) At reception end of transfer HAL_SMBUS_MasterRxCpltCallback() is executed and user can - add his own code by customization of function pointer HAL_SMBUS_MasterRxCpltCallback() - (+) Abort a master/host SMBUS process communication with Interrupt using HAL_SMBUS_Master_Abort_IT() - (++) The associated previous transfer callback is called at the end of abort process - (++) mean HAL_SMBUS_MasterTxCpltCallback() in case of previous state was master transmit - (++) mean HAL_SMBUS_MasterRxCpltCallback() in case of previous state was master receive - (+) Enable/disable the Address listen mode in slave/device or host/slave SMBUS mode - using HAL_SMBUS_EnableListen_IT() HAL_SMBUS_DisableListen_IT() - (++) When address slave/device SMBUS match, HAL_SMBUS_AddrCallback() is executed and user can - add his own code to check the Address Match Code and the transmission direction request by master/host (Write/Read). - (++) At Listen mode end HAL_SMBUS_ListenCpltCallback() is executed and user can - add his own code by customization of function pointer HAL_SMBUS_ListenCpltCallback() - (+) Transmit in slave/device SMBUS mode an amount of data in non-blocking mode using HAL_SMBUS_Slave_Transmit_IT() - (++) At transmission end of transfer HAL_SMBUS_SlaveTxCpltCallback() is executed and user can - add his own code by customization of function pointer HAL_SMBUS_SlaveTxCpltCallback() - (+) Receive in slave/device SMBUS mode an amount of data in non-blocking mode using HAL_SMBUS_Slave_Receive_IT() - (++) At reception end of transfer HAL_SMBUS_SlaveRxCpltCallback() is executed and user can - add his own code by customization of function pointer HAL_SMBUS_SlaveRxCpltCallback() - (+) Enable/Disable the SMBUS alert mode using HAL_SMBUS_EnableAlert_IT() HAL_SMBUS_DisableAlert_IT() - (++) When SMBUS Alert is generated HAL_SMBUS_ErrorCallback() is executed and user can - add his own code by customization of function pointer HAL_SMBUS_ErrorCallback() - to check the Alert Error Code using function HAL_SMBUS_GetError() - (+) Get HAL state machine or error values using HAL_SMBUS_GetState() or HAL_SMBUS_GetError() - (+) In case of transfer Error, HAL_SMBUS_ErrorCallback() function is executed and user can - add his own code by customization of function pointer HAL_SMBUS_ErrorCallback() - to check the Error Code using function HAL_SMBUS_GetError() - - *** SMBUS HAL driver macros list *** - ================================== - [..] - Below the list of most used macros in SMBUS HAL driver. - - (+) __HAL_SMBUS_ENABLE: Enable the SMBUS peripheral - (+) __HAL_SMBUS_DISABLE: Disable the SMBUS peripheral - (+) __HAL_SMBUS_GET_FLAG : Checks whether the specified SMBUS flag is set or not - (+) __HAL_SMBUS_CLEAR_FLAG : Clears the specified SMBUS pending flag - (+) __HAL_SMBUS_ENABLE_IT: Enables the specified SMBUS interrupt - (+) __HAL_SMBUS_DISABLE_IT: Disables the specified SMBUS interrupt - - [..] - (@) You can refer to the SMBUS HAL driver header file for more useful macros - - - @endverbatim - ****************************************************************************** - * @attention - * - * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @defgroup SMBUS SMBUS - * @brief SMBUS HAL module driver - * @{ - */ - -#ifdef HAL_SMBUS_MODULE_ENABLED - -/* Private typedef -----------------------------------------------------------*/ -/* Private constants ---------------------------------------------------------*/ -/** @defgroup SMBUS_Private_Define SMBUS Private Constants - * @{ - */ -#define TIMING_CLEAR_MASK ((uint32_t)0xF0FFFFFF) /*<! SMBUS TIMING clear register Mask */ -#define HAL_TIMEOUT_ADDR ((uint32_t)10000) /* 10 s */ -#define HAL_TIMEOUT_BUSY ((uint32_t)25) /* 25 ms */ -#define HAL_TIMEOUT_DIR ((uint32_t)25) /* 25 ms */ -#define HAL_TIMEOUT_RXNE ((uint32_t)25) /* 25 ms */ -#define HAL_TIMEOUT_STOPF ((uint32_t)25) /* 25 ms */ -#define HAL_TIMEOUT_TC ((uint32_t)25) /* 25 ms */ -#define HAL_TIMEOUT_TCR ((uint32_t)25) /* 25 ms */ -#define HAL_TIMEOUT_TXIS ((uint32_t)25) /* 25 ms */ -#define MAX_NBYTE_SIZE 255 -/** - * @} - */ - -/* Private macro -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ -/** @addtogroup SMBUS_Private_Functions SMBUS Private Functions - * @{ - */ -static HAL_StatusTypeDef SMBUS_WaitOnFlagUntilTimeout(SMBUS_HandleTypeDef *hsmbus, uint32_t Flag, FlagStatus Status, uint32_t Timeout); - -static HAL_StatusTypeDef SMBUS_Enable_IRQ(SMBUS_HandleTypeDef *hsmbus, uint16_t InterruptRequest); -static HAL_StatusTypeDef SMBUS_Disable_IRQ(SMBUS_HandleTypeDef *hsmbus, uint16_t InterruptRequest); -static HAL_StatusTypeDef SMBUS_Master_ISR(SMBUS_HandleTypeDef *hsmbus); -static HAL_StatusTypeDef SMBUS_Slave_ISR(SMBUS_HandleTypeDef *hsmbus); - -static void SMBUS_TransferConfig(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t Size, uint32_t Mode, uint32_t Request); -/** - * @} - */ - -/* Exported functions --------------------------------------------------------*/ - -/** @defgroup SMBUS_Exported_Functions SMBUS Exported Functions - * @{ - */ - -/** @defgroup SMBUS_Exported_Functions_Group1 Initialization and de-initialization functions - * @brief Initialization and Configuration functions - * -@verbatim - =============================================================================== - ##### Initialization and de-initialization functions ##### - =============================================================================== - [..] This subsection provides a set of functions allowing to initialize and - de-initialize the SMBUSx peripheral: - - (+) User must Implement HAL_SMBUS_MspInit() function in which he configures - all related peripherals resources (CLOCK, GPIO, IT and NVIC ). - - (+) Call the function HAL_SMBUS_Init() to configure the selected device with - the selected configuration: - (++) Clock Timing - (++) Bus Timeout - (++) Analog Filer mode - (++) Own Address 1 - (++) Addressing mode (Master, Slave) - (++) Dual Addressing mode - (++) Own Address 2 - (++) Own Address 2 Mask - (++) General call mode - (++) Nostretch mode - (++) Packet Error Check mode - (++) Peripheral mode - - - (+) Call the function HAL_SMBUS_DeInit() to restore the default configuration - of the selected SMBUSx peripheral. - -@endverbatim - * @{ - */ - -/** - * @brief Initialize the SMBUS according to the specified parameters - * in the SMBUS_InitTypeDef and initialize the associated handle. - * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains - * the configuration information for the specified SMBUS. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SMBUS_Init(SMBUS_HandleTypeDef *hsmbus) -{ - /* Check the SMBUS handle allocation */ - if(hsmbus == NULL) - { - return HAL_ERROR; - } - - /* Check the parameters */ - assert_param(IS_SMBUS_ALL_INSTANCE(hsmbus->Instance)); - assert_param(IS_SMBUS_ANALOG_FILTER(hsmbus->Init.AnalogFilter)); - assert_param(IS_SMBUS_OWN_ADDRESS1(hsmbus->Init.OwnAddress1)); - assert_param(IS_SMBUS_ADDRESSING_MODE(hsmbus->Init.AddressingMode)); - assert_param(IS_SMBUS_DUAL_ADDRESS(hsmbus->Init.DualAddressMode)); - assert_param(IS_SMBUS_OWN_ADDRESS2(hsmbus->Init.OwnAddress2)); - assert_param(IS_SMBUS_OWN_ADDRESS2_MASK(hsmbus->Init.OwnAddress2Masks)); - assert_param(IS_SMBUS_GENERAL_CALL(hsmbus->Init.GeneralCallMode)); - assert_param(IS_SMBUS_NO_STRETCH(hsmbus->Init.NoStretchMode)); - assert_param(IS_SMBUS_PEC(hsmbus->Init.PacketErrorCheckMode)); - assert_param(IS_SMBUS_PERIPHERAL_MODE(hsmbus->Init.PeripheralMode)); - - if(hsmbus->State == HAL_SMBUS_STATE_RESET) - { - /* Allocate lock resource and initialize it */ - hsmbus->Lock = HAL_UNLOCKED; - - /* Init the low level hardware : GPIO, CLOCK, NVIC */ - HAL_SMBUS_MspInit(hsmbus); - } - - hsmbus->State = HAL_SMBUS_STATE_BUSY; - - /* Disable the selected SMBUS peripheral */ - __HAL_SMBUS_DISABLE(hsmbus); - - /*---------------------------- SMBUSx TIMINGR Configuration ------------------------*/ - /* Configure SMBUSx: Frequency range */ - hsmbus->Instance->TIMINGR = hsmbus->Init.Timing & TIMING_CLEAR_MASK; - - /*---------------------------- SMBUSx TIMEOUTR Configuration ------------------------*/ - /* Configure SMBUSx: Bus Timeout */ - hsmbus->Instance->TIMEOUTR &= ~I2C_TIMEOUTR_TIMOUTEN; - hsmbus->Instance->TIMEOUTR &= ~I2C_TIMEOUTR_TEXTEN; - hsmbus->Instance->TIMEOUTR = hsmbus->Init.SMBusTimeout; - - /*---------------------------- SMBUSx OAR1 Configuration -----------------------*/ - /* Configure SMBUSx: Own Address1 and ack own address1 mode */ - hsmbus->Instance->OAR1 &= ~I2C_OAR1_OA1EN; - - if(hsmbus->Init.OwnAddress1 != 0) - { - if(hsmbus->Init.AddressingMode == SMBUS_ADDRESSINGMODE_7BIT) - { - hsmbus->Instance->OAR1 = (I2C_OAR1_OA1EN | hsmbus->Init.OwnAddress1); - } - else /* SMBUS_ADDRESSINGMODE_10BIT */ - { - hsmbus->Instance->OAR1 = (I2C_OAR1_OA1EN | I2C_OAR1_OA1MODE | hsmbus->Init.OwnAddress1); - } - } - - /*---------------------------- SMBUSx CR2 Configuration ------------------------*/ - /* Configure SMBUSx: Addressing Master mode */ - if(hsmbus->Init.AddressingMode == SMBUS_ADDRESSINGMODE_10BIT) - { - hsmbus->Instance->CR2 = (I2C_CR2_ADD10); - } - /* Enable the AUTOEND by default, and enable NACK (should be disable only during Slave process) */ - /* AUTOEND and NACK bit will be manage during Transfer process */ - hsmbus->Instance->CR2 |= (I2C_CR2_AUTOEND | I2C_CR2_NACK); - - /*---------------------------- SMBUSx OAR2 Configuration -----------------------*/ - /* Configure SMBUSx: Dual mode and Own Address2 */ - hsmbus->Instance->OAR2 = (hsmbus->Init.DualAddressMode | hsmbus->Init.OwnAddress2 | (hsmbus->Init.OwnAddress2Masks << 8)); - - /*---------------------------- SMBUSx CR1 Configuration ------------------------*/ - /* Configure SMBUSx: Generalcall and NoStretch mode */ - hsmbus->Instance->CR1 = (hsmbus->Init.GeneralCallMode | hsmbus->Init.NoStretchMode | hsmbus->Init.PacketErrorCheckMode | hsmbus->Init.PeripheralMode | hsmbus->Init.AnalogFilter); - - /* Enable Slave Byte Control only in case of Packet Error Check is enabled and SMBUS Peripheral is set in Slave mode */ - if( (hsmbus->Init.PacketErrorCheckMode == SMBUS_PEC_ENABLE) - && ( (hsmbus->Init.PeripheralMode == SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE) || (hsmbus->Init.PeripheralMode == SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE_ARP) ) ) - { - hsmbus->Instance->CR1 |= I2C_CR1_SBC; - } - - /* Enable the selected SMBUS peripheral */ - __HAL_SMBUS_ENABLE(hsmbus); - - hsmbus->ErrorCode = HAL_SMBUS_ERROR_NONE; - hsmbus->PreviousState = HAL_SMBUS_STATE_READY; - hsmbus->State = HAL_SMBUS_STATE_READY; - - return HAL_OK; -} - -/** - * @brief DeInitialize the SMBUS peripheral. - * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains - * the configuration information for the specified SMBUS. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SMBUS_DeInit(SMBUS_HandleTypeDef *hsmbus) -{ - /* Check the SMBUS handle allocation */ - if(hsmbus == NULL) - { - return HAL_ERROR; - } - - /* Check the parameters */ - assert_param(IS_SMBUS_ALL_INSTANCE(hsmbus->Instance)); - - hsmbus->State = HAL_SMBUS_STATE_BUSY; - - /* Disable the SMBUS Peripheral Clock */ - __HAL_SMBUS_DISABLE(hsmbus); - - /* DeInit the low level hardware: GPIO, CLOCK, NVIC */ - HAL_SMBUS_MspDeInit(hsmbus); - - hsmbus->ErrorCode = HAL_SMBUS_ERROR_NONE; - hsmbus->PreviousState = HAL_SMBUS_STATE_RESET; - hsmbus->State = HAL_SMBUS_STATE_RESET; - - /* Release Lock */ - __HAL_UNLOCK(hsmbus); - - return HAL_OK; -} - -/** - * @brief Initialize the SMBUS MSP. - * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains - * the configuration information for the specified SMBUS. - * @retval None - */ - __weak void HAL_SMBUS_MspInit(SMBUS_HandleTypeDef *hsmbus) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_SMBUS_MspInit could be implemented in the user file - */ -} - -/** - * @brief DeInitialize the SMBUS MSP. - * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains - * the configuration information for the specified SMBUS. - * @retval None - */ - __weak void HAL_SMBUS_MspDeInit(SMBUS_HandleTypeDef *hsmbus) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_SMBUS_MspDeInit could be implemented in the user file - */ -} - -/** - * @} - */ - -/** @defgroup SMBUS_Exported_Functions_Group2 Input and Output operation functions - * @brief Data transfers functions - * -@verbatim - =============================================================================== - ##### IO operation functions ##### - =============================================================================== - [..] - This subsection provides a set of functions allowing to manage the SMBUS data - transfers. - - (#) Blocking mode function to check if device is ready for usage is : - (++) HAL_SMBUS_IsDeviceReady() - - (#) There is only one mode of transfer: - (++) No-Blocking mode : The communication is performed using Interrupts. - These functions return the status of the transfer startup. - The end of the data processing will be indicated through the - dedicated SMBUS IRQ when using Interrupt mode. - - (#) No-Blocking mode functions with Interrupt are : - (++) HAL_SMBUS_Master_Transmit_IT() - (++) HAL_SMBUS_Master_Receive_IT() - (++) HAL_SMBUS_Slave_Transmit_IT() - (++) HAL_SMBUS_Slave_Receive_IT() - (++) HAL_SMBUS_EnableListen_IT() or alias HAL_SMBUS_EnableListen_IT() - (++) HAL_SMBUS_DisableListen_IT() - (++) HAL_SMBUS_EnableAlert_IT() - (++) HAL_SMBUS_DisableAlert_IT() - - (#) A set of Transfer Complete Callbacks are provided in No_Blocking mode: - (++) HAL_SMBUS_MasterTxCpltCallback() - (++) HAL_SMBUS_MasterRxCpltCallback() - (++) HAL_SMBUS_SlaveTxCpltCallback() - (++) HAL_SMBUS_SlaveRxCpltCallback() - (++) HAL_SMBUS_AddrCallback() - (++) HAL_SMBUS_ListenCpltCallback() - (++) HAL_SMBUS_ErrorCallback() - -@endverbatim - * @{ - */ - -/** - * @brief Transmit in master/host SMBUS mode an amount of data in non-blocking mode with Interrupt. - * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains - * the configuration information for the specified SMBUS. - * @param DevAddress: Target device address - * @param pData: Pointer to data buffer - * @param Size: Amount of data to be sent - * @param XferOptions: Options of Transfer, value of @ref SMBUS_XferOptions_definition - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SMBUS_Master_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions) -{ - /* Check the parameters */ - assert_param(IS_SMBUS_TRANSFER_OPTIONS_REQUEST(XferOptions)); - - if(hsmbus->State == HAL_SMBUS_STATE_READY) - { - /* Process Locked */ - __HAL_LOCK(hsmbus); - - hsmbus->State = HAL_SMBUS_STATE_MASTER_BUSY_TX; - hsmbus->ErrorCode = HAL_SMBUS_ERROR_NONE; - /* Prepare transfer parameters */ - hsmbus->pBuffPtr = pData; - hsmbus->XferCount = Size; - hsmbus->XferOptions = XferOptions; - - /* In case of Quick command, remove autoend mode */ - /* Manage the stop generation by software */ - if(hsmbus->pBuffPtr == NULL) - { - hsmbus->XferOptions &= ~SMBUS_AUTOEND_MODE; - } - - if(Size > MAX_NBYTE_SIZE) - { - hsmbus->XferSize = MAX_NBYTE_SIZE; - } - else - { - hsmbus->XferSize = Size; - } - - /* Send Slave Address */ - /* Set NBYTES to write and reload if size > MAX_NBYTE_SIZE and generate RESTART */ - if( (hsmbus->XferSize == MAX_NBYTE_SIZE) && (hsmbus->XferSize < hsmbus->XferCount) ) - { - SMBUS_TransferConfig(hsmbus,DevAddress,hsmbus->XferSize, SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE), SMBUS_GENERATE_START_WRITE); - } - else - { - /* If transfer direction not change, do not generate Restart Condition */ - /* Mean Previous state is same as current state */ - if(hsmbus->PreviousState == HAL_SMBUS_STATE_MASTER_BUSY_TX) - { - SMBUS_TransferConfig(hsmbus,DevAddress,hsmbus->XferSize, hsmbus->XferOptions, SMBUS_NO_STARTSTOP); - } - /* Else transfer direction change, so generate Restart with new transfer direction */ - else - { - SMBUS_TransferConfig(hsmbus,DevAddress,hsmbus->XferSize, hsmbus->XferOptions, SMBUS_GENERATE_START_WRITE); - } - - /* If PEC mode is enable, size to transmit manage by SW part should be Size-1 byte, corresponding to PEC byte */ - /* PEC byte is automatically sent by HW block, no need to manage it in Transmit process */ - if(SMBUS_GET_PEC_MODE(hsmbus) != RESET) - { - hsmbus->XferSize--; - hsmbus->XferCount--; - } - } - - /* Process Unlocked */ - __HAL_UNLOCK(hsmbus); - - /* Note : The SMBUS interrupts must be enabled after unlocking current process - to avoid the risk of SMBUS interrupt handle execution before current - process unlock */ - SMBUS_Enable_IRQ(hsmbus, SMBUS_IT_TX); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Receive in master/host SMBUS mode an amount of data in non-blocking mode with Interrupt. - * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains - * the configuration information for the specified SMBUS. - * @param DevAddress: Target device address - * @param pData: Pointer to data buffer - * @param Size: Amount of data to be sent - * @param XferOptions: Options of Transfer, value of @ref SMBUS_XferOptions_definition - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SMBUS_Master_Receive_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions) -{ - /* Check the parameters */ - assert_param(IS_SMBUS_TRANSFER_OPTIONS_REQUEST(XferOptions)); - - if(hsmbus->State == HAL_SMBUS_STATE_READY) - { - /* Process Locked */ - __HAL_LOCK(hsmbus); - - hsmbus->State = HAL_SMBUS_STATE_MASTER_BUSY_RX; - hsmbus->ErrorCode = HAL_SMBUS_ERROR_NONE; - - /* Prepare transfer parameters */ - hsmbus->pBuffPtr = pData; - hsmbus->XferCount = Size; - hsmbus->XferOptions = XferOptions; - - /* In case of Quick command, remove autoend mode */ - /* Manage the stop generation by software */ - if(hsmbus->pBuffPtr == NULL) - { - hsmbus->XferOptions &= ~SMBUS_AUTOEND_MODE; - } - - if(Size > MAX_NBYTE_SIZE) - { - hsmbus->XferSize = MAX_NBYTE_SIZE; - } - else - { - hsmbus->XferSize = Size; - } - - /* Send Slave Address */ - /* Set NBYTES to write and reload if size > MAX_NBYTE_SIZE and generate RESTART */ - if( (hsmbus->XferSize == MAX_NBYTE_SIZE) && (hsmbus->XferSize < hsmbus->XferCount) ) - { - SMBUS_TransferConfig(hsmbus,DevAddress,hsmbus->XferSize, SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE), SMBUS_GENERATE_START_READ); - } - else - { - /* If transfer direction not change, do not generate Restart Condition */ - /* Mean Previous state is same as current state */ - if(hsmbus->PreviousState == HAL_SMBUS_STATE_MASTER_BUSY_RX) - { - SMBUS_TransferConfig(hsmbus,DevAddress,hsmbus->XferSize, hsmbus->XferOptions, SMBUS_NO_STARTSTOP); - } - /* Else transfer direction change, so generate Restart with new transfer direction */ - else - { - SMBUS_TransferConfig(hsmbus,DevAddress,hsmbus->XferSize, hsmbus->XferOptions, SMBUS_GENERATE_START_READ); - } - } - - /* Process Unlocked */ - __HAL_UNLOCK(hsmbus); - - /* Note : The SMBUS interrupts must be enabled after unlocking current process - to avoid the risk of SMBUS interrupt handle execution before current - process unlock */ - SMBUS_Enable_IRQ(hsmbus, SMBUS_IT_RX); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Abort a master/host SMBUS process communication with Interrupt. - * @note This abort can be called only if state is ready - * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains - * the configuration information for the specified SMBUS. - * @param DevAddress: Target device address - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SMBUS_Master_Abort_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress) -{ - if(hsmbus->State == HAL_SMBUS_STATE_READY) - { - /* Process Locked */ - __HAL_LOCK(hsmbus); - - /* Keep the same state as previous */ - /* to perform as well the call of the corresponding end of transfer callback */ - if(hsmbus->PreviousState == HAL_SMBUS_STATE_MASTER_BUSY_TX) - { - hsmbus->State = HAL_SMBUS_STATE_MASTER_BUSY_TX; - } - else if(hsmbus->PreviousState == HAL_SMBUS_STATE_MASTER_BUSY_RX) - { - hsmbus->State = HAL_SMBUS_STATE_MASTER_BUSY_RX; - } - else - { - /* Wrong usage of abort function */ - /* This function should be used only in case of abort monitored by master device */ - return HAL_ERROR; - } - hsmbus->ErrorCode = HAL_SMBUS_ERROR_NONE; - - /* Set NBYTES to 1 to generate a dummy read on SMBUS peripheral */ - /* Set AUTOEND mode, this will generate a NACK then STOP condition to abort the current transfer */ - SMBUS_TransferConfig(hsmbus, DevAddress, 1, SMBUS_AUTOEND_MODE, SMBUS_NO_STARTSTOP); - - /* Process Unlocked */ - __HAL_UNLOCK(hsmbus); - - /* Note : The SMBUS interrupts must be enabled after unlocking current process - to avoid the risk of SMBUS interrupt handle execution before current - process unlock */ - if(hsmbus->State == HAL_SMBUS_STATE_MASTER_BUSY_TX) - { - SMBUS_Enable_IRQ(hsmbus, SMBUS_IT_TX); - } - else if(hsmbus->State == HAL_SMBUS_STATE_MASTER_BUSY_RX) - { - SMBUS_Enable_IRQ(hsmbus, SMBUS_IT_RX); - } - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Transmit in slave/device SMBUS mode an amount of data in non-blocking mode with Interrupt. - * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains - * the configuration information for the specified SMBUS. - * @param pData: Pointer to data buffer - * @param Size: Amount of data to be sent - * @param XferOptions: Options of Transfer, value of @ref SMBUS_XferOptions_definition - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SMBUS_Slave_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint8_t *pData, uint16_t Size, uint32_t XferOptions) -{ - /* Check the parameters */ - assert_param(IS_SMBUS_TRANSFER_OPTIONS_REQUEST(XferOptions)); - - if(hsmbus->State == HAL_SMBUS_STATE_LISTEN) - { - if((pData == NULL) || (Size == 0)) - { - return HAL_ERROR; - } - - /* Disable Interrupts, to prevent preemption during treatment in case of multicall */ - SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_ADDR | SMBUS_IT_TX); - - /* Process Locked */ - __HAL_LOCK(hsmbus); - - hsmbus->State |= HAL_SMBUS_STATE_SLAVE_BUSY_TX; - hsmbus->ErrorCode = HAL_SMBUS_ERROR_NONE; - - /* Set SBC bit to manage Acknowledge at each bit */ - hsmbus->Instance->CR1 |= I2C_CR1_SBC; - - /* Enable Address Acknowledge */ - hsmbus->Instance->CR2 &= ~I2C_CR2_NACK; - - /* Prepare transfer parameters */ - hsmbus->pBuffPtr = pData; - hsmbus->XferSize = Size; - hsmbus->XferCount = Size; - hsmbus->XferOptions = XferOptions; - - if(Size > MAX_NBYTE_SIZE) - { - hsmbus->XferSize = MAX_NBYTE_SIZE; - } - else - { - hsmbus->XferSize = Size; - } - - /* Set NBYTES to write and reload if size > MAX_NBYTE_SIZE and generate RESTART */ - if( (hsmbus->XferSize == MAX_NBYTE_SIZE) && (hsmbus->XferSize < hsmbus->XferCount) ) - { - SMBUS_TransferConfig(hsmbus,0,hsmbus->XferSize, SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE), SMBUS_NO_STARTSTOP); - } - else - { - /* Set NBYTE to transmit */ - SMBUS_TransferConfig(hsmbus,0,hsmbus->XferSize, hsmbus->XferOptions, SMBUS_NO_STARTSTOP); - - /* If PEC mode is enable, size to transmit should be Size-1 byte, corresponding to PEC byte */ - /* PEC byte is automatically sent by HW block, no need to manage it in Transmit process */ - if(SMBUS_GET_PEC_MODE(hsmbus) != RESET) - { - hsmbus->XferSize--; - hsmbus->XferCount--; - } - } - - /* Clear ADDR flag after prepare the transfer parameters */ - /* This action will generate an acknowledge to the HOST */ - __HAL_SMBUS_CLEAR_FLAG(hsmbus,SMBUS_FLAG_ADDR); - - /* Process Unlocked */ - __HAL_UNLOCK(hsmbus); - - /* Note : The SMBUS interrupts must be enabled after unlocking current process - to avoid the risk of SMBUS interrupt handle execution before current - process unlock */ - /* REnable ADDR interrupt */ - SMBUS_Enable_IRQ(hsmbus, SMBUS_IT_TX | SMBUS_IT_ADDR); - - return HAL_OK; - } - else - { - return HAL_ERROR; - } -} - -/** - * @brief Receive in slave/device SMBUS mode an amount of data in non-blocking mode with Interrupt. - * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains - * the configuration information for the specified SMBUS. - * @param pData: Pointer to data buffer - * @param Size: Amount of data to be sent - * @param XferOptions: Options of Transfer, value of @ref SMBUS_XferOptions_definition - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SMBUS_Slave_Receive_IT(SMBUS_HandleTypeDef *hsmbus, uint8_t *pData, uint16_t Size, uint32_t XferOptions) -{ - /* Check the parameters */ - assert_param(IS_SMBUS_TRANSFER_OPTIONS_REQUEST(XferOptions)); - - if(hsmbus->State == HAL_SMBUS_STATE_LISTEN) - { - if((pData == NULL) || (Size == 0)) - { - return HAL_ERROR; - } - - /* Disable Interrupts, to prevent preemption during treatment in case of multicall */ - SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_ADDR | SMBUS_IT_RX); - - /* Process Locked */ - __HAL_LOCK(hsmbus); - - hsmbus->State |= HAL_SMBUS_STATE_SLAVE_BUSY_RX; - hsmbus->ErrorCode = HAL_SMBUS_ERROR_NONE; - - /* Set SBC bit to manage Acknowledge at each bit */ - hsmbus->Instance->CR1 |= I2C_CR1_SBC; - - /* Enable Address Acknowledge */ - hsmbus->Instance->CR2 &= ~I2C_CR2_NACK; - - /* Prepare transfer parameters */ - hsmbus->pBuffPtr = pData; - hsmbus->XferSize = Size; - hsmbus->XferCount = Size; - hsmbus->XferOptions = XferOptions; - - /* Set NBYTE to receive */ - /* If XferSize equal "1", or XferSize equal "2" with PEC requested (mean 1 data byte + 1 PEC byte */ - /* no need to set RELOAD bit mode, a ACK will be automatically generated in that case */ - /* else need to set RELOAD bit mode to generate an automatic ACK at each byte Received */ - /* This RELOAD bit will be reset for last BYTE to be receive in SMBUS_Slave_ISR */ - if((hsmbus->XferSize == 1) || ((hsmbus->XferSize == 2) && (SMBUS_GET_PEC_MODE(hsmbus) != RESET))) - { - SMBUS_TransferConfig(hsmbus,0,hsmbus->XferSize, hsmbus->XferOptions, SMBUS_NO_STARTSTOP); - } - else - { - SMBUS_TransferConfig(hsmbus,0, 1, hsmbus->XferOptions | SMBUS_RELOAD_MODE, SMBUS_NO_STARTSTOP); - } - - /* Clear ADDR flag after prepare the transfer parameters */ - /* This action will generate an acknowledge to the HOST */ - __HAL_SMBUS_CLEAR_FLAG(hsmbus,SMBUS_FLAG_ADDR); - - /* Process Unlocked */ - __HAL_UNLOCK(hsmbus); - - /* Note : The SMBUS interrupts must be enabled after unlocking current process - to avoid the risk of SMBUS interrupt handle execution before current - process unlock */ - /* REnable ADDR interrupt */ - SMBUS_Enable_IRQ(hsmbus, SMBUS_IT_RX | SMBUS_IT_ADDR); - - return HAL_OK; - } - else - { - return HAL_ERROR; - } -} - -/** - * @brief Enable the Address listen mode with Interrupt. - * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains - * the configuration information for the specified SMBUS. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SMBUS_EnableListen_IT(SMBUS_HandleTypeDef *hsmbus) -{ - hsmbus->State = HAL_SMBUS_STATE_LISTEN; - - /* Enable the Address Match interrupt */ - SMBUS_Enable_IRQ(hsmbus, SMBUS_IT_ADDR); - - return HAL_OK; -} - -/** - * @brief Disable the Address listen mode with Interrupt. - * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains - * the configuration information for the specified SMBUS. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SMBUS_DisableListen_IT(SMBUS_HandleTypeDef *hsmbus) -{ - /* Disable Address listen mode only if a transfer is not ongoing */ - if(hsmbus->State == HAL_SMBUS_STATE_LISTEN) - { - hsmbus->State = HAL_SMBUS_STATE_READY; - - /* Disable the Address Match interrupt */ - SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_ADDR); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Enable the SMBUS alert mode with Interrupt. - * @param hsmbus : pointer to a SMBUS_HandleTypeDef structure that contains - * the configuration information for the specified SMBUSx peripheral. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SMBUS_EnableAlert_IT(SMBUS_HandleTypeDef *hsmbus) -{ - /* Enable SMBus alert */ - hsmbus->Instance->CR1 |= I2C_CR1_ALERTEN; - - /* Clear ALERT flag */ - __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_ALERT); - - /* Enable Alert Interrupt */ - SMBUS_Enable_IRQ(hsmbus, SMBUS_IT_ALERT); - - return HAL_OK; -} -/** - * @brief Disable the SMBUS alert mode with Interrupt. - * @param hsmbus : pointer to a SMBUS_HandleTypeDef structure that contains - * the configuration information for the specified SMBUSx peripheral. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SMBUS_DisableAlert_IT(SMBUS_HandleTypeDef *hsmbus) -{ - /* Enable SMBus alert */ - hsmbus->Instance->CR1 &= ~I2C_CR1_ALERTEN; - - /* Disable Alert Interrupt */ - SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_ALERT); - - return HAL_OK; -} - -/** - * @brief Check if target device is ready for communication. - * @note This function is used with Memory devices - * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains - * the configuration information for the specified SMBUS. - * @param DevAddress: Target device address - * @param Trials: Number of trials - * @param Timeout: Timeout duration - * @retval HAL status - */ -HAL_StatusTypeDef HAL_SMBUS_IsDeviceReady(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout) -{ - uint32_t tickstart = 0; - - __IO uint32_t SMBUS_Trials = 0; - - if(hsmbus->State == HAL_SMBUS_STATE_READY) - { - if(__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_BUSY) != RESET) - { - return HAL_BUSY; - } - - /* Process Locked */ - __HAL_LOCK(hsmbus); - - hsmbus->State = HAL_SMBUS_STATE_BUSY; - hsmbus->ErrorCode = HAL_SMBUS_ERROR_NONE; - - do - { - /* Generate Start */ - hsmbus->Instance->CR2 = SMBUS_GENERATE_START(hsmbus->Init.AddressingMode,DevAddress); - - /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */ - /* Wait until STOPF flag is set or a NACK flag is set*/ - tickstart = HAL_GetTick(); - while((__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_STOPF) == RESET) && (__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_AF) == RESET) && (hsmbus->State != HAL_SMBUS_STATE_TIMEOUT)) - { - if(Timeout != HAL_MAX_DELAY) - { - if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout)) - { - /* Device is ready */ - hsmbus->State = HAL_SMBUS_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hsmbus); - return HAL_TIMEOUT; - } - } - } - - /* Check if the NACKF flag has not been set */ - if (__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_AF) == RESET) - { - /* Wait until STOPF flag is reset */ - if(SMBUS_WaitOnFlagUntilTimeout(hsmbus, SMBUS_FLAG_STOPF, RESET, Timeout) != HAL_OK) - { - return HAL_TIMEOUT; - } - - /* Clear STOP Flag */ - __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_STOPF); - - /* Device is ready */ - hsmbus->State = HAL_SMBUS_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hsmbus); - - return HAL_OK; - } - else - { - /* Wait until STOPF flag is reset */ - if(SMBUS_WaitOnFlagUntilTimeout(hsmbus, SMBUS_FLAG_STOPF, RESET, Timeout) != HAL_OK) - { - return HAL_TIMEOUT; - } - - /* Clear NACK Flag */ - __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_AF); - - /* Clear STOP Flag, auto generated with autoend*/ - __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_STOPF); - } - - /* Check if the maximum allowed number of trials has been reached */ - if (SMBUS_Trials++ == Trials) - { - /* Generate Stop */ - hsmbus->Instance->CR2 |= I2C_CR2_STOP; - - /* Wait until STOPF flag is reset */ - if(SMBUS_WaitOnFlagUntilTimeout(hsmbus, SMBUS_FLAG_STOPF, RESET, Timeout) != HAL_OK) - { - return HAL_TIMEOUT; - } - - /* Clear STOP Flag */ - __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_STOPF); - } - }while(SMBUS_Trials < Trials); - - hsmbus->State = HAL_SMBUS_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hsmbus); - - return HAL_TIMEOUT; - } - else - { - return HAL_BUSY; - } -} -/** - * @} - */ - -/** @defgroup SMBUS_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks - * @{ - */ - -/** - * @brief Handle SMBUS event interrupt request. - * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains - * the configuration information for the specified SMBUS. - * @retval None - */ -void HAL_SMBUS_EV_IRQHandler(SMBUS_HandleTypeDef *hsmbus) -{ - uint32_t tmpisrvalue = 0; - - /* Use a local variable to store the current ISR flags */ - /* This action will avoid a wrong treatment due to ISR flags change during interrupt handler */ - tmpisrvalue = SMBUS_GET_ISR_REG(hsmbus); - - /* SMBUS in mode Transmitter ---------------------------------------------------*/ - if (((SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_TXIS) != RESET) || (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_TCR) != RESET) || (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_TC) != RESET) || (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_STOPF) != RESET) || (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_AF) != RESET)) && (__HAL_SMBUS_GET_IT_SOURCE(hsmbus, (SMBUS_IT_TCI| SMBUS_IT_STOPI| SMBUS_IT_NACKI | SMBUS_IT_TXI)) != RESET)) - { - /* Slave mode selected */ - if ((hsmbus->State & HAL_SMBUS_STATE_SLAVE_BUSY_TX) == HAL_SMBUS_STATE_SLAVE_BUSY_TX) - { - SMBUS_Slave_ISR(hsmbus); - } - /* Master mode selected */ - else if((hsmbus->State & HAL_SMBUS_STATE_MASTER_BUSY_TX) == HAL_SMBUS_STATE_MASTER_BUSY_TX) - { - SMBUS_Master_ISR(hsmbus); - } - } - - /* SMBUS in mode Receiver ----------------------------------------------------*/ - if (((SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_RXNE) != RESET) || (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_TCR) != RESET) || (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_TC) != RESET) || (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_STOPF) != RESET) || (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_AF) != RESET)) && (__HAL_SMBUS_GET_IT_SOURCE(hsmbus, (SMBUS_IT_TCI| SMBUS_IT_STOPI| SMBUS_IT_NACKI | SMBUS_IT_RXI)) != RESET)) - { - /* Slave mode selected */ - if ((hsmbus->State & HAL_SMBUS_STATE_SLAVE_BUSY_RX) == HAL_SMBUS_STATE_SLAVE_BUSY_RX) - { - SMBUS_Slave_ISR(hsmbus); - } - /* Master mode selected */ - else if((hsmbus->State & HAL_SMBUS_STATE_MASTER_BUSY_RX) == HAL_SMBUS_STATE_MASTER_BUSY_RX) - { - SMBUS_Master_ISR(hsmbus); - } - } - - /* SMBUS in mode Listener Only --------------------------------------------------*/ - if (((SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_ADDR) != RESET) || (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_STOPF) != RESET) || (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_AF) != RESET)) - && ((__HAL_SMBUS_GET_IT_SOURCE(hsmbus, SMBUS_IT_ADDRI) != RESET) || (__HAL_SMBUS_GET_IT_SOURCE(hsmbus, SMBUS_IT_STOPI) != RESET) || (__HAL_SMBUS_GET_IT_SOURCE(hsmbus, SMBUS_IT_NACKI) != RESET))) - { - if (hsmbus->State == HAL_SMBUS_STATE_LISTEN) - { - SMBUS_Slave_ISR(hsmbus); - } - } -} - -/** - * @brief Handle SMBUS error interrupt request. - * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains - * the configuration information for the specified SMBUS. - * @retval None - */ -void HAL_SMBUS_ER_IRQHandler(SMBUS_HandleTypeDef *hsmbus) -{ - /* SMBUS Bus error interrupt occurred ------------------------------------*/ - if((__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_BERR) != RESET) && (__HAL_SMBUS_GET_IT_SOURCE(hsmbus, SMBUS_IT_ERRI) != RESET)) - { - hsmbus->ErrorCode |= HAL_SMBUS_ERROR_BERR; - - /* Clear BERR flag */ - __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_BERR); - } - - /* SMBUS Over-Run/Under-Run interrupt occurred ----------------------------------------*/ - if((__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_OVR) != RESET) && (__HAL_SMBUS_GET_IT_SOURCE(hsmbus, SMBUS_IT_ERRI) != RESET)) - { - hsmbus->ErrorCode |= HAL_SMBUS_ERROR_OVR; - - /* Clear OVR flag */ - __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_OVR); - } - - /* SMBUS Arbitration Loss error interrupt occurred ------------------------------------*/ - if((__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_ARLO) != RESET) && (__HAL_SMBUS_GET_IT_SOURCE(hsmbus, SMBUS_IT_ERRI) != RESET)) - { - hsmbus->ErrorCode |= HAL_SMBUS_ERROR_ARLO; - - /* Clear ARLO flag */ - __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_ARLO); - } - - /* SMBUS Timeout error interrupt occurred ---------------------------------------------*/ - if((__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_TIMEOUT) != RESET) && (__HAL_SMBUS_GET_IT_SOURCE(hsmbus, SMBUS_IT_ERRI) != RESET)) - { - hsmbus->ErrorCode |= HAL_SMBUS_ERROR_BUSTIMEOUT; - - /* Clear TIMEOUT flag */ - __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_TIMEOUT); - } - - /* SMBUS Alert error interrupt occurred -----------------------------------------------*/ - if((__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_ALERT) != RESET) && (__HAL_SMBUS_GET_IT_SOURCE(hsmbus, SMBUS_IT_ERRI) != RESET)) - { - hsmbus->ErrorCode |= HAL_SMBUS_ERROR_ALERT; - - /* Clear ALERT flag */ - __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_ALERT); - } - - /* SMBUS Packet Error Check error interrupt occurred ----------------------------------*/ - if((__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_PECERR) != RESET) && (__HAL_SMBUS_GET_IT_SOURCE(hsmbus, SMBUS_IT_ERRI) != RESET)) - { - hsmbus->ErrorCode |= HAL_SMBUS_ERROR_PECERR; - - /* Clear PEC error flag */ - __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_PECERR); - } - - /* Call the Error Callback() in case of Error detected */ - if((hsmbus->ErrorCode != HAL_SMBUS_ERROR_NONE)&&(hsmbus->ErrorCode != HAL_SMBUS_ERROR_ACKF)) - { - /* Do not Reset the HAL state in case of ALERT error */ - if((hsmbus->ErrorCode & HAL_SMBUS_ERROR_ALERT) != HAL_SMBUS_ERROR_ALERT) - { - if(((hsmbus->State & HAL_SMBUS_STATE_SLAVE_BUSY_TX) == HAL_SMBUS_STATE_SLAVE_BUSY_TX) - || ((hsmbus->State & HAL_SMBUS_STATE_SLAVE_BUSY_RX) == HAL_SMBUS_STATE_SLAVE_BUSY_RX)) - { - /* Reset only HAL_SMBUS_STATE_SLAVE_BUSY_XX */ - /* keep HAL_SMBUS_STATE_LISTEN if set */ - hsmbus->PreviousState = HAL_SMBUS_STATE_READY; - hsmbus->State = HAL_SMBUS_STATE_LISTEN; - } - } - - /* Call the Error callback to prevent upper layer */ - HAL_SMBUS_ErrorCallback(hsmbus); - } -} - -/** - * @brief Master Tx Transfer completed callback. - * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains - * the configuration information for the specified SMBUS. - * @retval None - */ - __weak void HAL_SMBUS_MasterTxCpltCallback(SMBUS_HandleTypeDef *hsmbus) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_SMBUS_TxCpltCallback() could be implemented in the user file - */ -} - -/** - * @brief Master Rx Transfer completed callback. - * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains - * the configuration information for the specified SMBUS. - * @retval None - */ -__weak void HAL_SMBUS_MasterRxCpltCallback(SMBUS_HandleTypeDef *hsmbus) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_SMBUS_TxCpltCallback() could be implemented in the user file - */ -} - -/** @brief Slave Tx Transfer completed callback. - * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains - * the configuration information for the specified SMBUS. - * @retval None - */ - __weak void HAL_SMBUS_SlaveTxCpltCallback(SMBUS_HandleTypeDef *hsmbus) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_SMBUS_TxCpltCallback() could be implemented in the user file - */ -} - -/** - * @brief Slave Rx Transfer completed callback. - * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains - * the configuration information for the specified SMBUS. - * @retval None - */ -__weak void HAL_SMBUS_SlaveRxCpltCallback(SMBUS_HandleTypeDef *hsmbus) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_SMBUS_TxCpltCallback() could be implemented in the user file - */ -} - -/** - * @brief Slave Address Match callback. - * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains - * the configuration information for the specified SMBUS. - * @param TransferDirection: Master request Transfer Direction (Write/Read) - * @param AddrMatchCode: Address Match Code - * @retval None - */ -__weak void HAL_SMBUS_AddrCallback(SMBUS_HandleTypeDef *hsmbus, uint8_t TransferDirection, uint16_t AddrMatchCode) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_SMBUS_AddrCallback() could be implemented in the user file - */ -} - -/** - * @brief Listen Complete callback. - * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains - * the configuration information for the specified SMBUS. - * @retval None - */ -__weak void HAL_SMBUS_ListenCpltCallback(SMBUS_HandleTypeDef *hsmbus) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_SMBUS_ListenCpltCallback() could be implemented in the user file - */ -} - -/** - * @brief SMBUS error callback. - * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains - * the configuration information for the specified SMBUS. - * @retval None - */ - __weak void HAL_SMBUS_ErrorCallback(SMBUS_HandleTypeDef *hsmbus) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_SMBUS_ErrorCallback() could be implemented in the user file - */ -} - -/** - * @} - */ - -/** @defgroup SMBUS_Exported_Functions_Group3 Peripheral State and Errors functions - * @brief Peripheral State and Errors functions - * -@verbatim - =============================================================================== - ##### Peripheral State and Errors functions ##### - =============================================================================== - [..] - This subsection permits to get in run-time the status of the peripheral - and the data flow. - -@endverbatim - * @{ - */ - -/** - * @brief Return the SMBUS handle state. - * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains - * the configuration information for the specified SMBUS. - * @retval HAL state - */ -uint32_t HAL_SMBUS_GetState(SMBUS_HandleTypeDef *hsmbus) -{ - /* Return SMBUS handle state */ - return hsmbus->State; -} - -/** -* @brief Return the SMBUS error code. -* @param hsmbus : pointer to a SMBUS_HandleTypeDef structure that contains - * the configuration information for the specified SMBUS. -* @retval SMBUS Error Code -*/ -uint32_t HAL_SMBUS_GetError(SMBUS_HandleTypeDef *hsmbus) -{ - return hsmbus->ErrorCode; -} - -/** - * @} - */ - -/** - * @} - */ - -/** @addtogroup SMBUS_Private_Functions SMBUS Private Functions - * @brief Data transfers Private functions - * @{ - */ - -/** - * @brief Interrupt Sub-Routine which handle the Interrupt Flags Master Mode. - * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains - * the configuration information for the specified SMBUS. - * @retval HAL status - */ -static HAL_StatusTypeDef SMBUS_Master_ISR(SMBUS_HandleTypeDef *hsmbus) -{ - uint16_t DevAddress; - - /* Process Locked */ - __HAL_LOCK(hsmbus); - - if(__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_AF) != RESET) - { - /* Clear NACK Flag */ - __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_AF); - - /* Set corresponding Error Code */ - /* No need to generate STOP, it is automatically done */ - hsmbus->ErrorCode |= HAL_SMBUS_ERROR_ACKF; - - /* Process Unlocked */ - __HAL_UNLOCK(hsmbus); - - /* Call the Error callback to prevent upper layer */ - HAL_SMBUS_ErrorCallback(hsmbus); - } - else if(__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_STOPF) != RESET) - { - - /* Call the corresponding callback to inform upper layer of End of Transfer */ - if(hsmbus->State == HAL_SMBUS_STATE_MASTER_BUSY_TX) - { - /* Disable Interrupt */ - SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_TX); - - /* Clear STOP Flag */ - __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_STOPF); - - /* Clear Configuration Register 2 */ - SMBUS_RESET_CR2(hsmbus); - - /* Flush remaining data in Fifo register in case of error occurs before TXEmpty */ - /* Disable the selected SMBUS peripheral */ - __HAL_SMBUS_DISABLE(hsmbus); - - hsmbus->PreviousState = HAL_SMBUS_STATE_READY; - hsmbus->State = HAL_SMBUS_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hsmbus); - - /* REenable the selected SMBUS peripheral */ - __HAL_SMBUS_ENABLE(hsmbus); - - HAL_SMBUS_MasterTxCpltCallback(hsmbus); - } - else if(hsmbus->State == HAL_SMBUS_STATE_MASTER_BUSY_RX) - { - /* Disable Interrupt */ - SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_RX); - - /* Clear STOP Flag */ - __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_STOPF); - - /* Clear Configuration Register 2 */ - SMBUS_RESET_CR2(hsmbus); - - hsmbus->PreviousState = HAL_SMBUS_STATE_READY; - hsmbus->State = HAL_SMBUS_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hsmbus); - - HAL_SMBUS_MasterRxCpltCallback(hsmbus); - } - } - else if(__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_RXNE) != RESET) - { - /* Read data from RXDR */ - (*hsmbus->pBuffPtr++) = hsmbus->Instance->RXDR; - hsmbus->XferSize--; - hsmbus->XferCount--; - } - else if(__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_TXIS) != RESET) - { - /* Write data to TXDR */ - hsmbus->Instance->TXDR = (*hsmbus->pBuffPtr++); - hsmbus->XferSize--; - hsmbus->XferCount--; - } - else if(__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_TCR) != RESET) - { - if((hsmbus->XferSize == 0)&&(hsmbus->XferCount!=0)) - { - DevAddress = (hsmbus->Instance->CR2 & I2C_CR2_SADD); - - if(hsmbus->XferCount > MAX_NBYTE_SIZE) - { - SMBUS_TransferConfig(hsmbus, DevAddress, MAX_NBYTE_SIZE, (SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE)), SMBUS_NO_STARTSTOP); - hsmbus->XferSize = MAX_NBYTE_SIZE; - } - else - { - hsmbus->XferSize = hsmbus->XferCount; - SMBUS_TransferConfig(hsmbus,DevAddress,hsmbus->XferSize, hsmbus->XferOptions, SMBUS_NO_STARTSTOP); - /* If PEC mode is enable, size to transmit should be Size-1 byte, corresponding to PEC byte */ - /* PEC byte is automatically sent by HW block, no need to manage it in Transmit process */ - if(SMBUS_GET_PEC_MODE(hsmbus) != RESET) - { - hsmbus->XferSize--; - hsmbus->XferCount--; - } - } - } - else if((hsmbus->XferSize == 0)&&(hsmbus->XferCount==0)) - { - /* Call TxCpltCallback() if no stop mode is set */ - if(SMBUS_GET_STOP_MODE(hsmbus) != SMBUS_AUTOEND_MODE) - { - /* Call the corresponding callback to inform upper layer of End of Transfer */ - if(hsmbus->State == HAL_SMBUS_STATE_MASTER_BUSY_TX) - { - /* Disable Interrupt */ - SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_TX); - hsmbus->PreviousState = hsmbus->State; - hsmbus->State = HAL_SMBUS_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hsmbus); - - HAL_SMBUS_MasterTxCpltCallback(hsmbus); - } - else if(hsmbus->State == HAL_SMBUS_STATE_MASTER_BUSY_RX) - { - SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_RX); - hsmbus->PreviousState = hsmbus->State; - hsmbus->State = HAL_SMBUS_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hsmbus); - - HAL_SMBUS_MasterRxCpltCallback(hsmbus); - } - } - } - } - else if(__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_TC) != RESET) - { - if(hsmbus->XferCount == 0) - { - /* Specific use case for Quick command */ - if(hsmbus->pBuffPtr == NULL) - { - /* Generate a Stop command */ - hsmbus->Instance->CR2 |= I2C_CR2_STOP; - } - /* Call TxCpltCallback() if no stop mode is set */ - else if(SMBUS_GET_STOP_MODE(hsmbus) != SMBUS_AUTOEND_MODE) - { - /* No Generate Stop, to permit restart mode */ - /* The stop will be done at the end of transfer, when SMBUS_AUTOEND_MODE enable */ - - /* Call the corresponding callback to inform upper layer of End of Transfer */ - if(hsmbus->State == HAL_SMBUS_STATE_MASTER_BUSY_TX) - { - /* Disable Interrupt */ - SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_TX); - hsmbus->PreviousState = hsmbus->State; - hsmbus->State = HAL_SMBUS_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hsmbus); - - HAL_SMBUS_MasterTxCpltCallback(hsmbus); - } - else if(hsmbus->State == HAL_SMBUS_STATE_MASTER_BUSY_RX) - { - SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_RX); - hsmbus->PreviousState = hsmbus->State; - hsmbus->State = HAL_SMBUS_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hsmbus); - - HAL_SMBUS_MasterRxCpltCallback(hsmbus); - } - } - } - } - - /* Process Unlocked */ - __HAL_UNLOCK(hsmbus); - - return HAL_OK; -} -/** - * @brief Interrupt Sub-Routine which handle the Interrupt Flags Slave Mode. - * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains - * the configuration information for the specified SMBUS. - * @retval HAL status - */ -static HAL_StatusTypeDef SMBUS_Slave_ISR(SMBUS_HandleTypeDef *hsmbus) -{ - uint8_t TransferDirection = 0; - uint16_t SlaveAddrCode = 0; - - /* Process Locked */ - __HAL_LOCK(hsmbus); - - if(__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_AF) != RESET) - { - /* Check that SMBUS transfer finished */ - /* if yes, normal use case, a NACK is sent by the HOST when Transfer is finished */ - /* Mean XferCount == 0*/ - /* So clear Flag NACKF only */ - if(hsmbus->XferCount == 0) - { - /* Clear NACK Flag */ - __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_AF); - - /* Process Unlocked */ - __HAL_UNLOCK(hsmbus); - } - else - { - /* if no, error use case, a Non-Acknowledge of last Data is generated by the HOST*/ - /* Clear NACK Flag */ - __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_AF); - - /* Set HAL State to "Idle" State, mean to LISTEN state */ - /* So reset Slave Busy state */ - hsmbus->PreviousState = hsmbus->State; - hsmbus->State &= ~((uint32_t)HAL_SMBUS_STATE_SLAVE_BUSY_TX); - hsmbus->State &= ~((uint32_t)HAL_SMBUS_STATE_SLAVE_BUSY_RX); - - /* Disable RX/TX Interrupts, keep only ADDR Interrupt */ - SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_RX | SMBUS_IT_TX); - - /* Set ErrorCode corresponding to a Non-Acknowledge */ - hsmbus->ErrorCode |= HAL_SMBUS_ERROR_ACKF; - - /* Process Unlocked */ - __HAL_UNLOCK(hsmbus); - - /* Call the Error callback to prevent upper layer */ - HAL_SMBUS_ErrorCallback(hsmbus); - } - } - else if(__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_ADDR) != RESET) - { - TransferDirection = SMBUS_GET_DIR(hsmbus); - SlaveAddrCode = SMBUS_GET_ADDR_MATCH(hsmbus); - - /* Disable ADDR interrupt to prevent multiple ADDRInterrupt*/ - /* Other ADDRInterrupt will be treat in next Listen use case */ - __HAL_SMBUS_DISABLE_IT(hsmbus, SMBUS_IT_ADDRI); - - /* Process Unlocked */ - __HAL_UNLOCK(hsmbus); - - /* Call Slave Addr callback */ - HAL_SMBUS_AddrCallback(hsmbus, TransferDirection, SlaveAddrCode); - } - else if((__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_RXNE) != RESET) || (__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_TCR) != RESET)) - { - if( (hsmbus->State & HAL_SMBUS_STATE_SLAVE_BUSY_RX) == HAL_SMBUS_STATE_SLAVE_BUSY_RX) - { - /* Read data from RXDR */ - (*hsmbus->pBuffPtr++) = hsmbus->Instance->RXDR; - hsmbus->XferSize--; - hsmbus->XferCount--; - - if(hsmbus->XferCount == 1) - { - /* Receive last Byte, can be PEC byte in case of PEC BYTE enabled */ - /* or only the last Byte of Transfer */ - /* So reset the RELOAD bit mode */ - hsmbus->XferOptions &= ~SMBUS_RELOAD_MODE; - SMBUS_TransferConfig(hsmbus,0 ,1 , hsmbus->XferOptions, SMBUS_NO_STARTSTOP); - } - else if(hsmbus->XferCount == 0) - { - /* Last Byte is received, disable Interrupt */ - SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_RX); - - /* Remove HAL_SMBUS_STATE_SLAVE_BUSY_RX, keep only HAL_SMBUS_STATE_LISTEN */ - hsmbus->PreviousState = hsmbus->State; - hsmbus->State &= ~((uint32_t)HAL_SMBUS_STATE_SLAVE_BUSY_RX); - - /* Process Unlocked */ - __HAL_UNLOCK(hsmbus); - - /* Call the Rx complete callback to inform upper layer of the end of receive process */ - HAL_SMBUS_SlaveRxCpltCallback(hsmbus); - } - else - { - /* Set Reload for next Bytes */ - SMBUS_TransferConfig(hsmbus,0, 1, SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE), SMBUS_NO_STARTSTOP); - - /* Ack last Byte Read */ - hsmbus->Instance->CR2 &= ~I2C_CR2_NACK; - } - } - else if( (hsmbus->State & HAL_SMBUS_STATE_SLAVE_BUSY_TX) == HAL_SMBUS_STATE_SLAVE_BUSY_TX) - { - if((hsmbus->XferSize == 0)&&(hsmbus->XferCount!=0)) - { - if(hsmbus->XferCount > MAX_NBYTE_SIZE) - { - SMBUS_TransferConfig(hsmbus, 0, MAX_NBYTE_SIZE, (SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE)), SMBUS_NO_STARTSTOP); - hsmbus->XferSize = MAX_NBYTE_SIZE; - } - else - { - hsmbus->XferSize = hsmbus->XferCount; - SMBUS_TransferConfig(hsmbus, 0, hsmbus->XferSize, hsmbus->XferOptions, SMBUS_NO_STARTSTOP); - /* If PEC mode is enable, size to transmit should be Size-1 byte, corresponding to PEC byte */ - /* PEC byte is automatically sent by HW block, no need to manage it in Transmit process */ - if(SMBUS_GET_PEC_MODE(hsmbus) != RESET) - { - hsmbus->XferSize--; - hsmbus->XferCount--; - } - } - } - } - } - else if(__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_TXIS) != RESET) - { - /* Write data to TXDR only if XferCount not reach "0" */ - /* A TXIS flag can be set, during STOP treatment */ - /* Check if all Data have already been sent */ - /* If it is the case, this last write in TXDR is not sent, correspond to a dummy TXIS event */ - if(hsmbus->XferCount > 0) - { - /* Write data to TXDR */ - hsmbus->Instance->TXDR = (*hsmbus->pBuffPtr++); - hsmbus->XferCount--; - hsmbus->XferSize--; - } - - if(hsmbus->XferCount == 0) - { - /* Last Byte is Transmitted */ - /* Remove HAL_SMBUS_STATE_SLAVE_BUSY_TX, keep only HAL_SMBUS_STATE_LISTEN */ - SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_TX); - hsmbus->PreviousState = hsmbus->State; - hsmbus->State &= ~((uint32_t)HAL_SMBUS_STATE_SLAVE_BUSY_TX); - - /* Process Unlocked */ - __HAL_UNLOCK(hsmbus); - - /* Call the Tx complete callback to inform upper layer of the end of transmit process */ - HAL_SMBUS_SlaveTxCpltCallback(hsmbus); - } - } - - /* Check if STOPF is set */ - if(__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_STOPF) != RESET) - { - if((hsmbus->State & HAL_SMBUS_STATE_LISTEN) == HAL_SMBUS_STATE_LISTEN) - { - /* Disable RX and TX Interrupts */ - SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_RX | SMBUS_IT_TX); - - /* Disable ADDR Interrupt */ - SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_ADDR); - - /* Disable Address Acknowledge */ - hsmbus->Instance->CR2 |= I2C_CR2_NACK; - - /* Clear Configuration Register 2 */ - SMBUS_RESET_CR2(hsmbus); - - /* Clear STOP Flag */ - __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_STOPF); - - /* Clear ADDR flag */ - __HAL_SMBUS_CLEAR_FLAG(hsmbus,SMBUS_FLAG_ADDR); - - hsmbus->XferOptions = 0; - hsmbus->PreviousState = hsmbus->State; - hsmbus->State = HAL_SMBUS_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hsmbus); - - /* Call the Listen Complete callback, to prevent upper layer of the end of Listen use case */ - HAL_SMBUS_ListenCpltCallback(hsmbus); - } - } - - /* Process Unlocked */ - __HAL_UNLOCK(hsmbus); - - return HAL_OK; -} -/** - * @brief Manage the enabling of Interrupts. - * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains - * the configuration information for the specified SMBUS. - * @param InterruptRequest : Value of @ref SMBUS_Interrupt_configuration_definition. - * @retval HAL status - */ -static HAL_StatusTypeDef SMBUS_Enable_IRQ(SMBUS_HandleTypeDef *hsmbus, uint16_t InterruptRequest) -{ - uint32_t tmpisr = 0; - - if((InterruptRequest & SMBUS_IT_ALERT) == SMBUS_IT_ALERT) - { - /* Enable ERR interrupt */ - tmpisr |= SMBUS_IT_ERRI; - } - - if((InterruptRequest & SMBUS_IT_ADDR) == SMBUS_IT_ADDR) - { - /* Enable ADDR, STOP interrupt */ - tmpisr |= SMBUS_IT_ADDRI | SMBUS_IT_STOPI | SMBUS_IT_NACKI | SMBUS_IT_ERRI; - } - - if((InterruptRequest & SMBUS_IT_TX) == SMBUS_IT_TX) - { - /* Enable ERR, TC, STOP, NACK, RXI interrupt */ - tmpisr |= SMBUS_IT_ERRI | SMBUS_IT_TCI | SMBUS_IT_STOPI | SMBUS_IT_NACKI | SMBUS_IT_TXI; - } - - if((InterruptRequest & SMBUS_IT_RX) == SMBUS_IT_RX) - { - /* Enable ERR, TC, STOP, NACK, TXI interrupt */ - tmpisr |= SMBUS_IT_ERRI | SMBUS_IT_TCI | SMBUS_IT_STOPI | SMBUS_IT_NACKI | SMBUS_IT_RXI; - } - - /* Enable interrupts only at the end */ - /* to avoid the risk of SMBUS interrupt handle execution before */ - /* all interrupts requested done */ - __HAL_SMBUS_ENABLE_IT(hsmbus, tmpisr); - - return HAL_OK; -} -/** - * @brief Manage the disabling of Interrupts. - * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains - * the configuration information for the specified SMBUS. - * @param InterruptRequest : Value of @ref SMBUS_Interrupt_configuration_definition. - * @retval HAL status - */ -static HAL_StatusTypeDef SMBUS_Disable_IRQ(SMBUS_HandleTypeDef *hsmbus, uint16_t InterruptRequest) -{ - uint32_t tmpisr = 0; - - if( ((InterruptRequest & SMBUS_IT_ALERT) == SMBUS_IT_ALERT) && (hsmbus->State == HAL_SMBUS_STATE_READY) ) - { - /* Disable ERR interrupt */ - tmpisr |= SMBUS_IT_ERRI; - } - - if((InterruptRequest & SMBUS_IT_TX) == SMBUS_IT_TX) - { - /* Disable TC, STOP, NACK, TXI interrupt */ - tmpisr |= SMBUS_IT_TCI | SMBUS_IT_TXI; - - if((SMBUS_GET_ALERT_ENABLED(hsmbus) == RESET) - && ((hsmbus->State & HAL_SMBUS_STATE_LISTEN) != HAL_SMBUS_STATE_LISTEN)) - { - /* Disable ERR interrupt */ - tmpisr |= SMBUS_IT_ERRI; - } - - if((hsmbus->State & HAL_SMBUS_STATE_LISTEN) != HAL_SMBUS_STATE_LISTEN) - { - /* Disable STOPI, NACKI */ - tmpisr |= SMBUS_IT_STOPI | SMBUS_IT_NACKI; - } - } - - if((InterruptRequest & SMBUS_IT_RX) == SMBUS_IT_RX) - { - /* Disable TC, STOP, NACK, RXI interrupt */ - tmpisr |= SMBUS_IT_TCI | SMBUS_IT_RXI; - - if((SMBUS_GET_ALERT_ENABLED(hsmbus) == RESET) - && ((hsmbus->State & HAL_SMBUS_STATE_LISTEN) != HAL_SMBUS_STATE_LISTEN)) - { - /* Disable ERR interrupt */ - tmpisr |= SMBUS_IT_ERRI; - } - - if((hsmbus->State & HAL_SMBUS_STATE_LISTEN) != HAL_SMBUS_STATE_LISTEN) - { - /* Disable STOPI, NACKI */ - tmpisr |= SMBUS_IT_STOPI | SMBUS_IT_NACKI; - } - } - - if((InterruptRequest & SMBUS_IT_ADDR) == SMBUS_IT_ADDR) - { - /* Enable ADDR, STOP interrupt */ - tmpisr |= SMBUS_IT_ADDRI | SMBUS_IT_STOPI | SMBUS_IT_NACKI; - - if(SMBUS_GET_ALERT_ENABLED(hsmbus) == RESET) - { - /* Disable ERR interrupt */ - tmpisr |= SMBUS_IT_ERRI; - } - } - - /* Disable interrupts only at the end */ - /* to avoid a breaking situation like at "t" time */ - /* all disable interrupts request are not done */ - __HAL_SMBUS_DISABLE_IT(hsmbus, tmpisr); - - return HAL_OK; -} -/** - * @brief Handle SMBUS Communication Timeout. - * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains - * the configuration information for the specified SMBUS. - * @param Flag: specifies the SMBUS flag to check. - * @param Status: The new Flag status (SET or RESET). - * @param Timeout: Timeout duration - * @retval HAL status - */ -static HAL_StatusTypeDef SMBUS_WaitOnFlagUntilTimeout(SMBUS_HandleTypeDef *hsmbus, uint32_t Flag, FlagStatus Status, uint32_t Timeout) -{ - uint32_t tickstart = HAL_GetTick(); - - /* Wait until flag is set */ - if(Status == RESET) - { - while(__HAL_SMBUS_GET_FLAG(hsmbus, Flag) == RESET) - { - /* Check for the Timeout */ - if(Timeout != HAL_MAX_DELAY) - { - if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout)) - { - hsmbus->PreviousState = hsmbus->State; - hsmbus->State= HAL_SMBUS_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hsmbus); - - return HAL_TIMEOUT; - } - } - } - } - else - { - while(__HAL_SMBUS_GET_FLAG(hsmbus, Flag) != RESET) - { - /* Check for the Timeout */ - if(Timeout != HAL_MAX_DELAY) - { - if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout)) - { - hsmbus->PreviousState = hsmbus->State; - hsmbus->State= HAL_SMBUS_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hsmbus); - - return HAL_TIMEOUT; - } - } - } - } - return HAL_OK; -} - -/** - * @brief Handle SMBUSx communication when starting transfer or during transfer (TC or TCR flag are set). - * @param hsmbus: SMBUS handle. - * @param DevAddress: specifies the slave address to be programmed. - * @param Size: specifies the number of bytes to be programmed. - * This parameter must be a value between 0 and 255. - * @param Mode: new state of the SMBUS START condition generation. - * This parameter can be one or a combination of the following values: - * @arg SMBUS_NO_MODE: No specific mode enabled. - * @arg SMBUS_RELOAD_MODE: Enable Reload mode. - * @arg SMBUS_AUTOEND_MODE: Enable Automatic end mode. - * @arg SMBUS_SOFTEND_MODE: Enable Software end mode and Reload mode. - * @param Request: new state of the SMBUS START condition generation. - * This parameter can be one of the following values: - * @arg SMBUS_NO_STARTSTOP: Don't Generate stop and start condition. - * @arg SMBUS_GENERATE_STOP: Generate stop condition (Size should be set to 0). - * @arg SMBUS_GENERATE_START_READ: Generate Restart for read request. - * @arg SMBUS_GENERATE_START_WRITE: Generate Restart for write request. - * @retval None - */ -static void SMBUS_TransferConfig(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t Size, uint32_t Mode, uint32_t Request) -{ - uint32_t tmpreg = 0; - - /* Check the parameters */ - assert_param(IS_SMBUS_ALL_INSTANCE(hsmbus->Instance)); - assert_param(IS_SMBUS_TRANSFER_MODE(Mode)); - assert_param(IS_SMBUS_TRANSFER_REQUEST(Request)); - - /* Get the CR2 register value */ - tmpreg = hsmbus->Instance->CR2; - - /* clear tmpreg specific bits */ - tmpreg &= (uint32_t)~((uint32_t)(I2C_CR2_SADD | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_AUTOEND | I2C_CR2_RD_WRN | I2C_CR2_START | I2C_CR2_STOP | I2C_CR2_PECBYTE)); - - /* update tmpreg */ - tmpreg |= (uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | (((uint32_t)Size << 16 ) & I2C_CR2_NBYTES) | \ - (uint32_t)Mode | (uint32_t)Request); - - /* update CR2 register */ - hsmbus->Instance->CR2 = tmpreg; -} -/** - * @} - */ - -#endif /* HAL_SMBUS_MODULE_ENABLED */ -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ -
--- a/Src/stm32l4xx_hal_tim.c Thu Nov 12 20:49:49 2015 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,5309 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_tim.c - * @author MCD Application Team - * @version V1.1.0 - * @date 16-September-2015 - * @brief TIM HAL module driver. - * This file provides firmware functions to manage the following - * functionalities of the Timer (TIM) peripheral: - * + Time Base Initialization - * + Time Base Start - * + Time Base Start Interruption - * + Time Base Start DMA - * + Time Output Compare/PWM Initialization - * + Time Output Compare/PWM Channel Configuration - * + Time Output Compare/PWM Start - * + Time Output Compare/PWM Start Interruption - * + Time Output Compare/PWM Start DMA - * + Time Input Capture Initialization - * + Time Input Capture Channel Configuration - * + Time Input Capture Start - * + Time Input Capture Start Interruption - * + Time Input Capture Start DMA - * + Time One Pulse Initialization - * + Time One Pulse Channel Configuration - * + Time One Pulse Start - * + Time Encoder Interface Initialization - * + Time Encoder Interface Start - * + Time Encoder Interface Start Interruption - * + Time Encoder Interface Start DMA - * + Commutation Event configuration with Interruption and DMA - * + Time OCRef clear configuration - * + Time External Clock configuration - @verbatim - ============================================================================== - ##### TIMER Generic features ##### - ============================================================================== - [..] The Timer features include: - (#) 16-bit up, down, up/down auto-reload counter. - (#) 16-bit programmable prescaler allowing dividing (also on the fly) the - counter clock frequency either by any factor between 1 and 65536. - (#) Up to 4 independent channels for: - (++) Input Capture - (++) Output Compare - (++) PWM generation (Edge and Center-aligned Mode) - (++) One-pulse mode output - - ##### How to use this driver ##### - ============================================================================== - [..] - (#) Initialize the TIM low level resources by implementing the following functions - depending on the selected feature: - (++) Time Base : HAL_TIM_Base_MspInit() - (++) Input Capture : HAL_TIM_IC_MspInit() - (++) Output Compare : HAL_TIM_OC_MspInit() - (++) PWM generation : HAL_TIM_PWM_MspInit() - (++) One-pulse mode output : HAL_TIM_OnePulse_MspInit() - (++) Encoder mode output : HAL_TIM_Encoder_MspInit() - - (#) Initialize the TIM low level resources : - (##) Enable the TIM interface clock using __HAL_RCC_TIMx_CLK_ENABLE(); - (##) TIM pins configuration - (+++) Enable the clock for the TIM GPIOs using the following function: - __HAL_RCC_GPIOx_CLK_ENABLE(); - (+++) Configure these TIM pins in Alternate function mode using HAL_GPIO_Init(); - - (#) The external Clock can be configured, if needed (the default clock is the - internal clock from the APBx), using the following function: - HAL_TIM_ConfigClockSource, the clock configuration should be done before - any start function. - - (#) Configure the TIM in the desired functioning mode using one of the - Initialization function of this driver: - (++) HAL_TIM_Base_Init: to use the Timer to generate a simple time base - (++) HAL_TIM_OC_Init and HAL_TIM_OC_ConfigChannel: to use the Timer to generate an - Output Compare signal. - (++) HAL_TIM_PWM_Init and HAL_TIM_PWM_ConfigChannel: to use the Timer to generate a - PWM signal. - (++) HAL_TIM_IC_Init and HAL_TIM_IC_ConfigChannel: to use the Timer to measure an - external signal. - (++) HAL_TIM_OnePulse_Init and HAL_TIM_OnePulse_ConfigChannel: to use the Timer - in One Pulse Mode. - (++) HAL_TIM_Encoder_Init: to use the Timer Encoder Interface. - - (#) Activate the TIM peripheral using one of the start functions depending from the feature used: - (++) Time Base : HAL_TIM_Base_Start(), HAL_TIM_Base_Start_DMA(), HAL_TIM_Base_Start_IT() - (++) Input Capture : HAL_TIM_IC_Start(), HAL_TIM_IC_Start_DMA(), HAL_TIM_IC_Start_IT() - (++) Output Compare : HAL_TIM_OC_Start(), HAL_TIM_OC_Start_DMA(), HAL_TIM_OC_Start_IT() - (++) PWM generation : HAL_TIM_PWM_Start(), HAL_TIM_PWM_Start_DMA(), HAL_TIM_PWM_Start_IT() - (++) One-pulse mode output : HAL_TIM_OnePulse_Start(), HAL_TIM_OnePulse_Start_IT() - (++) Encoder mode output : HAL_TIM_Encoder_Start(), HAL_TIM_Encoder_Start_DMA(), HAL_TIM_Encoder_Start_IT(). - - (#) The DMA Burst is managed with the two following functions: - HAL_TIM_DMABurst_WriteStart() - HAL_TIM_DMABurst_ReadStart() - - @endverbatim - ****************************************************************************** - * @attention - * - * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @defgroup TIM TIM - * @brief TIM HAL module driver - * @{ - */ - -#ifdef HAL_TIM_MODULE_ENABLED - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -/* Private macro -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ -static void TIM_TI1_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter); -static void TIM_TI2_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection, - uint32_t TIM_ICFilter); -static void TIM_TI2_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter); -static void TIM_TI3_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection, - uint32_t TIM_ICFilter); -static void TIM_TI4_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection, - uint32_t TIM_ICFilter); -static void TIM_ITRx_SetConfig(TIM_TypeDef* TIMx, uint16_t InputTriggerSource); -static void TIM_DMAPeriodElapsedCplt(DMA_HandleTypeDef *hdma); -static void TIM_DMATriggerCplt(DMA_HandleTypeDef *hdma); -static void TIM_SlaveTimer_SetConfig(TIM_HandleTypeDef *htim, - TIM_SlaveConfigTypeDef * sSlaveConfig); -/* Exported functions --------------------------------------------------------*/ - -/** @defgroup TIM_Exported_Functions TIM Exported Functions - * @{ - */ - -/** @defgroup TIM_Exported_Functions_Group1 Time Base functions - * @brief Time Base functions - * -@verbatim - ============================================================================== - ##### Time Base functions ##### - ============================================================================== - [..] - This section provides functions allowing to: - (+) Initialize and configure the TIM base. - (+) De-initialize the TIM base. - (+) Start the Time Base. - (+) Stop the Time Base. - (+) Start the Time Base and enable interrupt. - (+) Stop the Time Base and disable interrupt. - (+) Start the Time Base and enable DMA transfer. - (+) Stop the Time Base and disable DMA transfer. - -@endverbatim - * @{ - */ -/** - * @brief Initializes the TIM Time base Unit according to the specified - * parameters in the TIM_HandleTypeDef and initialize the associated handle. - * @param htim: TIM Base handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim) -{ - /* Check the TIM handle allocation */ - if(htim == NULL) - { - return HAL_ERROR; - } - - /* Check the parameters */ - assert_param(IS_TIM_INSTANCE(htim->Instance)); - assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); - assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); - - if(htim->State == HAL_TIM_STATE_RESET) - { - /* Allocate lock resource and initialize it */ - htim->Lock = HAL_UNLOCKED; - - /* Init the low level hardware : GPIO, CLOCK, NVIC */ - HAL_TIM_Base_MspInit(htim); - } - - /* Set the TIM state */ - htim->State= HAL_TIM_STATE_BUSY; - - /* Set the Time Base configuration */ - TIM_Base_SetConfig(htim->Instance, &htim->Init); - - /* Initialize the TIM state*/ - htim->State= HAL_TIM_STATE_READY; - - return HAL_OK; -} - -/** - * @brief DeInitialize the TIM Base peripheral - * @param htim: TIM Base handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_Base_DeInit(TIM_HandleTypeDef *htim) -{ - /* Check the parameters */ - assert_param(IS_TIM_INSTANCE(htim->Instance)); - - htim->State = HAL_TIM_STATE_BUSY; - - /* Disable the TIM Peripheral Clock */ - __HAL_TIM_DISABLE(htim); - - /* DeInit the low level hardware: GPIO, CLOCK, NVIC */ - HAL_TIM_Base_MspDeInit(htim); - - /* Change TIM state */ - htim->State = HAL_TIM_STATE_RESET; - - /* Release Lock */ - __HAL_UNLOCK(htim); - - return HAL_OK; -} - -/** - * @brief Initializes the TIM Base MSP. - * @param htim: TIM handle - * @retval None - */ -__weak void HAL_TIM_Base_MspInit(TIM_HandleTypeDef *htim) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_TIM_Base_MspInit could be implemented in the user file - */ -} - -/** - * @brief DeInitialize TIM Base MSP. - * @param htim: TIM handle - * @retval None - */ -__weak void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef *htim) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_TIM_Base_MspDeInit could be implemented in the user file - */ -} - - -/** - * @brief Starts the TIM Base generation. - * @param htim : TIM handle - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_Base_Start(TIM_HandleTypeDef *htim) -{ - /* Check the parameters */ - assert_param(IS_TIM_INSTANCE(htim->Instance)); - - /* Set the TIM state */ - htim->State= HAL_TIM_STATE_BUSY; - - /* Enable the Peripheral */ - __HAL_TIM_ENABLE(htim); - - /* Change the TIM state*/ - htim->State= HAL_TIM_STATE_READY; - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the TIM Base generation. - * @param htim : TIM handle - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_Base_Stop(TIM_HandleTypeDef *htim) -{ - /* Check the parameters */ - assert_param(IS_TIM_INSTANCE(htim->Instance)); - - /* Set the TIM state */ - htim->State= HAL_TIM_STATE_BUSY; - - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Change the TIM state*/ - htim->State= HAL_TIM_STATE_READY; - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Starts the TIM Base generation in interrupt mode. - * @param htim : TIM handle - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_Base_Start_IT(TIM_HandleTypeDef *htim) -{ - /* Check the parameters */ - assert_param(IS_TIM_INSTANCE(htim->Instance)); - - /* Enable the TIM Update interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE); - - /* Enable the Peripheral */ - __HAL_TIM_ENABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the TIM Base generation in interrupt mode. - * @param htim : TIM handle - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_Base_Stop_IT(TIM_HandleTypeDef *htim) -{ - /* Check the parameters */ - assert_param(IS_TIM_INSTANCE(htim->Instance)); - /* Disable the TIM Update interrupt */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_UPDATE); - - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Starts the TIM Base generation in DMA mode. - * @param htim : TIM handle - * @param pData: The source Buffer address. - * @param Length: The length of data to be transferred from memory to peripheral. - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_Base_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length) -{ - /* Check the parameters */ - assert_param(IS_TIM_DMA_INSTANCE(htim->Instance)); - - if((htim->State == HAL_TIM_STATE_BUSY)) - { - return HAL_BUSY; - } - else if((htim->State == HAL_TIM_STATE_READY)) - { - if((pData == 0 ) && (Length > 0)) - { - return HAL_ERROR; - } - else - { - htim->State = HAL_TIM_STATE_BUSY; - } - } - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_UPDATE]->XferCpltCallback = TIM_DMAPeriodElapsedCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_UPDATE]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_UPDATE], (uint32_t)pData, (uint32_t)&htim->Instance->ARR, Length); - - /* Enable the TIM Update DMA request */ - __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_UPDATE); - - /* Enable the Peripheral */ - __HAL_TIM_ENABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the TIM Base generation in DMA mode. - * @param htim : TIM handle - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_Base_Stop_DMA(TIM_HandleTypeDef *htim) -{ - /* Check the parameters */ - assert_param(IS_TIM_DMA_INSTANCE(htim->Instance)); - - /* Disable the TIM Update DMA request */ - __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_UPDATE); - - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Change the htim state */ - htim->State = HAL_TIM_STATE_READY; - - /* Return function status */ - return HAL_OK; -} - -/** - * @} - */ - -/** @defgroup TIM_Exported_Functions_Group2 Time Output Compare functions - * @brief Time Output Compare functions - * -@verbatim - ============================================================================== - ##### Time Output Compare functions ##### - ============================================================================== - [..] - This section provides functions allowing to: - (+) Initialize and configure the TIM Output Compare. - (+) De-initialize the TIM Output Compare. - (+) Start the Time Output Compare. - (+) Stop the Time Output Compare. - (+) Start the Time Output Compare and enable interrupt. - (+) Stop the Time Output Compare and disable interrupt. - (+) Start the Time Output Compare and enable DMA transfer. - (+) Stop the Time Output Compare and disable DMA transfer. - -@endverbatim - * @{ - */ -/** - * @brief Initializes the TIM Output Compare according to the specified - * parameters in the TIM_HandleTypeDef and initialize the associated handle. - * @param htim: TIM Output Compare handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_OC_Init(TIM_HandleTypeDef* htim) -{ - /* Check the TIM handle allocation */ - if(htim == NULL) - { - return HAL_ERROR; - } - - /* Check the parameters */ - assert_param(IS_TIM_INSTANCE(htim->Instance)); - assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); - assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); - - if(htim->State == HAL_TIM_STATE_RESET) - { - /* Allocate lock resource and initialize it */ - htim->Lock = HAL_UNLOCKED; - - /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */ - HAL_TIM_OC_MspInit(htim); - } - - /* Set the TIM state */ - htim->State= HAL_TIM_STATE_BUSY; - - /* Init the base time for the Output Compare */ - TIM_Base_SetConfig(htim->Instance, &htim->Init); - - /* Initialize the TIM state*/ - htim->State= HAL_TIM_STATE_READY; - - return HAL_OK; -} - -/** - * @brief DeInitialize the TIM peripheral - * @param htim: TIM Output Compare handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_OC_DeInit(TIM_HandleTypeDef *htim) -{ - /* Check the parameters */ - assert_param(IS_TIM_INSTANCE(htim->Instance)); - - htim->State = HAL_TIM_STATE_BUSY; - - /* Disable the TIM Peripheral Clock */ - __HAL_TIM_DISABLE(htim); - - /* DeInit the low level hardware: GPIO, CLOCK, NVIC and DMA */ - HAL_TIM_OC_MspDeInit(htim); - - /* Change TIM state */ - htim->State = HAL_TIM_STATE_RESET; - - /* Release Lock */ - __HAL_UNLOCK(htim); - - return HAL_OK; -} - -/** - * @brief Initializes the TIM Output Compare MSP. - * @param htim: TIM handle - * @retval None - */ -__weak void HAL_TIM_OC_MspInit(TIM_HandleTypeDef *htim) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_TIM_OC_MspInit could be implemented in the user file - */ -} - -/** - * @brief DeInitialize TIM Output Compare MSP. - * @param htim: TIM handle - * @retval None - */ -__weak void HAL_TIM_OC_MspDeInit(TIM_HandleTypeDef *htim) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_TIM_OC_MspDeInit could be implemented in the user file - */ -} - -/** - * @brief Starts the TIM Output Compare signal generation. - * @param htim : TIM Output Compare handle - * @param Channel : TIM Channel to be enabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @arg TIM_CHANNEL_5: TIM Channel 5 selected - * @arg TIM_CHANNEL_6: TIM Channel 6 selected - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_OC_Start(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); - - /* Enable the Output compare channel */ - TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); - - if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) - { - /* Enable the main output */ - __HAL_TIM_MOE_ENABLE(htim); - } - - /* Enable the Peripheral */ - __HAL_TIM_ENABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the TIM Output Compare signal generation. - * @param htim : TIM handle - * @param Channel : TIM Channel to be disabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @arg TIM_CHANNEL_5: TIM Channel 5 selected - * @arg TIM_CHANNEL_6: TIM Channel 6 selected - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_OC_Stop(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); - - /* Disable the Output compare channel */ - TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE); - - if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) - { - /* Disable the Main Ouput */ - __HAL_TIM_MOE_DISABLE(htim); - } - - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Starts the TIM Output Compare signal generation in interrupt mode. - * @param htim : TIM OC handle - * @param Channel : TIM Channel to be enabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @arg TIM_CHANNEL_5: TIM Channel 5 selected - * @arg TIM_CHANNEL_6: TIM Channel 6 selected - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_OC_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); - - switch (Channel) - { - case TIM_CHANNEL_1: - { - /* Enable the TIM Capture/Compare 1 interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); - } - break; - - case TIM_CHANNEL_2: - { - /* Enable the TIM Capture/Compare 2 interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); - } - break; - - case TIM_CHANNEL_3: - { - /* Enable the TIM Capture/Compare 3 interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3); - } - break; - - case TIM_CHANNEL_4: - { - /* Enable the TIM Capture/Compare 4 interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4); - } - break; - - default: - break; - } - - /* Enable the Output compare channel */ - TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); - - if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) - { - /* Enable the main output */ - __HAL_TIM_MOE_ENABLE(htim); - } - - /* Enable the Peripheral */ - __HAL_TIM_ENABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the TIM Output Compare signal generation in interrupt mode. - * @param htim : TIM Output Compare handle - * @param Channel : TIM Channel to be disabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @arg TIM_CHANNEL_5: TIM Channel 5 selected - * @arg TIM_CHANNEL_6: TIM Channel 6 selected - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_OC_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); - - switch (Channel) - { - case TIM_CHANNEL_1: - { - /* Disable the TIM Capture/Compare 1 interrupt */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); - } - break; - - case TIM_CHANNEL_2: - { - /* Disable the TIM Capture/Compare 2 interrupt */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); - } - break; - - case TIM_CHANNEL_3: - { - /* Disable the TIM Capture/Compare 3 interrupt */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3); - } - break; - - case TIM_CHANNEL_4: - { - /* Disable the TIM Capture/Compare 4 interrupt */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4); - } - break; - - default: - break; - } - - /* Disable the Output compare channel */ - TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE); - - if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) - { - /* Disable the Main Ouput */ - __HAL_TIM_MOE_DISABLE(htim); - } - - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Starts the TIM Output Compare signal generation in DMA mode. - * @param htim : TIM Output Compare handle - * @param Channel : TIM Channel to be enabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @arg TIM_CHANNEL_5: TIM Channel 5 selected - * @arg TIM_CHANNEL_6: TIM Channel 6 selected - * @param pData: The source Buffer address. - * @param Length: The length of data to be transferred from memory to TIM peripheral - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_OC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); - - if((htim->State == HAL_TIM_STATE_BUSY)) - { - return HAL_BUSY; - } - else if((htim->State == HAL_TIM_STATE_READY)) - { - if(((uint32_t)pData == 0 ) && (Length > 0)) - { - return HAL_ERROR; - } - else - { - htim->State = HAL_TIM_STATE_BUSY; - } - } - switch (Channel) - { - case TIM_CHANNEL_1: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length); - - /* Enable the TIM Capture/Compare 1 DMA request */ - __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); - } - break; - - case TIM_CHANNEL_2: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length); - - /* Enable the TIM Capture/Compare 2 DMA request */ - __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2); - } - break; - - case TIM_CHANNEL_3: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,Length); - - /* Enable the TIM Capture/Compare 3 DMA request */ - __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3); - } - break; - - case TIM_CHANNEL_4: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMADelayPulseCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance->CCR4, Length); - - /* Enable the TIM Capture/Compare 4 DMA request */ - __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4); - } - break; - - default: - break; - } - - /* Enable the Output compare channel */ - TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); - - if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) - { - /* Enable the main output */ - __HAL_TIM_MOE_ENABLE(htim); - } - - /* Enable the Peripheral */ - __HAL_TIM_ENABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the TIM Output Compare signal generation in DMA mode. - * @param htim : TIM Output Compare handle - * @param Channel : TIM Channel to be disabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @arg TIM_CHANNEL_5: TIM Channel 5 selected - * @arg TIM_CHANNEL_6: TIM Channel 6 selected - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_OC_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); - - switch (Channel) - { - case TIM_CHANNEL_1: - { - /* Disable the TIM Capture/Compare 1 DMA request */ - __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); - } - break; - - case TIM_CHANNEL_2: - { - /* Disable the TIM Capture/Compare 2 DMA request */ - __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2); - } - break; - - case TIM_CHANNEL_3: - { - /* Disable the TIM Capture/Compare 3 DMA request */ - __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3); - } - break; - - case TIM_CHANNEL_4: - { - /* Disable the TIM Capture/Compare 4 interrupt */ - __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4); - } - break; - - default: - break; - } - - /* Disable the Output compare channel */ - TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE); - - if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) - { - /* Disable the Main Ouput */ - __HAL_TIM_MOE_DISABLE(htim); - } - - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Change the htim state */ - htim->State = HAL_TIM_STATE_READY; - - /* Return function status */ - return HAL_OK; -} - -/** - * @} - */ - -/** @defgroup TIM_Exported_Functions_Group3 Time PWM functions - * @brief Time PWM functions - * -@verbatim - ============================================================================== - ##### Time PWM functions ##### - ============================================================================== - [..] - This section provides functions allowing to: - (+) Initialize and configure the TIM OPWM. - (+) De-initialize the TIM PWM. - (+) Start the Time PWM. - (+) Stop the Time PWM. - (+) Start the Time PWM and enable interrupt. - (+) Stop the Time PWM and disable interrupt. - (+) Start the Time PWM and enable DMA transfer. - (+) Stop the Time PWM and disable DMA transfer. - -@endverbatim - * @{ - */ -/** - * @brief Initializes the TIM PWM Time Base according to the specified - * parameters in the TIM_HandleTypeDef and initialize the associated handle. - * @param htim: TIM handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_PWM_Init(TIM_HandleTypeDef *htim) -{ - /* Check the TIM handle allocation */ - if(htim == NULL) - { - return HAL_ERROR; - } - - /* Check the parameters */ - assert_param(IS_TIM_INSTANCE(htim->Instance)); - assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); - assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); - - if(htim->State == HAL_TIM_STATE_RESET) - { - /* Allocate lock resource and initialize it */ - htim->Lock = HAL_UNLOCKED; - - /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */ - HAL_TIM_PWM_MspInit(htim); - } - - /* Set the TIM state */ - htim->State= HAL_TIM_STATE_BUSY; - - /* Init the base time for the PWM */ - TIM_Base_SetConfig(htim->Instance, &htim->Init); - - /* Initialize the TIM state*/ - htim->State= HAL_TIM_STATE_READY; - - return HAL_OK; -} - -/** - * @brief DeInitialize the TIM peripheral - * @param htim: TIM handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_PWM_DeInit(TIM_HandleTypeDef *htim) -{ - /* Check the parameters */ - assert_param(IS_TIM_INSTANCE(htim->Instance)); - - htim->State = HAL_TIM_STATE_BUSY; - - /* Disable the TIM Peripheral Clock */ - __HAL_TIM_DISABLE(htim); - - /* DeInit the low level hardware: GPIO, CLOCK, NVIC and DMA */ - HAL_TIM_PWM_MspDeInit(htim); - - /* Change TIM state */ - htim->State = HAL_TIM_STATE_RESET; - - /* Release Lock */ - __HAL_UNLOCK(htim); - - return HAL_OK; -} - -/** - * @brief Initializes the TIM PWM MSP. - * @param htim: TIM handle - * @retval None - */ -__weak void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef *htim) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_TIM_PWM_MspInit could be implemented in the user file - */ -} - -/** - * @brief DeInitialize TIM PWM MSP. - * @param htim: TIM handle - * @retval None - */ -__weak void HAL_TIM_PWM_MspDeInit(TIM_HandleTypeDef *htim) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_TIM_PWM_MspDeInit could be implemented in the user file - */ -} - -/** - * @brief Starts the PWM signal generation. - * @param htim : TIM handle - * @param Channel : TIM Channels to be enabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @arg TIM_CHANNEL_5: TIM Channel 5 selected - * @arg TIM_CHANNEL_6: TIM Channel 6 selected - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_PWM_Start(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); - - /* Enable the Capture compare channel */ - TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); - - if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) - { - /* Enable the main output */ - __HAL_TIM_MOE_ENABLE(htim); - } - - /* Enable the Peripheral */ - __HAL_TIM_ENABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the PWM signal generation. - * @param htim : TIM handle - * @param Channel : TIM Channels to be disabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @arg TIM_CHANNEL_5: TIM Channel 5 selected - * @arg TIM_CHANNEL_6: TIM Channel 6 selected - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_PWM_Stop(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); - - /* Disable the Capture compare channel */ - TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE); - - if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) - { - /* Disable the Main Ouput */ - __HAL_TIM_MOE_DISABLE(htim); - } - - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Change the htim state */ - htim->State = HAL_TIM_STATE_READY; - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Starts the PWM signal generation in interrupt mode. - * @param htim : TIM handle - * @param Channel : TIM Channel to be disabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_PWM_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); - - switch (Channel) - { - case TIM_CHANNEL_1: - { - /* Enable the TIM Capture/Compare 1 interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); - } - break; - - case TIM_CHANNEL_2: - { - /* Enable the TIM Capture/Compare 2 interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); - } - break; - - case TIM_CHANNEL_3: - { - /* Enable the TIM Capture/Compare 3 interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3); - } - break; - - case TIM_CHANNEL_4: - { - /* Enable the TIM Capture/Compare 4 interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4); - } - break; - - default: - break; - } - - /* Enable the Capture compare channel */ - TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); - - if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) - { - /* Enable the main output */ - __HAL_TIM_MOE_ENABLE(htim); - } - - /* Enable the Peripheral */ - __HAL_TIM_ENABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the PWM signal generation in interrupt mode. - * @param htim : TIM handle - * @param Channel : TIM Channels to be disabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_PWM_Stop_IT (TIM_HandleTypeDef *htim, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); - - switch (Channel) - { - case TIM_CHANNEL_1: - { - /* Disable the TIM Capture/Compare 1 interrupt */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); - } - break; - - case TIM_CHANNEL_2: - { - /* Disable the TIM Capture/Compare 2 interrupt */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); - } - break; - - case TIM_CHANNEL_3: - { - /* Disable the TIM Capture/Compare 3 interrupt */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3); - } - break; - - case TIM_CHANNEL_4: - { - /* Disable the TIM Capture/Compare 4 interrupt */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4); - } - break; - - default: - break; - } - - /* Disable the Capture compare channel */ - TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE); - - if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) - { - /* Disable the Main Ouput */ - __HAL_TIM_MOE_DISABLE(htim); - } - - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Starts the TIM PWM signal generation in DMA mode. - * @param htim : TIM handle - * @param Channel : TIM Channels to be enabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @param pData: The source Buffer address. - * @param Length: The length of data to be transferred from memory to TIM peripheral - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_PWM_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); - - if((htim->State == HAL_TIM_STATE_BUSY)) - { - return HAL_BUSY; - } - else if((htim->State == HAL_TIM_STATE_READY)) - { - if(((uint32_t)pData == 0 ) && (Length > 0)) - { - return HAL_ERROR; - } - else - { - htim->State = HAL_TIM_STATE_BUSY; - } - } - switch (Channel) - { - case TIM_CHANNEL_1: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length); - - /* Enable the TIM Capture/Compare 1 DMA request */ - __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); - } - break; - - case TIM_CHANNEL_2: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length); - - /* Enable the TIM Capture/Compare 2 DMA request */ - __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2); - } - break; - - case TIM_CHANNEL_3: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,Length); - - /* Enable the TIM Output Capture/Compare 3 request */ - __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3); - } - break; - - case TIM_CHANNEL_4: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMADelayPulseCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance->CCR4, Length); - - /* Enable the TIM Capture/Compare 4 DMA request */ - __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4); - } - break; - - default: - break; - } - - /* Enable the Capture compare channel */ - TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); - - if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) - { - /* Enable the main output */ - __HAL_TIM_MOE_ENABLE(htim); - } - - /* Enable the Peripheral */ - __HAL_TIM_ENABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the TIM PWM signal generation in DMA mode. - * @param htim : TIM handle - * @param Channel : TIM Channels to be disabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_PWM_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); - - switch (Channel) - { - case TIM_CHANNEL_1: - { - /* Disable the TIM Capture/Compare 1 DMA request */ - __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); - } - break; - - case TIM_CHANNEL_2: - { - /* Disable the TIM Capture/Compare 2 DMA request */ - __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2); - } - break; - - case TIM_CHANNEL_3: - { - /* Disable the TIM Capture/Compare 3 DMA request */ - __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3); - } - break; - - case TIM_CHANNEL_4: - { - /* Disable the TIM Capture/Compare 4 interrupt */ - __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4); - } - break; - - default: - break; - } - - /* Disable the Capture compare channel */ - TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE); - - if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) - { - /* Disable the Main Ouput */ - __HAL_TIM_MOE_DISABLE(htim); - } - - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Change the htim state */ - htim->State = HAL_TIM_STATE_READY; - - /* Return function status */ - return HAL_OK; -} - -/** - * @} - */ - -/** @defgroup TIM_Exported_Functions_Group4 Time Input Capture functions - * @brief Time Input Capture functions - * -@verbatim - ============================================================================== - ##### Time Input Capture functions ##### - ============================================================================== - [..] - This section provides functions allowing to: - (+) Initialize and configure the TIM Input Capture. - (+) De-initialize the TIM Input Capture. - (+) Start the Time Input Capture. - (+) Stop the Time Input Capture. - (+) Start the Time Input Capture and enable interrupt. - (+) Stop the Time Input Capture and disable interrupt. - (+) Start the Time Input Capture and enable DMA transfer. - (+) Stop the Time Input Capture and disable DMA transfer. - -@endverbatim - * @{ - */ -/** - * @brief Initializes the TIM Input Capture Time base according to the specified - * parameters in the TIM_HandleTypeDef and initialize the associated handle. - * @param htim: TIM Input Capture handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_IC_Init(TIM_HandleTypeDef *htim) -{ - /* Check the TIM handle allocation */ - if(htim == NULL) - { - return HAL_ERROR; - } - - /* Check the parameters */ - assert_param(IS_TIM_INSTANCE(htim->Instance)); - assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); - assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); - - if(htim->State == HAL_TIM_STATE_RESET) - { - /* Allocate lock resource and initialize it */ - htim->Lock = HAL_UNLOCKED; - - /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */ - HAL_TIM_IC_MspInit(htim); - } - - /* Set the TIM state */ - htim->State= HAL_TIM_STATE_BUSY; - - /* Init the base time for the input capture */ - TIM_Base_SetConfig(htim->Instance, &htim->Init); - - /* Initialize the TIM state*/ - htim->State= HAL_TIM_STATE_READY; - - return HAL_OK; -} - -/** - * @brief DeInitialize the TIM peripheral - * @param htim: TIM Input Capture handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_IC_DeInit(TIM_HandleTypeDef *htim) -{ - /* Check the parameters */ - assert_param(IS_TIM_INSTANCE(htim->Instance)); - - htim->State = HAL_TIM_STATE_BUSY; - - /* Disable the TIM Peripheral Clock */ - __HAL_TIM_DISABLE(htim); - - /* DeInit the low level hardware: GPIO, CLOCK, NVIC and DMA */ - HAL_TIM_IC_MspDeInit(htim); - - /* Change TIM state */ - htim->State = HAL_TIM_STATE_RESET; - - /* Release Lock */ - __HAL_UNLOCK(htim); - - return HAL_OK; -} - -/** - * @brief Initializes the TIM INput Capture MSP. - * @param htim: TIM handle - * @retval None - */ -__weak void HAL_TIM_IC_MspInit(TIM_HandleTypeDef *htim) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_TIM_IC_MspInit could be implemented in the user file - */ -} - -/** - * @brief DeInitialize TIM Input Capture MSP. - * @param htim: TIM handle - * @retval None - */ -__weak void HAL_TIM_IC_MspDeInit(TIM_HandleTypeDef *htim) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_TIM_IC_MspDeInit could be implemented in the user file - */ -} - -/** - * @brief Starts the TIM Input Capture measurement. - * @param htim : TIM Input Capture handle - * @param Channel : TIM Channels to be enabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_IC_Start (TIM_HandleTypeDef *htim, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); - - /* Enable the Input Capture channel */ - TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); - - /* Enable the Peripheral */ - __HAL_TIM_ENABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the TIM Input Capture measurement. - * @param htim : TIM handle - * @param Channel : TIM Channels to be disabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_IC_Stop(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); - - /* Disable the Input Capture channel */ - TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE); - - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Starts the TIM Input Capture measurement in interrupt mode. - * @param htim : TIM Input Capture handle - * @param Channel : TIM Channels to be enabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_IC_Start_IT (TIM_HandleTypeDef *htim, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); - - switch (Channel) - { - case TIM_CHANNEL_1: - { - /* Enable the TIM Capture/Compare 1 interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); - } - break; - - case TIM_CHANNEL_2: - { - /* Enable the TIM Capture/Compare 2 interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); - } - break; - - case TIM_CHANNEL_3: - { - /* Enable the TIM Capture/Compare 3 interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3); - } - break; - - case TIM_CHANNEL_4: - { - /* Enable the TIM Capture/Compare 4 interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4); - } - break; - - default: - break; - } - /* Enable the Input Capture channel */ - TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); - - /* Enable the Peripheral */ - __HAL_TIM_ENABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the TIM Input Capture measurement in interrupt mode. - * @param htim : TIM handle - * @param Channel : TIM Channels to be disabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_IC_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); - - switch (Channel) - { - case TIM_CHANNEL_1: - { - /* Disable the TIM Capture/Compare 1 interrupt */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); - } - break; - - case TIM_CHANNEL_2: - { - /* Disable the TIM Capture/Compare 2 interrupt */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); - } - break; - - case TIM_CHANNEL_3: - { - /* Disable the TIM Capture/Compare 3 interrupt */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3); - } - break; - - case TIM_CHANNEL_4: - { - /* Disable the TIM Capture/Compare 4 interrupt */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4); - } - break; - - default: - break; - } - - /* Disable the Input Capture channel */ - TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE); - - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Starts the TIM Input Capture measurement on in DMA mode. - * @param htim : TIM Input Capture handle - * @param Channel : TIM Channels to be enabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @param pData: The destination Buffer address. - * @param Length: The length of data to be transferred from TIM peripheral to memory. - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_IC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); - assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance)); - - if((htim->State == HAL_TIM_STATE_BUSY)) - { - return HAL_BUSY; - } - else if((htim->State == HAL_TIM_STATE_READY)) - { - if((pData == 0 ) && (Length > 0)) - { - return HAL_ERROR; - } - else - { - htim->State = HAL_TIM_STATE_BUSY; - } - } - - switch (Channel) - { - case TIM_CHANNEL_1: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMACaptureCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)pData, Length); - - /* Enable the TIM Capture/Compare 1 DMA request */ - __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); - } - break; - - case TIM_CHANNEL_2: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMACaptureCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)&htim->Instance->CCR2, (uint32_t)pData, Length); - - /* Enable the TIM Capture/Compare 2 DMA request */ - __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2); - } - break; - - case TIM_CHANNEL_3: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMACaptureCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)&htim->Instance->CCR3, (uint32_t)pData, Length); - - /* Enable the TIM Capture/Compare 3 DMA request */ - __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3); - } - break; - - case TIM_CHANNEL_4: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMACaptureCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)&htim->Instance->CCR4, (uint32_t)pData, Length); - - /* Enable the TIM Capture/Compare 4 DMA request */ - __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4); - } - break; - - default: - break; - } - - /* Enable the Input Capture channel */ - TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE); - - /* Enable the Peripheral */ - __HAL_TIM_ENABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the TIM Input Capture measurement on in DMA mode. - * @param htim : TIM Input Capture handle - * @param Channel : TIM Channels to be disabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_IC_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel)); - assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance)); - - switch (Channel) - { - case TIM_CHANNEL_1: - { - /* Disable the TIM Capture/Compare 1 DMA request */ - __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); - } - break; - - case TIM_CHANNEL_2: - { - /* Disable the TIM Capture/Compare 2 DMA request */ - __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2); - } - break; - - case TIM_CHANNEL_3: - { - /* Disable the TIM Capture/Compare 3 DMA request */ - __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3); - } - break; - - case TIM_CHANNEL_4: - { - /* Disable the TIM Capture/Compare 4 DMA request */ - __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4); - } - break; - - default: - break; - } - - /* Disable the Input Capture channel */ - TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE); - - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Change the htim state */ - htim->State = HAL_TIM_STATE_READY; - - /* Return function status */ - return HAL_OK; -} -/** - * @} - */ - -/** @defgroup TIM_Exported_Functions_Group5 Time One Pulse functions - * @brief Time One Pulse functions - * -@verbatim - ============================================================================== - ##### Time One Pulse functions ##### - ============================================================================== - [..] - This section provides functions allowing to: - (+) Initialize and configure the TIM One Pulse. - (+) De-initialize the TIM One Pulse. - (+) Start the Time One Pulse. - (+) Stop the Time One Pulse. - (+) Start the Time One Pulse and enable interrupt. - (+) Stop the Time One Pulse and disable interrupt. - (+) Start the Time One Pulse and enable DMA transfer. - (+) Stop the Time One Pulse and disable DMA transfer. - -@endverbatim - * @{ - */ -/** - * @brief Initializes the TIM One Pulse Time Base according to the specified - * parameters in the TIM_HandleTypeDef and initialize the associated handle. - * @param htim: TIM OnePulse handle - * @param OnePulseMode: Select the One pulse mode. - * This parameter can be one of the following values: - * @arg TIM_OPMODE_SINGLE: Only one pulse will be generated. - * @arg TIM_OPMODE_REPETITIVE: Repetitive pulses will be generated. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_OnePulse_Init(TIM_HandleTypeDef *htim, uint32_t OnePulseMode) -{ - /* Check the TIM handle allocation */ - if(htim == NULL) - { - return HAL_ERROR; - } - - /* Check the parameters */ - assert_param(IS_TIM_INSTANCE(htim->Instance)); - assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); - assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); - assert_param(IS_TIM_OPM_MODE(OnePulseMode)); - - if(htim->State == HAL_TIM_STATE_RESET) - { - /* Allocate lock resource and initialize it */ - htim->Lock = HAL_UNLOCKED; - - /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */ - HAL_TIM_OnePulse_MspInit(htim); - } - - /* Set the TIM state */ - htim->State= HAL_TIM_STATE_BUSY; - - /* Configure the Time base in the One Pulse Mode */ - TIM_Base_SetConfig(htim->Instance, &htim->Init); - - /* Reset the OPM Bit */ - htim->Instance->CR1 &= ~TIM_CR1_OPM; - - /* Configure the OPM Mode */ - htim->Instance->CR1 |= OnePulseMode; - - /* Initialize the TIM state*/ - htim->State= HAL_TIM_STATE_READY; - - return HAL_OK; -} - -/** - * @brief DeInitialize the TIM One Pulse - * @param htim: TIM One Pulse handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_OnePulse_DeInit(TIM_HandleTypeDef *htim) -{ - /* Check the parameters */ - assert_param(IS_TIM_INSTANCE(htim->Instance)); - - htim->State = HAL_TIM_STATE_BUSY; - - /* Disable the TIM Peripheral Clock */ - __HAL_TIM_DISABLE(htim); - - /* DeInit the low level hardware: GPIO, CLOCK, NVIC */ - HAL_TIM_OnePulse_MspDeInit(htim); - - /* Change TIM state */ - htim->State = HAL_TIM_STATE_RESET; - - /* Release Lock */ - __HAL_UNLOCK(htim); - - return HAL_OK; -} - -/** - * @brief Initializes the TIM One Pulse MSP. - * @param htim: TIM handle - * @retval None - */ -__weak void HAL_TIM_OnePulse_MspInit(TIM_HandleTypeDef *htim) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_TIM_OnePulse_MspInit could be implemented in the user file - */ -} - -/** - * @brief DeInitialize TIM One Pulse MSP. - * @param htim: TIM handle - * @retval None - */ -__weak void HAL_TIM_OnePulse_MspDeInit(TIM_HandleTypeDef *htim) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_TIM_OnePulse_MspDeInit could be implemented in the user file - */ -} - -/** - * @brief Starts the TIM One Pulse signal generation. - * @param htim : TIM One Pulse handle - * @param OutputChannel : TIM Channels to be enabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_OnePulse_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel) -{ - /* Enable the Capture compare and the Input Capture channels - (in the OPM Mode the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2) - if TIM_CHANNEL_1 is used as output, the TIM_CHANNEL_2 will be used as input and - if TIM_CHANNEL_1 is used as input, the TIM_CHANNEL_2 will be used as output - in all combinations, the TIM_CHANNEL_1 and TIM_CHANNEL_2 should be enabled together - - No need to enable the counter, it's enabled automatically by hardware - (the counter starts in response to a stimulus and generate a pulse */ - - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); - - if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) - { - /* Enable the main output */ - __HAL_TIM_MOE_ENABLE(htim); - } - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the TIM One Pulse signal generation. - * @param htim : TIM One Pulse handle - * @param OutputChannel : TIM Channels to be disable - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_OnePulse_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel) -{ - /* Disable the Capture compare and the Input Capture channels - (in the OPM Mode the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2) - if TIM_CHANNEL_1 is used as output, the TIM_CHANNEL_2 will be used as input and - if TIM_CHANNEL_1 is used as input, the TIM_CHANNEL_2 will be used as output - in all combinations, the TIM_CHANNEL_1 and TIM_CHANNEL_2 should be disabled together */ - - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); - - if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) - { - /* Disable the Main Ouput */ - __HAL_TIM_MOE_DISABLE(htim); - } - - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Starts the TIM One Pulse signal generation in interrupt mode. - * @param htim : TIM One Pulse handle - * @param OutputChannel : TIM Channels to be enabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_OnePulse_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel) -{ - /* Enable the Capture compare and the Input Capture channels - (in the OPM Mode the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2) - if TIM_CHANNEL_1 is used as output, the TIM_CHANNEL_2 will be used as input and - if TIM_CHANNEL_1 is used as input, the TIM_CHANNEL_2 will be used as output - in all combinations, the TIM_CHANNEL_1 and TIM_CHANNEL_2 should be enabled together - - No need to enable the counter, it's enabled automatically by hardware - (the counter starts in response to a stimulus and generate a pulse */ - - /* Enable the TIM Capture/Compare 1 interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); - - /* Enable the TIM Capture/Compare 2 interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); - - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); - - if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) - { - /* Enable the main output */ - __HAL_TIM_MOE_ENABLE(htim); - } - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the TIM One Pulse signal generation in interrupt mode. - * @param htim : TIM One Pulse handle - * @param OutputChannel : TIM Channels to be enabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_OnePulse_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel) -{ - /* Disable the TIM Capture/Compare 1 interrupt */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); - - /* Disable the TIM Capture/Compare 2 interrupt */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); - - /* Disable the Capture compare and the Input Capture channels - (in the OPM Mode the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2) - if TIM_CHANNEL_1 is used as output, the TIM_CHANNEL_2 will be used as input and - if TIM_CHANNEL_1 is used as input, the TIM_CHANNEL_2 will be used as output - in all combinations, the TIM_CHANNEL_1 and TIM_CHANNEL_2 should be disabled together */ - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); - - if(IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET) - { - /* Disable the Main Ouput */ - __HAL_TIM_MOE_DISABLE(htim); - } - - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @} - */ - -/** @defgroup TIM_Exported_Functions_Group6 Time Encoder functions - * @brief Time Encoder functions - * -@verbatim - ============================================================================== - ##### Time Encoder functions ##### - ============================================================================== - [..] - This section provides functions allowing to: - (+) Initialize and configure the TIM Encoder. - (+) De-initialize the TIM Encoder. - (+) Start the Time Encoder. - (+) Stop the Time Encoder. - (+) Start the Time Encoder and enable interrupt. - (+) Stop the Time Encoder and disable interrupt. - (+) Start the Time Encoder and enable DMA transfer. - (+) Stop the Time Encoder and disable DMA transfer. - -@endverbatim - * @{ - */ -/** - * @brief Initializes the TIM Encoder Interface and initialize the associated handle. - * @param htim: TIM Encoder Interface handle - * @param sConfig: TIM Encoder Interface configuration structure - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_Encoder_Init(TIM_HandleTypeDef *htim, TIM_Encoder_InitTypeDef* sConfig) -{ - uint32_t tmpsmcr = 0; - uint32_t tmpccmr1 = 0; - uint32_t tmpccer = 0; - - /* Check the TIM handle allocation */ - if(htim == NULL) - { - return HAL_ERROR; - } - - /* Check the parameters */ - assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); - assert_param(IS_TIM_ENCODER_MODE(sConfig->EncoderMode)); - assert_param(IS_TIM_IC_SELECTION(sConfig->IC1Selection)); - assert_param(IS_TIM_IC_SELECTION(sConfig->IC2Selection)); - assert_param(IS_TIM_IC_POLARITY(sConfig->IC1Polarity)); - assert_param(IS_TIM_IC_POLARITY(sConfig->IC2Polarity)); - assert_param(IS_TIM_IC_PRESCALER(sConfig->IC1Prescaler)); - assert_param(IS_TIM_IC_PRESCALER(sConfig->IC2Prescaler)); - assert_param(IS_TIM_IC_FILTER(sConfig->IC1Filter)); - assert_param(IS_TIM_IC_FILTER(sConfig->IC2Filter)); - - if(htim->State == HAL_TIM_STATE_RESET) - { - /* Allocate lock resource and initialize it */ - htim->Lock = HAL_UNLOCKED; - - /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */ - HAL_TIM_Encoder_MspInit(htim); - } - - /* Set the TIM state */ - htim->State= HAL_TIM_STATE_BUSY; - - /* Reset the SMS bits */ - htim->Instance->SMCR &= ~TIM_SMCR_SMS; - - /* Configure the Time base in the Encoder Mode */ - TIM_Base_SetConfig(htim->Instance, &htim->Init); - - /* Get the TIMx SMCR register value */ - tmpsmcr = htim->Instance->SMCR; - - /* Get the TIMx CCMR1 register value */ - tmpccmr1 = htim->Instance->CCMR1; - - /* Get the TIMx CCER register value */ - tmpccer = htim->Instance->CCER; - - /* Set the encoder Mode */ - tmpsmcr |= sConfig->EncoderMode; - - /* Select the Capture Compare 1 and the Capture Compare 2 as input */ - tmpccmr1 &= ~(TIM_CCMR1_CC1S | TIM_CCMR1_CC2S); - tmpccmr1 |= (sConfig->IC1Selection | (sConfig->IC2Selection << 8)); - - /* Set the Capture Compare 1 and the Capture Compare 2 prescalers and filters */ - tmpccmr1 &= ~(TIM_CCMR1_IC1PSC | TIM_CCMR1_IC2PSC); - tmpccmr1 &= ~(TIM_CCMR1_IC1F | TIM_CCMR1_IC2F); - tmpccmr1 |= sConfig->IC1Prescaler | (sConfig->IC2Prescaler << 8); - tmpccmr1 |= (sConfig->IC1Filter << 4) | (sConfig->IC2Filter << 12); - - /* Set the TI1 and the TI2 Polarities */ - tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC2P); - tmpccer &= ~(TIM_CCER_CC1NP | TIM_CCER_CC2NP); - tmpccer |= sConfig->IC1Polarity | (sConfig->IC2Polarity << 4); - - /* Write to TIMx SMCR */ - htim->Instance->SMCR = tmpsmcr; - - /* Write to TIMx CCMR1 */ - htim->Instance->CCMR1 = tmpccmr1; - - /* Write to TIMx CCER */ - htim->Instance->CCER = tmpccer; - - /* Initialize the TIM state*/ - htim->State= HAL_TIM_STATE_READY; - - return HAL_OK; -} - - -/** - * @brief DeInitialize the TIM Encoder interface - * @param htim: TIM Encoder handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_Encoder_DeInit(TIM_HandleTypeDef *htim) -{ - /* Check the parameters */ - assert_param(IS_TIM_INSTANCE(htim->Instance)); - - htim->State = HAL_TIM_STATE_BUSY; - - /* Disable the TIM Peripheral Clock */ - __HAL_TIM_DISABLE(htim); - - /* DeInit the low level hardware: GPIO, CLOCK, NVIC */ - HAL_TIM_Encoder_MspDeInit(htim); - - /* Change TIM state */ - htim->State = HAL_TIM_STATE_RESET; - - /* Release Lock */ - __HAL_UNLOCK(htim); - - return HAL_OK; -} - -/** - * @brief Initializes the TIM Encoder Interface MSP. - * @param htim: TIM handle - * @retval None - */ -__weak void HAL_TIM_Encoder_MspInit(TIM_HandleTypeDef *htim) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_TIM_Encoder_MspInit could be implemented in the user file - */ -} - -/** - * @brief DeInitialize TIM Encoder Interface MSP. - * @param htim: TIM handle - * @retval None - */ -__weak void HAL_TIM_Encoder_MspDeInit(TIM_HandleTypeDef *htim) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_TIM_Encoder_MspDeInit could be implemented in the user file - */ -} - -/** - * @brief Starts the TIM Encoder Interface. - * @param htim : TIM Encoder Interface handle - * @param Channel : TIM Channels to be enabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_ALL: TIM Channel 1 and TIM Channel 2 are selected - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_Encoder_Start(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); - - /* Enable the encoder interface channels */ - switch (Channel) - { - case TIM_CHANNEL_1: - { - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); - break; - } - case TIM_CHANNEL_2: - { - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); - break; - } - default : - { - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); - break; - } - } - /* Enable the Peripheral */ - __HAL_TIM_ENABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the TIM Encoder Interface. - * @param htim : TIM Encoder Interface handle - * @param Channel : TIM Channels to be disabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_ALL: TIM Channel 1 and TIM Channel 2 are selected - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_Encoder_Stop(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); - - /* Disable the Input Capture channels 1 and 2 - (in the EncoderInterface the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2) */ - switch (Channel) - { - case TIM_CHANNEL_1: - { - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); - break; - } - case TIM_CHANNEL_2: - { - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); - break; - } - default : - { - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); - break; - } - } - - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Starts the TIM Encoder Interface in interrupt mode. - * @param htim : TIM Encoder Interface handle - * @param Channel : TIM Channels to be enabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_ALL: TIM Channel 1 and TIM Channel 2 are selected - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_Encoder_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); - - /* Enable the encoder interface channels */ - /* Enable the capture compare Interrupts 1 and/or 2 */ - switch (Channel) - { - case TIM_CHANNEL_1: - { - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); - break; - } - case TIM_CHANNEL_2: - { - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); - break; - } - default : - { - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); - break; - } - } - - /* Enable the Peripheral */ - __HAL_TIM_ENABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the TIM Encoder Interface in interrupt mode. - * @param htim : TIM Encoder Interface handle - * @param Channel : TIM Channels to be disabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_ALL: TIM Channel 1 and TIM Channel 2 are selected - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_Encoder_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); - - /* Disable the Input Capture channels 1 and 2 - (in the EncoderInterface the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2) */ - if(Channel == TIM_CHANNEL_1) - { - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); - - /* Disable the capture compare Interrupts 1 */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); - } - else if(Channel == TIM_CHANNEL_2) - { - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); - - /* Disable the capture compare Interrupts 2 */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); - } - else - { - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); - - /* Disable the capture compare Interrupts 1 and 2 */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); - } - - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Change the htim state */ - htim->State = HAL_TIM_STATE_READY; - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Starts the TIM Encoder Interface in DMA mode. - * @param htim : TIM Encoder Interface handle - * @param Channel : TIM Channels to be enabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_ALL: TIM Channel 1 and TIM Channel 2 are selected - * @param pData1: The destination Buffer address for IC1. - * @param pData2: The destination Buffer address for IC2. - * @param Length: The length of data to be transferred from TIM peripheral to memory. - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_Encoder_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData1, uint32_t *pData2, uint16_t Length) -{ - /* Check the parameters */ - assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance)); - - if((htim->State == HAL_TIM_STATE_BUSY)) - { - return HAL_BUSY; - } - else if((htim->State == HAL_TIM_STATE_READY)) - { - if((((pData1 == 0) || (pData2 == 0) )) && (Length > 0)) - { - return HAL_ERROR; - } - else - { - htim->State = HAL_TIM_STATE_BUSY; - } - } - - switch (Channel) - { - case TIM_CHANNEL_1: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMACaptureCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t )pData1, Length); - - /* Enable the TIM Input Capture DMA request */ - __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); - - /* Enable the Peripheral */ - __HAL_TIM_ENABLE(htim); - - /* Enable the Capture compare channel */ - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); - } - break; - - case TIM_CHANNEL_2: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMACaptureCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError; - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)&htim->Instance->CCR2, (uint32_t)pData2, Length); - - /* Enable the TIM Input Capture DMA request */ - __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2); - - /* Enable the Peripheral */ - __HAL_TIM_ENABLE(htim); - - /* Enable the Capture compare channel */ - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); - } - break; - - case TIM_CHANNEL_ALL: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMACaptureCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)pData1, Length); - - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMACaptureCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)&htim->Instance->CCR2, (uint32_t)pData2, Length); - - /* Enable the Peripheral */ - __HAL_TIM_ENABLE(htim); - - /* Enable the Capture compare channel */ - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE); - - /* Enable the TIM Input Capture DMA request */ - __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); - /* Enable the TIM Input Capture DMA request */ - __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2); - } - break; - - default: - break; - } - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the TIM Encoder Interface in DMA mode. - * @param htim : TIM Encoder Interface handle - * @param Channel : TIM Channels to be enabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_ALL: TIM Channel 1 and TIM Channel 2 are selected - * @retval HAL status -*/ -HAL_StatusTypeDef HAL_TIM_Encoder_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance)); - - /* Disable the Input Capture channels 1 and 2 - (in the EncoderInterface the two possible channels that can be used are TIM_CHANNEL_1 and TIM_CHANNEL_2) */ - if(Channel == TIM_CHANNEL_1) - { - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); - - /* Disable the capture compare DMA Request 1 */ - __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); - } - else if(Channel == TIM_CHANNEL_2) - { - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); - - /* Disable the capture compare DMA Request 2 */ - __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2); - } - else - { - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE); - - /* Disable the capture compare DMA Request 1 and 2 */ - __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); - __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2); - } - - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Change the htim state */ - htim->State = HAL_TIM_STATE_READY; - - /* Return function status */ - return HAL_OK; -} - -/** - * @} - */ -/** @defgroup TIM_Exported_Functions_Group7 TIM IRQ handler management - * @brief IRQ handler management - * -@verbatim - ============================================================================== - ##### IRQ handler management ##### - ============================================================================== - [..] - This section provides Timer IRQ handler function. - -@endverbatim - * @{ - */ -/** - * @brief This function handles TIM interrupts requests. - * @param htim: TIM handle - * @retval None - */ -void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim) -{ - /* Capture compare 1 event */ - if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET) - { - if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC1) !=RESET) - { - { - __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC1); - htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; - - /* Input capture event */ - if((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00) - { - HAL_TIM_IC_CaptureCallback(htim); - } - /* Output compare event */ - else - { - HAL_TIM_OC_DelayElapsedCallback(htim); - HAL_TIM_PWM_PulseFinishedCallback(htim); - } - htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; - } - } - } - /* Capture compare 2 event */ - if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC2) != RESET) - { - if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC2) !=RESET) - { - __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC2); - htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; - /* Input capture event */ - if((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00) - { - HAL_TIM_IC_CaptureCallback(htim); - } - /* Output compare event */ - else - { - HAL_TIM_OC_DelayElapsedCallback(htim); - HAL_TIM_PWM_PulseFinishedCallback(htim); - } - htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; - } - } - /* Capture compare 3 event */ - if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC3) != RESET) - { - if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC3) !=RESET) - { - __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC3); - htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; - /* Input capture event */ - if((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00) - { - HAL_TIM_IC_CaptureCallback(htim); - } - /* Output compare event */ - else - { - HAL_TIM_OC_DelayElapsedCallback(htim); - HAL_TIM_PWM_PulseFinishedCallback(htim); - } - htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; - } - } - /* Capture compare 4 event */ - if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC4) != RESET) - { - if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC4) !=RESET) - { - __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC4); - htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; - /* Input capture event */ - if((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00) - { - HAL_TIM_IC_CaptureCallback(htim); - } - /* Output compare event */ - else - { - HAL_TIM_OC_DelayElapsedCallback(htim); - HAL_TIM_PWM_PulseFinishedCallback(htim); - } - htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; - } - } - /* TIM Update event */ - if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_UPDATE) != RESET) - { - if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_UPDATE) !=RESET) - { - __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE); - HAL_TIM_PeriodElapsedCallback(htim); - } - } - /* TIM Break input event */ - if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_BREAK) != RESET) - { - if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_BREAK) !=RESET) - { - __HAL_TIM_CLEAR_IT(htim, TIM_IT_BREAK); - HAL_TIMEx_BreakCallback(htim); - } - } - /* TIM Trigger detection event */ - if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_TRIGGER) != RESET) - { - if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_TRIGGER) !=RESET) - { - __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER); - HAL_TIM_TriggerCallback(htim); - } - } - /* TIM commutation event */ - if(__HAL_TIM_GET_FLAG(htim, TIM_FLAG_COM) != RESET) - { - if(__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_COM) !=RESET) - { - __HAL_TIM_CLEAR_IT(htim, TIM_FLAG_COM); - HAL_TIMEx_CommutationCallback(htim); - } - } -} - -/** - * @} - */ - -/** @defgroup TIM_Exported_Functions_Group8 Peripheral Control functions - * @brief Peripheral Control functions - * -@verbatim - ============================================================================== - ##### Peripheral Control functions ##### - ============================================================================== - [..] - This section provides functions allowing to: - (+) Configure The Input Output channels for OC, PWM, IC or One Pulse mode. - (+) Configure External Clock source. - (+) Configure Complementary channels, break features and dead time. - (+) Configure Master and the Slave synchronization. - (+) Configure the DMA Burst Mode. - -@endverbatim - * @{ - */ - -/** - * @brief Initializes the TIM Output Compare Channels according to the specified - * parameters in the TIM_OC_InitTypeDef. - * @param htim: TIM Output Compare handle - * @param sConfig: TIM Output Compare configuration structure - * @param Channel : TIM Channels to be enabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @arg TIM_CHANNEL_5: TIM Channel 5 selected - * @arg TIM_CHANNEL_6: TIM Channel 6 selected - * @retval HAL status - */ -__weak HAL_StatusTypeDef HAL_TIM_OC_ConfigChannel(TIM_HandleTypeDef *htim, TIM_OC_InitTypeDef* sConfig, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CHANNELS(Channel)); - assert_param(IS_TIM_OC_MODE(sConfig->OCMode)); - assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity)); - assert_param(IS_TIM_OCN_POLARITY(sConfig->OCNPolarity)); - assert_param(IS_TIM_OCNIDLE_STATE(sConfig->OCNIdleState)); - assert_param(IS_TIM_OCIDLE_STATE(sConfig->OCIdleState)); - - /* Check input state */ - __HAL_LOCK(htim); - - htim->State = HAL_TIM_STATE_BUSY; - - switch (Channel) - { - case TIM_CHANNEL_1: - { - assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); - /* Configure the TIM Channel 1 in Output Compare */ - TIM_OC1_SetConfig(htim->Instance, sConfig); - } - break; - - case TIM_CHANNEL_2: - { - assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); - /* Configure the TIM Channel 2 in Output Compare */ - TIM_OC2_SetConfig(htim->Instance, sConfig); - } - break; - - case TIM_CHANNEL_3: - { - assert_param(IS_TIM_CC3_INSTANCE(htim->Instance)); - /* Configure the TIM Channel 3 in Output Compare */ - TIM_OC3_SetConfig(htim->Instance, sConfig); - } - break; - - case TIM_CHANNEL_4: - { - assert_param(IS_TIM_CC4_INSTANCE(htim->Instance)); - /* Configure the TIM Channel 4 in Output Compare */ - TIM_OC4_SetConfig(htim->Instance, sConfig); - } - break; - - default: - break; - } - htim->State = HAL_TIM_STATE_READY; - - __HAL_UNLOCK(htim); - - return HAL_OK; -} - -/** - * @brief Initializes the TIM Input Capture Channels according to the specified - * parameters in the TIM_IC_InitTypeDef. - * @param htim: TIM IC handle - * @param sConfig: TIM Input Capture configuration structure - * @param Channel : TIM Channels to be enabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_IC_ConfigChannel(TIM_HandleTypeDef *htim, TIM_IC_InitTypeDef* sConfig, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); - assert_param(IS_TIM_IC_POLARITY(sConfig->ICPolarity)); - assert_param(IS_TIM_IC_SELECTION(sConfig->ICSelection)); - assert_param(IS_TIM_IC_PRESCALER(sConfig->ICPrescaler)); - assert_param(IS_TIM_IC_FILTER(sConfig->ICFilter)); - - __HAL_LOCK(htim); - - htim->State = HAL_TIM_STATE_BUSY; - - if (Channel == TIM_CHANNEL_1) - { - /* TI1 Configuration */ - TIM_TI1_SetConfig(htim->Instance, - sConfig->ICPolarity, - sConfig->ICSelection, - sConfig->ICFilter); - - /* Reset the IC1PSC Bits */ - htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC; - - /* Set the IC1PSC value */ - htim->Instance->CCMR1 |= sConfig->ICPrescaler; - } - else if (Channel == TIM_CHANNEL_2) - { - /* TI2 Configuration */ - assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); - - TIM_TI2_SetConfig(htim->Instance, - sConfig->ICPolarity, - sConfig->ICSelection, - sConfig->ICFilter); - - /* Reset the IC2PSC Bits */ - htim->Instance->CCMR1 &= ~TIM_CCMR1_IC2PSC; - - /* Set the IC2PSC value */ - htim->Instance->CCMR1 |= (sConfig->ICPrescaler << 8); - } - else if (Channel == TIM_CHANNEL_3) - { - /* TI3 Configuration */ - assert_param(IS_TIM_CC3_INSTANCE(htim->Instance)); - - TIM_TI3_SetConfig(htim->Instance, - sConfig->ICPolarity, - sConfig->ICSelection, - sConfig->ICFilter); - - /* Reset the IC3PSC Bits */ - htim->Instance->CCMR2 &= ~TIM_CCMR2_IC3PSC; - - /* Set the IC3PSC value */ - htim->Instance->CCMR2 |= sConfig->ICPrescaler; - } - else - { - /* TI4 Configuration */ - assert_param(IS_TIM_CC4_INSTANCE(htim->Instance)); - - TIM_TI4_SetConfig(htim->Instance, - sConfig->ICPolarity, - sConfig->ICSelection, - sConfig->ICFilter); - - /* Reset the IC4PSC Bits */ - htim->Instance->CCMR2 &= ~TIM_CCMR2_IC4PSC; - - /* Set the IC4PSC value */ - htim->Instance->CCMR2 |= (sConfig->ICPrescaler << 8); - } - - htim->State = HAL_TIM_STATE_READY; - - __HAL_UNLOCK(htim); - - return HAL_OK; -} - -/** - * @brief Initializes the TIM PWM channels according to the specified - * parameters in the TIM_OC_InitTypeDef. - * @param htim: TIM handle - * @param sConfig: TIM PWM configuration structure - * @param Channel : TIM Channels to be enabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @retval HAL status - */ -__weak HAL_StatusTypeDef HAL_TIM_PWM_ConfigChannel(TIM_HandleTypeDef *htim, TIM_OC_InitTypeDef* sConfig, uint32_t Channel) -{ - __HAL_LOCK(htim); - - /* Check the parameters */ - assert_param(IS_TIM_CHANNELS(Channel)); - assert_param(IS_TIM_PWM_MODE(sConfig->OCMode)); - assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity)); - assert_param(IS_TIM_OCN_POLARITY(sConfig->OCNPolarity)); - assert_param(IS_TIM_FAST_STATE(sConfig->OCFastMode)); - assert_param(IS_TIM_OCNIDLE_STATE(sConfig->OCNIdleState)); - assert_param(IS_TIM_OCIDLE_STATE(sConfig->OCIdleState)); - - htim->State = HAL_TIM_STATE_BUSY; - - switch (Channel) - { - case TIM_CHANNEL_1: - { - assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); - /* Configure the Channel 1 in PWM mode */ - TIM_OC1_SetConfig(htim->Instance, sConfig); - - /* Set the Preload enable bit for channel1 */ - htim->Instance->CCMR1 |= TIM_CCMR1_OC1PE; - - /* Configure the Output Fast mode */ - htim->Instance->CCMR1 &= ~TIM_CCMR1_OC1FE; - htim->Instance->CCMR1 |= sConfig->OCFastMode; - } - break; - - case TIM_CHANNEL_2: - { - assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); - /* Configure the Channel 2 in PWM mode */ - TIM_OC2_SetConfig(htim->Instance, sConfig); - - /* Set the Preload enable bit for channel2 */ - htim->Instance->CCMR1 |= TIM_CCMR1_OC2PE; - - /* Configure the Output Fast mode */ - htim->Instance->CCMR1 &= ~TIM_CCMR1_OC2FE; - htim->Instance->CCMR1 |= sConfig->OCFastMode << 8; - } - break; - - case TIM_CHANNEL_3: - { - assert_param(IS_TIM_CC3_INSTANCE(htim->Instance)); - /* Configure the Channel 3 in PWM mode */ - TIM_OC3_SetConfig(htim->Instance, sConfig); - - /* Set the Preload enable bit for channel3 */ - htim->Instance->CCMR2 |= TIM_CCMR2_OC3PE; - - /* Configure the Output Fast mode */ - htim->Instance->CCMR2 &= ~TIM_CCMR2_OC3FE; - htim->Instance->CCMR2 |= sConfig->OCFastMode; - } - break; - - case TIM_CHANNEL_4: - { - assert_param(IS_TIM_CC4_INSTANCE(htim->Instance)); - /* Configure the Channel 4 in PWM mode */ - TIM_OC4_SetConfig(htim->Instance, sConfig); - - /* Set the Preload enable bit for channel4 */ - htim->Instance->CCMR2 |= TIM_CCMR2_OC4PE; - - /* Configure the Output Fast mode */ - htim->Instance->CCMR2 &= ~TIM_CCMR2_OC4FE; - htim->Instance->CCMR2 |= sConfig->OCFastMode << 8; - } - break; - - default: - break; - } - - htim->State = HAL_TIM_STATE_READY; - - __HAL_UNLOCK(htim); - - return HAL_OK; -} - -/** - * @brief Initializes the TIM One Pulse Channels according to the specified - * parameters in the TIM_OnePulse_InitTypeDef. - * @param htim: TIM One Pulse handle - * @param sConfig: TIM One Pulse configuration structure - * @param OutputChannel : TIM Channels to be enabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @param InputChannel : TIM Channels to be enabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_OnePulse_ConfigChannel(TIM_HandleTypeDef *htim, TIM_OnePulse_InitTypeDef* sConfig, uint32_t OutputChannel, uint32_t InputChannel) -{ - TIM_OC_InitTypeDef temp1; - - /* Check the parameters */ - assert_param(IS_TIM_OPM_CHANNELS(OutputChannel)); - assert_param(IS_TIM_OPM_CHANNELS(InputChannel)); - - if(OutputChannel != InputChannel) - { - __HAL_LOCK(htim); - - htim->State = HAL_TIM_STATE_BUSY; - - /* Extract the Ouput compare configuration from sConfig structure */ - temp1.OCMode = sConfig->OCMode; - temp1.Pulse = sConfig->Pulse; - temp1.OCPolarity = sConfig->OCPolarity; - temp1.OCNPolarity = sConfig->OCNPolarity; - temp1.OCIdleState = sConfig->OCIdleState; - temp1.OCNIdleState = sConfig->OCNIdleState; - - switch (OutputChannel) - { - case TIM_CHANNEL_1: - { - assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); - - TIM_OC1_SetConfig(htim->Instance, &temp1); - } - break; - case TIM_CHANNEL_2: - { - assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); - - TIM_OC2_SetConfig(htim->Instance, &temp1); - } - break; - default: - break; - } - switch (InputChannel) - { - case TIM_CHANNEL_1: - { - assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); - - TIM_TI1_SetConfig(htim->Instance, sConfig->ICPolarity, - sConfig->ICSelection, sConfig->ICFilter); - - /* Reset the IC1PSC Bits */ - htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC; - - /* Select the Trigger source */ - htim->Instance->SMCR &= ~TIM_SMCR_TS; - htim->Instance->SMCR |= TIM_TS_TI1FP1; - - /* Select the Slave Mode */ - htim->Instance->SMCR &= ~TIM_SMCR_SMS; - htim->Instance->SMCR |= TIM_SLAVEMODE_TRIGGER; - } - break; - case TIM_CHANNEL_2: - { - assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); - - TIM_TI2_SetConfig(htim->Instance, sConfig->ICPolarity, - sConfig->ICSelection, sConfig->ICFilter); - - /* Reset the IC2PSC Bits */ - htim->Instance->CCMR1 &= ~TIM_CCMR1_IC2PSC; - - /* Select the Trigger source */ - htim->Instance->SMCR &= ~TIM_SMCR_TS; - htim->Instance->SMCR |= TIM_TS_TI2FP2; - - /* Select the Slave Mode */ - htim->Instance->SMCR &= ~TIM_SMCR_SMS; - htim->Instance->SMCR |= TIM_SLAVEMODE_TRIGGER; - } - break; - - default: - break; - } - - htim->State = HAL_TIM_STATE_READY; - - __HAL_UNLOCK(htim); - - return HAL_OK; -} - else - { - return HAL_ERROR; - } -} - -/** - * @brief Configure the DMA Burst to transfer Data from the memory to the TIM peripheral - * @param htim: TIM handle - * @param BurstBaseAddress: TIM Base address from when the DMA will starts the Data write - * This parameters can be on of the following values: - * @arg TIM_DMABASE_CR1 - * @arg TIM_DMABASE_CR2 - * @arg TIM_DMABASE_SMCR - * @arg TIM_DMABASE_DIER - * @arg TIM_DMABASE_SR - * @arg TIM_DMABASE_EGR - * @arg TIM_DMABASE_CCMR1 - * @arg TIM_DMABASE_CCMR2 - * @arg TIM_DMABASE_CCER - * @arg TIM_DMABASE_CNT - * @arg TIM_DMABASE_PSC - * @arg TIM_DMABASE_ARR - * @arg TIM_DMABASE_RCR - * @arg TIM_DMABASE_CCR1 - * @arg TIM_DMABASE_CCR2 - * @arg TIM_DMABASE_CCR3 - * @arg TIM_DMABASE_CCR4 - * @arg TIM_DMABASE_BDTR - * @arg TIM_DMABASE_DCR - * @param BurstRequestSrc: TIM DMA Request sources - * This parameters can be on of the following values: - * @arg TIM_DMA_UPDATE: TIM update Interrupt source - * @arg TIM_DMA_CC1: TIM Capture Compare 1 DMA source - * @arg TIM_DMA_CC2: TIM Capture Compare 2 DMA source - * @arg TIM_DMA_CC3: TIM Capture Compare 3 DMA source - * @arg TIM_DMA_CC4: TIM Capture Compare 4 DMA source - * @arg TIM_DMA_COM: TIM Commutation DMA source - * @arg TIM_DMA_TRIGGER: TIM Trigger DMA source - * @param BurstBuffer: The Buffer address. - * @param BurstLength: DMA Burst length. This parameter can be one value - * between: TIM_DMABurstLength_1Transfer and TIM_DMABurstLength_18Transfers. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress, uint32_t BurstRequestSrc, - uint32_t* BurstBuffer, uint32_t BurstLength) -{ - /* Check the parameters */ - assert_param(IS_TIM_DMABURST_INSTANCE(htim->Instance)); - assert_param(IS_TIM_DMA_BASE(BurstBaseAddress)); - assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc)); - assert_param(IS_TIM_DMA_LENGTH(BurstLength)); - - if((htim->State == HAL_TIM_STATE_BUSY)) - { - return HAL_BUSY; - } - else if((htim->State == HAL_TIM_STATE_READY)) - { - if((BurstBuffer == 0 ) && (BurstLength > 0)) - { - return HAL_ERROR; - } - else - { - htim->State = HAL_TIM_STATE_BUSY; - } - } - switch(BurstRequestSrc) - { - case TIM_DMA_UPDATE: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_UPDATE]->XferCpltCallback = TIM_DMAPeriodElapsedCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_UPDATE]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_UPDATE], (uint32_t)BurstBuffer, (uint32_t)&htim->Instance->DMAR, ((BurstLength) >> 8) + 1); - } - break; - case TIM_DMA_CC1: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)BurstBuffer, (uint32_t)&htim->Instance->DMAR, ((BurstLength) >> 8) + 1); - } - break; - case TIM_DMA_CC2: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)BurstBuffer, (uint32_t)&htim->Instance->DMAR, ((BurstLength) >> 8) + 1); - } - break; - case TIM_DMA_CC3: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)BurstBuffer, (uint32_t)&htim->Instance->DMAR, ((BurstLength) >> 8) + 1); - } - break; - case TIM_DMA_CC4: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMADelayPulseCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)BurstBuffer, (uint32_t)&htim->Instance->DMAR, ((BurstLength) >> 8) + 1); - } - break; - case TIM_DMA_COM: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_COMMUTATION]->XferCpltCallback = TIMEx_DMACommutationCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_COMMUTATION]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_COMMUTATION], (uint32_t)BurstBuffer, (uint32_t)&htim->Instance->DMAR, ((BurstLength) >> 8) + 1); - } - break; - case TIM_DMA_TRIGGER: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_TRIGGER]->XferCpltCallback = TIM_DMATriggerCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_TRIGGER]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_TRIGGER], (uint32_t)BurstBuffer, (uint32_t)&htim->Instance->DMAR, ((BurstLength) >> 8) + 1); - } - break; - default: - break; - } - /* configure the DMA Burst Mode */ - htim->Instance->DCR = BurstBaseAddress | BurstLength; - - /* Enable the TIM DMA Request */ - __HAL_TIM_ENABLE_DMA(htim, BurstRequestSrc); - - htim->State = HAL_TIM_STATE_READY; - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the TIM DMA Burst mode - * @param htim: TIM handle - * @param BurstRequestSrc: TIM DMA Request sources to disable - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStop(TIM_HandleTypeDef *htim, uint32_t BurstRequestSrc) -{ - /* Check the parameters */ - assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc)); - - /* Abort the DMA transfer (at least disable the DMA channel) */ - switch(BurstRequestSrc) - { - case TIM_DMA_UPDATE: - { - HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_UPDATE]); - } - break; - case TIM_DMA_CC1: - { - HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_CC1]); - } - break; - case TIM_DMA_CC2: - { - HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_CC2]); - } - break; - case TIM_DMA_CC3: - { - HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_CC3]); - } - break; - case TIM_DMA_CC4: - { - HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_CC4]); - } - break; - case TIM_DMA_COM: - { - HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_COMMUTATION]); - } - break; - case TIM_DMA_TRIGGER: - { - HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_TRIGGER]); - } - break; - default: - break; - } - - /* Disable the TIM Update DMA request */ - __HAL_TIM_DISABLE_DMA(htim, BurstRequestSrc); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Configure the DMA Burst to transfer Data from the TIM peripheral to the memory - * @param htim: TIM handle - * @param BurstBaseAddress: TIM Base address from when the DMA will starts the Data read - * This parameters can be on of the following values: - * @arg TIM_DMABASE_CR1 - * @arg TIM_DMABASE_CR2 - * @arg TIM_DMABASE_SMCR - * @arg TIM_DMABASE_DIER - * @arg TIM_DMABASE_SR - * @arg TIM_DMABASE_EGR - * @arg TIM_DMABASE_CCMR1 - * @arg TIM_DMABASE_CCMR2 - * @arg TIM_DMABASE_CCER - * @arg TIM_DMABASE_CNT - * @arg TIM_DMABASE_PSC - * @arg TIM_DMABASE_ARR - * @arg TIM_DMABASE_RCR - * @arg TIM_DMABASE_CCR1 - * @arg TIM_DMABASE_CCR2 - * @arg TIM_DMABASE_CCR3 - * @arg TIM_DMABASE_CCR4 - * @arg TIM_DMABASE_BDTR - * @arg TIM_DMABASE_DCR - * @param BurstRequestSrc: TIM DMA Request sources - * This parameters can be on of the following values: - * @arg TIM_DMA_UPDATE: TIM update Interrupt source - * @arg TIM_DMA_CC1: TIM Capture Compare 1 DMA source - * @arg TIM_DMA_CC2: TIM Capture Compare 2 DMA source - * @arg TIM_DMA_CC3: TIM Capture Compare 3 DMA source - * @arg TIM_DMA_CC4: TIM Capture Compare 4 DMA source - * @arg TIM_DMA_COM: TIM Commutation DMA source - * @arg TIM_DMA_TRIGGER: TIM Trigger DMA source - * @param BurstBuffer: The Buffer address. - * @param BurstLength: DMA Burst length. This parameter can be one value - * between: TIM_DMABurstLength_1Transfer and TIM_DMABurstLength_18Transfers. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress, uint32_t BurstRequestSrc, - uint32_t *BurstBuffer, uint32_t BurstLength) -{ - /* Check the parameters */ - assert_param(IS_TIM_DMABURST_INSTANCE(htim->Instance)); - assert_param(IS_TIM_DMA_BASE(BurstBaseAddress)); - assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc)); - assert_param(IS_TIM_DMA_LENGTH(BurstLength)); - - if((htim->State == HAL_TIM_STATE_BUSY)) - { - return HAL_BUSY; - } - else if((htim->State == HAL_TIM_STATE_READY)) - { - if((BurstBuffer == 0 ) && (BurstLength > 0)) - { - return HAL_ERROR; - } - else - { - htim->State = HAL_TIM_STATE_BUSY; - } - } - switch(BurstRequestSrc) - { - case TIM_DMA_UPDATE: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_UPDATE]->XferCpltCallback = TIM_DMAPeriodElapsedCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_UPDATE]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_UPDATE], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer, ((BurstLength) >> 8) + 1); - } - break; - case TIM_DMA_CC1: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMACaptureCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer, ((BurstLength) >> 8) + 1); - } - break; - case TIM_DMA_CC2: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMACaptureCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer, ((BurstLength) >> 8) + 1); - } - break; - case TIM_DMA_CC3: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMACaptureCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer, ((BurstLength) >> 8) + 1); - } - break; - case TIM_DMA_CC4: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMACaptureCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer, ((BurstLength) >> 8) + 1); - } - break; - case TIM_DMA_COM: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_COMMUTATION]->XferCpltCallback = TIMEx_DMACommutationCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_COMMUTATION]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_COMMUTATION], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer, ((BurstLength) >> 8) + 1); - } - break; - case TIM_DMA_TRIGGER: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_TRIGGER]->XferCpltCallback = TIM_DMATriggerCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_TRIGGER]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_TRIGGER], (uint32_t)&htim->Instance->DMAR, (uint32_t)BurstBuffer, ((BurstLength) >> 8) + 1); - } - break; - default: - break; - } - - /* configure the DMA Burst Mode */ - htim->Instance->DCR = BurstBaseAddress | BurstLength; - - /* Enable the TIM DMA Request */ - __HAL_TIM_ENABLE_DMA(htim, BurstRequestSrc); - - htim->State = HAL_TIM_STATE_READY; - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stop the DMA burst reading - * @param htim: TIM handle - * @param BurstRequestSrc: TIM DMA Request sources to disable. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStop(TIM_HandleTypeDef *htim, uint32_t BurstRequestSrc) -{ - /* Check the parameters */ - assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc)); - - /* Abort the DMA transfer (at least disable the DMA channel) */ - switch(BurstRequestSrc) - { - case TIM_DMA_UPDATE: - { - HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_UPDATE]); - } - break; - case TIM_DMA_CC1: - { - HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_CC1]); - } - break; - case TIM_DMA_CC2: - { - HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_CC2]); - } - break; - case TIM_DMA_CC3: - { - HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_CC3]); - } - break; - case TIM_DMA_CC4: - { - HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_CC4]); - } - break; - case TIM_DMA_COM: - { - HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_COMMUTATION]); - } - break; - case TIM_DMA_TRIGGER: - { - HAL_DMA_Abort(htim->hdma[TIM_DMA_ID_TRIGGER]); - } - break; - default: - break; - } - - /* Disable the TIM Update DMA request */ - __HAL_TIM_DISABLE_DMA(htim, BurstRequestSrc); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Generate a software event - * @param htim: TIM handle - * @param EventSource: specifies the event source. - * This parameter can be one of the following values: - * @arg TIM_EVENTSOURCE_UPDATE: Timer update Event source - * @arg TIM_EVENTSOURCE_CC1: Timer Capture Compare 1 Event source - * @arg TIM_EVENTSOURCE_CC2: Timer Capture Compare 2 Event source - * @arg TIM_EVENTSOURCE_CC3: Timer Capture Compare 3 Event source - * @arg TIM_EVENTSOURCE_CC4: Timer Capture Compare 4 Event source - * @arg TIM_EVENTSOURCE_COM: Timer COM event source - * @arg TIM_EVENTSOURCE_TRIGGER: Timer Trigger Event source - * @arg TIM_EVENTSOURCE_BREAK: Timer Break event source - * @arg TIM_EVENTSOURCE_BREAK2: Timer Break2 event source - * @retval None - */ - -HAL_StatusTypeDef HAL_TIM_GenerateEvent(TIM_HandleTypeDef *htim, uint32_t EventSource) -{ - /* Check the parameters */ - assert_param(IS_TIM_INSTANCE(htim->Instance)); - assert_param(IS_TIM_EVENT_SOURCE(EventSource)); - - /* Process Locked */ - __HAL_LOCK(htim); - - /* Change the TIM state */ - htim->State = HAL_TIM_STATE_BUSY; - - /* Set the event sources */ - htim->Instance->EGR = EventSource; - - /* Change the TIM state */ - htim->State = HAL_TIM_STATE_READY; - - __HAL_UNLOCK(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Configures the OCRef clear feature - * @param htim: TIM handle - * @param sClearInputConfig: pointer to a TIM_ClearInputConfigTypeDef structure that - * contains the OCREF clear feature and parameters for the TIM peripheral. - * @param Channel: specifies the TIM Channel - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 - * @arg TIM_CHANNEL_2: TIM Channel 2 - * @arg TIM_CHANNEL_3: TIM Channel 3 - * @arg TIM_CHANNEL_4: TIM Channel 4 - * @retval HAL status - */ -__weak HAL_StatusTypeDef HAL_TIM_ConfigOCrefClear(TIM_HandleTypeDef *htim, TIM_ClearInputConfigTypeDef * sClearInputConfig, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); - assert_param(IS_TIM_CHANNELS(Channel)); - assert_param(IS_TIM_CLEARINPUT_SOURCE(sClearInputConfig->ClearInputSource)); - - /* Process Locked */ - __HAL_LOCK(htim); - - htim->State = HAL_TIM_STATE_BUSY; - - if(sClearInputConfig->ClearInputSource == TIM_CLEARINPUTSOURCE_ETR) - { - /* Check the parameters */ - assert_param(IS_TIM_CLEARINPUT_POLARITY(sClearInputConfig->ClearInputPolarity)); - assert_param(IS_TIM_CLEARINPUT_PRESCALER(sClearInputConfig->ClearInputPrescaler)); - assert_param(IS_TIM_CLEARINPUT_FILTER(sClearInputConfig->ClearInputFilter)); - - TIM_ETR_SetConfig(htim->Instance, - sClearInputConfig->ClearInputPrescaler, - sClearInputConfig->ClearInputPolarity, - sClearInputConfig->ClearInputFilter); - } - - switch (Channel) - { - case TIM_CHANNEL_1: - { - if(sClearInputConfig->ClearInputState != RESET) - { - /* Enable the OCREF clear feature for Channel 1 */ - htim->Instance->CCMR1 |= TIM_CCMR1_OC1CE; - } - else - { - /* Disable the OCREF clear feature for Channel 1 */ - htim->Instance->CCMR1 &= ~TIM_CCMR1_OC1CE; - } - } - break; - case TIM_CHANNEL_2: - { - assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); - if(sClearInputConfig->ClearInputState != RESET) - { - /* Enable the OCREF clear feature for Channel 2 */ - htim->Instance->CCMR1 |= TIM_CCMR1_OC2CE; - } - else - { - /* Disable the OCREF clear feature for Channel 2 */ - htim->Instance->CCMR1 &= ~TIM_CCMR1_OC2CE; - } - } - break; - case TIM_CHANNEL_3: - { - assert_param(IS_TIM_CC3_INSTANCE(htim->Instance)); - if(sClearInputConfig->ClearInputState != RESET) - { - /* Enable the OCREF clear feature for Channel 3 */ - htim->Instance->CCMR2 |= TIM_CCMR2_OC3CE; - } - else - { - /* Disable the OCREF clear feature for Channel 3 */ - htim->Instance->CCMR2 &= ~TIM_CCMR2_OC3CE; - } - } - break; - case TIM_CHANNEL_4: - { - assert_param(IS_TIM_CC4_INSTANCE(htim->Instance)); - if(sClearInputConfig->ClearInputState != RESET) - { - /* Enable the OCREF clear feature for Channel 4 */ - htim->Instance->CCMR2 |= TIM_CCMR2_OC4CE; - } - else - { - /* Disable the OCREF clear feature for Channel 4 */ - htim->Instance->CCMR2 &= ~TIM_CCMR2_OC4CE; - } - } - break; - default: - break; - } - - htim->State = HAL_TIM_STATE_READY; - - __HAL_UNLOCK(htim); - - return HAL_OK; -} - -/** - * @brief Configures the clock source to be used - * @param htim: TIM handle - * @param sClockSourceConfig: pointer to a TIM_ClockConfigTypeDef structure that - * contains the clock source information for the TIM peripheral. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef *htim, TIM_ClockConfigTypeDef * sClockSourceConfig) -{ - uint32_t tmpsmcr = 0; - - /* Process Locked */ - __HAL_LOCK(htim); - - htim->State = HAL_TIM_STATE_BUSY; - - /* Check the parameters */ - assert_param(IS_TIM_CLOCKSOURCE(sClockSourceConfig->ClockSource)); - assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); - assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler)); - assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); - - /* Reset the SMS, TS, ECE, ETPS and ETRF bits */ - tmpsmcr = htim->Instance->SMCR; - tmpsmcr &= ~(TIM_SMCR_SMS | TIM_SMCR_TS); - tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP); - htim->Instance->SMCR = tmpsmcr; - - switch (sClockSourceConfig->ClockSource) - { - case TIM_CLOCKSOURCE_INTERNAL: - { - assert_param(IS_TIM_INSTANCE(htim->Instance)); - /* Disable slave mode to clock the prescaler directly with the internal clock */ - htim->Instance->SMCR &= ~TIM_SMCR_SMS; - } - break; - - case TIM_CLOCKSOURCE_ETRMODE1: - { - /* Check whether or not the timer instance supports external trigger input mode 1 (ETRF)*/ - assert_param(IS_TIM_CLOCKSOURCE_ETRMODE1_INSTANCE(htim->Instance)); - - /* Configure the ETR Clock source */ - TIM_ETR_SetConfig(htim->Instance, - sClockSourceConfig->ClockPrescaler, - sClockSourceConfig->ClockPolarity, - sClockSourceConfig->ClockFilter); - /* Get the TIMx SMCR register value */ - tmpsmcr = htim->Instance->SMCR; - /* Reset the SMS and TS Bits */ - tmpsmcr &= ~(TIM_SMCR_SMS | TIM_SMCR_TS); - /* Select the External clock mode1 and the ETRF trigger */ - tmpsmcr |= (TIM_SLAVEMODE_EXTERNAL1 | TIM_CLOCKSOURCE_ETRMODE1); - /* Write to TIMx SMCR */ - htim->Instance->SMCR = tmpsmcr; - } - break; - - case TIM_CLOCKSOURCE_ETRMODE2: - { - /* Check whether or not the timer instance supports external trigger input mode 2 (ETRF)*/ - assert_param(IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE(htim->Instance)); - - /* Configure the ETR Clock source */ - TIM_ETR_SetConfig(htim->Instance, - sClockSourceConfig->ClockPrescaler, - sClockSourceConfig->ClockPolarity, - sClockSourceConfig->ClockFilter); - /* Enable the External clock mode2 */ - htim->Instance->SMCR |= TIM_SMCR_ECE; - } - break; - - case TIM_CLOCKSOURCE_TI1: - { - /* Check whether or not the timer instance supports external clock mode 1 */ - assert_param(IS_TIM_CLOCKSOURCE_TIX_INSTANCE(htim->Instance)); - - TIM_TI1_ConfigInputStage(htim->Instance, - sClockSourceConfig->ClockPolarity, - sClockSourceConfig->ClockFilter); - TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1); - } - break; - - case TIM_CLOCKSOURCE_TI2: - { - /* Check whether or not the timer instance supports external clock mode 1 (ETRF)*/ - assert_param(IS_TIM_CLOCKSOURCE_TIX_INSTANCE(htim->Instance)); - - TIM_TI2_ConfigInputStage(htim->Instance, - sClockSourceConfig->ClockPolarity, - sClockSourceConfig->ClockFilter); - TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI2); - } - break; - - case TIM_CLOCKSOURCE_TI1ED: - { - /* Check whether or not the timer instance supports external clock mode 1 */ - assert_param(IS_TIM_CLOCKSOURCE_TIX_INSTANCE(htim->Instance)); - - TIM_TI1_ConfigInputStage(htim->Instance, - sClockSourceConfig->ClockPolarity, - sClockSourceConfig->ClockFilter); - TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1ED); - } - break; - - case TIM_CLOCKSOURCE_ITR0: - { - /* Check whether or not the timer instance supports internal trigger input */ - assert_param(IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(htim->Instance)); - - TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_ITR0); - } - break; - - case TIM_CLOCKSOURCE_ITR1: - { - /* Check whether or not the timer instance supports internal trigger input */ - assert_param(IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(htim->Instance)); - - TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_ITR1); - } - break; - - case TIM_CLOCKSOURCE_ITR2: - { - /* Check whether or not the timer instance supports internal trigger input */ - assert_param(IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(htim->Instance)); - - TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_ITR2); - } - break; - - case TIM_CLOCKSOURCE_ITR3: - { - /* Check whether or not the timer instance supports internal trigger input */ - assert_param(IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(htim->Instance)); - - TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_ITR3); - } - break; - - default: - break; - } - htim->State = HAL_TIM_STATE_READY; - - __HAL_UNLOCK(htim); - - return HAL_OK; -} - -/** - * @brief Selects the signal connected to the TI1 input: direct from CH1_input - * or a XOR combination between CH1_input, CH2_input & CH3_input - * @param htim: TIM handle. - * @param TI1_Selection: Indicate whether or not channel 1 is connected to the - * output of a XOR gate. - * This parameter can be one of the following values: - * @arg TIM_TI1SELECTION_CH1: The TIMx_CH1 pin is connected to TI1 input - * @arg TIM_TI1SELECTION_XORCOMBINATION: The TIMx_CH1, CH2 and CH3 - * pins are connected to the TI1 input (XOR combination) - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_ConfigTI1Input(TIM_HandleTypeDef *htim, uint32_t TI1_Selection) -{ - uint32_t tmpcr2 = 0; - - /* Check the parameters */ - assert_param(IS_TIM_XOR_INSTANCE(htim->Instance)); - assert_param(IS_TIM_TI1SELECTION(TI1_Selection)); - - /* Get the TIMx CR2 register value */ - tmpcr2 = htim->Instance->CR2; - - /* Reset the TI1 selection */ - tmpcr2 &= ~TIM_CR2_TI1S; - - /* Set the TI1 selection */ - tmpcr2 |= TI1_Selection; - - /* Write to TIMxCR2 */ - htim->Instance->CR2 = tmpcr2; - - return HAL_OK; -} - -/** - * @brief Configures the TIM in Slave mode - * @param htim: TIM handle. - * @param sSlaveConfig: pointer to a TIM_SlaveConfigTypeDef structure that - * contains the selected trigger (internal trigger input, filtered - * timer input or external trigger input) and the ) and the Slave - * mode (Disable, Reset, Gated, Trigger, External clock mode 1). - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchronization(TIM_HandleTypeDef *htim, TIM_SlaveConfigTypeDef * sSlaveConfig) -{ - /* Check the parameters */ - assert_param(IS_TIM_SLAVE_INSTANCE(htim->Instance)); - assert_param(IS_TIM_SLAVE_MODE(sSlaveConfig->SlaveMode)); - assert_param(IS_TIM_TRIGGER_SELECTION(sSlaveConfig->InputTrigger)); - - __HAL_LOCK(htim); - - htim->State = HAL_TIM_STATE_BUSY; - - TIM_SlaveTimer_SetConfig(htim, sSlaveConfig); - - /* Disable Trigger Interrupt */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_TRIGGER); - - /* Disable Trigger DMA request */ - __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_TRIGGER); - - htim->State = HAL_TIM_STATE_READY; - - __HAL_UNLOCK(htim); - - return HAL_OK; - } - -/** - * @brief Configures the TIM in Slave mode in interrupt mode - * @param htim: TIM handle. - * @param sSlaveConfig: pointer to a TIM_SlaveConfigTypeDef structure that - * contains the selected trigger (internal trigger input, filtered - * timer input or external trigger input) and the ) and the Slave - * mode (Disable, Reset, Gated, Trigger, External clock mode 1). - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchronization_IT(TIM_HandleTypeDef *htim, - TIM_SlaveConfigTypeDef * sSlaveConfig) - { - /* Check the parameters */ - assert_param(IS_TIM_SLAVE_INSTANCE(htim->Instance)); - assert_param(IS_TIM_SLAVE_MODE(sSlaveConfig->SlaveMode)); - assert_param(IS_TIM_TRIGGER_SELECTION(sSlaveConfig->InputTrigger)); - - __HAL_LOCK(htim); - - htim->State = HAL_TIM_STATE_BUSY; - - TIM_SlaveTimer_SetConfig(htim, sSlaveConfig); - - /* Enable Trigger Interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_TRIGGER); - - /* Disable Trigger DMA request */ - __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_TRIGGER); - - htim->State = HAL_TIM_STATE_READY; - - __HAL_UNLOCK(htim); - - return HAL_OK; - } - -/** - * @brief Read the captured value from Capture Compare unit - * @param htim: TIM handle. - * @param Channel : TIM Channels to be enabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @retval Captured value - */ -uint32_t HAL_TIM_ReadCapturedValue(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - uint32_t tmpreg = 0; - - __HAL_LOCK(htim); - - switch (Channel) - { - case TIM_CHANNEL_1: - { - /* Check the parameters */ - assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); - - /* Return the capture 1 value */ - tmpreg = htim->Instance->CCR1; - - break; - } - case TIM_CHANNEL_2: - { - /* Check the parameters */ - assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); - - /* Return the capture 2 value */ - tmpreg = htim->Instance->CCR2; - - break; - } - - case TIM_CHANNEL_3: - { - /* Check the parameters */ - assert_param(IS_TIM_CC3_INSTANCE(htim->Instance)); - - /* Return the capture 3 value */ - tmpreg = htim->Instance->CCR3; - - break; - } - - case TIM_CHANNEL_4: - { - /* Check the parameters */ - assert_param(IS_TIM_CC4_INSTANCE(htim->Instance)); - - /* Return the capture 4 value */ - tmpreg = htim->Instance->CCR4; - - break; - } - - default: - break; - } - - __HAL_UNLOCK(htim); - return tmpreg; -} - -/** - * @} - */ - -/** @defgroup TIM_Exported_Functions_Group9 TIM Callbacks functions - * @brief TIM Callbacks functions - * -@verbatim - ============================================================================== - ##### TIM Callbacks functions ##### - ============================================================================== - [..] - This section provides TIM callback functions: - (+) Timer Period elapsed callback - (+) Timer Output Compare callback - (+) Timer Input capture callback - (+) Timer Trigger callback - (+) Timer Error callback - -@endverbatim - * @{ - */ - -/** - * @brief Period elapsed callback in non-blocking mode - * @param htim : TIM handle - * @retval None - */ -__weak void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the __HAL_TIM_PeriodElapsedCallback could be implemented in the user file - */ - -} -/** - * @brief Output Compare callback in non-blocking mode - * @param htim : TIM OC handle - * @retval None - */ -__weak void HAL_TIM_OC_DelayElapsedCallback(TIM_HandleTypeDef *htim) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the __HAL_TIM_OC_DelayElapsedCallback could be implemented in the user file - */ -} -/** - * @brief Input Capture callback in non-blocking mode - * @param htim : TIM IC handle - * @retval None - */ -__weak void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *htim) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the __HAL_TIM_IC_CaptureCallback could be implemented in the user file - */ -} - -/** - * @brief PWM Pulse finished callback in non-blocking mode - * @param htim : TIM handle - * @retval None - */ -__weak void HAL_TIM_PWM_PulseFinishedCallback(TIM_HandleTypeDef *htim) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the __HAL_TIM_PWM_PulseFinishedCallback could be implemented in the user file - */ -} - -/** - * @brief Hall Trigger detection callback in non-blocking mode - * @param htim : TIM handle - * @retval None - */ -__weak void HAL_TIM_TriggerCallback(TIM_HandleTypeDef *htim) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_TIM_TriggerCallback could be implemented in the user file - */ -} - -/** - * @brief Timer error callback in non-blocking mode - * @param htim : TIM handle - * @retval None - */ -__weak void HAL_TIM_ErrorCallback(TIM_HandleTypeDef *htim) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_TIM_ErrorCallback could be implemented in the user file - */ -} - -/** - * @} - */ - -/** @defgroup TIM_Exported_Functions_Group10 Peripheral State functions - * @brief Peripheral State functions - * -@verbatim - ============================================================================== - ##### Peripheral State functions ##### - ============================================================================== - [..] - This subsection permits to get in run-time the status of the peripheral - and the data flow. - -@endverbatim - * @{ - */ - -/** - * @brief Return the TIM Base handle state. - * @param htim: TIM Base handle - * @retval HAL state - */ -HAL_TIM_StateTypeDef HAL_TIM_Base_GetState(TIM_HandleTypeDef *htim) -{ - return htim->State; -} - -/** - * @brief Return the TIM OC handle state. - * @param htim: TIM Ouput Compare handle - * @retval HAL state - */ -HAL_TIM_StateTypeDef HAL_TIM_OC_GetState(TIM_HandleTypeDef *htim) -{ - return htim->State; -} - -/** - * @brief Return the TIM PWM handle state. - * @param htim: TIM handle - * @retval HAL state - */ -HAL_TIM_StateTypeDef HAL_TIM_PWM_GetState(TIM_HandleTypeDef *htim) -{ - return htim->State; -} - -/** - * @brief Return the TIM Input Capture handle state. - * @param htim: TIM IC handle - * @retval HAL state - */ -HAL_TIM_StateTypeDef HAL_TIM_IC_GetState(TIM_HandleTypeDef *htim) -{ - return htim->State; -} - -/** - * @brief Return the TIM One Pulse Mode handle state. - * @param htim: TIM OPM handle - * @retval HAL state - */ -HAL_TIM_StateTypeDef HAL_TIM_OnePulse_GetState(TIM_HandleTypeDef *htim) -{ - return htim->State; -} - -/** - * @brief Return the TIM Encoder Mode handle state. - * @param htim: TIM Encoder handle - * @retval HAL state - */ -HAL_TIM_StateTypeDef HAL_TIM_Encoder_GetState(TIM_HandleTypeDef *htim) -{ - return htim->State; -} - -/** - * @} - */ - -/** - * @brief TIM DMA error callback - * @param hdma : pointer to DMA handle. - * @retval None - */ -void TIM_DMAError(DMA_HandleTypeDef *hdma) -{ - TIM_HandleTypeDef* htim = ( TIM_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; - - htim->State= HAL_TIM_STATE_READY; - - HAL_TIM_ErrorCallback(htim); -} - -/** - * @brief TIM DMA Delay Pulse complete callback. - * @param hdma : pointer to DMA handle. - * @retval None - */ -void TIM_DMADelayPulseCplt(DMA_HandleTypeDef *hdma) -{ - TIM_HandleTypeDef* htim = ( TIM_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; - - htim->State= HAL_TIM_STATE_READY; - - if (hdma == htim->hdma[TIM_DMA_ID_CC1]) - { - htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; - } - else if (hdma == htim->hdma[TIM_DMA_ID_CC2]) - { - htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; - } - else if (hdma == htim->hdma[TIM_DMA_ID_CC3]) - { - htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; - } - else if (hdma == htim->hdma[TIM_DMA_ID_CC4]) - { - htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; - } - - HAL_TIM_PWM_PulseFinishedCallback(htim); - - htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; -} -/** - * @brief TIM DMA Capture complete callback. - * @param hdma : pointer to DMA handle. - * @retval None - */ -void TIM_DMACaptureCplt(DMA_HandleTypeDef *hdma) -{ - TIM_HandleTypeDef* htim = ( TIM_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; - - htim->State= HAL_TIM_STATE_READY; - - if (hdma == htim->hdma[TIM_DMA_ID_CC1]) - { - htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; - } - else if (hdma == htim->hdma[TIM_DMA_ID_CC2]) - { - htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; - } - else if (hdma == htim->hdma[TIM_DMA_ID_CC3]) - { - htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; - } - else if (hdma == htim->hdma[TIM_DMA_ID_CC4]) - { - htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; - } - - HAL_TIM_IC_CaptureCallback(htim); - - htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; -} - -/** - * @brief TIM DMA Period Elapse complete callback. - * @param hdma : pointer to DMA handle. - * @retval None - */ -static void TIM_DMAPeriodElapsedCplt(DMA_HandleTypeDef *hdma) -{ - TIM_HandleTypeDef* htim = ( TIM_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; - - htim->State= HAL_TIM_STATE_READY; - - HAL_TIM_PeriodElapsedCallback(htim); -} - -/** - * @brief TIM DMA Trigger callback. - * @param hdma : pointer to DMA handle. - * @retval None - */ -static void TIM_DMATriggerCplt(DMA_HandleTypeDef *hdma) -{ - TIM_HandleTypeDef* htim = ( TIM_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; - - htim->State= HAL_TIM_STATE_READY; - - HAL_TIM_TriggerCallback(htim); -} - -/** - * @brief Time Base configuration - * @param TIMx: TIM peripheral - * @param Structure: TIM Base configuration structure - * @retval None - */ -void TIM_Base_SetConfig(TIM_TypeDef *TIMx, TIM_Base_InitTypeDef *Structure) -{ - uint32_t tmpcr1 = 0; - tmpcr1 = TIMx->CR1; - - /* Set TIM Time Base Unit parameters ---------------------------------------*/ - if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx)) - { - /* Select the Counter Mode */ - tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS); - tmpcr1 |= Structure->CounterMode; - } - - if(IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx)) - { - /* Set the clock division */ - tmpcr1 &= ~TIM_CR1_CKD; - tmpcr1 |= (uint32_t)Structure->ClockDivision; - } - - TIMx->CR1 = tmpcr1; - - /* Set the Autoreload value */ - TIMx->ARR = (uint32_t)Structure->Period ; - - /* Set the Prescaler value */ - TIMx->PSC = (uint32_t)Structure->Prescaler; - - if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx)) - { - /* Set the Repetition Counter value */ - TIMx->RCR = Structure->RepetitionCounter; - } - - /* Generate an update event to reload the Prescaler - and the repetition counter(only for TIM1 and TIM8) value immediately */ - TIMx->EGR = TIM_EGR_UG; -} - -/** - * @brief Time Ouput Compare 1 configuration - * @param TIMx to select the TIM peripheral - * @param OC_Config: The ouput configuration structure - * @retval None - */ -void TIM_OC1_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config) -{ - uint32_t tmpccmrx = 0; - uint32_t tmpccer = 0; - uint32_t tmpcr2 = 0; - - /* Disable the Channel 1: Reset the CC1E Bit */ - TIMx->CCER &= ~TIM_CCER_CC1E; - - /* Get the TIMx CCER register value */ - tmpccer = TIMx->CCER; - /* Get the TIMx CR2 register value */ - tmpcr2 = TIMx->CR2; - - /* Get the TIMx CCMR1 register value */ - tmpccmrx = TIMx->CCMR1; - - /* Reset the Output Compare Mode Bits */ - tmpccmrx &= ~TIM_CCMR1_OC1M; - tmpccmrx &= ~TIM_CCMR1_CC1S; - /* Select the Output Compare Mode */ - tmpccmrx |= OC_Config->OCMode; - - /* Reset the Output Polarity level */ - tmpccer &= ~TIM_CCER_CC1P; - /* Set the Output Compare Polarity */ - tmpccer |= OC_Config->OCPolarity; - - if(IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_1)) - { - /* Check parameters */ - assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity)); - - /* Reset the Output N Polarity level */ - tmpccer &= ~TIM_CCER_CC1NP; - /* Set the Output N Polarity */ - tmpccer |= OC_Config->OCNPolarity; - /* Reset the Output N State */ - tmpccer &= ~TIM_CCER_CC1NE; - } - - if(IS_TIM_BREAK_INSTANCE(TIMx)) - { - /* Check parameters */ - assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState)); - assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); - - /* Reset the Output Compare and Output Compare N IDLE State */ - tmpcr2 &= ~TIM_CR2_OIS1; - tmpcr2 &= ~TIM_CR2_OIS1N; - /* Set the Output Idle state */ - tmpcr2 |= OC_Config->OCIdleState; - /* Set the Output N Idle state */ - tmpcr2 |= OC_Config->OCNIdleState; - } - /* Write to TIMx CR2 */ - TIMx->CR2 = tmpcr2; - - /* Write to TIMx CCMR1 */ - TIMx->CCMR1 = tmpccmrx; - - /* Set the Capture Compare Register value */ - TIMx->CCR1 = OC_Config->Pulse; - - /* Write to TIMx CCER */ - TIMx->CCER = tmpccer; -} - -/** - * @brief Time Ouput Compare 2 configuration - * @param TIMx to select the TIM peripheral - * @param OC_Config: The ouput configuration structure - * @retval None - */ -void TIM_OC2_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config) -{ - uint32_t tmpccmrx = 0; - uint32_t tmpccer = 0; - uint32_t tmpcr2 = 0; - - /* Disable the Channel 2: Reset the CC2E Bit */ - TIMx->CCER &= ~TIM_CCER_CC2E; - - /* Get the TIMx CCER register value */ - tmpccer = TIMx->CCER; - /* Get the TIMx CR2 register value */ - tmpcr2 = TIMx->CR2; - - /* Get the TIMx CCMR1 register value */ - tmpccmrx = TIMx->CCMR1; - - /* Reset the Output Compare mode and Capture/Compare selection Bits */ - tmpccmrx &= ~TIM_CCMR1_OC2M; - tmpccmrx &= ~TIM_CCMR1_CC2S; - - /* Select the Output Compare Mode */ - tmpccmrx |= (OC_Config->OCMode << 8); - - /* Reset the Output Polarity level */ - tmpccer &= ~TIM_CCER_CC2P; - /* Set the Output Compare Polarity */ - tmpccer |= (OC_Config->OCPolarity << 4); - - if(IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_2)) - { - assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity)); - assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState)); - assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); - - /* Reset the Output N Polarity level */ - tmpccer &= ~TIM_CCER_CC2NP; - /* Set the Output N Polarity */ - tmpccer |= (OC_Config->OCNPolarity << 4); - /* Reset the Output N State */ - tmpccer &= ~TIM_CCER_CC2NE; - - } - - if(IS_TIM_BREAK_INSTANCE(TIMx)) - { - /* Check parameters */ - assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState)); - assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); - - /* Reset the Output Compare and Output Compare N IDLE State */ - tmpcr2 &= ~TIM_CR2_OIS2; - tmpcr2 &= ~TIM_CR2_OIS2N; - /* Set the Output Idle state */ - tmpcr2 |= (OC_Config->OCIdleState << 2); - /* Set the Output N Idle state */ - tmpcr2 |= (OC_Config->OCNIdleState << 2); - } - - /* Write to TIMx CR2 */ - TIMx->CR2 = tmpcr2; - - /* Write to TIMx CCMR1 */ - TIMx->CCMR1 = tmpccmrx; - - /* Set the Capture Compare Register value */ - TIMx->CCR2 = OC_Config->Pulse; - - /* Write to TIMx CCER */ - TIMx->CCER = tmpccer; -} - -/** - * @brief Time Ouput Compare 3 configuration - * @param TIMx to select the TIM peripheral - * @param OC_Config: The ouput configuration structure - * @retval None - */ -void TIM_OC3_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config) -{ - uint32_t tmpccmrx = 0; - uint32_t tmpccer = 0; - uint32_t tmpcr2 = 0; - - /* Disable the Channel 3: Reset the CC2E Bit */ - TIMx->CCER &= ~TIM_CCER_CC3E; - - /* Get the TIMx CCER register value */ - tmpccer = TIMx->CCER; - /* Get the TIMx CR2 register value */ - tmpcr2 = TIMx->CR2; - - /* Get the TIMx CCMR2 register value */ - tmpccmrx = TIMx->CCMR2; - - /* Reset the Output Compare mode and Capture/Compare selection Bits */ - tmpccmrx &= ~TIM_CCMR2_OC3M; - tmpccmrx &= ~TIM_CCMR2_CC3S; - /* Select the Output Compare Mode */ - tmpccmrx |= OC_Config->OCMode; - - /* Reset the Output Polarity level */ - tmpccer &= ~TIM_CCER_CC3P; - /* Set the Output Compare Polarity */ - tmpccer |= (OC_Config->OCPolarity << 8); - - if(IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_3)) - { - assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity)); - assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState)); - assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); - - /* Reset the Output N Polarity level */ - tmpccer &= ~TIM_CCER_CC3NP; - /* Set the Output N Polarity */ - tmpccer |= (OC_Config->OCNPolarity << 8); - /* Reset the Output N State */ - tmpccer &= ~TIM_CCER_CC3NE; - } - - if(IS_TIM_BREAK_INSTANCE(TIMx)) - { - /* Check parameters */ - assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState)); - assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); - - /* Reset the Output Compare and Output Compare N IDLE State */ - tmpcr2 &= ~TIM_CR2_OIS3; - tmpcr2 &= ~TIM_CR2_OIS3N; - /* Set the Output Idle state */ - tmpcr2 |= (OC_Config->OCIdleState << 4); - /* Set the Output N Idle state */ - tmpcr2 |= (OC_Config->OCNIdleState << 4); - } - - /* Write to TIMx CR2 */ - TIMx->CR2 = tmpcr2; - - /* Write to TIMx CCMR2 */ - TIMx->CCMR2 = tmpccmrx; - - /* Set the Capture Compare Register value */ - TIMx->CCR3 = OC_Config->Pulse; - - /* Write to TIMx CCER */ - TIMx->CCER = tmpccer; -} - -/** - * @brief Time Ouput Compare 4 configuration - * @param TIMx to select the TIM peripheral - * @param OC_Config: The ouput configuration structure - * @retval None - */ -void TIM_OC4_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config) -{ - uint32_t tmpccmrx = 0; - uint32_t tmpccer = 0; - uint32_t tmpcr2 = 0; - - /* Disable the Channel 4: Reset the CC4E Bit */ - TIMx->CCER &= ~TIM_CCER_CC4E; - - /* Get the TIMx CCER register value */ - tmpccer = TIMx->CCER; - /* Get the TIMx CR2 register value */ - tmpcr2 = TIMx->CR2; - - /* Get the TIMx CCMR2 register value */ - tmpccmrx = TIMx->CCMR2; - - /* Reset the Output Compare mode and Capture/Compare selection Bits */ - tmpccmrx &= ~TIM_CCMR2_OC4M; - tmpccmrx &= ~TIM_CCMR2_CC4S; - - /* Select the Output Compare Mode */ - tmpccmrx |= (OC_Config->OCMode << 8); - - /* Reset the Output Polarity level */ - tmpccer &= ~TIM_CCER_CC4P; - /* Set the Output Compare Polarity */ - tmpccer |= (OC_Config->OCPolarity << 12); - - if(IS_TIM_BREAK_INSTANCE(TIMx)) - { - assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState)); - - /* Reset the Output Compare IDLE State */ - tmpcr2 &= ~TIM_CR2_OIS4; - /* Set the Output Idle state */ - tmpcr2 |= (OC_Config->OCIdleState << 6); - } - - /* Write to TIMx CR2 */ - TIMx->CR2 = tmpcr2; - - /* Write to TIMx CCMR2 */ - TIMx->CCMR2 = tmpccmrx; - - /* Set the Capture Compare Register value */ - TIMx->CCR4 = OC_Config->Pulse; - - /* Write to TIMx CCER */ - TIMx->CCER = tmpccer; -} - -static void TIM_SlaveTimer_SetConfig(TIM_HandleTypeDef *htim, - TIM_SlaveConfigTypeDef * sSlaveConfig) -{ - uint32_t tmpsmcr = 0; - uint32_t tmpccmr1 = 0; - uint32_t tmpccer = 0; - - /* Get the TIMx SMCR register value */ - tmpsmcr = htim->Instance->SMCR; - - /* Reset the Trigger Selection Bits */ - tmpsmcr &= ~TIM_SMCR_TS; - /* Set the Input Trigger source */ - tmpsmcr |= sSlaveConfig->InputTrigger; - - /* Reset the slave mode Bits */ - tmpsmcr &= ~TIM_SMCR_SMS; - /* Set the slave mode */ - tmpsmcr |= sSlaveConfig->SlaveMode; - - /* Write to TIMx SMCR */ - htim->Instance->SMCR = tmpsmcr; - - /* Configure the trigger prescaler, filter, and polarity */ - switch (sSlaveConfig->InputTrigger) - { - case TIM_TS_ETRF: - { - /* Check the parameters */ - assert_param(IS_TIM_CLOCKSOURCE_ETRMODE1_INSTANCE(htim->Instance)); - assert_param(IS_TIM_TRIGGERPRESCALER(sSlaveConfig->TriggerPrescaler)); - assert_param(IS_TIM_TRIGGERPOLARITY(sSlaveConfig->TriggerPolarity)); - assert_param(IS_TIM_TRIGGERFILTER(sSlaveConfig->TriggerFilter)); - /* Configure the ETR Trigger source */ - TIM_ETR_SetConfig(htim->Instance, - sSlaveConfig->TriggerPrescaler, - sSlaveConfig->TriggerPolarity, - sSlaveConfig->TriggerFilter); - } - break; - - case TIM_TS_TI1F_ED: - { - /* Check the parameters */ - assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); - assert_param(IS_TIM_TRIGGERFILTER(sSlaveConfig->TriggerFilter)); - - /* Disable the Channel 1: Reset the CC1E Bit */ - tmpccer = htim->Instance->CCER; - htim->Instance->CCER &= ~TIM_CCER_CC1E; - tmpccmr1 = htim->Instance->CCMR1; - - /* Set the filter */ - tmpccmr1 &= ~TIM_CCMR1_IC1F; - tmpccmr1 |= ((sSlaveConfig->TriggerFilter) << 4); - - /* Write to TIMx CCMR1 and CCER registers */ - htim->Instance->CCMR1 = tmpccmr1; - htim->Instance->CCER = tmpccer; - - } - break; - - case TIM_TS_TI1FP1: - { - /* Check the parameters */ - assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); - assert_param(IS_TIM_TRIGGERPOLARITY(sSlaveConfig->TriggerPolarity)); - assert_param(IS_TIM_TRIGGERFILTER(sSlaveConfig->TriggerFilter)); - - /* Configure TI1 Filter and Polarity */ - TIM_TI1_ConfigInputStage(htim->Instance, - sSlaveConfig->TriggerPolarity, - sSlaveConfig->TriggerFilter); - } - break; - - case TIM_TS_TI2FP2: - { - /* Check the parameters */ - assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); - assert_param(IS_TIM_TRIGGERPOLARITY(sSlaveConfig->TriggerPolarity)); - assert_param(IS_TIM_TRIGGERFILTER(sSlaveConfig->TriggerFilter)); - - /* Configure TI2 Filter and Polarity */ - TIM_TI2_ConfigInputStage(htim->Instance, - sSlaveConfig->TriggerPolarity, - sSlaveConfig->TriggerFilter); - } - break; - - case TIM_TS_ITR0: - { - /* Check the parameter */ - assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); - } - break; - - case TIM_TS_ITR1: - { - /* Check the parameter */ - assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); - } - break; - - case TIM_TS_ITR2: - { - /* Check the parameter */ - assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); - } - break; - - case TIM_TS_ITR3: - { - /* Check the parameter */ - assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); - } - break; - - default: - break; - } -} - -/** - * @brief Configure the TI1 as Input. - * @param TIMx to select the TIM peripheral. - * @param TIM_ICPolarity : The Input Polarity. - * This parameter can be one of the following values: - * @arg TIM_ICPolarity_Rising - * @arg TIM_ICPolarity_Falling - * @arg TIM_ICPolarity_BothEdge - * @param TIM_ICSelection: specifies the input to be used. - * This parameter can be one of the following values: - * @arg TIM_ICSelection_DirectTI: TIM Input 1 is selected to be connected to IC1. - * @arg TIM_ICSelection_IndirectTI: TIM Input 1 is selected to be connected to IC2. - * @arg TIM_ICSelection_TRC: TIM Input 1 is selected to be connected to TRC. - * @param TIM_ICFilter: Specifies the Input Capture Filter. - * This parameter must be a value between 0x00 and 0x0F. - * @retval None - * @note TIM_ICFilter and TIM_ICPolarity are not used in INDIRECT mode as TI2FP1 - * (on channel2 path) is used as the input signal. Therefore CCMR1 must be - * protected against un-initialized filter and polarity values. - */ -void TIM_TI1_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection, - uint32_t TIM_ICFilter) -{ - uint32_t tmpccmr1 = 0; - uint32_t tmpccer = 0; - - /* Disable the Channel 1: Reset the CC1E Bit */ - TIMx->CCER &= ~TIM_CCER_CC1E; - tmpccmr1 = TIMx->CCMR1; - tmpccer = TIMx->CCER; - - /* Select the Input */ - if(IS_TIM_CC2_INSTANCE(TIMx) != RESET) - { - tmpccmr1 &= ~TIM_CCMR1_CC1S; - tmpccmr1 |= TIM_ICSelection; - } - else - { - tmpccmr1 |= TIM_CCMR1_CC1S_0; - } - - /* Set the filter */ - tmpccmr1 &= ~TIM_CCMR1_IC1F; - tmpccmr1 |= ((TIM_ICFilter << 4) & TIM_CCMR1_IC1F); - - /* Select the Polarity and set the CC1E Bit */ - tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP); - tmpccer |= (TIM_ICPolarity & (TIM_CCER_CC1P | TIM_CCER_CC1NP)); - - /* Write to TIMx CCMR1 and CCER registers */ - TIMx->CCMR1 = tmpccmr1; - TIMx->CCER = tmpccer; -} - -/** - * @brief Configure the Polarity and Filter for TI1. - * @param TIMx to select the TIM peripheral. - * @param TIM_ICPolarity : The Input Polarity. - * This parameter can be one of the following values: - * @arg TIM_ICPolarity_Rising - * @arg TIM_ICPolarity_Falling - * @arg TIM_ICPolarity_BothEdge - * @param TIM_ICFilter: Specifies the Input Capture Filter. - * This parameter must be a value between 0x00 and 0x0F. - * @retval None - */ -static void TIM_TI1_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter) -{ - uint32_t tmpccmr1 = 0; - uint32_t tmpccer = 0; - - /* Disable the Channel 1: Reset the CC1E Bit */ - tmpccer = TIMx->CCER; - TIMx->CCER &= ~TIM_CCER_CC1E; - tmpccmr1 = TIMx->CCMR1; - - /* Set the filter */ - tmpccmr1 &= ~TIM_CCMR1_IC1F; - tmpccmr1 |= (TIM_ICFilter << 4); - - /* Select the Polarity and set the CC1E Bit */ - tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP); - tmpccer |= TIM_ICPolarity; - - /* Write to TIMx CCMR1 and CCER registers */ - TIMx->CCMR1 = tmpccmr1; - TIMx->CCER = tmpccer; -} - -/** - * @brief Configure the TI2 as Input. - * @param TIMx to select the TIM peripheral - * @param TIM_ICPolarity : The Input Polarity. - * This parameter can be one of the following values: - * @arg TIM_ICPolarity_Rising - * @arg TIM_ICPolarity_Falling - * @arg TIM_ICPolarity_BothEdge - * @param TIM_ICSelection: specifies the input to be used. - * This parameter can be one of the following values: - * @arg TIM_ICSelection_DirectTI: TIM Input 2 is selected to be connected to IC2. - * @arg TIM_ICSelection_IndirectTI: TIM Input 2 is selected to be connected to IC1. - * @arg TIM_ICSelection_TRC: TIM Input 2 is selected to be connected to TRC. - * @param TIM_ICFilter: Specifies the Input Capture Filter. - * This parameter must be a value between 0x00 and 0x0F. - * @retval None - * @note TIM_ICFilter and TIM_ICPolarity are not used in INDIRECT mode as TI1FP2 - * (on channel1 path) is used as the input signal. Therefore CCMR1 must be - * protected against un-initialized filter and polarity values. - */ -static void TIM_TI2_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection, - uint32_t TIM_ICFilter) -{ - uint32_t tmpccmr1 = 0; - uint32_t tmpccer = 0; - - /* Disable the Channel 2: Reset the CC2E Bit */ - TIMx->CCER &= ~TIM_CCER_CC2E; - tmpccmr1 = TIMx->CCMR1; - tmpccer = TIMx->CCER; - - /* Select the Input */ - tmpccmr1 &= ~TIM_CCMR1_CC2S; - tmpccmr1 |= (TIM_ICSelection << 8); - - /* Set the filter */ - tmpccmr1 &= ~TIM_CCMR1_IC2F; - tmpccmr1 |= ((TIM_ICFilter << 12) & TIM_CCMR1_IC2F); - - /* Select the Polarity and set the CC2E Bit */ - tmpccer &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP); - tmpccer |= ((TIM_ICPolarity << 4) & (TIM_CCER_CC2P | TIM_CCER_CC2NP)); - - /* Write to TIMx CCMR1 and CCER registers */ - TIMx->CCMR1 = tmpccmr1 ; - TIMx->CCER = tmpccer; -} - -/** - * @brief Configure the Polarity and Filter for TI2. - * @param TIMx to select the TIM peripheral. - * @param TIM_ICPolarity : The Input Polarity. - * This parameter can be one of the following values: - * @arg TIM_ICPolarity_Rising - * @arg TIM_ICPolarity_Falling - * @arg TIM_ICPolarity_BothEdge - * @param TIM_ICFilter: Specifies the Input Capture Filter. - * This parameter must be a value between 0x00 and 0x0F. - * @retval None - */ -static void TIM_TI2_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter) -{ - uint32_t tmpccmr1 = 0; - uint32_t tmpccer = 0; - - /* Disable the Channel 2: Reset the CC2E Bit */ - TIMx->CCER &= ~TIM_CCER_CC2E; - tmpccmr1 = TIMx->CCMR1; - tmpccer = TIMx->CCER; - - /* Set the filter */ - tmpccmr1 &= ~TIM_CCMR1_IC2F; - tmpccmr1 |= (TIM_ICFilter << 12); - - /* Select the Polarity and set the CC2E Bit */ - tmpccer &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP); - tmpccer |= (TIM_ICPolarity << 4); - - /* Write to TIMx CCMR1 and CCER registers */ - TIMx->CCMR1 = tmpccmr1 ; - TIMx->CCER = tmpccer; -} - -/** - * @brief Configure the TI3 as Input. - * @param TIMx to select the TIM peripheral - * @param TIM_ICPolarity : The Input Polarity. - * This parameter can be one of the following values: - * @arg TIM_ICPolarity_Rising - * @arg TIM_ICPolarity_Falling - * @arg TIM_ICPolarity_BothEdge - * @param TIM_ICSelection: specifies the input to be used. - * This parameter can be one of the following values: - * @arg TIM_ICSelection_DirectTI: TIM Input 3 is selected to be connected to IC3. - * @arg TIM_ICSelection_IndirectTI: TIM Input 3 is selected to be connected to IC4. - * @arg TIM_ICSelection_TRC: TIM Input 3 is selected to be connected to TRC. - * @param TIM_ICFilter: Specifies the Input Capture Filter. - * This parameter must be a value between 0x00 and 0x0F. - * @retval None - * @note TIM_ICFilter and TIM_ICPolarity are not used in INDIRECT mode as TI3FP4 - * (on channel1 path) is used as the input signal. Therefore CCMR2 must be - * protected against un-initialized filter and polarity values. - */ -static void TIM_TI3_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection, - uint32_t TIM_ICFilter) -{ - uint32_t tmpccmr2 = 0; - uint32_t tmpccer = 0; - - /* Disable the Channel 3: Reset the CC3E Bit */ - TIMx->CCER &= ~TIM_CCER_CC3E; - tmpccmr2 = TIMx->CCMR2; - tmpccer = TIMx->CCER; - - /* Select the Input */ - tmpccmr2 &= ~TIM_CCMR2_CC3S; - tmpccmr2 |= TIM_ICSelection; - - /* Set the filter */ - tmpccmr2 &= ~TIM_CCMR2_IC3F; - tmpccmr2 |= ((TIM_ICFilter << 4) & TIM_CCMR2_IC3F); - - /* Select the Polarity and set the CC3E Bit */ - tmpccer &= ~(TIM_CCER_CC3P | TIM_CCER_CC3NP); - tmpccer |= ((TIM_ICPolarity << 8) & (TIM_CCER_CC3P | TIM_CCER_CC3NP)); - - /* Write to TIMx CCMR2 and CCER registers */ - TIMx->CCMR2 = tmpccmr2; - TIMx->CCER = tmpccer; -} - -/** - * @brief Configure the TI4 as Input. - * @param TIMx to select the TIM peripheral - * @param TIM_ICPolarity : The Input Polarity. - * This parameter can be one of the following values: - * @arg TIM_ICPolarity_Rising - * @arg TIM_ICPolarity_Falling - * @arg TIM_ICPolarity_BothEdge - * @param TIM_ICSelection: specifies the input to be used. - * This parameter can be one of the following values: - * @arg TIM_ICSelection_DirectTI: TIM Input 4 is selected to be connected to IC4. - * @arg TIM_ICSelection_IndirectTI: TIM Input 4 is selected to be connected to IC3. - * @arg TIM_ICSelection_TRC: TIM Input 4 is selected to be connected to TRC. - * @param TIM_ICFilter: Specifies the Input Capture Filter. - * This parameter must be a value between 0x00 and 0x0F. - * @note TIM_ICFilter and TIM_ICPolarity are not used in INDIRECT mode as TI4FP3 - * (on channel1 path) is used as the input signal. Therefore CCMR2 must be - * protected against un-initialized filter and polarity values. - * @retval None - */ -static void TIM_TI4_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection, - uint32_t TIM_ICFilter) -{ - uint32_t tmpccmr2 = 0; - uint32_t tmpccer = 0; - - /* Disable the Channel 4: Reset the CC4E Bit */ - TIMx->CCER &= ~TIM_CCER_CC4E; - tmpccmr2 = TIMx->CCMR2; - tmpccer = TIMx->CCER; - - /* Select the Input */ - tmpccmr2 &= ~TIM_CCMR2_CC4S; - tmpccmr2 |= (TIM_ICSelection << 8); - - /* Set the filter */ - tmpccmr2 &= ~TIM_CCMR2_IC4F; - tmpccmr2 |= ((TIM_ICFilter << 12) & TIM_CCMR2_IC4F); - - /* Select the Polarity and set the CC4E Bit */ - tmpccer &= ~(TIM_CCER_CC4P | TIM_CCER_CC4NP); - tmpccer |= ((TIM_ICPolarity << 12) & (TIM_CCER_CC4P | TIM_CCER_CC4NP)); - - /* Write to TIMx CCMR2 and CCER registers */ - TIMx->CCMR2 = tmpccmr2; - TIMx->CCER = tmpccer ; -} - -/** - * @brief Selects the Input Trigger source - * @param TIMx to select the TIM peripheral - * @param InputTriggerSource: The Input Trigger source. - * This parameter can be one of the following values: - * @arg TIM_TS_ITR0: Internal Trigger 0 - * @arg TIM_TS_ITR1: Internal Trigger 1 - * @arg TIM_TS_ITR2: Internal Trigger 2 - * @arg TIM_TS_ITR3: Internal Trigger 3 - * @arg TIM_TS_TI1F_ED: TI1 Edge Detector - * @arg TIM_TS_TI1FP1: Filtered Timer Input 1 - * @arg TIM_TS_TI2FP2: Filtered Timer Input 2 - * @arg TIM_TS_ETRF: External Trigger input - * @retval None - */ -static void TIM_ITRx_SetConfig(TIM_TypeDef *TIMx, uint16_t InputTriggerSource) -{ - uint32_t tmpsmcr = 0; - - /* Get the TIMx SMCR register value */ - tmpsmcr = TIMx->SMCR; - /* Reset the TS Bits */ - tmpsmcr &= ~TIM_SMCR_TS; - /* Set the Input Trigger source and the slave mode*/ - tmpsmcr |= InputTriggerSource | TIM_SLAVEMODE_EXTERNAL1; - /* Write to TIMx SMCR */ - TIMx->SMCR = tmpsmcr; -} -/** - * @brief Configures the TIMx External Trigger (ETR). - * @param TIMx to select the TIM peripheral - * @param TIM_ExtTRGPrescaler: The external Trigger Prescaler. - * This parameter can be one of the following values: - * @arg TIM_ExtTRGPSC_DIV1: ETRP Prescaler OFF. - * @arg TIM_ExtTRGPSC_DIV2: ETRP frequency divided by 2. - * @arg TIM_ExtTRGPSC_DIV4: ETRP frequency divided by 4. - * @arg TIM_ExtTRGPSC_DIV8: ETRP frequency divided by 8. - * @param TIM_ExtTRGPolarity: The external Trigger Polarity. - * This parameter can be one of the following values: - * @arg TIM_ExtTRGPolarity_Inverted: active low or falling edge active. - * @arg TIM_ExtTRGPolarity_NonInverted: active high or rising edge active. - * @param ExtTRGFilter: External Trigger Filter. - * This parameter must be a value between 0x00 and 0x0F - * @retval None - */ -void TIM_ETR_SetConfig(TIM_TypeDef* TIMx, uint32_t TIM_ExtTRGPrescaler, - uint32_t TIM_ExtTRGPolarity, uint32_t ExtTRGFilter) -{ - uint32_t tmpsmcr = 0; - - tmpsmcr = TIMx->SMCR; - - /* Reset the ETR Bits */ - tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP); - - /* Set the Prescaler, the Filter value and the Polarity */ - tmpsmcr |= (uint32_t)(TIM_ExtTRGPrescaler | (TIM_ExtTRGPolarity | (ExtTRGFilter << 8))); - - /* Write to TIMx SMCR */ - TIMx->SMCR = tmpsmcr; -} - -/** - * @brief Enables or disables the TIM Capture Compare Channel x. - * @param TIMx to select the TIM peripheral - * @param Channel: specifies the TIM Channel - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 - * @arg TIM_CHANNEL_2: TIM Channel 2 - * @arg TIM_CHANNEL_3: TIM Channel 3 - * @arg TIM_CHANNEL_4: TIM Channel 4 - * @param ChannelState: specifies the TIM Channel CCxE bit new state. - * This parameter can be: TIM_CCx_ENABLE or TIM_CCx_Disable. - * @retval None - */ -void TIM_CCxChannelCmd(TIM_TypeDef* TIMx, uint32_t Channel, uint32_t ChannelState) -{ - uint32_t tmp = 0; - - /* Check the parameters */ - assert_param(IS_TIM_CC1_INSTANCE(TIMx)); - assert_param(IS_TIM_CHANNELS(Channel)); - - tmp = TIM_CCER_CC1E << Channel; - - /* Reset the CCxE Bit */ - TIMx->CCER &= ~tmp; - - /* Set or reset the CCxE Bit */ - TIMx->CCER |= (uint32_t)(ChannelState << Channel); -} - - -/** - * @} - */ - -#endif /* HAL_TIM_MODULE_ENABLED */ -/** - * @} - */ - -/** - * @} - */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ -
--- a/Src/stm32l4xx_hal_tim_ex.c Thu Nov 12 20:49:49 2015 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,2689 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_tim_ex.c - * @author MCD Application Team - * @version V1.1.0 - * @date 16-September-2015 - * @brief TIM HAL module driver. - * This file provides firmware functions to manage the following - * functionalities of the Timer Extended peripheral: - * + Time Hall Sensor Interface Initialization - * + Time Hall Sensor Interface Start - * + Time Complementary signal break and dead time configuration - * + Time Master and Slave synchronization configuration - * + Time Output Compare/PWM Channel Configuration (for channels 5 and 6) - * + Time OCRef clear configuration - * + Timer remapping capabilities configuration - @verbatim - ============================================================================== - ##### TIMER Extended features ##### - ============================================================================== - [..] - The Timer Extended features include: - (#) Complementary outputs with programmable dead-time for : - (++) Output Compare - (++) PWM generation (Edge and Center-aligned Mode) - (++) One-pulse mode output - (#) Synchronization circuit to control the timer with external signals and to - interconnect several timers together. - (#) Break input to put the timer output signals in reset state or in a known state. - (#) Supports incremental (quadrature) encoder and hall-sensor circuitry for - positioning purposes - - ##### How to use this driver ##### - ============================================================================== - [..] - (#) Initialize the TIM low level resources by implementing the following functions - depending on the selected feature: - (++) Hall Sensor output : HAL_TIMEx_HallSensor_MspInit() - - (#) Initialize the TIM low level resources : - (##) Enable the TIM interface clock using __HAL_RCC_TIMx_CLK_ENABLE(); - (##) TIM pins configuration - (+++) Enable the clock for the TIM GPIOs using the following function: - __HAL_RCC_GPIOx_CLK_ENABLE(); - (+++) Configure these TIM pins in Alternate function mode using HAL_GPIO_Init(); - - (#) The external Clock can be configured, if needed (the default clock is the - internal clock from the APBx), using the following function: - HAL_TIM_ConfigClockSource, the clock configuration should be done before - any start function. - - (#) Configure the TIM in the desired functioning mode using one of the - initialization function of this driver: - (++) HAL_TIMEx_HallSensor_Init() and HAL_TIMEx_ConfigCommutationEvent(): to use the - Timer Hall Sensor Interface and the commutation event with the corresponding - Interrupt and DMA request if needed (Note that One Timer is used to interface - with the Hall sensor Interface and another Timer should be used to use - the commutation event). - - (#) Activate the TIM peripheral using one of the start functions: - (++) Complementary Output Compare : HAL_TIMEx_OCN_Start(), HAL_TIMEx_OCN_Start_DMA(), HAL_TIMEx_OC_Start_IT() - (++) Complementary PWM generation : HAL_TIMEx_PWMN_Start(), HAL_TIMEx_PWMN_Start_DMA(), HAL_TIMEx_PWMN_Start_IT() - (++) Complementary One-pulse mode output : HAL_TIMEx_OnePulseN_Start(), HAL_TIMEx_OnePulseN_Start_IT() - (++) Hall Sensor output : HAL_TIMEx_HallSensor_Start(), HAL_TIMEx_HallSensor_Start_DMA(), HAL_TIMEx_HallSensor_Start_IT(). - - - @endverbatim - ****************************************************************************** - * @attention - * - * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** -*/ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @defgroup TIMEx TIMEx - * @brief TIM Extended HAL module driver - * @{ - */ - -#ifdef HAL_TIM_MODULE_ENABLED - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -#define BDTR_BKF_SHIFT (16) -#define BDTR_BK2F_SHIFT (20) -#define TIMx_ETRSEL_MASK ((uint32_t)0x0001C000) - -/* Private macro -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ -static void TIM_OC5_SetConfig(TIM_TypeDef *TIMx, - TIM_OC_InitTypeDef *OC_Config); - -static void TIM_OC6_SetConfig(TIM_TypeDef *TIMx, - TIM_OC_InitTypeDef *OC_Config); - -static void TIM_CCxNChannelCmd(TIM_TypeDef* TIMx, uint32_t Channel, uint32_t ChannelNState); - -/* Private functions ---------------------------------------------------------*/ -/** - * @brief Timer Ouput Compare 5 configuration - * @param TIMx to select the TIM peripheral - * @param OC_Config: The ouput configuration structure - * @retval None - */ -static void TIM_OC5_SetConfig(TIM_TypeDef *TIMx, - TIM_OC_InitTypeDef *OC_Config) -{ - uint32_t tmpccmrx = 0; - uint32_t tmpccer = 0; - uint32_t tmpcr2 = 0; - - /* Disable the output: Reset the CCxE Bit */ - TIMx->CCER &= ~TIM_CCER_CC5E; - - /* Get the TIMx CCER register value */ - tmpccer = TIMx->CCER; - /* Get the TIMx CR2 register value */ - tmpcr2 = TIMx->CR2; - /* Get the TIMx CCMR1 register value */ - tmpccmrx = TIMx->CCMR3; - - /* Reset the Output Compare Mode Bits */ - tmpccmrx &= ~(TIM_CCMR3_OC5M); - /* Select the Output Compare Mode */ - tmpccmrx |= OC_Config->OCMode; - - /* Reset the Output Polarity level */ - tmpccer &= ~TIM_CCER_CC5P; - /* Set the Output Compare Polarity */ - tmpccer |= (OC_Config->OCPolarity << 16); - - if(IS_TIM_BREAK_INSTANCE(TIMx)) - { - /* Reset the Output Compare IDLE State */ - tmpcr2 &= ~TIM_CR2_OIS5; - /* Set the Output Idle state */ - tmpcr2 |= (OC_Config->OCIdleState << 8); - } - /* Write to TIMx CR2 */ - TIMx->CR2 = tmpcr2; - - /* Write to TIMx CCMR3 */ - TIMx->CCMR3 = tmpccmrx; - - /* Set the Capture Compare Register value */ - TIMx->CCR5 = OC_Config->Pulse; - - /* Write to TIMx CCER */ - TIMx->CCER = tmpccer; -} - -/** - * @brief Timer Ouput Compare 6 configuration - * @param TIMx to select the TIM peripheral - * @param OC_Config: The ouput configuration structure - * @retval None - */ -static void TIM_OC6_SetConfig(TIM_TypeDef *TIMx, - TIM_OC_InitTypeDef *OC_Config) -{ - uint32_t tmpccmrx = 0; - uint32_t tmpccer = 0; - uint32_t tmpcr2 = 0; - - /* Disable the output: Reset the CCxE Bit */ - TIMx->CCER &= ~TIM_CCER_CC6E; - - /* Get the TIMx CCER register value */ - tmpccer = TIMx->CCER; - /* Get the TIMx CR2 register value */ - tmpcr2 = TIMx->CR2; - /* Get the TIMx CCMR1 register value */ - tmpccmrx = TIMx->CCMR3; - - /* Reset the Output Compare Mode Bits */ - tmpccmrx &= ~(TIM_CCMR3_OC6M); - /* Select the Output Compare Mode */ - tmpccmrx |= (OC_Config->OCMode << 8); - - /* Reset the Output Polarity level */ - tmpccer &= (uint32_t)~TIM_CCER_CC6P; - /* Set the Output Compare Polarity */ - tmpccer |= (OC_Config->OCPolarity << 20); - - if(IS_TIM_BREAK_INSTANCE(TIMx)) - { - /* Reset the Output Compare IDLE State */ - tmpcr2 &= ~TIM_CR2_OIS6; - /* Set the Output Idle state */ - tmpcr2 |= (OC_Config->OCIdleState << 10); - } - - /* Write to TIMx CR2 */ - TIMx->CR2 = tmpcr2; - - /* Write to TIMx CCMR3 */ - TIMx->CCMR3 = tmpccmrx; - - /* Set the Capture Compare Register value */ - TIMx->CCR6 = OC_Config->Pulse; - - /* Write to TIMx CCER */ - TIMx->CCER = tmpccer; -} - -/* Exported functions --------------------------------------------------------*/ -/** @defgroup TIMEx_Exported_Functions TIM Extended Exported Functions - * @{ - */ - -/** @defgroup TIMEx_Exported_Functions_Group1 Extended Timer Hall Sensor functions - * @brief Timer Hall Sensor functions - * -@verbatim - ============================================================================== - ##### Timer Hall Sensor functions ##### - ============================================================================== - [..] - This section provides functions allowing to: - (+) Initialize and configure TIM HAL Sensor. - (+) De-initialize TIM HAL Sensor. - (+) Start the Hall Sensor Interface. - (+) Stop the Hall Sensor Interface. - (+) Start the Hall Sensor Interface and enable interrupts. - (+) Stop the Hall Sensor Interface and disable interrupts. - (+) Start the Hall Sensor Interface and enable DMA transfers. - (+) Stop the Hall Sensor Interface and disable DMA transfers. - -@endverbatim - * @{ - */ -/** - * @brief Initializes the TIM Hall Sensor Interface and initialize the associated handle. - * @param htim: TIM Encoder Interface handle - * @param sConfig: TIM Hall Sensor configuration structure - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, TIM_HallSensor_InitTypeDef* sConfig) -{ - TIM_OC_InitTypeDef OC_Config; - - /* Check the TIM handle allocation */ - if(htim == NULL) - { - return HAL_ERROR; - } - - assert_param(IS_TIM_XOR_INSTANCE(htim->Instance)); - assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); - assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); - assert_param(IS_TIM_IC_POLARITY(sConfig->IC1Polarity)); - assert_param(IS_TIM_IC_PRESCALER(sConfig->IC1Prescaler)); - assert_param(IS_TIM_IC_FILTER(sConfig->IC1Filter)); - - if(htim->State == HAL_TIM_STATE_RESET) - { - /* Allocate lock resource and initialize it */ - htim->Lock = HAL_UNLOCKED; - - /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */ - HAL_TIMEx_HallSensor_MspInit(htim); - } - - /* Set the TIM state */ - htim->State = HAL_TIM_STATE_BUSY; - - /* Configure the Time base in the Encoder Mode */ - TIM_Base_SetConfig(htim->Instance, &htim->Init); - - /* Configure the Channel 1 as Input Channel to interface with the three Outputs of the Hall sensor */ - TIM_TI1_SetConfig(htim->Instance, sConfig->IC1Polarity, TIM_ICSELECTION_TRC, sConfig->IC1Filter); - - /* Reset the IC1PSC Bits */ - htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC; - /* Set the IC1PSC value */ - htim->Instance->CCMR1 |= sConfig->IC1Prescaler; - - /* Enable the Hall sensor interface (XOR function of the three inputs) */ - htim->Instance->CR2 |= TIM_CR2_TI1S; - - /* Select the TIM_TS_TI1F_ED signal as Input trigger for the TIM */ - htim->Instance->SMCR &= ~TIM_SMCR_TS; - htim->Instance->SMCR |= TIM_TS_TI1F_ED; - - /* Use the TIM_TS_TI1F_ED signal to reset the TIM counter each edge detection */ - htim->Instance->SMCR &= ~TIM_SMCR_SMS; - htim->Instance->SMCR |= TIM_SLAVEMODE_RESET; - - /* Program channel 2 in PWM 2 mode with the desired Commutation_Delay*/ - OC_Config.OCFastMode = TIM_OCFAST_DISABLE; - OC_Config.OCIdleState = TIM_OCIDLESTATE_RESET; - OC_Config.OCMode = TIM_OCMODE_PWM2; - OC_Config.OCNIdleState = TIM_OCNIDLESTATE_RESET; - OC_Config.OCNPolarity = TIM_OCNPOLARITY_HIGH; - OC_Config.OCPolarity = TIM_OCPOLARITY_HIGH; - OC_Config.Pulse = sConfig->Commutation_Delay; - - TIM_OC2_SetConfig(htim->Instance, &OC_Config); - - /* Select OC2REF as trigger output on TRGO: write the MMS bits in the TIMx_CR2 - register to 101 */ - htim->Instance->CR2 &= ~TIM_CR2_MMS; - htim->Instance->CR2 |= TIM_TRGO_OC2REF; - - /* Initialize the TIM state*/ - htim->State= HAL_TIM_STATE_READY; - - return HAL_OK; -} - -/** - * @brief DeInitialize the TIM Hall Sensor interface - * @param htim: TIM Hall Sensor handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim) -{ - /* Check the parameters */ - assert_param(IS_TIM_INSTANCE(htim->Instance)); - - htim->State = HAL_TIM_STATE_BUSY; - - /* Disable the TIM Peripheral Clock */ - __HAL_TIM_DISABLE(htim); - - /* DeInit the low level hardware: GPIO, CLOCK, NVIC */ - HAL_TIMEx_HallSensor_MspDeInit(htim); - - /* Change TIM state */ - htim->State = HAL_TIM_STATE_RESET; - - /* Release Lock */ - __HAL_UNLOCK(htim); - - return HAL_OK; -} - -/** - * @brief Initializes the TIM Hall Sensor MSP. - * @param htim: TIM handle - * @retval None - */ -__weak void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_TIMEx_HallSensor_MspInit could be implemented in the user file - */ -} - -/** - * @brief DeInitialize TIM Hall Sensor MSP. - * @param htim: TIM handle - * @retval None - */ -__weak void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_TIMEx_HallSensor_MspDeInit could be implemented in the user file - */ -} - -/** - * @brief Starts the TIM Hall Sensor Interface. - * @param htim : TIM Hall Sensor handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim) -{ - /* Check the parameters */ - assert_param(IS_TIM_XOR_INSTANCE(htim->Instance)); - - /* Enable the Input Capture channels 1 - (in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); - - /* Enable the Peripheral */ - __HAL_TIM_ENABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the TIM Hall sensor Interface. - * @param htim : TIM Hall Sensor handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim) -{ - /* Check the parameters */ - assert_param(IS_TIM_XOR_INSTANCE(htim->Instance)); - - /* Disable the Input Capture channels 1, 2 and 3 - (in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); - - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Starts the TIM Hall Sensor Interface in interrupt mode. - * @param htim : TIM Hall Sensor handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim) -{ - /* Check the parameters */ - assert_param(IS_TIM_XOR_INSTANCE(htim->Instance)); - - /* Enable the capture compare Interrupts 1 event */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); - - /* Enable the Input Capture channels 1 - (in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); - - /* Enable the Peripheral */ - __HAL_TIM_ENABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the TIM Hall Sensor Interface in interrupt mode. - * @param htim : TIM handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim) -{ - /* Check the parameters */ - assert_param(IS_TIM_XOR_INSTANCE(htim->Instance)); - - /* Disable the Input Capture channels 1 - (in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); - - /* Disable the capture compare Interrupts event */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); - - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Starts the TIM Hall Sensor Interface in DMA mode. - * @param htim : TIM Hall Sensor handle - * @param pData: The destination Buffer address. - * @param Length: The length of data to be transferred from TIM peripheral to memory. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length) -{ - /* Check the parameters */ - assert_param(IS_TIM_XOR_INSTANCE(htim->Instance)); - - if((htim->State == HAL_TIM_STATE_BUSY)) - { - return HAL_BUSY; - } - else if((htim->State == HAL_TIM_STATE_READY)) - { - if(((uint32_t)pData == 0 ) && (Length > 0)) - { - return HAL_ERROR; - } - else - { - htim->State = HAL_TIM_STATE_BUSY; - } - } - /* Enable the Input Capture channels 1 - (in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); - - /* Set the DMA Input Capture 1 Callback */ - htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMACaptureCplt; - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel for Capture 1*/ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)pData, Length); - - /* Enable the capture compare 1 Interrupt */ - __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); - - /* Enable the Peripheral */ - __HAL_TIM_ENABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the TIM Hall Sensor Interface in DMA mode. - * @param htim : TIM handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim) -{ - /* Check the parameters */ - assert_param(IS_TIM_XOR_INSTANCE(htim->Instance)); - - /* Disable the Input Capture channels 1 - (in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ - TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); - - - /* Disable the capture compare Interrupts 1 event */ - __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); - - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @} - */ - -/** @defgroup TIMEx_Exported_Functions_Group2 Extended Timer Complementary Output Compare functions - * @brief Timer Complementary Output Compare functions - * -@verbatim - ============================================================================== - ##### Timer Complementary Output Compare functions ##### - ============================================================================== - [..] - This section provides functions allowing to: - (+) Start the Complementary Output Compare/PWM. - (+) Stop the Complementary Output Compare/PWM. - (+) Start the Complementary Output Compare/PWM and enable interrupts. - (+) Stop the Complementary Output Compare/PWM and disable interrupts. - (+) Start the Complementary Output Compare/PWM and enable DMA transfers. - (+) Stop the Complementary Output Compare/PWM and disable DMA transfers. - -@endverbatim - * @{ - */ - -/** - * @brief Starts the TIM Output Compare signal generation on the complementary - * output. - * @param htim : TIM Output Compare handle - * @param Channel : TIM Channel to be enabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); - - /* Enable the Capture compare channel N */ - TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); - - /* Enable the Main Ouput */ - __HAL_TIM_MOE_ENABLE(htim); - - /* Enable the Peripheral */ - __HAL_TIM_ENABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the TIM Output Compare signal generation on the complementary - * output. - * @param htim : TIM handle - * @param Channel : TIM Channel to be disabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); - - /* Disable the Capture compare channel N */ - TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); - - /* Disable the Main Ouput */ - __HAL_TIM_MOE_DISABLE(htim); - - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Starts the TIM Output Compare signal generation in interrupt mode - * on the complementary output. - * @param htim : TIM OC handle - * @param Channel : TIM Channel to be enabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); - - switch (Channel) - { - case TIM_CHANNEL_1: - { - /* Enable the TIM Output Compare interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); - } - break; - - case TIM_CHANNEL_2: - { - /* Enable the TIM Output Compare interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); - } - break; - - case TIM_CHANNEL_3: - { - /* Enable the TIM Output Compare interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3); - } - break; - - case TIM_CHANNEL_4: - { - /* Enable the TIM Output Compare interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4); - } - break; - - default: - break; - } - - /* Enable the TIM Break interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK); - - /* Enable the Capture compare channel N */ - TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); - - /* Enable the Main Ouput */ - __HAL_TIM_MOE_ENABLE(htim); - - /* Enable the Peripheral */ - __HAL_TIM_ENABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the TIM Output Compare signal generation in interrupt mode - * on the complementary output. - * @param htim : TIM Output Compare handle - * @param Channel : TIM Channel to be disabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - uint32_t tmpccer = 0; - - /* Check the parameters */ - assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); - - switch (Channel) - { - case TIM_CHANNEL_1: - { - /* Disable the TIM Output Compare interrupt */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); - } - break; - - case TIM_CHANNEL_2: - { - /* Disable the TIM Output Compare interrupt */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); - } - break; - - case TIM_CHANNEL_3: - { - /* Disable the TIM Output Compare interrupt */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3); - } - break; - - case TIM_CHANNEL_4: - { - /* Disable the TIM Output Compare interrupt */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4); - } - break; - - default: - break; - } - - /* Disable the Capture compare channel N */ - TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); - - /* Disable the TIM Break interrupt (only if no more channel is active) */ - tmpccer = htim->Instance->CCER; - if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == RESET) - { - __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK); - } - - /* Disable the Main Ouput */ - __HAL_TIM_MOE_DISABLE(htim); - - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Starts the TIM Output Compare signal generation in DMA mode - * on the complementary output. - * @param htim : TIM Output Compare handle - * @param Channel : TIM Channel to be enabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @param pData: The source Buffer address. - * @param Length: The length of data to be transferred from memory to TIM peripheral - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); - - if((htim->State == HAL_TIM_STATE_BUSY)) - { - return HAL_BUSY; - } - else if((htim->State == HAL_TIM_STATE_READY)) - { - if(((uint32_t)pData == 0 ) && (Length > 0)) - { - return HAL_ERROR; - } - else - { - htim->State = HAL_TIM_STATE_BUSY; - } - } - switch (Channel) - { - case TIM_CHANNEL_1: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length); - - /* Enable the TIM Output Compare DMA request */ - __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); - } - break; - - case TIM_CHANNEL_2: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length); - - /* Enable the TIM Output Compare DMA request */ - __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2); - } - break; - - case TIM_CHANNEL_3: -{ - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,Length); - - /* Enable the TIM Output Compare DMA request */ - __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3); - } - break; - - case TIM_CHANNEL_4: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMADelayPulseCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance->CCR4, Length); - - /* Enable the TIM Output Compare DMA request */ - __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4); - } - break; - - default: - break; - } - - /* Enable the Capture compare channel N */ - TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); - - /* Enable the Main Ouput */ - __HAL_TIM_MOE_ENABLE(htim); - - /* Enable the Peripheral */ - __HAL_TIM_ENABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the TIM Output Compare signal generation in DMA mode - * on the complementary output. - * @param htim : TIM Output Compare handle - * @param Channel : TIM Channel to be disabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); - - switch (Channel) - { - case TIM_CHANNEL_1: - { - /* Disable the TIM Output Compare DMA request */ - __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); - } - break; - - case TIM_CHANNEL_2: - { - /* Disable the TIM Output Compare DMA request */ - __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2); - } - break; - - case TIM_CHANNEL_3: - { - /* Disable the TIM Output Compare DMA request */ - __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3); - } - break; - - case TIM_CHANNEL_4: - { - /* Disable the TIM Output Compare interrupt */ - __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4); - } - break; - - default: - break; - } - - /* Disable the Capture compare channel N */ - TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); - - /* Disable the Main Ouput */ - __HAL_TIM_MOE_DISABLE(htim); - - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Change the htim state */ - htim->State = HAL_TIM_STATE_READY; - - /* Return function status */ - return HAL_OK; -} - -/** - * @} - */ - -/** @defgroup TIMEx_Exported_Functions_Group3 Extended Timer Complementary PWM functions - * @brief Timer Complementary PWM functions - * -@verbatim - ============================================================================== - ##### Timer Complementary PWM functions ##### - ============================================================================== - [..] - This section provides functions allowing to: - (+) Start the Complementary PWM. - (+) Stop the Complementary PWM. - (+) Start the Complementary PWM and enable interrupts. - (+) Stop the Complementary PWM and disable interrupts. - (+) Start the Complementary PWM and enable DMA transfers. - (+) Stop the Complementary PWM and disable DMA transfers. - (+) Start the Complementary Input Capture measurement. - (+) Stop the Complementary Input Capture. - (+) Start the Complementary Input Capture and enable interrupts. - (+) Stop the Complementary Input Capture and disable interrupts. - (+) Start the Complementary Input Capture and enable DMA transfers. - (+) Stop the Complementary Input Capture and disable DMA transfers. - (+) Start the Complementary One Pulse generation. - (+) Stop the Complementary One Pulse. - (+) Start the Complementary One Pulse and enable interrupts. - (+) Stop the Complementary One Pulse and disable interrupts. - -@endverbatim - * @{ - */ - -/** - * @brief Starts the PWM signal generation on the complementary output. - * @param htim : TIM handle - * @param Channel : TIM Channel to be enabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); - - /* Enable the complementary PWM output */ - TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); - - /* Enable the Main Ouput */ - __HAL_TIM_MOE_ENABLE(htim); - - /* Enable the Peripheral */ - __HAL_TIM_ENABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the PWM signal generation on the complementary output. - * @param htim : TIM handle - * @param Channel : TIM Channel to be disabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); - - /* Disable the complementary PWM output */ - TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); - - /* Disable the Main Ouput */ - __HAL_TIM_MOE_DISABLE(htim); - - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Starts the PWM signal generation in interrupt mode on the - * complementary output. - * @param htim : TIM handle - * @param Channel : TIM Channel to be disabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); - - switch (Channel) - { - case TIM_CHANNEL_1: - { - /* Enable the TIM Capture/Compare 1 interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); - } - break; - - case TIM_CHANNEL_2: - { - /* Enable the TIM Capture/Compare 2 interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); - } - break; - - case TIM_CHANNEL_3: - { - /* Enable the TIM Capture/Compare 3 interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3); - } - break; - - case TIM_CHANNEL_4: - { - /* Enable the TIM Capture/Compare 4 interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4); - } - break; - - default: - break; - } - - /* Enable the TIM Break interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK); - - /* Enable the complementary PWM output */ - TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); - - /* Enable the Main Ouput */ - __HAL_TIM_MOE_ENABLE(htim); - - /* Enable the Peripheral */ - __HAL_TIM_ENABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the PWM signal generation in interrupt mode on the - * complementary output. - * @param htim : TIM handle - * @param Channel : TIM Channel to be disabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT (TIM_HandleTypeDef *htim, uint32_t Channel) -{ - uint32_t tmpccer = 0; - - /* Check the parameters */ - assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); - - switch (Channel) - { - case TIM_CHANNEL_1: - { - /* Disable the TIM Capture/Compare 1 interrupt */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); - } - break; - - case TIM_CHANNEL_2: - { - /* Disable the TIM Capture/Compare 2 interrupt */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); - } - break; - - case TIM_CHANNEL_3: - { - /* Disable the TIM Capture/Compare 3 interrupt */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3); - } - break; - - case TIM_CHANNEL_4: - { - /* Disable the TIM Capture/Compare 3 interrupt */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4); - } - break; - - default: - break; - } - - /* Disable the complementary PWM output */ - TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); - - - /* Disable the TIM Break interrupt (only if no more channel is active) */ - tmpccer = htim->Instance->CCER; - if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == RESET) - { - __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK); - } - - /* Disable the Main Ouput */ - __HAL_TIM_MOE_DISABLE(htim); - - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Starts the TIM PWM signal generation in DMA mode on the - * complementary output - * @param htim : TIM handle - * @param Channel : TIM Channel to be enabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @param pData: The source Buffer address. - * @param Length: The length of data to be transferred from memory to TIM peripheral - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); - - if((htim->State == HAL_TIM_STATE_BUSY)) - { - return HAL_BUSY; - } - else if((htim->State == HAL_TIM_STATE_READY)) - { - if(((uint32_t)pData == 0 ) && (Length > 0)) - { - return HAL_ERROR; - } - else - { - htim->State = HAL_TIM_STATE_BUSY; - } - } - switch (Channel) - { - case TIM_CHANNEL_1: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length); - - /* Enable the TIM Capture/Compare 1 DMA request */ - __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); - } - break; - - case TIM_CHANNEL_2: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length); - - /* Enable the TIM Capture/Compare 2 DMA request */ - __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2); - } - break; - - case TIM_CHANNEL_3: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,Length); - - /* Enable the TIM Capture/Compare 3 DMA request */ - __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3); - } - break; - - case TIM_CHANNEL_4: - { - /* Set the DMA Period elapsed callback */ - htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMADelayPulseCplt; - - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ; - - /* Enable the DMA channel */ - HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance->CCR4, Length); - - /* Enable the TIM Capture/Compare 4 DMA request */ - __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4); - } - break; - - default: - break; - } - - /* Enable the complementary PWM output */ - TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); - - /* Enable the Main Ouput */ - __HAL_TIM_MOE_ENABLE(htim); - - /* Enable the Peripheral */ - __HAL_TIM_ENABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the TIM PWM signal generation in DMA mode on the complementary - * output - * @param htim : TIM handle - * @param Channel : TIM Channel to be disabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); - - switch (Channel) - { - case TIM_CHANNEL_1: - { - /* Disable the TIM Capture/Compare 1 DMA request */ - __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); - } - break; - - case TIM_CHANNEL_2: - { - /* Disable the TIM Capture/Compare 2 DMA request */ - __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2); - } - break; - - case TIM_CHANNEL_3: - { - /* Disable the TIM Capture/Compare 3 DMA request */ - __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3); - } - break; - - case TIM_CHANNEL_4: - { - /* Disable the TIM Capture/Compare 4 DMA request */ - __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4); - } - break; - - default: - break; - } - - /* Disable the complementary PWM output */ - TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); - - /* Disable the Main Ouput */ - __HAL_TIM_MOE_DISABLE(htim); - - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Change the htim state */ - htim->State = HAL_TIM_STATE_READY; - - /* Return function status */ - return HAL_OK; -} - -/** - * @} - */ - -/** @defgroup TIMEx_Exported_Functions_Group4 Extended Timer Complementary One Pulse functions - * @brief Timer Complementary One Pulse functions - * -@verbatim - ============================================================================== - ##### Timer Complementary One Pulse functions ##### - ============================================================================== - [..] - This section provides functions allowing to: - (+) Start the Complementary One Pulse generation. - (+) Stop the Complementary One Pulse. - (+) Start the Complementary One Pulse and enable interrupts. - (+) Stop the Complementary One Pulse and disable interrupts. - -@endverbatim - * @{ - */ - -/** - * @brief Starts the TIM One Pulse signal generation on the complementary - * output. - * @param htim : TIM One Pulse handle - * @param OutputChannel : TIM Channel to be enabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel) - { - /* Check the parameters */ - assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel)); - - /* Enable the complementary One Pulse output */ - TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE); - - /* Enable the Main Ouput */ - __HAL_TIM_MOE_ENABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the TIM One Pulse signal generation on the complementary - * output. - * @param htim : TIM One Pulse handle - * @param OutputChannel : TIM Channel to be disabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel) -{ - - /* Check the parameters */ - assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel)); - - /* Disable the complementary One Pulse output */ - TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE); - - /* Disable the Main Ouput */ - __HAL_TIM_MOE_DISABLE(htim); - - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Starts the TIM One Pulse signal generation in interrupt mode on the - * complementary channel. - * @param htim : TIM One Pulse handle - * @param OutputChannel : TIM Channel to be enabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel)); - - /* Enable the TIM Capture/Compare 1 interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); - - /* Enable the TIM Capture/Compare 2 interrupt */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); - - /* Enable the complementary One Pulse output */ - TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE); - - /* Enable the Main Ouput */ - __HAL_TIM_MOE_ENABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stops the TIM One Pulse signal generation in interrupt mode on the - * complementary channel. - * @param htim : TIM One Pulse handle - * @param OutputChannel : TIM Channel to be disabled - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel)); - - /* Disable the TIM Capture/Compare 1 interrupt */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); - - /* Disable the TIM Capture/Compare 2 interrupt */ - __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); - - /* Disable the complementary One Pulse output */ - TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE); - - /* Disable the Main Ouput */ - __HAL_TIM_MOE_DISABLE(htim); - - /* Disable the Peripheral */ - __HAL_TIM_DISABLE(htim); - - /* Return function status */ - return HAL_OK; -} - -/** - * @} - */ - -/** @defgroup TIMEx_Exported_Functions_Group5 Extended Peripheral Control functions - * @brief Peripheral Control functions - * -@verbatim - ============================================================================== - ##### Peripheral Control functions ##### - ============================================================================== - [..] - This section provides functions allowing to: - (+) Configure the commutation event in case of use of the Hall sensor interface. - (+) Configure Output channels for OC and PWM mode. - - (+) Configure Complementary channels, break features and dead time. - (+) Configure Master synchronization. - (+) Configure timer remapping capabilities. - (+) Enable or disable channel grouping - -@endverbatim - * @{ - */ - -/** - * @brief Configure the TIM commutation event sequence. - * @note This function is mandatory to use the commutation event in order to - * update the configuration at each commutation detection on the TRGI input of the Timer, - * the typical use of this feature is with the use of another Timer(interface Timer) - * configured in Hall sensor interface, this interface Timer will generate the - * commutation at its TRGO output (connected to Timer used in this function) each time - * the TI1 of the Interface Timer detect a commutation at its input TI1. - * @param htim: TIM handle - * @param InputTrigger : the Internal trigger corresponding to the Timer Interfacing with the Hall sensor - * This parameter can be one of the following values: - * @arg TIM_TS_ITR0: Internal trigger 0 selected - * @arg TIM_TS_ITR1: Internal trigger 1 selected - * @arg TIM_TS_ITR2: Internal trigger 2 selected - * @arg TIM_TS_ITR3: Internal trigger 3 selected - * @arg TIM_TS_NONE: No trigger is needed - * @param CommutationSource : the Commutation Event source - * This parameter can be one of the following values: - * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer - * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource) -{ - /* Check the parameters */ - assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance)); - assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger)); - - __HAL_LOCK(htim); - - if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) || - (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3)) - { - /* Select the Input trigger */ - htim->Instance->SMCR &= ~TIM_SMCR_TS; - htim->Instance->SMCR |= InputTrigger; - } - - /* Select the Capture Compare preload feature */ - htim->Instance->CR2 |= TIM_CR2_CCPC; - /* Select the Commutation event source */ - htim->Instance->CR2 &= ~TIM_CR2_CCUS; - htim->Instance->CR2 |= CommutationSource; - - __HAL_UNLOCK(htim); - - return HAL_OK; -} - -/** - * @brief Configure the TIM commutation event sequence with interrupt. - * @note This function is mandatory to use the commutation event in order to - * update the configuration at each commutation detection on the TRGI input of the Timer, - * the typical use of this feature is with the use of another Timer(interface Timer) - * configured in Hall sensor interface, this interface Timer will generate the - * commutation at its TRGO output (connected to Timer used in this function) each time - * the TI1 of the Interface Timer detect a commutation at its input TI1. - * @param htim: TIM handle - * @param InputTrigger : the Internal trigger corresponding to the Timer Interfacing with the Hall sensor - * This parameter can be one of the following values: - * @arg TIM_TS_ITR0: Internal trigger 0 selected - * @arg TIM_TS_ITR1: Internal trigger 1 selected - * @arg TIM_TS_ITR2: Internal trigger 2 selected - * @arg TIM_TS_ITR3: Internal trigger 3 selected - * @arg TIM_TS_NONE: No trigger is needed - * @param CommutationSource : the Commutation Event source - * This parameter can be one of the following values: - * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer - * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_IT(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource) -{ - /* Check the parameters */ - assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance)); - assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger)); - - __HAL_LOCK(htim); - - if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) || - (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3)) - { - /* Select the Input trigger */ - htim->Instance->SMCR &= ~TIM_SMCR_TS; - htim->Instance->SMCR |= InputTrigger; - } - - /* Select the Capture Compare preload feature */ - htim->Instance->CR2 |= TIM_CR2_CCPC; - /* Select the Commutation event source */ - htim->Instance->CR2 &= ~TIM_CR2_CCUS; - htim->Instance->CR2 |= CommutationSource; - - /* Enable the Commutation Interrupt Request */ - __HAL_TIM_ENABLE_IT(htim, TIM_IT_COM); - - __HAL_UNLOCK(htim); - - return HAL_OK; -} - -/** - * @brief Configure the TIM commutation event sequence with DMA. - * @note This function is mandatory to use the commutation event in order to - * update the configuration at each commutation detection on the TRGI input of the Timer, - * the typical use of this feature is with the use of another Timer(interface Timer) - * configured in Hall sensor interface, this interface Timer will generate the - * commutation at its TRGO output (connected to Timer used in this function) each time - * the TI1 of the Interface Timer detect a commutation at its input TI1. - * @note The user should configure the DMA in his own software, in This function only the COMDE bit is set - * @param htim: TIM handle - * @param InputTrigger : the Internal trigger corresponding to the Timer Interfacing with the Hall sensor - * This parameter can be one of the following values: - * @arg TIM_TS_ITR0: Internal trigger 0 selected - * @arg TIM_TS_ITR1: Internal trigger 1 selected - * @arg TIM_TS_ITR2: Internal trigger 2 selected - * @arg TIM_TS_ITR3: Internal trigger 3 selected - * @arg TIM_TS_NONE: No trigger is needed - * @param CommutationSource : the Commutation Event source - * This parameter can be one of the following values: - * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer - * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_DMA(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource) -{ - /* Check the parameters */ - assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance)); - assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger)); - - __HAL_LOCK(htim); - - if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) || - (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3)) - { - /* Select the Input trigger */ - htim->Instance->SMCR &= ~TIM_SMCR_TS; - htim->Instance->SMCR |= InputTrigger; - } - - /* Select the Capture Compare preload feature */ - htim->Instance->CR2 |= TIM_CR2_CCPC; - /* Select the Commutation event source */ - htim->Instance->CR2 &= ~TIM_CR2_CCUS; - htim->Instance->CR2 |= CommutationSource; - - /* Enable the Commutation DMA Request */ - /* Set the DMA Commutation Callback */ - htim->hdma[TIM_DMA_ID_COMMUTATION]->XferCpltCallback = TIMEx_DMACommutationCplt; - /* Set the DMA error callback */ - htim->hdma[TIM_DMA_ID_COMMUTATION]->XferErrorCallback = TIM_DMAError; - - /* Enable the Commutation DMA Request */ - __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_COM); - - __HAL_UNLOCK(htim); - - return HAL_OK; -} - -/** - * @brief Initializes the TIM Output Compare Channels according to the specified - * parameters in the TIM_OC_InitTypeDef. - * @param htim: TIM Output Compare handle - * @param sConfig: TIM Output Compare configuration structure - * @param Channel : TIM Channels to configure - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @arg TIM_CHANNEL_5: TIM Channel 5 selected - * @arg TIM_CHANNEL_6: TIM Channel 6 selected - * @arg TIM_CHANNEL_ALL: all output channels supported by the timer instance selected - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_OC_ConfigChannel(TIM_HandleTypeDef *htim, - TIM_OC_InitTypeDef* sConfig, - uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CHANNELS(Channel)); - assert_param(IS_TIM_OC_MODE(sConfig->OCMode)); - assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity)); - assert_param(IS_TIM_OCN_POLARITY(sConfig->OCNPolarity)); - assert_param(IS_TIM_OCNIDLE_STATE(sConfig->OCNIdleState)); - assert_param(IS_TIM_OCIDLE_STATE(sConfig->OCIdleState)); - - /* Check input state */ - __HAL_LOCK(htim); - - htim->State = HAL_TIM_STATE_BUSY; - - switch (Channel) - { - case TIM_CHANNEL_1: - { - /* Check the parameters */ - assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); - - /* Configure the TIM Channel 1 in Output Compare */ - TIM_OC1_SetConfig(htim->Instance, sConfig); - } - break; - - case TIM_CHANNEL_2: - { - /* Check the parameters */ - assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); - - /* Configure the TIM Channel 2 in Output Compare */ - TIM_OC2_SetConfig(htim->Instance, sConfig); - } - break; - - case TIM_CHANNEL_3: - { - /* Check the parameters */ - assert_param(IS_TIM_CC3_INSTANCE(htim->Instance)); - - /* Configure the TIM Channel 3 in Output Compare */ - TIM_OC3_SetConfig(htim->Instance, sConfig); - } - break; - - case TIM_CHANNEL_4: - { - /* Check the parameters */ - assert_param(IS_TIM_CC4_INSTANCE(htim->Instance)); - - /* Configure the TIM Channel 4 in Output Compare */ - TIM_OC4_SetConfig(htim->Instance, sConfig); - } - break; - - case TIM_CHANNEL_5: - { - /* Check the parameters */ - assert_param(IS_TIM_CC5_INSTANCE(htim->Instance)); - - /* Configure the TIM Channel 5 in Output Compare */ - TIM_OC5_SetConfig(htim->Instance, sConfig); - } - break; - - case TIM_CHANNEL_6: - { - /* Check the parameters */ - assert_param(IS_TIM_CC6_INSTANCE(htim->Instance)); - - /* Configure the TIM Channel 6 in Output Compare */ - TIM_OC6_SetConfig(htim->Instance, sConfig); - } - break; - - default: - break; - } - - htim->State = HAL_TIM_STATE_READY; - - __HAL_UNLOCK(htim); - - return HAL_OK; -} - -/** - * @brief Initializes the TIM PWM channels according to the specified - * parameters in the TIM_OC_InitTypeDef. - * @param htim: TIM PWM handle - * @param sConfig: TIM PWM configuration structure - * @param Channel : TIM Channels to be configured - * This parameter can be one of the following values: - * @arg TIM_CHANNEL_1: TIM Channel 1 selected - * @arg TIM_CHANNEL_2: TIM Channel 2 selected - * @arg TIM_CHANNEL_3: TIM Channel 3 selected - * @arg TIM_CHANNEL_4: TIM Channel 4 selected - * @arg TIM_CHANNEL_5: TIM Channel 5 selected - * @arg TIM_CHANNEL_6: TIM Channel 6 selected - * @arg TIM_CHANNEL_ALL: all PWM channels supported by the timer instance selected - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIM_PWM_ConfigChannel(TIM_HandleTypeDef *htim, - TIM_OC_InitTypeDef* sConfig, - uint32_t Channel) -{ - /* Check the parameters */ - assert_param(IS_TIM_CHANNELS(Channel)); - assert_param(IS_TIM_PWM_MODE(sConfig->OCMode)); - assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity)); - assert_param(IS_TIM_OCN_POLARITY(sConfig->OCNPolarity)); - assert_param(IS_TIM_FAST_STATE(sConfig->OCFastMode)); - assert_param(IS_TIM_OCNIDLE_STATE(sConfig->OCNIdleState)); - assert_param(IS_TIM_OCIDLE_STATE(sConfig->OCIdleState)); - - /* Check input state */ - __HAL_LOCK(htim); - - htim->State = HAL_TIM_STATE_BUSY; - - switch (Channel) - { - case TIM_CHANNEL_1: - { - /* Check the parameters */ - assert_param(IS_TIM_CC1_INSTANCE(htim->Instance)); - - /* Configure the Channel 1 in PWM mode */ - TIM_OC1_SetConfig(htim->Instance, sConfig); - - /* Set the Preload enable bit for channel1 */ - htim->Instance->CCMR1 |= TIM_CCMR1_OC1PE; - - /* Configure the Output Fast mode */ - htim->Instance->CCMR1 &= ~TIM_CCMR1_OC1FE; - htim->Instance->CCMR1 |= sConfig->OCFastMode; - } - break; - - case TIM_CHANNEL_2: - { - /* Check the parameters */ - assert_param(IS_TIM_CC2_INSTANCE(htim->Instance)); - - /* Configure the Channel 2 in PWM mode */ - TIM_OC2_SetConfig(htim->Instance, sConfig); - - /* Set the Preload enable bit for channel2 */ - htim->Instance->CCMR1 |= TIM_CCMR1_OC2PE; - - /* Configure the Output Fast mode */ - htim->Instance->CCMR1 &= ~TIM_CCMR1_OC2FE; - htim->Instance->CCMR1 |= sConfig->OCFastMode << 8; - } - break; - - case TIM_CHANNEL_3: - { - /* Check the parameters */ - assert_param(IS_TIM_CC3_INSTANCE(htim->Instance)); - - /* Configure the Channel 3 in PWM mode */ - TIM_OC3_SetConfig(htim->Instance, sConfig); - - /* Set the Preload enable bit for channel3 */ - htim->Instance->CCMR2 |= TIM_CCMR2_OC3PE; - - /* Configure the Output Fast mode */ - htim->Instance->CCMR2 &= ~TIM_CCMR2_OC3FE; - htim->Instance->CCMR2 |= sConfig->OCFastMode; - } - break; - - case TIM_CHANNEL_4: - { - /* Check the parameters */ - assert_param(IS_TIM_CC4_INSTANCE(htim->Instance)); - - /* Configure the Channel 4 in PWM mode */ - TIM_OC4_SetConfig(htim->Instance, sConfig); - - /* Set the Preload enable bit for channel4 */ - htim->Instance->CCMR2 |= TIM_CCMR2_OC4PE; - - /* Configure the Output Fast mode */ - htim->Instance->CCMR2 &= ~TIM_CCMR2_OC4FE; - htim->Instance->CCMR2 |= sConfig->OCFastMode << 8; - } - break; - - case TIM_CHANNEL_5: - { - /* Check the parameters */ - assert_param(IS_TIM_CC5_INSTANCE(htim->Instance)); - - /* Configure the Channel 5 in PWM mode */ - TIM_OC5_SetConfig(htim->Instance, sConfig); - - /* Set the Preload enable bit for channel5*/ - htim->Instance->CCMR3 |= TIM_CCMR3_OC5PE; - - /* Configure the Output Fast mode */ - htim->Instance->CCMR3 &= ~TIM_CCMR3_OC5FE; - htim->Instance->CCMR3 |= sConfig->OCFastMode; - } - break; - - case TIM_CHANNEL_6: - { - /* Check the parameters */ - assert_param(IS_TIM_CC6_INSTANCE(htim->Instance)); - - /* Configure the Channel 5 in PWM mode */ - TIM_OC6_SetConfig(htim->Instance, sConfig); - - /* Set the Preload enable bit for channel6 */ - htim->Instance->CCMR3 |= TIM_CCMR3_OC6PE; - - /* Configure the Output Fast mode */ - htim->Instance->CCMR3 &= ~TIM_CCMR3_OC6FE; - htim->Instance->CCMR3 |= sConfig->OCFastMode << 8; - } - break; - - default: - break; - } - - htim->State = HAL_TIM_STATE_READY; - - __HAL_UNLOCK(htim); - - return HAL_OK; -} - -/** - * @brief Configures the OCRef clear feature - * @param htim: TIM handle - * @param sClearInputConfig: pointer to a TIM_ClearInputConfigTypeDef structure that - * contains the OCREF clear feature and parameters for the TIM peripheral. - * @param Channel: specifies the TIM Channel - * This parameter can be one of the following values: - * @arg TIM_Channel_1: TIM Channel 1 - * @arg TIM_Channel_2: TIM Channel 2 - * @arg TIM_Channel_3: TIM Channel 3 - * @arg TIM_Channel_4: TIM Channel 4 - * @arg TIM_Channel_5: TIM Channel 5 - * @arg TIM_Channel_6: TIM Channel 6 - * @retval None - */ -HAL_StatusTypeDef HAL_TIM_ConfigOCrefClear(TIM_HandleTypeDef *htim, - TIM_ClearInputConfigTypeDef *sClearInputConfig, - uint32_t Channel) -{ - uint32_t tmpsmcr = 0; - - /* Check the parameters */ - assert_param(IS_TIM_OCXREF_CLEAR_INSTANCE(htim->Instance)); - assert_param(IS_TIM_CLEARINPUT_SOURCE(sClearInputConfig->ClearInputSource)); - - /* Check input state */ - __HAL_LOCK(htim); - - switch (sClearInputConfig->ClearInputSource) - { - case TIM_CLEARINPUTSOURCE_NONE: - { - /* Get the TIMx SMCR register value */ - tmpsmcr = htim->Instance->SMCR; - - /* Clear the OCREF clear selection bit */ - tmpsmcr &= ~TIM_SMCR_OCCS; - - /* Clear the ETR Bits */ - tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP); - - /* Set TIMx_SMCR */ - htim->Instance->SMCR = tmpsmcr; - } - break; - - case TIM_CLEARINPUTSOURCE_OCREFCLR: - { - /* Clear the OCREF clear selection bit */ - htim->Instance->SMCR &= ~TIM_SMCR_OCCS; - } - break; - - case TIM_CLEARINPUTSOURCE_ETR: - { - /* Check the parameters */ - assert_param(IS_TIM_CLEARINPUT_POLARITY(sClearInputConfig->ClearInputPolarity)); - assert_param(IS_TIM_CLEARINPUT_PRESCALER(sClearInputConfig->ClearInputPrescaler)); - assert_param(IS_TIM_CLEARINPUT_FILTER(sClearInputConfig->ClearInputFilter)); - - TIM_ETR_SetConfig(htim->Instance, - sClearInputConfig->ClearInputPrescaler, - sClearInputConfig->ClearInputPolarity, - sClearInputConfig->ClearInputFilter); - - /* Set the OCREF clear selection bit */ - htim->Instance->SMCR |= TIM_SMCR_OCCS; - } - break; - - default: - break; - } - - switch (Channel) - { - case TIM_CHANNEL_1: - { - if(sClearInputConfig->ClearInputState != RESET) - { - /* Enable the OCREF clear feature for Channel 1 */ - htim->Instance->CCMR1 |= TIM_CCMR1_OC1CE; - } - else - { - /* Disable the OCREF clear feature for Channel 1 */ - htim->Instance->CCMR1 &= ~TIM_CCMR1_OC1CE; - } - } - break; - case TIM_CHANNEL_2: - { - if(sClearInputConfig->ClearInputState != RESET) - { - /* Enable the OCREF clear feature for Channel 2 */ - htim->Instance->CCMR1 |= TIM_CCMR1_OC2CE; - } - else - { - /* Disable the OCREF clear feature for Channel 2 */ - htim->Instance->CCMR1 &= ~TIM_CCMR1_OC2CE; - } - } - break; - case TIM_CHANNEL_3: - { - if(sClearInputConfig->ClearInputState != RESET) - { - /* Enable the OCREF clear feature for Channel 3 */ - htim->Instance->CCMR2 |= TIM_CCMR2_OC3CE; - } - else - { - /* Disable the OCREF clear feature for Channel 3 */ - htim->Instance->CCMR2 &= ~TIM_CCMR2_OC3CE; - } - } - break; - case TIM_CHANNEL_4: - { - if(sClearInputConfig->ClearInputState != RESET) - { - /* Enable the OCREF clear feature for Channel 4 */ - htim->Instance->CCMR2 |= TIM_CCMR2_OC4CE; - } - else - { - /* Disable the OCREF clear feature for Channel 4 */ - htim->Instance->CCMR2 &= ~TIM_CCMR2_OC4CE; - } - } - break; - case TIM_CHANNEL_5: - { - if(sClearInputConfig->ClearInputState != RESET) - { - /* Enable the OCREF clear feature for Channel 1 */ - htim->Instance->CCMR3 |= TIM_CCMR3_OC5CE; - } - else - { - /* Disable the OCREF clear feature for Channel 1 */ - htim->Instance->CCMR3 &= ~TIM_CCMR3_OC5CE; - } - } - break; - case TIM_CHANNEL_6: - { - if(sClearInputConfig->ClearInputState != RESET) - { - /* Enable the OCREF clear feature for Channel 1 */ - htim->Instance->CCMR3 |= TIM_CCMR3_OC6CE; - } - else - { - /* Disable the OCREF clear feature for Channel 1 */ - htim->Instance->CCMR3 &= ~TIM_CCMR3_OC6CE; - } - } - break; - default: - break; - } - - __HAL_UNLOCK(htim); - - return HAL_OK; -} - -/** - * @brief Configures the TIM in master mode. - * @param htim: TIM handle. - * @param sMasterConfig: pointer to a TIM_MasterConfigTypeDef structure that - * contains the selected trigger output (TRGO) and the Master/Slave - * mode. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, - TIM_MasterConfigTypeDef * sMasterConfig) -{ - uint32_t tmpcr2; - uint32_t tmpsmcr; - - /* Check the parameters */ - assert_param(IS_TIM_SYNCHRO_INSTANCE(htim->Instance)); - assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger)); - assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode)); - - /* Check input state */ - __HAL_LOCK(htim); - - /* Get the TIMx CR2 register value */ - tmpcr2 = htim->Instance->CR2; - - /* Get the TIMx SMCR register value */ - tmpsmcr = htim->Instance->SMCR; - - /* If the timer supports ADC synchronization through TRGO2, set the master mode selection 2 */ - if (IS_TIM_TRGO2_INSTANCE(htim->Instance)) - { - /* Check the parameters */ - assert_param(IS_TIM_TRGO2_SOURCE(sMasterConfig->MasterOutputTrigger2)); - - /* Clear the MMS2 bits */ - tmpcr2 &= ~TIM_CR2_MMS2; - /* Select the TRGO2 source*/ - tmpcr2 |= sMasterConfig->MasterOutputTrigger2; - } - - /* Reset the MMS Bits */ - tmpcr2 &= ~TIM_CR2_MMS; - /* Select the TRGO source */ - tmpcr2 |= sMasterConfig->MasterOutputTrigger; - - /* Reset the MSM Bit */ - tmpsmcr &= ~TIM_SMCR_MSM; - /* Set master mode */ - tmpsmcr |= sMasterConfig->MasterSlaveMode; - - /* Update TIMx CR2 */ - htim->Instance->CR2 = tmpcr2; - - /* Update TIMx SMCR */ - htim->Instance->SMCR = tmpsmcr; - - __HAL_UNLOCK(htim); - - return HAL_OK; -} - -/** - * @brief Configures the Break feature, dead time, Lock level, OSSI/OSSR State - * and the AOE(automatic output enable). - * @param htim: TIM handle - * @param sBreakDeadTimeConfig: pointer to a TIM_ConfigBreakDeadConfigTypeDef structure that - * contains the BDTR Register configuration information for the TIM peripheral. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim, - TIM_BreakDeadTimeConfigTypeDef * sBreakDeadTimeConfig) -{ - uint32_t tmpbdtr = 0; - - /* Check the parameters */ - assert_param(IS_TIM_BREAK_INSTANCE(htim->Instance)); - assert_param(IS_TIM_OSSR_STATE(sBreakDeadTimeConfig->OffStateRunMode)); - assert_param(IS_TIM_OSSI_STATE(sBreakDeadTimeConfig->OffStateIDLEMode)); - assert_param(IS_TIM_LOCK_LEVEL(sBreakDeadTimeConfig->LockLevel)); - assert_param(IS_TIM_DEADTIME(sBreakDeadTimeConfig->DeadTime)); - assert_param(IS_TIM_BREAK_STATE(sBreakDeadTimeConfig->BreakState)); - assert_param(IS_TIM_BREAK_POLARITY(sBreakDeadTimeConfig->BreakPolarity)); - assert_param(IS_TIM_BREAK_FILTER(sBreakDeadTimeConfig->BreakFilter)); - assert_param(IS_TIM_AUTOMATIC_OUTPUT_STATE(sBreakDeadTimeConfig->AutomaticOutput)); - - /* Check input state */ - __HAL_LOCK(htim); - - /* Set the Lock level, the Break enable Bit and the Polarity, the OSSR State, - the OSSI State, the dead time value and the Automatic Output Enable Bit */ - if (IS_TIM_BKIN2_INSTANCE(htim->Instance)) - { - assert_param(IS_TIM_BREAK2_STATE(sBreakDeadTimeConfig->Break2State)); - assert_param(IS_TIM_BREAK2_POLARITY(sBreakDeadTimeConfig->Break2Polarity)); - assert_param(IS_TIM_BREAK_FILTER(sBreakDeadTimeConfig->Break2Filter)); - - /* Clear the BDTR bits */ - tmpbdtr &= ~(TIM_BDTR_DTG | TIM_BDTR_LOCK | TIM_BDTR_OSSI | - TIM_BDTR_OSSR | TIM_BDTR_BKE | TIM_BDTR_BKP | - TIM_BDTR_AOE | TIM_BDTR_MOE | TIM_BDTR_BKF | - TIM_BDTR_BK2F | TIM_BDTR_BK2E | TIM_BDTR_BK2P); - - /* Set the BDTR bits */ - tmpbdtr |= sBreakDeadTimeConfig->DeadTime; - tmpbdtr |= sBreakDeadTimeConfig->LockLevel; - tmpbdtr |= sBreakDeadTimeConfig->OffStateIDLEMode; - tmpbdtr |= sBreakDeadTimeConfig->OffStateRunMode; - tmpbdtr |= sBreakDeadTimeConfig->BreakState; - tmpbdtr |= sBreakDeadTimeConfig->BreakPolarity; - tmpbdtr |= sBreakDeadTimeConfig->AutomaticOutput; - tmpbdtr |= (sBreakDeadTimeConfig->BreakFilter << BDTR_BKF_SHIFT); - tmpbdtr |= (sBreakDeadTimeConfig->Break2Filter << BDTR_BK2F_SHIFT); - tmpbdtr |= sBreakDeadTimeConfig->Break2State; - tmpbdtr |= sBreakDeadTimeConfig->Break2Polarity; - } - else - { - /* Clear the BDTR bits */ - tmpbdtr &= ~(TIM_BDTR_DTG | TIM_BDTR_LOCK | TIM_BDTR_OSSI | - TIM_BDTR_OSSR | TIM_BDTR_BKE | TIM_BDTR_BKP | - TIM_BDTR_AOE | TIM_BDTR_MOE | TIM_BDTR_BKF); - - /* Set the BDTR bits */ - tmpbdtr |= sBreakDeadTimeConfig->DeadTime; - tmpbdtr |= sBreakDeadTimeConfig->LockLevel; - tmpbdtr |= sBreakDeadTimeConfig->OffStateIDLEMode; - tmpbdtr |= sBreakDeadTimeConfig->OffStateRunMode; - tmpbdtr |= sBreakDeadTimeConfig->BreakState; - tmpbdtr |= sBreakDeadTimeConfig->BreakPolarity; - tmpbdtr |= sBreakDeadTimeConfig->AutomaticOutput; - tmpbdtr |= (sBreakDeadTimeConfig->BreakFilter << BDTR_BKF_SHIFT); - } - - /* Set TIMx_BDTR */ - htim->Instance->BDTR = tmpbdtr; - - __HAL_UNLOCK(htim); - - return HAL_OK; -} - -/** - * @brief Configures the break input source. - * @param htim: TIM handle. - * @param BreakInput: Break input to configure - * This parameter can be one of the following values: - * @arg TIM_BREAKINPUT_BRK: Timer break input - * @arg TIM_BREAKINPUT_BRK2: Timer break 2 input - * @param sBreakInputConfig: Break input source configuration - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_ConfigBreakInput(TIM_HandleTypeDef *htim, - uint32_t BreakInput, - TIMEx_BreakInputConfigTypeDef *sBreakInputConfig) - -{ - uint32_t tmporx = 0; - uint32_t bkin_enable_mask = 0; - uint32_t bkin_polarity_mask = 0; - uint32_t bkin_enable_bitpos = 0; - uint32_t bkin_polarity_bitpos = 0; - - /* Check the parameters */ - assert_param(IS_TIM_BREAK_INSTANCE(htim->Instance)); - assert_param(IS_TIM_BREAKINPUT(BreakInput)); - assert_param(IS_TIM_BREAKINPUTSOURCE(sBreakInputConfig->Source)); - assert_param(IS_TIM_BREAKINPUTSOURCE_STATE(sBreakInputConfig->Enable)); - if (sBreakInputConfig->Source != TIM_BREAKINPUTSOURCE_DFSDM) - { - assert_param(IS_TIM_BREAKINPUTSOURCE_POLARITY(sBreakInputConfig->Polarity)); - } - - /* Check input state */ - __HAL_LOCK(htim); - - switch(sBreakInputConfig->Source) - { - case TIM_BREAKINPUTSOURCE_BKIN: - { - bkin_enable_mask = TIM1_OR2_BKINE; - bkin_enable_bitpos = 0; - bkin_polarity_mask = TIM1_OR2_BKINP; - bkin_polarity_bitpos = 9; - } - break; - case TIM_BREAKINPUTSOURCE_COMP1: - { - bkin_enable_mask = TIM1_OR2_BKCMP1E; - bkin_enable_bitpos = 1; - bkin_polarity_mask = TIM1_OR2_BKCMP1P; - bkin_polarity_bitpos = 10; - } - break; - case TIM_BREAKINPUTSOURCE_COMP2: - { - bkin_enable_mask = TIM1_OR2_BKCMP2E; - bkin_enable_bitpos = 2; - bkin_polarity_mask = TIM1_OR2_BKCMP2P; - bkin_polarity_bitpos = 11; - } - break; - case TIM_BREAKINPUTSOURCE_DFSDM: - { - bkin_enable_mask = TIM1_OR2_BKDFBK0E; - bkin_enable_bitpos = 8; - } - break; - default: - break; - } - - switch(BreakInput) - { - case TIM_BREAKINPUT_BRK: - { - /* Get the TIMx_OR2 register value */ - tmporx = htim->Instance->OR2; - - /* Enable the break input */ - tmporx &= ~bkin_enable_mask; - tmporx |= (sBreakInputConfig->Enable << bkin_enable_bitpos) & bkin_enable_mask; - - /* Set the break input polarity */ - if (sBreakInputConfig->Source != TIM_BREAKINPUTSOURCE_DFSDM) - { - tmporx &= ~bkin_polarity_mask; - tmporx |= (sBreakInputConfig->Polarity << bkin_polarity_bitpos) & bkin_polarity_mask; - } - - /* Set TIMx_OR2 */ - htim->Instance->OR2 = tmporx; - } - break; - case TIM_BREAKINPUT_BRK2: - { - /* Get the TIMx_OR3 register value */ - tmporx = htim->Instance->OR3; - - /* Enable the break input */ - tmporx &= ~bkin_enable_mask; - tmporx |= (sBreakInputConfig->Enable << bkin_enable_bitpos) & bkin_enable_mask; - - /* Set the break input polarity */ - if (sBreakInputConfig->Source != TIM_BREAKINPUTSOURCE_DFSDM) - { - tmporx &= ~bkin_polarity_mask; - tmporx |= (sBreakInputConfig->Polarity << bkin_polarity_bitpos) & bkin_polarity_mask; - } - - /* Set TIMx_OR3 */ - htim->Instance->OR3 = tmporx; - } - break; - default: - break; - } - - __HAL_UNLOCK(htim); - - return HAL_OK; -} - -/** - * @brief Configures the TIMx Remapping input capabilities. - * @param htim: TIM handle. - * @param Remap: specifies the TIM remapping source. - * For TIM1, the parameter is a combination of 4 fields (field1 | field2 | field3 | field4): - * field1 can have the following values: - * @arg TIM_TIM1_ETR_ADC1_NONE: TIM1_ETR is not connected to any ADC1 AWD (analog watchdog) - * @arg TIM_TIM1_ETR_ADC1_AWD1: TIM1_ETR is connected to ADC1 AWD1 - * @arg TIM_TIM1_ETR_ADC1_AWD2: TIM1_ETR is connected to ADC1 AWD2 - * @arg TIM_TIM1_ETR_ADC1_AWD3: TIM1_ETR is connected to ADC1 AWD3 - * field2 can have the following values: - * @arg TIM_TIM1_ETR_ADC3_NONE: TIM1_ETR is not connected to any ADC3 AWD (analog watchdog) - * @arg TIM_TIM1_ETR_ADC3_AWD1: TIM1_ETR is connected to ADC3 AWD1 - * @arg TIM_TIM1_ETR_ADC3_AWD2: TIM1_ETR is connected to ADC3 AWD2 - * @arg TIM_TIM1_ETR_ADC3_AWD3: TIM1_ETR is connected to ADC3 AWD3 - * field3 can have the following values: - * @arg TIM_TIM1_TI1_GPIO: TIM1 TI1 is connected to GPIO - * @arg TIM_TIM1_TI1_COMP1: TIM1 TI1 is connected to COMP1 output - * field4 can have the following values: - * @arg TIM_TIM1_ETR_COMP1: TIM1_ETR is connected to COMP1 output - * @arg TIM_TIM1_ETR_COMP2: TIM1_ETR is connected to COMP2 output - * @note When field4 is set to TIM_TIM1_ETR_COMP1 or TIM_TIM1_ETR_COMP2 field1 and field2 values are not significant - * - * For TIM2, the parameter is a combination of 3 fields (field1 | field2 | field3): - * field1 can have the following values: - * @arg TIM_TIM2_ITR1_TIM8_TRGO: TIM2_ITR1 is connected to TIM8_TRGO - * @arg TIM_TIM2_ITR1_OTG_FS_SOF: TIM2_ITR1 is connected to OTG_FS SOF - * field2 can have the following values: - * @arg TIM_TIM2_ETR_GPIO: TIM2_ETR is connected to GPIO - * @arg TIM_TIM2_ETR_LSE: TIM2_ETR is connected to LSE - * @arg TIM_TIM2_ETR_COMP1: TIM2_ETR is connected to COMP1 output - * @arg TIM_TIM2_ETR_COMP2: TIM2_ETR is connected to COMP2 output - * field3 can have the following values: - * @arg TIM_TIM2_TI4_GPIO: TIM2 TI4 is connected to GPIO - * @arg TIM_TIM2_TI4_COMP1: TIM2 TI4 is connected to COMP1 output - * @arg TIM_TIM2_TI4_COMP2: TIM2 TI4 is connected to COMP2 output - * @arg TIM_TIM2_TI4_COMP1_COMP2: TIM2 TI4 is connected to logical OR between COMP1 and COMP2 output - * - * For TIM3, the parameter is a combination 2 fields(field1 | field2): - * field1 can have the following values: - * @arg TIM_TIM3_TI1_GPIO: TIM3 TI1 is connected to GPIO - * @arg TIM_TIM3_TI1_COMP1: TIM3 TI1 is connected to COMP1 output - * @arg TIM_TIM3_TI1_COMP2: TIM3 TI1 is connected to COMP2 output - * @arg TIM_TIM3_TI1_COMP1_COMP2: TIM3 TI1 is connected to logical OR between COMP1 and COMP2 output - * field2 can have the following values: - * @arg TIM_TIM3_ETR_GPIO: TIM3_ETR is connected to GPIO - * @arg TIM_TIM3_ETR_COMP1: TIM3_ETR is connected to COMP1 output - * - * For TIM8, the parameter is a combination of 3 fields (field1 | field2 | field3): - * field1 can have the following values: - * @arg TIM_TIM8_ETR_ADC2_NONE: TIM8_ETR is not connected to any ADC2 AWD (analog watchdog) - * @arg TIM_TIM8_ETR_ADC2_AWD1: TIM8_ETR is connected to ADC2 AWD1 - * @arg TIM_TIM8_ETR_ADC2_AWD2: TIM8_ETR is connected to ADC2 AWD2 - * @arg TIM_TIM8_ETR_ADC2_AWD3: TIM8_ETR is connected to ADC2 AWD3 - * field2 can have the following values: - * @arg TIM_TIM8_ETR_ADC3_NONE: TIM8_ETR is not connected to any ADC3 AWD (analog watchdog) - * @arg TIM_TIM8_ETR_ADC3_AWD1: TIM8_ETR is connected to ADC3 AWD1 - * @arg TIM_TIM8_ETR_ADC3_AWD2: TIM8_ETR is connected to ADC3 AWD2 - * @arg TIM_TIM8_ETR_ADC3_AWD3: TIM8_ETR is connected to ADC3 AWD3 - * field3 can have the following values: - * @arg TIM_TIM8_TI1_GPIO: TIM8 TI1 is connected to GPIO - * @arg TIM_TIM8_TI1_COMP2: TIM8 TI1 is connected to COMP2 output - * field4 can have the following values: - * @arg TIM_TIM8_ETR_COMP1: TIM8_ETR is connected to COMP1 output - * @arg TIM_TIM8_ETR_COMP2: TIM8_ETR is connected to COMP2 output - * @note When field4 is set to TIM_TIM8_ETR_COMP1 or TIM_TIM8_ETR_COMP2 field1 and field2 values are not significant - * - * For TIM15, the parameter is a combination of 3 fields (field1 | field2): - * field1 can have the following values: - * @arg TIM_TIM15_TI1_GPIO: TIM15 TI1 is connected to GPIO - * @arg TIM_TIM15_TI1_LSE: TIM15 TI1 is connected to LSE - * field2 can have the following values: - * @arg TIM_TIM15_ENCODERMODE_NONE: No redirection - * @arg TIM_TIM15_ENCODERMODE_TIM2: TIM2 IC1 and TIM2 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively - * @arg TIM_TIM15_ENCODERMODE_TIM3: TIM3 IC1 and TIM3 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively - * @arg TIM_TIM15_ENCODERMODE_TIM4: TIM4 IC1 and TIM4 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively - * - * For TIM16, the parameter can have the following values: - * @arg TIM_TIM16_TI1_GPIO: TIM16 TI1 is connected to GPIO - * @arg TIM_TIM16_TI1_LSI: TIM16 TI1 is connected to LSI - * @arg TIM_TIM16_TI1_LSE: TIM16 TI1 is connected to LSE - * @arg TIM_TIM16_TI1_RTC: TIM16 TI1 is connected to RTC wakeup interrupt - * - * For TIM17, the parameter can have the following values: - * @arg TIM_TIM17_TI1_GPIO: TIM17 TI1 is connected to GPIO - * @arg TIM_TIM17_TI1_MSI: TIM17 TI1 is connected to MSI - * @arg TIM_TIM17_TI1_HSE_32: TIM17 TI1 is connected to HSE div 32 - * @arg TIM_TIM17_TI1_MCO: TIM17 TI1 is connected to MCO - * - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap) -{ - uint32_t tmpor1 = 0; - uint32_t tmpor2 = 0; - - __HAL_LOCK(htim); - - /* Check parameters */ - assert_param(IS_TIM_REMAP_INSTANCE(htim->Instance)); - assert_param(IS_TIM_REMAP(Remap)); - - /* Set ETR_SEL bit field (if required) */ - if (IS_TIM_ETRSEL_INSTANCE(htim->Instance)) - { - tmpor2 = htim->Instance->OR2; - tmpor2 &= ~TIMx_ETRSEL_MASK; - tmpor2 |= (Remap & TIMx_ETRSEL_MASK); - - /* Set TIMx_OR2 */ - htim->Instance->OR2 = tmpor2; - } - - /* Set other remapping capabilities */ - tmpor1 = Remap; - tmpor1 &= ~TIMx_ETRSEL_MASK; - - /* Set TIMx_OR1 */ - htim->Instance->OR1 = Remap; - - /* Set TIMx_OR1 */ - htim->Instance->OR1 = tmpor1; - - htim->State = HAL_TIM_STATE_READY; - - __HAL_UNLOCK(htim); - - return HAL_OK; -} - -/** - * @brief Group channel 5 and channel 1, 2 or 3 - * @param htim: TIM handle. - * @param Channels: specifies the reference signal(s) the OC5REF is combined with. - * This parameter can be any combination of the following values: - * TIM_GROUPCH5_NONE: No effect of OC5REF on OC1REFC, OC2REFC and OC3REFC - * TIM_GROUPCH5_OC1REFC: OC1REFC is the logical AND of OC1REFC and OC5REF - * TIM_GROUPCH5_OC2REFC: OC2REFC is the logical AND of OC2REFC and OC5REF - * TIM_GROUPCH5_OC3REFC: OC3REFC is the logical AND of OC3REFC and OC5REF - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TIMEx_GroupChannel5(TIM_HandleTypeDef *htim, uint32_t Channels) -{ - /* Check parameters */ - assert_param(IS_TIM_COMBINED3PHASEPWM_INSTANCE(htim->Instance)); - assert_param(IS_TIM_GROUPCH5(Channels)); - - /* Process Locked */ - __HAL_LOCK(htim); - - htim->State = HAL_TIM_STATE_BUSY; - - /* Clear GC5Cx bit fields */ - htim->Instance->CCR5 &= ~(TIM_CCR5_GC5C3|TIM_CCR5_GC5C2|TIM_CCR5_GC5C1); - - /* Set GC5Cx bit fields */ - htim->Instance->CCR5 |= Channels; - - htim->State = HAL_TIM_STATE_READY; - - __HAL_UNLOCK(htim); - - return HAL_OK; -} - -/** - * @} - */ - -/** @defgroup TIMEx_Exported_Functions_Group6 Extended Callbacks functions - * @brief Extended Callbacks functions - * -@verbatim - ============================================================================== - ##### Extended Callbacks functions ##### - ============================================================================== - [..] - This section provides Extended TIM callback functions: - (+) Timer Commutation callback - (+) Timer Break callback - -@endverbatim - * @{ - */ - -/** - * @brief Hall commutation changed callback in non-blocking mode - * @param htim : TIM handle - * @retval None - */ -__weak void HAL_TIMEx_CommutationCallback(TIM_HandleTypeDef *htim) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_TIMEx_CommutationCallback could be implemented in the user file - */ -} - -/** - * @brief Hall Break detection callback in non-blocking mode - * @param htim : TIM handle - * @retval None - */ -__weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_TIMEx_BreakCallback could be implemented in the user file - */ -} - -/** - * @} - */ - -/** @defgroup TIMEx_Exported_Functions_Group7 Extended Peripheral State functions - * @brief Extended Peripheral State functions - * -@verbatim - ============================================================================== - ##### Extended Peripheral State functions ##### - ============================================================================== - [..] - This subsection permits to get in run-time the status of the peripheral - and the data flow. - -@endverbatim - * @{ - */ - -/** - * @brief Return the TIM Hall Sensor interface handle state. - * @param htim: TIM Hall Sensor handle - * @retval HAL state - */ -HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef *htim) -{ - return htim->State; -} - -/** - * @} - */ - -/** - * @brief TIM DMA Commutation callback. - * @param hdma : pointer to DMA handle. - * @retval None - */ -void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma) -{ - TIM_HandleTypeDef* htim = ( TIM_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; - - htim->State= HAL_TIM_STATE_READY; - - HAL_TIMEx_CommutationCallback(htim); -} - -/** - * @brief Enables or disables the TIM Capture Compare Channel xN. - * @param TIMx to select the TIM peripheral - * @param Channel: specifies the TIM Channel - * This parameter can be one of the following values: - * @arg TIM_Channel_1: TIM Channel 1 - * @arg TIM_Channel_2: TIM Channel 2 - * @arg TIM_Channel_3: TIM Channel 3 - * @param ChannelNState: specifies the TIM Channel CCxNE bit new state. - * This parameter can be: TIM_CCxN_ENABLE or TIM_CCxN_Disable. - * @retval None - */ -static void TIM_CCxNChannelCmd(TIM_TypeDef* TIMx, uint32_t Channel, uint32_t ChannelNState) -{ - uint32_t tmp = 0; - - tmp = TIM_CCER_CC1NE << Channel; - - /* Reset the CCxNE Bit */ - TIMx->CCER &= ~tmp; - - /* Set or reset the CCxNE Bit */ - TIMx->CCER |= (uint32_t)(ChannelNState << Channel); -} - -/** - * @} - */ - -#endif /* HAL_TIM_MODULE_ENABLED */ -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ -
--- a/Src/stm32l4xx_hal_tsc.c Thu Nov 12 20:49:49 2015 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,839 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_tsc.c - * @author MCD Application Team - * @version V1.1.0 - * @date 16-September-2015 - * @brief This file provides firmware functions to manage the following - * functionalities of the Touch Sensing Controller (TSC) peripheral: - * + Initialization and De-initialization - * + Channel IOs, Shield IOs and Sampling IOs configuration - * + Start and Stop an acquisition - * + Read acquisition result - * + Interrupts and flags management - * - @verbatim -================================================================================ - ##### TSC specific features ##### -================================================================================ - [..] - (#) Proven and robust surface charge transfer acquisition principle - - (#) Supports up to 3 capacitive sensing channels per group - - (#) Capacitive sensing channels can be acquired in parallel offering a very good - response time - - (#) Spread spectrum feature to improve system robustness in noisy environments - - (#) Full hardware management of the charge transfer acquisition sequence - - (#) Programmable charge transfer frequency - - (#) Programmable sampling capacitor I/O pin - - (#) Programmable channel I/O pin - - (#) Programmable max count value to avoid long acquisition when a channel is faulty - - (#) Dedicated end of acquisition and max count error flags with interrupt capability - - (#) One sampling capacitor for up to 3 capacitive sensing channels to reduce the system - components - - (#) Compatible with proximity, touchkey, linear and rotary touch sensor implementation - - - ##### How to use this driver ##### -================================================================================ - [..] - (#) Enable the TSC interface clock using __HAL_RCC_TSC_CLK_ENABLE() macro. - - (#) GPIO pins configuration - (++) Enable the clock for the TSC GPIOs using __HAL_RCC_GPIOx_CLK_ENABLE() macro. - (++) Configure the TSC pins used as sampling IOs in alternate function output Open-Drain mode, - and TSC pins used as channel/shield IOs in alternate function output Push-Pull mode - using HAL_GPIO_Init() function (see Table 1). - - (#) Interrupts configuration - (++) Configure the NVIC (if the interrupt model is used) using HAL_NVIC_SetPriority() - and HAL_NVIC_EnableIRQ() and function. - - (#) TSC configuration - (++) Configure all TSC parameters and used TSC IOs using HAL_TSC_Init() function. - - [..] Table 1. IOs for the STM32L4xx devices - (+) +--------------------------------+ - (+) | IOs | TSC functions | - (+) |--------------|-----------------| - (+) | PB12 (AF) | TSC_G1_IO1 | - (+) | PB13 (AF) | TSC_G1_IO2 | - (+) | PB14 (AF) | TSC_G1_IO3 | - (+) | PB15 (AF) | TSC_G1_IO4 | - (+) |--------------|-----------------| - (+) | PB4 (AF) | TSC_G2_IO1 | - (+) | PB5 (AF) | TSC_G2_IO2 | - (+) | PB6 (AF) | TSC_G2_IO3 | - (+) | PB7 (AF) | TSC_G2_IO4 | - (+) |--------------|-----------------| - (+) | PA15 (AF) | TSC_G3_IO1 | - (+) | PC10 (AF) | TSC_G3_IO2 | - (+) | PC11 (AF) | TSC_G3_IO3 | - (+) | PC12 (AF) | TSC_G3_IO4 | - (+) |--------------|-----------------| - (+) | PC6 (AF) | TSC_G4_IO1 | - (+) | PC7 (AF) | TSC_G4_IO2 | - (+) | PC8 (AF) | TSC_G4_IO3 | - (+) | PC9 (AF) | TSC_G4_IO4 | - (+) |--------------|-----------------| - (+) | PE10 (AF) | TSC_G5_IO1 | - (+) | PE11 (AF) | TSC_G5_IO2 | - (+) | PE12 (AF) | TSC_G5_IO3 | - (+) | PE13 (AF) | TSC_G5_IO4 | - (+) |--------------|-----------------| - (+) | PD10 (AF) | TSC_G6_IO1 | - (+) | PD11 (AF) | TSC_G6_IO2 | - (+) | PD12 (AF) | TSC_G6_IO3 | - (+) | PD13 (AF) | TSC_G6_IO4 | - (+) |--------------|-----------------| - (+) | PE2 (AF) | TSC_G7_IO1 | - (+) | PE3 (AF) | TSC_G7_IO2 | - (+) | PE4 (AF) | TSC_G7_IO3 | - (+) | PE5 (AF) | TSC_G7_IO4 | - (+) |--------------|-----------------| - (+) | PF14 (AF) | TSC_G8_IO1 | - (+) | PF15 (AF) | TSC_G8_IO2 | - (+) | PG0 (AF) | TSC_G8_IO3 | - (+) | PG1 (AF) | TSC_G8_IO4 | - (+) |--------------|-----------------| - (+) | PB10 (AF) | TSC_SYNC | - (+) | PD2 (AF) | | - (+) +--------------------------------+ - [..] TSC peripheral alternate functions are mapped on AF9. - - *** Acquisition sequence *** - =================================== - [..] - (+) Discharge all IOs using HAL_TSC_IODischarge() function. - (+) Wait a certain time allowing a good discharge of all capacitors. This delay depends - of the sampling capacitor and electrodes design. - (+) Select the channel IOs to be acquired using HAL_TSC_IOConfig() function. - (+) Launch the acquisition using either HAL_TSC_Start() or HAL_TSC_Start_IT() function. - If the synchronized mode is selected, the acquisition will start as soon as the signal - is received on the synchro pin. - (+) Wait the end of acquisition using either HAL_TSC_PollForAcquisition() or - HAL_TSC_GetState() function or using WFI instruction for example. - (+) Check the group acquisition status using HAL_TSC_GroupGetStatus() function. - (+) Read the acquisition value using HAL_TSC_GroupGetValue() function. - - @endverbatim - ****************************************************************************** - * @attention - * - * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @defgroup TSC TSC - * @brief HAL TSC module driver - * @{ - */ - -#ifdef HAL_TSC_MODULE_ENABLED - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -/* Private macro -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ -static uint32_t TSC_extract_groups(uint32_t iomask); - -/* Exported functions --------------------------------------------------------*/ - -/** @defgroup TSC_Exported_Functions Exported Functions - * @{ - */ - -/** @defgroup TSC_Exported_Functions_Group1 Initialization and de-initialization functions - * @brief Initialization and Configuration functions - * -@verbatim - =============================================================================== - ##### Initialization and de-initialization functions ##### - =============================================================================== - [..] This section provides functions allowing to: - (+) Initialize and configure the TSC. - (+) De-initialize the TSC. -@endverbatim - * @{ - */ - -/** - * @brief Initialize the TSC peripheral according to the specified parameters - * in the TSC_InitTypeDef structure and initialize the associated handle. - * @param htsc: TSC handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TSC_Init(TSC_HandleTypeDef* htsc) -{ - /* Check TSC handle allocation */ - if (htsc == NULL) - { - return HAL_ERROR; - } - - /* Check the parameters */ - assert_param(IS_TSC_ALL_INSTANCE(htsc->Instance)); - assert_param(IS_TSC_CTPH(htsc->Init.CTPulseHighLength)); - assert_param(IS_TSC_CTPL(htsc->Init.CTPulseLowLength)); - assert_param(IS_TSC_SS(htsc->Init.SpreadSpectrum)); - assert_param(IS_TSC_SSD(htsc->Init.SpreadSpectrumDeviation)); - assert_param(IS_TSC_SS_PRESC(htsc->Init.SpreadSpectrumPrescaler)); - assert_param(IS_TSC_PG_PRESC(htsc->Init.PulseGeneratorPrescaler)); - assert_param(IS_TSC_MCV(htsc->Init.MaxCountValue)); - assert_param(IS_TSC_IODEF(htsc->Init.IODefaultMode)); - assert_param(IS_TSC_SYNC_POL(htsc->Init.SynchroPinPolarity)); - assert_param(IS_TSC_ACQ_MODE(htsc->Init.AcquisitionMode)); - assert_param(IS_TSC_MCE_IT(htsc->Init.MaxCountInterrupt)); - - if(htsc->State == HAL_TSC_STATE_RESET) - { - /* Allocate lock resource and initialize it */ - htsc->Lock = HAL_UNLOCKED; - } - - /* Initialize the TSC state */ - htsc->State = HAL_TSC_STATE_BUSY; - - /* Init the low level hardware : GPIO, CLOCK, CORTEX */ - HAL_TSC_MspInit(htsc); - - /*--------------------------------------------------------------------------*/ - /* Set TSC parameters */ - - /* Enable TSC */ - htsc->Instance->CR = TSC_CR_TSCE; - - /* Set all functions */ - htsc->Instance->CR |= (htsc->Init.CTPulseHighLength | - htsc->Init.CTPulseLowLength | - (uint32_t)(htsc->Init.SpreadSpectrumDeviation << 17) | - htsc->Init.SpreadSpectrumPrescaler | - htsc->Init.PulseGeneratorPrescaler | - htsc->Init.MaxCountValue | - htsc->Init.IODefaultMode | - htsc->Init.SynchroPinPolarity | - htsc->Init.AcquisitionMode); - - /* Spread spectrum */ - if (htsc->Init.SpreadSpectrum == ENABLE) - { - htsc->Instance->CR |= TSC_CR_SSE; - } - - /* Disable Schmitt trigger hysteresis on all used TSC IOs */ - htsc->Instance->IOHCR = (uint32_t)(~(htsc->Init.ChannelIOs | htsc->Init.ShieldIOs | htsc->Init.SamplingIOs)); - - /* Set channel and shield IOs */ - htsc->Instance->IOCCR = (htsc->Init.ChannelIOs | htsc->Init.ShieldIOs); - - /* Set sampling IOs */ - htsc->Instance->IOSCR = htsc->Init.SamplingIOs; - - /* Set the groups to be acquired */ - htsc->Instance->IOGCSR = TSC_extract_groups(htsc->Init.ChannelIOs); - - /* Disable interrupts */ - htsc->Instance->IER &= (uint32_t)(~(TSC_IT_EOA | TSC_IT_MCE)); - - /* Clear flags */ - htsc->Instance->ICR = (TSC_FLAG_EOA | TSC_FLAG_MCE); - - /*--------------------------------------------------------------------------*/ - - /* Initialize the TSC state */ - htsc->State = HAL_TSC_STATE_READY; - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Deinitialize the TSC peripheral registers to their default reset values. - * @param htsc: TSC handle - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TSC_DeInit(TSC_HandleTypeDef* htsc) -{ - /* Check TSC handle allocation */ - if (htsc == NULL) - { - return HAL_ERROR; - } - - /* Check the parameters */ - assert_param(IS_TSC_ALL_INSTANCE(htsc->Instance)); - - /* Change TSC state */ - htsc->State = HAL_TSC_STATE_BUSY; - - /* DeInit the low level hardware */ - HAL_TSC_MspDeInit(htsc); - - /* Change TSC state */ - htsc->State = HAL_TSC_STATE_RESET; - - /* Process unlocked */ - __HAL_UNLOCK(htsc); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Initialize the TSC MSP. - * @param htsc: pointer to a TSC_HandleTypeDef structure that contains - * the configuration information for the specified TSC. - * @retval None - */ -__weak void HAL_TSC_MspInit(TSC_HandleTypeDef* htsc) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_TSC_MspInit could be implemented in the user file. - */ -} - -/** - * @brief DeInitialize the TSC MSP. - * @param htsc: pointer to a TSC_HandleTypeDef structure that contains - * the configuration information for the specified TSC. - * @retval None - */ -__weak void HAL_TSC_MspDeInit(TSC_HandleTypeDef* htsc) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_TSC_MspDeInit could be implemented in the user file. - */ -} - -/** - * @} - */ - -/** @defgroup TSC_Exported_Functions_Group2 Input and Output operation functions - * @brief Input and Output operation functions - * -@verbatim - =============================================================================== - ##### IO Operation functions ##### - =============================================================================== - [..] This section provides functions allowing to: - (+) Start acquisition in polling mode. - (+) Start acquisition in interrupt mode. - (+) Stop conversion in polling mode. - (+) Stop conversion in interrupt mode. - (+) Poll for acquisition completed. - (+) Get group acquisition status. - (+) Get group acquisition value. -@endverbatim - * @{ - */ - -/** - * @brief Start the acquisition. - * @param htsc: pointer to a TSC_HandleTypeDef structure that contains - * the configuration information for the specified TSC. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TSC_Start(TSC_HandleTypeDef* htsc) -{ - /* Check the parameters */ - assert_param(IS_TSC_ALL_INSTANCE(htsc->Instance)); - - /* Process locked */ - __HAL_LOCK(htsc); - - /* Change TSC state */ - htsc->State = HAL_TSC_STATE_BUSY; - - /* Clear interrupts */ - __HAL_TSC_DISABLE_IT(htsc, (TSC_IT_EOA | TSC_IT_MCE)); - - /* Clear flags */ - __HAL_TSC_CLEAR_FLAG(htsc, (TSC_FLAG_EOA | TSC_FLAG_MCE)); - - /* Stop discharging the IOs */ - __HAL_TSC_SET_IODEF_INFLOAT(htsc); - - /* Launch the acquisition */ - __HAL_TSC_START_ACQ(htsc); - - /* Process unlocked */ - __HAL_UNLOCK(htsc); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Start the acquisition in interrupt mode. - * @param htsc: pointer to a TSC_HandleTypeDef structure that contains - * the configuration information for the specified TSC. - * @retval HAL status. - */ -HAL_StatusTypeDef HAL_TSC_Start_IT(TSC_HandleTypeDef* htsc) -{ - /* Check the parameters */ - assert_param(IS_TSC_ALL_INSTANCE(htsc->Instance)); - assert_param(IS_TSC_MCE_IT(htsc->Init.MaxCountInterrupt)); - - /* Process locked */ - __HAL_LOCK(htsc); - - /* Change TSC state */ - htsc->State = HAL_TSC_STATE_BUSY; - - /* Enable end of acquisition interrupt */ - __HAL_TSC_ENABLE_IT(htsc, TSC_IT_EOA); - - /* Enable max count error interrupt (optional) */ - if (htsc->Init.MaxCountInterrupt == ENABLE) - { - __HAL_TSC_ENABLE_IT(htsc, TSC_IT_MCE); - } - else - { - __HAL_TSC_DISABLE_IT(htsc, TSC_IT_MCE); - } - - /* Clear flags */ - __HAL_TSC_CLEAR_FLAG(htsc, (TSC_FLAG_EOA | TSC_FLAG_MCE)); - - /* Stop discharging the IOs */ - __HAL_TSC_SET_IODEF_INFLOAT(htsc); - - /* Launch the acquisition */ - __HAL_TSC_START_ACQ(htsc); - - /* Process unlocked */ - __HAL_UNLOCK(htsc); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stop the acquisition previously launched in polling mode. - * @param htsc: pointer to a TSC_HandleTypeDef structure that contains - * the configuration information for the specified TSC. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TSC_Stop(TSC_HandleTypeDef* htsc) -{ - /* Check the parameters */ - assert_param(IS_TSC_ALL_INSTANCE(htsc->Instance)); - - /* Process locked */ - __HAL_LOCK(htsc); - - /* Stop the acquisition */ - __HAL_TSC_STOP_ACQ(htsc); - - /* Clear flags */ - __HAL_TSC_CLEAR_FLAG(htsc, (TSC_FLAG_EOA | TSC_FLAG_MCE)); - - /* Change TSC state */ - htsc->State = HAL_TSC_STATE_READY; - - /* Process unlocked */ - __HAL_UNLOCK(htsc); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Stop the acquisition previously launched in interrupt mode. - * @param htsc: pointer to a TSC_HandleTypeDef structure that contains - * the configuration information for the specified TSC. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TSC_Stop_IT(TSC_HandleTypeDef* htsc) -{ - /* Check the parameters */ - assert_param(IS_TSC_ALL_INSTANCE(htsc->Instance)); - - /* Process locked */ - __HAL_LOCK(htsc); - - /* Stop the acquisition */ - __HAL_TSC_STOP_ACQ(htsc); - - /* Disable interrupts */ - __HAL_TSC_DISABLE_IT(htsc, (TSC_IT_EOA | TSC_IT_MCE)); - - /* Clear flags */ - __HAL_TSC_CLEAR_FLAG(htsc, (TSC_FLAG_EOA | TSC_FLAG_MCE)); - - /* Change TSC state */ - htsc->State = HAL_TSC_STATE_READY; - - /* Process unlocked */ - __HAL_UNLOCK(htsc); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Start acquisition and wait until completion. - * @note There is no need of a timeout parameter as the max count error is already - * managed by the TSC peripheral. - * @param htsc: pointer to a TSC_HandleTypeDef structure that contains - * the configuration information for the specified TSC. - * @retval HAL state - */ -HAL_StatusTypeDef HAL_TSC_PollForAcquisition(TSC_HandleTypeDef* htsc) -{ - /* Check the parameters */ - assert_param(IS_TSC_ALL_INSTANCE(htsc->Instance)); - - /* Process locked */ - __HAL_LOCK(htsc); - - /* Check end of acquisition */ - while (HAL_TSC_GetState(htsc) == HAL_TSC_STATE_BUSY) - { - /* The timeout (max count error) is managed by the TSC peripheral itself. */ - } - - /* Process unlocked */ - __HAL_UNLOCK(htsc); - - return HAL_OK; -} - -/** - * @brief Get the acquisition status for a group. - * @param htsc: pointer to a TSC_HandleTypeDef structure that contains - * the configuration information for the specified TSC. - * @param gx_index: Index of the group - * @retval Group status - */ -TSC_GroupStatusTypeDef HAL_TSC_GroupGetStatus(TSC_HandleTypeDef* htsc, uint32_t gx_index) -{ - /* Check the parameters */ - assert_param(IS_TSC_ALL_INSTANCE(htsc->Instance)); - assert_param(IS_TSC_GROUP_INDEX(gx_index)); - - /* Return the group status */ - return(__HAL_TSC_GET_GROUP_STATUS(htsc, gx_index)); -} - -/** - * @brief Get the acquisition measure for a group. - * @param htsc: pointer to a TSC_HandleTypeDef structure that contains - * the configuration information for the specified TSC. - * @param gx_index: Index of the group - * @retval Acquisition measure - */ -uint32_t HAL_TSC_GroupGetValue(TSC_HandleTypeDef* htsc, uint32_t gx_index) -{ - /* Check the parameters */ - assert_param(IS_TSC_ALL_INSTANCE(htsc->Instance)); - assert_param(IS_TSC_GROUP_INDEX(gx_index)); - - /* Return the group acquisition counter */ - return htsc->Instance->IOGXCR[gx_index]; -} - -/** - * @} - */ - -/** @defgroup TSC_Exported_Functions_Group3 Peripheral Control functions - * @brief Peripheral Control functions - * -@verbatim - =============================================================================== - ##### Peripheral Control functions ##### - =============================================================================== - [..] This section provides functions allowing to: - (+) Configure TSC IOs - (+) Discharge TSC IOs -@endverbatim - * @{ - */ - -/** - * @brief Configure TSC IOs. - * @param htsc: pointer to a TSC_HandleTypeDef structure that contains - * the configuration information for the specified TSC. - * @param config: pointer to the configuration structure. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TSC_IOConfig(TSC_HandleTypeDef* htsc, TSC_IOConfigTypeDef* config) -{ - /* Check the parameters */ - assert_param(IS_TSC_ALL_INSTANCE(htsc->Instance)); - - /* Process locked */ - __HAL_LOCK(htsc); - - /* Stop acquisition */ - __HAL_TSC_STOP_ACQ(htsc); - - /* Disable Schmitt trigger hysteresis on all used TSC IOs */ - htsc->Instance->IOHCR = (uint32_t)(~(config->ChannelIOs | config->ShieldIOs | config->SamplingIOs)); - - /* Set channel and shield IOs */ - htsc->Instance->IOCCR = (config->ChannelIOs | config->ShieldIOs); - - /* Set sampling IOs */ - htsc->Instance->IOSCR = config->SamplingIOs; - - /* Set groups to be acquired */ - htsc->Instance->IOGCSR = TSC_extract_groups(config->ChannelIOs); - - /* Process unlocked */ - __HAL_UNLOCK(htsc); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Discharge TSC IOs. - * @param htsc: pointer to a TSC_HandleTypeDef structure that contains - * the configuration information for the specified TSC. - * @param choice: enable or disable - * @retval HAL status - */ -HAL_StatusTypeDef HAL_TSC_IODischarge(TSC_HandleTypeDef* htsc, uint32_t choice) -{ - /* Check the parameters */ - assert_param(IS_TSC_ALL_INSTANCE(htsc->Instance)); - - /* Process locked */ - __HAL_LOCK(htsc); - - if (choice == ENABLE) - { - __HAL_TSC_SET_IODEF_OUTPPLOW(htsc); - } - else - { - __HAL_TSC_SET_IODEF_INFLOAT(htsc); - } - - /* Process unlocked */ - __HAL_UNLOCK(htsc); - - /* Return the group acquisition counter */ - return HAL_OK; -} - -/** - * @} - */ - -/** @defgroup TSC_Exported_Functions_Group4 Peripheral State and Errors functions - * @brief Peripheral State and Errors functions - * -@verbatim - =============================================================================== - ##### State and Errors functions ##### - =============================================================================== - [..] - This subsection provides functions allowing to - (+) Get TSC state. - -@endverbatim - * @{ - */ - -/** - * @brief Return the TSC handle state. - * @param htsc: pointer to a TSC_HandleTypeDef structure that contains - * the configuration information for the specified TSC. - * @retval HAL state - */ -HAL_TSC_StateTypeDef HAL_TSC_GetState(TSC_HandleTypeDef* htsc) -{ - /* Check the parameters */ - assert_param(IS_TSC_ALL_INSTANCE(htsc->Instance)); - - if (htsc->State == HAL_TSC_STATE_BUSY) - { - /* Check end of acquisition flag */ - if (__HAL_TSC_GET_FLAG(htsc, TSC_FLAG_EOA) != RESET) - { - /* Check max count error flag */ - if (__HAL_TSC_GET_FLAG(htsc, TSC_FLAG_MCE) != RESET) - { - /* Change TSC state */ - htsc->State = HAL_TSC_STATE_ERROR; - } - else - { - /* Change TSC state */ - htsc->State = HAL_TSC_STATE_READY; - } - } - } - - /* Return TSC state */ - return htsc->State; -} - -/** - * @} - */ - -/** @defgroup TSC_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks - * @{ - */ - -/** - * @brief Handle TSC interrupt request. - * @param htsc: pointer to a TSC_HandleTypeDef structure that contains - * the configuration information for the specified TSC. - * @retval None - */ -void HAL_TSC_IRQHandler(TSC_HandleTypeDef* htsc) -{ - /* Check the parameters */ - assert_param(IS_TSC_ALL_INSTANCE(htsc->Instance)); - - /* Check if the end of acquisition occurred */ - if (__HAL_TSC_GET_FLAG(htsc, TSC_FLAG_EOA) != RESET) - { - /* Clear EOA flag */ - __HAL_TSC_CLEAR_FLAG(htsc, TSC_FLAG_EOA); - } - - /* Check if max count error occurred */ - if (__HAL_TSC_GET_FLAG(htsc, TSC_FLAG_MCE) != RESET) - { - /* Clear MCE flag */ - __HAL_TSC_CLEAR_FLAG(htsc, TSC_FLAG_MCE); - /* Change TSC state */ - htsc->State = HAL_TSC_STATE_ERROR; - /* Conversion completed callback */ - HAL_TSC_ErrorCallback(htsc); - } - else - { - /* Change TSC state */ - htsc->State = HAL_TSC_STATE_READY; - /* Conversion completed callback */ - HAL_TSC_ConvCpltCallback(htsc); - } -} - -/** - * @brief Acquisition completed callback in non-blocking mode. - * @param htsc: pointer to a TSC_HandleTypeDef structure that contains - * the configuration information for the specified TSC. - * @retval None - */ -__weak void HAL_TSC_ConvCpltCallback(TSC_HandleTypeDef* htsc) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_TSC_ConvCpltCallback could be implemented in the user file. - */ -} - -/** - * @brief Error callback in non-blocking mode. - * @param htsc: pointer to a TSC_HandleTypeDef structure that contains - * the configuration information for the specified TSC. - * @retval None - */ -__weak void HAL_TSC_ErrorCallback(TSC_HandleTypeDef* htsc) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_TSC_ErrorCallback could be implemented in the user file. - */ -} - -/** - * @} - */ - -/** - * @} - */ - -/* Private functions ---------------------------------------------------------*/ -/** @defgroup TSC_Private_Functions Private Functions - * @{ - */ - -/** - * @brief Utility function used to set the acquired groups mask. - * @param iomask: Channels IOs mask - * @retval Acquired groups mask - */ -static uint32_t TSC_extract_groups(uint32_t iomask) -{ - uint32_t groups = 0; - uint32_t idx; - - for (idx = 0; idx < TSC_NB_OF_GROUPS; idx++) - { - if ((iomask & ((uint32_t)0x0F << (idx * 4))) != RESET) - { - groups |= ((uint32_t)1 << idx); - } - } - - return groups; -} - -/** - * @} - */ - -#endif /* HAL_TSC_MODULE_ENABLED */ - -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ -
--- a/Src/stm32l4xx_hal_usart.c Thu Nov 12 20:49:49 2015 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,1818 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_usart.c - * @author MCD Application Team - * @version V1.1.0 - * @date 16-September-2015 - * @brief USART HAL module driver. - * This file provides firmware functions to manage the following - * functionalities of the Universal Synchronous/Asynchronous Receiver Transmitter - * Peripheral (USART). - * + Initialization and de-initialization functions - * + IO operation functions - * + Peripheral Control functions - * + Peripheral State and Error functions - * - @verbatim - =============================================================================== - ##### How to use this driver ##### - =============================================================================== - [..] - The USART HAL driver can be used as follows: - - (#) Declare a USART_HandleTypeDef handle structure (eg. USART_HandleTypeDef husart). - (#) Initialize the USART low level resources by implementing the HAL_USART_MspInit() API: - (++) Enable the USARTx interface clock. - (++) USART pins configuration: - (+++) Enable the clock for the USART GPIOs. - (+++) Configure these USART pins as alternate function pull-up. - (++) NVIC configuration if you need to use interrupt process (HAL_USART_Transmit_IT(), - HAL_USART_Receive_IT() and HAL_USART_TransmitReceive_IT() APIs): - (+++) Configure the USARTx interrupt priority. - (+++) Enable the NVIC USART IRQ handle. - (++) USART interrupts handling: - -@@- The specific USART interrupts (Transmission complete interrupt, - RXNE interrupt and Error Interrupts) will be managed using the macros - __HAL_USART_ENABLE_IT() and __HAL_USART_DISABLE_IT() inside the transmit and receive process. - (++) DMA Configuration if you need to use DMA process (HAL_USART_Transmit_DMA() - HAL_USART_Receive_DMA() and HAL_USART_TransmitReceive_DMA() APIs): - (+++) Declare a DMA handle structure for the Tx/Rx channel. - (+++) Enable the DMAx interface clock. - (+++) Configure the declared DMA handle structure with the required Tx/Rx parameters. - (+++) Configure the DMA Tx/Rx channel. - (+++) Associate the initialized DMA handle to the USART DMA Tx/Rx handle. - (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the DMA Tx/Rx channel. - - (#) Program the Baud Rate, Word Length, Stop Bit, Parity, Hardware - flow control and Mode (Receiver/Transmitter) in the husart handle Init structure. - - (#) Initialize the USART registers by calling the HAL_USART_Init() API: - (++) This API configures also the low level Hardware GPIO, CLOCK, CORTEX...etc) - by calling the customized HAL_USART_MspInit(&husart) API. - - [..] - (@) To configure and enable/disable the USART to wake up the MCU from stop mode, resort to UART API's - HAL_UARTEx_StopModeWakeUpSourceConfig(), HAL_UARTEx_EnableStopMode() and - HAL_UARTEx_DisableStopMode() in casting the USART handle to UART type UART_HandleTypeDef. - - @endverbatim - ****************************************************************************** - * @attention - * - * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @defgroup USART USART - * @brief HAL USART Synchronous module driver - * @{ - */ - -#ifdef HAL_USART_MODULE_ENABLED - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -/** @defgroup USART_Private_Constants USART Private Constants - * @{ - */ -#define USART_DUMMY_DATA ((uint16_t) 0xFFFF) /*!< USART transmitted dummy data */ -#define USART_TEACK_REACK_TIMEOUT ((uint32_t) 1000) /*!< USART TX or RX enable acknowledge time-out value */ -#define USART_CR1_FIELDS ((uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | \ - USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8)) /*!< USART CR1 fields of parameters set by USART_SetConfig API */ -#define USART_CR2_FIELDS ((uint32_t)(USART_CR2_CPHA | USART_CR2_CPOL | \ - USART_CR2_CLKEN | USART_CR2_LBCL | USART_CR2_STOP)) /*!< USART CR2 fields of parameters set by USART_SetConfig API */ -/** - * @} - */ - -/* Private macros ------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ -/** @addtogroup USART_Private_Functions - * @{ - */ -static void USART_DMATransmitCplt(DMA_HandleTypeDef *hdma); -static void USART_DMAReceiveCplt(DMA_HandleTypeDef *hdma); -static void USART_DMATxHalfCplt(DMA_HandleTypeDef *hdma); -static void USART_DMARxHalfCplt(DMA_HandleTypeDef *hdma); -static void USART_DMAError(DMA_HandleTypeDef *hdma); -static HAL_StatusTypeDef USART_WaitOnFlagUntilTimeout(USART_HandleTypeDef *husart, uint32_t Flag, FlagStatus Status, uint32_t Timeout); -static HAL_StatusTypeDef USART_SetConfig(USART_HandleTypeDef *husart); -static HAL_StatusTypeDef USART_CheckIdleState(USART_HandleTypeDef *husart); -static HAL_StatusTypeDef USART_Transmit_IT(USART_HandleTypeDef *husart); -static HAL_StatusTypeDef USART_EndTransmit_IT(USART_HandleTypeDef *husart); -static HAL_StatusTypeDef USART_Receive_IT(USART_HandleTypeDef *husart); -static HAL_StatusTypeDef USART_TransmitReceive_IT(USART_HandleTypeDef *husart); -/** - * @} - */ - -/* Exported functions --------------------------------------------------------*/ - -/** @defgroup USART_Exported_Functions USART Exported Functions - * @{ - */ - -/** @defgroup USART_Exported_Functions_Group1 Initialization and de-initialization functions - * @brief Initialization and Configuration functions - * -@verbatim - =============================================================================== - ##### Initialization and Configuration functions ##### - =============================================================================== - [..] - This subsection provides a set of functions allowing to initialize the USART - in asynchronous and in synchronous modes. - (+) For the asynchronous mode only these parameters can be configured: - (++) Baud Rate - (++) Word Length - (++) Stop Bit - (++) Parity: If the parity is enabled, then the MSB bit of the data written - in the data register is transmitted but is changed by the parity bit. - Depending on the frame length defined by the M1 and M0 bits (7-bit, - 8-bit or 9-bit), the possible USART frame formats are as listed in the - following table: - - (+++) Table 1. USART frame format. - (+++) +-----------------------------------------------------------------------+ - (+++) | M1 bit | M0 bit | PCE bit | USART frame | - (+++) |---------|---------|-----------|---------------------------------------| - (+++) | 0 | 0 | 0 | | SB | 8 bit data | STB | | - (+++) |---------|---------|-----------|---------------------------------------| - (+++) | 0 | 0 | 1 | | SB | 7 bit data | PB | STB | | - (+++) |---------|---------|-----------|---------------------------------------| - (+++) | 0 | 1 | 0 | | SB | 9 bit data | STB | | - (+++) |---------|---------|-----------|---------------------------------------| - (+++) | 0 | 1 | 1 | | SB | 8 bit data | PB | STB | | - (+++) |---------|---------|-----------|---------------------------------------| - (+++) | 1 | 0 | 0 | | SB | 7 bit data | STB | | - (+++) |---------|---------|-----------|---------------------------------------| - (+++) | 1 | 0 | 1 | | SB | 6 bit data | PB | STB | | - (+++) +-----------------------------------------------------------------------+ - (++) USART polarity - (++) USART phase - (++) USART LastBit - (++) Receiver/transmitter modes - - [..] - The HAL_USART_Init() function follows the USART synchronous configuration - procedure (details for the procedure are available in reference manual). - -@endverbatim - * @{ - */ - -/** - * @brief Initializes the USART mode according to the specified - * parameters in the USART_InitTypeDef and initialize the associated handle. - * @param husart: USART handle. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_USART_Init(USART_HandleTypeDef *husart) -{ - /* Check the USART handle allocation */ - if(husart == NULL) - { - return HAL_ERROR; - } - - /* Check the parameters */ - assert_param(IS_USART_INSTANCE(husart->Instance)); - - if(husart->State == HAL_USART_STATE_RESET) - { - /* Allocate lock resource and initialize it */ - husart->Lock = HAL_UNLOCKED; - - /* Init the low level hardware : GPIO, CLOCK */ - HAL_USART_MspInit(husart); - } - - husart->State = HAL_USART_STATE_BUSY; - - /* Disable the Peripheral */ - __HAL_USART_DISABLE(husart); - - /* Set the Usart Communication parameters */ - if (USART_SetConfig(husart) == HAL_ERROR) - { - return HAL_ERROR; - } - - /* In Synchronous mode, the following bits must be kept cleared: - - LINEN bit in the USART_CR2 register - - HDSEL, SCEN and IREN bits in the USART_CR3 register.*/ - husart->Instance->CR2 &= ~USART_CR2_LINEN; - husart->Instance->CR3 &= ~(USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN); - - /* Enable the Peripheral */ - __HAL_USART_ENABLE(husart); - - /* TEACK and/or REACK to check before moving husart->State to Ready */ - return (USART_CheckIdleState(husart)); -} - -/** - * @brief DeInitialize the USART peripheral. - * @param husart: USART handle. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_USART_DeInit(USART_HandleTypeDef *husart) -{ - /* Check the USART handle allocation */ - if(husart == NULL) - { - return HAL_ERROR; - } - - /* Check the parameters */ - assert_param(IS_USART_INSTANCE(husart->Instance)); - - husart->State = HAL_USART_STATE_BUSY; - - husart->Instance->CR1 = 0x0; - husart->Instance->CR2 = 0x0; - husart->Instance->CR3 = 0x0; - - /* DeInit the low level hardware */ - HAL_USART_MspDeInit(husart); - - husart->ErrorCode = HAL_USART_ERROR_NONE; - husart->State = HAL_USART_STATE_RESET; - - /* Process Unlock */ - __HAL_UNLOCK(husart); - - return HAL_OK; -} - -/** - * @brief Initialize the USART MSP. - * @param husart: USART handle. - * @retval None - */ - __weak void HAL_USART_MspInit(USART_HandleTypeDef *husart) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_USART_MspInit can be implemented in the user file - */ -} - -/** - * @brief DeInitialize the USART MSP. - * @param husart: USART handle. - * @retval None - */ - __weak void HAL_USART_MspDeInit(USART_HandleTypeDef *husart) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_USART_MspDeInit can be implemented in the user file - */ -} - -/** - * @} - */ - -/** @defgroup USART_Exported_Functions_Group2 IO operation functions - * @brief USART Transmit and Receive functions - * -@verbatim - =============================================================================== - ##### IO operation functions ##### - =============================================================================== - [..] This subsection provides a set of functions allowing to manage the USART synchronous - data transfers. - - [..] The USART supports master mode only: it cannot receive or send data related to an input - clock (SCLK is always an output). - - (#) There are two modes of transfer: - (++) Blocking mode: The communication is performed in polling mode. - The HAL status of all data processing is returned by the same function - after finishing transfer. - (++) No-Blocking mode: The communication is performed using Interrupts - or DMA, These API's return the HAL status. - The end of the data processing will be indicated through the - dedicated USART IRQ when using Interrupt mode or the DMA IRQ when - using DMA mode. - The HAL_USART_TxCpltCallback(), HAL_USART_RxCpltCallback() and HAL_USART_TxRxCpltCallback() user callbacks - will be executed respectively at the end of the transmit or Receive process - The HAL_USART_ErrorCallback()user callback will be executed when a communication error is detected - - (#) Blocking mode API's are : - (++) HAL_USART_Transmit()in simplex mode - (++) HAL_USART_Receive() in full duplex receive only - (++) HAL_USART_TransmitReceive() in full duplex mode - - (#) Non-Blocking mode API's with Interrupt are : - (++) HAL_USART_Transmit_IT()in simplex mode - (++) HAL_USART_Receive_IT() in full duplex receive only - (++) HAL_USART_TransmitReceive_IT()in full duplex mode - (++) HAL_USART_IRQHandler() - - (#) No-Blocking mode API's with DMA are : - (++) HAL_USART_Transmit_DMA()in simplex mode - (++) HAL_USART_Receive_DMA() in full duplex receive only - (++) HAL_USART_TransmitReceive_DMA() in full duplex mode - (++) HAL_USART_DMAPause() - (++) HAL_USART_DMAResume() - (++) HAL_USART_DMAStop() - - (#) A set of Transfer Complete Callbacks are provided in No_Blocking mode: - (++) HAL_USART_TxCpltCallback() - (++) HAL_USART_RxCpltCallback() - (++) HAL_USART_TxHalfCpltCallback() - (++) HAL_USART_RxHalfCpltCallback() - (++) HAL_USART_ErrorCallback() - (++) HAL_USART_TxRxCpltCallback() - -@endverbatim - * @{ - */ - -/** - * @brief Simplex send an amount of data in blocking mode. - * @param husart: USART handle. - * @param pTxData: Pointer to data buffer. - * @param Size: Amount of data to be sent. - * @param Timeout: Timeout duration. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_USART_Transmit(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size, uint32_t Timeout) -{ - uint16_t* tmp; - - if(husart->State == HAL_USART_STATE_READY) - { - if((pTxData == NULL) || (Size == 0)) - { - return HAL_ERROR; - } - - /* Process Locked */ - __HAL_LOCK(husart); - - husart->ErrorCode = HAL_USART_ERROR_NONE; - husart->State = HAL_USART_STATE_BUSY_TX; - - husart->TxXferSize = Size; - husart->TxXferCount = Size; - - /* Check the remaining data to be sent */ - while(husart->TxXferCount > 0) - { - husart->TxXferCount--; - if(USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_TC, RESET, Timeout) != HAL_OK) - { - return HAL_TIMEOUT; - } - if((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE)) - { - tmp = (uint16_t*) pTxData; - husart->Instance->TDR = (*tmp & (uint16_t)0x01FF); - pTxData += 2; - } - else - { - husart->Instance->TDR = (*pTxData++ & (uint8_t)0xFF); - } - } - - if(USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_TC, RESET, Timeout) != HAL_OK) - { - return HAL_TIMEOUT; - } - - husart->State = HAL_USART_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(husart); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Receive an amount of data in blocking mode. - * @note To receive synchronous data, dummy data are simultaneously transmitted. - * @param husart: USART handle. - * @param pRxData: Pointer to data buffer. - * @param Size: Amount of data to be received. - * @param Timeout: Timeout duration. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_USART_Receive(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size, uint32_t Timeout) -{ - uint16_t* tmp; - uint16_t uhMask; - - if(husart->State == HAL_USART_STATE_READY) - { - if((pRxData == NULL) || (Size == 0)) - { - return HAL_ERROR; - } - /* Process Locked */ - __HAL_LOCK(husart); - - husart->ErrorCode = HAL_USART_ERROR_NONE; - husart->State = HAL_USART_STATE_BUSY_RX; - - husart->RxXferSize = Size; - husart->RxXferCount = Size; - - /* Computation of USART mask to apply to RDR register */ - USART_MASK_COMPUTATION(husart); - uhMask = husart->Mask; - - /* as long as data have to be received */ - while(husart->RxXferCount > 0) - { - husart->RxXferCount--; - - /* Wait until TC flag is set to send dummy byte in order to generate the - * clock for the slave to send data. - * Whatever the frame length (7, 8 or 9-bit long), the same dummy value - * can be written for all the cases. */ - if(USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_TC, RESET, Timeout) != HAL_OK) - { - return HAL_TIMEOUT; - } - husart->Instance->TDR = (USART_DUMMY_DATA & (uint16_t)0x0FF); - - /* Wait for RXNE Flag */ - if(USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_RXNE, RESET, Timeout) != HAL_OK) - { - return HAL_TIMEOUT; - } - - if((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE)) - { - tmp = (uint16_t*) pRxData ; - *tmp = (uint16_t)(husart->Instance->RDR & uhMask); - pRxData +=2; - } - else - { - *pRxData++ = (uint8_t)(husart->Instance->RDR & (uint8_t)uhMask); - } - } - - husart->State = HAL_USART_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(husart); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Full-Duplex Send and Receive an amount of data in blocking mode. - * @param husart: USART handle. - * @param pTxData: pointer to TX data buffer. - * @param pRxData: pointer to RX data buffer. - * @param Size: amount of data to be sent (same amount to be received). - * @param Timeout: Timeout duration. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_USART_TransmitReceive(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout) -{ - uint16_t* tmp; - uint16_t uhMask; - - if(husart->State == HAL_USART_STATE_READY) - { - if((pTxData == NULL) || (pRxData == NULL) || (Size == 0)) - { - return HAL_ERROR; - } - /* Process Locked */ - __HAL_LOCK(husart); - - husart->ErrorCode = HAL_USART_ERROR_NONE; - husart->State = HAL_USART_STATE_BUSY_RX; - - husart->RxXferSize = Size; - husart->TxXferSize = Size; - husart->TxXferCount = Size; - husart->RxXferCount = Size; - - /* Computation of USART mask to apply to RDR register */ - USART_MASK_COMPUTATION(husart); - uhMask = husart->Mask; - - /* Check the remain data to be sent */ - while(husart->TxXferCount > 0) - { - husart->TxXferCount--; - husart->RxXferCount--; - - /* Wait until TC flag is set to send data */ - if(USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_TC, RESET, Timeout) != HAL_OK) - { - return HAL_TIMEOUT; - } - if((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE)) - { - tmp = (uint16_t*) pTxData; - husart->Instance->TDR = (*tmp & uhMask); - pTxData += 2; - } - else - { - husart->Instance->TDR = (*pTxData++ & (uint8_t)uhMask); - } - - /* Wait for RXNE Flag */ - if(USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_RXNE, RESET, Timeout) != HAL_OK) - { - return HAL_TIMEOUT; - } - - if((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE)) - { - tmp = (uint16_t*) pRxData ; - *tmp = (uint16_t)(husart->Instance->RDR & uhMask); - pRxData +=2; - } - else - { - *pRxData++ = (uint8_t)(husart->Instance->RDR & (uint8_t)uhMask); - } - } - - husart->State = HAL_USART_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(husart); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Send an amount of data in interrupt mode. - * @param husart: USART handle. - * @param pTxData: pointer to data buffer. - * @param Size: amount of data to be sent. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_USART_Transmit_IT(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size) -{ - if(husart->State == HAL_USART_STATE_READY) - { - if((pTxData == NULL ) || (Size == 0)) - { - return HAL_ERROR; - } - - /* Process Locked */ - __HAL_LOCK(husart); - - husart->pTxBuffPtr = pTxData; - husart->TxXferSize = Size; - husart->TxXferCount = Size; - - husart->ErrorCode = HAL_USART_ERROR_NONE; - husart->State = HAL_USART_STATE_BUSY_TX; - - /* The USART Error Interrupts: (Frame error, noise error, overrun error) - are not managed by the USART Transmit Process to avoid the overrun interrupt - when the usart mode is configured for transmit and receive "USART_MODE_TX_RX" - to benefit for the frame error and noise interrupts the usart mode should be - configured only for transmit "USART_MODE_TX" */ - - /* Process Unlocked */ - __HAL_UNLOCK(husart); - - /* Enable the USART Transmit Data Register Empty Interrupt */ - __HAL_USART_ENABLE_IT(husart, USART_IT_TXE); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Receive an amount of data in blocking mode. - * @note To receive synchronous data, dummy data are simultaneously transmitted. - * @param husart: USART handle. - * @param pRxData: pointer to data buffer. - * @param Size: amount of data to be received. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_USART_Receive_IT(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size) -{ - if(husart->State == HAL_USART_STATE_READY) - { - if((pRxData == NULL ) || (Size == 0)) - { - return HAL_ERROR; - } - /* Process Locked */ - __HAL_LOCK(husart); - - husart->pRxBuffPtr = pRxData; - husart->RxXferSize = Size; - husart->RxXferCount = Size; - - USART_MASK_COMPUTATION(husart); - - husart->ErrorCode = HAL_USART_ERROR_NONE; - husart->State = HAL_USART_STATE_BUSY_RX; - - /* Enable the USART Parity Error Interrupt */ - __HAL_USART_ENABLE_IT(husart, USART_IT_PE); - - /* Enable the USART Error Interrupt: (Frame error, noise error, overrun error) */ - __HAL_USART_ENABLE_IT(husart, USART_IT_ERR); - - /* Enable the USART Data Register not empty Interrupt */ - __HAL_USART_ENABLE_IT(husart, USART_IT_RXNE); - - /* Process Unlocked */ - __HAL_UNLOCK(husart); - - - /* Send dummy byte in order to generate the clock for the Slave to send the next data */ - if(husart->Init.WordLength == USART_WORDLENGTH_9B) - { - husart->Instance->TDR = (USART_DUMMY_DATA & (uint16_t)0x01FF); - } - else - { - husart->Instance->TDR = (USART_DUMMY_DATA & (uint16_t)0x00FF); - } - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Full-Duplex Send and Receive an amount of data in interrupt mode. - * @param husart: USART handle. - * @param pTxData: pointer to TX data buffer. - * @param pRxData: pointer to RX data buffer. - * @param Size: amount of data to be sent (same amount to be received). - * @retval HAL status - */ -HAL_StatusTypeDef HAL_USART_TransmitReceive_IT(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size) -{ - - if(husart->State == HAL_USART_STATE_READY) - { - if((pTxData == NULL) || (pRxData == NULL) || (Size == 0)) - { - return HAL_ERROR; - } - /* Process Locked */ - __HAL_LOCK(husart); - - husart->pRxBuffPtr = pRxData; - husart->RxXferSize = Size; - husart->RxXferCount = Size; - husart->pTxBuffPtr = pTxData; - husart->TxXferSize = Size; - husart->TxXferCount = Size; - - /* Computation of USART mask to apply to RDR register */ - USART_MASK_COMPUTATION(husart); - - husart->ErrorCode = HAL_USART_ERROR_NONE; - husart->State = HAL_USART_STATE_BUSY_TX_RX; - - /* Enable the USART Data Register not empty Interrupt */ - __HAL_USART_ENABLE_IT(husart, USART_IT_RXNE); - - /* Enable the USART Parity Error Interrupt */ - __HAL_USART_ENABLE_IT(husart, USART_IT_PE); - - /* Enable the USART Error Interrupt: (Frame error, noise error, overrun error) */ - __HAL_USART_ENABLE_IT(husart, USART_IT_ERR); - - /* Process Unlocked */ - __HAL_UNLOCK(husart); - - /* Enable the USART Transmit Data Register Empty Interrupt */ - __HAL_USART_ENABLE_IT(husart, USART_IT_TXE); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } - -} - -/** - * @brief Send an amount of data in DMA mode. - * @param husart: USART handle. - * @param pTxData: pointer to data buffer. - * @param Size: amount of data to be sent. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_USART_Transmit_DMA(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size) -{ - uint32_t *tmp; - - if(husart->State == HAL_USART_STATE_READY) - { - if((pTxData == NULL ) || (Size == 0)) - { - return HAL_ERROR; - } - /* Process Locked */ - __HAL_LOCK(husart); - - husart->pTxBuffPtr = pTxData; - husart->TxXferSize = Size; - husart->TxXferCount = Size; - - husart->ErrorCode = HAL_USART_ERROR_NONE; - husart->State = HAL_USART_STATE_BUSY_TX; - - /* Set the USART DMA transfer complete callback */ - husart->hdmatx->XferCpltCallback = USART_DMATransmitCplt; - - /* Set the USART DMA Half transfer complete callback */ - husart->hdmatx->XferHalfCpltCallback = USART_DMATxHalfCplt; - - /* Set the DMA error callback */ - husart->hdmatx->XferErrorCallback = USART_DMAError; - - /* Enable the USART transmit DMA channel */ - tmp = (uint32_t*)&pTxData; - HAL_DMA_Start_IT(husart->hdmatx, *(uint32_t*)tmp, (uint32_t)&husart->Instance->TDR, Size); - - /* Clear the TC flag in the ICR register */ - __HAL_USART_CLEAR_FLAG(husart, USART_CLEAR_TCF); - - /* Enable the DMA transfer for transmit request by setting the DMAT bit - in the USART CR3 register */ - husart->Instance->CR3 |= USART_CR3_DMAT; - - /* Process Unlocked */ - __HAL_UNLOCK(husart); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Receive an amount of data in DMA mode. - * @param husart: USART handle. - * @param pRxData: pointer to data buffer. - * @param Size: amount of data to be received. - * @note When the USART parity is enabled (PCE = 1), the received data contain - * the parity bit (MSB position). - * @note The USART DMA transmit channel must be configured in order to generate the clock for the slave. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_USART_Receive_DMA(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size) -{ - uint32_t *tmp; - - if(husart->State == HAL_USART_STATE_READY) - { - if((pRxData == NULL ) || (Size == 0)) - { - return HAL_ERROR; - } - - /* Process Locked */ - __HAL_LOCK(husart); - - husart->pRxBuffPtr = pRxData; - husart->RxXferSize = Size; - husart->pTxBuffPtr = pRxData; - husart->TxXferSize = Size; - - husart->ErrorCode = HAL_USART_ERROR_NONE; - husart->State = HAL_USART_STATE_BUSY_RX; - - /* Set the USART DMA Rx transfer complete callback */ - husart->hdmarx->XferCpltCallback = USART_DMAReceiveCplt; - - /* Set the USART DMA Half transfer complete callback */ - husart->hdmarx->XferHalfCpltCallback = USART_DMARxHalfCplt; - - /* Set the USART DMA Rx transfer error callback */ - husart->hdmarx->XferErrorCallback = USART_DMAError; - - /* Enable the USART receive DMA channel */ - tmp = (uint32_t*)&pRxData; - HAL_DMA_Start_IT(husart->hdmarx, (uint32_t)&husart->Instance->RDR, *(uint32_t*)tmp, Size); - - /* Enable the USART transmit DMA channel: the transmit channel is used in order - to generate in the non-blocking mode the clock to the slave device, - this mode isn't a simplex receive mode but a full-duplex receive mode */ - tmp = (uint32_t*)&pRxData; - HAL_DMA_Start_IT(husart->hdmatx, *(uint32_t*)tmp, (uint32_t)&husart->Instance->TDR, Size); - - /* Enable the DMA transfer for the receiver request by setting the DMAR bit - in the USART CR3 register */ - husart->Instance->CR3 |= USART_CR3_DMAR; - - /* Enable the DMA transfer for transmit request by setting the DMAT bit - in the USART CR3 register */ - husart->Instance->CR3 |= USART_CR3_DMAT; - - /* Process Unlocked */ - __HAL_UNLOCK(husart); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Full-Duplex Transmit Receive an amount of data in non-blocking mode. - * @param husart: USART handle. - * @param pTxData: pointer to TX data buffer. - * @param pRxData: pointer to RX data buffer. - * @param Size: amount of data to be received/sent. - * @note When the USART parity is enabled (PCE = 1) the data received contain the parity bit. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_USART_TransmitReceive_DMA(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size) -{ - uint32_t *tmp; - - if(husart->State == HAL_USART_STATE_READY) - { - if((pTxData == NULL) || (pRxData == NULL) || (Size == 0)) - { - return HAL_ERROR; - } - /* Process Locked */ - __HAL_LOCK(husart); - - husart->pRxBuffPtr = pRxData; - husart->RxXferSize = Size; - husart->pTxBuffPtr = pTxData; - husart->TxXferSize = Size; - - husart->ErrorCode = HAL_USART_ERROR_NONE; - husart->State = HAL_USART_STATE_BUSY_TX_RX; - - /* Set the USART DMA Rx transfer complete callback */ - husart->hdmarx->XferCpltCallback = USART_DMAReceiveCplt; - - /* Set the USART DMA Half transfer complete callback */ - husart->hdmarx->XferHalfCpltCallback = USART_DMARxHalfCplt; - - /* Set the USART DMA Tx transfer complete callback */ - husart->hdmatx->XferCpltCallback = USART_DMATransmitCplt; - - /* Set the USART DMA Half transfer complete callback */ - husart->hdmatx->XferHalfCpltCallback = USART_DMATxHalfCplt; - - /* Set the USART DMA Tx transfer error callback */ - husart->hdmatx->XferErrorCallback = USART_DMAError; - - /* Set the USART DMA Rx transfer error callback */ - husart->hdmarx->XferErrorCallback = USART_DMAError; - - /* Enable the USART receive DMA channel */ - tmp = (uint32_t*)&pRxData; - HAL_DMA_Start_IT(husart->hdmarx, (uint32_t)&husart->Instance->RDR, *(uint32_t*)tmp, Size); - - /* Enable the USART transmit DMA channel */ - tmp = (uint32_t*)&pTxData; - HAL_DMA_Start_IT(husart->hdmatx, *(uint32_t*)tmp, (uint32_t)&husart->Instance->TDR, Size); - - /* Clear the TC flag in the ICR register */ - __HAL_USART_CLEAR_FLAG(husart, USART_CLEAR_TCF); - - /* Enable the DMA transfer for the receiver request by setting the DMAR bit - in the USART CR3 register */ - husart->Instance->CR3 |= USART_CR3_DMAR; - - /* Enable the DMA transfer for transmit request by setting the DMAT bit - in the USART CR3 register */ - husart->Instance->CR3 |= USART_CR3_DMAT; - - /* Process Unlocked */ - __HAL_UNLOCK(husart); - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Pause the DMA Transfer. - * @param husart: USART handle. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_USART_DMAPause(USART_HandleTypeDef *husart) -{ - /* Process Locked */ - __HAL_LOCK(husart); - - if(husart->State == HAL_USART_STATE_BUSY_TX) - { - /* Disable the USART DMA Tx request */ - husart->Instance->CR3 &= (uint32_t)(~USART_CR3_DMAT); - } - else if(husart->State == HAL_USART_STATE_BUSY_RX) - { - /* Disable the USART DMA Rx request */ - husart->Instance->CR3 &= (uint32_t)(~USART_CR3_DMAR); - } - else if(husart->State == HAL_USART_STATE_BUSY_TX_RX) - { - /* Disable the USART DMA Tx request */ - husart->Instance->CR3 &= (uint32_t)(~USART_CR3_DMAT); - /* Disable the USART DMA Rx request */ - husart->Instance->CR3 &= (uint32_t)(~USART_CR3_DMAR); - } - - /* Process Unlocked */ - __HAL_UNLOCK(husart); - - return HAL_OK; -} - -/** - * @brief Resume the DMA Transfer. - * @param husart: USART handle. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_USART_DMAResume(USART_HandleTypeDef *husart) -{ - /* Process Locked */ - __HAL_LOCK(husart); - - if(husart->State == HAL_USART_STATE_BUSY_TX) - { - /* Enable the USART DMA Tx request */ - husart->Instance->CR3 |= USART_CR3_DMAT; - } - else if(husart->State == HAL_USART_STATE_BUSY_RX) - { - /* Clear the Overrun flag before resuming the Rx transfer*/ - __HAL_USART_CLEAR_FLAG(husart, USART_CLEAR_OREF); - - /* Enable the USART DMA Rx request */ - husart->Instance->CR3 |= USART_CR3_DMAR; - } - else if(husart->State == HAL_USART_STATE_BUSY_TX_RX) - { - /* Clear the Overrun flag before resuming the Rx transfer*/ - __HAL_USART_CLEAR_FLAG(husart, USART_CLEAR_OREF); - - /* Enable the USART DMA Rx request before the DMA Tx request */ - husart->Instance->CR3 |= USART_CR3_DMAR; - - /* Enable the USART DMA Tx request */ - husart->Instance->CR3 |= USART_CR3_DMAT; - } - - /* Process Unlocked */ - __HAL_UNLOCK(husart); - - return HAL_OK; -} - -/** - * @brief Stop the DMA Transfer. - * @param husart: USART handle. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_USART_DMAStop(USART_HandleTypeDef *husart) -{ - /* The Lock is not implemented on this API to allow the user application - to call the HAL USART API under callbacks HAL_USART_TxCpltCallback() / HAL_USART_RxCpltCallback() / - HAL_USART_TxHalfCpltCallback / HAL_USART_RxHalfCpltCallback: - indeed, when HAL_DMA_Abort() API is called, the DMA TX/RX Transfer or Half Transfer complete - interrupt is generated if the DMA transfer interruption occurs at the middle or at the end of - the stream and the corresponding call back is executed. */ - - /* Disable the USART Tx/Rx DMA requests */ - husart->Instance->CR3 &= ~USART_CR3_DMAT; - husart->Instance->CR3 &= ~USART_CR3_DMAR; - - /* Abort the USART DMA tx channel */ - if(husart->hdmatx != NULL) - { - HAL_DMA_Abort(husart->hdmatx); - } - /* Abort the USART DMA rx channel */ - if(husart->hdmarx != NULL) - { - HAL_DMA_Abort(husart->hdmarx); - } - - husart->State = HAL_USART_STATE_READY; - - return HAL_OK; -} - -/** - * @brief Handle USART interrupt request. - * @param husart: USART handle. - * @retval None - */ -void HAL_USART_IRQHandler(USART_HandleTypeDef *husart) -{ - - /* USART parity error interrupt occurred ------------------------------------*/ - if((__HAL_USART_GET_IT(husart, USART_IT_PE) != RESET) && (__HAL_USART_GET_IT_SOURCE(husart, USART_IT_PE) != RESET)) - { - __HAL_USART_CLEAR_IT(husart, USART_CLEAR_PEF); - husart->ErrorCode |= HAL_USART_ERROR_PE; - /* Set the USART state ready to be able to start again the process */ - husart->State = HAL_USART_STATE_READY; - } - - /* USART frame error interrupt occurred -------------------------------------*/ - if((__HAL_USART_GET_IT(husart, USART_IT_FE) != RESET) && (__HAL_USART_GET_IT_SOURCE(husart, USART_IT_ERR) != RESET)) - { - __HAL_USART_CLEAR_IT(husart, USART_CLEAR_FEF); - husart->ErrorCode |= HAL_USART_ERROR_FE; - /* Set the USART state ready to be able to start again the process */ - husart->State = HAL_USART_STATE_READY; - } - - /* USART noise error interrupt occurred -------------------------------------*/ - if((__HAL_USART_GET_IT(husart, USART_IT_NE) != RESET) && (__HAL_USART_GET_IT_SOURCE(husart, USART_IT_ERR) != RESET)) - { - __HAL_USART_CLEAR_IT(husart, USART_CLEAR_NEF); - husart->ErrorCode |= HAL_USART_ERROR_NE; - /* Set the USART state ready to be able to start again the process */ - husart->State = HAL_USART_STATE_READY; - } - - /* USART Over-Run interrupt occurred ----------------------------------------*/ - if((__HAL_USART_GET_IT(husart, USART_IT_ORE) != RESET) && (__HAL_USART_GET_IT_SOURCE(husart, USART_IT_ERR) != RESET)) - { - __HAL_USART_CLEAR_IT(husart, USART_CLEAR_OREF); - husart->ErrorCode |= HAL_USART_ERROR_ORE; - /* Set the USART state ready to be able to start again the process */ - husart->State = HAL_USART_STATE_READY; - } - - /* Call USART Error Call back function if need be --------------------------*/ - if(husart->ErrorCode != HAL_USART_ERROR_NONE) - { - HAL_USART_ErrorCallback(husart); - } - - /* USART in mode Receiver --------------------------------------------------*/ - if((__HAL_USART_GET_IT(husart, USART_IT_RXNE) != RESET) && (__HAL_USART_GET_IT_SOURCE(husart, USART_IT_RXNE) != RESET)) - { - if(husart->State == HAL_USART_STATE_BUSY_RX) - { - USART_Receive_IT(husart); - } - else - { - USART_TransmitReceive_IT(husart); - } - } - - /* USART in mode Transmitter -----------------------------------------------*/ - if((__HAL_USART_GET_IT(husart, USART_IT_TXE) != RESET) &&(__HAL_USART_GET_IT_SOURCE(husart, USART_IT_TXE) != RESET)) - { - if(husart->State == HAL_USART_STATE_BUSY_TX) - { - USART_Transmit_IT(husart); - } - else - { - USART_TransmitReceive_IT(husart); - } - } - - /* USART in mode Transmitter (transmission end) -----------------------------*/ - if((__HAL_USART_GET_IT(husart, USART_IT_TC) != RESET) &&(__HAL_USART_GET_IT_SOURCE(husart, USART_IT_TC) != RESET)) - { - USART_EndTransmit_IT(husart); - } - -} - -/** - * @brief Tx Transfer completed callback. - * @param husart: USART handle. - * @retval None - */ -__weak void HAL_USART_TxCpltCallback(USART_HandleTypeDef *husart) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_USART_TxCpltCallback can be implemented in the user file. - */ -} - -/** - * @brief Tx Half Transfer completed callback. - * @param husart: USART handle. - * @retval None - */ - __weak void HAL_USART_TxHalfCpltCallback(USART_HandleTypeDef *husart) -{ - /* NOTE: This function should not be modified, when the callback is needed, - the HAL_USART_TxHalfCpltCallback can be implemented in the user file. - */ -} - -/** - * @brief Rx Transfer completed callback. - * @param husart: USART handle. - * @retval None - */ -__weak void HAL_USART_RxCpltCallback(USART_HandleTypeDef *husart) -{ - /* NOTE: This function should not be modified, when the callback is needed, - the HAL_USART_RxCpltCallback can be implemented in the user file. - */ -} - -/** - * @brief Rx Half Transfer completed callback. - * @param husart: USART handle. - * @retval None - */ -__weak void HAL_USART_RxHalfCpltCallback(USART_HandleTypeDef *husart) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_USART_RxHalfCpltCallback can be implemented in the user file - */ -} - -/** - * @brief Tx/Rx Transfers completed callback for the non-blocking process. - * @param husart: USART handle. - * @retval None - */ -__weak void HAL_USART_TxRxCpltCallback(USART_HandleTypeDef *husart) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_USART_TxRxCpltCallback can be implemented in the user file - */ -} - -/** - * @brief USART error callback. - * @param husart: USART handle. - * @retval None - */ -__weak void HAL_USART_ErrorCallback(USART_HandleTypeDef *husart) -{ - /* NOTE : This function should not be modified, when the callback is needed, - the HAL_USART_ErrorCallback can be implemented in the user file. - */ -} - -/** - * @} - */ - -/** @defgroup USART_Exported_Functions_Group4 Peripheral State and Error functions - * @brief USART Peripheral State and Error functions - * -@verbatim - ============================================================================== - ##### Peripheral State and Error functions ##### - ============================================================================== - [..] - This subsection provides functions allowing to : - (+) Return the USART handle state - (+) Return the USART handle error code - -@endverbatim - * @{ - */ - - -/** - * @brief Return the USART handle state. - * @param husart : pointer to a USART_HandleTypeDef structure that contains - * the configuration information for the specified USART. - * @retval USART handle state - */ -HAL_USART_StateTypeDef HAL_USART_GetState(USART_HandleTypeDef *husart) -{ - return husart->State; -} - -/** - * @brief Return the USART error code. - * @param husart : pointer to a USART_HandleTypeDef structure that contains - * the configuration information for the specified USART. - * @retval USART handle Error Code - */ -uint32_t HAL_USART_GetError(USART_HandleTypeDef *husart) -{ - return husart->ErrorCode; -} - -/** - * @} - */ - -/** - * @} - */ - -/** @defgroup USART_Private_Functions USART Private Functions - * @{ - */ - -/** - * @brief DMA USART transmit process complete callback. - * @param hdma: DMA handle. - * @retval None - */ -static void USART_DMATransmitCplt(DMA_HandleTypeDef *hdma) -{ - USART_HandleTypeDef* husart = ( USART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; - - /* DMA Normal mode */ - if ( HAL_IS_BIT_CLR(hdma->Instance->CCR, DMA_CCR_CIRC) ) - { - husart->TxXferCount = 0; - - if(husart->State == HAL_USART_STATE_BUSY_TX) - { - /* Disable the DMA transfer for transmit request by resetting the DMAT bit - in the USART CR3 register */ - husart->Instance->CR3 &= ~(USART_CR3_DMAT); - - /* Enable the USART Transmit Complete Interrupt */ - __HAL_USART_ENABLE_IT(husart, USART_IT_TC); - } - } - /* DMA Circular mode */ - else - { - if(husart->State == HAL_USART_STATE_BUSY_TX) - { - HAL_USART_TxCpltCallback(husart); - } - } -} - - -/** - * @brief DMA USART transmit process half complete callback. - * @param hdma : DMA handle. - * @retval None - */ -static void USART_DMATxHalfCplt(DMA_HandleTypeDef *hdma) -{ - USART_HandleTypeDef* husart = (USART_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; - - HAL_USART_TxHalfCpltCallback(husart); -} - -/** - * @brief DMA USART receive process complete callback. - * @param hdma: DMA handle. - * @retval None - */ -static void USART_DMAReceiveCplt(DMA_HandleTypeDef *hdma) -{ - USART_HandleTypeDef* husart = ( USART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; - - /* DMA Normal mode */ - if ( HAL_IS_BIT_CLR(hdma->Instance->CCR, DMA_CCR_CIRC) ) - { - husart->RxXferCount = 0; - - /* Disable the DMA RX transfer for the receiver request by resetting the DMAR bit - in USART CR3 register */ - husart->Instance->CR3 &= (uint32_t)~((uint32_t)USART_CR3_DMAR); - /* similarly, disable the DMA TX transfer that was started to provide the - clock to the slave device */ - husart->Instance->CR3 &= (uint32_t)~((uint32_t)USART_CR3_DMAT); - - if(husart->State == HAL_USART_STATE_BUSY_RX) - { - HAL_USART_RxCpltCallback(husart); - } - /* The USART state is HAL_USART_STATE_BUSY_TX_RX */ - else - { - HAL_USART_TxRxCpltCallback(husart); - } - husart->State= HAL_USART_STATE_READY; - } - /* DMA circular mode */ - else - { - if(husart->State == HAL_USART_STATE_BUSY_RX) - { - HAL_USART_RxCpltCallback(husart); - } - /* The USART state is HAL_USART_STATE_BUSY_TX_RX */ - else - { - HAL_USART_TxRxCpltCallback(husart); - } - } - -} - -/** - * @brief DMA USART receive process half complete callback. - * @param hdma : DMA handle. - * @retval None - */ -static void USART_DMARxHalfCplt(DMA_HandleTypeDef *hdma) -{ - USART_HandleTypeDef* husart = (USART_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; - - HAL_USART_RxHalfCpltCallback(husart); -} - -/** - * @brief DMA USART communication error callback. - * @param hdma: DMA handle. - * @retval None - */ -static void USART_DMAError(DMA_HandleTypeDef *hdma) -{ - USART_HandleTypeDef* husart = ( USART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; - - husart->RxXferCount = 0; - husart->TxXferCount = 0; - husart->ErrorCode |= HAL_USART_ERROR_DMA; - husart->State= HAL_USART_STATE_READY; - - HAL_USART_ErrorCallback(husart); -} - -/** - * @brief Handle USART Communication Timeout. - * @param husart: USART handle. - * @param Flag: specifies the USART flag to check. - * @param Status: the Flag status (SET or RESET). - * @param Timeout: timeout duration. - * @retval HAL status - */ -static HAL_StatusTypeDef USART_WaitOnFlagUntilTimeout(USART_HandleTypeDef *husart, uint32_t Flag, FlagStatus Status, uint32_t Timeout) -{ - uint32_t tickstart = HAL_GetTick(); - - /* Wait until flag is set */ - if(Status == RESET) - { - while(__HAL_USART_GET_FLAG(husart, Flag) == RESET) - { - /* Check for the Timeout */ - if(Timeout != HAL_MAX_DELAY) - { - if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout)) - { - /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */ - __HAL_USART_DISABLE_IT(husart, USART_IT_TXE); - __HAL_USART_DISABLE_IT(husart, USART_IT_RXNE); - __HAL_USART_DISABLE_IT(husart, USART_IT_PE); - __HAL_USART_DISABLE_IT(husart, USART_IT_ERR); - - husart->State= HAL_USART_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(husart); - - return HAL_TIMEOUT; - } - } - } - } - else - { - while(__HAL_USART_GET_FLAG(husart, Flag) != RESET) - { - /* Check for the Timeout */ - if(Timeout != HAL_MAX_DELAY) - { - if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout)) - { - /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */ - __HAL_USART_DISABLE_IT(husart, USART_IT_TXE); - __HAL_USART_DISABLE_IT(husart, USART_IT_RXNE); - __HAL_USART_DISABLE_IT(husart, USART_IT_PE); - __HAL_USART_DISABLE_IT(husart, USART_IT_ERR); - - husart->State= HAL_USART_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(husart); - - return HAL_TIMEOUT; - } - } - } - } - return HAL_OK; -} - -/** - * @brief Configure the USART peripheral. - * @param husart: USART handle. - * @retval HAL status - */ -static HAL_StatusTypeDef USART_SetConfig(USART_HandleTypeDef *husart) -{ - uint32_t tmpreg = 0x0; - USART_ClockSourceTypeDef clocksource = USART_CLOCKSOURCE_UNDEFINED; - HAL_StatusTypeDef ret = HAL_OK; - uint16_t brrtemp = 0x0000; - uint16_t usartdiv = 0x0000; - - /* Check the parameters */ - assert_param(IS_USART_POLARITY(husart->Init.CLKPolarity)); - assert_param(IS_USART_PHASE(husart->Init.CLKPhase)); - assert_param(IS_USART_LASTBIT(husart->Init.CLKLastBit)); - assert_param(IS_USART_BAUDRATE(husart->Init.BaudRate)); - assert_param(IS_USART_WORD_LENGTH(husart->Init.WordLength)); - assert_param(IS_USART_STOPBITS(husart->Init.StopBits)); - assert_param(IS_USART_PARITY(husart->Init.Parity)); - assert_param(IS_USART_MODE(husart->Init.Mode)); - - - /*-------------------------- USART CR1 Configuration -----------------------*/ - /* Clear M, PCE, PS, TE and RE bits and configure - * the USART Word Length, Parity and Mode: - * set the M bits according to husart->Init.WordLength value - * set PCE and PS bits according to husart->Init.Parity value - * set TE and RE bits according to husart->Init.Mode value - * force OVER8 to 1 to allow to reach the maximum speed (Fclock/8) */ - tmpreg = (uint32_t)husart->Init.WordLength | husart->Init.Parity | husart->Init.Mode | USART_CR1_OVER8; - MODIFY_REG(husart->Instance->CR1, USART_CR1_FIELDS, tmpreg); - - /*---------------------------- USART CR2 Configuration ---------------------*/ - /* Clear and configure the USART Clock, CPOL, CPHA, LBCL and STOP bits: - * set CPOL bit according to husart->Init.CLKPolarity value - * set CPHA bit according to husart->Init.CLKPhase value - * set LBCL bit according to husart->Init.CLKLastBit value - * set STOP[13:12] bits according to husart->Init.StopBits value */ - tmpreg = (uint32_t)(USART_CLOCK_ENABLE); - tmpreg |= ((uint32_t)husart->Init.CLKPolarity | (uint32_t)husart->Init.CLKPhase); - tmpreg |= ((uint32_t)husart->Init.CLKLastBit | (uint32_t)husart->Init.StopBits); - MODIFY_REG(husart->Instance->CR2, USART_CR2_FIELDS, tmpreg); - - /*-------------------------- USART CR3 Configuration -----------------------*/ - /* no CR3 register configuration */ - - /*-------------------------- USART BRR Configuration -----------------------*/ - /* BRR is filled-up according to OVER8 bit setting which is forced to 1 */ - USART_GETCLOCKSOURCE(husart, clocksource); - switch (clocksource) - { - case USART_CLOCKSOURCE_PCLK1: - usartdiv = (uint16_t)((2*HAL_RCC_GetPCLK1Freq()) / husart->Init.BaudRate); - break; - case USART_CLOCKSOURCE_PCLK2: - usartdiv = (uint16_t)((2*HAL_RCC_GetPCLK2Freq()) / husart->Init.BaudRate); - break; - case USART_CLOCKSOURCE_HSI: - usartdiv = (uint16_t)((2*HSI_VALUE) / husart->Init.BaudRate); - break; - case USART_CLOCKSOURCE_SYSCLK: - usartdiv = (uint16_t)((2*HAL_RCC_GetSysClockFreq()) / husart->Init.BaudRate); - break; - case USART_CLOCKSOURCE_LSE: - usartdiv = (uint16_t)((2*LSE_VALUE) / husart->Init.BaudRate); - break; - case USART_CLOCKSOURCE_UNDEFINED: - default: - ret = HAL_ERROR; - break; - } - - brrtemp = usartdiv & 0xFFF0; - brrtemp |= (uint16_t)((usartdiv & (uint16_t)0x000F) >> 1U); - husart->Instance->BRR = brrtemp; - - return ret; -} - -/** - * @brief Check the USART Idle State. - * @param husart: USART handle. - * @retval HAL status - */ -static HAL_StatusTypeDef USART_CheckIdleState(USART_HandleTypeDef *husart) -{ - /* Initialize the USART ErrorCode */ - husart->ErrorCode = HAL_USART_ERROR_NONE; - - /* Check if the Transmitter is enabled */ - if((husart->Instance->CR1 & USART_CR1_TE) == USART_CR1_TE) - { - /* Wait until TEACK flag is set */ - if(USART_WaitOnFlagUntilTimeout(husart, USART_ISR_TEACK, RESET, USART_TEACK_REACK_TIMEOUT) != HAL_OK) - { - /* Timeout occurred */ - return HAL_TIMEOUT; - } - } - /* Check if the Receiver is enabled */ - if((husart->Instance->CR1 & USART_CR1_RE) == USART_CR1_RE) - { - /* Wait until REACK flag is set */ - if(USART_WaitOnFlagUntilTimeout(husart, USART_ISR_REACK, RESET, USART_TEACK_REACK_TIMEOUT) != HAL_OK) - { - /* Timeout occurred */ - return HAL_TIMEOUT; - } - } - - /* Initialize the USART state*/ - husart->State= HAL_USART_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(husart); - - return HAL_OK; -} - -/** - * @brief Simplex send an amount of data in non-blocking mode. - * @note Function called under interruption only, once - * interruptions have been enabled by HAL_USART_Transmit_IT(). - * @note The USART errors are not managed to avoid the overrun error. - * @param husart: USART handle. - * @retval HAL status - */ -static HAL_StatusTypeDef USART_Transmit_IT(USART_HandleTypeDef *husart) -{ - uint16_t* tmp; - - if(husart->State == HAL_USART_STATE_BUSY_TX) - { - - if(husart->TxXferCount == 0) - { - /* Disable the USART Transmit Complete Interrupt */ - __HAL_USART_DISABLE_IT(husart, USART_IT_TXE); - - /* Enable the USART Transmit Complete Interrupt */ - __HAL_USART_ENABLE_IT(husart, USART_IT_TC); - - return HAL_OK; - } - else - { - if((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE)) - { - tmp = (uint16_t*) husart->pTxBuffPtr; - husart->Instance->TDR = (*tmp & (uint16_t)0x01FF); - husart->pTxBuffPtr += 2; - } - else - { - husart->Instance->TDR = (uint8_t)(*husart->pTxBuffPtr++ & (uint8_t)0xFF); - } - - husart->TxXferCount--; - - return HAL_OK; - } - } - else - { - return HAL_BUSY; - } -} - - -/** - * @brief Wraps up transmission in non-blocking mode. - * @param husart: pointer to a USART_HandleTypeDef structure that contains - * the configuration information for the specified USART module. - * @retval HAL status - */ -static HAL_StatusTypeDef USART_EndTransmit_IT(USART_HandleTypeDef *husart) -{ - /* Disable the USART Transmit Complete Interrupt */ - __HAL_USART_DISABLE_IT(husart, USART_IT_TC); - - /* Disable the USART Error Interrupt: (Frame error, noise error, overrun error) */ - __HAL_USART_DISABLE_IT(husart, USART_IT_ERR); - - husart->State = HAL_USART_STATE_READY; - - HAL_USART_TxCpltCallback(husart); - - return HAL_OK; -} - - -/** - * @brief Simplex receive an amount of data in non-blocking mode. - * @note Function called under interruption only, once - * interruptions have been enabled by HAL_USART_Receive_IT(). - * @param husart: USART handle - * @retval HAL status - */ -static HAL_StatusTypeDef USART_Receive_IT(USART_HandleTypeDef *husart) -{ - uint16_t* tmp; - uint16_t uhMask = husart->Mask; - - if(husart->State == HAL_USART_STATE_BUSY_RX) - { - - if((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE)) - { - tmp = (uint16_t*) husart->pRxBuffPtr; - *tmp = (uint16_t)(husart->Instance->RDR & uhMask); - husart->pRxBuffPtr += 2; - } - else - { - *husart->pRxBuffPtr++ = (uint8_t)(husart->Instance->RDR & (uint8_t)uhMask); - } - /* Send dummy byte in order to generate the clock for the Slave to Send the next data */ - husart->Instance->TDR = (USART_DUMMY_DATA & (uint16_t)0x00FF); - - if(--husart->RxXferCount == 0) - { - __HAL_USART_DISABLE_IT(husart, USART_IT_RXNE); - - /* Disable the USART Parity Error Interrupt */ - __HAL_USART_DISABLE_IT(husart, USART_IT_PE); - - /* Disable the USART Error Interrupt: (Frame error, noise error, overrun error) */ - __HAL_USART_DISABLE_IT(husart, USART_IT_ERR); - - husart->State = HAL_USART_STATE_READY; - - HAL_USART_RxCpltCallback(husart); - - return HAL_OK; - } - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @brief Full-Duplex Send receive an amount of data in full-duplex mode (non-blocking). - * @note Function called under interruption only, once - * interruptions have been enabled by HAL_USART_TransmitReceive_IT(). - * @param husart: USART handle. - * @retval HAL status - */ -static HAL_StatusTypeDef USART_TransmitReceive_IT(USART_HandleTypeDef *husart) -{ - uint16_t* tmp; - uint16_t uhMask = husart->Mask; - - if(husart->State == HAL_USART_STATE_BUSY_TX_RX) - { - - if(husart->TxXferCount != 0x00) - { - if(__HAL_USART_GET_FLAG(husart, USART_FLAG_TXE) != RESET) - { - if((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE)) - { - tmp = (uint16_t*) husart->pTxBuffPtr; - husart->Instance->TDR = (uint16_t)(*tmp & uhMask); - husart->pTxBuffPtr += 2; - } - else - { - husart->Instance->TDR = (uint8_t)(*husart->pTxBuffPtr++ & (uint8_t)uhMask); - } - husart->TxXferCount--; - - /* Check the latest data transmitted */ - if(husart->TxXferCount == 0) - { - __HAL_USART_DISABLE_IT(husart, USART_IT_TXE); - } - } - } - - if(husart->RxXferCount != 0x00) - { - if(__HAL_USART_GET_FLAG(husart, USART_FLAG_RXNE) != RESET) - { - if((husart->Init.WordLength == USART_WORDLENGTH_9B) && (husart->Init.Parity == USART_PARITY_NONE)) - { - tmp = (uint16_t*) husart->pRxBuffPtr; - *tmp = (uint16_t)(husart->Instance->RDR & uhMask); - husart->pRxBuffPtr += 2; - } - else - { - *husart->pRxBuffPtr++ = (uint8_t)(husart->Instance->RDR & (uint8_t)uhMask); - } - husart->RxXferCount--; - } - } - - /* Check the latest data received */ - if(husart->RxXferCount == 0) - { - __HAL_USART_DISABLE_IT(husart, USART_IT_RXNE); - - /* Disable the USART Parity Error Interrupt */ - __HAL_USART_DISABLE_IT(husart, USART_IT_PE); - - /* Disable the USART Error Interrupt: (Frame error, noise error, overrun error) */ - __HAL_USART_DISABLE_IT(husart, USART_IT_ERR); - - husart->State = HAL_USART_STATE_READY; - - HAL_USART_TxRxCpltCallback(husart); - - return HAL_OK; - } - - return HAL_OK; - } - else - { - return HAL_BUSY; - } -} - -/** - * @} - */ - -#endif /* HAL_USART_MODULE_ENABLED */ -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ -
--- a/Src/stm32l4xx_hal_wwdg.c Thu Nov 12 20:49:49 2015 +0000 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,459 +0,0 @@ -/** - ****************************************************************************** - * @file stm32l4xx_hal_wwdg.c - * @author MCD Application Team - * @version V1.1.0 - * @date 16-September-2015 - * @brief WWDG HAL module driver. - * This file provides firmware functions to manage the following - * functionalities of the Window Watchdog (WWDG) peripheral: - * + Initialization and de-initialization functions - * + IO operation functions - * + Peripheral State functions - @verbatim - ============================================================================== - ##### WWDG specific features ##### - ============================================================================== - [..] - Once enabled the WWDG generates a system reset on expiry of a programmed - time period, unless the program refreshes the counter (T[6;0] downcounter) - before reaching 0x3F value (i.e. a reset is generated when the counter - value rolls over from 0x40 to 0x3F). - - (+) An MCU reset is also generated if the counter value is refreshed - before the counter has reached the refresh window value. This - implies that the counter must be refreshed in a limited window. - (+) Once enabled the WWDG cannot be disabled except by a system reset. - (+) WWDGRST flag in RCC_CSR register informs when a WWDG reset has - occurred (check available with __HAL_RCC_GET_FLAG(RCC_FLAG_WWDGRST)). - (+) The WWDG counter input clock is derived from the APB clock divided - by a programmable prescaler. - (+) WWDG clock (Hz) = PCLK1 / (4096 * Prescaler) - (+) WWDG timeout (mS) = 1000 * (T[5;0] + 1) / WWDG clock - where T[5;0] are the lowest 6 bits of Counter. - (+) WWDG Counter refresh is allowed between the following limits : - (++) min time (mS) = 1000 * (Counter - Window) / WWDG clock - (++) max time (mS) = 1000 * (Counter - 0x40) / WWDG clock - (+) Min-max timeout value @80 MHz(PCLK1): ~51.2 us / ~26.22 ms - - - ##### How to use this driver ##### - ============================================================================== - [..] - (+) Enable WWDG APB1 clock using __HAL_RCC_WWDG_CLK_ENABLE(). - (+) Set the WWDG prescaler, refresh window and counter value - using HAL_WWDG_Init() function. - (+) Start the WWDG using HAL_WWDG_Start() function. - When the WWDG is enabled the counter value should be configured to - a value greater than 0x40 to prevent generating an immediate reset. - (+) Optionally you can enable the Early Wakeup Interrupt (EWI) which is - generated when the counter reaches 0x40, and then start the WWDG using - HAL_WWDG_Start_IT(). At EWI HAL_WWDG_WakeupCallback() is executed and user can - add his own code by customization of function pointer HAL_WWDG_WakeupCallback(). - Once enabled, EWI interrupt cannot be disabled except by a system reset. - (+) The application program must refresh the WWDG counter at regular - intervals during normal operation to prevent an MCU reset using - HAL_WWDG_Refresh() function. This operation must occur only when - the counter is lower than the refresh window value already programmed. - - *** WWDG HAL driver macros list *** - ================================== - [..] - Below the list of most used macros in WWDG HAL driver. - - (+) __HAL_WWDG_ENABLE: Enable the WWDG peripheral - (+) __HAL_WWDG_ENABLE_IT: Enable the WWDG early wakeup interrupt - (+) __HAL_WWDG_GET_IT_SOURCE: Check the selected WWDG's interrupt source - (+) __HAL_WWDG_GET_FLAG: Get the selected WWDG's flag status - (+) __HAL_WWDG_CLEAR_FLAG: Clear the WWDG's pending flags - - @endverbatim - ****************************************************************************** - * @attention - * - * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * 1. Redistributions of source code must retain the above copyright notice, - * this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * 3. Neither the name of STMicroelectronics nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR - * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER - * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - ****************************************************************************** - */ - -/* Includes ------------------------------------------------------------------*/ -#include "stm32l4xx_hal.h" - -/** @addtogroup STM32L4xx_HAL_Driver - * @{ - */ - -/** @defgroup WWDG WWDG - * @brief WWDG HAL module driver. - * @{ - */ - -#ifdef HAL_WWDG_MODULE_ENABLED - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -/* Private macro -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ -/* Exported functions --------------------------------------------------------*/ - -/** @defgroup WWDG_Exported_Functions WWDG Exported Functions - * @{ - */ - -/** @defgroup WWDG_Exported_Functions_Group1 Initialization and de-initialization functions - * @brief Initialization and Configuration functions. - * -@verbatim - ============================================================================== - ##### Initialization and de-initialization functions ##### - ============================================================================== - [..] - This section provides functions allowing to: - (+) Initialize the WWDG according to the specified parameters - in the WWDG_InitTypeDef and initialize the associated handle. - (+) DeInitialize the WWDG peripheral. - (+) Initialize the WWDG MSP. - (+) DeInitialize the WWDG MSP. - -@endverbatim - * @{ - */ - -/** - * @brief Initialize the WWDG according to the specified - * parameters in the WWDG_InitTypeDef and initialize the associated handle. - * @param hwwdg: pointer to a WWDG_HandleTypeDef structure that contains - * the configuration information for the specified WWDG module. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_WWDG_Init(WWDG_HandleTypeDef *hwwdg) -{ - /* Check the WWDG handle allocation */ - if(hwwdg == NULL) - { - return HAL_ERROR; - } - - /* Check the parameters */ - assert_param(IS_WWDG_ALL_INSTANCE(hwwdg->Instance)); - assert_param(IS_WWDG_PRESCALER(hwwdg->Init.Prescaler)); - assert_param(IS_WWDG_WINDOW(hwwdg->Init.Window)); - assert_param(IS_WWDG_COUNTER(hwwdg->Init.Counter)); - - if(hwwdg->State == HAL_WWDG_STATE_RESET) - { - /* Allocate lock resource and initialize it */ - hwwdg->Lock = HAL_UNLOCKED; - - /* Init the low level hardware */ - HAL_WWDG_MspInit(hwwdg); - } - - /* Change WWDG peripheral state */ - hwwdg->State = HAL_WWDG_STATE_BUSY; - - /* Set WWDG Prescaler and Window */ - MODIFY_REG(hwwdg->Instance->CFR, (WWDG_CFR_WDGTB | WWDG_CFR_W), (hwwdg->Init.Prescaler | hwwdg->Init.Window)); - - /* Set WWDG Counter */ - MODIFY_REG(hwwdg->Instance->CR, WWDG_CR_T, hwwdg->Init.Counter); - - /* Change WWDG peripheral state */ - hwwdg->State = HAL_WWDG_STATE_READY; - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief DeInitialize the WWDG peripheral. - * @param hwwdg: pointer to a WWDG_HandleTypeDef structure that contains - * the configuration information for the specified WWDG module. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_WWDG_DeInit(WWDG_HandleTypeDef *hwwdg) -{ - /* Check the WWDG handle allocation */ - if(hwwdg == NULL) - { - return HAL_ERROR; - } - - /* Check the parameters */ - assert_param(IS_WWDG_ALL_INSTANCE(hwwdg->Instance)); - - /* Change WWDG peripheral state */ - hwwdg->State = HAL_WWDG_STATE_BUSY; - - /* DeInit the low level hardware */ - HAL_WWDG_MspDeInit(hwwdg); - - /* Reset WWDG Control register */ - hwwdg->Instance->CR = (uint32_t)0x0000007F; - - /* Reset WWDG Configuration register */ - hwwdg->Instance->CFR = (uint32_t)0x0000007F; - - /* Reset WWDG Status register */ - hwwdg->Instance->SR = 0; - - /* Change WWDG peripheral state */ - hwwdg->State = HAL_WWDG_STATE_RESET; - - /* Release Lock */ - __HAL_UNLOCK(hwwdg); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Initialize the WWDG MSP. - * @param hwwdg: pointer to a WWDG_HandleTypeDef structure that contains - * the configuration information for the specified WWDG module. - * @retval None - */ -__weak void HAL_WWDG_MspInit(WWDG_HandleTypeDef *hwwdg) -{ - /* NOTE: This function should not be modified, when the callback is needed, - the HAL_WWDG_MspInit could be implemented in the user file - */ -} - -/** - * @brief DeInitialize the WWDG MSP. - * @param hwwdg: pointer to a WWDG_HandleTypeDef structure that contains - * the configuration information for the specified WWDG module. - * @retval None - */ -__weak void HAL_WWDG_MspDeInit(WWDG_HandleTypeDef *hwwdg) -{ - /* NOTE: This function should not be modified, when the callback is needed, - the HAL_WWDG_MspDeInit could be implemented in the user file - */ -} - -/** - * @} - */ - -/** @defgroup WWDG_Exported_Functions_Group2 IO operation functions - * @brief IO operation functions - * -@verbatim - ============================================================================== - ##### IO operation functions ##### - ============================================================================== - [..] - This section provides functions allowing to: - (+) Start the WWDG. - (+) Refresh the WWDG. - (+) Handle WWDG interrupt request and associated function callback. - -@endverbatim - * @{ - */ - -/** - * @brief Start the WWDG. - * @param hwwdg: pointer to a WWDG_HandleTypeDef structure that contains - * the configuration information for the specified WWDG module. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_WWDG_Start(WWDG_HandleTypeDef *hwwdg) -{ - /* Process Locked */ - __HAL_LOCK(hwwdg); - - /* Change WWDG peripheral state */ - hwwdg->State = HAL_WWDG_STATE_BUSY; - - /* Enable the peripheral */ - __HAL_WWDG_ENABLE(hwwdg); - - /* Change WWDG peripheral state */ - hwwdg->State = HAL_WWDG_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hwwdg); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Start the WWDG with interrupt enabled. - * @param hwwdg: pointer to a WWDG_HandleTypeDef structure that contains - * the configuration information for the specified WWDG module. - * @retval HAL status - */ -HAL_StatusTypeDef HAL_WWDG_Start_IT(WWDG_HandleTypeDef *hwwdg) -{ - /* Process Locked */ - __HAL_LOCK(hwwdg); - - /* Change WWDG peripheral state */ - hwwdg->State = HAL_WWDG_STATE_BUSY; - - /* Enable the Early Wakeup Interrupt */ - __HAL_WWDG_ENABLE_IT(hwwdg, WWDG_IT_EWI); - - /* Enable the peripheral */ - __HAL_WWDG_ENABLE(hwwdg); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Refresh the WWDG. - * @param hwwdg: pointer to a WWDG_HandleTypeDef structure that contains - * the configuration information for the specified WWDG module. - * @param Counter: value of counter to put in WWDG counter - * @retval HAL status - */ -HAL_StatusTypeDef HAL_WWDG_Refresh(WWDG_HandleTypeDef *hwwdg, uint32_t Counter) -{ - /* Process Locked */ - __HAL_LOCK(hwwdg); - - /* Change WWDG peripheral state */ - hwwdg->State = HAL_WWDG_STATE_BUSY; - - /* Check the parameters */ - assert_param(IS_WWDG_COUNTER(Counter)); - - /* Write to WWDG CR the WWDG Counter value to refresh with */ - MODIFY_REG(hwwdg->Instance->CR, (uint32_t)WWDG_CR_T, Counter); - - /* Change WWDG peripheral state */ - hwwdg->State = HAL_WWDG_STATE_READY; - - /* Process Unlocked */ - __HAL_UNLOCK(hwwdg); - - /* Return function status */ - return HAL_OK; -} - -/** - * @brief Handle WWDG interrupt request. - * @note The Early Wakeup Interrupt (EWI) can be used if specific safety operations - * or data logging must be performed before the actual reset is generated. - * The EWI interrupt is enabled when calling HAL_WWDG_Start_IT function. - * When the downcounter reaches the value 0x40, and EWI interrupt is - * generated and the corresponding Interrupt Service Routine (ISR) can - * be used to trigger specific actions (such as communications or data - * logging), before resetting the device. - * @param hwwdg: pointer to a WWDG_HandleTypeDef structure that contains - * the configuration information for the specified WWDG module. - * @retval None - */ -void HAL_WWDG_IRQHandler(WWDG_HandleTypeDef *hwwdg) -{ - /* Check if Early Wakeup Interrupt is enable */ - if(__HAL_WWDG_GET_IT_SOURCE(hwwdg, WWDG_IT_EWI) != RESET) - { - /* Check if WWDG Early Wakeup Interrupt occurred */ - if(__HAL_WWDG_GET_FLAG(hwwdg, WWDG_FLAG_EWIF) != RESET) - { - /* Early Wakeup callback */ - HAL_WWDG_WakeupCallback(hwwdg); - - /* Change WWDG peripheral state */ - hwwdg->State = HAL_WWDG_STATE_READY; - - /* Clear the WWDG Early Wakeup flag */ - __HAL_WWDG_CLEAR_FLAG(hwwdg, WWDG_FLAG_EWIF); - - /* Process Unlocked */ - __HAL_UNLOCK(hwwdg); - } - } -} - -/** - * @brief Early Wakeup WWDG callback. - * @param hwwdg: pointer to a WWDG_HandleTypeDef structure that contains - * the configuration information for the specified WWDG module. - * @retval None - */ -__weak void HAL_WWDG_WakeupCallback(WWDG_HandleTypeDef* hwwdg) -{ - /* NOTE: This function should not be modified, when the callback is needed, - the HAL_WWDG_WakeupCallback could be implemented in the user file - */ -} - -/** - * @} - */ - -/** @defgroup WWDG_Exported_Functions_Group3 Peripheral State functions - * @brief Peripheral State functions. - * -@verbatim - ============================================================================== - ##### Peripheral State functions ##### - ============================================================================== - [..] - This subsection permits to get in run-time the status of the peripheral - and the data flow. - -@endverbatim - * @{ - */ - -/** - * @brief Return the WWDG handle state. - * @param hwwdg: pointer to a WWDG_HandleTypeDef structure that contains - * the configuration information for the specified WWDG module. - * @retval HAL state - */ -HAL_WWDG_StateTypeDef HAL_WWDG_GetState(WWDG_HandleTypeDef *hwwdg) -{ - return hwwdg->State; -} - -/** - * @} - */ - -/** - * @} - */ - -#endif /* HAL_WWDG_MODULE_ENABLED */ -/** - * @} - */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ -