Hal Drivers for L4
Dependents: BSP OneHopeOnePrayer FINAL_AUDIO_RECORD AudioDemo
Fork of STM32L4xx_HAL_Driver by
Src/stm32l4xx_hal_qspi.c@0:80ee8f3b695e, 2015-11-02 (annotated)
- Committer:
- EricLew
- Date:
- Mon Nov 02 19:37:23 2015 +0000
- Revision:
- 0:80ee8f3b695e
Errors are with definitions of LCD and QSPI functions. I believe all .h and .c files are uploaded, but there may need to be certain functions called.
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
EricLew | 0:80ee8f3b695e | 1 | /** |
EricLew | 0:80ee8f3b695e | 2 | ****************************************************************************** |
EricLew | 0:80ee8f3b695e | 3 | * @file stm32l4xx_hal_qspi.c |
EricLew | 0:80ee8f3b695e | 4 | * @author MCD Application Team |
EricLew | 0:80ee8f3b695e | 5 | * @version V1.1.0 |
EricLew | 0:80ee8f3b695e | 6 | * @date 16-September-2015 |
EricLew | 0:80ee8f3b695e | 7 | * @brief QSPI HAL module driver. |
EricLew | 0:80ee8f3b695e | 8 | * This file provides firmware functions to manage the following |
EricLew | 0:80ee8f3b695e | 9 | * functionalities of the QuadSPI interface (QSPI). |
EricLew | 0:80ee8f3b695e | 10 | * + Initialization and de-initialization functions |
EricLew | 0:80ee8f3b695e | 11 | * + Indirect functional mode management |
EricLew | 0:80ee8f3b695e | 12 | * + Memory-mapped functional mode management |
EricLew | 0:80ee8f3b695e | 13 | * + Auto-polling functional mode management |
EricLew | 0:80ee8f3b695e | 14 | * + Interrupts and flags management |
EricLew | 0:80ee8f3b695e | 15 | * + DMA channel configuration for indirect functional mode |
EricLew | 0:80ee8f3b695e | 16 | * + Errors management and abort functionality |
EricLew | 0:80ee8f3b695e | 17 | * |
EricLew | 0:80ee8f3b695e | 18 | * |
EricLew | 0:80ee8f3b695e | 19 | @verbatim |
EricLew | 0:80ee8f3b695e | 20 | =============================================================================== |
EricLew | 0:80ee8f3b695e | 21 | ##### How to use this driver ##### |
EricLew | 0:80ee8f3b695e | 22 | =============================================================================== |
EricLew | 0:80ee8f3b695e | 23 | [..] |
EricLew | 0:80ee8f3b695e | 24 | *** Initialization *** |
EricLew | 0:80ee8f3b695e | 25 | ====================== |
EricLew | 0:80ee8f3b695e | 26 | [..] |
EricLew | 0:80ee8f3b695e | 27 | (#) As prerequisite, fill in the HAL_QSPI_MspInit() : |
EricLew | 0:80ee8f3b695e | 28 | (++) Enable QuadSPI clock interface with __HAL_RCC_QSPI_CLK_ENABLE(). |
EricLew | 0:80ee8f3b695e | 29 | (++) Reset QuadSPI IP with __HAL_RCC_QSPI_FORCE_RESET() and __HAL_RCC_QSPI_RELEASE_RESET(). |
EricLew | 0:80ee8f3b695e | 30 | (++) Enable the clocks for the QuadSPI GPIOS with __HAL_RCC_GPIOx_CLK_ENABLE(). |
EricLew | 0:80ee8f3b695e | 31 | (++) Configure these QuadSPI pins in alternate mode using HAL_GPIO_Init(). |
EricLew | 0:80ee8f3b695e | 32 | (++) If interrupt mode is used, enable and configure QuadSPI global |
EricLew | 0:80ee8f3b695e | 33 | interrupt with HAL_NVIC_SetPriority() and HAL_NVIC_EnableIRQ(). |
EricLew | 0:80ee8f3b695e | 34 | (++) If DMA mode is used, enable the clocks for the QuadSPI DMA channel |
EricLew | 0:80ee8f3b695e | 35 | with __HAL_RCC_DMAx_CLK_ENABLE(), configure DMA with HAL_DMA_Init(), |
EricLew | 0:80ee8f3b695e | 36 | link it with QuadSPI handle using __HAL_LINKDMA(), enable and configure |
EricLew | 0:80ee8f3b695e | 37 | DMA channel global interrupt with HAL_NVIC_SetPriority() and HAL_NVIC_EnableIRQ(). |
EricLew | 0:80ee8f3b695e | 38 | (#) Configure the flash size, the clock prescaler, the fifo threshold, the |
EricLew | 0:80ee8f3b695e | 39 | clock mode, the sample shifting and the CS high time using the HAL_QSPI_Init() function. |
EricLew | 0:80ee8f3b695e | 40 | |
EricLew | 0:80ee8f3b695e | 41 | *** Indirect functional mode *** |
EricLew | 0:80ee8f3b695e | 42 | ================================ |
EricLew | 0:80ee8f3b695e | 43 | [..] |
EricLew | 0:80ee8f3b695e | 44 | (#) Configure the command sequence using the HAL_QSPI_Command() or HAL_QSPI_Command_IT() |
EricLew | 0:80ee8f3b695e | 45 | functions : |
EricLew | 0:80ee8f3b695e | 46 | (++) Instruction phase : the mode used and if present the instruction opcode. |
EricLew | 0:80ee8f3b695e | 47 | (++) Address phase : the mode used and if present the size and the address value. |
EricLew | 0:80ee8f3b695e | 48 | (++) Alternate-bytes phase : the mode used and if present the size and the alternate |
EricLew | 0:80ee8f3b695e | 49 | bytes values. |
EricLew | 0:80ee8f3b695e | 50 | (++) Dummy-cycles phase : the number of dummy cycles (mode used is same as data phase). |
EricLew | 0:80ee8f3b695e | 51 | (++) Data phase : the mode used and if present the number of bytes. |
EricLew | 0:80ee8f3b695e | 52 | (++) Double Data Rate (DDR) mode : the activation (or not) of this mode and the delay |
EricLew | 0:80ee8f3b695e | 53 | if activated. |
EricLew | 0:80ee8f3b695e | 54 | (++) Sending Instruction Only Once (SIOO) mode : the activation (or not) of this mode. |
EricLew | 0:80ee8f3b695e | 55 | (#) If no data is required for the command, it is sent directly to the memory : |
EricLew | 0:80ee8f3b695e | 56 | (++) In polling mode, the output of the function is done when the transfer is complete. |
EricLew | 0:80ee8f3b695e | 57 | (++) In interrupt mode, HAL_QSPI_CmdCpltCallback() will be called when the transfer is complete. |
EricLew | 0:80ee8f3b695e | 58 | (#) For the indirect write mode, use HAL_QSPI_Transmit(), HAL_QSPI_Transmit_DMA() or |
EricLew | 0:80ee8f3b695e | 59 | HAL_QSPI_Transmit_IT() after the command configuration : |
EricLew | 0:80ee8f3b695e | 60 | (++) In polling mode, the output of the function is done when the transfer is complete. |
EricLew | 0:80ee8f3b695e | 61 | (++) In interrupt mode, HAL_QSPI_FifoThresholdCallback() will be called when the fifo threshold |
EricLew | 0:80ee8f3b695e | 62 | is reached and HAL_QSPI_TxCpltCallback() will be called when the transfer is complete. |
EricLew | 0:80ee8f3b695e | 63 | (++) In DMA mode, HAL_QSPI_TxHalfCpltCallback() will be called at the half transfer and |
EricLew | 0:80ee8f3b695e | 64 | HAL_QSPI_TxCpltCallback() will be called when the transfer is complete. |
EricLew | 0:80ee8f3b695e | 65 | (#) For the indirect read mode, use HAL_QSPI_Receive(), HAL_QSPI_Receive_DMA() or |
EricLew | 0:80ee8f3b695e | 66 | HAL_QSPI_Receive_IT() after the command configuration : |
EricLew | 0:80ee8f3b695e | 67 | (++) In polling mode, the output of the function is done when the transfer is complete. |
EricLew | 0:80ee8f3b695e | 68 | (++) In interrupt mode, HAL_QSPI_FifoThresholdCallback() will be called when the fifo threshold |
EricLew | 0:80ee8f3b695e | 69 | is reached and HAL_QSPI_RxCpltCallback() will be called when the transfer is complete. |
EricLew | 0:80ee8f3b695e | 70 | (++) In DMA mode, HAL_QSPI_RxHalfCpltCallback() will be called at the half transfer and |
EricLew | 0:80ee8f3b695e | 71 | HAL_QSPI_RxCpltCallback() will be called when the transfer is complete. |
EricLew | 0:80ee8f3b695e | 72 | |
EricLew | 0:80ee8f3b695e | 73 | *** Auto-polling functional mode *** |
EricLew | 0:80ee8f3b695e | 74 | ==================================== |
EricLew | 0:80ee8f3b695e | 75 | [..] |
EricLew | 0:80ee8f3b695e | 76 | (#) Configure the command sequence and the auto-polling functional mode using the |
EricLew | 0:80ee8f3b695e | 77 | HAL_QSPI_AutoPolling() or HAL_QSPI_AutoPolling_IT() functions : |
EricLew | 0:80ee8f3b695e | 78 | (++) Instruction phase : the mode used and if present the instruction opcode. |
EricLew | 0:80ee8f3b695e | 79 | (++) Address phase : the mode used and if present the size and the address value. |
EricLew | 0:80ee8f3b695e | 80 | (++) Alternate-bytes phase : the mode used and if present the size and the alternate |
EricLew | 0:80ee8f3b695e | 81 | bytes values. |
EricLew | 0:80ee8f3b695e | 82 | (++) Dummy-cycles phase : the number of dummy cycles (mode used is same as data phase). |
EricLew | 0:80ee8f3b695e | 83 | (++) Data phase : the mode used. |
EricLew | 0:80ee8f3b695e | 84 | (++) Double Data Rate (DDR) mode : the activation (or not) of this mode and the delay |
EricLew | 0:80ee8f3b695e | 85 | if activated. |
EricLew | 0:80ee8f3b695e | 86 | (++) Sending Instruction Only Once (SIOO) mode : the activation (or not) of this mode. |
EricLew | 0:80ee8f3b695e | 87 | (++) The size of the status bytes, the match value, the mask used, the match mode (OR/AND), |
EricLew | 0:80ee8f3b695e | 88 | the polling interval and the automatic stop activation. |
EricLew | 0:80ee8f3b695e | 89 | (#) After the configuration : |
EricLew | 0:80ee8f3b695e | 90 | (++) In polling mode, the output of the function is done when the status match is reached. The |
EricLew | 0:80ee8f3b695e | 91 | automatic stop is activated to avoid an infinite loop. |
EricLew | 0:80ee8f3b695e | 92 | (++) In interrupt mode, HAL_QSPI_StatusMatchCallback() will be called each time the status match is reached. |
EricLew | 0:80ee8f3b695e | 93 | |
EricLew | 0:80ee8f3b695e | 94 | *** Memory-mapped functional mode *** |
EricLew | 0:80ee8f3b695e | 95 | ===================================== |
EricLew | 0:80ee8f3b695e | 96 | [..] |
EricLew | 0:80ee8f3b695e | 97 | (#) Configure the command sequence and the memory-mapped functional mode using the |
EricLew | 0:80ee8f3b695e | 98 | HAL_QSPI_MemoryMapped() functions : |
EricLew | 0:80ee8f3b695e | 99 | (++) Instruction phase : the mode used and if present the instruction opcode. |
EricLew | 0:80ee8f3b695e | 100 | (++) Address phase : the mode used and the size. |
EricLew | 0:80ee8f3b695e | 101 | (++) Alternate-bytes phase : the mode used and if present the size and the alternate |
EricLew | 0:80ee8f3b695e | 102 | bytes values. |
EricLew | 0:80ee8f3b695e | 103 | (++) Dummy-cycles phase : the number of dummy cycles (mode used is same as data phase). |
EricLew | 0:80ee8f3b695e | 104 | (++) Data phase : the mode used. |
EricLew | 0:80ee8f3b695e | 105 | (++) Double Data Rate (DDR) mode : the activation (or not) of this mode and the delay |
EricLew | 0:80ee8f3b695e | 106 | if activated. |
EricLew | 0:80ee8f3b695e | 107 | (++) Sending Instruction Only Once (SIOO) mode : the activation (or not) of this mode. |
EricLew | 0:80ee8f3b695e | 108 | (++) The timeout activation and the timeout period. |
EricLew | 0:80ee8f3b695e | 109 | (#) After the configuration, the QuadSPI will be used as soon as an access on the AHB is done on |
EricLew | 0:80ee8f3b695e | 110 | the address range. HAL_QSPI_TimeOutCallback() will be called when the timeout expires. |
EricLew | 0:80ee8f3b695e | 111 | |
EricLew | 0:80ee8f3b695e | 112 | *** Errors management and abort functionality *** |
EricLew | 0:80ee8f3b695e | 113 | ================================================== |
EricLew | 0:80ee8f3b695e | 114 | [..] |
EricLew | 0:80ee8f3b695e | 115 | (#) HAL_QSPI_GetError() function gives the error raised during the last operation. |
EricLew | 0:80ee8f3b695e | 116 | (#) HAL_QSPI_Abort() function aborts any on-going operation and flushes the fifo. |
EricLew | 0:80ee8f3b695e | 117 | (#) HAL_QSPI_GetState() function gives the current state of the HAL QuadSPI driver. |
EricLew | 0:80ee8f3b695e | 118 | |
EricLew | 0:80ee8f3b695e | 119 | *** Workarounds linked to Silicon Limitation *** |
EricLew | 0:80ee8f3b695e | 120 | ==================================================== |
EricLew | 0:80ee8f3b695e | 121 | [..] |
EricLew | 0:80ee8f3b695e | 122 | (#) Workarounds Implemented inside HAL Driver |
EricLew | 0:80ee8f3b695e | 123 | (++) Extra data written in the FIFO at the end of a read transfer |
EricLew | 0:80ee8f3b695e | 124 | |
EricLew | 0:80ee8f3b695e | 125 | @endverbatim |
EricLew | 0:80ee8f3b695e | 126 | ****************************************************************************** |
EricLew | 0:80ee8f3b695e | 127 | * @attention |
EricLew | 0:80ee8f3b695e | 128 | * |
EricLew | 0:80ee8f3b695e | 129 | * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> |
EricLew | 0:80ee8f3b695e | 130 | * |
EricLew | 0:80ee8f3b695e | 131 | * Redistribution and use in source and binary forms, with or without modification, |
EricLew | 0:80ee8f3b695e | 132 | * are permitted provided that the following conditions are met: |
EricLew | 0:80ee8f3b695e | 133 | * 1. Redistributions of source code must retain the above copyright notice, |
EricLew | 0:80ee8f3b695e | 134 | * this list of conditions and the following disclaimer. |
EricLew | 0:80ee8f3b695e | 135 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
EricLew | 0:80ee8f3b695e | 136 | * this list of conditions and the following disclaimer in the documentation |
EricLew | 0:80ee8f3b695e | 137 | * and/or other materials provided with the distribution. |
EricLew | 0:80ee8f3b695e | 138 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
EricLew | 0:80ee8f3b695e | 139 | * may be used to endorse or promote products derived from this software |
EricLew | 0:80ee8f3b695e | 140 | * without specific prior written permission. |
EricLew | 0:80ee8f3b695e | 141 | * |
EricLew | 0:80ee8f3b695e | 142 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
EricLew | 0:80ee8f3b695e | 143 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
EricLew | 0:80ee8f3b695e | 144 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
EricLew | 0:80ee8f3b695e | 145 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
EricLew | 0:80ee8f3b695e | 146 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
EricLew | 0:80ee8f3b695e | 147 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
EricLew | 0:80ee8f3b695e | 148 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
EricLew | 0:80ee8f3b695e | 149 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
EricLew | 0:80ee8f3b695e | 150 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
EricLew | 0:80ee8f3b695e | 151 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
EricLew | 0:80ee8f3b695e | 152 | * |
EricLew | 0:80ee8f3b695e | 153 | ****************************************************************************** |
EricLew | 0:80ee8f3b695e | 154 | */ |
EricLew | 0:80ee8f3b695e | 155 | |
EricLew | 0:80ee8f3b695e | 156 | /* Includes ------------------------------------------------------------------*/ |
EricLew | 0:80ee8f3b695e | 157 | #include "stm32l4xx_hal.h" |
EricLew | 0:80ee8f3b695e | 158 | |
EricLew | 0:80ee8f3b695e | 159 | /** @addtogroup STM32L4xx_HAL_Driver |
EricLew | 0:80ee8f3b695e | 160 | * @{ |
EricLew | 0:80ee8f3b695e | 161 | */ |
EricLew | 0:80ee8f3b695e | 162 | |
EricLew | 0:80ee8f3b695e | 163 | /** @defgroup QSPI QSPI |
EricLew | 0:80ee8f3b695e | 164 | * @brief QSPI HAL module driver |
EricLew | 0:80ee8f3b695e | 165 | * @{ |
EricLew | 0:80ee8f3b695e | 166 | */ |
EricLew | 0:80ee8f3b695e | 167 | #ifdef HAL_QSPI_MODULE_ENABLED |
EricLew | 0:80ee8f3b695e | 168 | |
EricLew | 0:80ee8f3b695e | 169 | /* Private typedef -----------------------------------------------------------*/ |
EricLew | 0:80ee8f3b695e | 170 | |
EricLew | 0:80ee8f3b695e | 171 | /* Private define ------------------------------------------------------------*/ |
EricLew | 0:80ee8f3b695e | 172 | /** @defgroup QSPI_Private_Constants QSPI Private Constants |
EricLew | 0:80ee8f3b695e | 173 | * @{ |
EricLew | 0:80ee8f3b695e | 174 | */ |
EricLew | 0:80ee8f3b695e | 175 | #define QSPI_FUNCTIONAL_MODE_INDIRECT_WRITE ((uint32_t)0x00000000) /*!<Indirect write mode*/ |
EricLew | 0:80ee8f3b695e | 176 | #define QSPI_FUNCTIONAL_MODE_INDIRECT_READ ((uint32_t)QUADSPI_CCR_FMODE_0) /*!<Indirect read mode*/ |
EricLew | 0:80ee8f3b695e | 177 | #define QSPI_FUNCTIONAL_MODE_AUTO_POLLING ((uint32_t)QUADSPI_CCR_FMODE_1) /*!<Automatic polling mode*/ |
EricLew | 0:80ee8f3b695e | 178 | #define QSPI_FUNCTIONAL_MODE_MEMORY_MAPPED ((uint32_t)QUADSPI_CCR_FMODE) /*!<Memory-mapped mode*/ |
EricLew | 0:80ee8f3b695e | 179 | /** |
EricLew | 0:80ee8f3b695e | 180 | * @} |
EricLew | 0:80ee8f3b695e | 181 | */ |
EricLew | 0:80ee8f3b695e | 182 | |
EricLew | 0:80ee8f3b695e | 183 | /* Private macro -------------------------------------------------------------*/ |
EricLew | 0:80ee8f3b695e | 184 | /** @defgroup QSPI_Private_Macros QSPI Private Macros |
EricLew | 0:80ee8f3b695e | 185 | * @{ |
EricLew | 0:80ee8f3b695e | 186 | */ |
EricLew | 0:80ee8f3b695e | 187 | #define IS_QSPI_FUNCTIONAL_MODE(MODE) (((MODE) == QSPI_FUNCTIONAL_MODE_INDIRECT_WRITE) || \ |
EricLew | 0:80ee8f3b695e | 188 | ((MODE) == QSPI_FUNCTIONAL_MODE_INDIRECT_READ) || \ |
EricLew | 0:80ee8f3b695e | 189 | ((MODE) == QSPI_FUNCTIONAL_MODE_AUTO_POLLING) || \ |
EricLew | 0:80ee8f3b695e | 190 | ((MODE) == QSPI_FUNCTIONAL_MODE_MEMORY_MAPPED)) |
EricLew | 0:80ee8f3b695e | 191 | /** |
EricLew | 0:80ee8f3b695e | 192 | * @} |
EricLew | 0:80ee8f3b695e | 193 | */ |
EricLew | 0:80ee8f3b695e | 194 | |
EricLew | 0:80ee8f3b695e | 195 | /* Private variables ---------------------------------------------------------*/ |
EricLew | 0:80ee8f3b695e | 196 | |
EricLew | 0:80ee8f3b695e | 197 | /* Private function prototypes -----------------------------------------------*/ |
EricLew | 0:80ee8f3b695e | 198 | static void QSPI_DMARxCplt(DMA_HandleTypeDef *hdma); |
EricLew | 0:80ee8f3b695e | 199 | static void QSPI_DMATxCplt(DMA_HandleTypeDef *hdma); |
EricLew | 0:80ee8f3b695e | 200 | static void QSPI_DMARxHalfCplt(DMA_HandleTypeDef *hdma); |
EricLew | 0:80ee8f3b695e | 201 | static void QSPI_DMATxHalfCplt(DMA_HandleTypeDef *hdma); |
EricLew | 0:80ee8f3b695e | 202 | static void QSPI_DMAError(DMA_HandleTypeDef *hdma); |
EricLew | 0:80ee8f3b695e | 203 | static HAL_StatusTypeDef QSPI_WaitFlagStateUntilTimeout(QSPI_HandleTypeDef *hqspi, uint32_t Flag, FlagStatus State, uint32_t Timeout); |
EricLew | 0:80ee8f3b695e | 204 | static void QSPI_Config(QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, uint32_t FunctionalMode); |
EricLew | 0:80ee8f3b695e | 205 | |
EricLew | 0:80ee8f3b695e | 206 | /* Exported functions --------------------------------------------------------*/ |
EricLew | 0:80ee8f3b695e | 207 | |
EricLew | 0:80ee8f3b695e | 208 | /** @defgroup QSPI_Exported_Functions QSPI Exported Functions |
EricLew | 0:80ee8f3b695e | 209 | * @{ |
EricLew | 0:80ee8f3b695e | 210 | */ |
EricLew | 0:80ee8f3b695e | 211 | |
EricLew | 0:80ee8f3b695e | 212 | /** @defgroup QSPI_Exported_Functions_Group1 Initialization/de-initialization functions |
EricLew | 0:80ee8f3b695e | 213 | * @brief Initialization and Configuration functions |
EricLew | 0:80ee8f3b695e | 214 | * |
EricLew | 0:80ee8f3b695e | 215 | @verbatim |
EricLew | 0:80ee8f3b695e | 216 | =============================================================================== |
EricLew | 0:80ee8f3b695e | 217 | ##### Initialization and Configuration functions ##### |
EricLew | 0:80ee8f3b695e | 218 | =============================================================================== |
EricLew | 0:80ee8f3b695e | 219 | [..] |
EricLew | 0:80ee8f3b695e | 220 | This subsection provides a set of functions allowing to : |
EricLew | 0:80ee8f3b695e | 221 | (+) Initialize the QuadSPI. |
EricLew | 0:80ee8f3b695e | 222 | (+) De-initialize the QuadSPI. |
EricLew | 0:80ee8f3b695e | 223 | |
EricLew | 0:80ee8f3b695e | 224 | @endverbatim |
EricLew | 0:80ee8f3b695e | 225 | * @{ |
EricLew | 0:80ee8f3b695e | 226 | */ |
EricLew | 0:80ee8f3b695e | 227 | |
EricLew | 0:80ee8f3b695e | 228 | /** |
EricLew | 0:80ee8f3b695e | 229 | * @brief Initialize the QSPI mode according to the specified parameters |
EricLew | 0:80ee8f3b695e | 230 | * in the QSPI_InitTypeDef and initialize the associated handle. |
EricLew | 0:80ee8f3b695e | 231 | * @param hqspi: QSPI handle |
EricLew | 0:80ee8f3b695e | 232 | * @retval HAL status |
EricLew | 0:80ee8f3b695e | 233 | */ |
EricLew | 0:80ee8f3b695e | 234 | HAL_StatusTypeDef HAL_QSPI_Init(QSPI_HandleTypeDef *hqspi) |
EricLew | 0:80ee8f3b695e | 235 | { |
EricLew | 0:80ee8f3b695e | 236 | HAL_StatusTypeDef status = HAL_ERROR; |
EricLew | 0:80ee8f3b695e | 237 | |
EricLew | 0:80ee8f3b695e | 238 | /* Check the QSPI handle allocation */ |
EricLew | 0:80ee8f3b695e | 239 | if(hqspi == NULL) |
EricLew | 0:80ee8f3b695e | 240 | { |
EricLew | 0:80ee8f3b695e | 241 | return HAL_ERROR; |
EricLew | 0:80ee8f3b695e | 242 | } |
EricLew | 0:80ee8f3b695e | 243 | |
EricLew | 0:80ee8f3b695e | 244 | /* Check the parameters */ |
EricLew | 0:80ee8f3b695e | 245 | assert_param(IS_QSPI_ALL_INSTANCE(hqspi->Instance)); |
EricLew | 0:80ee8f3b695e | 246 | assert_param(IS_QSPI_CLOCK_PRESCALER(hqspi->Init.ClockPrescaler)); |
EricLew | 0:80ee8f3b695e | 247 | assert_param(IS_QSPI_FIFO_THRESHOLD(hqspi->Init.FifoThreshold)); |
EricLew | 0:80ee8f3b695e | 248 | assert_param(IS_QSPI_SSHIFT(hqspi->Init.SampleShifting)); |
EricLew | 0:80ee8f3b695e | 249 | assert_param(IS_QSPI_FLASH_SIZE(hqspi->Init.FlashSize)); |
EricLew | 0:80ee8f3b695e | 250 | assert_param(IS_QSPI_CS_HIGH_TIME(hqspi->Init.ChipSelectHighTime)); |
EricLew | 0:80ee8f3b695e | 251 | assert_param(IS_QSPI_CLOCK_MODE(hqspi->Init.ClockMode)); |
EricLew | 0:80ee8f3b695e | 252 | |
EricLew | 0:80ee8f3b695e | 253 | /* Process locked */ |
EricLew | 0:80ee8f3b695e | 254 | __HAL_LOCK(hqspi); |
EricLew | 0:80ee8f3b695e | 255 | |
EricLew | 0:80ee8f3b695e | 256 | if(hqspi->State == HAL_QSPI_STATE_RESET) |
EricLew | 0:80ee8f3b695e | 257 | { |
EricLew | 0:80ee8f3b695e | 258 | /* Allocate lock resource and initialize it */ |
EricLew | 0:80ee8f3b695e | 259 | hqspi->Lock = HAL_UNLOCKED; |
EricLew | 0:80ee8f3b695e | 260 | |
EricLew | 0:80ee8f3b695e | 261 | /* Init the low level hardware : GPIO, CLOCK */ |
EricLew | 0:80ee8f3b695e | 262 | HAL_QSPI_MspInit(hqspi); |
EricLew | 0:80ee8f3b695e | 263 | |
EricLew | 0:80ee8f3b695e | 264 | /* Configure the default timeout for the QSPI memory access */ |
EricLew | 0:80ee8f3b695e | 265 | HAL_QSPI_SetTimeout(hqspi, HAL_QPSI_TIMEOUT_DEFAULT_VALUE); |
EricLew | 0:80ee8f3b695e | 266 | } |
EricLew | 0:80ee8f3b695e | 267 | |
EricLew | 0:80ee8f3b695e | 268 | /* Configure QSPI FIFO Threshold */ |
EricLew | 0:80ee8f3b695e | 269 | MODIFY_REG(hqspi->Instance->CR, QUADSPI_CR_FTHRES, |
EricLew | 0:80ee8f3b695e | 270 | ((hqspi->Init.FifoThreshold - 1) << POSITION_VAL(QUADSPI_CR_FTHRES))); |
EricLew | 0:80ee8f3b695e | 271 | |
EricLew | 0:80ee8f3b695e | 272 | /* Wait till BUSY flag reset */ |
EricLew | 0:80ee8f3b695e | 273 | status = QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_BUSY, RESET, hqspi->Timeout); |
EricLew | 0:80ee8f3b695e | 274 | |
EricLew | 0:80ee8f3b695e | 275 | if(status == HAL_OK) |
EricLew | 0:80ee8f3b695e | 276 | { |
EricLew | 0:80ee8f3b695e | 277 | /* Configure QSPI Clock Prescaler and Sample Shift */ |
EricLew | 0:80ee8f3b695e | 278 | MODIFY_REG(hqspi->Instance->CR, (QUADSPI_CR_PRESCALER | QUADSPI_CR_SSHIFT), |
EricLew | 0:80ee8f3b695e | 279 | ((hqspi->Init.ClockPrescaler << POSITION_VAL(QUADSPI_CR_PRESCALER)) | |
EricLew | 0:80ee8f3b695e | 280 | hqspi->Init.SampleShifting)); |
EricLew | 0:80ee8f3b695e | 281 | |
EricLew | 0:80ee8f3b695e | 282 | /* Configure QSPI Flash Size, CS High Time and Clock Mode */ |
EricLew | 0:80ee8f3b695e | 283 | MODIFY_REG(hqspi->Instance->DCR, (QUADSPI_DCR_FSIZE | QUADSPI_DCR_CSHT | QUADSPI_DCR_CKMODE), |
EricLew | 0:80ee8f3b695e | 284 | ((hqspi->Init.FlashSize << POSITION_VAL(QUADSPI_DCR_FSIZE)) | |
EricLew | 0:80ee8f3b695e | 285 | hqspi->Init.ChipSelectHighTime | hqspi->Init.ClockMode)); |
EricLew | 0:80ee8f3b695e | 286 | |
EricLew | 0:80ee8f3b695e | 287 | /* Enable the QSPI peripheral */ |
EricLew | 0:80ee8f3b695e | 288 | __HAL_QSPI_ENABLE(hqspi); |
EricLew | 0:80ee8f3b695e | 289 | |
EricLew | 0:80ee8f3b695e | 290 | /* Set QSPI error code to none */ |
EricLew | 0:80ee8f3b695e | 291 | hqspi->ErrorCode = HAL_QSPI_ERROR_NONE; |
EricLew | 0:80ee8f3b695e | 292 | |
EricLew | 0:80ee8f3b695e | 293 | /* Initialize the QSPI state */ |
EricLew | 0:80ee8f3b695e | 294 | hqspi->State = HAL_QSPI_STATE_READY; |
EricLew | 0:80ee8f3b695e | 295 | } |
EricLew | 0:80ee8f3b695e | 296 | |
EricLew | 0:80ee8f3b695e | 297 | /* Release Lock */ |
EricLew | 0:80ee8f3b695e | 298 | __HAL_UNLOCK(hqspi); |
EricLew | 0:80ee8f3b695e | 299 | |
EricLew | 0:80ee8f3b695e | 300 | /* Return function status */ |
EricLew | 0:80ee8f3b695e | 301 | return status; |
EricLew | 0:80ee8f3b695e | 302 | } |
EricLew | 0:80ee8f3b695e | 303 | |
EricLew | 0:80ee8f3b695e | 304 | /** |
EricLew | 0:80ee8f3b695e | 305 | * @brief De-Initialize the QSPI peripheral. |
EricLew | 0:80ee8f3b695e | 306 | * @param hqspi: QSPI handle |
EricLew | 0:80ee8f3b695e | 307 | * @retval HAL status |
EricLew | 0:80ee8f3b695e | 308 | */ |
EricLew | 0:80ee8f3b695e | 309 | HAL_StatusTypeDef HAL_QSPI_DeInit(QSPI_HandleTypeDef *hqspi) |
EricLew | 0:80ee8f3b695e | 310 | { |
EricLew | 0:80ee8f3b695e | 311 | /* Check the QSPI handle allocation */ |
EricLew | 0:80ee8f3b695e | 312 | if(hqspi == NULL) |
EricLew | 0:80ee8f3b695e | 313 | { |
EricLew | 0:80ee8f3b695e | 314 | return HAL_ERROR; |
EricLew | 0:80ee8f3b695e | 315 | } |
EricLew | 0:80ee8f3b695e | 316 | |
EricLew | 0:80ee8f3b695e | 317 | /* Process locked */ |
EricLew | 0:80ee8f3b695e | 318 | __HAL_LOCK(hqspi); |
EricLew | 0:80ee8f3b695e | 319 | |
EricLew | 0:80ee8f3b695e | 320 | /* Disable the QSPI Peripheral Clock */ |
EricLew | 0:80ee8f3b695e | 321 | __HAL_QSPI_DISABLE(hqspi); |
EricLew | 0:80ee8f3b695e | 322 | |
EricLew | 0:80ee8f3b695e | 323 | /* DeInit the low level hardware: GPIO, CLOCK, NVIC... */ |
EricLew | 0:80ee8f3b695e | 324 | HAL_QSPI_MspDeInit(hqspi); |
EricLew | 0:80ee8f3b695e | 325 | |
EricLew | 0:80ee8f3b695e | 326 | /* Set QSPI error code to none */ |
EricLew | 0:80ee8f3b695e | 327 | hqspi->ErrorCode = HAL_QSPI_ERROR_NONE; |
EricLew | 0:80ee8f3b695e | 328 | |
EricLew | 0:80ee8f3b695e | 329 | /* Initialize the QSPI state */ |
EricLew | 0:80ee8f3b695e | 330 | hqspi->State = HAL_QSPI_STATE_RESET; |
EricLew | 0:80ee8f3b695e | 331 | |
EricLew | 0:80ee8f3b695e | 332 | /* Release Lock */ |
EricLew | 0:80ee8f3b695e | 333 | __HAL_UNLOCK(hqspi); |
EricLew | 0:80ee8f3b695e | 334 | |
EricLew | 0:80ee8f3b695e | 335 | return HAL_OK; |
EricLew | 0:80ee8f3b695e | 336 | } |
EricLew | 0:80ee8f3b695e | 337 | |
EricLew | 0:80ee8f3b695e | 338 | /** |
EricLew | 0:80ee8f3b695e | 339 | * @brief Initialize the QSPI MSP. |
EricLew | 0:80ee8f3b695e | 340 | * @param hqspi: QSPI handle |
EricLew | 0:80ee8f3b695e | 341 | * @retval None |
EricLew | 0:80ee8f3b695e | 342 | */ |
EricLew | 0:80ee8f3b695e | 343 | __weak void HAL_QSPI_MspInit(QSPI_HandleTypeDef *hqspi) |
EricLew | 0:80ee8f3b695e | 344 | { |
EricLew | 0:80ee8f3b695e | 345 | /* NOTE : This function should not be modified, when the callback is needed, |
EricLew | 0:80ee8f3b695e | 346 | the HAL_QSPI_MspInit can be implemented in the user file |
EricLew | 0:80ee8f3b695e | 347 | */ |
EricLew | 0:80ee8f3b695e | 348 | } |
EricLew | 0:80ee8f3b695e | 349 | |
EricLew | 0:80ee8f3b695e | 350 | /** |
EricLew | 0:80ee8f3b695e | 351 | * @brief DeInitialize the QSPI MSP. |
EricLew | 0:80ee8f3b695e | 352 | * @param hqspi: QSPI handle |
EricLew | 0:80ee8f3b695e | 353 | * @retval None |
EricLew | 0:80ee8f3b695e | 354 | */ |
EricLew | 0:80ee8f3b695e | 355 | __weak void HAL_QSPI_MspDeInit(QSPI_HandleTypeDef *hqspi) |
EricLew | 0:80ee8f3b695e | 356 | { |
EricLew | 0:80ee8f3b695e | 357 | /* NOTE : This function should not be modified, when the callback is needed, |
EricLew | 0:80ee8f3b695e | 358 | the HAL_QSPI_MspDeInit can be implemented in the user file |
EricLew | 0:80ee8f3b695e | 359 | */ |
EricLew | 0:80ee8f3b695e | 360 | } |
EricLew | 0:80ee8f3b695e | 361 | |
EricLew | 0:80ee8f3b695e | 362 | /** |
EricLew | 0:80ee8f3b695e | 363 | * @} |
EricLew | 0:80ee8f3b695e | 364 | */ |
EricLew | 0:80ee8f3b695e | 365 | |
EricLew | 0:80ee8f3b695e | 366 | /** @defgroup QSPI_Exported_Functions_Group2 Input and Output operation functions |
EricLew | 0:80ee8f3b695e | 367 | * @brief QSPI Transmit/Receive functions |
EricLew | 0:80ee8f3b695e | 368 | * |
EricLew | 0:80ee8f3b695e | 369 | @verbatim |
EricLew | 0:80ee8f3b695e | 370 | =============================================================================== |
EricLew | 0:80ee8f3b695e | 371 | ##### IO operation functions ##### |
EricLew | 0:80ee8f3b695e | 372 | =============================================================================== |
EricLew | 0:80ee8f3b695e | 373 | [..] |
EricLew | 0:80ee8f3b695e | 374 | This subsection provides a set of functions allowing to : |
EricLew | 0:80ee8f3b695e | 375 | (+) Handle the interrupts. |
EricLew | 0:80ee8f3b695e | 376 | (+) Handle the command sequence. |
EricLew | 0:80ee8f3b695e | 377 | (+) Transmit data in blocking, interrupt or DMA mode. |
EricLew | 0:80ee8f3b695e | 378 | (+) Receive data in blocking, interrupt or DMA mode. |
EricLew | 0:80ee8f3b695e | 379 | (+) Manage the auto-polling functional mode. |
EricLew | 0:80ee8f3b695e | 380 | (+) Manage the memory-mapped functional mode. |
EricLew | 0:80ee8f3b695e | 381 | |
EricLew | 0:80ee8f3b695e | 382 | @endverbatim |
EricLew | 0:80ee8f3b695e | 383 | * @{ |
EricLew | 0:80ee8f3b695e | 384 | */ |
EricLew | 0:80ee8f3b695e | 385 | |
EricLew | 0:80ee8f3b695e | 386 | /** |
EricLew | 0:80ee8f3b695e | 387 | * @brief Handle QSPI interrupt request. |
EricLew | 0:80ee8f3b695e | 388 | * @param hqspi: QSPI handle |
EricLew | 0:80ee8f3b695e | 389 | * @retval None |
EricLew | 0:80ee8f3b695e | 390 | */ |
EricLew | 0:80ee8f3b695e | 391 | void HAL_QSPI_IRQHandler(QSPI_HandleTypeDef *hqspi) |
EricLew | 0:80ee8f3b695e | 392 | { |
EricLew | 0:80ee8f3b695e | 393 | __IO uint32_t *data_reg; |
EricLew | 0:80ee8f3b695e | 394 | uint32_t flag = 0, itsource = 0; |
EricLew | 0:80ee8f3b695e | 395 | |
EricLew | 0:80ee8f3b695e | 396 | /* QSPI Fifo Threshold interrupt occurred ----------------------------------*/ |
EricLew | 0:80ee8f3b695e | 397 | flag = __HAL_QSPI_GET_FLAG(hqspi, QSPI_FLAG_FT); |
EricLew | 0:80ee8f3b695e | 398 | itsource = __HAL_QSPI_GET_IT_SOURCE(hqspi, QSPI_IT_FT); |
EricLew | 0:80ee8f3b695e | 399 | |
EricLew | 0:80ee8f3b695e | 400 | if((flag != RESET) && (itsource != RESET)) |
EricLew | 0:80ee8f3b695e | 401 | { |
EricLew | 0:80ee8f3b695e | 402 | data_reg = &hqspi->Instance->DR; |
EricLew | 0:80ee8f3b695e | 403 | |
EricLew | 0:80ee8f3b695e | 404 | if(hqspi->State == HAL_QSPI_STATE_BUSY_INDIRECT_TX) |
EricLew | 0:80ee8f3b695e | 405 | { |
EricLew | 0:80ee8f3b695e | 406 | /* Transmission process */ |
EricLew | 0:80ee8f3b695e | 407 | while(__HAL_QSPI_GET_FLAG(hqspi, QSPI_FLAG_FT) != 0) |
EricLew | 0:80ee8f3b695e | 408 | { |
EricLew | 0:80ee8f3b695e | 409 | if (hqspi->TxXferCount > 0) |
EricLew | 0:80ee8f3b695e | 410 | { |
EricLew | 0:80ee8f3b695e | 411 | /* Fill the FIFO until it is full */ |
EricLew | 0:80ee8f3b695e | 412 | *(__IO uint8_t *)data_reg = *hqspi->pTxBuffPtr++; |
EricLew | 0:80ee8f3b695e | 413 | hqspi->TxXferCount--; |
EricLew | 0:80ee8f3b695e | 414 | } |
EricLew | 0:80ee8f3b695e | 415 | else |
EricLew | 0:80ee8f3b695e | 416 | { |
EricLew | 0:80ee8f3b695e | 417 | /* No more data available for the transfer */ |
EricLew | 0:80ee8f3b695e | 418 | break; |
EricLew | 0:80ee8f3b695e | 419 | } |
EricLew | 0:80ee8f3b695e | 420 | } |
EricLew | 0:80ee8f3b695e | 421 | } |
EricLew | 0:80ee8f3b695e | 422 | else if(hqspi->State == HAL_QSPI_STATE_BUSY_INDIRECT_RX) |
EricLew | 0:80ee8f3b695e | 423 | { |
EricLew | 0:80ee8f3b695e | 424 | /* Receiving Process */ |
EricLew | 0:80ee8f3b695e | 425 | while(__HAL_QSPI_GET_FLAG(hqspi, QSPI_FLAG_FT) != 0) |
EricLew | 0:80ee8f3b695e | 426 | { |
EricLew | 0:80ee8f3b695e | 427 | if (hqspi->RxXferCount > 0) |
EricLew | 0:80ee8f3b695e | 428 | { |
EricLew | 0:80ee8f3b695e | 429 | /* Read the FIFO until it is empty */ |
EricLew | 0:80ee8f3b695e | 430 | *hqspi->pRxBuffPtr++ = *(__IO uint8_t *)data_reg; |
EricLew | 0:80ee8f3b695e | 431 | hqspi->RxXferCount--; |
EricLew | 0:80ee8f3b695e | 432 | } |
EricLew | 0:80ee8f3b695e | 433 | else |
EricLew | 0:80ee8f3b695e | 434 | { |
EricLew | 0:80ee8f3b695e | 435 | /* All data have been received for the transfer */ |
EricLew | 0:80ee8f3b695e | 436 | break; |
EricLew | 0:80ee8f3b695e | 437 | } |
EricLew | 0:80ee8f3b695e | 438 | } |
EricLew | 0:80ee8f3b695e | 439 | } |
EricLew | 0:80ee8f3b695e | 440 | |
EricLew | 0:80ee8f3b695e | 441 | /* FIFO Threshold callback */ |
EricLew | 0:80ee8f3b695e | 442 | HAL_QSPI_FifoThresholdCallback(hqspi); |
EricLew | 0:80ee8f3b695e | 443 | } |
EricLew | 0:80ee8f3b695e | 444 | |
EricLew | 0:80ee8f3b695e | 445 | /* QSPI Transfer Complete interrupt occurred -------------------------------*/ |
EricLew | 0:80ee8f3b695e | 446 | flag = __HAL_QSPI_GET_FLAG(hqspi, QSPI_FLAG_TC); |
EricLew | 0:80ee8f3b695e | 447 | itsource = __HAL_QSPI_GET_IT_SOURCE(hqspi, QSPI_IT_TC); |
EricLew | 0:80ee8f3b695e | 448 | |
EricLew | 0:80ee8f3b695e | 449 | if((flag != RESET) && (itsource != RESET)) |
EricLew | 0:80ee8f3b695e | 450 | { |
EricLew | 0:80ee8f3b695e | 451 | /* Clear interrupt */ |
EricLew | 0:80ee8f3b695e | 452 | __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_TC); |
EricLew | 0:80ee8f3b695e | 453 | |
EricLew | 0:80ee8f3b695e | 454 | /* Disable the QSPI FIFO Threshold, Transfer Error and Transfer complete Interrupts */ |
EricLew | 0:80ee8f3b695e | 455 | __HAL_QSPI_DISABLE_IT(hqspi, QSPI_IT_TC | QSPI_IT_TE | QSPI_IT_FT); |
EricLew | 0:80ee8f3b695e | 456 | |
EricLew | 0:80ee8f3b695e | 457 | /* Transfer complete callback */ |
EricLew | 0:80ee8f3b695e | 458 | if(hqspi->State == HAL_QSPI_STATE_BUSY_INDIRECT_TX) |
EricLew | 0:80ee8f3b695e | 459 | { |
EricLew | 0:80ee8f3b695e | 460 | /* Clear Busy bit */ |
EricLew | 0:80ee8f3b695e | 461 | HAL_QSPI_Abort(hqspi); |
EricLew | 0:80ee8f3b695e | 462 | |
EricLew | 0:80ee8f3b695e | 463 | /* TX Complete callback */ |
EricLew | 0:80ee8f3b695e | 464 | HAL_QSPI_TxCpltCallback(hqspi); |
EricLew | 0:80ee8f3b695e | 465 | } |
EricLew | 0:80ee8f3b695e | 466 | else if(hqspi->State == HAL_QSPI_STATE_BUSY_INDIRECT_RX) |
EricLew | 0:80ee8f3b695e | 467 | { |
EricLew | 0:80ee8f3b695e | 468 | data_reg = &hqspi->Instance->DR; |
EricLew | 0:80ee8f3b695e | 469 | while(READ_BIT(hqspi->Instance->SR, QUADSPI_SR_FLEVEL) != 0) |
EricLew | 0:80ee8f3b695e | 470 | { |
EricLew | 0:80ee8f3b695e | 471 | if (hqspi->RxXferCount > 0) |
EricLew | 0:80ee8f3b695e | 472 | { |
EricLew | 0:80ee8f3b695e | 473 | /* Read the last data received in the FIFO until it is empty */ |
EricLew | 0:80ee8f3b695e | 474 | *hqspi->pRxBuffPtr++ = *(__IO uint8_t *)data_reg; |
EricLew | 0:80ee8f3b695e | 475 | hqspi->RxXferCount--; |
EricLew | 0:80ee8f3b695e | 476 | } |
EricLew | 0:80ee8f3b695e | 477 | else |
EricLew | 0:80ee8f3b695e | 478 | { |
EricLew | 0:80ee8f3b695e | 479 | /* All data have been received for the transfer */ |
EricLew | 0:80ee8f3b695e | 480 | break; |
EricLew | 0:80ee8f3b695e | 481 | } |
EricLew | 0:80ee8f3b695e | 482 | } |
EricLew | 0:80ee8f3b695e | 483 | |
EricLew | 0:80ee8f3b695e | 484 | /* Workaround - Extra data written in the FIFO at the end of a read transfer */ |
EricLew | 0:80ee8f3b695e | 485 | HAL_QSPI_Abort(hqspi); |
EricLew | 0:80ee8f3b695e | 486 | |
EricLew | 0:80ee8f3b695e | 487 | /* RX Complete callback */ |
EricLew | 0:80ee8f3b695e | 488 | HAL_QSPI_RxCpltCallback(hqspi); |
EricLew | 0:80ee8f3b695e | 489 | } |
EricLew | 0:80ee8f3b695e | 490 | else if(hqspi->State == HAL_QSPI_STATE_BUSY) |
EricLew | 0:80ee8f3b695e | 491 | { |
EricLew | 0:80ee8f3b695e | 492 | /* Command Complete callback */ |
EricLew | 0:80ee8f3b695e | 493 | HAL_QSPI_CmdCpltCallback(hqspi); |
EricLew | 0:80ee8f3b695e | 494 | } |
EricLew | 0:80ee8f3b695e | 495 | |
EricLew | 0:80ee8f3b695e | 496 | /* Change state of QSPI */ |
EricLew | 0:80ee8f3b695e | 497 | hqspi->State = HAL_QSPI_STATE_READY; |
EricLew | 0:80ee8f3b695e | 498 | } |
EricLew | 0:80ee8f3b695e | 499 | |
EricLew | 0:80ee8f3b695e | 500 | /* QSPI Status Match interrupt occurred ------------------------------------*/ |
EricLew | 0:80ee8f3b695e | 501 | flag = __HAL_QSPI_GET_FLAG(hqspi, QSPI_FLAG_SM); |
EricLew | 0:80ee8f3b695e | 502 | itsource = __HAL_QSPI_GET_IT_SOURCE(hqspi, QSPI_IT_SM); |
EricLew | 0:80ee8f3b695e | 503 | |
EricLew | 0:80ee8f3b695e | 504 | if((flag != RESET) && (itsource != RESET)) |
EricLew | 0:80ee8f3b695e | 505 | { |
EricLew | 0:80ee8f3b695e | 506 | /* Clear interrupt */ |
EricLew | 0:80ee8f3b695e | 507 | __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_SM); |
EricLew | 0:80ee8f3b695e | 508 | |
EricLew | 0:80ee8f3b695e | 509 | /* Check if the automatic poll mode stop is activated */ |
EricLew | 0:80ee8f3b695e | 510 | if(READ_BIT(hqspi->Instance->CR, QUADSPI_CR_APMS) != 0) |
EricLew | 0:80ee8f3b695e | 511 | { |
EricLew | 0:80ee8f3b695e | 512 | /* Disable the QSPI Transfer Error and Status Match Interrupts */ |
EricLew | 0:80ee8f3b695e | 513 | __HAL_QSPI_DISABLE_IT(hqspi, (QSPI_IT_SM | QSPI_IT_TE)); |
EricLew | 0:80ee8f3b695e | 514 | |
EricLew | 0:80ee8f3b695e | 515 | /* Change state of QSPI */ |
EricLew | 0:80ee8f3b695e | 516 | hqspi->State = HAL_QSPI_STATE_READY; |
EricLew | 0:80ee8f3b695e | 517 | } |
EricLew | 0:80ee8f3b695e | 518 | |
EricLew | 0:80ee8f3b695e | 519 | /* Status match callback */ |
EricLew | 0:80ee8f3b695e | 520 | HAL_QSPI_StatusMatchCallback(hqspi); |
EricLew | 0:80ee8f3b695e | 521 | } |
EricLew | 0:80ee8f3b695e | 522 | |
EricLew | 0:80ee8f3b695e | 523 | /* QSPI Transfer Error interrupt occurred ----------------------------------*/ |
EricLew | 0:80ee8f3b695e | 524 | flag = __HAL_QSPI_GET_FLAG(hqspi, QSPI_FLAG_TE); |
EricLew | 0:80ee8f3b695e | 525 | itsource = __HAL_QSPI_GET_IT_SOURCE(hqspi, QSPI_IT_TE); |
EricLew | 0:80ee8f3b695e | 526 | |
EricLew | 0:80ee8f3b695e | 527 | if((flag != RESET) && (itsource != RESET)) |
EricLew | 0:80ee8f3b695e | 528 | { |
EricLew | 0:80ee8f3b695e | 529 | /* Clear interrupt */ |
EricLew | 0:80ee8f3b695e | 530 | __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_TE); |
EricLew | 0:80ee8f3b695e | 531 | |
EricLew | 0:80ee8f3b695e | 532 | /* Disable all the QSPI Interrupts */ |
EricLew | 0:80ee8f3b695e | 533 | __HAL_QSPI_DISABLE_IT(hqspi, QSPI_IT_SM | QSPI_IT_TC | QSPI_IT_TE | QSPI_IT_FT); |
EricLew | 0:80ee8f3b695e | 534 | |
EricLew | 0:80ee8f3b695e | 535 | /* Set error code */ |
EricLew | 0:80ee8f3b695e | 536 | hqspi->ErrorCode |= HAL_QSPI_ERROR_TRANSFER; |
EricLew | 0:80ee8f3b695e | 537 | |
EricLew | 0:80ee8f3b695e | 538 | /* Change state of QSPI */ |
EricLew | 0:80ee8f3b695e | 539 | hqspi->State = HAL_QSPI_STATE_ERROR; |
EricLew | 0:80ee8f3b695e | 540 | |
EricLew | 0:80ee8f3b695e | 541 | /* Error callback */ |
EricLew | 0:80ee8f3b695e | 542 | HAL_QSPI_ErrorCallback(hqspi); |
EricLew | 0:80ee8f3b695e | 543 | } |
EricLew | 0:80ee8f3b695e | 544 | |
EricLew | 0:80ee8f3b695e | 545 | /* QSPI Timeout interrupt occurred -----------------------------------------*/ |
EricLew | 0:80ee8f3b695e | 546 | flag = __HAL_QSPI_GET_FLAG(hqspi, QSPI_FLAG_TO); |
EricLew | 0:80ee8f3b695e | 547 | itsource = __HAL_QSPI_GET_IT_SOURCE(hqspi, QSPI_IT_TO); |
EricLew | 0:80ee8f3b695e | 548 | |
EricLew | 0:80ee8f3b695e | 549 | if((flag != RESET) && (itsource != RESET)) |
EricLew | 0:80ee8f3b695e | 550 | { |
EricLew | 0:80ee8f3b695e | 551 | /* Clear interrupt */ |
EricLew | 0:80ee8f3b695e | 552 | __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_TO); |
EricLew | 0:80ee8f3b695e | 553 | |
EricLew | 0:80ee8f3b695e | 554 | /* Timeout callback */ |
EricLew | 0:80ee8f3b695e | 555 | HAL_QSPI_TimeOutCallback(hqspi); |
EricLew | 0:80ee8f3b695e | 556 | } |
EricLew | 0:80ee8f3b695e | 557 | } |
EricLew | 0:80ee8f3b695e | 558 | |
EricLew | 0:80ee8f3b695e | 559 | /** |
EricLew | 0:80ee8f3b695e | 560 | * @brief Set the command configuration. |
EricLew | 0:80ee8f3b695e | 561 | * @param hqspi: QSPI handle |
EricLew | 0:80ee8f3b695e | 562 | * @param cmd : structure that contains the command configuration information |
EricLew | 0:80ee8f3b695e | 563 | * @param Timeout : Timeout duration |
EricLew | 0:80ee8f3b695e | 564 | * @note This function is used only in Indirect Read or Write Modes |
EricLew | 0:80ee8f3b695e | 565 | * @retval HAL status |
EricLew | 0:80ee8f3b695e | 566 | */ |
EricLew | 0:80ee8f3b695e | 567 | HAL_StatusTypeDef HAL_QSPI_Command(QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, uint32_t Timeout) |
EricLew | 0:80ee8f3b695e | 568 | { |
EricLew | 0:80ee8f3b695e | 569 | HAL_StatusTypeDef status = HAL_ERROR; |
EricLew | 0:80ee8f3b695e | 570 | |
EricLew | 0:80ee8f3b695e | 571 | /* Check the parameters */ |
EricLew | 0:80ee8f3b695e | 572 | assert_param(IS_QSPI_INSTRUCTION_MODE(cmd->InstructionMode)); |
EricLew | 0:80ee8f3b695e | 573 | if (cmd->InstructionMode != QSPI_INSTRUCTION_NONE) |
EricLew | 0:80ee8f3b695e | 574 | { |
EricLew | 0:80ee8f3b695e | 575 | assert_param(IS_QSPI_INSTRUCTION(cmd->Instruction)); |
EricLew | 0:80ee8f3b695e | 576 | } |
EricLew | 0:80ee8f3b695e | 577 | |
EricLew | 0:80ee8f3b695e | 578 | assert_param(IS_QSPI_ADDRESS_MODE(cmd->AddressMode)); |
EricLew | 0:80ee8f3b695e | 579 | if (cmd->AddressMode != QSPI_ADDRESS_NONE) |
EricLew | 0:80ee8f3b695e | 580 | { |
EricLew | 0:80ee8f3b695e | 581 | assert_param(IS_QSPI_ADDRESS_SIZE(cmd->AddressSize)); |
EricLew | 0:80ee8f3b695e | 582 | } |
EricLew | 0:80ee8f3b695e | 583 | |
EricLew | 0:80ee8f3b695e | 584 | assert_param(IS_QSPI_ALTERNATE_BYTES_MODE(cmd->AlternateByteMode)); |
EricLew | 0:80ee8f3b695e | 585 | if (cmd->AlternateByteMode != QSPI_ALTERNATE_BYTES_NONE) |
EricLew | 0:80ee8f3b695e | 586 | { |
EricLew | 0:80ee8f3b695e | 587 | assert_param(IS_QSPI_ALTERNATE_BYTES_SIZE(cmd->AlternateBytesSize)); |
EricLew | 0:80ee8f3b695e | 588 | } |
EricLew | 0:80ee8f3b695e | 589 | |
EricLew | 0:80ee8f3b695e | 590 | assert_param(IS_QSPI_DUMMY_CYCLES(cmd->DummyCycles)); |
EricLew | 0:80ee8f3b695e | 591 | assert_param(IS_QSPI_DATA_MODE(cmd->DataMode)); |
EricLew | 0:80ee8f3b695e | 592 | |
EricLew | 0:80ee8f3b695e | 593 | assert_param(IS_QSPI_DDR_MODE(cmd->DdrMode)); |
EricLew | 0:80ee8f3b695e | 594 | assert_param(IS_QSPI_DDR_HHC(cmd->DdrHoldHalfCycle)); |
EricLew | 0:80ee8f3b695e | 595 | assert_param(IS_QSPI_SIOO_MODE(cmd->SIOOMode)); |
EricLew | 0:80ee8f3b695e | 596 | |
EricLew | 0:80ee8f3b695e | 597 | /* Process locked */ |
EricLew | 0:80ee8f3b695e | 598 | __HAL_LOCK(hqspi); |
EricLew | 0:80ee8f3b695e | 599 | |
EricLew | 0:80ee8f3b695e | 600 | if(hqspi->State == HAL_QSPI_STATE_READY) |
EricLew | 0:80ee8f3b695e | 601 | { |
EricLew | 0:80ee8f3b695e | 602 | hqspi->ErrorCode = HAL_QSPI_ERROR_NONE; |
EricLew | 0:80ee8f3b695e | 603 | |
EricLew | 0:80ee8f3b695e | 604 | /* Update QSPI state */ |
EricLew | 0:80ee8f3b695e | 605 | hqspi->State = HAL_QSPI_STATE_BUSY; |
EricLew | 0:80ee8f3b695e | 606 | |
EricLew | 0:80ee8f3b695e | 607 | /* Wait till BUSY flag reset */ |
EricLew | 0:80ee8f3b695e | 608 | status = QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_BUSY, RESET, Timeout); |
EricLew | 0:80ee8f3b695e | 609 | |
EricLew | 0:80ee8f3b695e | 610 | if (status == HAL_OK) |
EricLew | 0:80ee8f3b695e | 611 | { |
EricLew | 0:80ee8f3b695e | 612 | /* Call the configuration function */ |
EricLew | 0:80ee8f3b695e | 613 | QSPI_Config(hqspi, cmd, QSPI_FUNCTIONAL_MODE_INDIRECT_WRITE); |
EricLew | 0:80ee8f3b695e | 614 | |
EricLew | 0:80ee8f3b695e | 615 | if (cmd->DataMode == QSPI_DATA_NONE) |
EricLew | 0:80ee8f3b695e | 616 | { |
EricLew | 0:80ee8f3b695e | 617 | /* When there is no data phase, the transfer start as soon as the configuration is done |
EricLew | 0:80ee8f3b695e | 618 | so wait until TC flag is set to go back in idle state */ |
EricLew | 0:80ee8f3b695e | 619 | if(QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_TC, SET, Timeout) != HAL_OK) |
EricLew | 0:80ee8f3b695e | 620 | { |
EricLew | 0:80ee8f3b695e | 621 | status = HAL_TIMEOUT; |
EricLew | 0:80ee8f3b695e | 622 | } |
EricLew | 0:80ee8f3b695e | 623 | else |
EricLew | 0:80ee8f3b695e | 624 | { |
EricLew | 0:80ee8f3b695e | 625 | __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_TC); |
EricLew | 0:80ee8f3b695e | 626 | |
EricLew | 0:80ee8f3b695e | 627 | /* Update QSPI state */ |
EricLew | 0:80ee8f3b695e | 628 | hqspi->State = HAL_QSPI_STATE_READY; |
EricLew | 0:80ee8f3b695e | 629 | } |
EricLew | 0:80ee8f3b695e | 630 | |
EricLew | 0:80ee8f3b695e | 631 | } |
EricLew | 0:80ee8f3b695e | 632 | else |
EricLew | 0:80ee8f3b695e | 633 | { |
EricLew | 0:80ee8f3b695e | 634 | /* Update QSPI state */ |
EricLew | 0:80ee8f3b695e | 635 | hqspi->State = HAL_QSPI_STATE_READY; |
EricLew | 0:80ee8f3b695e | 636 | } |
EricLew | 0:80ee8f3b695e | 637 | } |
EricLew | 0:80ee8f3b695e | 638 | } |
EricLew | 0:80ee8f3b695e | 639 | else |
EricLew | 0:80ee8f3b695e | 640 | { |
EricLew | 0:80ee8f3b695e | 641 | status = HAL_BUSY; |
EricLew | 0:80ee8f3b695e | 642 | } |
EricLew | 0:80ee8f3b695e | 643 | |
EricLew | 0:80ee8f3b695e | 644 | /* Process unlocked */ |
EricLew | 0:80ee8f3b695e | 645 | __HAL_UNLOCK(hqspi); |
EricLew | 0:80ee8f3b695e | 646 | |
EricLew | 0:80ee8f3b695e | 647 | /* Return function status */ |
EricLew | 0:80ee8f3b695e | 648 | return status; |
EricLew | 0:80ee8f3b695e | 649 | } |
EricLew | 0:80ee8f3b695e | 650 | |
EricLew | 0:80ee8f3b695e | 651 | /** |
EricLew | 0:80ee8f3b695e | 652 | * @brief Set the command configuration in interrupt mode. |
EricLew | 0:80ee8f3b695e | 653 | * @param hqspi: QSPI handle |
EricLew | 0:80ee8f3b695e | 654 | * @param cmd : structure that contains the command configuration information |
EricLew | 0:80ee8f3b695e | 655 | * @note This function is used only in Indirect Read or Write Modes |
EricLew | 0:80ee8f3b695e | 656 | * @retval HAL status |
EricLew | 0:80ee8f3b695e | 657 | */ |
EricLew | 0:80ee8f3b695e | 658 | HAL_StatusTypeDef HAL_QSPI_Command_IT(QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd) |
EricLew | 0:80ee8f3b695e | 659 | { |
EricLew | 0:80ee8f3b695e | 660 | HAL_StatusTypeDef status = HAL_ERROR; |
EricLew | 0:80ee8f3b695e | 661 | |
EricLew | 0:80ee8f3b695e | 662 | /* Check the parameters */ |
EricLew | 0:80ee8f3b695e | 663 | assert_param(IS_QSPI_INSTRUCTION_MODE(cmd->InstructionMode)); |
EricLew | 0:80ee8f3b695e | 664 | if (cmd->InstructionMode != QSPI_INSTRUCTION_NONE) |
EricLew | 0:80ee8f3b695e | 665 | { |
EricLew | 0:80ee8f3b695e | 666 | assert_param(IS_QSPI_INSTRUCTION(cmd->Instruction)); |
EricLew | 0:80ee8f3b695e | 667 | } |
EricLew | 0:80ee8f3b695e | 668 | |
EricLew | 0:80ee8f3b695e | 669 | assert_param(IS_QSPI_ADDRESS_MODE(cmd->AddressMode)); |
EricLew | 0:80ee8f3b695e | 670 | if (cmd->AddressMode != QSPI_ADDRESS_NONE) |
EricLew | 0:80ee8f3b695e | 671 | { |
EricLew | 0:80ee8f3b695e | 672 | assert_param(IS_QSPI_ADDRESS_SIZE(cmd->AddressSize)); |
EricLew | 0:80ee8f3b695e | 673 | } |
EricLew | 0:80ee8f3b695e | 674 | |
EricLew | 0:80ee8f3b695e | 675 | assert_param(IS_QSPI_ALTERNATE_BYTES_MODE(cmd->AlternateByteMode)); |
EricLew | 0:80ee8f3b695e | 676 | if (cmd->AlternateByteMode != QSPI_ALTERNATE_BYTES_NONE) |
EricLew | 0:80ee8f3b695e | 677 | { |
EricLew | 0:80ee8f3b695e | 678 | assert_param(IS_QSPI_ALTERNATE_BYTES_SIZE(cmd->AlternateBytesSize)); |
EricLew | 0:80ee8f3b695e | 679 | } |
EricLew | 0:80ee8f3b695e | 680 | |
EricLew | 0:80ee8f3b695e | 681 | assert_param(IS_QSPI_DUMMY_CYCLES(cmd->DummyCycles)); |
EricLew | 0:80ee8f3b695e | 682 | assert_param(IS_QSPI_DATA_MODE(cmd->DataMode)); |
EricLew | 0:80ee8f3b695e | 683 | |
EricLew | 0:80ee8f3b695e | 684 | assert_param(IS_QSPI_DDR_MODE(cmd->DdrMode)); |
EricLew | 0:80ee8f3b695e | 685 | assert_param(IS_QSPI_DDR_HHC(cmd->DdrHoldHalfCycle)); |
EricLew | 0:80ee8f3b695e | 686 | assert_param(IS_QSPI_SIOO_MODE(cmd->SIOOMode)); |
EricLew | 0:80ee8f3b695e | 687 | |
EricLew | 0:80ee8f3b695e | 688 | /* Process locked */ |
EricLew | 0:80ee8f3b695e | 689 | __HAL_LOCK(hqspi); |
EricLew | 0:80ee8f3b695e | 690 | |
EricLew | 0:80ee8f3b695e | 691 | if(hqspi->State == HAL_QSPI_STATE_READY) |
EricLew | 0:80ee8f3b695e | 692 | { |
EricLew | 0:80ee8f3b695e | 693 | hqspi->ErrorCode = HAL_QSPI_ERROR_NONE; |
EricLew | 0:80ee8f3b695e | 694 | |
EricLew | 0:80ee8f3b695e | 695 | /* Update QSPI state */ |
EricLew | 0:80ee8f3b695e | 696 | hqspi->State = HAL_QSPI_STATE_BUSY; |
EricLew | 0:80ee8f3b695e | 697 | |
EricLew | 0:80ee8f3b695e | 698 | /* Wait till BUSY flag reset */ |
EricLew | 0:80ee8f3b695e | 699 | status = QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_BUSY, RESET, hqspi->Timeout); |
EricLew | 0:80ee8f3b695e | 700 | |
EricLew | 0:80ee8f3b695e | 701 | if (status == HAL_OK) |
EricLew | 0:80ee8f3b695e | 702 | { |
EricLew | 0:80ee8f3b695e | 703 | if (cmd->DataMode == QSPI_DATA_NONE) |
EricLew | 0:80ee8f3b695e | 704 | { |
EricLew | 0:80ee8f3b695e | 705 | /* When there is no data phase, the transfer start as soon as the configuration is done |
EricLew | 0:80ee8f3b695e | 706 | so activate TC and TE interrupts */ |
EricLew | 0:80ee8f3b695e | 707 | /* Clear interrupt */ |
EricLew | 0:80ee8f3b695e | 708 | __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_TE | QSPI_FLAG_TC); |
EricLew | 0:80ee8f3b695e | 709 | |
EricLew | 0:80ee8f3b695e | 710 | /* Enable the QSPI Transfer Error Interrupt */ |
EricLew | 0:80ee8f3b695e | 711 | __HAL_QSPI_ENABLE_IT(hqspi, QSPI_IT_TE | QSPI_IT_TC); |
EricLew | 0:80ee8f3b695e | 712 | } |
EricLew | 0:80ee8f3b695e | 713 | |
EricLew | 0:80ee8f3b695e | 714 | /* Call the configuration function */ |
EricLew | 0:80ee8f3b695e | 715 | QSPI_Config(hqspi, cmd, QSPI_FUNCTIONAL_MODE_INDIRECT_WRITE); |
EricLew | 0:80ee8f3b695e | 716 | |
EricLew | 0:80ee8f3b695e | 717 | if (cmd->DataMode != QSPI_DATA_NONE) |
EricLew | 0:80ee8f3b695e | 718 | { |
EricLew | 0:80ee8f3b695e | 719 | /* Update QSPI state */ |
EricLew | 0:80ee8f3b695e | 720 | hqspi->State = HAL_QSPI_STATE_READY; |
EricLew | 0:80ee8f3b695e | 721 | } |
EricLew | 0:80ee8f3b695e | 722 | } |
EricLew | 0:80ee8f3b695e | 723 | } |
EricLew | 0:80ee8f3b695e | 724 | else |
EricLew | 0:80ee8f3b695e | 725 | { |
EricLew | 0:80ee8f3b695e | 726 | status = HAL_BUSY; |
EricLew | 0:80ee8f3b695e | 727 | } |
EricLew | 0:80ee8f3b695e | 728 | |
EricLew | 0:80ee8f3b695e | 729 | /* Process unlocked */ |
EricLew | 0:80ee8f3b695e | 730 | __HAL_UNLOCK(hqspi); |
EricLew | 0:80ee8f3b695e | 731 | |
EricLew | 0:80ee8f3b695e | 732 | /* Return function status */ |
EricLew | 0:80ee8f3b695e | 733 | return status; |
EricLew | 0:80ee8f3b695e | 734 | } |
EricLew | 0:80ee8f3b695e | 735 | |
EricLew | 0:80ee8f3b695e | 736 | /** |
EricLew | 0:80ee8f3b695e | 737 | * @brief Transmit an amount of data in blocking mode. |
EricLew | 0:80ee8f3b695e | 738 | * @param hqspi: QSPI handle |
EricLew | 0:80ee8f3b695e | 739 | * @param pData: pointer to data buffer |
EricLew | 0:80ee8f3b695e | 740 | * @param Timeout : Timeout duration |
EricLew | 0:80ee8f3b695e | 741 | * @note This function is used only in Indirect Write Mode |
EricLew | 0:80ee8f3b695e | 742 | * @retval HAL status |
EricLew | 0:80ee8f3b695e | 743 | */ |
EricLew | 0:80ee8f3b695e | 744 | HAL_StatusTypeDef HAL_QSPI_Transmit(QSPI_HandleTypeDef *hqspi, uint8_t *pData, uint32_t Timeout) |
EricLew | 0:80ee8f3b695e | 745 | { |
EricLew | 0:80ee8f3b695e | 746 | HAL_StatusTypeDef status = HAL_OK; |
EricLew | 0:80ee8f3b695e | 747 | __IO uint32_t *data_reg = &hqspi->Instance->DR; |
EricLew | 0:80ee8f3b695e | 748 | |
EricLew | 0:80ee8f3b695e | 749 | /* Process locked */ |
EricLew | 0:80ee8f3b695e | 750 | __HAL_LOCK(hqspi); |
EricLew | 0:80ee8f3b695e | 751 | |
EricLew | 0:80ee8f3b695e | 752 | if(hqspi->State == HAL_QSPI_STATE_READY) |
EricLew | 0:80ee8f3b695e | 753 | { |
EricLew | 0:80ee8f3b695e | 754 | if(pData != NULL ) |
EricLew | 0:80ee8f3b695e | 755 | { |
EricLew | 0:80ee8f3b695e | 756 | hqspi->ErrorCode = HAL_QSPI_ERROR_NONE; |
EricLew | 0:80ee8f3b695e | 757 | |
EricLew | 0:80ee8f3b695e | 758 | /* Update state */ |
EricLew | 0:80ee8f3b695e | 759 | hqspi->State = HAL_QSPI_STATE_BUSY_INDIRECT_TX; |
EricLew | 0:80ee8f3b695e | 760 | |
EricLew | 0:80ee8f3b695e | 761 | /* Configure counters and size of the handle */ |
EricLew | 0:80ee8f3b695e | 762 | hqspi->TxXferCount = READ_REG(hqspi->Instance->DLR) + 1; |
EricLew | 0:80ee8f3b695e | 763 | hqspi->TxXferSize = READ_REG(hqspi->Instance->DLR) + 1; |
EricLew | 0:80ee8f3b695e | 764 | hqspi->pTxBuffPtr = pData; |
EricLew | 0:80ee8f3b695e | 765 | |
EricLew | 0:80ee8f3b695e | 766 | /* Configure QSPI: CCR register with functional as indirect write */ |
EricLew | 0:80ee8f3b695e | 767 | MODIFY_REG(hqspi->Instance->CCR, QUADSPI_CCR_FMODE, QSPI_FUNCTIONAL_MODE_INDIRECT_WRITE); |
EricLew | 0:80ee8f3b695e | 768 | |
EricLew | 0:80ee8f3b695e | 769 | while(hqspi->TxXferCount > 0) |
EricLew | 0:80ee8f3b695e | 770 | { |
EricLew | 0:80ee8f3b695e | 771 | /* Wait until FT flag is set to send data */ |
EricLew | 0:80ee8f3b695e | 772 | if(QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_FT, SET, Timeout) != HAL_OK) |
EricLew | 0:80ee8f3b695e | 773 | { |
EricLew | 0:80ee8f3b695e | 774 | status = HAL_TIMEOUT; |
EricLew | 0:80ee8f3b695e | 775 | break; |
EricLew | 0:80ee8f3b695e | 776 | } |
EricLew | 0:80ee8f3b695e | 777 | |
EricLew | 0:80ee8f3b695e | 778 | *(__IO uint8_t *)data_reg = *hqspi->pTxBuffPtr++; |
EricLew | 0:80ee8f3b695e | 779 | hqspi->TxXferCount--; |
EricLew | 0:80ee8f3b695e | 780 | } |
EricLew | 0:80ee8f3b695e | 781 | |
EricLew | 0:80ee8f3b695e | 782 | if (status == HAL_OK) |
EricLew | 0:80ee8f3b695e | 783 | { |
EricLew | 0:80ee8f3b695e | 784 | /* Wait until TC flag is set to go back in idle state */ |
EricLew | 0:80ee8f3b695e | 785 | if(QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_TC, SET, Timeout) != HAL_OK) |
EricLew | 0:80ee8f3b695e | 786 | { |
EricLew | 0:80ee8f3b695e | 787 | status = HAL_TIMEOUT; |
EricLew | 0:80ee8f3b695e | 788 | } |
EricLew | 0:80ee8f3b695e | 789 | else |
EricLew | 0:80ee8f3b695e | 790 | { |
EricLew | 0:80ee8f3b695e | 791 | /* Clear Transfer Complete bit */ |
EricLew | 0:80ee8f3b695e | 792 | __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_TC); |
EricLew | 0:80ee8f3b695e | 793 | |
EricLew | 0:80ee8f3b695e | 794 | /* Clear Busy bit */ |
EricLew | 0:80ee8f3b695e | 795 | status = HAL_QSPI_Abort(hqspi); |
EricLew | 0:80ee8f3b695e | 796 | } |
EricLew | 0:80ee8f3b695e | 797 | } |
EricLew | 0:80ee8f3b695e | 798 | |
EricLew | 0:80ee8f3b695e | 799 | /* Update QSPI state */ |
EricLew | 0:80ee8f3b695e | 800 | hqspi->State = HAL_QSPI_STATE_READY; |
EricLew | 0:80ee8f3b695e | 801 | } |
EricLew | 0:80ee8f3b695e | 802 | else |
EricLew | 0:80ee8f3b695e | 803 | { |
EricLew | 0:80ee8f3b695e | 804 | status = HAL_ERROR; |
EricLew | 0:80ee8f3b695e | 805 | } |
EricLew | 0:80ee8f3b695e | 806 | } |
EricLew | 0:80ee8f3b695e | 807 | else |
EricLew | 0:80ee8f3b695e | 808 | { |
EricLew | 0:80ee8f3b695e | 809 | status = HAL_BUSY; |
EricLew | 0:80ee8f3b695e | 810 | } |
EricLew | 0:80ee8f3b695e | 811 | |
EricLew | 0:80ee8f3b695e | 812 | /* Process unlocked */ |
EricLew | 0:80ee8f3b695e | 813 | __HAL_UNLOCK(hqspi); |
EricLew | 0:80ee8f3b695e | 814 | |
EricLew | 0:80ee8f3b695e | 815 | return status; |
EricLew | 0:80ee8f3b695e | 816 | } |
EricLew | 0:80ee8f3b695e | 817 | |
EricLew | 0:80ee8f3b695e | 818 | |
EricLew | 0:80ee8f3b695e | 819 | /** |
EricLew | 0:80ee8f3b695e | 820 | * @brief Receive an amount of data in blocking mode. |
EricLew | 0:80ee8f3b695e | 821 | * @param hqspi: QSPI handle |
EricLew | 0:80ee8f3b695e | 822 | * @param pData: pointer to data buffer |
EricLew | 0:80ee8f3b695e | 823 | * @param Timeout : Timeout duration |
EricLew | 0:80ee8f3b695e | 824 | * @note This function is used only in Indirect Read Mode |
EricLew | 0:80ee8f3b695e | 825 | * @retval HAL status |
EricLew | 0:80ee8f3b695e | 826 | */ |
EricLew | 0:80ee8f3b695e | 827 | HAL_StatusTypeDef HAL_QSPI_Receive(QSPI_HandleTypeDef *hqspi, uint8_t *pData, uint32_t Timeout) |
EricLew | 0:80ee8f3b695e | 828 | { |
EricLew | 0:80ee8f3b695e | 829 | HAL_StatusTypeDef status = HAL_OK; |
EricLew | 0:80ee8f3b695e | 830 | uint32_t addr_reg = READ_REG(hqspi->Instance->AR); |
EricLew | 0:80ee8f3b695e | 831 | __IO uint32_t *data_reg = &hqspi->Instance->DR; |
EricLew | 0:80ee8f3b695e | 832 | |
EricLew | 0:80ee8f3b695e | 833 | /* Process locked */ |
EricLew | 0:80ee8f3b695e | 834 | __HAL_LOCK(hqspi); |
EricLew | 0:80ee8f3b695e | 835 | |
EricLew | 0:80ee8f3b695e | 836 | if(hqspi->State == HAL_QSPI_STATE_READY) |
EricLew | 0:80ee8f3b695e | 837 | { |
EricLew | 0:80ee8f3b695e | 838 | if(pData != NULL ) |
EricLew | 0:80ee8f3b695e | 839 | { |
EricLew | 0:80ee8f3b695e | 840 | hqspi->ErrorCode = HAL_QSPI_ERROR_NONE; |
EricLew | 0:80ee8f3b695e | 841 | |
EricLew | 0:80ee8f3b695e | 842 | /* Update state */ |
EricLew | 0:80ee8f3b695e | 843 | hqspi->State = HAL_QSPI_STATE_BUSY_INDIRECT_RX; |
EricLew | 0:80ee8f3b695e | 844 | |
EricLew | 0:80ee8f3b695e | 845 | /* Configure counters and size of the handle */ |
EricLew | 0:80ee8f3b695e | 846 | hqspi->RxXferCount = READ_REG(hqspi->Instance->DLR) + 1; |
EricLew | 0:80ee8f3b695e | 847 | hqspi->RxXferSize = READ_REG(hqspi->Instance->DLR) + 1; |
EricLew | 0:80ee8f3b695e | 848 | hqspi->pRxBuffPtr = pData; |
EricLew | 0:80ee8f3b695e | 849 | |
EricLew | 0:80ee8f3b695e | 850 | /* Configure QSPI: CCR register with functional as indirect read */ |
EricLew | 0:80ee8f3b695e | 851 | MODIFY_REG(hqspi->Instance->CCR, QUADSPI_CCR_FMODE, QSPI_FUNCTIONAL_MODE_INDIRECT_READ); |
EricLew | 0:80ee8f3b695e | 852 | |
EricLew | 0:80ee8f3b695e | 853 | /* Start the transfer by re-writing the address in AR register */ |
EricLew | 0:80ee8f3b695e | 854 | WRITE_REG(hqspi->Instance->AR, addr_reg); |
EricLew | 0:80ee8f3b695e | 855 | |
EricLew | 0:80ee8f3b695e | 856 | while(hqspi->RxXferCount > 0) |
EricLew | 0:80ee8f3b695e | 857 | { |
EricLew | 0:80ee8f3b695e | 858 | /* Wait until FT or TC flag is set to read received data */ |
EricLew | 0:80ee8f3b695e | 859 | if(QSPI_WaitFlagStateUntilTimeout(hqspi, (QSPI_FLAG_FT | QSPI_FLAG_TC), SET, Timeout) != HAL_OK) |
EricLew | 0:80ee8f3b695e | 860 | { |
EricLew | 0:80ee8f3b695e | 861 | status = HAL_TIMEOUT; |
EricLew | 0:80ee8f3b695e | 862 | break; |
EricLew | 0:80ee8f3b695e | 863 | } |
EricLew | 0:80ee8f3b695e | 864 | |
EricLew | 0:80ee8f3b695e | 865 | *hqspi->pRxBuffPtr++ = *(__IO uint8_t *)data_reg; |
EricLew | 0:80ee8f3b695e | 866 | hqspi->RxXferCount--; |
EricLew | 0:80ee8f3b695e | 867 | } |
EricLew | 0:80ee8f3b695e | 868 | |
EricLew | 0:80ee8f3b695e | 869 | if (status == HAL_OK) |
EricLew | 0:80ee8f3b695e | 870 | { |
EricLew | 0:80ee8f3b695e | 871 | /* Wait until TC flag is set to go back in idle state */ |
EricLew | 0:80ee8f3b695e | 872 | if(QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_TC, SET, Timeout) != HAL_OK) |
EricLew | 0:80ee8f3b695e | 873 | { |
EricLew | 0:80ee8f3b695e | 874 | status = HAL_TIMEOUT; |
EricLew | 0:80ee8f3b695e | 875 | } |
EricLew | 0:80ee8f3b695e | 876 | else |
EricLew | 0:80ee8f3b695e | 877 | { |
EricLew | 0:80ee8f3b695e | 878 | /* Clear Transfer Complete bit */ |
EricLew | 0:80ee8f3b695e | 879 | __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_TC); |
EricLew | 0:80ee8f3b695e | 880 | |
EricLew | 0:80ee8f3b695e | 881 | /* Workaround - Extra data written in the FIFO at the end of a read transfer */ |
EricLew | 0:80ee8f3b695e | 882 | status = HAL_QSPI_Abort(hqspi); |
EricLew | 0:80ee8f3b695e | 883 | } |
EricLew | 0:80ee8f3b695e | 884 | } |
EricLew | 0:80ee8f3b695e | 885 | |
EricLew | 0:80ee8f3b695e | 886 | /* Update QSPI state */ |
EricLew | 0:80ee8f3b695e | 887 | hqspi->State = HAL_QSPI_STATE_READY; |
EricLew | 0:80ee8f3b695e | 888 | } |
EricLew | 0:80ee8f3b695e | 889 | else |
EricLew | 0:80ee8f3b695e | 890 | { |
EricLew | 0:80ee8f3b695e | 891 | status = HAL_ERROR; |
EricLew | 0:80ee8f3b695e | 892 | } |
EricLew | 0:80ee8f3b695e | 893 | } |
EricLew | 0:80ee8f3b695e | 894 | else |
EricLew | 0:80ee8f3b695e | 895 | { |
EricLew | 0:80ee8f3b695e | 896 | status = HAL_BUSY; |
EricLew | 0:80ee8f3b695e | 897 | } |
EricLew | 0:80ee8f3b695e | 898 | |
EricLew | 0:80ee8f3b695e | 899 | /* Process unlocked */ |
EricLew | 0:80ee8f3b695e | 900 | __HAL_UNLOCK(hqspi); |
EricLew | 0:80ee8f3b695e | 901 | |
EricLew | 0:80ee8f3b695e | 902 | return status; |
EricLew | 0:80ee8f3b695e | 903 | } |
EricLew | 0:80ee8f3b695e | 904 | |
EricLew | 0:80ee8f3b695e | 905 | /** |
EricLew | 0:80ee8f3b695e | 906 | * @brief Send an amount of data in non-blocking mode with interrupt. |
EricLew | 0:80ee8f3b695e | 907 | * @param hqspi: QSPI handle |
EricLew | 0:80ee8f3b695e | 908 | * @param pData: pointer to data buffer |
EricLew | 0:80ee8f3b695e | 909 | * @note This function is used only in Indirect Write Mode |
EricLew | 0:80ee8f3b695e | 910 | * @retval HAL status |
EricLew | 0:80ee8f3b695e | 911 | */ |
EricLew | 0:80ee8f3b695e | 912 | HAL_StatusTypeDef HAL_QSPI_Transmit_IT(QSPI_HandleTypeDef *hqspi, uint8_t *pData) |
EricLew | 0:80ee8f3b695e | 913 | { |
EricLew | 0:80ee8f3b695e | 914 | HAL_StatusTypeDef status = HAL_OK; |
EricLew | 0:80ee8f3b695e | 915 | |
EricLew | 0:80ee8f3b695e | 916 | /* Process locked */ |
EricLew | 0:80ee8f3b695e | 917 | __HAL_LOCK(hqspi); |
EricLew | 0:80ee8f3b695e | 918 | |
EricLew | 0:80ee8f3b695e | 919 | if(hqspi->State == HAL_QSPI_STATE_READY) |
EricLew | 0:80ee8f3b695e | 920 | { |
EricLew | 0:80ee8f3b695e | 921 | if(pData != NULL ) |
EricLew | 0:80ee8f3b695e | 922 | { |
EricLew | 0:80ee8f3b695e | 923 | hqspi->ErrorCode = HAL_QSPI_ERROR_NONE; |
EricLew | 0:80ee8f3b695e | 924 | |
EricLew | 0:80ee8f3b695e | 925 | /* Update state */ |
EricLew | 0:80ee8f3b695e | 926 | hqspi->State = HAL_QSPI_STATE_BUSY_INDIRECT_TX; |
EricLew | 0:80ee8f3b695e | 927 | |
EricLew | 0:80ee8f3b695e | 928 | /* Configure counters and size of the handle */ |
EricLew | 0:80ee8f3b695e | 929 | hqspi->TxXferCount = READ_REG(hqspi->Instance->DLR) + 1; |
EricLew | 0:80ee8f3b695e | 930 | hqspi->TxXferSize = READ_REG(hqspi->Instance->DLR) + 1; |
EricLew | 0:80ee8f3b695e | 931 | hqspi->pTxBuffPtr = pData; |
EricLew | 0:80ee8f3b695e | 932 | |
EricLew | 0:80ee8f3b695e | 933 | /* Configure QSPI: CCR register with functional as indirect write */ |
EricLew | 0:80ee8f3b695e | 934 | MODIFY_REG(hqspi->Instance->CCR, QUADSPI_CCR_FMODE, QSPI_FUNCTIONAL_MODE_INDIRECT_WRITE); |
EricLew | 0:80ee8f3b695e | 935 | |
EricLew | 0:80ee8f3b695e | 936 | /* Clear interrupt */ |
EricLew | 0:80ee8f3b695e | 937 | __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_TE | QSPI_FLAG_TC); |
EricLew | 0:80ee8f3b695e | 938 | |
EricLew | 0:80ee8f3b695e | 939 | /* Enable the QSPI transfer error, FIFO threshold and transfer complete Interrupts */ |
EricLew | 0:80ee8f3b695e | 940 | __HAL_QSPI_ENABLE_IT(hqspi, QSPI_IT_TE | QSPI_IT_FT | QSPI_IT_TC); |
EricLew | 0:80ee8f3b695e | 941 | } |
EricLew | 0:80ee8f3b695e | 942 | else |
EricLew | 0:80ee8f3b695e | 943 | { |
EricLew | 0:80ee8f3b695e | 944 | status = HAL_ERROR; |
EricLew | 0:80ee8f3b695e | 945 | } |
EricLew | 0:80ee8f3b695e | 946 | } |
EricLew | 0:80ee8f3b695e | 947 | else |
EricLew | 0:80ee8f3b695e | 948 | { |
EricLew | 0:80ee8f3b695e | 949 | status = HAL_BUSY; |
EricLew | 0:80ee8f3b695e | 950 | } |
EricLew | 0:80ee8f3b695e | 951 | |
EricLew | 0:80ee8f3b695e | 952 | /* Process unlocked */ |
EricLew | 0:80ee8f3b695e | 953 | __HAL_UNLOCK(hqspi); |
EricLew | 0:80ee8f3b695e | 954 | |
EricLew | 0:80ee8f3b695e | 955 | return status; |
EricLew | 0:80ee8f3b695e | 956 | } |
EricLew | 0:80ee8f3b695e | 957 | |
EricLew | 0:80ee8f3b695e | 958 | /** |
EricLew | 0:80ee8f3b695e | 959 | * @brief Receive an amount of data in non-blocking mode with interrupt. |
EricLew | 0:80ee8f3b695e | 960 | * @param hqspi: QSPI handle |
EricLew | 0:80ee8f3b695e | 961 | * @param pData: pointer to data buffer |
EricLew | 0:80ee8f3b695e | 962 | * @note This function is used only in Indirect Read Mode |
EricLew | 0:80ee8f3b695e | 963 | * @retval HAL status |
EricLew | 0:80ee8f3b695e | 964 | */ |
EricLew | 0:80ee8f3b695e | 965 | HAL_StatusTypeDef HAL_QSPI_Receive_IT(QSPI_HandleTypeDef *hqspi, uint8_t *pData) |
EricLew | 0:80ee8f3b695e | 966 | { |
EricLew | 0:80ee8f3b695e | 967 | HAL_StatusTypeDef status = HAL_OK; |
EricLew | 0:80ee8f3b695e | 968 | uint32_t addr_reg = READ_REG(hqspi->Instance->AR); |
EricLew | 0:80ee8f3b695e | 969 | |
EricLew | 0:80ee8f3b695e | 970 | /* Process locked */ |
EricLew | 0:80ee8f3b695e | 971 | __HAL_LOCK(hqspi); |
EricLew | 0:80ee8f3b695e | 972 | |
EricLew | 0:80ee8f3b695e | 973 | if(hqspi->State == HAL_QSPI_STATE_READY) |
EricLew | 0:80ee8f3b695e | 974 | { |
EricLew | 0:80ee8f3b695e | 975 | if(pData != NULL ) |
EricLew | 0:80ee8f3b695e | 976 | { |
EricLew | 0:80ee8f3b695e | 977 | hqspi->ErrorCode = HAL_QSPI_ERROR_NONE; |
EricLew | 0:80ee8f3b695e | 978 | |
EricLew | 0:80ee8f3b695e | 979 | /* Update state */ |
EricLew | 0:80ee8f3b695e | 980 | hqspi->State = HAL_QSPI_STATE_BUSY_INDIRECT_RX; |
EricLew | 0:80ee8f3b695e | 981 | |
EricLew | 0:80ee8f3b695e | 982 | /* Configure counters and size of the handle */ |
EricLew | 0:80ee8f3b695e | 983 | hqspi->RxXferCount = READ_REG(hqspi->Instance->DLR) + 1; |
EricLew | 0:80ee8f3b695e | 984 | hqspi->RxXferSize = READ_REG(hqspi->Instance->DLR) + 1; |
EricLew | 0:80ee8f3b695e | 985 | hqspi->pRxBuffPtr = pData; |
EricLew | 0:80ee8f3b695e | 986 | |
EricLew | 0:80ee8f3b695e | 987 | /* Configure QSPI: CCR register with functional as indirect read */ |
EricLew | 0:80ee8f3b695e | 988 | MODIFY_REG(hqspi->Instance->CCR, QUADSPI_CCR_FMODE, QSPI_FUNCTIONAL_MODE_INDIRECT_READ); |
EricLew | 0:80ee8f3b695e | 989 | |
EricLew | 0:80ee8f3b695e | 990 | /* Start the transfer by re-writing the address in AR register */ |
EricLew | 0:80ee8f3b695e | 991 | WRITE_REG(hqspi->Instance->AR, addr_reg); |
EricLew | 0:80ee8f3b695e | 992 | |
EricLew | 0:80ee8f3b695e | 993 | /* Clear interrupt */ |
EricLew | 0:80ee8f3b695e | 994 | __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_TE | QSPI_FLAG_TC); |
EricLew | 0:80ee8f3b695e | 995 | |
EricLew | 0:80ee8f3b695e | 996 | /* Enable the QSPI transfer error, FIFO threshold and transfer complete Interrupts */ |
EricLew | 0:80ee8f3b695e | 997 | __HAL_QSPI_ENABLE_IT(hqspi, QSPI_IT_TE | QSPI_IT_FT | QSPI_IT_TC); |
EricLew | 0:80ee8f3b695e | 998 | } |
EricLew | 0:80ee8f3b695e | 999 | else |
EricLew | 0:80ee8f3b695e | 1000 | { |
EricLew | 0:80ee8f3b695e | 1001 | status = HAL_ERROR; |
EricLew | 0:80ee8f3b695e | 1002 | } |
EricLew | 0:80ee8f3b695e | 1003 | } |
EricLew | 0:80ee8f3b695e | 1004 | else |
EricLew | 0:80ee8f3b695e | 1005 | { |
EricLew | 0:80ee8f3b695e | 1006 | status = HAL_BUSY; |
EricLew | 0:80ee8f3b695e | 1007 | } |
EricLew | 0:80ee8f3b695e | 1008 | |
EricLew | 0:80ee8f3b695e | 1009 | /* Process unlocked */ |
EricLew | 0:80ee8f3b695e | 1010 | __HAL_UNLOCK(hqspi); |
EricLew | 0:80ee8f3b695e | 1011 | |
EricLew | 0:80ee8f3b695e | 1012 | return status; |
EricLew | 0:80ee8f3b695e | 1013 | } |
EricLew | 0:80ee8f3b695e | 1014 | |
EricLew | 0:80ee8f3b695e | 1015 | /** |
EricLew | 0:80ee8f3b695e | 1016 | * @brief Send an amount of data in non-blocking mode with DMA. |
EricLew | 0:80ee8f3b695e | 1017 | * @param hqspi: QSPI handle |
EricLew | 0:80ee8f3b695e | 1018 | * @param pData: pointer to data buffer |
EricLew | 0:80ee8f3b695e | 1019 | * @note This function is used only in Indirect Write Mode |
EricLew | 0:80ee8f3b695e | 1020 | * @retval HAL status |
EricLew | 0:80ee8f3b695e | 1021 | */ |
EricLew | 0:80ee8f3b695e | 1022 | HAL_StatusTypeDef HAL_QSPI_Transmit_DMA(QSPI_HandleTypeDef *hqspi, uint8_t *pData) |
EricLew | 0:80ee8f3b695e | 1023 | { |
EricLew | 0:80ee8f3b695e | 1024 | HAL_StatusTypeDef status = HAL_OK; |
EricLew | 0:80ee8f3b695e | 1025 | uint32_t *tmp; |
EricLew | 0:80ee8f3b695e | 1026 | |
EricLew | 0:80ee8f3b695e | 1027 | /* Process locked */ |
EricLew | 0:80ee8f3b695e | 1028 | __HAL_LOCK(hqspi); |
EricLew | 0:80ee8f3b695e | 1029 | |
EricLew | 0:80ee8f3b695e | 1030 | if(hqspi->State == HAL_QSPI_STATE_READY) |
EricLew | 0:80ee8f3b695e | 1031 | { |
EricLew | 0:80ee8f3b695e | 1032 | if(pData != NULL ) |
EricLew | 0:80ee8f3b695e | 1033 | { |
EricLew | 0:80ee8f3b695e | 1034 | hqspi->ErrorCode = HAL_QSPI_ERROR_NONE; |
EricLew | 0:80ee8f3b695e | 1035 | |
EricLew | 0:80ee8f3b695e | 1036 | /* Update state */ |
EricLew | 0:80ee8f3b695e | 1037 | hqspi->State = HAL_QSPI_STATE_BUSY_INDIRECT_TX; |
EricLew | 0:80ee8f3b695e | 1038 | |
EricLew | 0:80ee8f3b695e | 1039 | /* Configure counters and size of the handle */ |
EricLew | 0:80ee8f3b695e | 1040 | hqspi->TxXferCount = READ_REG(hqspi->Instance->DLR) + 1; |
EricLew | 0:80ee8f3b695e | 1041 | hqspi->TxXferSize = READ_REG(hqspi->Instance->DLR) + 1; |
EricLew | 0:80ee8f3b695e | 1042 | hqspi->pTxBuffPtr = pData; |
EricLew | 0:80ee8f3b695e | 1043 | |
EricLew | 0:80ee8f3b695e | 1044 | /* Configure QSPI: CCR register with functional mode as indirect write */ |
EricLew | 0:80ee8f3b695e | 1045 | MODIFY_REG(hqspi->Instance->CCR, QUADSPI_CCR_FMODE, QSPI_FUNCTIONAL_MODE_INDIRECT_WRITE); |
EricLew | 0:80ee8f3b695e | 1046 | |
EricLew | 0:80ee8f3b695e | 1047 | /* Set the QSPI DMA transfer complete callback */ |
EricLew | 0:80ee8f3b695e | 1048 | hqspi->hdma->XferCpltCallback = QSPI_DMATxCplt; |
EricLew | 0:80ee8f3b695e | 1049 | |
EricLew | 0:80ee8f3b695e | 1050 | /* Set the QSPI DMA Half transfer complete callback */ |
EricLew | 0:80ee8f3b695e | 1051 | hqspi->hdma->XferHalfCpltCallback = QSPI_DMATxHalfCplt; |
EricLew | 0:80ee8f3b695e | 1052 | |
EricLew | 0:80ee8f3b695e | 1053 | /* Set the DMA error callback */ |
EricLew | 0:80ee8f3b695e | 1054 | hqspi->hdma->XferErrorCallback = QSPI_DMAError; |
EricLew | 0:80ee8f3b695e | 1055 | |
EricLew | 0:80ee8f3b695e | 1056 | /* Configure the direction of the DMA */ |
EricLew | 0:80ee8f3b695e | 1057 | hqspi->hdma->Init.Direction = DMA_MEMORY_TO_PERIPH; |
EricLew | 0:80ee8f3b695e | 1058 | MODIFY_REG(hqspi->hdma->Instance->CCR, DMA_CCR_DIR, hqspi->hdma->Init.Direction); |
EricLew | 0:80ee8f3b695e | 1059 | |
EricLew | 0:80ee8f3b695e | 1060 | /* Enable the QSPI transmit DMA Channel */ |
EricLew | 0:80ee8f3b695e | 1061 | tmp = (uint32_t*)&pData; |
EricLew | 0:80ee8f3b695e | 1062 | HAL_DMA_Start_IT(hqspi->hdma, *(uint32_t*)tmp, (uint32_t)&hqspi->Instance->DR, hqspi->TxXferSize); |
EricLew | 0:80ee8f3b695e | 1063 | |
EricLew | 0:80ee8f3b695e | 1064 | /* Enable the DMA transfer by setting the DMAEN bit in the QSPI CR register */ |
EricLew | 0:80ee8f3b695e | 1065 | SET_BIT(hqspi->Instance->CR, QUADSPI_CR_DMAEN); |
EricLew | 0:80ee8f3b695e | 1066 | } |
EricLew | 0:80ee8f3b695e | 1067 | else |
EricLew | 0:80ee8f3b695e | 1068 | { |
EricLew | 0:80ee8f3b695e | 1069 | status = HAL_OK; |
EricLew | 0:80ee8f3b695e | 1070 | } |
EricLew | 0:80ee8f3b695e | 1071 | } |
EricLew | 0:80ee8f3b695e | 1072 | else |
EricLew | 0:80ee8f3b695e | 1073 | { |
EricLew | 0:80ee8f3b695e | 1074 | status = HAL_BUSY; |
EricLew | 0:80ee8f3b695e | 1075 | } |
EricLew | 0:80ee8f3b695e | 1076 | |
EricLew | 0:80ee8f3b695e | 1077 | /* Process unlocked */ |
EricLew | 0:80ee8f3b695e | 1078 | __HAL_UNLOCK(hqspi); |
EricLew | 0:80ee8f3b695e | 1079 | |
EricLew | 0:80ee8f3b695e | 1080 | return status; |
EricLew | 0:80ee8f3b695e | 1081 | } |
EricLew | 0:80ee8f3b695e | 1082 | |
EricLew | 0:80ee8f3b695e | 1083 | /** |
EricLew | 0:80ee8f3b695e | 1084 | * @brief Receive an amount of data in non-blocking mode with DMA. |
EricLew | 0:80ee8f3b695e | 1085 | * @param hqspi: QSPI handle |
EricLew | 0:80ee8f3b695e | 1086 | * @param pData: pointer to data buffer. |
EricLew | 0:80ee8f3b695e | 1087 | * @note This function is used only in Indirect Read Mode |
EricLew | 0:80ee8f3b695e | 1088 | * @retval HAL status |
EricLew | 0:80ee8f3b695e | 1089 | */ |
EricLew | 0:80ee8f3b695e | 1090 | HAL_StatusTypeDef HAL_QSPI_Receive_DMA(QSPI_HandleTypeDef *hqspi, uint8_t *pData) |
EricLew | 0:80ee8f3b695e | 1091 | { |
EricLew | 0:80ee8f3b695e | 1092 | HAL_StatusTypeDef status = HAL_OK; |
EricLew | 0:80ee8f3b695e | 1093 | uint32_t *tmp; |
EricLew | 0:80ee8f3b695e | 1094 | uint32_t addr_reg = READ_REG(hqspi->Instance->AR); |
EricLew | 0:80ee8f3b695e | 1095 | |
EricLew | 0:80ee8f3b695e | 1096 | /* Process locked */ |
EricLew | 0:80ee8f3b695e | 1097 | __HAL_LOCK(hqspi); |
EricLew | 0:80ee8f3b695e | 1098 | |
EricLew | 0:80ee8f3b695e | 1099 | if(hqspi->State == HAL_QSPI_STATE_READY) |
EricLew | 0:80ee8f3b695e | 1100 | { |
EricLew | 0:80ee8f3b695e | 1101 | if(pData != NULL ) |
EricLew | 0:80ee8f3b695e | 1102 | { |
EricLew | 0:80ee8f3b695e | 1103 | hqspi->ErrorCode = HAL_QSPI_ERROR_NONE; |
EricLew | 0:80ee8f3b695e | 1104 | |
EricLew | 0:80ee8f3b695e | 1105 | /* Update state */ |
EricLew | 0:80ee8f3b695e | 1106 | hqspi->State = HAL_QSPI_STATE_BUSY_INDIRECT_RX; |
EricLew | 0:80ee8f3b695e | 1107 | |
EricLew | 0:80ee8f3b695e | 1108 | /* Configure counters and size of the handle */ |
EricLew | 0:80ee8f3b695e | 1109 | hqspi->RxXferCount = READ_REG(hqspi->Instance->DLR) + 1; |
EricLew | 0:80ee8f3b695e | 1110 | hqspi->RxXferSize = READ_REG(hqspi->Instance->DLR) + 1; |
EricLew | 0:80ee8f3b695e | 1111 | hqspi->pRxBuffPtr = pData; |
EricLew | 0:80ee8f3b695e | 1112 | |
EricLew | 0:80ee8f3b695e | 1113 | /* Set the QSPI DMA transfer complete callback */ |
EricLew | 0:80ee8f3b695e | 1114 | hqspi->hdma->XferCpltCallback = QSPI_DMARxCplt; |
EricLew | 0:80ee8f3b695e | 1115 | |
EricLew | 0:80ee8f3b695e | 1116 | /* Set the QSPI DMA Half transfer complete callback */ |
EricLew | 0:80ee8f3b695e | 1117 | hqspi->hdma->XferHalfCpltCallback = QSPI_DMARxHalfCplt; |
EricLew | 0:80ee8f3b695e | 1118 | |
EricLew | 0:80ee8f3b695e | 1119 | /* Set the DMA error callback */ |
EricLew | 0:80ee8f3b695e | 1120 | hqspi->hdma->XferErrorCallback = QSPI_DMAError; |
EricLew | 0:80ee8f3b695e | 1121 | |
EricLew | 0:80ee8f3b695e | 1122 | /* Configure the direction of the DMA */ |
EricLew | 0:80ee8f3b695e | 1123 | hqspi->hdma->Init.Direction = DMA_PERIPH_TO_MEMORY; |
EricLew | 0:80ee8f3b695e | 1124 | MODIFY_REG(hqspi->hdma->Instance->CCR, DMA_CCR_DIR, hqspi->hdma->Init.Direction); |
EricLew | 0:80ee8f3b695e | 1125 | |
EricLew | 0:80ee8f3b695e | 1126 | /* Enable the DMA Channel */ |
EricLew | 0:80ee8f3b695e | 1127 | tmp = (uint32_t*)&pData; |
EricLew | 0:80ee8f3b695e | 1128 | HAL_DMA_Start_IT(hqspi->hdma, (uint32_t)&hqspi->Instance->DR, *(uint32_t*)tmp, hqspi->RxXferSize); |
EricLew | 0:80ee8f3b695e | 1129 | |
EricLew | 0:80ee8f3b695e | 1130 | /* Configure QSPI: CCR register with functional as indirect read */ |
EricLew | 0:80ee8f3b695e | 1131 | MODIFY_REG(hqspi->Instance->CCR, QUADSPI_CCR_FMODE, QSPI_FUNCTIONAL_MODE_INDIRECT_READ); |
EricLew | 0:80ee8f3b695e | 1132 | |
EricLew | 0:80ee8f3b695e | 1133 | /* Start the transfer by re-writing the address in AR register */ |
EricLew | 0:80ee8f3b695e | 1134 | WRITE_REG(hqspi->Instance->AR, addr_reg); |
EricLew | 0:80ee8f3b695e | 1135 | |
EricLew | 0:80ee8f3b695e | 1136 | /* Enable the DMA transfer by setting the DMAEN bit in the QSPI CR register */ |
EricLew | 0:80ee8f3b695e | 1137 | SET_BIT(hqspi->Instance->CR, QUADSPI_CR_DMAEN); |
EricLew | 0:80ee8f3b695e | 1138 | } |
EricLew | 0:80ee8f3b695e | 1139 | else |
EricLew | 0:80ee8f3b695e | 1140 | { |
EricLew | 0:80ee8f3b695e | 1141 | status = HAL_ERROR; |
EricLew | 0:80ee8f3b695e | 1142 | } |
EricLew | 0:80ee8f3b695e | 1143 | } |
EricLew | 0:80ee8f3b695e | 1144 | else |
EricLew | 0:80ee8f3b695e | 1145 | { |
EricLew | 0:80ee8f3b695e | 1146 | status = HAL_BUSY; |
EricLew | 0:80ee8f3b695e | 1147 | } |
EricLew | 0:80ee8f3b695e | 1148 | |
EricLew | 0:80ee8f3b695e | 1149 | /* Process unlocked */ |
EricLew | 0:80ee8f3b695e | 1150 | __HAL_UNLOCK(hqspi); |
EricLew | 0:80ee8f3b695e | 1151 | |
EricLew | 0:80ee8f3b695e | 1152 | return status; |
EricLew | 0:80ee8f3b695e | 1153 | } |
EricLew | 0:80ee8f3b695e | 1154 | |
EricLew | 0:80ee8f3b695e | 1155 | /** |
EricLew | 0:80ee8f3b695e | 1156 | * @brief Configure the QSPI Automatic Polling Mode in blocking mode. |
EricLew | 0:80ee8f3b695e | 1157 | * @param hqspi: QSPI handle |
EricLew | 0:80ee8f3b695e | 1158 | * @param cmd: structure that contains the command configuration information. |
EricLew | 0:80ee8f3b695e | 1159 | * @param cfg: structure that contains the polling configuration information. |
EricLew | 0:80ee8f3b695e | 1160 | * @param Timeout : Timeout duration |
EricLew | 0:80ee8f3b695e | 1161 | * @note This function is used only in Automatic Polling Mode |
EricLew | 0:80ee8f3b695e | 1162 | * @retval HAL status |
EricLew | 0:80ee8f3b695e | 1163 | */ |
EricLew | 0:80ee8f3b695e | 1164 | HAL_StatusTypeDef HAL_QSPI_AutoPolling(QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, QSPI_AutoPollingTypeDef *cfg, uint32_t Timeout) |
EricLew | 0:80ee8f3b695e | 1165 | { |
EricLew | 0:80ee8f3b695e | 1166 | HAL_StatusTypeDef status = HAL_ERROR; |
EricLew | 0:80ee8f3b695e | 1167 | |
EricLew | 0:80ee8f3b695e | 1168 | /* Check the parameters */ |
EricLew | 0:80ee8f3b695e | 1169 | assert_param(IS_QSPI_INSTRUCTION_MODE(cmd->InstructionMode)); |
EricLew | 0:80ee8f3b695e | 1170 | if (cmd->InstructionMode != QSPI_INSTRUCTION_NONE) |
EricLew | 0:80ee8f3b695e | 1171 | { |
EricLew | 0:80ee8f3b695e | 1172 | assert_param(IS_QSPI_INSTRUCTION(cmd->Instruction)); |
EricLew | 0:80ee8f3b695e | 1173 | } |
EricLew | 0:80ee8f3b695e | 1174 | |
EricLew | 0:80ee8f3b695e | 1175 | assert_param(IS_QSPI_ADDRESS_MODE(cmd->AddressMode)); |
EricLew | 0:80ee8f3b695e | 1176 | if (cmd->AddressMode != QSPI_ADDRESS_NONE) |
EricLew | 0:80ee8f3b695e | 1177 | { |
EricLew | 0:80ee8f3b695e | 1178 | assert_param(IS_QSPI_ADDRESS_SIZE(cmd->AddressSize)); |
EricLew | 0:80ee8f3b695e | 1179 | } |
EricLew | 0:80ee8f3b695e | 1180 | |
EricLew | 0:80ee8f3b695e | 1181 | assert_param(IS_QSPI_ALTERNATE_BYTES_MODE(cmd->AlternateByteMode)); |
EricLew | 0:80ee8f3b695e | 1182 | if (cmd->AlternateByteMode != QSPI_ALTERNATE_BYTES_NONE) |
EricLew | 0:80ee8f3b695e | 1183 | { |
EricLew | 0:80ee8f3b695e | 1184 | assert_param(IS_QSPI_ALTERNATE_BYTES_SIZE(cmd->AlternateBytesSize)); |
EricLew | 0:80ee8f3b695e | 1185 | } |
EricLew | 0:80ee8f3b695e | 1186 | |
EricLew | 0:80ee8f3b695e | 1187 | assert_param(IS_QSPI_DUMMY_CYCLES(cmd->DummyCycles)); |
EricLew | 0:80ee8f3b695e | 1188 | assert_param(IS_QSPI_DATA_MODE(cmd->DataMode)); |
EricLew | 0:80ee8f3b695e | 1189 | |
EricLew | 0:80ee8f3b695e | 1190 | assert_param(IS_QSPI_DDR_MODE(cmd->DdrMode)); |
EricLew | 0:80ee8f3b695e | 1191 | assert_param(IS_QSPI_DDR_HHC(cmd->DdrHoldHalfCycle)); |
EricLew | 0:80ee8f3b695e | 1192 | assert_param(IS_QSPI_SIOO_MODE(cmd->SIOOMode)); |
EricLew | 0:80ee8f3b695e | 1193 | |
EricLew | 0:80ee8f3b695e | 1194 | assert_param(IS_QSPI_INTERVAL(cfg->Interval)); |
EricLew | 0:80ee8f3b695e | 1195 | assert_param(IS_QSPI_STATUS_BYTES_SIZE(cfg->StatusBytesSize)); |
EricLew | 0:80ee8f3b695e | 1196 | assert_param(IS_QSPI_MATCH_MODE(cfg->MatchMode)); |
EricLew | 0:80ee8f3b695e | 1197 | |
EricLew | 0:80ee8f3b695e | 1198 | /* Process locked */ |
EricLew | 0:80ee8f3b695e | 1199 | __HAL_LOCK(hqspi); |
EricLew | 0:80ee8f3b695e | 1200 | |
EricLew | 0:80ee8f3b695e | 1201 | if(hqspi->State == HAL_QSPI_STATE_READY) |
EricLew | 0:80ee8f3b695e | 1202 | { |
EricLew | 0:80ee8f3b695e | 1203 | hqspi->ErrorCode = HAL_QSPI_ERROR_NONE; |
EricLew | 0:80ee8f3b695e | 1204 | |
EricLew | 0:80ee8f3b695e | 1205 | /* Update state */ |
EricLew | 0:80ee8f3b695e | 1206 | hqspi->State = HAL_QSPI_STATE_BUSY_AUTO_POLLING; |
EricLew | 0:80ee8f3b695e | 1207 | |
EricLew | 0:80ee8f3b695e | 1208 | /* Wait till BUSY flag reset */ |
EricLew | 0:80ee8f3b695e | 1209 | status = QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_BUSY, RESET, Timeout); |
EricLew | 0:80ee8f3b695e | 1210 | |
EricLew | 0:80ee8f3b695e | 1211 | if (status == HAL_OK) |
EricLew | 0:80ee8f3b695e | 1212 | { |
EricLew | 0:80ee8f3b695e | 1213 | /* Configure QSPI: PSMAR register with the status match value */ |
EricLew | 0:80ee8f3b695e | 1214 | WRITE_REG(hqspi->Instance->PSMAR, cfg->Match); |
EricLew | 0:80ee8f3b695e | 1215 | |
EricLew | 0:80ee8f3b695e | 1216 | /* Configure QSPI: PSMKR register with the status mask value */ |
EricLew | 0:80ee8f3b695e | 1217 | WRITE_REG(hqspi->Instance->PSMKR, cfg->Mask); |
EricLew | 0:80ee8f3b695e | 1218 | |
EricLew | 0:80ee8f3b695e | 1219 | /* Configure QSPI: PIR register with the interval value */ |
EricLew | 0:80ee8f3b695e | 1220 | WRITE_REG(hqspi->Instance->PIR, cfg->Interval); |
EricLew | 0:80ee8f3b695e | 1221 | |
EricLew | 0:80ee8f3b695e | 1222 | /* Configure QSPI: CR register with Match mode and Automatic stop enabled |
EricLew | 0:80ee8f3b695e | 1223 | (otherwise there will be an infinite loop in blocking mode) */ |
EricLew | 0:80ee8f3b695e | 1224 | MODIFY_REG(hqspi->Instance->CR, (QUADSPI_CR_PMM | QUADSPI_CR_APMS), |
EricLew | 0:80ee8f3b695e | 1225 | (cfg->MatchMode | QSPI_AUTOMATIC_STOP_ENABLE)); |
EricLew | 0:80ee8f3b695e | 1226 | |
EricLew | 0:80ee8f3b695e | 1227 | /* Call the configuration function */ |
EricLew | 0:80ee8f3b695e | 1228 | cmd->NbData = cfg->StatusBytesSize; |
EricLew | 0:80ee8f3b695e | 1229 | QSPI_Config(hqspi, cmd, QSPI_FUNCTIONAL_MODE_AUTO_POLLING); |
EricLew | 0:80ee8f3b695e | 1230 | |
EricLew | 0:80ee8f3b695e | 1231 | /* Wait until SM flag is set to go back in idle state */ |
EricLew | 0:80ee8f3b695e | 1232 | if(QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_SM, SET, Timeout) != HAL_OK) |
EricLew | 0:80ee8f3b695e | 1233 | { |
EricLew | 0:80ee8f3b695e | 1234 | status = HAL_TIMEOUT; |
EricLew | 0:80ee8f3b695e | 1235 | } |
EricLew | 0:80ee8f3b695e | 1236 | else |
EricLew | 0:80ee8f3b695e | 1237 | { |
EricLew | 0:80ee8f3b695e | 1238 | __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_SM); |
EricLew | 0:80ee8f3b695e | 1239 | |
EricLew | 0:80ee8f3b695e | 1240 | /* Update state */ |
EricLew | 0:80ee8f3b695e | 1241 | hqspi->State = HAL_QSPI_STATE_READY; |
EricLew | 0:80ee8f3b695e | 1242 | } |
EricLew | 0:80ee8f3b695e | 1243 | } |
EricLew | 0:80ee8f3b695e | 1244 | } |
EricLew | 0:80ee8f3b695e | 1245 | else |
EricLew | 0:80ee8f3b695e | 1246 | { |
EricLew | 0:80ee8f3b695e | 1247 | status = HAL_BUSY; |
EricLew | 0:80ee8f3b695e | 1248 | } |
EricLew | 0:80ee8f3b695e | 1249 | |
EricLew | 0:80ee8f3b695e | 1250 | /* Process unlocked */ |
EricLew | 0:80ee8f3b695e | 1251 | __HAL_UNLOCK(hqspi); |
EricLew | 0:80ee8f3b695e | 1252 | |
EricLew | 0:80ee8f3b695e | 1253 | /* Return function status */ |
EricLew | 0:80ee8f3b695e | 1254 | return status; |
EricLew | 0:80ee8f3b695e | 1255 | } |
EricLew | 0:80ee8f3b695e | 1256 | |
EricLew | 0:80ee8f3b695e | 1257 | /** |
EricLew | 0:80ee8f3b695e | 1258 | * @brief Configure the QSPI Automatic Polling Mode in non-blocking mode. |
EricLew | 0:80ee8f3b695e | 1259 | * @param hqspi: QSPI handle |
EricLew | 0:80ee8f3b695e | 1260 | * @param cmd: structure that contains the command configuration information. |
EricLew | 0:80ee8f3b695e | 1261 | * @param cfg: structure that contains the polling configuration information. |
EricLew | 0:80ee8f3b695e | 1262 | * @note This function is used only in Automatic Polling Mode |
EricLew | 0:80ee8f3b695e | 1263 | * @retval HAL status |
EricLew | 0:80ee8f3b695e | 1264 | */ |
EricLew | 0:80ee8f3b695e | 1265 | HAL_StatusTypeDef HAL_QSPI_AutoPolling_IT(QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, QSPI_AutoPollingTypeDef *cfg) |
EricLew | 0:80ee8f3b695e | 1266 | { |
EricLew | 0:80ee8f3b695e | 1267 | HAL_StatusTypeDef status = HAL_ERROR; |
EricLew | 0:80ee8f3b695e | 1268 | |
EricLew | 0:80ee8f3b695e | 1269 | /* Check the parameters */ |
EricLew | 0:80ee8f3b695e | 1270 | assert_param(IS_QSPI_INSTRUCTION_MODE(cmd->InstructionMode)); |
EricLew | 0:80ee8f3b695e | 1271 | if (cmd->InstructionMode != QSPI_INSTRUCTION_NONE) |
EricLew | 0:80ee8f3b695e | 1272 | { |
EricLew | 0:80ee8f3b695e | 1273 | assert_param(IS_QSPI_INSTRUCTION(cmd->Instruction)); |
EricLew | 0:80ee8f3b695e | 1274 | } |
EricLew | 0:80ee8f3b695e | 1275 | |
EricLew | 0:80ee8f3b695e | 1276 | assert_param(IS_QSPI_ADDRESS_MODE(cmd->AddressMode)); |
EricLew | 0:80ee8f3b695e | 1277 | if (cmd->AddressMode != QSPI_ADDRESS_NONE) |
EricLew | 0:80ee8f3b695e | 1278 | { |
EricLew | 0:80ee8f3b695e | 1279 | assert_param(IS_QSPI_ADDRESS_SIZE(cmd->AddressSize)); |
EricLew | 0:80ee8f3b695e | 1280 | } |
EricLew | 0:80ee8f3b695e | 1281 | |
EricLew | 0:80ee8f3b695e | 1282 | assert_param(IS_QSPI_ALTERNATE_BYTES_MODE(cmd->AlternateByteMode)); |
EricLew | 0:80ee8f3b695e | 1283 | if (cmd->AlternateByteMode != QSPI_ALTERNATE_BYTES_NONE) |
EricLew | 0:80ee8f3b695e | 1284 | { |
EricLew | 0:80ee8f3b695e | 1285 | assert_param(IS_QSPI_ALTERNATE_BYTES_SIZE(cmd->AlternateBytesSize)); |
EricLew | 0:80ee8f3b695e | 1286 | } |
EricLew | 0:80ee8f3b695e | 1287 | |
EricLew | 0:80ee8f3b695e | 1288 | assert_param(IS_QSPI_DUMMY_CYCLES(cmd->DummyCycles)); |
EricLew | 0:80ee8f3b695e | 1289 | assert_param(IS_QSPI_DATA_MODE(cmd->DataMode)); |
EricLew | 0:80ee8f3b695e | 1290 | |
EricLew | 0:80ee8f3b695e | 1291 | assert_param(IS_QSPI_DDR_MODE(cmd->DdrMode)); |
EricLew | 0:80ee8f3b695e | 1292 | assert_param(IS_QSPI_DDR_HHC(cmd->DdrHoldHalfCycle)); |
EricLew | 0:80ee8f3b695e | 1293 | assert_param(IS_QSPI_SIOO_MODE(cmd->SIOOMode)); |
EricLew | 0:80ee8f3b695e | 1294 | |
EricLew | 0:80ee8f3b695e | 1295 | assert_param(IS_QSPI_INTERVAL(cfg->Interval)); |
EricLew | 0:80ee8f3b695e | 1296 | assert_param(IS_QSPI_STATUS_BYTES_SIZE(cfg->StatusBytesSize)); |
EricLew | 0:80ee8f3b695e | 1297 | assert_param(IS_QSPI_MATCH_MODE(cfg->MatchMode)); |
EricLew | 0:80ee8f3b695e | 1298 | assert_param(IS_QSPI_AUTOMATIC_STOP(cfg->AutomaticStop)); |
EricLew | 0:80ee8f3b695e | 1299 | |
EricLew | 0:80ee8f3b695e | 1300 | /* Process locked */ |
EricLew | 0:80ee8f3b695e | 1301 | __HAL_LOCK(hqspi); |
EricLew | 0:80ee8f3b695e | 1302 | |
EricLew | 0:80ee8f3b695e | 1303 | if(hqspi->State == HAL_QSPI_STATE_READY) |
EricLew | 0:80ee8f3b695e | 1304 | { |
EricLew | 0:80ee8f3b695e | 1305 | hqspi->ErrorCode = HAL_QSPI_ERROR_NONE; |
EricLew | 0:80ee8f3b695e | 1306 | |
EricLew | 0:80ee8f3b695e | 1307 | /* Update state */ |
EricLew | 0:80ee8f3b695e | 1308 | hqspi->State = HAL_QSPI_STATE_BUSY_AUTO_POLLING; |
EricLew | 0:80ee8f3b695e | 1309 | |
EricLew | 0:80ee8f3b695e | 1310 | /* Wait till BUSY flag reset */ |
EricLew | 0:80ee8f3b695e | 1311 | status = QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_BUSY, RESET, hqspi->Timeout); |
EricLew | 0:80ee8f3b695e | 1312 | |
EricLew | 0:80ee8f3b695e | 1313 | if (status == HAL_OK) |
EricLew | 0:80ee8f3b695e | 1314 | { |
EricLew | 0:80ee8f3b695e | 1315 | /* Configure QSPI: PSMAR register with the status match value */ |
EricLew | 0:80ee8f3b695e | 1316 | WRITE_REG(hqspi->Instance->PSMAR, cfg->Match); |
EricLew | 0:80ee8f3b695e | 1317 | |
EricLew | 0:80ee8f3b695e | 1318 | /* Configure QSPI: PSMKR register with the status mask value */ |
EricLew | 0:80ee8f3b695e | 1319 | WRITE_REG(hqspi->Instance->PSMKR, cfg->Mask); |
EricLew | 0:80ee8f3b695e | 1320 | |
EricLew | 0:80ee8f3b695e | 1321 | /* Configure QSPI: PIR register with the interval value */ |
EricLew | 0:80ee8f3b695e | 1322 | WRITE_REG(hqspi->Instance->PIR, cfg->Interval); |
EricLew | 0:80ee8f3b695e | 1323 | |
EricLew | 0:80ee8f3b695e | 1324 | /* Configure QSPI: CR register with Match mode and Automatic stop mode */ |
EricLew | 0:80ee8f3b695e | 1325 | MODIFY_REG(hqspi->Instance->CR, (QUADSPI_CR_PMM | QUADSPI_CR_APMS), |
EricLew | 0:80ee8f3b695e | 1326 | (cfg->MatchMode | cfg->AutomaticStop)); |
EricLew | 0:80ee8f3b695e | 1327 | |
EricLew | 0:80ee8f3b695e | 1328 | /* Clear interrupt */ |
EricLew | 0:80ee8f3b695e | 1329 | __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_TE | QSPI_FLAG_SM); |
EricLew | 0:80ee8f3b695e | 1330 | |
EricLew | 0:80ee8f3b695e | 1331 | /* Enable the QSPI Transfer Error and status match Interrupt */ |
EricLew | 0:80ee8f3b695e | 1332 | __HAL_QSPI_ENABLE_IT(hqspi, (QSPI_IT_SM | QSPI_IT_TE)); |
EricLew | 0:80ee8f3b695e | 1333 | |
EricLew | 0:80ee8f3b695e | 1334 | /* Call the configuration function */ |
EricLew | 0:80ee8f3b695e | 1335 | cmd->NbData = cfg->StatusBytesSize; |
EricLew | 0:80ee8f3b695e | 1336 | QSPI_Config(hqspi, cmd, QSPI_FUNCTIONAL_MODE_AUTO_POLLING); |
EricLew | 0:80ee8f3b695e | 1337 | } |
EricLew | 0:80ee8f3b695e | 1338 | } |
EricLew | 0:80ee8f3b695e | 1339 | else |
EricLew | 0:80ee8f3b695e | 1340 | { |
EricLew | 0:80ee8f3b695e | 1341 | status = HAL_BUSY; |
EricLew | 0:80ee8f3b695e | 1342 | } |
EricLew | 0:80ee8f3b695e | 1343 | |
EricLew | 0:80ee8f3b695e | 1344 | /* Process unlocked */ |
EricLew | 0:80ee8f3b695e | 1345 | __HAL_UNLOCK(hqspi); |
EricLew | 0:80ee8f3b695e | 1346 | |
EricLew | 0:80ee8f3b695e | 1347 | /* Return function status */ |
EricLew | 0:80ee8f3b695e | 1348 | return status; |
EricLew | 0:80ee8f3b695e | 1349 | } |
EricLew | 0:80ee8f3b695e | 1350 | |
EricLew | 0:80ee8f3b695e | 1351 | /** |
EricLew | 0:80ee8f3b695e | 1352 | * @brief Configure the Memory Mapped mode. |
EricLew | 0:80ee8f3b695e | 1353 | * @param hqspi: QSPI handle |
EricLew | 0:80ee8f3b695e | 1354 | * @param cmd: structure that contains the command configuration information. |
EricLew | 0:80ee8f3b695e | 1355 | * @param cfg: structure that contains the memory mapped configuration information. |
EricLew | 0:80ee8f3b695e | 1356 | * @note This function is used only in Memory mapped Mode |
EricLew | 0:80ee8f3b695e | 1357 | * @retval HAL status |
EricLew | 0:80ee8f3b695e | 1358 | */ |
EricLew | 0:80ee8f3b695e | 1359 | HAL_StatusTypeDef HAL_QSPI_MemoryMapped(QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, QSPI_MemoryMappedTypeDef *cfg) |
EricLew | 0:80ee8f3b695e | 1360 | { |
EricLew | 0:80ee8f3b695e | 1361 | HAL_StatusTypeDef status = HAL_ERROR; |
EricLew | 0:80ee8f3b695e | 1362 | |
EricLew | 0:80ee8f3b695e | 1363 | /* Check the parameters */ |
EricLew | 0:80ee8f3b695e | 1364 | assert_param(IS_QSPI_INSTRUCTION_MODE(cmd->InstructionMode)); |
EricLew | 0:80ee8f3b695e | 1365 | if (cmd->InstructionMode != QSPI_INSTRUCTION_NONE) |
EricLew | 0:80ee8f3b695e | 1366 | { |
EricLew | 0:80ee8f3b695e | 1367 | assert_param(IS_QSPI_INSTRUCTION(cmd->Instruction)); |
EricLew | 0:80ee8f3b695e | 1368 | } |
EricLew | 0:80ee8f3b695e | 1369 | |
EricLew | 0:80ee8f3b695e | 1370 | assert_param(IS_QSPI_ADDRESS_MODE(cmd->AddressMode)); |
EricLew | 0:80ee8f3b695e | 1371 | if (cmd->AddressMode != QSPI_ADDRESS_NONE) |
EricLew | 0:80ee8f3b695e | 1372 | { |
EricLew | 0:80ee8f3b695e | 1373 | assert_param(IS_QSPI_ADDRESS_SIZE(cmd->AddressSize)); |
EricLew | 0:80ee8f3b695e | 1374 | } |
EricLew | 0:80ee8f3b695e | 1375 | |
EricLew | 0:80ee8f3b695e | 1376 | assert_param(IS_QSPI_ALTERNATE_BYTES_MODE(cmd->AlternateByteMode)); |
EricLew | 0:80ee8f3b695e | 1377 | if (cmd->AlternateByteMode != QSPI_ALTERNATE_BYTES_NONE) |
EricLew | 0:80ee8f3b695e | 1378 | { |
EricLew | 0:80ee8f3b695e | 1379 | assert_param(IS_QSPI_ALTERNATE_BYTES_SIZE(cmd->AlternateBytesSize)); |
EricLew | 0:80ee8f3b695e | 1380 | } |
EricLew | 0:80ee8f3b695e | 1381 | |
EricLew | 0:80ee8f3b695e | 1382 | assert_param(IS_QSPI_DUMMY_CYCLES(cmd->DummyCycles)); |
EricLew | 0:80ee8f3b695e | 1383 | assert_param(IS_QSPI_DATA_MODE(cmd->DataMode)); |
EricLew | 0:80ee8f3b695e | 1384 | |
EricLew | 0:80ee8f3b695e | 1385 | assert_param(IS_QSPI_DDR_MODE(cmd->DdrMode)); |
EricLew | 0:80ee8f3b695e | 1386 | assert_param(IS_QSPI_DDR_HHC(cmd->DdrHoldHalfCycle)); |
EricLew | 0:80ee8f3b695e | 1387 | assert_param(IS_QSPI_SIOO_MODE(cmd->SIOOMode)); |
EricLew | 0:80ee8f3b695e | 1388 | |
EricLew | 0:80ee8f3b695e | 1389 | assert_param(IS_QSPI_TIMEOUT_ACTIVATION(cfg->TimeOutActivation)); |
EricLew | 0:80ee8f3b695e | 1390 | |
EricLew | 0:80ee8f3b695e | 1391 | /* Process locked */ |
EricLew | 0:80ee8f3b695e | 1392 | __HAL_LOCK(hqspi); |
EricLew | 0:80ee8f3b695e | 1393 | |
EricLew | 0:80ee8f3b695e | 1394 | if(hqspi->State == HAL_QSPI_STATE_READY) |
EricLew | 0:80ee8f3b695e | 1395 | { |
EricLew | 0:80ee8f3b695e | 1396 | hqspi->ErrorCode = HAL_QSPI_ERROR_NONE; |
EricLew | 0:80ee8f3b695e | 1397 | |
EricLew | 0:80ee8f3b695e | 1398 | /* Update state */ |
EricLew | 0:80ee8f3b695e | 1399 | hqspi->State = HAL_QSPI_STATE_BUSY_MEM_MAPPED; |
EricLew | 0:80ee8f3b695e | 1400 | |
EricLew | 0:80ee8f3b695e | 1401 | /* Wait till BUSY flag reset */ |
EricLew | 0:80ee8f3b695e | 1402 | status = QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_BUSY, RESET, hqspi->Timeout); |
EricLew | 0:80ee8f3b695e | 1403 | |
EricLew | 0:80ee8f3b695e | 1404 | if (status == HAL_OK) |
EricLew | 0:80ee8f3b695e | 1405 | { |
EricLew | 0:80ee8f3b695e | 1406 | /* Configure QSPI: CR register with timeout counter enable */ |
EricLew | 0:80ee8f3b695e | 1407 | MODIFY_REG(hqspi->Instance->CR, QUADSPI_CR_TCEN, cfg->TimeOutActivation); |
EricLew | 0:80ee8f3b695e | 1408 | |
EricLew | 0:80ee8f3b695e | 1409 | if (cfg->TimeOutActivation == QSPI_TIMEOUT_COUNTER_ENABLE) |
EricLew | 0:80ee8f3b695e | 1410 | { |
EricLew | 0:80ee8f3b695e | 1411 | assert_param(IS_QSPI_TIMEOUT_PERIOD(cfg->TimeOutPeriod)); |
EricLew | 0:80ee8f3b695e | 1412 | |
EricLew | 0:80ee8f3b695e | 1413 | /* Configure QSPI: LPTR register with the low-power timeout value */ |
EricLew | 0:80ee8f3b695e | 1414 | WRITE_REG(hqspi->Instance->LPTR, cfg->TimeOutPeriod); |
EricLew | 0:80ee8f3b695e | 1415 | |
EricLew | 0:80ee8f3b695e | 1416 | /* Clear interrupt */ |
EricLew | 0:80ee8f3b695e | 1417 | __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_TO); |
EricLew | 0:80ee8f3b695e | 1418 | |
EricLew | 0:80ee8f3b695e | 1419 | /* Enable the QSPI TimeOut Interrupt */ |
EricLew | 0:80ee8f3b695e | 1420 | __HAL_QSPI_ENABLE_IT(hqspi, QSPI_IT_TO); |
EricLew | 0:80ee8f3b695e | 1421 | } |
EricLew | 0:80ee8f3b695e | 1422 | |
EricLew | 0:80ee8f3b695e | 1423 | /* Call the configuration function */ |
EricLew | 0:80ee8f3b695e | 1424 | QSPI_Config(hqspi, cmd, QSPI_FUNCTIONAL_MODE_MEMORY_MAPPED); |
EricLew | 0:80ee8f3b695e | 1425 | } |
EricLew | 0:80ee8f3b695e | 1426 | } |
EricLew | 0:80ee8f3b695e | 1427 | else |
EricLew | 0:80ee8f3b695e | 1428 | { |
EricLew | 0:80ee8f3b695e | 1429 | status = HAL_BUSY; |
EricLew | 0:80ee8f3b695e | 1430 | } |
EricLew | 0:80ee8f3b695e | 1431 | |
EricLew | 0:80ee8f3b695e | 1432 | /* Process unlocked */ |
EricLew | 0:80ee8f3b695e | 1433 | __HAL_UNLOCK(hqspi); |
EricLew | 0:80ee8f3b695e | 1434 | |
EricLew | 0:80ee8f3b695e | 1435 | /* Return function status */ |
EricLew | 0:80ee8f3b695e | 1436 | return status; |
EricLew | 0:80ee8f3b695e | 1437 | } |
EricLew | 0:80ee8f3b695e | 1438 | |
EricLew | 0:80ee8f3b695e | 1439 | /** |
EricLew | 0:80ee8f3b695e | 1440 | * @brief Transfer Error callback. |
EricLew | 0:80ee8f3b695e | 1441 | * @param hqspi: QSPI handle |
EricLew | 0:80ee8f3b695e | 1442 | * @retval None |
EricLew | 0:80ee8f3b695e | 1443 | */ |
EricLew | 0:80ee8f3b695e | 1444 | __weak void HAL_QSPI_ErrorCallback(QSPI_HandleTypeDef *hqspi) |
EricLew | 0:80ee8f3b695e | 1445 | { |
EricLew | 0:80ee8f3b695e | 1446 | /* NOTE : This function should not be modified, when the callback is needed, |
EricLew | 0:80ee8f3b695e | 1447 | the HAL_QSPI_ErrorCallback could be implemented in the user file |
EricLew | 0:80ee8f3b695e | 1448 | */ |
EricLew | 0:80ee8f3b695e | 1449 | } |
EricLew | 0:80ee8f3b695e | 1450 | |
EricLew | 0:80ee8f3b695e | 1451 | /** |
EricLew | 0:80ee8f3b695e | 1452 | * @brief Command completed callback. |
EricLew | 0:80ee8f3b695e | 1453 | * @param hqspi: QSPI handle |
EricLew | 0:80ee8f3b695e | 1454 | * @retval None |
EricLew | 0:80ee8f3b695e | 1455 | */ |
EricLew | 0:80ee8f3b695e | 1456 | __weak void HAL_QSPI_CmdCpltCallback(QSPI_HandleTypeDef *hqspi) |
EricLew | 0:80ee8f3b695e | 1457 | { |
EricLew | 0:80ee8f3b695e | 1458 | /* NOTE: This function should not be modified, when the callback is needed, |
EricLew | 0:80ee8f3b695e | 1459 | the HAL_QSPI_CmdCpltCallback could be implemented in the user file |
EricLew | 0:80ee8f3b695e | 1460 | */ |
EricLew | 0:80ee8f3b695e | 1461 | } |
EricLew | 0:80ee8f3b695e | 1462 | |
EricLew | 0:80ee8f3b695e | 1463 | /** |
EricLew | 0:80ee8f3b695e | 1464 | * @brief Rx Transfer completed callback. |
EricLew | 0:80ee8f3b695e | 1465 | * @param hqspi: QSPI handle |
EricLew | 0:80ee8f3b695e | 1466 | * @retval None |
EricLew | 0:80ee8f3b695e | 1467 | */ |
EricLew | 0:80ee8f3b695e | 1468 | __weak void HAL_QSPI_RxCpltCallback(QSPI_HandleTypeDef *hqspi) |
EricLew | 0:80ee8f3b695e | 1469 | { |
EricLew | 0:80ee8f3b695e | 1470 | /* NOTE: This function should not be modified, when the callback is needed, |
EricLew | 0:80ee8f3b695e | 1471 | the HAL_QSPI_RxCpltCallback could be implemented in the user file |
EricLew | 0:80ee8f3b695e | 1472 | */ |
EricLew | 0:80ee8f3b695e | 1473 | } |
EricLew | 0:80ee8f3b695e | 1474 | |
EricLew | 0:80ee8f3b695e | 1475 | /** |
EricLew | 0:80ee8f3b695e | 1476 | * @brief Tx Transfer completed callback. |
EricLew | 0:80ee8f3b695e | 1477 | * @param hqspi: QSPI handle |
EricLew | 0:80ee8f3b695e | 1478 | * @retval None |
EricLew | 0:80ee8f3b695e | 1479 | */ |
EricLew | 0:80ee8f3b695e | 1480 | __weak void HAL_QSPI_TxCpltCallback(QSPI_HandleTypeDef *hqspi) |
EricLew | 0:80ee8f3b695e | 1481 | { |
EricLew | 0:80ee8f3b695e | 1482 | /* NOTE: This function should not be modified, when the callback is needed, |
EricLew | 0:80ee8f3b695e | 1483 | the HAL_QSPI_TxCpltCallback could be implemented in the user file |
EricLew | 0:80ee8f3b695e | 1484 | */ |
EricLew | 0:80ee8f3b695e | 1485 | } |
EricLew | 0:80ee8f3b695e | 1486 | |
EricLew | 0:80ee8f3b695e | 1487 | /** |
EricLew | 0:80ee8f3b695e | 1488 | * @brief Rx Half Transfer completed callback. |
EricLew | 0:80ee8f3b695e | 1489 | * @param hqspi: QSPI handle |
EricLew | 0:80ee8f3b695e | 1490 | * @retval None |
EricLew | 0:80ee8f3b695e | 1491 | */ |
EricLew | 0:80ee8f3b695e | 1492 | __weak void HAL_QSPI_RxHalfCpltCallback(QSPI_HandleTypeDef *hqspi) |
EricLew | 0:80ee8f3b695e | 1493 | { |
EricLew | 0:80ee8f3b695e | 1494 | /* NOTE: This function should not be modified, when the callback is needed, |
EricLew | 0:80ee8f3b695e | 1495 | the HAL_QSPI_RxHalfCpltCallback could be implemented in the user file |
EricLew | 0:80ee8f3b695e | 1496 | */ |
EricLew | 0:80ee8f3b695e | 1497 | } |
EricLew | 0:80ee8f3b695e | 1498 | |
EricLew | 0:80ee8f3b695e | 1499 | /** |
EricLew | 0:80ee8f3b695e | 1500 | * @brief Tx Half Transfer completed callback. |
EricLew | 0:80ee8f3b695e | 1501 | * @param hqspi: QSPI handle |
EricLew | 0:80ee8f3b695e | 1502 | * @retval None |
EricLew | 0:80ee8f3b695e | 1503 | */ |
EricLew | 0:80ee8f3b695e | 1504 | __weak void HAL_QSPI_TxHalfCpltCallback(QSPI_HandleTypeDef *hqspi) |
EricLew | 0:80ee8f3b695e | 1505 | { |
EricLew | 0:80ee8f3b695e | 1506 | /* NOTE: This function should not be modified, when the callback is needed, |
EricLew | 0:80ee8f3b695e | 1507 | the HAL_QSPI_TxHalfCpltCallback could be implemented in the user file |
EricLew | 0:80ee8f3b695e | 1508 | */ |
EricLew | 0:80ee8f3b695e | 1509 | } |
EricLew | 0:80ee8f3b695e | 1510 | |
EricLew | 0:80ee8f3b695e | 1511 | /** |
EricLew | 0:80ee8f3b695e | 1512 | * @brief FIFO Threshold callback. |
EricLew | 0:80ee8f3b695e | 1513 | * @param hqspi: QSPI handle |
EricLew | 0:80ee8f3b695e | 1514 | * @retval None |
EricLew | 0:80ee8f3b695e | 1515 | */ |
EricLew | 0:80ee8f3b695e | 1516 | __weak void HAL_QSPI_FifoThresholdCallback(QSPI_HandleTypeDef *hqspi) |
EricLew | 0:80ee8f3b695e | 1517 | { |
EricLew | 0:80ee8f3b695e | 1518 | /* NOTE : This function should not be modified, when the callback is needed, |
EricLew | 0:80ee8f3b695e | 1519 | the HAL_QSPI_FIFOThresholdCallback could be implemented in the user file |
EricLew | 0:80ee8f3b695e | 1520 | */ |
EricLew | 0:80ee8f3b695e | 1521 | } |
EricLew | 0:80ee8f3b695e | 1522 | |
EricLew | 0:80ee8f3b695e | 1523 | /** |
EricLew | 0:80ee8f3b695e | 1524 | * @brief Status Match callback. |
EricLew | 0:80ee8f3b695e | 1525 | * @param hqspi: QSPI handle |
EricLew | 0:80ee8f3b695e | 1526 | * @retval None |
EricLew | 0:80ee8f3b695e | 1527 | */ |
EricLew | 0:80ee8f3b695e | 1528 | __weak void HAL_QSPI_StatusMatchCallback(QSPI_HandleTypeDef *hqspi) |
EricLew | 0:80ee8f3b695e | 1529 | { |
EricLew | 0:80ee8f3b695e | 1530 | /* NOTE : This function should not be modified, when the callback is needed, |
EricLew | 0:80ee8f3b695e | 1531 | the HAL_QSPI_StatusMatchCallback could be implemented in the user file |
EricLew | 0:80ee8f3b695e | 1532 | */ |
EricLew | 0:80ee8f3b695e | 1533 | } |
EricLew | 0:80ee8f3b695e | 1534 | |
EricLew | 0:80ee8f3b695e | 1535 | /** |
EricLew | 0:80ee8f3b695e | 1536 | * @brief Timeout callback. |
EricLew | 0:80ee8f3b695e | 1537 | * @param hqspi: QSPI handle |
EricLew | 0:80ee8f3b695e | 1538 | * @retval None |
EricLew | 0:80ee8f3b695e | 1539 | */ |
EricLew | 0:80ee8f3b695e | 1540 | __weak void HAL_QSPI_TimeOutCallback(QSPI_HandleTypeDef *hqspi) |
EricLew | 0:80ee8f3b695e | 1541 | { |
EricLew | 0:80ee8f3b695e | 1542 | /* NOTE : This function should not be modified, when the callback is needed, |
EricLew | 0:80ee8f3b695e | 1543 | the HAL_QSPI_TimeOutCallback could be implemented in the user file |
EricLew | 0:80ee8f3b695e | 1544 | */ |
EricLew | 0:80ee8f3b695e | 1545 | } |
EricLew | 0:80ee8f3b695e | 1546 | |
EricLew | 0:80ee8f3b695e | 1547 | /** |
EricLew | 0:80ee8f3b695e | 1548 | * @} |
EricLew | 0:80ee8f3b695e | 1549 | */ |
EricLew | 0:80ee8f3b695e | 1550 | |
EricLew | 0:80ee8f3b695e | 1551 | /** @defgroup QSPI_Exported_Functions_Group3 Peripheral Control and State functions |
EricLew | 0:80ee8f3b695e | 1552 | * @brief QSPI control and State functions |
EricLew | 0:80ee8f3b695e | 1553 | * |
EricLew | 0:80ee8f3b695e | 1554 | @verbatim |
EricLew | 0:80ee8f3b695e | 1555 | =============================================================================== |
EricLew | 0:80ee8f3b695e | 1556 | ##### Peripheral Control and State functions ##### |
EricLew | 0:80ee8f3b695e | 1557 | =============================================================================== |
EricLew | 0:80ee8f3b695e | 1558 | [..] |
EricLew | 0:80ee8f3b695e | 1559 | This subsection provides a set of functions allowing to : |
EricLew | 0:80ee8f3b695e | 1560 | (+) Check in run-time the state of the driver. |
EricLew | 0:80ee8f3b695e | 1561 | (+) Check the error code set during last operation. |
EricLew | 0:80ee8f3b695e | 1562 | (+) Abort any operation. |
EricLew | 0:80ee8f3b695e | 1563 | |
EricLew | 0:80ee8f3b695e | 1564 | |
EricLew | 0:80ee8f3b695e | 1565 | @endverbatim |
EricLew | 0:80ee8f3b695e | 1566 | * @{ |
EricLew | 0:80ee8f3b695e | 1567 | */ |
EricLew | 0:80ee8f3b695e | 1568 | |
EricLew | 0:80ee8f3b695e | 1569 | /** |
EricLew | 0:80ee8f3b695e | 1570 | * @brief Return the QSPI handle state. |
EricLew | 0:80ee8f3b695e | 1571 | * @param hqspi: QSPI handle |
EricLew | 0:80ee8f3b695e | 1572 | * @retval HAL state |
EricLew | 0:80ee8f3b695e | 1573 | */ |
EricLew | 0:80ee8f3b695e | 1574 | HAL_QSPI_StateTypeDef HAL_QSPI_GetState(QSPI_HandleTypeDef *hqspi) |
EricLew | 0:80ee8f3b695e | 1575 | { |
EricLew | 0:80ee8f3b695e | 1576 | /* Return QSPI handle state */ |
EricLew | 0:80ee8f3b695e | 1577 | return hqspi->State; |
EricLew | 0:80ee8f3b695e | 1578 | } |
EricLew | 0:80ee8f3b695e | 1579 | |
EricLew | 0:80ee8f3b695e | 1580 | /** |
EricLew | 0:80ee8f3b695e | 1581 | * @brief Return the QSPI error code. |
EricLew | 0:80ee8f3b695e | 1582 | * @param hqspi: QSPI handle |
EricLew | 0:80ee8f3b695e | 1583 | * @retval QSPI Error Code |
EricLew | 0:80ee8f3b695e | 1584 | */ |
EricLew | 0:80ee8f3b695e | 1585 | uint32_t HAL_QSPI_GetError(QSPI_HandleTypeDef *hqspi) |
EricLew | 0:80ee8f3b695e | 1586 | { |
EricLew | 0:80ee8f3b695e | 1587 | return hqspi->ErrorCode; |
EricLew | 0:80ee8f3b695e | 1588 | } |
EricLew | 0:80ee8f3b695e | 1589 | |
EricLew | 0:80ee8f3b695e | 1590 | /** |
EricLew | 0:80ee8f3b695e | 1591 | * @brief Abort the current transmission. |
EricLew | 0:80ee8f3b695e | 1592 | * @param hqspi: QSPI handle |
EricLew | 0:80ee8f3b695e | 1593 | * @retval HAL status |
EricLew | 0:80ee8f3b695e | 1594 | */ |
EricLew | 0:80ee8f3b695e | 1595 | HAL_StatusTypeDef HAL_QSPI_Abort(QSPI_HandleTypeDef *hqspi) |
EricLew | 0:80ee8f3b695e | 1596 | { |
EricLew | 0:80ee8f3b695e | 1597 | HAL_StatusTypeDef status = HAL_ERROR; |
EricLew | 0:80ee8f3b695e | 1598 | |
EricLew | 0:80ee8f3b695e | 1599 | /* Configure QSPI: CR register with Abort request */ |
EricLew | 0:80ee8f3b695e | 1600 | SET_BIT(hqspi->Instance->CR, QUADSPI_CR_ABORT); |
EricLew | 0:80ee8f3b695e | 1601 | |
EricLew | 0:80ee8f3b695e | 1602 | /* Wait until TC flag is set to go back in idle state */ |
EricLew | 0:80ee8f3b695e | 1603 | if(QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_TC, SET, hqspi->Timeout) != HAL_OK) |
EricLew | 0:80ee8f3b695e | 1604 | { |
EricLew | 0:80ee8f3b695e | 1605 | status = HAL_TIMEOUT; |
EricLew | 0:80ee8f3b695e | 1606 | } |
EricLew | 0:80ee8f3b695e | 1607 | else |
EricLew | 0:80ee8f3b695e | 1608 | { |
EricLew | 0:80ee8f3b695e | 1609 | __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_TC); |
EricLew | 0:80ee8f3b695e | 1610 | |
EricLew | 0:80ee8f3b695e | 1611 | /* Wait until BUSY flag is reset */ |
EricLew | 0:80ee8f3b695e | 1612 | status = QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_BUSY, RESET, hqspi->Timeout); |
EricLew | 0:80ee8f3b695e | 1613 | |
EricLew | 0:80ee8f3b695e | 1614 | /* Update state */ |
EricLew | 0:80ee8f3b695e | 1615 | hqspi->State = HAL_QSPI_STATE_READY; |
EricLew | 0:80ee8f3b695e | 1616 | } |
EricLew | 0:80ee8f3b695e | 1617 | |
EricLew | 0:80ee8f3b695e | 1618 | return status; |
EricLew | 0:80ee8f3b695e | 1619 | } |
EricLew | 0:80ee8f3b695e | 1620 | |
EricLew | 0:80ee8f3b695e | 1621 | /** @brief Set QSPI timeout. |
EricLew | 0:80ee8f3b695e | 1622 | * @param hqspi: QSPI handle. |
EricLew | 0:80ee8f3b695e | 1623 | * @param Timeout: Timeout for the QSPI memory access. |
EricLew | 0:80ee8f3b695e | 1624 | * @retval None |
EricLew | 0:80ee8f3b695e | 1625 | */ |
EricLew | 0:80ee8f3b695e | 1626 | void HAL_QSPI_SetTimeout(QSPI_HandleTypeDef *hqspi, uint32_t Timeout) |
EricLew | 0:80ee8f3b695e | 1627 | { |
EricLew | 0:80ee8f3b695e | 1628 | hqspi->Timeout = Timeout; |
EricLew | 0:80ee8f3b695e | 1629 | } |
EricLew | 0:80ee8f3b695e | 1630 | |
EricLew | 0:80ee8f3b695e | 1631 | /** |
EricLew | 0:80ee8f3b695e | 1632 | * @} |
EricLew | 0:80ee8f3b695e | 1633 | */ |
EricLew | 0:80ee8f3b695e | 1634 | |
EricLew | 0:80ee8f3b695e | 1635 | /** |
EricLew | 0:80ee8f3b695e | 1636 | * @brief DMA QSPI receive process complete callback. |
EricLew | 0:80ee8f3b695e | 1637 | * @param hdma: DMA handle |
EricLew | 0:80ee8f3b695e | 1638 | * @retval None |
EricLew | 0:80ee8f3b695e | 1639 | */ |
EricLew | 0:80ee8f3b695e | 1640 | static void QSPI_DMARxCplt(DMA_HandleTypeDef *hdma) |
EricLew | 0:80ee8f3b695e | 1641 | { |
EricLew | 0:80ee8f3b695e | 1642 | QSPI_HandleTypeDef* hqspi = ( QSPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
EricLew | 0:80ee8f3b695e | 1643 | hqspi->RxXferCount = 0; |
EricLew | 0:80ee8f3b695e | 1644 | |
EricLew | 0:80ee8f3b695e | 1645 | /* Wait for QSPI TC Flag */ |
EricLew | 0:80ee8f3b695e | 1646 | if(QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_TC, SET, hqspi->Timeout) != HAL_OK) |
EricLew | 0:80ee8f3b695e | 1647 | { |
EricLew | 0:80ee8f3b695e | 1648 | /* Timeout occurred */ |
EricLew | 0:80ee8f3b695e | 1649 | HAL_QSPI_ErrorCallback(hqspi); |
EricLew | 0:80ee8f3b695e | 1650 | } |
EricLew | 0:80ee8f3b695e | 1651 | else |
EricLew | 0:80ee8f3b695e | 1652 | { |
EricLew | 0:80ee8f3b695e | 1653 | /* Disable the DMA transfer by clearing the DMAEN bit in the QSPI CR register */ |
EricLew | 0:80ee8f3b695e | 1654 | CLEAR_BIT(hqspi->Instance->CR, QUADSPI_CR_DMAEN); |
EricLew | 0:80ee8f3b695e | 1655 | |
EricLew | 0:80ee8f3b695e | 1656 | /* Disable the DMA channel */ |
EricLew | 0:80ee8f3b695e | 1657 | HAL_DMA_Abort(hdma); |
EricLew | 0:80ee8f3b695e | 1658 | |
EricLew | 0:80ee8f3b695e | 1659 | /* Clear Transfer Complete bit */ |
EricLew | 0:80ee8f3b695e | 1660 | __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_TC); |
EricLew | 0:80ee8f3b695e | 1661 | |
EricLew | 0:80ee8f3b695e | 1662 | /* Workaround - Extra data written in the FIFO at the end of a read transfer */ |
EricLew | 0:80ee8f3b695e | 1663 | HAL_QSPI_Abort(hqspi); |
EricLew | 0:80ee8f3b695e | 1664 | |
EricLew | 0:80ee8f3b695e | 1665 | /* Update state */ |
EricLew | 0:80ee8f3b695e | 1666 | hqspi->State = HAL_QSPI_STATE_READY; |
EricLew | 0:80ee8f3b695e | 1667 | |
EricLew | 0:80ee8f3b695e | 1668 | HAL_QSPI_RxCpltCallback(hqspi); |
EricLew | 0:80ee8f3b695e | 1669 | } |
EricLew | 0:80ee8f3b695e | 1670 | } |
EricLew | 0:80ee8f3b695e | 1671 | |
EricLew | 0:80ee8f3b695e | 1672 | /** |
EricLew | 0:80ee8f3b695e | 1673 | * @brief DMA QSPI transmit process complete callback. |
EricLew | 0:80ee8f3b695e | 1674 | * @param hdma: DMA handle |
EricLew | 0:80ee8f3b695e | 1675 | * @retval None |
EricLew | 0:80ee8f3b695e | 1676 | */ |
EricLew | 0:80ee8f3b695e | 1677 | static void QSPI_DMATxCplt(DMA_HandleTypeDef *hdma) |
EricLew | 0:80ee8f3b695e | 1678 | { |
EricLew | 0:80ee8f3b695e | 1679 | QSPI_HandleTypeDef* hqspi = ( QSPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
EricLew | 0:80ee8f3b695e | 1680 | hqspi->TxXferCount = 0; |
EricLew | 0:80ee8f3b695e | 1681 | |
EricLew | 0:80ee8f3b695e | 1682 | /* Wait for QSPI TC Flag */ |
EricLew | 0:80ee8f3b695e | 1683 | if(QSPI_WaitFlagStateUntilTimeout(hqspi, QSPI_FLAG_TC, SET, hqspi->Timeout) != HAL_OK) |
EricLew | 0:80ee8f3b695e | 1684 | { |
EricLew | 0:80ee8f3b695e | 1685 | /* Timeout occurred */ |
EricLew | 0:80ee8f3b695e | 1686 | HAL_QSPI_ErrorCallback(hqspi); |
EricLew | 0:80ee8f3b695e | 1687 | } |
EricLew | 0:80ee8f3b695e | 1688 | else |
EricLew | 0:80ee8f3b695e | 1689 | { |
EricLew | 0:80ee8f3b695e | 1690 | /* Disable the DMA transfer by clearing the DMAEN bit in the QSPI CR register */ |
EricLew | 0:80ee8f3b695e | 1691 | CLEAR_BIT(hqspi->Instance->CR, QUADSPI_CR_DMAEN); |
EricLew | 0:80ee8f3b695e | 1692 | |
EricLew | 0:80ee8f3b695e | 1693 | /* Disable the DMA channel */ |
EricLew | 0:80ee8f3b695e | 1694 | HAL_DMA_Abort(hdma); |
EricLew | 0:80ee8f3b695e | 1695 | |
EricLew | 0:80ee8f3b695e | 1696 | /* Clear Transfer Complete bit */ |
EricLew | 0:80ee8f3b695e | 1697 | __HAL_QSPI_CLEAR_FLAG(hqspi, QSPI_FLAG_TC); |
EricLew | 0:80ee8f3b695e | 1698 | |
EricLew | 0:80ee8f3b695e | 1699 | /* Clear Busy bit */ |
EricLew | 0:80ee8f3b695e | 1700 | HAL_QSPI_Abort(hqspi); |
EricLew | 0:80ee8f3b695e | 1701 | |
EricLew | 0:80ee8f3b695e | 1702 | /* Update state */ |
EricLew | 0:80ee8f3b695e | 1703 | hqspi->State = HAL_QSPI_STATE_READY; |
EricLew | 0:80ee8f3b695e | 1704 | |
EricLew | 0:80ee8f3b695e | 1705 | HAL_QSPI_TxCpltCallback(hqspi); |
EricLew | 0:80ee8f3b695e | 1706 | } |
EricLew | 0:80ee8f3b695e | 1707 | } |
EricLew | 0:80ee8f3b695e | 1708 | |
EricLew | 0:80ee8f3b695e | 1709 | /** |
EricLew | 0:80ee8f3b695e | 1710 | * @brief DMA QSPI receive process half complete callback. |
EricLew | 0:80ee8f3b695e | 1711 | * @param hdma : DMA handle |
EricLew | 0:80ee8f3b695e | 1712 | * @retval None |
EricLew | 0:80ee8f3b695e | 1713 | */ |
EricLew | 0:80ee8f3b695e | 1714 | static void QSPI_DMARxHalfCplt(DMA_HandleTypeDef *hdma) |
EricLew | 0:80ee8f3b695e | 1715 | { |
EricLew | 0:80ee8f3b695e | 1716 | QSPI_HandleTypeDef* hqspi = (QSPI_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; |
EricLew | 0:80ee8f3b695e | 1717 | |
EricLew | 0:80ee8f3b695e | 1718 | HAL_QSPI_RxHalfCpltCallback(hqspi); |
EricLew | 0:80ee8f3b695e | 1719 | } |
EricLew | 0:80ee8f3b695e | 1720 | |
EricLew | 0:80ee8f3b695e | 1721 | /** |
EricLew | 0:80ee8f3b695e | 1722 | * @brief DMA QSPI transmit process half complete callback. |
EricLew | 0:80ee8f3b695e | 1723 | * @param hdma : DMA handle |
EricLew | 0:80ee8f3b695e | 1724 | * @retval None |
EricLew | 0:80ee8f3b695e | 1725 | */ |
EricLew | 0:80ee8f3b695e | 1726 | static void QSPI_DMATxHalfCplt(DMA_HandleTypeDef *hdma) |
EricLew | 0:80ee8f3b695e | 1727 | { |
EricLew | 0:80ee8f3b695e | 1728 | QSPI_HandleTypeDef* hqspi = (QSPI_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent; |
EricLew | 0:80ee8f3b695e | 1729 | |
EricLew | 0:80ee8f3b695e | 1730 | HAL_QSPI_TxHalfCpltCallback(hqspi); |
EricLew | 0:80ee8f3b695e | 1731 | } |
EricLew | 0:80ee8f3b695e | 1732 | |
EricLew | 0:80ee8f3b695e | 1733 | /** |
EricLew | 0:80ee8f3b695e | 1734 | * @brief DMA QSPI communication error callback. |
EricLew | 0:80ee8f3b695e | 1735 | * @param hdma: DMA handle |
EricLew | 0:80ee8f3b695e | 1736 | * @retval None |
EricLew | 0:80ee8f3b695e | 1737 | */ |
EricLew | 0:80ee8f3b695e | 1738 | static void QSPI_DMAError(DMA_HandleTypeDef *hdma) |
EricLew | 0:80ee8f3b695e | 1739 | { |
EricLew | 0:80ee8f3b695e | 1740 | QSPI_HandleTypeDef* hqspi = ( QSPI_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
EricLew | 0:80ee8f3b695e | 1741 | |
EricLew | 0:80ee8f3b695e | 1742 | hqspi->RxXferCount = 0; |
EricLew | 0:80ee8f3b695e | 1743 | hqspi->TxXferCount = 0; |
EricLew | 0:80ee8f3b695e | 1744 | hqspi->State = HAL_QSPI_STATE_ERROR; |
EricLew | 0:80ee8f3b695e | 1745 | hqspi->ErrorCode |= HAL_QSPI_ERROR_DMA; |
EricLew | 0:80ee8f3b695e | 1746 | |
EricLew | 0:80ee8f3b695e | 1747 | HAL_QSPI_ErrorCallback(hqspi); |
EricLew | 0:80ee8f3b695e | 1748 | } |
EricLew | 0:80ee8f3b695e | 1749 | |
EricLew | 0:80ee8f3b695e | 1750 | /** |
EricLew | 0:80ee8f3b695e | 1751 | * @brief Wait for a flag state until timeout. |
EricLew | 0:80ee8f3b695e | 1752 | * @param hqspi: QSPI handle |
EricLew | 0:80ee8f3b695e | 1753 | * @param Flag: Flag checked |
EricLew | 0:80ee8f3b695e | 1754 | * @param State: Value of the flag expected |
EricLew | 0:80ee8f3b695e | 1755 | * @param Timeout: Duration of the timeout |
EricLew | 0:80ee8f3b695e | 1756 | * @retval HAL status |
EricLew | 0:80ee8f3b695e | 1757 | */ |
EricLew | 0:80ee8f3b695e | 1758 | static HAL_StatusTypeDef QSPI_WaitFlagStateUntilTimeout(QSPI_HandleTypeDef *hqspi, uint32_t Flag, |
EricLew | 0:80ee8f3b695e | 1759 | FlagStatus State, uint32_t Timeout) |
EricLew | 0:80ee8f3b695e | 1760 | { |
EricLew | 0:80ee8f3b695e | 1761 | uint32_t tickstart = HAL_GetTick(); |
EricLew | 0:80ee8f3b695e | 1762 | |
EricLew | 0:80ee8f3b695e | 1763 | /* Wait until flag is in expected state */ |
EricLew | 0:80ee8f3b695e | 1764 | while((FlagStatus)(__HAL_QSPI_GET_FLAG(hqspi, Flag)) != State) |
EricLew | 0:80ee8f3b695e | 1765 | { |
EricLew | 0:80ee8f3b695e | 1766 | /* Check for the Timeout */ |
EricLew | 0:80ee8f3b695e | 1767 | if (Timeout != HAL_MAX_DELAY) |
EricLew | 0:80ee8f3b695e | 1768 | { |
EricLew | 0:80ee8f3b695e | 1769 | if((Timeout == 0) || ((HAL_GetTick() - tickstart) > Timeout)) |
EricLew | 0:80ee8f3b695e | 1770 | { |
EricLew | 0:80ee8f3b695e | 1771 | hqspi->State = HAL_QSPI_STATE_ERROR; |
EricLew | 0:80ee8f3b695e | 1772 | hqspi->ErrorCode |= HAL_QSPI_ERROR_TIMEOUT; |
EricLew | 0:80ee8f3b695e | 1773 | |
EricLew | 0:80ee8f3b695e | 1774 | return HAL_TIMEOUT; |
EricLew | 0:80ee8f3b695e | 1775 | } |
EricLew | 0:80ee8f3b695e | 1776 | } |
EricLew | 0:80ee8f3b695e | 1777 | } |
EricLew | 0:80ee8f3b695e | 1778 | return HAL_OK; |
EricLew | 0:80ee8f3b695e | 1779 | } |
EricLew | 0:80ee8f3b695e | 1780 | |
EricLew | 0:80ee8f3b695e | 1781 | /** |
EricLew | 0:80ee8f3b695e | 1782 | * @brief Configure the communication registers. |
EricLew | 0:80ee8f3b695e | 1783 | * @param hqspi: QSPI handle |
EricLew | 0:80ee8f3b695e | 1784 | * @param cmd: structure that contains the command configuration information |
EricLew | 0:80ee8f3b695e | 1785 | * @param FunctionalMode: functional mode to configured |
EricLew | 0:80ee8f3b695e | 1786 | * This parameter can be one of the following values: |
EricLew | 0:80ee8f3b695e | 1787 | * @arg QSPI_FUNCTIONAL_MODE_INDIRECT_WRITE: Indirect write mode |
EricLew | 0:80ee8f3b695e | 1788 | * @arg QSPI_FUNCTIONAL_MODE_INDIRECT_READ: Indirect read mode |
EricLew | 0:80ee8f3b695e | 1789 | * @arg QSPI_FUNCTIONAL_MODE_AUTO_POLLING: Automatic polling mode |
EricLew | 0:80ee8f3b695e | 1790 | * @arg QSPI_FUNCTIONAL_MODE_MEMORY_MAPPED: Memory-mapped mode |
EricLew | 0:80ee8f3b695e | 1791 | * @retval None |
EricLew | 0:80ee8f3b695e | 1792 | */ |
EricLew | 0:80ee8f3b695e | 1793 | static void QSPI_Config(QSPI_HandleTypeDef *hqspi, QSPI_CommandTypeDef *cmd, uint32_t FunctionalMode) |
EricLew | 0:80ee8f3b695e | 1794 | { |
EricLew | 0:80ee8f3b695e | 1795 | assert_param(IS_QSPI_FUNCTIONAL_MODE(FunctionalMode)); |
EricLew | 0:80ee8f3b695e | 1796 | |
EricLew | 0:80ee8f3b695e | 1797 | if ((cmd->DataMode != QSPI_DATA_NONE) && (FunctionalMode != QSPI_FUNCTIONAL_MODE_MEMORY_MAPPED)) |
EricLew | 0:80ee8f3b695e | 1798 | { |
EricLew | 0:80ee8f3b695e | 1799 | /* Configure QSPI: DLR register with the number of data to read or write */ |
EricLew | 0:80ee8f3b695e | 1800 | WRITE_REG(hqspi->Instance->DLR, (cmd->NbData - 1)); |
EricLew | 0:80ee8f3b695e | 1801 | } |
EricLew | 0:80ee8f3b695e | 1802 | |
EricLew | 0:80ee8f3b695e | 1803 | if (cmd->InstructionMode != QSPI_INSTRUCTION_NONE) |
EricLew | 0:80ee8f3b695e | 1804 | { |
EricLew | 0:80ee8f3b695e | 1805 | if (cmd->AlternateByteMode != QSPI_ALTERNATE_BYTES_NONE) |
EricLew | 0:80ee8f3b695e | 1806 | { |
EricLew | 0:80ee8f3b695e | 1807 | /* Configure QSPI: ABR register with alternate bytes value */ |
EricLew | 0:80ee8f3b695e | 1808 | WRITE_REG(hqspi->Instance->ABR, cmd->AlternateBytes); |
EricLew | 0:80ee8f3b695e | 1809 | |
EricLew | 0:80ee8f3b695e | 1810 | if (cmd->AddressMode != QSPI_ADDRESS_NONE) |
EricLew | 0:80ee8f3b695e | 1811 | { |
EricLew | 0:80ee8f3b695e | 1812 | /*---- Command with instruction, address and alternate bytes ----*/ |
EricLew | 0:80ee8f3b695e | 1813 | /* Configure QSPI: CCR register with all communications parameters */ |
EricLew | 0:80ee8f3b695e | 1814 | WRITE_REG(hqspi->Instance->CCR, (cmd->DdrMode | cmd->DdrHoldHalfCycle | cmd->SIOOMode | |
EricLew | 0:80ee8f3b695e | 1815 | cmd->DataMode | (cmd->DummyCycles << POSITION_VAL(QUADSPI_CCR_DCYC)) | |
EricLew | 0:80ee8f3b695e | 1816 | cmd->AlternateBytesSize | cmd->AlternateByteMode | |
EricLew | 0:80ee8f3b695e | 1817 | cmd->AddressSize | cmd->AddressMode | cmd->InstructionMode | |
EricLew | 0:80ee8f3b695e | 1818 | cmd->Instruction | FunctionalMode)); |
EricLew | 0:80ee8f3b695e | 1819 | |
EricLew | 0:80ee8f3b695e | 1820 | if (FunctionalMode != QSPI_FUNCTIONAL_MODE_MEMORY_MAPPED) |
EricLew | 0:80ee8f3b695e | 1821 | { |
EricLew | 0:80ee8f3b695e | 1822 | /* Configure QSPI: AR register with address value */ |
EricLew | 0:80ee8f3b695e | 1823 | WRITE_REG(hqspi->Instance->AR, cmd->Address); |
EricLew | 0:80ee8f3b695e | 1824 | } |
EricLew | 0:80ee8f3b695e | 1825 | } |
EricLew | 0:80ee8f3b695e | 1826 | else |
EricLew | 0:80ee8f3b695e | 1827 | { |
EricLew | 0:80ee8f3b695e | 1828 | /*---- Command with instruction and alternate bytes ----*/ |
EricLew | 0:80ee8f3b695e | 1829 | /* Configure QSPI: CCR register with all communications parameters */ |
EricLew | 0:80ee8f3b695e | 1830 | WRITE_REG(hqspi->Instance->CCR, (cmd->DdrMode | cmd->DdrHoldHalfCycle | cmd->SIOOMode | |
EricLew | 0:80ee8f3b695e | 1831 | cmd->DataMode | (cmd->DummyCycles << POSITION_VAL(QUADSPI_CCR_DCYC)) | |
EricLew | 0:80ee8f3b695e | 1832 | cmd->AlternateBytesSize | cmd->AlternateByteMode | |
EricLew | 0:80ee8f3b695e | 1833 | cmd->AddressMode | cmd->InstructionMode | |
EricLew | 0:80ee8f3b695e | 1834 | cmd->Instruction | FunctionalMode)); |
EricLew | 0:80ee8f3b695e | 1835 | } |
EricLew | 0:80ee8f3b695e | 1836 | } |
EricLew | 0:80ee8f3b695e | 1837 | else |
EricLew | 0:80ee8f3b695e | 1838 | { |
EricLew | 0:80ee8f3b695e | 1839 | if (cmd->AddressMode != QSPI_ADDRESS_NONE) |
EricLew | 0:80ee8f3b695e | 1840 | { |
EricLew | 0:80ee8f3b695e | 1841 | /*---- Command with instruction and address ----*/ |
EricLew | 0:80ee8f3b695e | 1842 | /* Configure QSPI: CCR register with all communications parameters */ |
EricLew | 0:80ee8f3b695e | 1843 | WRITE_REG(hqspi->Instance->CCR, (cmd->DdrMode | cmd->DdrHoldHalfCycle | cmd->SIOOMode | |
EricLew | 0:80ee8f3b695e | 1844 | cmd->DataMode | (cmd->DummyCycles << POSITION_VAL(QUADSPI_CCR_DCYC)) | |
EricLew | 0:80ee8f3b695e | 1845 | cmd->AlternateByteMode | cmd->AddressSize | cmd->AddressMode | |
EricLew | 0:80ee8f3b695e | 1846 | cmd->InstructionMode | cmd->Instruction | FunctionalMode)); |
EricLew | 0:80ee8f3b695e | 1847 | |
EricLew | 0:80ee8f3b695e | 1848 | if (FunctionalMode != QSPI_FUNCTIONAL_MODE_MEMORY_MAPPED) |
EricLew | 0:80ee8f3b695e | 1849 | { |
EricLew | 0:80ee8f3b695e | 1850 | /* Configure QSPI: AR register with address value */ |
EricLew | 0:80ee8f3b695e | 1851 | WRITE_REG(hqspi->Instance->AR, cmd->Address); |
EricLew | 0:80ee8f3b695e | 1852 | } |
EricLew | 0:80ee8f3b695e | 1853 | } |
EricLew | 0:80ee8f3b695e | 1854 | else |
EricLew | 0:80ee8f3b695e | 1855 | { |
EricLew | 0:80ee8f3b695e | 1856 | /*---- Command with only instruction ----*/ |
EricLew | 0:80ee8f3b695e | 1857 | /* Configure QSPI: CCR register with all communications parameters */ |
EricLew | 0:80ee8f3b695e | 1858 | WRITE_REG(hqspi->Instance->CCR, (cmd->DdrMode | cmd->DdrHoldHalfCycle | cmd->SIOOMode | |
EricLew | 0:80ee8f3b695e | 1859 | cmd->DataMode | (cmd->DummyCycles << POSITION_VAL(QUADSPI_CCR_DCYC)) | |
EricLew | 0:80ee8f3b695e | 1860 | cmd->AlternateByteMode | cmd->AddressMode | |
EricLew | 0:80ee8f3b695e | 1861 | cmd->InstructionMode | cmd->Instruction | FunctionalMode)); |
EricLew | 0:80ee8f3b695e | 1862 | } |
EricLew | 0:80ee8f3b695e | 1863 | } |
EricLew | 0:80ee8f3b695e | 1864 | } |
EricLew | 0:80ee8f3b695e | 1865 | else |
EricLew | 0:80ee8f3b695e | 1866 | { |
EricLew | 0:80ee8f3b695e | 1867 | if (cmd->AlternateByteMode != QSPI_ALTERNATE_BYTES_NONE) |
EricLew | 0:80ee8f3b695e | 1868 | { |
EricLew | 0:80ee8f3b695e | 1869 | /* Configure QSPI: ABR register with alternate bytes value */ |
EricLew | 0:80ee8f3b695e | 1870 | WRITE_REG(hqspi->Instance->ABR, cmd->AlternateBytes); |
EricLew | 0:80ee8f3b695e | 1871 | |
EricLew | 0:80ee8f3b695e | 1872 | if (cmd->AddressMode != QSPI_ADDRESS_NONE) |
EricLew | 0:80ee8f3b695e | 1873 | { |
EricLew | 0:80ee8f3b695e | 1874 | /*---- Command with address and alternate bytes ----*/ |
EricLew | 0:80ee8f3b695e | 1875 | /* Configure QSPI: CCR register with all communications parameters */ |
EricLew | 0:80ee8f3b695e | 1876 | WRITE_REG(hqspi->Instance->CCR, (cmd->DdrMode | cmd->DdrHoldHalfCycle | cmd->SIOOMode | |
EricLew | 0:80ee8f3b695e | 1877 | cmd->DataMode | (cmd->DummyCycles << POSITION_VAL(QUADSPI_CCR_DCYC)) | |
EricLew | 0:80ee8f3b695e | 1878 | cmd->AlternateBytesSize | cmd->AlternateByteMode | |
EricLew | 0:80ee8f3b695e | 1879 | cmd->AddressSize | cmd->AddressMode | |
EricLew | 0:80ee8f3b695e | 1880 | cmd->InstructionMode | FunctionalMode)); |
EricLew | 0:80ee8f3b695e | 1881 | |
EricLew | 0:80ee8f3b695e | 1882 | if (FunctionalMode != QSPI_FUNCTIONAL_MODE_MEMORY_MAPPED) |
EricLew | 0:80ee8f3b695e | 1883 | { |
EricLew | 0:80ee8f3b695e | 1884 | /* Configure QSPI: AR register with address value */ |
EricLew | 0:80ee8f3b695e | 1885 | WRITE_REG(hqspi->Instance->AR, cmd->Address); |
EricLew | 0:80ee8f3b695e | 1886 | } |
EricLew | 0:80ee8f3b695e | 1887 | } |
EricLew | 0:80ee8f3b695e | 1888 | else |
EricLew | 0:80ee8f3b695e | 1889 | { |
EricLew | 0:80ee8f3b695e | 1890 | /*---- Command with only alternate bytes ----*/ |
EricLew | 0:80ee8f3b695e | 1891 | /* Configure QSPI: CCR register with all communications parameters */ |
EricLew | 0:80ee8f3b695e | 1892 | WRITE_REG(hqspi->Instance->CCR, (cmd->DdrMode | cmd->DdrHoldHalfCycle | cmd->SIOOMode | |
EricLew | 0:80ee8f3b695e | 1893 | cmd->DataMode | (cmd->DummyCycles << POSITION_VAL(QUADSPI_CCR_DCYC)) | |
EricLew | 0:80ee8f3b695e | 1894 | cmd->AlternateBytesSize | cmd->AlternateByteMode | |
EricLew | 0:80ee8f3b695e | 1895 | cmd->AddressMode | cmd->InstructionMode | FunctionalMode)); |
EricLew | 0:80ee8f3b695e | 1896 | } |
EricLew | 0:80ee8f3b695e | 1897 | } |
EricLew | 0:80ee8f3b695e | 1898 | else |
EricLew | 0:80ee8f3b695e | 1899 | { |
EricLew | 0:80ee8f3b695e | 1900 | if (cmd->AddressMode != QSPI_ADDRESS_NONE) |
EricLew | 0:80ee8f3b695e | 1901 | { |
EricLew | 0:80ee8f3b695e | 1902 | /*---- Command with only address ----*/ |
EricLew | 0:80ee8f3b695e | 1903 | /* Configure QSPI: CCR register with all communications parameters */ |
EricLew | 0:80ee8f3b695e | 1904 | WRITE_REG(hqspi->Instance->CCR, (cmd->DdrMode | cmd->DdrHoldHalfCycle | cmd->SIOOMode | |
EricLew | 0:80ee8f3b695e | 1905 | cmd->DataMode | (cmd->DummyCycles << POSITION_VAL(QUADSPI_CCR_DCYC)) | |
EricLew | 0:80ee8f3b695e | 1906 | cmd->AlternateByteMode | cmd->AddressSize | |
EricLew | 0:80ee8f3b695e | 1907 | cmd->AddressMode | cmd->InstructionMode | FunctionalMode)); |
EricLew | 0:80ee8f3b695e | 1908 | |
EricLew | 0:80ee8f3b695e | 1909 | if (FunctionalMode != QSPI_FUNCTIONAL_MODE_MEMORY_MAPPED) |
EricLew | 0:80ee8f3b695e | 1910 | { |
EricLew | 0:80ee8f3b695e | 1911 | /* Configure QSPI: AR register with address value */ |
EricLew | 0:80ee8f3b695e | 1912 | WRITE_REG(hqspi->Instance->AR, cmd->Address); |
EricLew | 0:80ee8f3b695e | 1913 | } |
EricLew | 0:80ee8f3b695e | 1914 | } |
EricLew | 0:80ee8f3b695e | 1915 | else |
EricLew | 0:80ee8f3b695e | 1916 | { |
EricLew | 0:80ee8f3b695e | 1917 | /*---- Command with only data phase ----*/ |
EricLew | 0:80ee8f3b695e | 1918 | if (cmd->DataMode != QSPI_DATA_NONE) |
EricLew | 0:80ee8f3b695e | 1919 | { |
EricLew | 0:80ee8f3b695e | 1920 | /* Configure QSPI: CCR register with all communications parameters */ |
EricLew | 0:80ee8f3b695e | 1921 | WRITE_REG(hqspi->Instance->CCR, (cmd->DdrMode | cmd->DdrHoldHalfCycle | cmd->SIOOMode | |
EricLew | 0:80ee8f3b695e | 1922 | cmd->DataMode | (cmd->DummyCycles << POSITION_VAL(QUADSPI_CCR_DCYC)) | |
EricLew | 0:80ee8f3b695e | 1923 | cmd->AlternateByteMode | cmd->AddressMode | |
EricLew | 0:80ee8f3b695e | 1924 | cmd->InstructionMode | FunctionalMode)); |
EricLew | 0:80ee8f3b695e | 1925 | } |
EricLew | 0:80ee8f3b695e | 1926 | } |
EricLew | 0:80ee8f3b695e | 1927 | } |
EricLew | 0:80ee8f3b695e | 1928 | } |
EricLew | 0:80ee8f3b695e | 1929 | } |
EricLew | 0:80ee8f3b695e | 1930 | |
EricLew | 0:80ee8f3b695e | 1931 | /** |
EricLew | 0:80ee8f3b695e | 1932 | * @} |
EricLew | 0:80ee8f3b695e | 1933 | */ |
EricLew | 0:80ee8f3b695e | 1934 | |
EricLew | 0:80ee8f3b695e | 1935 | #endif /* HAL_QSPI_MODULE_ENABLED */ |
EricLew | 0:80ee8f3b695e | 1936 | /** |
EricLew | 0:80ee8f3b695e | 1937 | * @} |
EricLew | 0:80ee8f3b695e | 1938 | */ |
EricLew | 0:80ee8f3b695e | 1939 | |
EricLew | 0:80ee8f3b695e | 1940 | /** |
EricLew | 0:80ee8f3b695e | 1941 | * @} |
EricLew | 0:80ee8f3b695e | 1942 | */ |
EricLew | 0:80ee8f3b695e | 1943 | |
EricLew | 0:80ee8f3b695e | 1944 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
EricLew | 0:80ee8f3b695e | 1945 |