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NanostackRfPhyAtmel.cpp
00001 /* 00002 * Copyright (c) 2014-2015 ARM Limited. All rights reserved. 00003 * SPDX-License-Identifier: Apache-2.0 00004 * Licensed under the Apache License, Version 2.0 (the License); you may 00005 * not use this file except in compliance with the License. 00006 * You may obtain a copy of the License at 00007 * 00008 * http://www.apache.org/licenses/LICENSE-2.0 00009 * 00010 * Unless required by applicable law or agreed to in writing, software 00011 * distributed under the License is distributed on an AS IS BASIS, WITHOUT 00012 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 00013 * See the License for the specific language governing permissions and 00014 * limitations under the License. 00015 */ 00016 #include <string.h> 00017 #include "platform/arm_hal_interrupt.h" 00018 #include "nanostack/platform/arm_hal_phy.h" 00019 #include "ns_types.h" 00020 #include "NanostackRfPhyAtmel.h" 00021 #include "randLIB.h" 00022 #include "AT86RFReg.h" 00023 #include "nanostack/platform/arm_hal_phy.h" 00024 #include "toolchain.h" 00025 00026 /*Worst case sensitivity*/ 00027 #define RF_DEFAULT_SENSITIVITY -88 00028 /*Run calibration every 5 minutes*/ 00029 #define RF_CALIBRATION_INTERVAL 6000000 00030 /*Wait ACK for 2.5ms*/ 00031 #define RF_ACK_WAIT_DEFAULT_TIMEOUT 50 00032 /*Base CCA backoff (50us units) - substitutes for Inter-Frame Spacing*/ 00033 #define RF_CCA_BASE_BACKOFF 13 /* 650us */ 00034 /*CCA random backoff (50us units)*/ 00035 #define RF_CCA_RANDOM_BACKOFF 51 /* 2550us */ 00036 00037 #define RF_BUFFER_SIZE 128 00038 00039 #define RF_PHY_MODE OQPSK_SIN_250 00040 00041 /*Radio RX and TX state definitions*/ 00042 #define RFF_ON 0x01 00043 #define RFF_RX 0x02 00044 #define RFF_TX 0x04 00045 #define RFF_CCA 0x08 00046 00047 typedef enum 00048 { 00049 RF_MODE_NORMAL = 0, 00050 RF_MODE_SNIFFER = 1, 00051 RF_MODE_ED = 2 00052 }rf_mode_t; 00053 00054 /*Atmel RF Part Type*/ 00055 typedef enum 00056 { 00057 ATMEL_UNKNOW_DEV = 0, 00058 ATMEL_AT86RF212, 00059 ATMEL_AT86RF231, 00060 ATMEL_AT86RF233 00061 }rf_trx_part_e; 00062 00063 /*Atmel RF states*/ 00064 typedef enum 00065 { 00066 NOP = 0x00, 00067 BUSY_RX = 0x01, 00068 RF_TX_START = 0x02, 00069 FORCE_TRX_OFF = 0x03, 00070 FORCE_PLL_ON = 0x04, 00071 RX_ON = 0x06, 00072 TRX_OFF = 0x08, 00073 PLL_ON = 0x09, 00074 BUSY_RX_AACK = 0x11, 00075 SLEEP = 0x0F, 00076 RX_AACK_ON = 0x16, 00077 TX_ARET_ON = 0x19 00078 }rf_trx_states_t; 00079 00080 /*RF receive buffer*/ 00081 static uint8_t rf_buffer[RF_BUFFER_SIZE]; 00082 /*ACK wait duration changes depending on data rate*/ 00083 static uint16_t rf_ack_wait_duration = RF_ACK_WAIT_DEFAULT_TIMEOUT; 00084 00085 static int8_t rf_sensitivity = RF_DEFAULT_SENSITIVITY; 00086 static rf_mode_t rf_mode = RF_MODE_NORMAL; 00087 static uint8_t radio_tx_power = 0x00; // Default to +4dBm 00088 static uint8_t rf_phy_channel = 12; 00089 static uint8_t rf_tuned = 1; 00090 static uint8_t rf_use_antenna_diversity = 0; 00091 static uint8_t tx_sequence = 0xff; 00092 static uint8_t need_ack = 0; 00093 static uint8_t rf_rx_mode = 0; 00094 static uint8_t rf_flags = 0; 00095 static uint8_t rf_rnd_rssi = 0; 00096 static int8_t rf_radio_driver_id = -1; 00097 static phy_device_driver_s device_driver; 00098 static uint8_t mac_tx_handle = 0; 00099 00100 /* Channel configurations for 2.4 and sub-GHz */ 00101 static const phy_rf_channel_configuration_s phy_24ghz = {2405000000U, 5000000U, 250000U, 16U, M_OQPSK}; 00102 static const phy_rf_channel_configuration_s phy_subghz = {868300000U, 2000000U, 250000U, 11U, M_OQPSK}; 00103 00104 static const phy_device_channel_page_s phy_channel_pages[] = { 00105 { CHANNEL_PAGE_0, &phy_24ghz}, 00106 { CHANNEL_PAGE_2, &phy_subghz}, 00107 { CHANNEL_PAGE_0, NULL} 00108 }; 00109 00110 /** 00111 * RF output power write 00112 * 00113 * \brief TX power has to be set before network start. 00114 * 00115 * \param power 00116 * AT86RF233 00117 * 0 = 4 dBm 00118 * 1 = 3.7 dBm 00119 * 2 = 3.4 dBm 00120 * 3 = 3 dBm 00121 * 4 = 2.5 dBm 00122 * 5 = 2 dBm 00123 * 6 = 1 dBm 00124 * 7 = 0 dBm 00125 * 8 = -1 dBm 00126 * 9 = -2 dBm 00127 * 10 = -3 dBm 00128 * 11 = -4 dBm 00129 * 12 = -6 dBm 00130 * 13 = -8 dBm 00131 * 14 = -12 dBm 00132 * 15 = -17 dBm 00133 * 00134 * AT86RF212B 00135 * See datasheet for TX power settings 00136 * 00137 * \return 0, Supported Value 00138 * \return -1, Not Supported Value 00139 */ 00140 static int8_t rf_tx_power_set(uint8_t power); 00141 static rf_trx_part_e rf_radio_type_read(void); 00142 static void rf_ack_wait_timer_start(uint16_t slots); 00143 static void rf_ack_wait_timer_stop(void); 00144 static void rf_handle_cca_ed_done(void); 00145 static void rf_handle_tx_end(void); 00146 static void rf_handle_rx_end(void); 00147 static void rf_on(void); 00148 static void rf_receive(void); 00149 static void rf_poll_trx_state_change(rf_trx_states_t trx_state); 00150 static void rf_init(void); 00151 static int8_t rf_device_register(const uint8_t *mac_addr); 00152 static void rf_device_unregister(void); 00153 static int8_t rf_start_cca(uint8_t *data_ptr, uint16_t data_length, uint8_t tx_handle, data_protocol_e data_protocol ); 00154 static void rf_cca_abort(void); 00155 static void rf_calibration_cb(void); 00156 static void rf_init_phy_mode(void); 00157 static void rf_ack_wait_timer_interrupt(void); 00158 static void rf_calibration_timer_interrupt(void); 00159 static void rf_calibration_timer_start(uint32_t slots); 00160 static void rf_cca_timer_interrupt(void); 00161 static void rf_cca_timer_start(uint32_t slots); 00162 static uint8_t rf_scale_lqi(int8_t rssi); 00163 00164 static int8_t rf_interface_state_control(phy_interface_state_e new_state, uint8_t rf_channel); 00165 static int8_t rf_extension(phy_extension_type_e extension_type,uint8_t *data_ptr); 00166 static int8_t rf_address_write(phy_address_type_e address_type,uint8_t *address_ptr); 00167 00168 static void rf_if_cca_timer_start(uint32_t slots); 00169 static void rf_if_enable_promiscuous_mode(void); 00170 static void rf_if_lock(void); 00171 static void rf_if_unlock(void); 00172 static uint8_t rf_if_read_rnd(void); 00173 static void rf_if_calibration_timer_start(uint32_t slots); 00174 static void rf_if_interrupt_handler(void); 00175 static void rf_if_ack_wait_timer_start(uint16_t slots); 00176 static void rf_if_ack_wait_timer_stop(void); 00177 static void rf_if_ack_pending_ctrl(uint8_t state); 00178 static void rf_if_calibration(void); 00179 static uint8_t rf_if_read_register(uint8_t addr); 00180 static void rf_if_set_bit(uint8_t addr, uint8_t bit, uint8_t bit_mask); 00181 static void rf_if_clear_bit(uint8_t addr, uint8_t bit); 00182 static void rf_if_write_register(uint8_t addr, uint8_t data); 00183 static void rf_if_reset_radio(void); 00184 static void rf_if_enable_ant_div(void); 00185 static void rf_if_disable_ant_div(void); 00186 static void rf_if_enable_slptr(void); 00187 static void rf_if_disable_slptr(void); 00188 static void rf_if_write_antenna_diversity_settings(void); 00189 static void rf_if_write_set_tx_power_register(uint8_t value); 00190 static void rf_if_write_rf_settings(void); 00191 static uint8_t rf_if_check_cca(void); 00192 static uint8_t rf_if_check_crc(void); 00193 static uint8_t rf_if_read_trx_state(void); 00194 static void rf_if_read_packet(uint8_t *ptr, uint8_t len); 00195 static void rf_if_write_short_addr_registers(uint8_t *short_address); 00196 static uint8_t rf_if_last_acked_pending(void); 00197 static void rf_if_write_pan_id_registers(uint8_t *pan_id); 00198 static void rf_if_write_ieee_addr_registers(uint8_t *address); 00199 static void rf_if_write_frame_buffer(uint8_t *ptr, uint8_t length); 00200 static void rf_if_change_trx_state(rf_trx_states_t trx_state); 00201 static void rf_if_enable_tx_end_interrupt(void); 00202 static void rf_if_enable_rx_end_interrupt(void); 00203 static void rf_if_enable_cca_ed_done_interrupt(void); 00204 static void rf_if_start_cca_process(void); 00205 static uint8_t rf_if_read_received_frame_length(void); 00206 static int8_t rf_if_read_rssi(void); 00207 static uint8_t rf_if_read_rx_status(void); 00208 static void rf_if_set_channel_register(uint8_t channel); 00209 static void rf_if_enable_promiscuous_mode(void); 00210 static void rf_if_disable_promiscuous_mode(void); 00211 static uint8_t rf_if_read_part_num(void); 00212 static void rf_if_enable_irq(void); 00213 static void rf_if_disable_irq(void); 00214 00215 #ifdef MBED_CONF_RTOS_PRESENT 00216 #include "mbed.h" 00217 #include "rtos.h" 00218 00219 static void rf_if_irq_task_process_irq(); 00220 00221 #define SIG_RADIO 1 00222 #define SIG_TIMER_ACK 2 00223 #define SIG_TIMER_CAL 4 00224 #define SIG_TIMER_CCA 8 00225 00226 #define SIG_TIMERS (SIG_TIMER_ACK|SIG_TIMER_CAL|SIG_TIMER_CCA) 00227 #define SIG_ALL (SIG_RADIO|SIG_TIMERS) 00228 #endif 00229 00230 // HW pins to RF chip 00231 #define SPI_SPEED 7500000 00232 00233 class UnlockedSPI : public SPI { 00234 public: 00235 UnlockedSPI(PinName mosi, PinName miso, PinName sclk) : 00236 SPI(mosi, miso, sclk) { } 00237 virtual void lock() { } 00238 virtual void unlock() { } 00239 }; 00240 00241 class RFBits { 00242 public: 00243 RFBits(PinName spi_mosi, PinName spi_miso, 00244 PinName spi_sclk, PinName spi_cs, 00245 PinName spi_rst, PinName spi_slp, PinName spi_irq); 00246 UnlockedSPI spi; 00247 DigitalOut CS; 00248 DigitalOut RST; 00249 DigitalOut SLP_TR; 00250 InterruptIn IRQ; 00251 Timeout ack_timer; 00252 Timeout cal_timer; 00253 Timeout cca_timer; 00254 #ifdef MBED_CONF_RTOS_PRESENT 00255 Thread irq_thread; 00256 Mutex mutex; 00257 void rf_if_irq_task(); 00258 #endif 00259 }; 00260 00261 RFBits::RFBits(PinName spi_mosi, PinName spi_miso, 00262 PinName spi_sclk, PinName spi_cs, 00263 PinName spi_rst, PinName spi_slp, PinName spi_irq) 00264 : spi(spi_mosi, spi_miso, spi_sclk), 00265 CS(spi_cs), 00266 RST(spi_rst), 00267 SLP_TR(spi_slp), 00268 IRQ(spi_irq) 00269 #ifdef MBED_CONF_RTOS_PRESENT 00270 ,irq_thread(osPriorityRealtime, 1024) 00271 #endif 00272 { 00273 #ifdef MBED_CONF_RTOS_PRESENT 00274 irq_thread.start(this, &RFBits::rf_if_irq_task); 00275 #endif 00276 } 00277 00278 static RFBits *rf; 00279 static uint8_t rf_part_num = 0; 00280 static uint8_t rf_rx_lqi; 00281 static int8_t rf_rx_rssi; 00282 static uint8_t rf_rx_status; 00283 /*TODO: RSSI Base value setting*/ 00284 static int8_t rf_rssi_base_val = -91; 00285 00286 static uint8_t rf_if_spi_exchange(uint8_t out); 00287 00288 static void rf_if_lock(void) 00289 { 00290 platform_enter_critical(); 00291 } 00292 00293 static void rf_if_unlock(void) 00294 { 00295 platform_exit_critical(); 00296 } 00297 00298 #ifdef MBED_CONF_RTOS_PRESENT 00299 static void rf_if_cca_timer_signal(void) 00300 { 00301 rf->irq_thread.signal_set(SIG_TIMER_CCA); 00302 } 00303 00304 static void rf_if_cal_timer_signal(void) 00305 { 00306 rf->irq_thread.signal_set(SIG_TIMER_CAL); 00307 } 00308 00309 static void rf_if_ack_timer_signal(void) 00310 { 00311 rf->irq_thread.signal_set(SIG_TIMER_ACK); 00312 } 00313 #endif 00314 00315 00316 /* Delay functions for RF Chip SPI access */ 00317 #ifdef __CC_ARM 00318 __asm static void delay_loop(uint32_t count) 00319 { 00320 1 00321 SUBS a1, a1, #1 00322 BCS %BT1 00323 BX lr 00324 } 00325 #elif defined (__ICCARM__) 00326 static void delay_loop(uint32_t count) 00327 { 00328 __asm volatile( 00329 "loop: \n" 00330 " SUBS %0, %0, #1 \n" 00331 " BCS.n loop\n" 00332 : "+r" (count) 00333 : 00334 : "cc" 00335 ); 00336 } 00337 #else // GCC 00338 static void delay_loop(uint32_t count) 00339 { 00340 __asm__ volatile ( 00341 "%=:\n\t" 00342 #if defined(__thumb__) && !defined(__thumb2__) 00343 "SUB %0, #1\n\t" 00344 #else 00345 "SUBS %0, %0, #1\n\t" 00346 #endif 00347 "BCS %=b\n\t" 00348 : "+l" (count) 00349 : 00350 : "cc" 00351 ); 00352 } 00353 #endif 00354 00355 static void delay_ns(uint32_t ns) 00356 { 00357 uint32_t cycles_per_us = SystemCoreClock / 1000000; 00358 // Cortex-M0 takes 4 cycles per loop (SUB=1, BCS=3) 00359 // Cortex-M3 and M4 takes 3 cycles per loop (SUB=1, BCS=2) 00360 // Cortex-M7 - who knows? 00361 // Cortex M3-M7 have "CYCCNT" - would be better than a software loop, but M0 doesn't 00362 // Assume 3 cycles per loop for now - will be 33% slow on M0. No biggie, 00363 // as original version of code was 300% slow on M4. 00364 // [Note that this very calculation, plus call overhead, will take multiple 00365 // cycles. Could well be 100ns on its own... So round down here, startup is 00366 // worth at least one loop iteration.] 00367 uint32_t count = (cycles_per_us * ns) / 3000; 00368 00369 delay_loop(count); 00370 } 00371 00372 // t1 = 180ns, SEL falling edge to MISO active [SPI setup assumed slow enough to not need manual delay] 00373 #define CS_SELECT() {rf->CS = 0; /* delay_ns(180); */} 00374 // t9 = 250ns, last clock to SEL rising edge, t8 = 250ns, SPI idle time between consecutive access 00375 #define CS_RELEASE() {delay_ns(250); rf->CS = 1; delay_ns(250);} 00376 00377 /* 00378 * \brief Function sets the TX power variable. 00379 * 00380 * \param power TX power setting 00381 * 00382 * \return 0 Success 00383 * \return -1 Fail 00384 */ 00385 MBED_UNUSED static int8_t rf_tx_power_set(uint8_t power) 00386 { 00387 int8_t ret_val = -1; 00388 00389 radio_tx_power = power; 00390 rf_if_lock(); 00391 rf_if_write_set_tx_power_register(radio_tx_power); 00392 rf_if_unlock(); 00393 ret_val = 0; 00394 00395 return ret_val; 00396 } 00397 00398 /* 00399 * \brief Read connected radio part. 00400 * 00401 * This function only return valid information when rf_init() is called 00402 * 00403 * \return 00404 */ 00405 static rf_trx_part_e rf_radio_type_read(void) 00406 { 00407 rf_trx_part_e ret_val = ATMEL_UNKNOW_DEV; 00408 00409 switch (rf_part_num) 00410 { 00411 case PART_AT86RF212: 00412 ret_val = ATMEL_AT86RF212; 00413 break; 00414 00415 case PART_AT86RF231: 00416 ret_val = ATMEL_AT86RF231; 00417 break; 00418 case PART_AT86RF233: 00419 ret_val = ATMEL_AT86RF231; 00420 break; 00421 default: 00422 break; 00423 } 00424 00425 return ret_val; 00426 } 00427 00428 00429 /* 00430 * \brief Function starts the ACK wait timeout. 00431 * 00432 * \param slots Given slots, resolution 50us 00433 * 00434 * \return none 00435 */ 00436 static void rf_if_ack_wait_timer_start(uint16_t slots) 00437 { 00438 #ifdef MBED_CONF_RTOS_PRESENT 00439 rf->ack_timer.attach(rf_if_ack_timer_signal, slots*50e-6); 00440 #else 00441 rf->ack_timer.attach(rf_ack_wait_timer_interrupt, slots*50e-6); 00442 #endif 00443 } 00444 00445 /* 00446 * \brief Function starts the calibration interval. 00447 * 00448 * \param slots Given slots, resolution 50us 00449 * 00450 * \return none 00451 */ 00452 static void rf_if_calibration_timer_start(uint32_t slots) 00453 { 00454 #ifdef MBED_CONF_RTOS_PRESENT 00455 rf->cal_timer.attach(rf_if_cal_timer_signal, slots*50e-6); 00456 #else 00457 rf->cal_timer.attach(rf_calibration_timer_interrupt, slots*50e-6); 00458 #endif 00459 } 00460 00461 /* 00462 * \brief Function starts the CCA interval. 00463 * 00464 * \param slots Given slots, resolution 50us 00465 * 00466 * \return none 00467 */ 00468 static void rf_if_cca_timer_start(uint32_t slots) 00469 { 00470 #ifdef MBED_CONF_RTOS_PRESENT 00471 rf->cca_timer.attach(rf_if_cca_timer_signal, slots*50e-6); 00472 #else 00473 rf->cca_timer.attach(rf_cca_timer_interrupt, slots*50e-6); 00474 #endif 00475 } 00476 00477 /* 00478 * \brief Function stops the ACK wait timeout. 00479 * 00480 * \param none 00481 * 00482 * \return none 00483 */ 00484 static void rf_if_ack_wait_timer_stop(void) 00485 { 00486 rf->ack_timer.detach(); 00487 } 00488 00489 /* 00490 * \brief Function reads data from the given RF SRAM address. 00491 * 00492 * \param ptr Read pointer 00493 * \param sram_address Read address in SRAM 00494 * \param len Length of the read 00495 * 00496 * \return none 00497 */ 00498 static void rf_if_read_payload(uint8_t *ptr, uint8_t sram_address, uint8_t len) 00499 { 00500 uint8_t i; 00501 00502 CS_SELECT(); 00503 rf_if_spi_exchange(0x20); 00504 rf_if_spi_exchange(sram_address); 00505 for(i=0; i<len; i++) 00506 *ptr++ = rf_if_spi_exchange(0); 00507 00508 /*Read LQI and RSSI in variable*/ 00509 rf_rx_lqi = rf_if_spi_exchange(0); 00510 rf_rx_rssi = rf_if_spi_exchange(0); 00511 rf_rx_status = rf_if_spi_exchange(0); 00512 CS_RELEASE(); 00513 } 00514 00515 /* 00516 * \brief Function sets bit(s) in given RF register. 00517 * 00518 * \param addr Address of the register to set 00519 * \param bit Bit(s) to set 00520 * \param bit_mask Masks the field inside the register 00521 * 00522 * \return none 00523 */ 00524 static void rf_if_set_bit(uint8_t addr, uint8_t bit, uint8_t bit_mask) 00525 { 00526 uint8_t reg = rf_if_read_register(addr); 00527 reg &= ~bit_mask; 00528 reg |= bit; 00529 rf_if_write_register(addr, reg); 00530 } 00531 00532 /* 00533 * \brief Function clears bit(s) in given RF register. 00534 * 00535 * \param addr Address of the register to clear 00536 * \param bit Bit(s) to clear 00537 * 00538 * \return none 00539 */ 00540 static void rf_if_clear_bit(uint8_t addr, uint8_t bit) 00541 { 00542 uint8_t reg = rf_if_read_register(addr); 00543 reg &= ~bit; 00544 rf_if_write_register(addr, reg); 00545 } 00546 00547 /* 00548 * \brief Function writes register in RF. 00549 * 00550 * \param addr Address on the RF 00551 * \param data Written data 00552 * 00553 * \return none 00554 */ 00555 static void rf_if_write_register(uint8_t addr, uint8_t data) 00556 { 00557 uint8_t cmd = 0xC0; 00558 CS_SELECT(); 00559 rf_if_spi_exchange(cmd | addr); 00560 rf_if_spi_exchange(data); 00561 CS_RELEASE(); 00562 } 00563 00564 /* 00565 * \brief Function reads RF register. 00566 * 00567 * \param addr Address on the RF 00568 * 00569 * \return Read data 00570 */ 00571 static uint8_t rf_if_read_register(uint8_t addr) 00572 { 00573 uint8_t cmd = 0x80; 00574 uint8_t data; 00575 CS_SELECT(); 00576 rf_if_spi_exchange(cmd | addr); 00577 data = rf_if_spi_exchange(0); 00578 CS_RELEASE(); 00579 return data; 00580 } 00581 00582 /* 00583 * \brief Function resets the RF. 00584 * 00585 * \param none 00586 * 00587 * \return none 00588 */ 00589 static void rf_if_reset_radio(void) 00590 { 00591 rf->spi.frequency(SPI_SPEED); 00592 rf->IRQ.rise(0); 00593 rf->RST = 1; 00594 wait(10e-4); 00595 rf->RST = 0; 00596 wait(10e-3); 00597 CS_RELEASE(); 00598 rf->SLP_TR = 0; 00599 wait(10e-3); 00600 rf->RST = 1; 00601 wait(10e-3); 00602 00603 rf->IRQ.rise(&rf_if_interrupt_handler); 00604 } 00605 00606 /* 00607 * \brief Function enables the promiscuous mode. 00608 * 00609 * \param none 00610 * 00611 * \return none 00612 */ 00613 static void rf_if_enable_promiscuous_mode(void) 00614 { 00615 /*Set AACK_PROM_MODE to enable the promiscuous mode*/ 00616 rf_if_set_bit(XAH_CTRL_1, AACK_PROM_MODE, AACK_PROM_MODE); 00617 } 00618 00619 /* 00620 * \brief Function enables the promiscuous mode. 00621 * 00622 * \param none 00623 * 00624 * \return none 00625 */ 00626 static void rf_if_disable_promiscuous_mode(void) 00627 { 00628 /*Set AACK_PROM_MODE to enable the promiscuous mode*/ 00629 rf_if_clear_bit(XAH_CTRL_1, AACK_PROM_MODE); 00630 } 00631 00632 /* 00633 * \brief Function enables the Antenna diversity usage. 00634 * 00635 * \param none 00636 * 00637 * \return none 00638 */ 00639 static void rf_if_enable_ant_div(void) 00640 { 00641 /*Set ANT_EXT_SW_EN to enable controlling of antenna diversity*/ 00642 rf_if_set_bit(ANT_DIV, ANT_EXT_SW_EN, ANT_EXT_SW_EN); 00643 } 00644 00645 /* 00646 * \brief Function disables the Antenna diversity usage. 00647 * 00648 * \param none 00649 * 00650 * \return none 00651 */ 00652 static void rf_if_disable_ant_div(void) 00653 { 00654 rf_if_clear_bit(ANT_DIV, ANT_EXT_SW_EN); 00655 } 00656 00657 /* 00658 * \brief Function sets the SLP TR pin. 00659 * 00660 * \param none 00661 * 00662 * \return none 00663 */ 00664 static void rf_if_enable_slptr(void) 00665 { 00666 rf->SLP_TR = 1; 00667 } 00668 00669 /* 00670 * \brief Function clears the SLP TR pin. 00671 * 00672 * \param none 00673 * 00674 * \return none 00675 */ 00676 static void rf_if_disable_slptr(void) 00677 { 00678 rf->SLP_TR = 0; 00679 } 00680 00681 /* 00682 * \brief Function writes the antenna diversity settings. 00683 * 00684 * \param none 00685 * 00686 * \return none 00687 */ 00688 static void rf_if_write_antenna_diversity_settings(void) 00689 { 00690 /*Recommended setting of PDT_THRES is 3 when antenna diversity is used*/ 00691 rf_if_set_bit(RX_CTRL, 0x03, 0x0f); 00692 rf_if_write_register(ANT_DIV, ANT_DIV_EN | ANT_EXT_SW_EN | ANT_CTRL_DEFAULT); 00693 } 00694 00695 /* 00696 * \brief Function writes the TX output power register. 00697 * 00698 * \param value Given register value 00699 * 00700 * \return none 00701 */ 00702 static void rf_if_write_set_tx_power_register(uint8_t value) 00703 { 00704 rf_if_write_register(PHY_TX_PWR, value); 00705 } 00706 00707 /* 00708 * \brief Function returns the RF part number. 00709 * 00710 * \param none 00711 * 00712 * \return part number 00713 */ 00714 static uint8_t rf_if_read_part_num(void) 00715 { 00716 return rf_if_read_register(PART_NUM); 00717 } 00718 00719 /* 00720 * \brief Function writes the RF settings and initialises SPI interface. 00721 * 00722 * \param none 00723 * 00724 * \return none 00725 */ 00726 static void rf_if_write_rf_settings(void) 00727 { 00728 /*Reset RF module*/ 00729 rf_if_reset_radio(); 00730 00731 rf_part_num = rf_if_read_part_num(); 00732 00733 rf_if_write_register(XAH_CTRL_0,0); 00734 rf_if_write_register(TRX_CTRL_1, 0x20); 00735 00736 /*CCA Mode - Carrier sense OR energy above threshold. Channel list is set separately*/ 00737 rf_if_write_register(PHY_CC_CCA, 0x05); 00738 00739 /*Read transceiver PART_NUM*/ 00740 rf_part_num = rf_if_read_register(PART_NUM); 00741 00742 /*Sub-GHz RF settings*/ 00743 if(rf_part_num == PART_AT86RF212) 00744 { 00745 /*GC_TX_OFFS mode-dependent setting - OQPSK*/ 00746 rf_if_write_register(RF_CTRL_0, 0x32); 00747 00748 if(rf_if_read_register(VERSION_NUM) == VERSION_AT86RF212B) 00749 { 00750 /*TX Output Power setting - 0 dBm North American Band*/ 00751 rf_if_write_register(PHY_TX_PWR, 0x03); 00752 } 00753 else 00754 { 00755 /*TX Output Power setting - 0 dBm North American Band*/ 00756 rf_if_write_register(PHY_TX_PWR, 0x24); 00757 } 00758 00759 /*PHY Mode: IEEE 802.15.4-2006/2011 - OQPSK-SIN-250*/ 00760 rf_if_write_register(TRX_CTRL_2, RF_PHY_MODE); 00761 /*Based on receiver Characteristics. See AT86RF212B Datasheet where RSSI BASE VALUE in range -97 - -100 dBm*/ 00762 rf_rssi_base_val = -98; 00763 } 00764 /*2.4GHz RF settings*/ 00765 else 00766 { 00767 /*Set RPC register*/ 00768 rf_if_write_register(TRX_RPC, 0xef); 00769 /*PHY Mode: IEEE 802.15.4 - Data Rate 250 kb/s*/ 00770 rf_if_write_register(TRX_CTRL_2, 0); 00771 rf_rssi_base_val = -91; 00772 } 00773 } 00774 00775 /* 00776 * \brief Function checks the channel availability 00777 * 00778 * \param none 00779 * 00780 * \return 1 Channel clear 00781 * \return 0 Channel not clear 00782 */ 00783 static uint8_t rf_if_check_cca(void) 00784 { 00785 uint8_t retval = 0; 00786 if(rf_if_read_register(TRX_STATUS) & CCA_STATUS) 00787 { 00788 retval = 1; 00789 } 00790 return retval; 00791 } 00792 00793 /* 00794 * \brief Function checks if the CRC is valid in received frame 00795 * 00796 * \param none 00797 * 00798 * \return 1 CRC ok 00799 * \return 0 CRC failed 00800 */ 00801 static uint8_t rf_if_check_crc(void) 00802 { 00803 uint8_t retval = 0; 00804 if(rf_if_read_register(PHY_RSSI) & CRC_VALID) 00805 { 00806 retval = 1; 00807 } 00808 return retval; 00809 } 00810 00811 /* 00812 * \brief Function returns the RF state 00813 * 00814 * \param none 00815 * 00816 * \return RF state 00817 */ 00818 static uint8_t rf_if_read_trx_state(void) 00819 { 00820 return rf_if_read_register(TRX_STATUS) & 0x1F; 00821 } 00822 00823 /* 00824 * \brief Function reads data from RF SRAM. 00825 * 00826 * \param ptr Read pointer 00827 * \param len Length of the read 00828 * 00829 * \return none 00830 */ 00831 static void rf_if_read_packet(uint8_t *ptr, uint8_t len) 00832 { 00833 if(rf_part_num == PART_AT86RF231 || rf_part_num == PART_AT86RF212) 00834 rf_if_read_payload(ptr, 0, len); 00835 else if(rf_part_num == PART_AT86RF233) 00836 rf_if_read_payload(ptr, 1, len); 00837 } 00838 00839 /* 00840 * \brief Function writes RF short address registers 00841 * 00842 * \param short_address Given short address 00843 * 00844 * \return none 00845 */ 00846 static void rf_if_write_short_addr_registers(uint8_t *short_address) 00847 { 00848 rf_if_write_register(SHORT_ADDR_1, *short_address++); 00849 rf_if_write_register(SHORT_ADDR_0, *short_address); 00850 } 00851 00852 /* 00853 * \brief Function sets the frame pending in ACK message 00854 * 00855 * \param state Given frame pending state 00856 * 00857 * \return none 00858 */ 00859 static void rf_if_ack_pending_ctrl(uint8_t state) 00860 { 00861 rf_if_lock(); 00862 if(state) 00863 { 00864 rf_if_set_bit(CSMA_SEED_1, (1 << AACK_SET_PD), (1 << AACK_SET_PD)); 00865 } 00866 else 00867 { 00868 rf_if_clear_bit(CSMA_SEED_1, (1 << AACK_SET_PD)); 00869 } 00870 rf_if_unlock(); 00871 } 00872 00873 /* 00874 * \brief Function returns the state of frame pending control 00875 * 00876 * \param none 00877 * 00878 * \return Frame pending state 00879 */ 00880 static uint8_t rf_if_last_acked_pending(void) 00881 { 00882 uint8_t last_acked_data_pending; 00883 00884 rf_if_lock(); 00885 if(rf_if_read_register(CSMA_SEED_1) & 0x20) 00886 last_acked_data_pending = 1; 00887 else 00888 last_acked_data_pending = 0; 00889 rf_if_unlock(); 00890 00891 return last_acked_data_pending; 00892 } 00893 00894 /* 00895 * \brief Function calibrates the RF part. 00896 * 00897 * \param none 00898 * 00899 * \return none 00900 */ 00901 static void rf_if_calibration(void) 00902 { 00903 rf_if_set_bit(FTN_CTRL, FTN_START, FTN_START); 00904 /*Wait while calibration is running*/ 00905 while(rf_if_read_register(FTN_CTRL) & FTN_START); 00906 } 00907 00908 /* 00909 * \brief Function writes RF PAN Id registers 00910 * 00911 * \param pan_id Given PAN Id 00912 * 00913 * \return none 00914 */ 00915 static void rf_if_write_pan_id_registers(uint8_t *pan_id) 00916 { 00917 rf_if_write_register(PAN_ID_1, *pan_id++); 00918 rf_if_write_register(PAN_ID_0, *pan_id); 00919 } 00920 00921 /* 00922 * \brief Function writes RF IEEE Address registers 00923 * 00924 * \param address Given IEEE Address 00925 * 00926 * \return none 00927 */ 00928 static void rf_if_write_ieee_addr_registers(uint8_t *address) 00929 { 00930 uint8_t i; 00931 uint8_t temp = IEEE_ADDR_0; 00932 00933 for(i=0; i<8; i++) 00934 rf_if_write_register(temp++, address[7-i]); 00935 } 00936 00937 /* 00938 * \brief Function writes data in RF frame buffer. 00939 * 00940 * \param ptr Pointer to data 00941 * \param length Pointer to length 00942 * 00943 * \return none 00944 */ 00945 static void rf_if_write_frame_buffer(uint8_t *ptr, uint8_t length) 00946 { 00947 uint8_t i; 00948 uint8_t cmd = 0x60; 00949 00950 CS_SELECT(); 00951 rf_if_spi_exchange(cmd); 00952 rf_if_spi_exchange(length + 2); 00953 for(i=0; i<length; i++) 00954 rf_if_spi_exchange(*ptr++); 00955 00956 CS_RELEASE(); 00957 } 00958 00959 /* 00960 * \brief Function returns 8-bit random value. 00961 * 00962 * \param none 00963 * 00964 * \return random value 00965 */ 00966 static uint8_t rf_if_read_rnd(void) 00967 { 00968 uint8_t temp; 00969 uint8_t tmp_rpc_val = 0; 00970 /*RPC must be disabled while reading the random number*/ 00971 if(rf_part_num == PART_AT86RF233) 00972 { 00973 tmp_rpc_val = rf_if_read_register(TRX_RPC); 00974 rf_if_write_register(TRX_RPC, 0xc1); 00975 } 00976 00977 wait(1e-3); 00978 temp = ((rf_if_read_register(PHY_RSSI)>>5) << 6); 00979 wait(1e-3); 00980 temp |= ((rf_if_read_register(PHY_RSSI)>>5) << 4); 00981 wait(1e-3); 00982 temp |= ((rf_if_read_register(PHY_RSSI)>>5) << 2); 00983 wait(1e-3); 00984 temp |= ((rf_if_read_register(PHY_RSSI)>>5)); 00985 wait(1e-3); 00986 if(rf_part_num == PART_AT86RF233) 00987 rf_if_write_register(TRX_RPC, tmp_rpc_val); 00988 return temp; 00989 } 00990 00991 /* 00992 * \brief Function changes the state of the RF. 00993 * 00994 * \param trx_state Given RF state 00995 * 00996 * \return none 00997 */ 00998 static void rf_if_change_trx_state(rf_trx_states_t trx_state) 00999 { 01000 rf_if_lock(); 01001 rf_if_write_register(TRX_STATE, trx_state); 01002 /*Wait while not in desired state*/ 01003 rf_poll_trx_state_change(trx_state); 01004 rf_if_unlock(); 01005 } 01006 01007 /* 01008 * \brief Function enables the TX END interrupt 01009 * 01010 * \param none 01011 * 01012 * \return none 01013 */ 01014 static void rf_if_enable_tx_end_interrupt(void) 01015 { 01016 rf_if_set_bit(IRQ_MASK, TRX_END, 0x08); 01017 } 01018 01019 /* 01020 * \brief Function enables the RX END interrupt 01021 * 01022 * \param none 01023 * 01024 * \return none 01025 */ 01026 static void rf_if_enable_rx_end_interrupt(void) 01027 { 01028 rf_if_set_bit(IRQ_MASK, TRX_END, 0x08); 01029 } 01030 01031 /* 01032 * \brief Function enables the CCA ED interrupt 01033 * 01034 * \param none 01035 * 01036 * \return none 01037 */ 01038 static void rf_if_enable_cca_ed_done_interrupt(void) 01039 { 01040 rf_if_set_bit(IRQ_MASK, CCA_ED_DONE, 0x10); 01041 } 01042 01043 /* 01044 * \brief Function starts the CCA process 01045 * 01046 * \param none 01047 * 01048 * \return none 01049 */ 01050 static void rf_if_start_cca_process(void) 01051 { 01052 rf_if_set_bit(PHY_CC_CCA, CCA_REQUEST, 0x80); 01053 } 01054 01055 /* 01056 * \brief Function returns the length of the received packet 01057 * 01058 * \param none 01059 * 01060 * \return packet length 01061 */ 01062 static uint8_t rf_if_read_received_frame_length(void) 01063 { 01064 uint8_t length; 01065 01066 CS_SELECT(); 01067 rf_if_spi_exchange(0x20); 01068 length = rf_if_spi_exchange(0); 01069 CS_RELEASE(); 01070 01071 return length; 01072 } 01073 01074 /* 01075 * \brief Function returns the RSSI of the received packet 01076 * 01077 * \param none 01078 * 01079 * \return packet RSSI 01080 */ 01081 static int8_t rf_if_read_rssi(void) 01082 { 01083 int16_t rssi_calc_tmp; 01084 if(rf_part_num == PART_AT86RF212) 01085 rssi_calc_tmp = rf_rx_rssi * 103; 01086 else 01087 rssi_calc_tmp = rf_rx_rssi * 100; 01088 rssi_calc_tmp /= 100; 01089 rssi_calc_tmp = (rf_rssi_base_val + rssi_calc_tmp); 01090 return (int8_t)rssi_calc_tmp; 01091 } 01092 01093 /* 01094 * \brief Function returns the RSSI of the received packet 01095 * 01096 * \param none 01097 * 01098 * \return packet RSSI 01099 */ 01100 MBED_UNUSED uint8_t rf_if_read_rx_status(void) 01101 { 01102 return rf_rx_status; 01103 } 01104 01105 /* 01106 * \brief Function sets the RF channel field 01107 * 01108 * \param Given channel 01109 * 01110 * \return none 01111 */ 01112 static void rf_if_set_channel_register(uint8_t channel) 01113 { 01114 rf_if_set_bit(PHY_CC_CCA, channel, 0x1f); 01115 } 01116 01117 /* 01118 * \brief Function enables RF irq pin interrupts in RF interface. 01119 * 01120 * \param none 01121 * 01122 * \return none 01123 */ 01124 static void rf_if_enable_irq(void) 01125 { 01126 rf->IRQ.enable_irq(); 01127 } 01128 01129 /* 01130 * \brief Function disables RF irq pin interrupts in RF interface. 01131 * 01132 * \param none 01133 * 01134 * \return none 01135 */ 01136 static void rf_if_disable_irq(void) 01137 { 01138 rf->IRQ.disable_irq(); 01139 } 01140 01141 #ifdef MBED_CONF_RTOS_PRESENT 01142 static void rf_if_interrupt_handler(void) 01143 { 01144 rf->irq_thread.signal_set(SIG_RADIO); 01145 } 01146 01147 // Started during construction of rf, so variable 01148 // rf isn't set at the start. Uses 'this' instead. 01149 void RFBits::rf_if_irq_task(void) 01150 { 01151 for (;;) { 01152 osEvent event = irq_thread.signal_wait(0); 01153 if (event.status != osEventSignal) { 01154 continue; 01155 } 01156 rf_if_lock(); 01157 if (event.value.signals & SIG_RADIO) { 01158 rf_if_irq_task_process_irq(); 01159 } 01160 if (event.value.signals & SIG_TIMER_ACK) { 01161 rf_ack_wait_timer_interrupt(); 01162 } 01163 if (event.value.signals & SIG_TIMER_CCA) { 01164 rf_cca_timer_interrupt(); 01165 } 01166 if (event.value.signals & SIG_TIMER_CAL) { 01167 rf_calibration_timer_interrupt(); 01168 } 01169 rf_if_unlock(); 01170 } 01171 } 01172 01173 static void rf_if_irq_task_process_irq(void) 01174 #else 01175 /* 01176 * \brief Function is a RF interrupt vector. End of frame in RX and TX are handled here as well as CCA process interrupt. 01177 * 01178 * \param none 01179 * 01180 * \return none 01181 */ 01182 static void rf_if_interrupt_handler(void) 01183 #endif 01184 { 01185 uint8_t irq_status; 01186 01187 /*Read interrupt flag*/ 01188 irq_status = rf_if_read_register(IRQ_STATUS); 01189 01190 /*Disable interrupt on RF*/ 01191 rf_if_clear_bit(IRQ_MASK, irq_status); 01192 /*RX start interrupt*/ 01193 if(irq_status & RX_START) 01194 { 01195 } 01196 /*Address matching interrupt*/ 01197 if(irq_status & AMI) 01198 { 01199 } 01200 if(irq_status & TRX_UR) 01201 { 01202 } 01203 /*Frame end interrupt (RX and TX)*/ 01204 if(irq_status & TRX_END) 01205 { 01206 /*TX done interrupt*/ 01207 if(rf_if_read_trx_state() == PLL_ON || rf_if_read_trx_state() == TX_ARET_ON) 01208 { 01209 rf_handle_tx_end(); 01210 } 01211 /*Frame received interrupt*/ 01212 else 01213 { 01214 rf_handle_rx_end(); 01215 } 01216 } 01217 if(irq_status & CCA_ED_DONE) 01218 { 01219 rf_handle_cca_ed_done(); 01220 } 01221 } 01222 01223 /* 01224 * \brief Function writes/read data in SPI interface 01225 * 01226 * \param out Output data 01227 * 01228 * \return Input data 01229 */ 01230 static uint8_t rf_if_spi_exchange(uint8_t out) 01231 { 01232 uint8_t v; 01233 v = rf->spi.write(out); 01234 // t9 = t5 = 250ns, delay between LSB of last byte to next MSB or delay between LSB & SEL rising 01235 // [SPI setup assumed slow enough to not need manual delay] 01236 // delay_ns(250); 01237 return v; 01238 } 01239 01240 /* 01241 * \brief Function sets given RF flag on. 01242 * 01243 * \param x Given RF flag 01244 * 01245 * \return none 01246 */ 01247 static void rf_flags_set(uint8_t x) 01248 { 01249 rf_flags |= x; 01250 } 01251 01252 /* 01253 * \brief Function clears given RF flag on. 01254 * 01255 * \param x Given RF flag 01256 * 01257 * \return none 01258 */ 01259 static void rf_flags_clear(uint8_t x) 01260 { 01261 rf_flags &= ~x; 01262 } 01263 01264 /* 01265 * \brief Function checks if given RF flag is on. 01266 * 01267 * \param x Given RF flag 01268 * 01269 * \return states of the given flags 01270 */ 01271 static uint8_t rf_flags_check(uint8_t x) 01272 { 01273 return (rf_flags & x); 01274 } 01275 01276 /* 01277 * \brief Function clears all RF flags. 01278 * 01279 * \param none 01280 * 01281 * \return none 01282 */ 01283 static void rf_flags_reset(void) 01284 { 01285 rf_flags = 0; 01286 } 01287 01288 /* 01289 * \brief Function initialises and registers the RF driver. 01290 * 01291 * \param none 01292 * 01293 * \return rf_radio_driver_id Driver ID given by NET library 01294 */ 01295 static int8_t rf_device_register(const uint8_t *mac_addr) 01296 { 01297 rf_trx_part_e radio_type; 01298 01299 rf_init(); 01300 01301 radio_type = rf_radio_type_read(); 01302 if(radio_type != ATMEL_UNKNOW_DEV) 01303 { 01304 /*Set pointer to MAC address*/ 01305 device_driver.PHY_MAC = (uint8_t *)mac_addr; 01306 device_driver.driver_description = (char*)"ATMEL_MAC"; 01307 //Create setup Used Radio chips 01308 if(radio_type == ATMEL_AT86RF212) 01309 { 01310 device_driver.link_type = PHY_LINK_15_4_SUBGHZ_TYPE; 01311 } 01312 else 01313 { 01314 device_driver.link_type = PHY_LINK_15_4_2_4GHZ_TYPE; 01315 } 01316 device_driver.phy_channel_pages = phy_channel_pages; 01317 /*Maximum size of payload is 127*/ 01318 device_driver.phy_MTU = 127; 01319 /*No header in PHY*/ 01320 device_driver.phy_header_length = 0; 01321 /*No tail in PHY*/ 01322 device_driver.phy_tail_length = 0; 01323 /*Set address write function*/ 01324 device_driver.address_write = &rf_address_write; 01325 /*Set RF extension function*/ 01326 device_driver.extension = &rf_extension; 01327 /*Set RF state control function*/ 01328 device_driver.state_control = &rf_interface_state_control; 01329 /*Set transmit function*/ 01330 device_driver.tx = &rf_start_cca; 01331 /*NULLIFY rx and tx_done callbacks*/ 01332 device_driver.phy_rx_cb = NULL; 01333 device_driver.phy_tx_done_cb = NULL; 01334 /*Register device driver*/ 01335 rf_radio_driver_id = arm_net_phy_register(&device_driver); 01336 } 01337 return rf_radio_driver_id; 01338 } 01339 01340 /* 01341 * \brief Function unregisters the RF driver. 01342 * 01343 * \param none 01344 * 01345 * \return none 01346 */ 01347 static void rf_device_unregister() 01348 { 01349 if (rf_radio_driver_id >= 0) { 01350 arm_net_phy_unregister(rf_radio_driver_id); 01351 rf_radio_driver_id = -1; 01352 } 01353 } 01354 01355 /* 01356 * \brief Function is a call back for ACK wait timeout. 01357 * 01358 * \param none 01359 * 01360 * \return none 01361 */ 01362 static void rf_ack_wait_timer_interrupt(void) 01363 { 01364 rf_if_lock(); 01365 /*Force PLL state*/ 01366 rf_if_change_trx_state(FORCE_PLL_ON); 01367 rf_poll_trx_state_change(PLL_ON); 01368 /*Start receiver in RX_AACK_ON state*/ 01369 rf_rx_mode = 0; 01370 rf_flags_clear(RFF_RX); 01371 rf_receive(); 01372 rf_if_unlock(); 01373 } 01374 01375 /* 01376 * \brief Function is a call back for calibration interval timer. 01377 * 01378 * \param none 01379 * 01380 * \return none 01381 */ 01382 static void rf_calibration_timer_interrupt(void) 01383 { 01384 /*Calibrate RF*/ 01385 rf_calibration_cb(); 01386 /*Start new calibration timeout*/ 01387 rf_calibration_timer_start(RF_CALIBRATION_INTERVAL); 01388 } 01389 01390 /* 01391 * \brief Function is a call back for cca interval timer. 01392 * 01393 * \param none 01394 * 01395 * \return none 01396 */ 01397 static void rf_cca_timer_interrupt(void) 01398 { 01399 /*Start CCA process*/ 01400 if(rf_if_read_trx_state() == BUSY_RX_AACK) 01401 { 01402 if(device_driver.phy_tx_done_cb){ 01403 device_driver.phy_tx_done_cb(rf_radio_driver_id, mac_tx_handle, PHY_LINK_CCA_FAIL, 1, 1); 01404 } 01405 } 01406 else 01407 { 01408 /*Set radio in RX state to read channel*/ 01409 rf_receive(); 01410 rf_if_enable_cca_ed_done_interrupt(); 01411 rf_if_start_cca_process(); 01412 } 01413 } 01414 01415 /* 01416 * \brief Function starts the ACK wait timeout. 01417 * 01418 * \param slots Given slots, resolution 50us 01419 * 01420 * \return none 01421 */ 01422 static void rf_ack_wait_timer_start(uint16_t slots) 01423 { 01424 rf_if_ack_wait_timer_start(slots); 01425 } 01426 01427 /* 01428 * \brief Function starts the calibration interval. 01429 * 01430 * \param slots Given slots, resolution 50us 01431 * 01432 * \return none 01433 */ 01434 static void rf_calibration_timer_start(uint32_t slots) 01435 { 01436 rf_if_calibration_timer_start(slots); 01437 } 01438 01439 /* 01440 * \brief Function starts the CCA timout. 01441 * 01442 * \param slots Given slots, resolution 50us 01443 * 01444 * \return none 01445 */ 01446 static void rf_cca_timer_start(uint32_t slots) 01447 { 01448 rf_if_cca_timer_start(slots); 01449 } 01450 01451 /* 01452 * \brief Function stops the ACK wait timeout. 01453 * 01454 * \param none 01455 * 01456 * \return none 01457 */ 01458 static void rf_ack_wait_timer_stop(void) 01459 { 01460 rf_if_ack_wait_timer_stop(); 01461 } 01462 01463 /* 01464 * \brief Function writes various RF settings in startup. 01465 * 01466 * \param none 01467 * 01468 * \return none 01469 */ 01470 static void rf_write_settings(void) 01471 { 01472 rf_if_lock(); 01473 rf_if_write_rf_settings(); 01474 /*Set output power*/ 01475 rf_if_write_set_tx_power_register(radio_tx_power); 01476 /*Initialise Antenna Diversity*/ 01477 if(rf_use_antenna_diversity) 01478 rf_if_write_antenna_diversity_settings(); 01479 rf_if_unlock(); 01480 } 01481 01482 /* 01483 * \brief Function writes 16-bit address in RF address filter. 01484 * 01485 * \param short_address Given short address 01486 * 01487 * \return none 01488 */ 01489 static void rf_set_short_adr(uint8_t * short_address) 01490 { 01491 rf_if_lock(); 01492 /*Wake up RF if sleeping*/ 01493 if(rf_flags_check(RFF_ON) == 0) 01494 { 01495 rf_if_disable_slptr(); 01496 rf_poll_trx_state_change(TRX_OFF); 01497 } 01498 /*Write address filter registers*/ 01499 rf_if_write_short_addr_registers(short_address); 01500 /*RF back to sleep*/ 01501 if(rf_flags_check(RFF_ON) == 0) 01502 { 01503 rf_if_enable_slptr(); 01504 } 01505 rf_if_unlock(); 01506 } 01507 01508 /* 01509 * \brief Function writes PAN Id in RF PAN Id filter. 01510 * 01511 * \param pan_id Given PAN Id 01512 * 01513 * \return none 01514 */ 01515 static void rf_set_pan_id(uint8_t *pan_id) 01516 { 01517 rf_if_lock(); 01518 /*Wake up RF if sleeping*/ 01519 if(rf_flags_check(RFF_ON) == 0) 01520 { 01521 rf_if_disable_slptr(); 01522 rf_poll_trx_state_change(TRX_OFF); 01523 } 01524 /*Write address filter registers*/ 01525 rf_if_write_pan_id_registers(pan_id); 01526 /*RF back to sleep*/ 01527 if(rf_flags_check(RFF_ON) == 0) 01528 { 01529 rf_if_enable_slptr(); 01530 } 01531 rf_if_unlock(); 01532 } 01533 01534 /* 01535 * \brief Function writes 64-bit address in RF address filter. 01536 * 01537 * \param address Given 64-bit address 01538 * 01539 * \return none 01540 */ 01541 static void rf_set_address(uint8_t *address) 01542 { 01543 rf_if_lock(); 01544 /*Wake up RF if sleeping*/ 01545 if(rf_flags_check(RFF_ON) == 0) 01546 { 01547 rf_if_disable_slptr(); 01548 rf_poll_trx_state_change(TRX_OFF); 01549 } 01550 /*Write address filter registers*/ 01551 rf_if_write_ieee_addr_registers(address); 01552 /*RF back to sleep*/ 01553 if(rf_flags_check(RFF_ON) == 0) 01554 { 01555 rf_if_enable_slptr(); 01556 } 01557 rf_if_unlock(); 01558 } 01559 01560 /* 01561 * \brief Function sets the RF channel. 01562 * 01563 * \param ch New channel 01564 * 01565 * \return none 01566 */ 01567 static void rf_channel_set(uint8_t ch) 01568 { 01569 rf_if_lock(); 01570 rf_phy_channel = ch; 01571 if(ch < 0x1f) 01572 rf_if_set_channel_register(ch); 01573 rf_if_unlock(); 01574 } 01575 01576 01577 /* 01578 * \brief Function initialises the radio driver and resets the radio. 01579 * 01580 * \param none 01581 * 01582 * \return none 01583 */ 01584 static void rf_init(void) 01585 { 01586 /*Reset RF module*/ 01587 rf_if_reset_radio(); 01588 01589 rf_if_lock(); 01590 01591 /*Write RF settings*/ 01592 rf_write_settings(); 01593 /*Initialise PHY mode*/ 01594 rf_init_phy_mode(); 01595 /*Clear RF flags*/ 01596 rf_flags_reset(); 01597 /*Set RF in TRX OFF state*/ 01598 rf_if_change_trx_state(TRX_OFF); 01599 /*Set RF in PLL_ON state*/ 01600 rf_if_change_trx_state(PLL_ON); 01601 /*Start receiver*/ 01602 rf_receive(); 01603 /*Read random variable. This will be used when seeding pseudo-random generator*/ 01604 rf_rnd_rssi = rf_if_read_rnd(); 01605 /*Start RF calibration timer*/ 01606 rf_calibration_timer_start(RF_CALIBRATION_INTERVAL); 01607 01608 rf_if_unlock(); 01609 } 01610 01611 /** 01612 * \brief Function gets called when MAC is setting radio off. 01613 * 01614 * \param none 01615 * 01616 * \return none 01617 */ 01618 static void rf_off(void) 01619 { 01620 if(rf_flags_check(RFF_ON)) 01621 { 01622 rf_if_lock(); 01623 rf_cca_abort(); 01624 uint16_t while_counter = 0; 01625 /*Wait while receiving*/ 01626 while(rf_if_read_trx_state() == BUSY_RX_AACK) 01627 { 01628 while_counter++; 01629 if(while_counter == 0xffff) 01630 break; 01631 } 01632 /*RF state change: RX_AACK_ON->PLL_ON->TRX_OFF->SLEEP*/ 01633 if(rf_if_read_trx_state() == RX_AACK_ON) 01634 { 01635 rf_if_change_trx_state(PLL_ON); 01636 } 01637 rf_if_change_trx_state(TRX_OFF); 01638 rf_if_enable_slptr(); 01639 01640 /*Disable Antenna Diversity*/ 01641 if(rf_use_antenna_diversity) 01642 rf_if_disable_ant_div(); 01643 rf_if_unlock(); 01644 } 01645 01646 /*Clears all flags*/ 01647 rf_flags_reset(); 01648 } 01649 01650 /* 01651 * \brief Function polls the RF state until it has changed to desired state. 01652 * 01653 * \param trx_state RF state 01654 * 01655 * \return none 01656 */ 01657 static void rf_poll_trx_state_change(rf_trx_states_t trx_state) 01658 { 01659 uint16_t while_counter = 0; 01660 rf_if_lock(); 01661 01662 if(trx_state != RF_TX_START) 01663 { 01664 if(trx_state == FORCE_PLL_ON) 01665 trx_state = PLL_ON; 01666 else if(trx_state == FORCE_TRX_OFF) 01667 trx_state = TRX_OFF; 01668 01669 while(rf_if_read_trx_state() != trx_state) 01670 { 01671 while_counter++; 01672 if(while_counter == 0x1ff) 01673 break; 01674 } 01675 } 01676 rf_if_unlock(); 01677 } 01678 01679 /* 01680 * \brief Function starts the CCA process before starting data transmission and copies the data to RF TX FIFO. 01681 * 01682 * \param data_ptr Pointer to TX data 01683 * \param data_length Length of the TX data 01684 * \param tx_handle Handle to transmission 01685 * \return 0 Success 01686 * \return -1 Busy 01687 */ 01688 static int8_t rf_start_cca(uint8_t *data_ptr, uint16_t data_length, uint8_t tx_handle, data_protocol_e data_protocol ) 01689 { 01690 (void)data_protocol; 01691 /*Check if transmitter is busy*/ 01692 if(rf_if_read_trx_state() == BUSY_RX_AACK) 01693 { 01694 /*Return busy*/ 01695 return -1; 01696 } 01697 else 01698 { 01699 rf_if_lock(); 01700 /*Check if transmitted data needs to be acked*/ 01701 if(*data_ptr & 0x20) 01702 need_ack = 1; 01703 else 01704 need_ack = 0; 01705 /*Store the sequence number for ACK handling*/ 01706 tx_sequence = *(data_ptr + 2); 01707 01708 /*Write TX FIFO*/ 01709 rf_if_write_frame_buffer(data_ptr, (uint8_t)data_length); 01710 rf_flags_set(RFF_CCA); 01711 /*Start CCA timeout*/ 01712 rf_cca_timer_start(RF_CCA_BASE_BACKOFF + randLIB_get_random_in_range(0, RF_CCA_RANDOM_BACKOFF)); 01713 /*Store TX handle*/ 01714 mac_tx_handle = tx_handle; 01715 rf_if_unlock(); 01716 } 01717 01718 /*Return success*/ 01719 return 0; 01720 } 01721 01722 /* 01723 * \brief Function aborts CCA process. 01724 * 01725 * \param none 01726 * 01727 * \return none 01728 */ 01729 static void rf_cca_abort(void) 01730 { 01731 /*Clear RFF_CCA RF flag*/ 01732 rf_flags_clear(RFF_CCA); 01733 } 01734 01735 /* 01736 * \brief Function starts the transmission of the frame. 01737 * 01738 * \param none 01739 * 01740 * \return none 01741 */ 01742 static void rf_start_tx(void) 01743 { 01744 /*Only start transmitting from RX state*/ 01745 uint8_t trx_state = rf_if_read_trx_state(); 01746 if(trx_state != RX_AACK_ON) 01747 { 01748 if(device_driver.phy_tx_done_cb){ 01749 device_driver.phy_tx_done_cb(rf_radio_driver_id, mac_tx_handle, PHY_LINK_CCA_FAIL, 1, 1); 01750 } 01751 } 01752 else 01753 { 01754 /*RF state change: ->PLL_ON->RF_TX_START*/ 01755 rf_if_change_trx_state(FORCE_PLL_ON); 01756 rf_flags_clear(RFF_RX); 01757 rf_if_enable_tx_end_interrupt(); 01758 rf_flags_set(RFF_TX); 01759 rf_if_change_trx_state(RF_TX_START); 01760 } 01761 } 01762 01763 /* 01764 * \brief Function sets the RF in RX state. 01765 * 01766 * \param none 01767 * 01768 * \return none 01769 */ 01770 static void rf_receive(void) 01771 { 01772 uint16_t while_counter = 0; 01773 if(rf_flags_check(RFF_ON) == 0) 01774 { 01775 rf_on(); 01776 } 01777 /*If not yet in RX state set it*/ 01778 if(rf_flags_check(RFF_RX) == 0) 01779 { 01780 rf_if_lock(); 01781 /*Wait while receiving data*/ 01782 while(rf_if_read_trx_state() == BUSY_RX_AACK) 01783 { 01784 while_counter++; 01785 if(while_counter == 0xffff) 01786 { 01787 break; 01788 } 01789 } 01790 01791 rf_if_change_trx_state(PLL_ON); 01792 01793 if((rf_mode == RF_MODE_SNIFFER) || (rf_mode == RF_MODE_ED)) 01794 { 01795 rf_if_change_trx_state(RX_ON); 01796 } 01797 else 01798 { 01799 /*ACK is always received in promiscuous mode to bypass address filters*/ 01800 if(rf_rx_mode) 01801 { 01802 rf_rx_mode = 0; 01803 rf_if_enable_promiscuous_mode(); 01804 } 01805 else 01806 { 01807 rf_if_disable_promiscuous_mode(); 01808 } 01809 rf_if_change_trx_state(RX_AACK_ON); 01810 } 01811 /*If calibration timer was unable to calibrate the RF, run calibration now*/ 01812 if(!rf_tuned) 01813 { 01814 /*Start calibration. This can be done in states TRX_OFF, PLL_ON or in any receive state*/ 01815 rf_if_calibration(); 01816 /*RF is tuned now*/ 01817 rf_tuned = 1; 01818 } 01819 01820 rf_channel_set(rf_phy_channel); 01821 rf_flags_set(RFF_RX); 01822 // Don't receive packets when ED mode enabled 01823 if (rf_mode != RF_MODE_ED) 01824 { 01825 rf_if_enable_rx_end_interrupt(); 01826 } 01827 rf_if_unlock(); 01828 } 01829 /*Stop the running CCA process*/ 01830 if(rf_flags_check(RFF_CCA)) 01831 rf_cca_abort(); 01832 } 01833 01834 /* 01835 * \brief Function calibrates the radio. 01836 * 01837 * \param none 01838 * 01839 * \return none 01840 */ 01841 static void rf_calibration_cb(void) 01842 { 01843 /*clear tuned flag to start tuning in rf_receive*/ 01844 rf_tuned = 0; 01845 /*If RF is in default receive state, start calibration*/ 01846 if(rf_if_read_trx_state() == RX_AACK_ON) 01847 { 01848 rf_if_lock(); 01849 /*Set RF in PLL_ON state*/ 01850 rf_if_change_trx_state(PLL_ON); 01851 /*Set RF in TRX_OFF state to start PLL tuning*/ 01852 rf_if_change_trx_state(TRX_OFF); 01853 /*Set RF in RX_ON state to calibrate*/ 01854 rf_if_change_trx_state(RX_ON); 01855 /*Calibrate FTN*/ 01856 rf_if_calibration(); 01857 /*RF is tuned now*/ 01858 rf_tuned = 1; 01859 /*Back to default receive state*/ 01860 rf_flags_clear(RFF_RX); 01861 rf_receive(); 01862 rf_if_unlock(); 01863 } 01864 } 01865 01866 /* 01867 * \brief Function sets RF_ON flag when radio is powered. 01868 * 01869 * \param none 01870 * 01871 * \return none 01872 */ 01873 static void rf_on(void) 01874 { 01875 /*Set RFF_ON flag*/ 01876 if(rf_flags_check(RFF_ON) == 0) 01877 { 01878 rf_if_lock(); 01879 rf_flags_set(RFF_ON); 01880 /*Enable Antenna diversity*/ 01881 if(rf_use_antenna_diversity) 01882 /*Set ANT_EXT_SW_EN to enable controlling of antenna diversity*/ 01883 rf_if_enable_ant_div(); 01884 01885 /*Wake up from sleep state*/ 01886 rf_if_disable_slptr(); 01887 rf_poll_trx_state_change(TRX_OFF); 01888 rf_if_unlock(); 01889 } 01890 } 01891 01892 /* 01893 * \brief Function handles the received ACK frame. 01894 * 01895 * \param seq_number Sequence number of received ACK 01896 * \param data_pending Pending bit state in received ACK 01897 * 01898 * \return none 01899 */ 01900 static void rf_handle_ack(uint8_t seq_number, uint8_t data_pending) 01901 { 01902 phy_link_tx_status_e phy_status; 01903 rf_if_lock(); 01904 /*Received ACK sequence must be equal with transmitted packet sequence*/ 01905 if(tx_sequence == seq_number) 01906 { 01907 rf_ack_wait_timer_stop(); 01908 /*When data pending bit in ACK frame is set, inform NET library*/ 01909 if(data_pending) 01910 phy_status = PHY_LINK_TX_DONE_PENDING; 01911 else 01912 phy_status = PHY_LINK_TX_DONE; 01913 /*Call PHY TX Done API*/ 01914 if(device_driver.phy_tx_done_cb){ 01915 device_driver.phy_tx_done_cb(rf_radio_driver_id, mac_tx_handle,phy_status, 1, 1); 01916 } 01917 } 01918 rf_if_unlock(); 01919 } 01920 01921 /* 01922 * \brief Function is a call back for RX end interrupt. 01923 * 01924 * \param none 01925 * 01926 * \return none 01927 */ 01928 static void rf_handle_rx_end(void) 01929 { 01930 uint8_t rf_lqi = 0; 01931 int8_t rf_rssi = 0; 01932 01933 /*Start receiver*/ 01934 rf_flags_clear(RFF_RX); 01935 rf_receive(); 01936 01937 /*Frame received interrupt*/ 01938 if(rf_flags_check(RFF_RX)) 01939 { 01940 /*Check CRC_valid bit*/ 01941 if(rf_if_check_crc()) 01942 { 01943 uint8_t *rf_rx_ptr; 01944 uint8_t receiving_ack = 0; 01945 /*Read length*/ 01946 uint8_t len = rf_if_read_received_frame_length(); 01947 01948 rf_rx_ptr = rf_buffer; 01949 /*ACK frame*/ 01950 if(len == 5) 01951 { 01952 /*Read ACK in static ACK buffer*/ 01953 receiving_ack = 1; 01954 } 01955 /*Check the length is valid*/ 01956 if(len > 1 && len < RF_BUFFER_SIZE) 01957 { 01958 /*Read received packet*/ 01959 rf_if_read_packet(rf_rx_ptr, len); 01960 01961 if(!receiving_ack) 01962 { 01963 rf_rssi = rf_if_read_rssi(); 01964 /*Scale LQI using received RSSI*/ 01965 rf_lqi = rf_scale_lqi(rf_rssi); 01966 } 01967 if(rf_mode == RF_MODE_SNIFFER) 01968 { 01969 if( device_driver.phy_rx_cb ){ 01970 device_driver.phy_rx_cb(rf_buffer,len - 2, rf_lqi, rf_rssi, rf_radio_driver_id); 01971 } 01972 } 01973 else 01974 { 01975 /*Handle received ACK*/ 01976 if(receiving_ack && ((rf_buffer[0] & 0x07) == 0x02)) 01977 { 01978 uint8_t pending = 0; 01979 /*Check if data is pending*/ 01980 if ((rf_buffer[0] & 0x10)) 01981 { 01982 pending=1; 01983 } 01984 /*Send sequence number in ACK handler*/ 01985 rf_handle_ack(rf_buffer[2], pending); 01986 } 01987 else 01988 { 01989 if( device_driver.phy_rx_cb ){ 01990 device_driver.phy_rx_cb(rf_buffer,len - 2, rf_lqi, rf_rssi, rf_radio_driver_id); 01991 } 01992 } 01993 } 01994 } 01995 } 01996 } 01997 } 01998 01999 /* 02000 * \brief Function is called when MAC is shutting down the radio. 02001 * 02002 * \param none 02003 * 02004 * \return none 02005 */ 02006 static void rf_shutdown(void) 02007 { 02008 /*Call RF OFF*/ 02009 rf_off(); 02010 } 02011 02012 /* 02013 * \brief Function is a call back for TX end interrupt. 02014 * 02015 * \param none 02016 * 02017 * \return none 02018 */ 02019 static void rf_handle_tx_end(void) 02020 { 02021 phy_link_tx_status_e phy_status = PHY_LINK_TX_SUCCESS; 02022 02023 rf_rx_mode = 0; 02024 /*If ACK is needed for this transmission*/ 02025 if(need_ack && rf_flags_check(RFF_TX)) 02026 { 02027 rf_ack_wait_timer_start(rf_ack_wait_duration); 02028 rf_rx_mode = 1; 02029 } 02030 rf_flags_clear(RFF_RX); 02031 /*Start receiver*/ 02032 rf_receive(); 02033 02034 /*Call PHY TX Done API*/ 02035 if(device_driver.phy_tx_done_cb){ 02036 device_driver.phy_tx_done_cb(rf_radio_driver_id, mac_tx_handle, phy_status, 1, 1); 02037 } 02038 } 02039 02040 /* 02041 * \brief Function is a call back for CCA ED done interrupt. 02042 * 02043 * \param none 02044 * 02045 * \return none 02046 */ 02047 static void rf_handle_cca_ed_done(void) 02048 { 02049 rf_flags_clear(RFF_CCA); 02050 /*Check the result of CCA process*/ 02051 if(rf_if_check_cca()) 02052 { 02053 rf_start_tx(); 02054 } 02055 else 02056 { 02057 /*Send CCA fail notification*/ 02058 if(device_driver.phy_tx_done_cb){ 02059 device_driver.phy_tx_done_cb(rf_radio_driver_id, mac_tx_handle, PHY_LINK_CCA_FAIL, 1, 1); 02060 } 02061 } 02062 } 02063 02064 /* 02065 * \brief Function returns the TX power variable. 02066 * 02067 * \param none 02068 * 02069 * \return radio_tx_power TX power variable 02070 */ 02071 MBED_UNUSED static uint8_t rf_tx_power_get(void) 02072 { 02073 return radio_tx_power; 02074 } 02075 02076 /* 02077 * \brief Function enables the usage of Antenna diversity. 02078 * 02079 * \param none 02080 * 02081 * \return 0 Success 02082 */ 02083 MBED_UNUSED static int8_t rf_enable_antenna_diversity(void) 02084 { 02085 int8_t ret_val = 0; 02086 rf_use_antenna_diversity = 1; 02087 return ret_val; 02088 } 02089 02090 /* 02091 * \brief Function gives the control of RF states to MAC. 02092 * 02093 * \param new_state RF state 02094 * \param rf_channel RF channel 02095 * 02096 * \return 0 Success 02097 */ 02098 static int8_t rf_interface_state_control(phy_interface_state_e new_state, uint8_t rf_channel) 02099 { 02100 int8_t ret_val = 0; 02101 switch (new_state) 02102 { 02103 /*Reset PHY driver and set to idle*/ 02104 case PHY_INTERFACE_RESET: 02105 break; 02106 /*Disable PHY Interface driver*/ 02107 case PHY_INTERFACE_DOWN: 02108 rf_shutdown(); 02109 break; 02110 /*Enable PHY Interface driver*/ 02111 case PHY_INTERFACE_UP: 02112 rf_mode = RF_MODE_NORMAL; 02113 rf_channel_set(rf_channel); 02114 rf_receive(); 02115 rf_if_enable_irq(); 02116 break; 02117 /*Enable wireless interface ED scan mode*/ 02118 case PHY_INTERFACE_RX_ENERGY_STATE: 02119 rf_mode = RF_MODE_ED; 02120 rf_channel_set(rf_channel); 02121 rf_receive(); 02122 rf_if_disable_irq(); 02123 // Read status to clear pending flags. 02124 rf_if_read_register(IRQ_STATUS); 02125 // Must set interrupt mask to be able to read IRQ status. GPIO interrupt is disabled. 02126 rf_if_set_bit(IRQ_MASK, CCA_ED_DONE, CCA_ED_DONE); 02127 // ED can be initiated by writing arbitrary value to PHY_ED_LEVEL 02128 rf_if_write_register(PHY_ED_LEVEL, 0xff); 02129 break; 02130 case PHY_INTERFACE_SNIFFER_STATE: /**< Enable Sniffer state */ 02131 rf_mode = RF_MODE_SNIFFER; 02132 rf_channel_set(rf_channel); 02133 rf_flags_clear(RFF_RX); 02134 rf_receive(); 02135 break; 02136 } 02137 return ret_val; 02138 } 02139 02140 /* 02141 * \brief Function controls the ACK pending, channel setting and energy detection. 02142 * 02143 * \param extension_type Type of control 02144 * \param data_ptr Data from NET library 02145 * 02146 * \return 0 Success 02147 */ 02148 static int8_t rf_extension(phy_extension_type_e extension_type, uint8_t *data_ptr) 02149 { 02150 switch (extension_type) 02151 { 02152 /*Control MAC pending bit for Indirect data transmission*/ 02153 case PHY_EXTENSION_CTRL_PENDING_BIT: 02154 if(*data_ptr) 02155 { 02156 rf_if_ack_pending_ctrl(1); 02157 } 02158 else 02159 { 02160 rf_if_ack_pending_ctrl(0); 02161 } 02162 break; 02163 /*Return frame pending status*/ 02164 case PHY_EXTENSION_READ_LAST_ACK_PENDING_STATUS: 02165 *data_ptr = rf_if_last_acked_pending(); 02166 break; 02167 /*Set channel*/ 02168 case PHY_EXTENSION_SET_CHANNEL: 02169 break; 02170 /*Read energy on the channel*/ 02171 case PHY_EXTENSION_READ_CHANNEL_ENERGY: 02172 // End of the ED measurement is indicated by CCA_ED_DONE 02173 while (!(rf_if_read_register(IRQ_STATUS) & CCA_ED_DONE)); 02174 // RF input power: RSSI base level + 1[db] * PHY_ED_LEVEL 02175 *data_ptr = rf_sensitivity + rf_if_read_register(PHY_ED_LEVEL); 02176 // Read status to clear pending flags. 02177 rf_if_read_register(IRQ_STATUS); 02178 // Next ED measurement is started, next PHY_EXTENSION_READ_CHANNEL_ENERGY call will return the result. 02179 rf_if_write_register(PHY_ED_LEVEL, 0xff); 02180 break; 02181 /*Read status of the link*/ 02182 case PHY_EXTENSION_READ_LINK_STATUS: 02183 break; 02184 default: 02185 break; 02186 } 02187 return 0; 02188 } 02189 02190 /* 02191 * \brief Function sets the addresses to RF address filters. 02192 * 02193 * \param address_type Type of address 02194 * \param address_ptr Pointer to given address 02195 * 02196 * \return 0 Success 02197 */ 02198 static int8_t rf_address_write(phy_address_type_e address_type, uint8_t *address_ptr) 02199 { 02200 int8_t ret_val = 0; 02201 switch (address_type) 02202 { 02203 /*Set 48-bit address*/ 02204 case PHY_MAC_48BIT: 02205 break; 02206 /*Set 64-bit address*/ 02207 case PHY_MAC_64BIT: 02208 rf_set_address(address_ptr); 02209 break; 02210 /*Set 16-bit address*/ 02211 case PHY_MAC_16BIT: 02212 rf_set_short_adr(address_ptr); 02213 break; 02214 /*Set PAN Id*/ 02215 case PHY_MAC_PANID: 02216 rf_set_pan_id(address_ptr); 02217 break; 02218 } 02219 return ret_val; 02220 } 02221 02222 /* 02223 * \brief Function initialises the ACK wait time and returns the used PHY mode. 02224 * 02225 * \param none 02226 * 02227 * \return tmp Used PHY mode 02228 */ 02229 static void rf_init_phy_mode(void) 02230 { 02231 uint8_t tmp = 0; 02232 uint8_t part = rf_if_read_part_num(); 02233 /*Read used PHY Mode*/ 02234 tmp = rf_if_read_register(TRX_CTRL_2); 02235 /*Set ACK wait time for used data rate*/ 02236 if(part == PART_AT86RF212) 02237 { 02238 if((tmp & 0x1f) == 0x00) 02239 { 02240 rf_sensitivity = -110; 02241 rf_ack_wait_duration = 938; 02242 tmp = BPSK_20; 02243 } 02244 else if((tmp & 0x1f) == 0x04) 02245 { 02246 rf_sensitivity = -108; 02247 rf_ack_wait_duration = 469; 02248 tmp = BPSK_40; 02249 } 02250 else if((tmp & 0x1f) == 0x14) 02251 { 02252 rf_sensitivity = -108; 02253 rf_ack_wait_duration = 469; 02254 tmp = BPSK_40_ALT; 02255 } 02256 else if((tmp & 0x1f) == 0x08) 02257 { 02258 rf_sensitivity = -101; 02259 rf_ack_wait_duration = 50; 02260 tmp = OQPSK_SIN_RC_100; 02261 } 02262 else if((tmp & 0x1f) == 0x09) 02263 { 02264 rf_sensitivity = -99; 02265 rf_ack_wait_duration = 30; 02266 tmp = OQPSK_SIN_RC_200; 02267 } 02268 else if((tmp & 0x1f) == 0x18) 02269 { 02270 rf_sensitivity = -102; 02271 rf_ack_wait_duration = 50; 02272 tmp = OQPSK_RC_100; 02273 } 02274 else if((tmp & 0x1f) == 0x19) 02275 { 02276 rf_sensitivity = -100; 02277 rf_ack_wait_duration = 30; 02278 tmp = OQPSK_RC_200; 02279 } 02280 else if((tmp & 0x1f) == 0x0c) 02281 { 02282 rf_sensitivity = -100; 02283 rf_ack_wait_duration = 20; 02284 tmp = OQPSK_SIN_250; 02285 } 02286 else if((tmp & 0x1f) == 0x0d) 02287 { 02288 rf_sensitivity = -98; 02289 rf_ack_wait_duration = 25; 02290 tmp = OQPSK_SIN_500; 02291 } 02292 else if((tmp & 0x1f) == 0x0f) 02293 { 02294 rf_sensitivity = -98; 02295 rf_ack_wait_duration = 25; 02296 tmp = OQPSK_SIN_500_ALT; 02297 } 02298 else if((tmp & 0x1f) == 0x1c) 02299 { 02300 rf_sensitivity = -101; 02301 rf_ack_wait_duration = 20; 02302 tmp = OQPSK_RC_250; 02303 } 02304 else if((tmp & 0x1f) == 0x1d) 02305 { 02306 rf_sensitivity = -99; 02307 rf_ack_wait_duration = 25; 02308 tmp = OQPSK_RC_500; 02309 } 02310 else if((tmp & 0x1f) == 0x1f) 02311 { 02312 rf_sensitivity = -99; 02313 rf_ack_wait_duration = 25; 02314 tmp = OQPSK_RC_500_ALT; 02315 } 02316 else if((tmp & 0x3f) == 0x2A) 02317 { 02318 rf_sensitivity = -91; 02319 rf_ack_wait_duration = 25; 02320 tmp = OQPSK_SIN_RC_400_SCR_ON; 02321 } 02322 else if((tmp & 0x3f) == 0x0A) 02323 { 02324 rf_sensitivity = -91; 02325 rf_ack_wait_duration = 25; 02326 tmp = OQPSK_SIN_RC_400_SCR_OFF; 02327 } 02328 else if((tmp & 0x3f) == 0x3A) 02329 { 02330 rf_sensitivity = -97; 02331 rf_ack_wait_duration = 25; 02332 tmp = OQPSK_RC_400_SCR_ON; 02333 } 02334 else if((tmp & 0x3f) == 0x1A) 02335 { 02336 rf_sensitivity = -97; 02337 rf_ack_wait_duration = 25; 02338 tmp = OQPSK_RC_400_SCR_OFF; 02339 } 02340 else if((tmp & 0x3f) == 0x2E) 02341 { 02342 rf_sensitivity = -93; 02343 rf_ack_wait_duration = 13; 02344 tmp = OQPSK_SIN_1000_SCR_ON; 02345 } 02346 else if((tmp & 0x3f) == 0x0E) 02347 { 02348 rf_sensitivity = -93; 02349 rf_ack_wait_duration = 13; 02350 tmp = OQPSK_SIN_1000_SCR_OFF; 02351 } 02352 else if((tmp & 0x3f) == 0x3E) 02353 { 02354 rf_sensitivity = -95; 02355 rf_ack_wait_duration = 13; 02356 tmp = OQPSK_RC_1000_SCR_ON; 02357 } 02358 else if((tmp & 0x3f) == 0x1E) 02359 { 02360 rf_sensitivity = -95; 02361 rf_ack_wait_duration = 13; 02362 tmp = OQPSK_RC_1000_SCR_OFF; 02363 } 02364 } 02365 else 02366 { 02367 rf_sensitivity = -101; 02368 rf_ack_wait_duration = 20; 02369 } 02370 /*Board design might reduces the sensitivity*/ 02371 //rf_sensitivity += RF_SENSITIVITY_CALIBRATION; 02372 } 02373 02374 02375 static uint8_t rf_scale_lqi(int8_t rssi) 02376 { 02377 uint8_t scaled_lqi; 02378 02379 /*rssi < RF sensitivity*/ 02380 if(rssi < rf_sensitivity) 02381 scaled_lqi=0; 02382 /*-91 dBm < rssi < -81 dBm (AT86RF233 XPro)*/ 02383 /*-90 dBm < rssi < -80 dBm (AT86RF212B XPro)*/ 02384 else if(rssi < (rf_sensitivity + 10)) 02385 scaled_lqi=31; 02386 /*-81 dBm < rssi < -71 dBm (AT86RF233 XPro)*/ 02387 /*-80 dBm < rssi < -70 dBm (AT86RF212B XPro)*/ 02388 else if(rssi < (rf_sensitivity + 20)) 02389 scaled_lqi=207; 02390 /*-71 dBm < rssi < -61 dBm (AT86RF233 XPro)*/ 02391 /*-70 dBm < rssi < -60 dBm (AT86RF212B XPro)*/ 02392 else if(rssi < (rf_sensitivity + 30)) 02393 scaled_lqi=255; 02394 /*-61 dBm < rssi < -51 dBm (AT86RF233 XPro)*/ 02395 /*-60 dBm < rssi < -50 dBm (AT86RF212B XPro)*/ 02396 else if(rssi < (rf_sensitivity + 40)) 02397 scaled_lqi=255; 02398 /*-51 dBm < rssi < -41 dBm (AT86RF233 XPro)*/ 02399 /*-50 dBm < rssi < -40 dBm (AT86RF212B XPro)*/ 02400 else if(rssi < (rf_sensitivity + 50)) 02401 scaled_lqi=255; 02402 /*-41 dBm < rssi < -31 dBm (AT86RF233 XPro)*/ 02403 /*-40 dBm < rssi < -30 dBm (AT86RF212B XPro)*/ 02404 else if(rssi < (rf_sensitivity + 60)) 02405 scaled_lqi=255; 02406 /*-31 dBm < rssi < -21 dBm (AT86RF233 XPro)*/ 02407 /*-30 dBm < rssi < -20 dBm (AT86RF212B XPro)*/ 02408 else if(rssi < (rf_sensitivity + 70)) 02409 scaled_lqi=255; 02410 /*rssi > RF saturation*/ 02411 else if(rssi > (rf_sensitivity + 80)) 02412 scaled_lqi=111; 02413 /*-21 dBm < rssi < -11 dBm (AT86RF233 XPro)*/ 02414 /*-20 dBm < rssi < -10 dBm (AT86RF212B XPro)*/ 02415 else 02416 scaled_lqi=255; 02417 02418 return scaled_lqi; 02419 } 02420 02421 NanostackRfPhyAtmel::NanostackRfPhyAtmel(PinName spi_mosi, PinName spi_miso, 02422 PinName spi_sclk, PinName spi_cs, PinName spi_rst, PinName spi_slp, PinName spi_irq, 02423 PinName i2c_sda, PinName i2c_scl) 02424 : _mac(i2c_sda, i2c_scl), _mac_addr(), _rf(NULL), _mac_set(false), 02425 _spi_mosi(spi_mosi), _spi_miso(spi_miso), _spi_sclk(spi_sclk), 02426 _spi_cs(spi_cs), _spi_rst(spi_rst), _spi_slp(spi_slp), _spi_irq(spi_irq) 02427 { 02428 _rf = new RFBits(_spi_mosi, _spi_miso, _spi_sclk, _spi_cs, _spi_rst, _spi_slp, _spi_irq); 02429 } 02430 02431 NanostackRfPhyAtmel::~NanostackRfPhyAtmel() 02432 { 02433 delete _rf; 02434 } 02435 02436 int8_t NanostackRfPhyAtmel::rf_register() 02437 { 02438 if (NULL == _rf) { 02439 return -1; 02440 } 02441 02442 rf_if_lock(); 02443 02444 if (rf != NULL) { 02445 rf_if_unlock(); 02446 error("Multiple registrations of NanostackRfPhyAtmel not supported"); 02447 return -1; 02448 } 02449 02450 // Read the mac address if it hasn't been set by a user 02451 rf = _rf; 02452 if (!_mac_set) { 02453 int ret = _mac.read_eui64((void*)_mac_addr); 02454 if (ret < 0) { 02455 rf = NULL; 02456 rf_if_unlock(); 02457 return -1; 02458 } 02459 } 02460 02461 int8_t radio_id = rf_device_register(_mac_addr); 02462 if (radio_id < 0) { 02463 rf = NULL; 02464 } 02465 02466 rf_if_unlock(); 02467 return radio_id; 02468 } 02469 02470 void NanostackRfPhyAtmel::rf_unregister() 02471 { 02472 rf_if_lock(); 02473 02474 if (NULL == rf) { 02475 rf_if_unlock(); 02476 return; 02477 } 02478 02479 rf_device_unregister(); 02480 rf = NULL; 02481 02482 rf_if_unlock(); 02483 } 02484 02485 void NanostackRfPhyAtmel::get_mac_address(uint8_t *mac) 02486 { 02487 rf_if_lock(); 02488 02489 if (NULL == rf) { 02490 error("NanostackRfPhyAtmel Must be registered to read mac address"); 02491 rf_if_unlock(); 02492 return; 02493 } 02494 memcpy((void*)mac, (void*)_mac_addr, sizeof(_mac_addr)); 02495 02496 rf_if_unlock(); 02497 } 02498 02499 void NanostackRfPhyAtmel::set_mac_address(uint8_t *mac) 02500 { 02501 rf_if_lock(); 02502 02503 if (NULL != rf) { 02504 error("NanostackRfPhyAtmel cannot change mac address when running"); 02505 rf_if_unlock(); 02506 return; 02507 } 02508 memcpy((void*)_mac_addr, (void*)mac, sizeof(_mac_addr)); 02509 _mac_set = true; 02510 02511 rf_if_unlock(); 02512 } 02513
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