Krzysztof Sitko / mbed-dev-STM32F031K6

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targets/cmsis/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32HG_STK3400/efm32hg_rmu.h@50:a417edff4437, 2016-01-15 (annotated)

Committer:
mbed_official
Date:
Fri Jan 15 07:45:16 2016 +0000
Revision:
50:a417edff4437
Parent:
0:9b334a45a8ff 
Synchronized with git revision 6010f32619bfcbb01cc73747d4ff9040863482d9



Full URL: https://github.com/mbedmicro/mbed/commit/6010f32619bfcbb01cc73747d4ff9040863482d9/



Remove doubling of buffer size in realiseEndpoint()

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /**************************************************************************//**
bogdanm 0:9b334a45a8ff 2 * @file efm32hg_rmu.h
bogdanm 0:9b334a45a8ff 3 * @brief EFM32HG_RMU register and bit field definitions
mbed_official 50:a417edff4437 4 * @version 4.2.0
bogdanm 0:9b334a45a8ff 5 ******************************************************************************
bogdanm 0:9b334a45a8ff 6 * @section License
mbed_official 50:a417edff4437 7 * <b>Copyright 2015 Silicon Laboratories, Inc. http://www.silabs.com</b>
bogdanm 0:9b334a45a8ff 8 ******************************************************************************
bogdanm 0:9b334a45a8ff 9 *
bogdanm 0:9b334a45a8ff 10 * Permission is granted to anyone to use this software for any purpose,
bogdanm 0:9b334a45a8ff 11 * including commercial applications, and to alter it and redistribute it
bogdanm 0:9b334a45a8ff 12 * freely, subject to the following restrictions:
bogdanm 0:9b334a45a8ff 13 *
bogdanm 0:9b334a45a8ff 14 * 1. The origin of this software must not be misrepresented; you must not
bogdanm 0:9b334a45a8ff 15 * claim that you wrote the original software.@n
bogdanm 0:9b334a45a8ff 16 * 2. Altered source versions must be plainly marked as such, and must not be
bogdanm 0:9b334a45a8ff 17 * misrepresented as being the original software.@n
bogdanm 0:9b334a45a8ff 18 * 3. This notice may not be removed or altered from any source distribution.
bogdanm 0:9b334a45a8ff 19 *
bogdanm 0:9b334a45a8ff 20 * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Laboratories, Inc.
bogdanm 0:9b334a45a8ff 21 * has no obligation to support this Software. Silicon Laboratories, Inc. is
bogdanm 0:9b334a45a8ff 22 * providing the Software "AS IS", with no express or implied warranties of any
bogdanm 0:9b334a45a8ff 23 * kind, including, but not limited to, any implied warranties of
bogdanm 0:9b334a45a8ff 24 * merchantability or fitness for any particular purpose or warranties against
bogdanm 0:9b334a45a8ff 25 * infringement of any proprietary rights of a third party.
bogdanm 0:9b334a45a8ff 26 *
bogdanm 0:9b334a45a8ff 27 * Silicon Laboratories, Inc. will not be liable for any consequential,
bogdanm 0:9b334a45a8ff 28 * incidental, or special damages, or any other relief, or for any claim by
bogdanm 0:9b334a45a8ff 29 * any third party, arising from your use of this Software.
bogdanm 0:9b334a45a8ff 30 *
bogdanm 0:9b334a45a8ff 31 *****************************************************************************/
bogdanm 0:9b334a45a8ff 32 /**************************************************************************//**
mbed_official 50:a417edff4437 33 * @addtogroup Parts
mbed_official 50:a417edff4437 34 * @{
mbed_official 50:a417edff4437 35 ******************************************************************************/
mbed_official 50:a417edff4437 36 /**************************************************************************//**
bogdanm 0:9b334a45a8ff 37 * @defgroup EFM32HG_RMU
bogdanm 0:9b334a45a8ff 38 * @{
bogdanm 0:9b334a45a8ff 39 * @brief EFM32HG_RMU Register Declaration
bogdanm 0:9b334a45a8ff 40 *****************************************************************************/
bogdanm 0:9b334a45a8ff 41 typedef struct
bogdanm 0:9b334a45a8ff 42 {
bogdanm 0:9b334a45a8ff 43 __IO uint32_t CTRL; /**< Control Register */
bogdanm 0:9b334a45a8ff 44 __I uint32_t RSTCAUSE; /**< Reset Cause Register */
bogdanm 0:9b334a45a8ff 45 __O uint32_t CMD; /**< Command Register */
bogdanm 0:9b334a45a8ff 46 } RMU_TypeDef; /** @} */
bogdanm 0:9b334a45a8ff 47
bogdanm 0:9b334a45a8ff 48 /**************************************************************************//**
bogdanm 0:9b334a45a8ff 49 * @defgroup EFM32HG_RMU_BitFields
bogdanm 0:9b334a45a8ff 50 * @{
bogdanm 0:9b334a45a8ff 51 *****************************************************************************/
bogdanm 0:9b334a45a8ff 52
bogdanm 0:9b334a45a8ff 53 /* Bit fields for RMU CTRL */
bogdanm 0:9b334a45a8ff 54 #define _RMU_CTRL_RESETVALUE 0x00000000UL /**< Default value for RMU_CTRL */
bogdanm 0:9b334a45a8ff 55 #define _RMU_CTRL_MASK 0x00000001UL /**< Mask for RMU_CTRL */
bogdanm 0:9b334a45a8ff 56 #define RMU_CTRL_LOCKUPRDIS (0x1UL << 0) /**< Lockup Reset Disable */
bogdanm 0:9b334a45a8ff 57 #define _RMU_CTRL_LOCKUPRDIS_SHIFT 0 /**< Shift value for RMU_LOCKUPRDIS */
bogdanm 0:9b334a45a8ff 58 #define _RMU_CTRL_LOCKUPRDIS_MASK 0x1UL /**< Bit mask for RMU_LOCKUPRDIS */
bogdanm 0:9b334a45a8ff 59 #define _RMU_CTRL_LOCKUPRDIS_DEFAULT 0x00000000UL /**< Mode DEFAULT for RMU_CTRL */
bogdanm 0:9b334a45a8ff 60 #define RMU_CTRL_LOCKUPRDIS_DEFAULT (_RMU_CTRL_LOCKUPRDIS_DEFAULT << 0) /**< Shifted mode DEFAULT for RMU_CTRL */
bogdanm 0:9b334a45a8ff 61
bogdanm 0:9b334a45a8ff 62 /* Bit fields for RMU RSTCAUSE */
bogdanm 0:9b334a45a8ff 63 #define _RMU_RSTCAUSE_RESETVALUE 0x00000000UL /**< Default value for RMU_RSTCAUSE */
bogdanm 0:9b334a45a8ff 64 #define _RMU_RSTCAUSE_MASK 0x000007FFUL /**< Mask for RMU_RSTCAUSE */
bogdanm 0:9b334a45a8ff 65 #define RMU_RSTCAUSE_PORST (0x1UL << 0) /**< Power On Reset */
bogdanm 0:9b334a45a8ff 66 #define _RMU_RSTCAUSE_PORST_SHIFT 0 /**< Shift value for RMU_PORST */
bogdanm 0:9b334a45a8ff 67 #define _RMU_RSTCAUSE_PORST_MASK 0x1UL /**< Bit mask for RMU_PORST */
bogdanm 0:9b334a45a8ff 68 #define _RMU_RSTCAUSE_PORST_DEFAULT 0x00000000UL /**< Mode DEFAULT for RMU_RSTCAUSE */
bogdanm 0:9b334a45a8ff 69 #define RMU_RSTCAUSE_PORST_DEFAULT (_RMU_RSTCAUSE_PORST_DEFAULT << 0) /**< Shifted mode DEFAULT for RMU_RSTCAUSE */
bogdanm 0:9b334a45a8ff 70 #define RMU_RSTCAUSE_BODUNREGRST (0x1UL << 1) /**< Brown Out Detector Unregulated Domain Reset */
bogdanm 0:9b334a45a8ff 71 #define _RMU_RSTCAUSE_BODUNREGRST_SHIFT 1 /**< Shift value for RMU_BODUNREGRST */
bogdanm 0:9b334a45a8ff 72 #define _RMU_RSTCAUSE_BODUNREGRST_MASK 0x2UL /**< Bit mask for RMU_BODUNREGRST */
bogdanm 0:9b334a45a8ff 73 #define _RMU_RSTCAUSE_BODUNREGRST_DEFAULT 0x00000000UL /**< Mode DEFAULT for RMU_RSTCAUSE */
bogdanm 0:9b334a45a8ff 74 #define RMU_RSTCAUSE_BODUNREGRST_DEFAULT (_RMU_RSTCAUSE_BODUNREGRST_DEFAULT << 1) /**< Shifted mode DEFAULT for RMU_RSTCAUSE */
bogdanm 0:9b334a45a8ff 75 #define RMU_RSTCAUSE_BODREGRST (0x1UL << 2) /**< Brown Out Detector Regulated Domain Reset */
bogdanm 0:9b334a45a8ff 76 #define _RMU_RSTCAUSE_BODREGRST_SHIFT 2 /**< Shift value for RMU_BODREGRST */
bogdanm 0:9b334a45a8ff 77 #define _RMU_RSTCAUSE_BODREGRST_MASK 0x4UL /**< Bit mask for RMU_BODREGRST */
bogdanm 0:9b334a45a8ff 78 #define _RMU_RSTCAUSE_BODREGRST_DEFAULT 0x00000000UL /**< Mode DEFAULT for RMU_RSTCAUSE */
bogdanm 0:9b334a45a8ff 79 #define RMU_RSTCAUSE_BODREGRST_DEFAULT (_RMU_RSTCAUSE_BODREGRST_DEFAULT << 2) /**< Shifted mode DEFAULT for RMU_RSTCAUSE */
bogdanm 0:9b334a45a8ff 80 #define RMU_RSTCAUSE_EXTRST (0x1UL << 3) /**< External Pin Reset */
bogdanm 0:9b334a45a8ff 81 #define _RMU_RSTCAUSE_EXTRST_SHIFT 3 /**< Shift value for RMU_EXTRST */
bogdanm 0:9b334a45a8ff 82 #define _RMU_RSTCAUSE_EXTRST_MASK 0x8UL /**< Bit mask for RMU_EXTRST */
bogdanm 0:9b334a45a8ff 83 #define _RMU_RSTCAUSE_EXTRST_DEFAULT 0x00000000UL /**< Mode DEFAULT for RMU_RSTCAUSE */
bogdanm 0:9b334a45a8ff 84 #define RMU_RSTCAUSE_EXTRST_DEFAULT (_RMU_RSTCAUSE_EXTRST_DEFAULT << 3) /**< Shifted mode DEFAULT for RMU_RSTCAUSE */
bogdanm 0:9b334a45a8ff 85 #define RMU_RSTCAUSE_WDOGRST (0x1UL << 4) /**< Watchdog Reset */
bogdanm 0:9b334a45a8ff 86 #define _RMU_RSTCAUSE_WDOGRST_SHIFT 4 /**< Shift value for RMU_WDOGRST */
bogdanm 0:9b334a45a8ff 87 #define _RMU_RSTCAUSE_WDOGRST_MASK 0x10UL /**< Bit mask for RMU_WDOGRST */
bogdanm 0:9b334a45a8ff 88 #define _RMU_RSTCAUSE_WDOGRST_DEFAULT 0x00000000UL /**< Mode DEFAULT for RMU_RSTCAUSE */
bogdanm 0:9b334a45a8ff 89 #define RMU_RSTCAUSE_WDOGRST_DEFAULT (_RMU_RSTCAUSE_WDOGRST_DEFAULT << 4) /**< Shifted mode DEFAULT for RMU_RSTCAUSE */
bogdanm 0:9b334a45a8ff 90 #define RMU_RSTCAUSE_LOCKUPRST (0x1UL << 5) /**< LOCKUP Reset */
bogdanm 0:9b334a45a8ff 91 #define _RMU_RSTCAUSE_LOCKUPRST_SHIFT 5 /**< Shift value for RMU_LOCKUPRST */
bogdanm 0:9b334a45a8ff 92 #define _RMU_RSTCAUSE_LOCKUPRST_MASK 0x20UL /**< Bit mask for RMU_LOCKUPRST */
bogdanm 0:9b334a45a8ff 93 #define _RMU_RSTCAUSE_LOCKUPRST_DEFAULT 0x00000000UL /**< Mode DEFAULT for RMU_RSTCAUSE */
bogdanm 0:9b334a45a8ff 94 #define RMU_RSTCAUSE_LOCKUPRST_DEFAULT (_RMU_RSTCAUSE_LOCKUPRST_DEFAULT << 5) /**< Shifted mode DEFAULT for RMU_RSTCAUSE */
bogdanm 0:9b334a45a8ff 95 #define RMU_RSTCAUSE_SYSREQRST (0x1UL << 6) /**< System Request Reset */
bogdanm 0:9b334a45a8ff 96 #define _RMU_RSTCAUSE_SYSREQRST_SHIFT 6 /**< Shift value for RMU_SYSREQRST */
bogdanm 0:9b334a45a8ff 97 #define _RMU_RSTCAUSE_SYSREQRST_MASK 0x40UL /**< Bit mask for RMU_SYSREQRST */
bogdanm 0:9b334a45a8ff 98 #define _RMU_RSTCAUSE_SYSREQRST_DEFAULT 0x00000000UL /**< Mode DEFAULT for RMU_RSTCAUSE */
bogdanm 0:9b334a45a8ff 99 #define RMU_RSTCAUSE_SYSREQRST_DEFAULT (_RMU_RSTCAUSE_SYSREQRST_DEFAULT << 6) /**< Shifted mode DEFAULT for RMU_RSTCAUSE */
bogdanm 0:9b334a45a8ff 100 #define RMU_RSTCAUSE_EM4RST (0x1UL << 7) /**< EM4 Reset */
bogdanm 0:9b334a45a8ff 101 #define _RMU_RSTCAUSE_EM4RST_SHIFT 7 /**< Shift value for RMU_EM4RST */
bogdanm 0:9b334a45a8ff 102 #define _RMU_RSTCAUSE_EM4RST_MASK 0x80UL /**< Bit mask for RMU_EM4RST */
bogdanm 0:9b334a45a8ff 103 #define _RMU_RSTCAUSE_EM4RST_DEFAULT 0x00000000UL /**< Mode DEFAULT for RMU_RSTCAUSE */
bogdanm 0:9b334a45a8ff 104 #define RMU_RSTCAUSE_EM4RST_DEFAULT (_RMU_RSTCAUSE_EM4RST_DEFAULT << 7) /**< Shifted mode DEFAULT for RMU_RSTCAUSE */
bogdanm 0:9b334a45a8ff 105 #define RMU_RSTCAUSE_EM4WURST (0x1UL << 8) /**< EM4 Wake-up Reset */
bogdanm 0:9b334a45a8ff 106 #define _RMU_RSTCAUSE_EM4WURST_SHIFT 8 /**< Shift value for RMU_EM4WURST */
bogdanm 0:9b334a45a8ff 107 #define _RMU_RSTCAUSE_EM4WURST_MASK 0x100UL /**< Bit mask for RMU_EM4WURST */
bogdanm 0:9b334a45a8ff 108 #define _RMU_RSTCAUSE_EM4WURST_DEFAULT 0x00000000UL /**< Mode DEFAULT for RMU_RSTCAUSE */
bogdanm 0:9b334a45a8ff 109 #define RMU_RSTCAUSE_EM4WURST_DEFAULT (_RMU_RSTCAUSE_EM4WURST_DEFAULT << 8) /**< Shifted mode DEFAULT for RMU_RSTCAUSE */
bogdanm 0:9b334a45a8ff 110 #define RMU_RSTCAUSE_BODAVDD0 (0x1UL << 9) /**< AVDD0 Bod Reset */
bogdanm 0:9b334a45a8ff 111 #define _RMU_RSTCAUSE_BODAVDD0_SHIFT 9 /**< Shift value for RMU_BODAVDD0 */
bogdanm 0:9b334a45a8ff 112 #define _RMU_RSTCAUSE_BODAVDD0_MASK 0x200UL /**< Bit mask for RMU_BODAVDD0 */
bogdanm 0:9b334a45a8ff 113 #define _RMU_RSTCAUSE_BODAVDD0_DEFAULT 0x00000000UL /**< Mode DEFAULT for RMU_RSTCAUSE */
bogdanm 0:9b334a45a8ff 114 #define RMU_RSTCAUSE_BODAVDD0_DEFAULT (_RMU_RSTCAUSE_BODAVDD0_DEFAULT << 9) /**< Shifted mode DEFAULT for RMU_RSTCAUSE */
bogdanm 0:9b334a45a8ff 115 #define RMU_RSTCAUSE_BODAVDD1 (0x1UL << 10) /**< AVDD1 Bod Reset */
bogdanm 0:9b334a45a8ff 116 #define _RMU_RSTCAUSE_BODAVDD1_SHIFT 10 /**< Shift value for RMU_BODAVDD1 */
bogdanm 0:9b334a45a8ff 117 #define _RMU_RSTCAUSE_BODAVDD1_MASK 0x400UL /**< Bit mask for RMU_BODAVDD1 */
bogdanm 0:9b334a45a8ff 118 #define _RMU_RSTCAUSE_BODAVDD1_DEFAULT 0x00000000UL /**< Mode DEFAULT for RMU_RSTCAUSE */
bogdanm 0:9b334a45a8ff 119 #define RMU_RSTCAUSE_BODAVDD1_DEFAULT (_RMU_RSTCAUSE_BODAVDD1_DEFAULT << 10) /**< Shifted mode DEFAULT for RMU_RSTCAUSE */
bogdanm 0:9b334a45a8ff 120
bogdanm 0:9b334a45a8ff 121 /* Bit fields for RMU CMD */
bogdanm 0:9b334a45a8ff 122 #define _RMU_CMD_RESETVALUE 0x00000000UL /**< Default value for RMU_CMD */
bogdanm 0:9b334a45a8ff 123 #define _RMU_CMD_MASK 0x00000001UL /**< Mask for RMU_CMD */
bogdanm 0:9b334a45a8ff 124 #define RMU_CMD_RCCLR (0x1UL << 0) /**< Reset Cause Clear */
bogdanm 0:9b334a45a8ff 125 #define _RMU_CMD_RCCLR_SHIFT 0 /**< Shift value for RMU_RCCLR */
bogdanm 0:9b334a45a8ff 126 #define _RMU_CMD_RCCLR_MASK 0x1UL /**< Bit mask for RMU_RCCLR */
bogdanm 0:9b334a45a8ff 127 #define _RMU_CMD_RCCLR_DEFAULT 0x00000000UL /**< Mode DEFAULT for RMU_CMD */
bogdanm 0:9b334a45a8ff 128 #define RMU_CMD_RCCLR_DEFAULT (_RMU_CMD_RCCLR_DEFAULT << 0) /**< Shifted mode DEFAULT for RMU_CMD */
bogdanm 0:9b334a45a8ff 129
bogdanm 0:9b334a45a8ff 130 /** @} End of group EFM32HG_RMU */
mbed_official 50:a417edff4437 131 /** @} End of group Parts */
bogdanm 0:9b334a45a8ff 132