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targets/TARGET_NUVOTON/TARGET_M451/device/StdDriver/m451_dac.c@149:156823d33999, 2016-10-28 (annotated)

Committer:
<>
Date:
Fri Oct 28 11:17:30 2016 +0100
Revision:
149:156823d33999
This updates the lib to the mbed lib v128



NOTE: This release includes a restructuring of the file and directory locations and thus some

include paths in your code may need updating accordingly.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 149:156823d33999 1 /**************************************************************************//**
<> 149:156823d33999 2 * @file dac.c
<> 149:156823d33999 3 * @version V2.00
<> 149:156823d33999 4 * $Revision: 8 $
<> 149:156823d33999 5 * $Date: 15/08/11 10:26a $
<> 149:156823d33999 6 * @brief M451 series DAC driver source file
<> 149:156823d33999 7 *
<> 149:156823d33999 8 * @note
<> 149:156823d33999 9 * Copyright (C) 2014~2015 Nuvoton Technology Corp. All rights reserved.
<> 149:156823d33999 10 *****************************************************************************/
<> 149:156823d33999 11 #include "M451Series.h"
<> 149:156823d33999 12
<> 149:156823d33999 13 /** @addtogroup Standard_Driver Standard Driver
<> 149:156823d33999 14 @{
<> 149:156823d33999 15 */
<> 149:156823d33999 16
<> 149:156823d33999 17 /** @addtogroup DAC_Driver DAC Driver
<> 149:156823d33999 18 @{
<> 149:156823d33999 19 */
<> 149:156823d33999 20
<> 149:156823d33999 21 /** @addtogroup DAC_EXPORTED_FUNCTIONS DAC Exported Functions
<> 149:156823d33999 22 @{
<> 149:156823d33999 23 */
<> 149:156823d33999 24
<> 149:156823d33999 25 /**
<> 149:156823d33999 26 * @brief This function make DAC module be ready to convert.
<> 149:156823d33999 27 * @param[in] dac Base address of DAC module.
<> 149:156823d33999 28 * @param[in] u32Ch Not used in M451 Series DAC.
<> 149:156823d33999 29 * @param[in] u32TrgSrc Decides the trigger source. Valid values are:
<> 149:156823d33999 30 * - \ref DAC_WRITE_DAT_TRIGGER :Write DAC_DAT trigger
<> 149:156823d33999 31 * - \ref DAC_SOFTWARE_TRIGGER :Software trigger
<> 149:156823d33999 32 * - \ref DAC_LOW_LEVEL_TRIGGER :STDAC pin low level trigger
<> 149:156823d33999 33 * - \ref DAC_HIGH_LEVEL_TRIGGER :STDAC pin high level trigger
<> 149:156823d33999 34 * - \ref DAC_FALLING_EDGE_TRIGGER :STDAC pin falling edge trigger
<> 149:156823d33999 35 * - \ref DAC_RISING_EDGE_TRIGGER :STDAC pin rising edge trigger
<> 149:156823d33999 36 * - \ref DAC_TIMER0_TRIGGER :Timer 0 trigger
<> 149:156823d33999 37 * - \ref DAC_TIMER1_TRIGGER :Timer 1 trigger
<> 149:156823d33999 38 * - \ref DAC_TIMER2_TRIGGER :Timer 2 trigger
<> 149:156823d33999 39 * - \ref DAC_TIMER3_TRIGGER :Timer 3 trigger
<> 149:156823d33999 40 * - \ref DAC_PWM0_TRIGGER :PWM0 trigger
<> 149:156823d33999 41 * - \ref DAC_PWM1_TRIGGER :PWM1 trigger
<> 149:156823d33999 42 * @return None
<> 149:156823d33999 43 * @details The DAC conversion can be started by writing DAC_DAT, software trigger or hardware trigger.
<> 149:156823d33999 44 * When TRGEN (DAC_CTL[4]) is 0, the data conversion is started by writing DAC_DAT register.
<> 149:156823d33999 45 * When TRGEN (DAC_CTL[4]) is 1, the data conversion is started by SWTRG (DAC_SWTRG[0]) is set to 1,
<> 149:156823d33999 46 * external STDAC pin, timer event, or PWM timer event.
<> 149:156823d33999 47 */
<> 149:156823d33999 48 void DAC_Open(DAC_T *dac,
<> 149:156823d33999 49 uint32_t u32Ch,
<> 149:156823d33999 50 uint32_t u32TrgSrc)
<> 149:156823d33999 51 {
<> 149:156823d33999 52 dac->CTL &= ~(DAC_CTL_ETRGSEL_Msk | DAC_CTL_TRGSEL_Msk | DAC_CTL_TRGEN_Msk);
<> 149:156823d33999 53
<> 149:156823d33999 54 dac->CTL |= (u32TrgSrc | DAC_CTL_DACEN_Msk);
<> 149:156823d33999 55 }
<> 149:156823d33999 56
<> 149:156823d33999 57 /**
<> 149:156823d33999 58 * @brief Disable DAC analog power.
<> 149:156823d33999 59 * @param[in] dac Base address of DAC module.
<> 149:156823d33999 60 * @param[in] u32Ch Not used in M451 Series DAC.
<> 149:156823d33999 61 * @return None
<> 149:156823d33999 62 * @details Disable DAC analog power for saving power consumption.
<> 149:156823d33999 63 */
<> 149:156823d33999 64 void DAC_Close(DAC_T *dac, uint32_t u32Ch)
<> 149:156823d33999 65 {
<> 149:156823d33999 66 dac->CTL &= (~DAC_CTL_DACEN_Msk);
<> 149:156823d33999 67 }
<> 149:156823d33999 68
<> 149:156823d33999 69 /**
<> 149:156823d33999 70 * @brief Set delay time for DAC to become stable.
<> 149:156823d33999 71 * @param[in] dac Base address of DAC module.
<> 149:156823d33999 72 * @param[in] u32Delay Decides the DAC conversion settling time, the range is from 0~(1023/PCLK*1000000) micro seconds.
<> 149:156823d33999 73 * @return Real DAC conversion settling time (micro second).
<> 149:156823d33999 74 * @details For example, DAC controller clock speed is 72MHz and DAC conversion setting time is 1 us, SETTLET (DAC_TCTL[9:0]) value must be greater than 0x48.
<> 149:156823d33999 75 * @note User needs to write appropriate value to meet DAC conversion settling time base on PCLK (APB clock) speed.
<> 149:156823d33999 76 */
<> 149:156823d33999 77 float DAC_SetDelayTime(DAC_T *dac, uint32_t u32Delay)
<> 149:156823d33999 78 {
<> 149:156823d33999 79 SystemCoreClockUpdate();
<> 149:156823d33999 80
<> 149:156823d33999 81 dac->TCTL = ((SystemCoreClock * u32Delay / 1000000) & 0x3FF);
<> 149:156823d33999 82
<> 149:156823d33999 83 return ((dac->TCTL) * 1000000 / SystemCoreClock);
<> 149:156823d33999 84 }
<> 149:156823d33999 85
<> 149:156823d33999 86
<> 149:156823d33999 87
<> 149:156823d33999 88 /*@}*/ /* end of group DAC_EXPORTED_FUNCTIONS */
<> 149:156823d33999 89
<> 149:156823d33999 90 /*@}*/ /* end of group DAC_Driver */
<> 149:156823d33999 91
<> 149:156823d33999 92 /*@}*/ /* end of group Standard_Driver */
<> 149:156823d33999 93
<> 149:156823d33999 94 /*** (C) COPYRIGHT 2014~2015 Nuvoton Technology Corp. ***/