Dieter Graef / USBHost_DISCO-F746NG

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Show/hide line numbers USB_Helper.c Source File

USB_Helper.c

00001 #include "USB_Helper.h"
00002 
00003 /* cache flush */
00004 void CPU_CACHE_Flush(uint32_t * buffer, uint32_t length)
00005 {
00006  // SCB_InvalidateDCache_by_Addr(buffer,length);
00007   uint32_t ccsidr;
00008   uint32_t smask;
00009   uint32_t sshift;
00010   uint32_t ways;
00011   uint32_t wshift;
00012   uint32_t ssize;
00013   uint32_t sets;
00014   uint32_t sw;
00015   uint32_t start;
00016   uint32_t ende;
00017 
00018   start=(uint32_t)buffer;
00019   ende=start+length;
00020   /* Get the characteristics of the D-Cache */
00021 
00022   ccsidr = SCB->CCSIDR;
00023   smask  = CCSIDR_SETS(ccsidr);          /* (Number of sets) - 1 */
00024   sshift = CCSIDR_LSSHIFT(ccsidr) + 4;   /* log2(cache-line-size-in-bytes) */
00025   ways   = CCSIDR_WAYS(ccsidr);          /* (Number of ways) - 1 */
00026 
00027   /* Calculate the bit offset for the way field in the DCCISW register by
00028    * counting the number of leading zeroes.  For example:
00029    *
00030    *   Number of  Value of ways  Field
00031    *   Ways       'ways'         Offset
00032    *     2         1             31
00033    *     4         3             30
00034    *     8         7             29
00035    *   ...
00036    */
00037 
00038   wshift = __CLZ(ways) & 0x1f;
00039 
00040   /* Clean and invalidate the D-Cache over the range of addresses */
00041 
00042   ssize  = (1 << sshift);
00043   start &= ~(ssize - 1);
00044   __DSB();
00045 
00046   do
00047     {
00048       int32_t tmpways = ways;
00049 
00050       /* Isolate the cache line associated with this address.  For example
00051        * if the cache line size is 32 bytes and the cache size is 16KB, then
00052        *
00053        *   sshift = 5      : Offset to the beginning of the set field
00054        *   smask  = 0x007f : Mask of the set field
00055        */
00056 
00057       sets = ((uint32_t)start >> sshift) & smask;
00058 
00059       /* Clean and invalidate each way for this cacheline */
00060 
00061       do
00062         {
00063           sw = ((tmpways << wshift) | (sets << sshift));
00064           SCB->DCCISW=sw;
00065 
00066         }
00067       while (tmpways--);
00068 
00069       /* Increment the address by the size of one cache line. */
00070 
00071       start += ssize;
00072     }
00073   while (start < ende);
00074 
00075   __DSB();
00076   __ISB();
00077 }