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nucleo-f401re.h
00001 /** 00002 ****************************************************************************** 00003 * @file nucleo-f401re.h 00004 * @author MCD Application Team 00005 * @version V1.0.0 00006 * @date 22-April-2014 00007 * @brief This file contains definitions for: 00008 * - LEDs and push-button available on NUCLEO-F401RE Kit 00009 * from STMicroelectronics 00010 * - LCD, joystick and microSD available on Adafruit 1.8" TFT LCD 00011 * shield (reference ID 802) 00012 ****************************************************************************** 00013 * @attention 00014 * 00015 * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> 00016 * 00017 * Redistribution and use in source and binary forms, with or without modification, 00018 * are permitted provided that the following conditions are met: 00019 * 1. Redistributions of source code must retain the above copyright notice, 00020 * this list of conditions and the following disclaimer. 00021 * 2. Redistributions in binary form must reproduce the above copyright notice, 00022 * this list of conditions and the following disclaimer in the documentation 00023 * and/or other materials provided with the distribution. 00024 * 3. Neither the name of STMicroelectronics nor the names of its contributors 00025 * may be used to endorse or promote products derived from this software 00026 * without specific prior written permission. 00027 * 00028 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 00029 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 00030 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 00031 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 00032 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 00033 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 00034 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 00035 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 00036 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 00037 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 00038 * 00039 ****************************************************************************** 00040 */ 00041 00042 /* Define to prevent recursive inclusion -------------------------------------*/ 00043 #ifndef __NUCLEO_F401RE_H 00044 #define __NUCLEO_F401RE_H 00045 00046 #ifdef __cplusplus 00047 extern "C" { 00048 #endif 00049 00050 /* Includes ------------------------------------------------------------------*/ 00051 #include "stm32f4xx_hal.h" 00052 00053 00054 /** @addtogroup BSP 00055 * @{ 00056 */ 00057 00058 /** @addtogroup NUCLEO_F401RE 00059 * @{ 00060 */ 00061 00062 /** @addtogroup NUCLEO_F401RE_LOW_LEVEL 00063 * @{ 00064 */ 00065 00066 /** @defgroup NUCLEO_F401RE_LOW_LEVEL_Exported_Types 00067 * @{ 00068 */ 00069 00070 00071 typedef enum 00072 { 00073 BUTTON_KEY = 0 00074 } Button_TypeDef; 00075 00076 typedef enum 00077 { 00078 BUTTON_MODE_GPIO = 0, 00079 BUTTON_MODE_EXTI = 1 00080 } ButtonMode_TypeDef; 00081 00082 typedef enum 00083 { 00084 JOY_NONE = 0, 00085 JOY_SEL = 1, 00086 JOY_DOWN = 2, 00087 JOY_LEFT = 3, 00088 JOY_RIGHT = 4, 00089 JOY_UP = 5 00090 } JOYState_TypeDef; 00091 00092 /** 00093 * @} 00094 */ 00095 00096 /** @defgroup NUCLEO_F401RE_LOW_LEVEL_Exported_Constants 00097 * @{ 00098 */ 00099 00100 /** 00101 * @brief Define for NUCLEO_F401RE board 00102 */ 00103 #if !defined (USE_NUCLEO_F401RE) 00104 #define USE_NUCLEO_F401RE 00105 #endif 00106 00107 /** 00108 * @} 00109 */ 00110 00111 /** @addtogroup NUCLEO_F401RE_LOW_LEVEL_LED 00112 * @{ 00113 */ 00114 #define LEDn 1 00115 00116 #define LED2_PIN GPIO_PIN_5 00117 #define LED2_GPIO_PORT GPIOA 00118 #define LED2_GPIO_CLK_ENABLE() __GPIOA_CLK_ENABLE() 00119 #define LED2_GPIO_CLK_DISABLE() __GPIOA_CLK_DISABLE() 00120 00121 #define LEDx_GPIO_CLK_ENABLE(__INDEX__) (((__INDEX__) == 0) ? LED2_GPIO_CLK_ENABLE() : 0) 00122 #define LEDx_GPIO_CLK_DISABLE(__INDEX__) (((__INDEX__) == 0) ? LED2_GPIO_CLK_DISABLE() : 0) 00123 /** 00124 * @} 00125 */ 00126 00127 /** @addtogroup NUCLEO_F401RE_LOW_LEVEL_BUTTON 00128 * @{ 00129 */ 00130 #define BUTTONn 1 00131 00132 /** 00133 * @brief Key push-button 00134 */ 00135 #define KEY_BUTTON_PIN GPIO_PIN_13 00136 #define KEY_BUTTON_GPIO_PORT GPIOC 00137 #define KEY_BUTTON_GPIO_CLK_ENABLE() __GPIOC_CLK_ENABLE() 00138 #define KEY_BUTTON_GPIO_CLK_DISABLE() __GPIOC_CLK_DISABLE() 00139 #define KEY_BUTTON_EXTI_LINE GPIO_PIN_13 00140 #define KEY_BUTTON_EXTI_IRQn EXTI15_10_IRQn 00141 //EXTI4_15_IRQn 00142 00143 #define BUTTONx_GPIO_CLK_ENABLE(__INDEX__) (((__INDEX__) == 0) ? KEY_BUTTON_GPIO_CLK_ENABLE() : 0) 00144 #define BUTTONx_GPIO_CLK_DISABLE(__INDEX__) (((__INDEX__) == 0) ? KEY_BUTTON_GPIO_CLK_DISABLE() : 0) 00145 /** 00146 * @} 00147 */ 00148 00149 /** @addtogroup NUCLEO_F401RE_LOW_LEVEL_BUS 00150 * @{ 00151 */ 00152 /*###################### SPI1 ###################################*/ 00153 //#define NUCLEO_SPIx SPI1 00154 //#define NUCLEO_SPIx_CLK_ENABLE() __SPI1_CLK_ENABLE() 00155 // 00156 //#define NUCLEO_SPIx_SCK_AF GPIO_AF0_SPI1 00157 //#define NUCLEO_SPIx_SCK_GPIO_PORT GPIOA 00158 //#define NUCLEO_SPIx_SCK_PIN GPIO_PIN_5 00159 //#define NUCLEO_SPIx_SCK_GPIO_CLK_ENABLE() __GPIOA_CLK_ENABLE() 00160 //#define NUCLEO_SPIx_SCK_GPIO_CLK_DISABLE() __GPIOA_CLK_DISABLE() 00161 // 00162 //#define NUCLEO_SPIx_MISO_MOSI_AF GPIO_AF0_SPI1 00163 //#define NUCLEO_SPIx_MISO_MOSI_GPIO_PORT GPIOA 00164 //#define NUCLEO_SPIx_MISO_MOSI_GPIO_CLK_ENABLE() __GPIOA_CLK_ENABLE() 00165 //#define NUCLEO_SPIx_MISO_MOSI_GPIO_CLK_DISABLE() __GPIOA_CLK_DISABLE() 00166 //#define NUCLEO_SPIx_MISO_PIN GPIO_PIN_6 00167 //#define NUCLEO_SPIx_MOSI_PIN GPIO_PIN_7 00168 ///* Maximum Timeout values for flags waiting loops. These timeouts are not based 00169 // on accurate values, they just guarantee that the application will not remain 00170 // stuck if the SPI communication is corrupted. 00171 // You may modify these timeout values depending on CPU frequency and application 00172 // conditions (interrupts routines ...). */ 00173 //#define NUCLEO_SPIx_TIMEOUT_MAX 1000 00174 00175 00176 /** 00177 * @brief Definition for I2C_ONBOARD_SENSORS port, connected to I2C3 00178 */ 00179 00180 /* I2C clock speed configuration (in Hz) */ 00181 #ifndef NUCLEO_I2C_SHIELDS_SPEED 00182 #define NUCLEO_I2C_SHIELDS_SPEED 100000 00183 #endif /* I2C_ONBOARD_SENSORS_SPEED */ 00184 00185 /* I2C peripheral configuration defines (control interface of the audio codec) */ 00186 #define NUCLEO_I2C_SHIELDS I2C1 00187 #define NUCLEO_I2C_SHIELDS_CLK_ENABLE() __I2C1_CLK_ENABLE() 00188 #define NUCLEO_I2C_SHIELDS_SCL_SDA_GPIO_CLK_ENABLE() __GPIOB_CLK_ENABLE() 00189 #define NUCLEO_I2C_SHIELDS_SCL_SDA_AF GPIO_AF4_I2C1 00190 #define NUCLEO_I2C_SHIELDS_SCL_SDA_GPIO_PORT GPIOB 00191 #define NUCLEO_I2C_SHIELDS_SCL_PIN GPIO_PIN_8 00192 #define NUCLEO_I2C_SHIELDS_SDA_PIN GPIO_PIN_9 00193 00194 #define NUCLEO_I2C_SHIELDS_FORCE_RESET() __I2C1_FORCE_RESET() 00195 #define NUCLEO_I2C_SHIELDS_RELEASE_RESET() __I2C1_RELEASE_RESET() 00196 00197 /* I2C interrupt requests */ 00198 #define NUCLEO_I2C_SHIELDS_EV_IRQn I2C1_EV_IRQn 00199 #define NUCLEO_I2C_SHIELDS_ER_IRQn I2C1_ER_IRQn 00200 00201 //#define NUCLEO_I2C_SHIELDS_MUTEX I2C1_Mutex_id 00202 //#define NUCLEO_I2C_SHIELDS_MUTEX_TAKE() osMutexWait(NUCLEO_I2C_SHIELDS_MUTEX, 0) 00203 //#define NUCLEO_I2C_SHIELDS_MUTEX_RELEASE() osMutexRelease(NUCLEO_I2C_SHIELDS_MUTEX) 00204 00205 /* Maximum Timeout values for flags waiting loops. These timeouts are not based 00206 on accurate values, they just guarantee that the application will not remain 00207 stuck if the SPI communication is corrupted. 00208 You may modify these timeout values depending on CPU frequency and application 00209 conditions (interrupts routines ...). */ 00210 #define NUCLEO_I2C_SHIELDS_TIMEOUT_MAX 0x1000 /*<! The value of the maximal timeout for BUS waiting loops */ 00211 00212 /** @addtogroup NUCLEO_F401RE_LOW_LEVEL_COMPONENT 00213 * @{ 00214 */ 00215 00216 /** 00217 * @brief SD Control Lines management 00218 */ 00219 #define SD_CS_LOW() HAL_GPIO_WritePin(SD_CS_GPIO_PORT, SD_CS_PIN, GPIO_PIN_RESET) 00220 #define SD_CS_HIGH() HAL_GPIO_WritePin(SD_CS_GPIO_PORT, SD_CS_PIN, GPIO_PIN_SET) 00221 00222 /** 00223 * @brief LCD Control Lines management 00224 */ 00225 #define LCD_CS_LOW() HAL_GPIO_WritePin(LCD_CS_GPIO_PORT, LCD_CS_PIN, GPIO_PIN_RESET) 00226 #define LCD_CS_HIGH() HAL_GPIO_WritePin(LCD_CS_GPIO_PORT, LCD_CS_PIN, GPIO_PIN_SET) 00227 #define LCD_DC_LOW() HAL_GPIO_WritePin(LCD_DC_GPIO_PORT, LCD_DC_PIN, GPIO_PIN_RESET) 00228 #define LCD_DC_HIGH() HAL_GPIO_WritePin(LCD_DC_GPIO_PORT, LCD_DC_PIN, GPIO_PIN_SET) 00229 00230 /** 00231 * @brief SD Control Interface pins 00232 */ 00233 #define SD_CS_PIN GPIO_PIN_5 00234 #define SD_CS_GPIO_PORT GPIOB 00235 #define SD_CS_GPIO_CLK_ENABLE() __GPIOB_CLK_ENABLE() 00236 #define SD_CS_GPIO_CLK_DISABLE() __GPIOB_CLK_DISABLE() 00237 00238 /** 00239 * @brief LCD Control Interface pins 00240 */ 00241 #define LCD_CS_PIN GPIO_PIN_6 00242 #define LCD_CS_GPIO_PORT GPIOB 00243 #define LCD_CS_GPIO_CLK_ENABLE() __GPIOB_CLK_ENABLE() 00244 #define LCD_CS_GPIO_CLK_DISABLE() __GPIOB_CLK_DISABLE() 00245 00246 /** 00247 * @brief LCD Data/Command Interface pins 00248 */ 00249 #define LCD_DC_PIN GPIO_PIN_9 00250 #define LCD_DC_GPIO_PORT GPIOA 00251 #define LCD_DC_GPIO_CLK_ENABLE() __GPIOA_CLK_ENABLE() 00252 #define LCD_DC_GPIO_CLK_DISABLE() __GPIOA_CLK_DISABLE() 00253 00254 /*##################### ADC1 ###################################*/ 00255 /** 00256 * @brief ADC Interface pins 00257 * used to detect motion of Joystick available on Adafruit 1.8" TFT shield 00258 */ 00259 #define NUCLEO_ADCx ADC1 00260 #define NUCLEO_ADCx_CLK_ENABLE() __ADC1_CLK_ENABLE() 00261 00262 #define NUCLEO_ADCx_GPIO_PORT GPIOB 00263 #define NUCLEO_ADCx_GPIO_PIN GPIO_PIN_0 00264 #define NUCLEO_ADCx_GPIO_CLK_ENABLE() __GPIOB_CLK_ENABLE() 00265 #define NUCLEO_ADCx_GPIO_CLK_DISABLE() __GPIOB_CLK_ENABLE() 00266 00267 00268 /* User can use this section to tailor USARTx/UARTx instance used and associated 00269 resources */ 00270 /* Definition for USARTx clock resources */ 00271 #define USARTx USART2 00272 #define USARTx_CLK_ENABLE() __USART2_CLK_ENABLE(); 00273 #define DMAx_CLK_ENABLE() __DMA1_CLK_ENABLE() 00274 #define USARTx_RX_GPIO_CLK_ENABLE() __GPIOA_CLK_ENABLE() 00275 #define USARTx_TX_GPIO_CLK_ENABLE() __GPIOA_CLK_ENABLE() 00276 00277 #define USARTx_FORCE_RESET() __USART2_FORCE_RESET() 00278 #define USARTx_RELEASE_RESET() __USART2_RELEASE_RESET() 00279 00280 /* Definition for USARTx Pins */ 00281 #define USARTx_TX_PIN GPIO_PIN_2 00282 #define USARTx_TX_GPIO_PORT GPIOA 00283 #define USARTx_TX_AF GPIO_AF7_USART2 00284 #define USARTx_RX_PIN GPIO_PIN_3 00285 #define USARTx_RX_GPIO_PORT GPIOA 00286 #define USARTx_RX_AF GPIO_AF7_USART2 00287 00288 /* Definition for USARTx's DMA */ 00289 #define USARTx_TX_DMA_CHANNEL DMA_CHANNEL_4 00290 #define USARTx_TX_DMA_STREAM DMA1_Stream6 00291 #define USARTx_RX_DMA_CHANNEL DMA_CHANNEL_4 00292 #define USARTx_RX_DMA_STREAM DMA1_Stream5 00293 00294 /** @defgroup NUCLEO_F401RE_LOW_LEVEL_Exported_Macros 00295 * @{ 00296 */ 00297 /** 00298 * @} 00299 */ 00300 00301 /** 00302 * @} 00303 */ 00304 00305 #ifdef __cplusplus 00306 } 00307 #endif 00308 00309 #endif /* __NUCLEO_F401RE_H */ 00310 /** 00311 * @} 00312 */ 00313 00314 /** 00315 * @} 00316 */ 00317 00318 /** 00319 * @} 00320 */ 00321 00322 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 00323 00324
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