R1 code for micro:bit based train controller code, requires second micro:bit running tx code to operate - see https://meanderingpi.wordpress.com/ for more information
Fork of mbed-dev-bin by
TARGET_NRF51_MICROBIT/cmsis.h@4:1a27ae39e33f, 2017-05-23 (annotated)
- Committer:
- DavidMS
- Date:
- Tue May 23 10:42:56 2017 +0000
- Revision:
- 4:1a27ae39e33f
- Parent:
- 0:e1a608bb55e8
First working micro:bit motor control rx code, need be run with matching tx code
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
jamesadevine | 0:e1a608bb55e8 | 1 | /* mbed Microcontroller Library - CMSIS |
jamesadevine | 0:e1a608bb55e8 | 2 | * Copyright (C) 2009-2011 ARM Limited. All rights reserved. |
jamesadevine | 0:e1a608bb55e8 | 3 | * |
jamesadevine | 0:e1a608bb55e8 | 4 | * A generic CMSIS include header, pulling in LPC407x_8x specifics |
jamesadevine | 0:e1a608bb55e8 | 5 | */ |
jamesadevine | 0:e1a608bb55e8 | 6 | |
jamesadevine | 0:e1a608bb55e8 | 7 | #ifndef MBED_CMSIS_H |
jamesadevine | 0:e1a608bb55e8 | 8 | #define MBED_CMSIS_H |
jamesadevine | 0:e1a608bb55e8 | 9 | |
jamesadevine | 0:e1a608bb55e8 | 10 | #include "nrf.h" |
jamesadevine | 0:e1a608bb55e8 | 11 | #include "cmsis_nvic.h" |
jamesadevine | 0:e1a608bb55e8 | 12 | |
jamesadevine | 0:e1a608bb55e8 | 13 | #endif |