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targets/cmsis/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32ZG_STK3200/efm32zg_usart.h@0:9b334a45a8ff, 2015-10-01 (annotated)

Committer:
bogdanm
Date:
Thu Oct 01 15:25:22 2015 +0300
Revision:
0:9b334a45a8ff
Child:
50:a417edff4437
Initial commit on mbed-dev



Replaces mbed-src (now inactive)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /**************************************************************************//**
bogdanm 0:9b334a45a8ff 2 * @file efm32zg_usart.h
bogdanm 0:9b334a45a8ff 3 * @brief EFM32ZG_USART register and bit field definitions
bogdanm 0:9b334a45a8ff 4 * @version 3.20.6
bogdanm 0:9b334a45a8ff 5 ******************************************************************************
bogdanm 0:9b334a45a8ff 6 * @section License
bogdanm 0:9b334a45a8ff 7 * <b>(C) Copyright 2014 Silicon Laboratories, Inc. http://www.silabs.com</b>
bogdanm 0:9b334a45a8ff 8 ******************************************************************************
bogdanm 0:9b334a45a8ff 9 *
bogdanm 0:9b334a45a8ff 10 * Permission is granted to anyone to use this software for any purpose,
bogdanm 0:9b334a45a8ff 11 * including commercial applications, and to alter it and redistribute it
bogdanm 0:9b334a45a8ff 12 * freely, subject to the following restrictions:
bogdanm 0:9b334a45a8ff 13 *
bogdanm 0:9b334a45a8ff 14 * 1. The origin of this software must not be misrepresented; you must not
bogdanm 0:9b334a45a8ff 15 * claim that you wrote the original software.@n
bogdanm 0:9b334a45a8ff 16 * 2. Altered source versions must be plainly marked as such, and must not be
bogdanm 0:9b334a45a8ff 17 * misrepresented as being the original software.@n
bogdanm 0:9b334a45a8ff 18 * 3. This notice may not be removed or altered from any source distribution.
bogdanm 0:9b334a45a8ff 19 *
bogdanm 0:9b334a45a8ff 20 * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Laboratories, Inc.
bogdanm 0:9b334a45a8ff 21 * has no obligation to support this Software. Silicon Laboratories, Inc. is
bogdanm 0:9b334a45a8ff 22 * providing the Software "AS IS", with no express or implied warranties of any
bogdanm 0:9b334a45a8ff 23 * kind, including, but not limited to, any implied warranties of
bogdanm 0:9b334a45a8ff 24 * merchantability or fitness for any particular purpose or warranties against
bogdanm 0:9b334a45a8ff 25 * infringement of any proprietary rights of a third party.
bogdanm 0:9b334a45a8ff 26 *
bogdanm 0:9b334a45a8ff 27 * Silicon Laboratories, Inc. will not be liable for any consequential,
bogdanm 0:9b334a45a8ff 28 * incidental, or special damages, or any other relief, or for any claim by
bogdanm 0:9b334a45a8ff 29 * any third party, arising from your use of this Software.
bogdanm 0:9b334a45a8ff 30 *
bogdanm 0:9b334a45a8ff 31 *****************************************************************************/
bogdanm 0:9b334a45a8ff 32 /**************************************************************************//**
bogdanm 0:9b334a45a8ff 33 * @defgroup EFM32ZG_USART
bogdanm 0:9b334a45a8ff 34 * @{
bogdanm 0:9b334a45a8ff 35 * @brief EFM32ZG_USART Register Declaration
bogdanm 0:9b334a45a8ff 36 *****************************************************************************/
bogdanm 0:9b334a45a8ff 37 typedef struct
bogdanm 0:9b334a45a8ff 38 {
bogdanm 0:9b334a45a8ff 39 __IO uint32_t CTRL; /**< Control Register */
bogdanm 0:9b334a45a8ff 40 __IO uint32_t FRAME; /**< USART Frame Format Register */
bogdanm 0:9b334a45a8ff 41 __IO uint32_t TRIGCTRL; /**< USART Trigger Control register */
bogdanm 0:9b334a45a8ff 42 __IO uint32_t CMD; /**< Command Register */
bogdanm 0:9b334a45a8ff 43 __I uint32_t STATUS; /**< USART Status Register */
bogdanm 0:9b334a45a8ff 44 __IO uint32_t CLKDIV; /**< Clock Control Register */
bogdanm 0:9b334a45a8ff 45 __I uint32_t RXDATAX; /**< RX Buffer Data Extended Register */
bogdanm 0:9b334a45a8ff 46 __I uint32_t RXDATA; /**< RX Buffer Data Register */
bogdanm 0:9b334a45a8ff 47 __I uint32_t RXDOUBLEX; /**< RX Buffer Double Data Extended Register */
bogdanm 0:9b334a45a8ff 48 __I uint32_t RXDOUBLE; /**< RX FIFO Double Data Register */
bogdanm 0:9b334a45a8ff 49 __I uint32_t RXDATAXP; /**< RX Buffer Data Extended Peek Register */
bogdanm 0:9b334a45a8ff 50 __I uint32_t RXDOUBLEXP; /**< RX Buffer Double Data Extended Peek Register */
bogdanm 0:9b334a45a8ff 51 __IO uint32_t TXDATAX; /**< TX Buffer Data Extended Register */
bogdanm 0:9b334a45a8ff 52 __IO uint32_t TXDATA; /**< TX Buffer Data Register */
bogdanm 0:9b334a45a8ff 53 __IO uint32_t TXDOUBLEX; /**< TX Buffer Double Data Extended Register */
bogdanm 0:9b334a45a8ff 54 __IO uint32_t TXDOUBLE; /**< TX Buffer Double Data Register */
bogdanm 0:9b334a45a8ff 55 __I uint32_t IF; /**< Interrupt Flag Register */
bogdanm 0:9b334a45a8ff 56 __IO uint32_t IFS; /**< Interrupt Flag Set Register */
bogdanm 0:9b334a45a8ff 57 __IO uint32_t IFC; /**< Interrupt Flag Clear Register */
bogdanm 0:9b334a45a8ff 58 __IO uint32_t IEN; /**< Interrupt Enable Register */
bogdanm 0:9b334a45a8ff 59 __IO uint32_t IRCTRL; /**< IrDA Control Register */
bogdanm 0:9b334a45a8ff 60 __IO uint32_t ROUTE; /**< I/O Routing Register */
bogdanm 0:9b334a45a8ff 61 __IO uint32_t INPUT; /**< USART Input Register */
bogdanm 0:9b334a45a8ff 62 __IO uint32_t I2SCTRL; /**< I2S Control Register */
bogdanm 0:9b334a45a8ff 63 } USART_TypeDef; /** @} */
bogdanm 0:9b334a45a8ff 64
bogdanm 0:9b334a45a8ff 65 /**************************************************************************//**
bogdanm 0:9b334a45a8ff 66 * @defgroup EFM32ZG_USART_BitFields
bogdanm 0:9b334a45a8ff 67 * @{
bogdanm 0:9b334a45a8ff 68 *****************************************************************************/
bogdanm 0:9b334a45a8ff 69
bogdanm 0:9b334a45a8ff 70 /* Bit fields for USART CTRL */
bogdanm 0:9b334a45a8ff 71 #define _USART_CTRL_RESETVALUE 0x00000000UL /**< Default value for USART_CTRL */
bogdanm 0:9b334a45a8ff 72 #define _USART_CTRL_MASK 0xFFFFFF7FUL /**< Mask for USART_CTRL */
bogdanm 0:9b334a45a8ff 73 #define USART_CTRL_SYNC (0x1UL << 0) /**< USART Synchronous Mode */
bogdanm 0:9b334a45a8ff 74 #define _USART_CTRL_SYNC_SHIFT 0 /**< Shift value for USART_SYNC */
bogdanm 0:9b334a45a8ff 75 #define _USART_CTRL_SYNC_MASK 0x1UL /**< Bit mask for USART_SYNC */
bogdanm 0:9b334a45a8ff 76 #define _USART_CTRL_SYNC_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_CTRL */
bogdanm 0:9b334a45a8ff 77 #define USART_CTRL_SYNC_DEFAULT (_USART_CTRL_SYNC_DEFAULT << 0) /**< Shifted mode DEFAULT for USART_CTRL */
bogdanm 0:9b334a45a8ff 78 #define USART_CTRL_LOOPBK (0x1UL << 1) /**< Loopback Enable */
bogdanm 0:9b334a45a8ff 79 #define _USART_CTRL_LOOPBK_SHIFT 1 /**< Shift value for USART_LOOPBK */
bogdanm 0:9b334a45a8ff 80 #define _USART_CTRL_LOOPBK_MASK 0x2UL /**< Bit mask for USART_LOOPBK */
bogdanm 0:9b334a45a8ff 81 #define _USART_CTRL_LOOPBK_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_CTRL */
bogdanm 0:9b334a45a8ff 82 #define USART_CTRL_LOOPBK_DEFAULT (_USART_CTRL_LOOPBK_DEFAULT << 1) /**< Shifted mode DEFAULT for USART_CTRL */
bogdanm 0:9b334a45a8ff 83 #define USART_CTRL_CCEN (0x1UL << 2) /**< Collision Check Enable */
bogdanm 0:9b334a45a8ff 84 #define _USART_CTRL_CCEN_SHIFT 2 /**< Shift value for USART_CCEN */
bogdanm 0:9b334a45a8ff 85 #define _USART_CTRL_CCEN_MASK 0x4UL /**< Bit mask for USART_CCEN */
bogdanm 0:9b334a45a8ff 86 #define _USART_CTRL_CCEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_CTRL */
bogdanm 0:9b334a45a8ff 87 #define USART_CTRL_CCEN_DEFAULT (_USART_CTRL_CCEN_DEFAULT << 2) /**< Shifted mode DEFAULT for USART_CTRL */
bogdanm 0:9b334a45a8ff 88 #define USART_CTRL_MPM (0x1UL << 3) /**< Multi-Processor Mode */
bogdanm 0:9b334a45a8ff 89 #define _USART_CTRL_MPM_SHIFT 3 /**< Shift value for USART_MPM */
bogdanm 0:9b334a45a8ff 90 #define _USART_CTRL_MPM_MASK 0x8UL /**< Bit mask for USART_MPM */
bogdanm 0:9b334a45a8ff 91 #define _USART_CTRL_MPM_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_CTRL */
bogdanm 0:9b334a45a8ff 92 #define USART_CTRL_MPM_DEFAULT (_USART_CTRL_MPM_DEFAULT << 3) /**< Shifted mode DEFAULT for USART_CTRL */
bogdanm 0:9b334a45a8ff 93 #define USART_CTRL_MPAB (0x1UL << 4) /**< Multi-Processor Address-Bit */
bogdanm 0:9b334a45a8ff 94 #define _USART_CTRL_MPAB_SHIFT 4 /**< Shift value for USART_MPAB */
bogdanm 0:9b334a45a8ff 95 #define _USART_CTRL_MPAB_MASK 0x10UL /**< Bit mask for USART_MPAB */
bogdanm 0:9b334a45a8ff 96 #define _USART_CTRL_MPAB_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_CTRL */
bogdanm 0:9b334a45a8ff 97 #define USART_CTRL_MPAB_DEFAULT (_USART_CTRL_MPAB_DEFAULT << 4) /**< Shifted mode DEFAULT for USART_CTRL */
bogdanm 0:9b334a45a8ff 98 #define _USART_CTRL_OVS_SHIFT 5 /**< Shift value for USART_OVS */
bogdanm 0:9b334a45a8ff 99 #define _USART_CTRL_OVS_MASK 0x60UL /**< Bit mask for USART_OVS */
bogdanm 0:9b334a45a8ff 100 #define _USART_CTRL_OVS_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_CTRL */
bogdanm 0:9b334a45a8ff 101 #define _USART_CTRL_OVS_X16 0x00000000UL /**< Mode X16 for USART_CTRL */
bogdanm 0:9b334a45a8ff 102 #define _USART_CTRL_OVS_X8 0x00000001UL /**< Mode X8 for USART_CTRL */
bogdanm 0:9b334a45a8ff 103 #define _USART_CTRL_OVS_X6 0x00000002UL /**< Mode X6 for USART_CTRL */
bogdanm 0:9b334a45a8ff 104 #define _USART_CTRL_OVS_X4 0x00000003UL /**< Mode X4 for USART_CTRL */
bogdanm 0:9b334a45a8ff 105 #define USART_CTRL_OVS_DEFAULT (_USART_CTRL_OVS_DEFAULT << 5) /**< Shifted mode DEFAULT for USART_CTRL */
bogdanm 0:9b334a45a8ff 106 #define USART_CTRL_OVS_X16 (_USART_CTRL_OVS_X16 << 5) /**< Shifted mode X16 for USART_CTRL */
bogdanm 0:9b334a45a8ff 107 #define USART_CTRL_OVS_X8 (_USART_CTRL_OVS_X8 << 5) /**< Shifted mode X8 for USART_CTRL */
bogdanm 0:9b334a45a8ff 108 #define USART_CTRL_OVS_X6 (_USART_CTRL_OVS_X6 << 5) /**< Shifted mode X6 for USART_CTRL */
bogdanm 0:9b334a45a8ff 109 #define USART_CTRL_OVS_X4 (_USART_CTRL_OVS_X4 << 5) /**< Shifted mode X4 for USART_CTRL */
bogdanm 0:9b334a45a8ff 110 #define USART_CTRL_CLKPOL (0x1UL << 8) /**< Clock Polarity */
bogdanm 0:9b334a45a8ff 111 #define _USART_CTRL_CLKPOL_SHIFT 8 /**< Shift value for USART_CLKPOL */
bogdanm 0:9b334a45a8ff 112 #define _USART_CTRL_CLKPOL_MASK 0x100UL /**< Bit mask for USART_CLKPOL */
bogdanm 0:9b334a45a8ff 113 #define _USART_CTRL_CLKPOL_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_CTRL */
bogdanm 0:9b334a45a8ff 114 #define _USART_CTRL_CLKPOL_IDLELOW 0x00000000UL /**< Mode IDLELOW for USART_CTRL */
bogdanm 0:9b334a45a8ff 115 #define _USART_CTRL_CLKPOL_IDLEHIGH 0x00000001UL /**< Mode IDLEHIGH for USART_CTRL */
bogdanm 0:9b334a45a8ff 116 #define USART_CTRL_CLKPOL_DEFAULT (_USART_CTRL_CLKPOL_DEFAULT << 8) /**< Shifted mode DEFAULT for USART_CTRL */
bogdanm 0:9b334a45a8ff 117 #define USART_CTRL_CLKPOL_IDLELOW (_USART_CTRL_CLKPOL_IDLELOW << 8) /**< Shifted mode IDLELOW for USART_CTRL */
bogdanm 0:9b334a45a8ff 118 #define USART_CTRL_CLKPOL_IDLEHIGH (_USART_CTRL_CLKPOL_IDLEHIGH << 8) /**< Shifted mode IDLEHIGH for USART_CTRL */
bogdanm 0:9b334a45a8ff 119 #define USART_CTRL_CLKPHA (0x1UL << 9) /**< Clock Edge For Setup/Sample */
bogdanm 0:9b334a45a8ff 120 #define _USART_CTRL_CLKPHA_SHIFT 9 /**< Shift value for USART_CLKPHA */
bogdanm 0:9b334a45a8ff 121 #define _USART_CTRL_CLKPHA_MASK 0x200UL /**< Bit mask for USART_CLKPHA */
bogdanm 0:9b334a45a8ff 122 #define _USART_CTRL_CLKPHA_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_CTRL */
bogdanm 0:9b334a45a8ff 123 #define _USART_CTRL_CLKPHA_SAMPLELEADING 0x00000000UL /**< Mode SAMPLELEADING for USART_CTRL */
bogdanm 0:9b334a45a8ff 124 #define _USART_CTRL_CLKPHA_SAMPLETRAILING 0x00000001UL /**< Mode SAMPLETRAILING for USART_CTRL */
bogdanm 0:9b334a45a8ff 125 #define USART_CTRL_CLKPHA_DEFAULT (_USART_CTRL_CLKPHA_DEFAULT << 9) /**< Shifted mode DEFAULT for USART_CTRL */
bogdanm 0:9b334a45a8ff 126 #define USART_CTRL_CLKPHA_SAMPLELEADING (_USART_CTRL_CLKPHA_SAMPLELEADING << 9) /**< Shifted mode SAMPLELEADING for USART_CTRL */
bogdanm 0:9b334a45a8ff 127 #define USART_CTRL_CLKPHA_SAMPLETRAILING (_USART_CTRL_CLKPHA_SAMPLETRAILING << 9) /**< Shifted mode SAMPLETRAILING for USART_CTRL */
bogdanm 0:9b334a45a8ff 128 #define USART_CTRL_MSBF (0x1UL << 10) /**< Most Significant Bit First */
bogdanm 0:9b334a45a8ff 129 #define _USART_CTRL_MSBF_SHIFT 10 /**< Shift value for USART_MSBF */
bogdanm 0:9b334a45a8ff 130 #define _USART_CTRL_MSBF_MASK 0x400UL /**< Bit mask for USART_MSBF */
bogdanm 0:9b334a45a8ff 131 #define _USART_CTRL_MSBF_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_CTRL */
bogdanm 0:9b334a45a8ff 132 #define USART_CTRL_MSBF_DEFAULT (_USART_CTRL_MSBF_DEFAULT << 10) /**< Shifted mode DEFAULT for USART_CTRL */
bogdanm 0:9b334a45a8ff 133 #define USART_CTRL_CSMA (0x1UL << 11) /**< Action On Slave-Select In Master Mode */
bogdanm 0:9b334a45a8ff 134 #define _USART_CTRL_CSMA_SHIFT 11 /**< Shift value for USART_CSMA */
bogdanm 0:9b334a45a8ff 135 #define _USART_CTRL_CSMA_MASK 0x800UL /**< Bit mask for USART_CSMA */
bogdanm 0:9b334a45a8ff 136 #define _USART_CTRL_CSMA_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_CTRL */
bogdanm 0:9b334a45a8ff 137 #define _USART_CTRL_CSMA_NOACTION 0x00000000UL /**< Mode NOACTION for USART_CTRL */
bogdanm 0:9b334a45a8ff 138 #define _USART_CTRL_CSMA_GOTOSLAVEMODE 0x00000001UL /**< Mode GOTOSLAVEMODE for USART_CTRL */
bogdanm 0:9b334a45a8ff 139 #define USART_CTRL_CSMA_DEFAULT (_USART_CTRL_CSMA_DEFAULT << 11) /**< Shifted mode DEFAULT for USART_CTRL */
bogdanm 0:9b334a45a8ff 140 #define USART_CTRL_CSMA_NOACTION (_USART_CTRL_CSMA_NOACTION << 11) /**< Shifted mode NOACTION for USART_CTRL */
bogdanm 0:9b334a45a8ff 141 #define USART_CTRL_CSMA_GOTOSLAVEMODE (_USART_CTRL_CSMA_GOTOSLAVEMODE << 11) /**< Shifted mode GOTOSLAVEMODE for USART_CTRL */
bogdanm 0:9b334a45a8ff 142 #define USART_CTRL_TXBIL (0x1UL << 12) /**< TX Buffer Interrupt Level */
bogdanm 0:9b334a45a8ff 143 #define _USART_CTRL_TXBIL_SHIFT 12 /**< Shift value for USART_TXBIL */
bogdanm 0:9b334a45a8ff 144 #define _USART_CTRL_TXBIL_MASK 0x1000UL /**< Bit mask for USART_TXBIL */
bogdanm 0:9b334a45a8ff 145 #define _USART_CTRL_TXBIL_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_CTRL */
bogdanm 0:9b334a45a8ff 146 #define _USART_CTRL_TXBIL_EMPTY 0x00000000UL /**< Mode EMPTY for USART_CTRL */
bogdanm 0:9b334a45a8ff 147 #define _USART_CTRL_TXBIL_HALFFULL 0x00000001UL /**< Mode HALFFULL for USART_CTRL */
bogdanm 0:9b334a45a8ff 148 #define USART_CTRL_TXBIL_DEFAULT (_USART_CTRL_TXBIL_DEFAULT << 12) /**< Shifted mode DEFAULT for USART_CTRL */
bogdanm 0:9b334a45a8ff 149 #define USART_CTRL_TXBIL_EMPTY (_USART_CTRL_TXBIL_EMPTY << 12) /**< Shifted mode EMPTY for USART_CTRL */
bogdanm 0:9b334a45a8ff 150 #define USART_CTRL_TXBIL_HALFFULL (_USART_CTRL_TXBIL_HALFFULL << 12) /**< Shifted mode HALFFULL for USART_CTRL */
bogdanm 0:9b334a45a8ff 151 #define USART_CTRL_RXINV (0x1UL << 13) /**< Receiver Input Invert */
bogdanm 0:9b334a45a8ff 152 #define _USART_CTRL_RXINV_SHIFT 13 /**< Shift value for USART_RXINV */
bogdanm 0:9b334a45a8ff 153 #define _USART_CTRL_RXINV_MASK 0x2000UL /**< Bit mask for USART_RXINV */
bogdanm 0:9b334a45a8ff 154 #define _USART_CTRL_RXINV_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_CTRL */
bogdanm 0:9b334a45a8ff 155 #define USART_CTRL_RXINV_DEFAULT (_USART_CTRL_RXINV_DEFAULT << 13) /**< Shifted mode DEFAULT for USART_CTRL */
bogdanm 0:9b334a45a8ff 156 #define USART_CTRL_TXINV (0x1UL << 14) /**< Transmitter output Invert */
bogdanm 0:9b334a45a8ff 157 #define _USART_CTRL_TXINV_SHIFT 14 /**< Shift value for USART_TXINV */
bogdanm 0:9b334a45a8ff 158 #define _USART_CTRL_TXINV_MASK 0x4000UL /**< Bit mask for USART_TXINV */
bogdanm 0:9b334a45a8ff 159 #define _USART_CTRL_TXINV_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_CTRL */
bogdanm 0:9b334a45a8ff 160 #define USART_CTRL_TXINV_DEFAULT (_USART_CTRL_TXINV_DEFAULT << 14) /**< Shifted mode DEFAULT for USART_CTRL */
bogdanm 0:9b334a45a8ff 161 #define USART_CTRL_CSINV (0x1UL << 15) /**< Chip Select Invert */
bogdanm 0:9b334a45a8ff 162 #define _USART_CTRL_CSINV_SHIFT 15 /**< Shift value for USART_CSINV */
bogdanm 0:9b334a45a8ff 163 #define _USART_CTRL_CSINV_MASK 0x8000UL /**< Bit mask for USART_CSINV */
bogdanm 0:9b334a45a8ff 164 #define _USART_CTRL_CSINV_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_CTRL */
bogdanm 0:9b334a45a8ff 165 #define USART_CTRL_CSINV_DEFAULT (_USART_CTRL_CSINV_DEFAULT << 15) /**< Shifted mode DEFAULT for USART_CTRL */
bogdanm 0:9b334a45a8ff 166 #define USART_CTRL_AUTOCS (0x1UL << 16) /**< Automatic Chip Select */
bogdanm 0:9b334a45a8ff 167 #define _USART_CTRL_AUTOCS_SHIFT 16 /**< Shift value for USART_AUTOCS */
bogdanm 0:9b334a45a8ff 168 #define _USART_CTRL_AUTOCS_MASK 0x10000UL /**< Bit mask for USART_AUTOCS */
bogdanm 0:9b334a45a8ff 169 #define _USART_CTRL_AUTOCS_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_CTRL */
bogdanm 0:9b334a45a8ff 170 #define USART_CTRL_AUTOCS_DEFAULT (_USART_CTRL_AUTOCS_DEFAULT << 16) /**< Shifted mode DEFAULT for USART_CTRL */
bogdanm 0:9b334a45a8ff 171 #define USART_CTRL_AUTOTRI (0x1UL << 17) /**< Automatic TX Tristate */
bogdanm 0:9b334a45a8ff 172 #define _USART_CTRL_AUTOTRI_SHIFT 17 /**< Shift value for USART_AUTOTRI */
bogdanm 0:9b334a45a8ff 173 #define _USART_CTRL_AUTOTRI_MASK 0x20000UL /**< Bit mask for USART_AUTOTRI */
bogdanm 0:9b334a45a8ff 174 #define _USART_CTRL_AUTOTRI_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_CTRL */
bogdanm 0:9b334a45a8ff 175 #define USART_CTRL_AUTOTRI_DEFAULT (_USART_CTRL_AUTOTRI_DEFAULT << 17) /**< Shifted mode DEFAULT for USART_CTRL */
bogdanm 0:9b334a45a8ff 176 #define USART_CTRL_SCMODE (0x1UL << 18) /**< SmartCard Mode */
bogdanm 0:9b334a45a8ff 177 #define _USART_CTRL_SCMODE_SHIFT 18 /**< Shift value for USART_SCMODE */
bogdanm 0:9b334a45a8ff 178 #define _USART_CTRL_SCMODE_MASK 0x40000UL /**< Bit mask for USART_SCMODE */
bogdanm 0:9b334a45a8ff 179 #define _USART_CTRL_SCMODE_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_CTRL */
bogdanm 0:9b334a45a8ff 180 #define USART_CTRL_SCMODE_DEFAULT (_USART_CTRL_SCMODE_DEFAULT << 18) /**< Shifted mode DEFAULT for USART_CTRL */
bogdanm 0:9b334a45a8ff 181 #define USART_CTRL_SCRETRANS (0x1UL << 19) /**< SmartCard Retransmit */
bogdanm 0:9b334a45a8ff 182 #define _USART_CTRL_SCRETRANS_SHIFT 19 /**< Shift value for USART_SCRETRANS */
bogdanm 0:9b334a45a8ff 183 #define _USART_CTRL_SCRETRANS_MASK 0x80000UL /**< Bit mask for USART_SCRETRANS */
bogdanm 0:9b334a45a8ff 184 #define _USART_CTRL_SCRETRANS_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_CTRL */
bogdanm 0:9b334a45a8ff 185 #define USART_CTRL_SCRETRANS_DEFAULT (_USART_CTRL_SCRETRANS_DEFAULT << 19) /**< Shifted mode DEFAULT for USART_CTRL */
bogdanm 0:9b334a45a8ff 186 #define USART_CTRL_SKIPPERRF (0x1UL << 20) /**< Skip Parity Error Frames */
bogdanm 0:9b334a45a8ff 187 #define _USART_CTRL_SKIPPERRF_SHIFT 20 /**< Shift value for USART_SKIPPERRF */
bogdanm 0:9b334a45a8ff 188 #define _USART_CTRL_SKIPPERRF_MASK 0x100000UL /**< Bit mask for USART_SKIPPERRF */
bogdanm 0:9b334a45a8ff 189 #define _USART_CTRL_SKIPPERRF_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_CTRL */
bogdanm 0:9b334a45a8ff 190 #define USART_CTRL_SKIPPERRF_DEFAULT (_USART_CTRL_SKIPPERRF_DEFAULT << 20) /**< Shifted mode DEFAULT for USART_CTRL */
bogdanm 0:9b334a45a8ff 191 #define USART_CTRL_BIT8DV (0x1UL << 21) /**< Bit 8 Default Value */
bogdanm 0:9b334a45a8ff 192 #define _USART_CTRL_BIT8DV_SHIFT 21 /**< Shift value for USART_BIT8DV */
bogdanm 0:9b334a45a8ff 193 #define _USART_CTRL_BIT8DV_MASK 0x200000UL /**< Bit mask for USART_BIT8DV */
bogdanm 0:9b334a45a8ff 194 #define _USART_CTRL_BIT8DV_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_CTRL */
bogdanm 0:9b334a45a8ff 195 #define USART_CTRL_BIT8DV_DEFAULT (_USART_CTRL_BIT8DV_DEFAULT << 21) /**< Shifted mode DEFAULT for USART_CTRL */
bogdanm 0:9b334a45a8ff 196 #define USART_CTRL_ERRSDMA (0x1UL << 22) /**< Halt DMA On Error */
bogdanm 0:9b334a45a8ff 197 #define _USART_CTRL_ERRSDMA_SHIFT 22 /**< Shift value for USART_ERRSDMA */
bogdanm 0:9b334a45a8ff 198 #define _USART_CTRL_ERRSDMA_MASK 0x400000UL /**< Bit mask for USART_ERRSDMA */
bogdanm 0:9b334a45a8ff 199 #define _USART_CTRL_ERRSDMA_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_CTRL */
bogdanm 0:9b334a45a8ff 200 #define USART_CTRL_ERRSDMA_DEFAULT (_USART_CTRL_ERRSDMA_DEFAULT << 22) /**< Shifted mode DEFAULT for USART_CTRL */
bogdanm 0:9b334a45a8ff 201 #define USART_CTRL_ERRSRX (0x1UL << 23) /**< Disable RX On Error */
bogdanm 0:9b334a45a8ff 202 #define _USART_CTRL_ERRSRX_SHIFT 23 /**< Shift value for USART_ERRSRX */
bogdanm 0:9b334a45a8ff 203 #define _USART_CTRL_ERRSRX_MASK 0x800000UL /**< Bit mask for USART_ERRSRX */
bogdanm 0:9b334a45a8ff 204 #define _USART_CTRL_ERRSRX_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_CTRL */
bogdanm 0:9b334a45a8ff 205 #define USART_CTRL_ERRSRX_DEFAULT (_USART_CTRL_ERRSRX_DEFAULT << 23) /**< Shifted mode DEFAULT for USART_CTRL */
bogdanm 0:9b334a45a8ff 206 #define USART_CTRL_ERRSTX (0x1UL << 24) /**< Disable TX On Error */
bogdanm 0:9b334a45a8ff 207 #define _USART_CTRL_ERRSTX_SHIFT 24 /**< Shift value for USART_ERRSTX */
bogdanm 0:9b334a45a8ff 208 #define _USART_CTRL_ERRSTX_MASK 0x1000000UL /**< Bit mask for USART_ERRSTX */
bogdanm 0:9b334a45a8ff 209 #define _USART_CTRL_ERRSTX_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_CTRL */
bogdanm 0:9b334a45a8ff 210 #define USART_CTRL_ERRSTX_DEFAULT (_USART_CTRL_ERRSTX_DEFAULT << 24) /**< Shifted mode DEFAULT for USART_CTRL */
bogdanm 0:9b334a45a8ff 211 #define USART_CTRL_SSSEARLY (0x1UL << 25) /**< Synchronous Slave Setup Early */
bogdanm 0:9b334a45a8ff 212 #define _USART_CTRL_SSSEARLY_SHIFT 25 /**< Shift value for USART_SSSEARLY */
bogdanm 0:9b334a45a8ff 213 #define _USART_CTRL_SSSEARLY_MASK 0x2000000UL /**< Bit mask for USART_SSSEARLY */
bogdanm 0:9b334a45a8ff 214 #define _USART_CTRL_SSSEARLY_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_CTRL */
bogdanm 0:9b334a45a8ff 215 #define USART_CTRL_SSSEARLY_DEFAULT (_USART_CTRL_SSSEARLY_DEFAULT << 25) /**< Shifted mode DEFAULT for USART_CTRL */
bogdanm 0:9b334a45a8ff 216 #define _USART_CTRL_TXDELAY_SHIFT 26 /**< Shift value for USART_TXDELAY */
bogdanm 0:9b334a45a8ff 217 #define _USART_CTRL_TXDELAY_MASK 0xC000000UL /**< Bit mask for USART_TXDELAY */
bogdanm 0:9b334a45a8ff 218 #define _USART_CTRL_TXDELAY_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_CTRL */
bogdanm 0:9b334a45a8ff 219 #define _USART_CTRL_TXDELAY_NONE 0x00000000UL /**< Mode NONE for USART_CTRL */
bogdanm 0:9b334a45a8ff 220 #define _USART_CTRL_TXDELAY_SINGLE 0x00000001UL /**< Mode SINGLE for USART_CTRL */
bogdanm 0:9b334a45a8ff 221 #define _USART_CTRL_TXDELAY_DOUBLE 0x00000002UL /**< Mode DOUBLE for USART_CTRL */
bogdanm 0:9b334a45a8ff 222 #define _USART_CTRL_TXDELAY_TRIPLE 0x00000003UL /**< Mode TRIPLE for USART_CTRL */
bogdanm 0:9b334a45a8ff 223 #define USART_CTRL_TXDELAY_DEFAULT (_USART_CTRL_TXDELAY_DEFAULT << 26) /**< Shifted mode DEFAULT for USART_CTRL */
bogdanm 0:9b334a45a8ff 224 #define USART_CTRL_TXDELAY_NONE (_USART_CTRL_TXDELAY_NONE << 26) /**< Shifted mode NONE for USART_CTRL */
bogdanm 0:9b334a45a8ff 225 #define USART_CTRL_TXDELAY_SINGLE (_USART_CTRL_TXDELAY_SINGLE << 26) /**< Shifted mode SINGLE for USART_CTRL */
bogdanm 0:9b334a45a8ff 226 #define USART_CTRL_TXDELAY_DOUBLE (_USART_CTRL_TXDELAY_DOUBLE << 26) /**< Shifted mode DOUBLE for USART_CTRL */
bogdanm 0:9b334a45a8ff 227 #define USART_CTRL_TXDELAY_TRIPLE (_USART_CTRL_TXDELAY_TRIPLE << 26) /**< Shifted mode TRIPLE for USART_CTRL */
bogdanm 0:9b334a45a8ff 228 #define USART_CTRL_BYTESWAP (0x1UL << 28) /**< Byteswap In Double Accesses */
bogdanm 0:9b334a45a8ff 229 #define _USART_CTRL_BYTESWAP_SHIFT 28 /**< Shift value for USART_BYTESWAP */
bogdanm 0:9b334a45a8ff 230 #define _USART_CTRL_BYTESWAP_MASK 0x10000000UL /**< Bit mask for USART_BYTESWAP */
bogdanm 0:9b334a45a8ff 231 #define _USART_CTRL_BYTESWAP_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_CTRL */
bogdanm 0:9b334a45a8ff 232 #define USART_CTRL_BYTESWAP_DEFAULT (_USART_CTRL_BYTESWAP_DEFAULT << 28) /**< Shifted mode DEFAULT for USART_CTRL */
bogdanm 0:9b334a45a8ff 233 #define USART_CTRL_AUTOTX (0x1UL << 29) /**< Always Transmit When RX Not Full */
bogdanm 0:9b334a45a8ff 234 #define _USART_CTRL_AUTOTX_SHIFT 29 /**< Shift value for USART_AUTOTX */
bogdanm 0:9b334a45a8ff 235 #define _USART_CTRL_AUTOTX_MASK 0x20000000UL /**< Bit mask for USART_AUTOTX */
bogdanm 0:9b334a45a8ff 236 #define _USART_CTRL_AUTOTX_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_CTRL */
bogdanm 0:9b334a45a8ff 237 #define USART_CTRL_AUTOTX_DEFAULT (_USART_CTRL_AUTOTX_DEFAULT << 29) /**< Shifted mode DEFAULT for USART_CTRL */
bogdanm 0:9b334a45a8ff 238 #define USART_CTRL_MVDIS (0x1UL << 30) /**< Majority Vote Disable */
bogdanm 0:9b334a45a8ff 239 #define _USART_CTRL_MVDIS_SHIFT 30 /**< Shift value for USART_MVDIS */
bogdanm 0:9b334a45a8ff 240 #define _USART_CTRL_MVDIS_MASK 0x40000000UL /**< Bit mask for USART_MVDIS */
bogdanm 0:9b334a45a8ff 241 #define _USART_CTRL_MVDIS_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_CTRL */
bogdanm 0:9b334a45a8ff 242 #define USART_CTRL_MVDIS_DEFAULT (_USART_CTRL_MVDIS_DEFAULT << 30) /**< Shifted mode DEFAULT for USART_CTRL */
bogdanm 0:9b334a45a8ff 243 #define USART_CTRL_SMSDELAY (0x1UL << 31) /**< Synchronous Master Sample Delay */
bogdanm 0:9b334a45a8ff 244 #define _USART_CTRL_SMSDELAY_SHIFT 31 /**< Shift value for USART_SMSDELAY */
bogdanm 0:9b334a45a8ff 245 #define _USART_CTRL_SMSDELAY_MASK 0x80000000UL /**< Bit mask for USART_SMSDELAY */
bogdanm 0:9b334a45a8ff 246 #define _USART_CTRL_SMSDELAY_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_CTRL */
bogdanm 0:9b334a45a8ff 247 #define USART_CTRL_SMSDELAY_DEFAULT (_USART_CTRL_SMSDELAY_DEFAULT << 31) /**< Shifted mode DEFAULT for USART_CTRL */
bogdanm 0:9b334a45a8ff 248
bogdanm 0:9b334a45a8ff 249 /* Bit fields for USART FRAME */
bogdanm 0:9b334a45a8ff 250 #define _USART_FRAME_RESETVALUE 0x00001005UL /**< Default value for USART_FRAME */
bogdanm 0:9b334a45a8ff 251 #define _USART_FRAME_MASK 0x0000330FUL /**< Mask for USART_FRAME */
bogdanm 0:9b334a45a8ff 252 #define _USART_FRAME_DATABITS_SHIFT 0 /**< Shift value for USART_DATABITS */
bogdanm 0:9b334a45a8ff 253 #define _USART_FRAME_DATABITS_MASK 0xFUL /**< Bit mask for USART_DATABITS */
bogdanm 0:9b334a45a8ff 254 #define _USART_FRAME_DATABITS_FOUR 0x00000001UL /**< Mode FOUR for USART_FRAME */
bogdanm 0:9b334a45a8ff 255 #define _USART_FRAME_DATABITS_FIVE 0x00000002UL /**< Mode FIVE for USART_FRAME */
bogdanm 0:9b334a45a8ff 256 #define _USART_FRAME_DATABITS_SIX 0x00000003UL /**< Mode SIX for USART_FRAME */
bogdanm 0:9b334a45a8ff 257 #define _USART_FRAME_DATABITS_SEVEN 0x00000004UL /**< Mode SEVEN for USART_FRAME */
bogdanm 0:9b334a45a8ff 258 #define _USART_FRAME_DATABITS_DEFAULT 0x00000005UL /**< Mode DEFAULT for USART_FRAME */
bogdanm 0:9b334a45a8ff 259 #define _USART_FRAME_DATABITS_EIGHT 0x00000005UL /**< Mode EIGHT for USART_FRAME */
bogdanm 0:9b334a45a8ff 260 #define _USART_FRAME_DATABITS_NINE 0x00000006UL /**< Mode NINE for USART_FRAME */
bogdanm 0:9b334a45a8ff 261 #define _USART_FRAME_DATABITS_TEN 0x00000007UL /**< Mode TEN for USART_FRAME */
bogdanm 0:9b334a45a8ff 262 #define _USART_FRAME_DATABITS_ELEVEN 0x00000008UL /**< Mode ELEVEN for USART_FRAME */
bogdanm 0:9b334a45a8ff 263 #define _USART_FRAME_DATABITS_TWELVE 0x00000009UL /**< Mode TWELVE for USART_FRAME */
bogdanm 0:9b334a45a8ff 264 #define _USART_FRAME_DATABITS_THIRTEEN 0x0000000AUL /**< Mode THIRTEEN for USART_FRAME */
bogdanm 0:9b334a45a8ff 265 #define _USART_FRAME_DATABITS_FOURTEEN 0x0000000BUL /**< Mode FOURTEEN for USART_FRAME */
bogdanm 0:9b334a45a8ff 266 #define _USART_FRAME_DATABITS_FIFTEEN 0x0000000CUL /**< Mode FIFTEEN for USART_FRAME */
bogdanm 0:9b334a45a8ff 267 #define _USART_FRAME_DATABITS_SIXTEEN 0x0000000DUL /**< Mode SIXTEEN for USART_FRAME */
bogdanm 0:9b334a45a8ff 268 #define USART_FRAME_DATABITS_FOUR (_USART_FRAME_DATABITS_FOUR << 0) /**< Shifted mode FOUR for USART_FRAME */
bogdanm 0:9b334a45a8ff 269 #define USART_FRAME_DATABITS_FIVE (_USART_FRAME_DATABITS_FIVE << 0) /**< Shifted mode FIVE for USART_FRAME */
bogdanm 0:9b334a45a8ff 270 #define USART_FRAME_DATABITS_SIX (_USART_FRAME_DATABITS_SIX << 0) /**< Shifted mode SIX for USART_FRAME */
bogdanm 0:9b334a45a8ff 271 #define USART_FRAME_DATABITS_SEVEN (_USART_FRAME_DATABITS_SEVEN << 0) /**< Shifted mode SEVEN for USART_FRAME */
bogdanm 0:9b334a45a8ff 272 #define USART_FRAME_DATABITS_DEFAULT (_USART_FRAME_DATABITS_DEFAULT << 0) /**< Shifted mode DEFAULT for USART_FRAME */
bogdanm 0:9b334a45a8ff 273 #define USART_FRAME_DATABITS_EIGHT (_USART_FRAME_DATABITS_EIGHT << 0) /**< Shifted mode EIGHT for USART_FRAME */
bogdanm 0:9b334a45a8ff 274 #define USART_FRAME_DATABITS_NINE (_USART_FRAME_DATABITS_NINE << 0) /**< Shifted mode NINE for USART_FRAME */
bogdanm 0:9b334a45a8ff 275 #define USART_FRAME_DATABITS_TEN (_USART_FRAME_DATABITS_TEN << 0) /**< Shifted mode TEN for USART_FRAME */
bogdanm 0:9b334a45a8ff 276 #define USART_FRAME_DATABITS_ELEVEN (_USART_FRAME_DATABITS_ELEVEN << 0) /**< Shifted mode ELEVEN for USART_FRAME */
bogdanm 0:9b334a45a8ff 277 #define USART_FRAME_DATABITS_TWELVE (_USART_FRAME_DATABITS_TWELVE << 0) /**< Shifted mode TWELVE for USART_FRAME */
bogdanm 0:9b334a45a8ff 278 #define USART_FRAME_DATABITS_THIRTEEN (_USART_FRAME_DATABITS_THIRTEEN << 0) /**< Shifted mode THIRTEEN for USART_FRAME */
bogdanm 0:9b334a45a8ff 279 #define USART_FRAME_DATABITS_FOURTEEN (_USART_FRAME_DATABITS_FOURTEEN << 0) /**< Shifted mode FOURTEEN for USART_FRAME */
bogdanm 0:9b334a45a8ff 280 #define USART_FRAME_DATABITS_FIFTEEN (_USART_FRAME_DATABITS_FIFTEEN << 0) /**< Shifted mode FIFTEEN for USART_FRAME */
bogdanm 0:9b334a45a8ff 281 #define USART_FRAME_DATABITS_SIXTEEN (_USART_FRAME_DATABITS_SIXTEEN << 0) /**< Shifted mode SIXTEEN for USART_FRAME */
bogdanm 0:9b334a45a8ff 282 #define _USART_FRAME_PARITY_SHIFT 8 /**< Shift value for USART_PARITY */
bogdanm 0:9b334a45a8ff 283 #define _USART_FRAME_PARITY_MASK 0x300UL /**< Bit mask for USART_PARITY */
bogdanm 0:9b334a45a8ff 284 #define _USART_FRAME_PARITY_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_FRAME */
bogdanm 0:9b334a45a8ff 285 #define _USART_FRAME_PARITY_NONE 0x00000000UL /**< Mode NONE for USART_FRAME */
bogdanm 0:9b334a45a8ff 286 #define _USART_FRAME_PARITY_EVEN 0x00000002UL /**< Mode EVEN for USART_FRAME */
bogdanm 0:9b334a45a8ff 287 #define _USART_FRAME_PARITY_ODD 0x00000003UL /**< Mode ODD for USART_FRAME */
bogdanm 0:9b334a45a8ff 288 #define USART_FRAME_PARITY_DEFAULT (_USART_FRAME_PARITY_DEFAULT << 8) /**< Shifted mode DEFAULT for USART_FRAME */
bogdanm 0:9b334a45a8ff 289 #define USART_FRAME_PARITY_NONE (_USART_FRAME_PARITY_NONE << 8) /**< Shifted mode NONE for USART_FRAME */
bogdanm 0:9b334a45a8ff 290 #define USART_FRAME_PARITY_EVEN (_USART_FRAME_PARITY_EVEN << 8) /**< Shifted mode EVEN for USART_FRAME */
bogdanm 0:9b334a45a8ff 291 #define USART_FRAME_PARITY_ODD (_USART_FRAME_PARITY_ODD << 8) /**< Shifted mode ODD for USART_FRAME */
bogdanm 0:9b334a45a8ff 292 #define _USART_FRAME_STOPBITS_SHIFT 12 /**< Shift value for USART_STOPBITS */
bogdanm 0:9b334a45a8ff 293 #define _USART_FRAME_STOPBITS_MASK 0x3000UL /**< Bit mask for USART_STOPBITS */
bogdanm 0:9b334a45a8ff 294 #define _USART_FRAME_STOPBITS_HALF 0x00000000UL /**< Mode HALF for USART_FRAME */
bogdanm 0:9b334a45a8ff 295 #define _USART_FRAME_STOPBITS_DEFAULT 0x00000001UL /**< Mode DEFAULT for USART_FRAME */
bogdanm 0:9b334a45a8ff 296 #define _USART_FRAME_STOPBITS_ONE 0x00000001UL /**< Mode ONE for USART_FRAME */
bogdanm 0:9b334a45a8ff 297 #define _USART_FRAME_STOPBITS_ONEANDAHALF 0x00000002UL /**< Mode ONEANDAHALF for USART_FRAME */
bogdanm 0:9b334a45a8ff 298 #define _USART_FRAME_STOPBITS_TWO 0x00000003UL /**< Mode TWO for USART_FRAME */
bogdanm 0:9b334a45a8ff 299 #define USART_FRAME_STOPBITS_HALF (_USART_FRAME_STOPBITS_HALF << 12) /**< Shifted mode HALF for USART_FRAME */
bogdanm 0:9b334a45a8ff 300 #define USART_FRAME_STOPBITS_DEFAULT (_USART_FRAME_STOPBITS_DEFAULT << 12) /**< Shifted mode DEFAULT for USART_FRAME */
bogdanm 0:9b334a45a8ff 301 #define USART_FRAME_STOPBITS_ONE (_USART_FRAME_STOPBITS_ONE << 12) /**< Shifted mode ONE for USART_FRAME */
bogdanm 0:9b334a45a8ff 302 #define USART_FRAME_STOPBITS_ONEANDAHALF (_USART_FRAME_STOPBITS_ONEANDAHALF << 12) /**< Shifted mode ONEANDAHALF for USART_FRAME */
bogdanm 0:9b334a45a8ff 303 #define USART_FRAME_STOPBITS_TWO (_USART_FRAME_STOPBITS_TWO << 12) /**< Shifted mode TWO for USART_FRAME */
bogdanm 0:9b334a45a8ff 304
bogdanm 0:9b334a45a8ff 305 /* Bit fields for USART TRIGCTRL */
bogdanm 0:9b334a45a8ff 306 #define _USART_TRIGCTRL_RESETVALUE 0x00000000UL /**< Default value for USART_TRIGCTRL */
bogdanm 0:9b334a45a8ff 307 #define _USART_TRIGCTRL_MASK 0x00000073UL /**< Mask for USART_TRIGCTRL */
bogdanm 0:9b334a45a8ff 308 #define _USART_TRIGCTRL_TSEL_SHIFT 0 /**< Shift value for USART_TSEL */
bogdanm 0:9b334a45a8ff 309 #define _USART_TRIGCTRL_TSEL_MASK 0x3UL /**< Bit mask for USART_TSEL */
bogdanm 0:9b334a45a8ff 310 #define _USART_TRIGCTRL_TSEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_TRIGCTRL */
bogdanm 0:9b334a45a8ff 311 #define _USART_TRIGCTRL_TSEL_PRSCH0 0x00000000UL /**< Mode PRSCH0 for USART_TRIGCTRL */
bogdanm 0:9b334a45a8ff 312 #define _USART_TRIGCTRL_TSEL_PRSCH1 0x00000001UL /**< Mode PRSCH1 for USART_TRIGCTRL */
bogdanm 0:9b334a45a8ff 313 #define _USART_TRIGCTRL_TSEL_PRSCH2 0x00000002UL /**< Mode PRSCH2 for USART_TRIGCTRL */
bogdanm 0:9b334a45a8ff 314 #define _USART_TRIGCTRL_TSEL_PRSCH3 0x00000003UL /**< Mode PRSCH3 for USART_TRIGCTRL */
bogdanm 0:9b334a45a8ff 315 #define USART_TRIGCTRL_TSEL_DEFAULT (_USART_TRIGCTRL_TSEL_DEFAULT << 0) /**< Shifted mode DEFAULT for USART_TRIGCTRL */
bogdanm 0:9b334a45a8ff 316 #define USART_TRIGCTRL_TSEL_PRSCH0 (_USART_TRIGCTRL_TSEL_PRSCH0 << 0) /**< Shifted mode PRSCH0 for USART_TRIGCTRL */
bogdanm 0:9b334a45a8ff 317 #define USART_TRIGCTRL_TSEL_PRSCH1 (_USART_TRIGCTRL_TSEL_PRSCH1 << 0) /**< Shifted mode PRSCH1 for USART_TRIGCTRL */
bogdanm 0:9b334a45a8ff 318 #define USART_TRIGCTRL_TSEL_PRSCH2 (_USART_TRIGCTRL_TSEL_PRSCH2 << 0) /**< Shifted mode PRSCH2 for USART_TRIGCTRL */
bogdanm 0:9b334a45a8ff 319 #define USART_TRIGCTRL_TSEL_PRSCH3 (_USART_TRIGCTRL_TSEL_PRSCH3 << 0) /**< Shifted mode PRSCH3 for USART_TRIGCTRL */
bogdanm 0:9b334a45a8ff 320 #define USART_TRIGCTRL_RXTEN (0x1UL << 4) /**< Receive Trigger Enable */
bogdanm 0:9b334a45a8ff 321 #define _USART_TRIGCTRL_RXTEN_SHIFT 4 /**< Shift value for USART_RXTEN */
bogdanm 0:9b334a45a8ff 322 #define _USART_TRIGCTRL_RXTEN_MASK 0x10UL /**< Bit mask for USART_RXTEN */
bogdanm 0:9b334a45a8ff 323 #define _USART_TRIGCTRL_RXTEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_TRIGCTRL */
bogdanm 0:9b334a45a8ff 324 #define USART_TRIGCTRL_RXTEN_DEFAULT (_USART_TRIGCTRL_RXTEN_DEFAULT << 4) /**< Shifted mode DEFAULT for USART_TRIGCTRL */
bogdanm 0:9b334a45a8ff 325 #define USART_TRIGCTRL_TXTEN (0x1UL << 5) /**< Transmit Trigger Enable */
bogdanm 0:9b334a45a8ff 326 #define _USART_TRIGCTRL_TXTEN_SHIFT 5 /**< Shift value for USART_TXTEN */
bogdanm 0:9b334a45a8ff 327 #define _USART_TRIGCTRL_TXTEN_MASK 0x20UL /**< Bit mask for USART_TXTEN */
bogdanm 0:9b334a45a8ff 328 #define _USART_TRIGCTRL_TXTEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_TRIGCTRL */
bogdanm 0:9b334a45a8ff 329 #define USART_TRIGCTRL_TXTEN_DEFAULT (_USART_TRIGCTRL_TXTEN_DEFAULT << 5) /**< Shifted mode DEFAULT for USART_TRIGCTRL */
bogdanm 0:9b334a45a8ff 330 #define USART_TRIGCTRL_AUTOTXTEN (0x1UL << 6) /**< AUTOTX Trigger Enable */
bogdanm 0:9b334a45a8ff 331 #define _USART_TRIGCTRL_AUTOTXTEN_SHIFT 6 /**< Shift value for USART_AUTOTXTEN */
bogdanm 0:9b334a45a8ff 332 #define _USART_TRIGCTRL_AUTOTXTEN_MASK 0x40UL /**< Bit mask for USART_AUTOTXTEN */
bogdanm 0:9b334a45a8ff 333 #define _USART_TRIGCTRL_AUTOTXTEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_TRIGCTRL */
bogdanm 0:9b334a45a8ff 334 #define USART_TRIGCTRL_AUTOTXTEN_DEFAULT (_USART_TRIGCTRL_AUTOTXTEN_DEFAULT << 6) /**< Shifted mode DEFAULT for USART_TRIGCTRL */
bogdanm 0:9b334a45a8ff 335
bogdanm 0:9b334a45a8ff 336 /* Bit fields for USART CMD */
bogdanm 0:9b334a45a8ff 337 #define _USART_CMD_RESETVALUE 0x00000000UL /**< Default value for USART_CMD */
bogdanm 0:9b334a45a8ff 338 #define _USART_CMD_MASK 0x00000FFFUL /**< Mask for USART_CMD */
bogdanm 0:9b334a45a8ff 339 #define USART_CMD_RXEN (0x1UL << 0) /**< Receiver Enable */
bogdanm 0:9b334a45a8ff 340 #define _USART_CMD_RXEN_SHIFT 0 /**< Shift value for USART_RXEN */
bogdanm 0:9b334a45a8ff 341 #define _USART_CMD_RXEN_MASK 0x1UL /**< Bit mask for USART_RXEN */
bogdanm 0:9b334a45a8ff 342 #define _USART_CMD_RXEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_CMD */
bogdanm 0:9b334a45a8ff 343 #define USART_CMD_RXEN_DEFAULT (_USART_CMD_RXEN_DEFAULT << 0) /**< Shifted mode DEFAULT for USART_CMD */
bogdanm 0:9b334a45a8ff 344 #define USART_CMD_RXDIS (0x1UL << 1) /**< Receiver Disable */
bogdanm 0:9b334a45a8ff 345 #define _USART_CMD_RXDIS_SHIFT 1 /**< Shift value for USART_RXDIS */
bogdanm 0:9b334a45a8ff 346 #define _USART_CMD_RXDIS_MASK 0x2UL /**< Bit mask for USART_RXDIS */
bogdanm 0:9b334a45a8ff 347 #define _USART_CMD_RXDIS_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_CMD */
bogdanm 0:9b334a45a8ff 348 #define USART_CMD_RXDIS_DEFAULT (_USART_CMD_RXDIS_DEFAULT << 1) /**< Shifted mode DEFAULT for USART_CMD */
bogdanm 0:9b334a45a8ff 349 #define USART_CMD_TXEN (0x1UL << 2) /**< Transmitter Enable */
bogdanm 0:9b334a45a8ff 350 #define _USART_CMD_TXEN_SHIFT 2 /**< Shift value for USART_TXEN */
bogdanm 0:9b334a45a8ff 351 #define _USART_CMD_TXEN_MASK 0x4UL /**< Bit mask for USART_TXEN */
bogdanm 0:9b334a45a8ff 352 #define _USART_CMD_TXEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_CMD */
bogdanm 0:9b334a45a8ff 353 #define USART_CMD_TXEN_DEFAULT (_USART_CMD_TXEN_DEFAULT << 2) /**< Shifted mode DEFAULT for USART_CMD */
bogdanm 0:9b334a45a8ff 354 #define USART_CMD_TXDIS (0x1UL << 3) /**< Transmitter Disable */
bogdanm 0:9b334a45a8ff 355 #define _USART_CMD_TXDIS_SHIFT 3 /**< Shift value for USART_TXDIS */
bogdanm 0:9b334a45a8ff 356 #define _USART_CMD_TXDIS_MASK 0x8UL /**< Bit mask for USART_TXDIS */
bogdanm 0:9b334a45a8ff 357 #define _USART_CMD_TXDIS_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_CMD */
bogdanm 0:9b334a45a8ff 358 #define USART_CMD_TXDIS_DEFAULT (_USART_CMD_TXDIS_DEFAULT << 3) /**< Shifted mode DEFAULT for USART_CMD */
bogdanm 0:9b334a45a8ff 359 #define USART_CMD_MASTEREN (0x1UL << 4) /**< Master Enable */
bogdanm 0:9b334a45a8ff 360 #define _USART_CMD_MASTEREN_SHIFT 4 /**< Shift value for USART_MASTEREN */
bogdanm 0:9b334a45a8ff 361 #define _USART_CMD_MASTEREN_MASK 0x10UL /**< Bit mask for USART_MASTEREN */
bogdanm 0:9b334a45a8ff 362 #define _USART_CMD_MASTEREN_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_CMD */
bogdanm 0:9b334a45a8ff 363 #define USART_CMD_MASTEREN_DEFAULT (_USART_CMD_MASTEREN_DEFAULT << 4) /**< Shifted mode DEFAULT for USART_CMD */
bogdanm 0:9b334a45a8ff 364 #define USART_CMD_MASTERDIS (0x1UL << 5) /**< Master Disable */
bogdanm 0:9b334a45a8ff 365 #define _USART_CMD_MASTERDIS_SHIFT 5 /**< Shift value for USART_MASTERDIS */
bogdanm 0:9b334a45a8ff 366 #define _USART_CMD_MASTERDIS_MASK 0x20UL /**< Bit mask for USART_MASTERDIS */
bogdanm 0:9b334a45a8ff 367 #define _USART_CMD_MASTERDIS_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_CMD */
bogdanm 0:9b334a45a8ff 368 #define USART_CMD_MASTERDIS_DEFAULT (_USART_CMD_MASTERDIS_DEFAULT << 5) /**< Shifted mode DEFAULT for USART_CMD */
bogdanm 0:9b334a45a8ff 369 #define USART_CMD_RXBLOCKEN (0x1UL << 6) /**< Receiver Block Enable */
bogdanm 0:9b334a45a8ff 370 #define _USART_CMD_RXBLOCKEN_SHIFT 6 /**< Shift value for USART_RXBLOCKEN */
bogdanm 0:9b334a45a8ff 371 #define _USART_CMD_RXBLOCKEN_MASK 0x40UL /**< Bit mask for USART_RXBLOCKEN */
bogdanm 0:9b334a45a8ff 372 #define _USART_CMD_RXBLOCKEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_CMD */
bogdanm 0:9b334a45a8ff 373 #define USART_CMD_RXBLOCKEN_DEFAULT (_USART_CMD_RXBLOCKEN_DEFAULT << 6) /**< Shifted mode DEFAULT for USART_CMD */
bogdanm 0:9b334a45a8ff 374 #define USART_CMD_RXBLOCKDIS (0x1UL << 7) /**< Receiver Block Disable */
bogdanm 0:9b334a45a8ff 375 #define _USART_CMD_RXBLOCKDIS_SHIFT 7 /**< Shift value for USART_RXBLOCKDIS */
bogdanm 0:9b334a45a8ff 376 #define _USART_CMD_RXBLOCKDIS_MASK 0x80UL /**< Bit mask for USART_RXBLOCKDIS */
bogdanm 0:9b334a45a8ff 377 #define _USART_CMD_RXBLOCKDIS_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_CMD */
bogdanm 0:9b334a45a8ff 378 #define USART_CMD_RXBLOCKDIS_DEFAULT (_USART_CMD_RXBLOCKDIS_DEFAULT << 7) /**< Shifted mode DEFAULT for USART_CMD */
bogdanm 0:9b334a45a8ff 379 #define USART_CMD_TXTRIEN (0x1UL << 8) /**< Transmitter Tristate Enable */
bogdanm 0:9b334a45a8ff 380 #define _USART_CMD_TXTRIEN_SHIFT 8 /**< Shift value for USART_TXTRIEN */
bogdanm 0:9b334a45a8ff 381 #define _USART_CMD_TXTRIEN_MASK 0x100UL /**< Bit mask for USART_TXTRIEN */
bogdanm 0:9b334a45a8ff 382 #define _USART_CMD_TXTRIEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_CMD */
bogdanm 0:9b334a45a8ff 383 #define USART_CMD_TXTRIEN_DEFAULT (_USART_CMD_TXTRIEN_DEFAULT << 8) /**< Shifted mode DEFAULT for USART_CMD */
bogdanm 0:9b334a45a8ff 384 #define USART_CMD_TXTRIDIS (0x1UL << 9) /**< Transmitter Tristate Disable */
bogdanm 0:9b334a45a8ff 385 #define _USART_CMD_TXTRIDIS_SHIFT 9 /**< Shift value for USART_TXTRIDIS */
bogdanm 0:9b334a45a8ff 386 #define _USART_CMD_TXTRIDIS_MASK 0x200UL /**< Bit mask for USART_TXTRIDIS */
bogdanm 0:9b334a45a8ff 387 #define _USART_CMD_TXTRIDIS_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_CMD */
bogdanm 0:9b334a45a8ff 388 #define USART_CMD_TXTRIDIS_DEFAULT (_USART_CMD_TXTRIDIS_DEFAULT << 9) /**< Shifted mode DEFAULT for USART_CMD */
bogdanm 0:9b334a45a8ff 389 #define USART_CMD_CLEARTX (0x1UL << 10) /**< Clear TX */
bogdanm 0:9b334a45a8ff 390 #define _USART_CMD_CLEARTX_SHIFT 10 /**< Shift value for USART_CLEARTX */
bogdanm 0:9b334a45a8ff 391 #define _USART_CMD_CLEARTX_MASK 0x400UL /**< Bit mask for USART_CLEARTX */
bogdanm 0:9b334a45a8ff 392 #define _USART_CMD_CLEARTX_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_CMD */
bogdanm 0:9b334a45a8ff 393 #define USART_CMD_CLEARTX_DEFAULT (_USART_CMD_CLEARTX_DEFAULT << 10) /**< Shifted mode DEFAULT for USART_CMD */
bogdanm 0:9b334a45a8ff 394 #define USART_CMD_CLEARRX (0x1UL << 11) /**< Clear RX */
bogdanm 0:9b334a45a8ff 395 #define _USART_CMD_CLEARRX_SHIFT 11 /**< Shift value for USART_CLEARRX */
bogdanm 0:9b334a45a8ff 396 #define _USART_CMD_CLEARRX_MASK 0x800UL /**< Bit mask for USART_CLEARRX */
bogdanm 0:9b334a45a8ff 397 #define _USART_CMD_CLEARRX_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_CMD */
bogdanm 0:9b334a45a8ff 398 #define USART_CMD_CLEARRX_DEFAULT (_USART_CMD_CLEARRX_DEFAULT << 11) /**< Shifted mode DEFAULT for USART_CMD */
bogdanm 0:9b334a45a8ff 399
bogdanm 0:9b334a45a8ff 400 /* Bit fields for USART STATUS */
bogdanm 0:9b334a45a8ff 401 #define _USART_STATUS_RESETVALUE 0x00000040UL /**< Default value for USART_STATUS */
bogdanm 0:9b334a45a8ff 402 #define _USART_STATUS_MASK 0x00001FFFUL /**< Mask for USART_STATUS */
bogdanm 0:9b334a45a8ff 403 #define USART_STATUS_RXENS (0x1UL << 0) /**< Receiver Enable Status */
bogdanm 0:9b334a45a8ff 404 #define _USART_STATUS_RXENS_SHIFT 0 /**< Shift value for USART_RXENS */
bogdanm 0:9b334a45a8ff 405 #define _USART_STATUS_RXENS_MASK 0x1UL /**< Bit mask for USART_RXENS */
bogdanm 0:9b334a45a8ff 406 #define _USART_STATUS_RXENS_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_STATUS */
bogdanm 0:9b334a45a8ff 407 #define USART_STATUS_RXENS_DEFAULT (_USART_STATUS_RXENS_DEFAULT << 0) /**< Shifted mode DEFAULT for USART_STATUS */
bogdanm 0:9b334a45a8ff 408 #define USART_STATUS_TXENS (0x1UL << 1) /**< Transmitter Enable Status */
bogdanm 0:9b334a45a8ff 409 #define _USART_STATUS_TXENS_SHIFT 1 /**< Shift value for USART_TXENS */
bogdanm 0:9b334a45a8ff 410 #define _USART_STATUS_TXENS_MASK 0x2UL /**< Bit mask for USART_TXENS */
bogdanm 0:9b334a45a8ff 411 #define _USART_STATUS_TXENS_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_STATUS */
bogdanm 0:9b334a45a8ff 412 #define USART_STATUS_TXENS_DEFAULT (_USART_STATUS_TXENS_DEFAULT << 1) /**< Shifted mode DEFAULT for USART_STATUS */
bogdanm 0:9b334a45a8ff 413 #define USART_STATUS_MASTER (0x1UL << 2) /**< SPI Master Mode */
bogdanm 0:9b334a45a8ff 414 #define _USART_STATUS_MASTER_SHIFT 2 /**< Shift value for USART_MASTER */
bogdanm 0:9b334a45a8ff 415 #define _USART_STATUS_MASTER_MASK 0x4UL /**< Bit mask for USART_MASTER */
bogdanm 0:9b334a45a8ff 416 #define _USART_STATUS_MASTER_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_STATUS */
bogdanm 0:9b334a45a8ff 417 #define USART_STATUS_MASTER_DEFAULT (_USART_STATUS_MASTER_DEFAULT << 2) /**< Shifted mode DEFAULT for USART_STATUS */
bogdanm 0:9b334a45a8ff 418 #define USART_STATUS_RXBLOCK (0x1UL << 3) /**< Block Incoming Data */
bogdanm 0:9b334a45a8ff 419 #define _USART_STATUS_RXBLOCK_SHIFT 3 /**< Shift value for USART_RXBLOCK */
bogdanm 0:9b334a45a8ff 420 #define _USART_STATUS_RXBLOCK_MASK 0x8UL /**< Bit mask for USART_RXBLOCK */
bogdanm 0:9b334a45a8ff 421 #define _USART_STATUS_RXBLOCK_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_STATUS */
bogdanm 0:9b334a45a8ff 422 #define USART_STATUS_RXBLOCK_DEFAULT (_USART_STATUS_RXBLOCK_DEFAULT << 3) /**< Shifted mode DEFAULT for USART_STATUS */
bogdanm 0:9b334a45a8ff 423 #define USART_STATUS_TXTRI (0x1UL << 4) /**< Transmitter Tristated */
bogdanm 0:9b334a45a8ff 424 #define _USART_STATUS_TXTRI_SHIFT 4 /**< Shift value for USART_TXTRI */
bogdanm 0:9b334a45a8ff 425 #define _USART_STATUS_TXTRI_MASK 0x10UL /**< Bit mask for USART_TXTRI */
bogdanm 0:9b334a45a8ff 426 #define _USART_STATUS_TXTRI_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_STATUS */
bogdanm 0:9b334a45a8ff 427 #define USART_STATUS_TXTRI_DEFAULT (_USART_STATUS_TXTRI_DEFAULT << 4) /**< Shifted mode DEFAULT for USART_STATUS */
bogdanm 0:9b334a45a8ff 428 #define USART_STATUS_TXC (0x1UL << 5) /**< TX Complete */
bogdanm 0:9b334a45a8ff 429 #define _USART_STATUS_TXC_SHIFT 5 /**< Shift value for USART_TXC */
bogdanm 0:9b334a45a8ff 430 #define _USART_STATUS_TXC_MASK 0x20UL /**< Bit mask for USART_TXC */
bogdanm 0:9b334a45a8ff 431 #define _USART_STATUS_TXC_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_STATUS */
bogdanm 0:9b334a45a8ff 432 #define USART_STATUS_TXC_DEFAULT (_USART_STATUS_TXC_DEFAULT << 5) /**< Shifted mode DEFAULT for USART_STATUS */
bogdanm 0:9b334a45a8ff 433 #define USART_STATUS_TXBL (0x1UL << 6) /**< TX Buffer Level */
bogdanm 0:9b334a45a8ff 434 #define _USART_STATUS_TXBL_SHIFT 6 /**< Shift value for USART_TXBL */
bogdanm 0:9b334a45a8ff 435 #define _USART_STATUS_TXBL_MASK 0x40UL /**< Bit mask for USART_TXBL */
bogdanm 0:9b334a45a8ff 436 #define _USART_STATUS_TXBL_DEFAULT 0x00000001UL /**< Mode DEFAULT for USART_STATUS */
bogdanm 0:9b334a45a8ff 437 #define USART_STATUS_TXBL_DEFAULT (_USART_STATUS_TXBL_DEFAULT << 6) /**< Shifted mode DEFAULT for USART_STATUS */
bogdanm 0:9b334a45a8ff 438 #define USART_STATUS_RXDATAV (0x1UL << 7) /**< RX Data Valid */
bogdanm 0:9b334a45a8ff 439 #define _USART_STATUS_RXDATAV_SHIFT 7 /**< Shift value for USART_RXDATAV */
bogdanm 0:9b334a45a8ff 440 #define _USART_STATUS_RXDATAV_MASK 0x80UL /**< Bit mask for USART_RXDATAV */
bogdanm 0:9b334a45a8ff 441 #define _USART_STATUS_RXDATAV_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_STATUS */
bogdanm 0:9b334a45a8ff 442 #define USART_STATUS_RXDATAV_DEFAULT (_USART_STATUS_RXDATAV_DEFAULT << 7) /**< Shifted mode DEFAULT for USART_STATUS */
bogdanm 0:9b334a45a8ff 443 #define USART_STATUS_RXFULL (0x1UL << 8) /**< RX FIFO Full */
bogdanm 0:9b334a45a8ff 444 #define _USART_STATUS_RXFULL_SHIFT 8 /**< Shift value for USART_RXFULL */
bogdanm 0:9b334a45a8ff 445 #define _USART_STATUS_RXFULL_MASK 0x100UL /**< Bit mask for USART_RXFULL */
bogdanm 0:9b334a45a8ff 446 #define _USART_STATUS_RXFULL_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_STATUS */
bogdanm 0:9b334a45a8ff 447 #define USART_STATUS_RXFULL_DEFAULT (_USART_STATUS_RXFULL_DEFAULT << 8) /**< Shifted mode DEFAULT for USART_STATUS */
bogdanm 0:9b334a45a8ff 448 #define USART_STATUS_TXBDRIGHT (0x1UL << 9) /**< TX Buffer Expects Double Right Data */
bogdanm 0:9b334a45a8ff 449 #define _USART_STATUS_TXBDRIGHT_SHIFT 9 /**< Shift value for USART_TXBDRIGHT */
bogdanm 0:9b334a45a8ff 450 #define _USART_STATUS_TXBDRIGHT_MASK 0x200UL /**< Bit mask for USART_TXBDRIGHT */
bogdanm 0:9b334a45a8ff 451 #define _USART_STATUS_TXBDRIGHT_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_STATUS */
bogdanm 0:9b334a45a8ff 452 #define USART_STATUS_TXBDRIGHT_DEFAULT (_USART_STATUS_TXBDRIGHT_DEFAULT << 9) /**< Shifted mode DEFAULT for USART_STATUS */
bogdanm 0:9b334a45a8ff 453 #define USART_STATUS_TXBSRIGHT (0x1UL << 10) /**< TX Buffer Expects Single Right Data */
bogdanm 0:9b334a45a8ff 454 #define _USART_STATUS_TXBSRIGHT_SHIFT 10 /**< Shift value for USART_TXBSRIGHT */
bogdanm 0:9b334a45a8ff 455 #define _USART_STATUS_TXBSRIGHT_MASK 0x400UL /**< Bit mask for USART_TXBSRIGHT */
bogdanm 0:9b334a45a8ff 456 #define _USART_STATUS_TXBSRIGHT_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_STATUS */
bogdanm 0:9b334a45a8ff 457 #define USART_STATUS_TXBSRIGHT_DEFAULT (_USART_STATUS_TXBSRIGHT_DEFAULT << 10) /**< Shifted mode DEFAULT for USART_STATUS */
bogdanm 0:9b334a45a8ff 458 #define USART_STATUS_RXDATAVRIGHT (0x1UL << 11) /**< RX Data Right */
bogdanm 0:9b334a45a8ff 459 #define _USART_STATUS_RXDATAVRIGHT_SHIFT 11 /**< Shift value for USART_RXDATAVRIGHT */
bogdanm 0:9b334a45a8ff 460 #define _USART_STATUS_RXDATAVRIGHT_MASK 0x800UL /**< Bit mask for USART_RXDATAVRIGHT */
bogdanm 0:9b334a45a8ff 461 #define _USART_STATUS_RXDATAVRIGHT_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_STATUS */
bogdanm 0:9b334a45a8ff 462 #define USART_STATUS_RXDATAVRIGHT_DEFAULT (_USART_STATUS_RXDATAVRIGHT_DEFAULT << 11) /**< Shifted mode DEFAULT for USART_STATUS */
bogdanm 0:9b334a45a8ff 463 #define USART_STATUS_RXFULLRIGHT (0x1UL << 12) /**< RX Full of Right Data */
bogdanm 0:9b334a45a8ff 464 #define _USART_STATUS_RXFULLRIGHT_SHIFT 12 /**< Shift value for USART_RXFULLRIGHT */
bogdanm 0:9b334a45a8ff 465 #define _USART_STATUS_RXFULLRIGHT_MASK 0x1000UL /**< Bit mask for USART_RXFULLRIGHT */
bogdanm 0:9b334a45a8ff 466 #define _USART_STATUS_RXFULLRIGHT_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_STATUS */
bogdanm 0:9b334a45a8ff 467 #define USART_STATUS_RXFULLRIGHT_DEFAULT (_USART_STATUS_RXFULLRIGHT_DEFAULT << 12) /**< Shifted mode DEFAULT for USART_STATUS */
bogdanm 0:9b334a45a8ff 468
bogdanm 0:9b334a45a8ff 469 /* Bit fields for USART CLKDIV */
bogdanm 0:9b334a45a8ff 470 #define _USART_CLKDIV_RESETVALUE 0x00000000UL /**< Default value for USART_CLKDIV */
bogdanm 0:9b334a45a8ff 471 #define _USART_CLKDIV_MASK 0x001FFFC0UL /**< Mask for USART_CLKDIV */
bogdanm 0:9b334a45a8ff 472 #define _USART_CLKDIV_DIV_SHIFT 6 /**< Shift value for USART_DIV */
bogdanm 0:9b334a45a8ff 473 #define _USART_CLKDIV_DIV_MASK 0x1FFFC0UL /**< Bit mask for USART_DIV */
bogdanm 0:9b334a45a8ff 474 #define _USART_CLKDIV_DIV_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_CLKDIV */
bogdanm 0:9b334a45a8ff 475 #define USART_CLKDIV_DIV_DEFAULT (_USART_CLKDIV_DIV_DEFAULT << 6) /**< Shifted mode DEFAULT for USART_CLKDIV */
bogdanm 0:9b334a45a8ff 476
bogdanm 0:9b334a45a8ff 477 /* Bit fields for USART RXDATAX */
bogdanm 0:9b334a45a8ff 478 #define _USART_RXDATAX_RESETVALUE 0x00000000UL /**< Default value for USART_RXDATAX */
bogdanm 0:9b334a45a8ff 479 #define _USART_RXDATAX_MASK 0x0000C1FFUL /**< Mask for USART_RXDATAX */
bogdanm 0:9b334a45a8ff 480 #define _USART_RXDATAX_RXDATA_SHIFT 0 /**< Shift value for USART_RXDATA */
bogdanm 0:9b334a45a8ff 481 #define _USART_RXDATAX_RXDATA_MASK 0x1FFUL /**< Bit mask for USART_RXDATA */
bogdanm 0:9b334a45a8ff 482 #define _USART_RXDATAX_RXDATA_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_RXDATAX */
bogdanm 0:9b334a45a8ff 483 #define USART_RXDATAX_RXDATA_DEFAULT (_USART_RXDATAX_RXDATA_DEFAULT << 0) /**< Shifted mode DEFAULT for USART_RXDATAX */
bogdanm 0:9b334a45a8ff 484 #define USART_RXDATAX_PERR (0x1UL << 14) /**< Data Parity Error */
bogdanm 0:9b334a45a8ff 485 #define _USART_RXDATAX_PERR_SHIFT 14 /**< Shift value for USART_PERR */
bogdanm 0:9b334a45a8ff 486 #define _USART_RXDATAX_PERR_MASK 0x4000UL /**< Bit mask for USART_PERR */
bogdanm 0:9b334a45a8ff 487 #define _USART_RXDATAX_PERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_RXDATAX */
bogdanm 0:9b334a45a8ff 488 #define USART_RXDATAX_PERR_DEFAULT (_USART_RXDATAX_PERR_DEFAULT << 14) /**< Shifted mode DEFAULT for USART_RXDATAX */
bogdanm 0:9b334a45a8ff 489 #define USART_RXDATAX_FERR (0x1UL << 15) /**< Data Framing Error */
bogdanm 0:9b334a45a8ff 490 #define _USART_RXDATAX_FERR_SHIFT 15 /**< Shift value for USART_FERR */
bogdanm 0:9b334a45a8ff 491 #define _USART_RXDATAX_FERR_MASK 0x8000UL /**< Bit mask for USART_FERR */
bogdanm 0:9b334a45a8ff 492 #define _USART_RXDATAX_FERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_RXDATAX */
bogdanm 0:9b334a45a8ff 493 #define USART_RXDATAX_FERR_DEFAULT (_USART_RXDATAX_FERR_DEFAULT << 15) /**< Shifted mode DEFAULT for USART_RXDATAX */
bogdanm 0:9b334a45a8ff 494
bogdanm 0:9b334a45a8ff 495 /* Bit fields for USART RXDATA */
bogdanm 0:9b334a45a8ff 496 #define _USART_RXDATA_RESETVALUE 0x00000000UL /**< Default value for USART_RXDATA */
bogdanm 0:9b334a45a8ff 497 #define _USART_RXDATA_MASK 0x000000FFUL /**< Mask for USART_RXDATA */
bogdanm 0:9b334a45a8ff 498 #define _USART_RXDATA_RXDATA_SHIFT 0 /**< Shift value for USART_RXDATA */
bogdanm 0:9b334a45a8ff 499 #define _USART_RXDATA_RXDATA_MASK 0xFFUL /**< Bit mask for USART_RXDATA */
bogdanm 0:9b334a45a8ff 500 #define _USART_RXDATA_RXDATA_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_RXDATA */
bogdanm 0:9b334a45a8ff 501 #define USART_RXDATA_RXDATA_DEFAULT (_USART_RXDATA_RXDATA_DEFAULT << 0) /**< Shifted mode DEFAULT for USART_RXDATA */
bogdanm 0:9b334a45a8ff 502
bogdanm 0:9b334a45a8ff 503 /* Bit fields for USART RXDOUBLEX */
bogdanm 0:9b334a45a8ff 504 #define _USART_RXDOUBLEX_RESETVALUE 0x00000000UL /**< Default value for USART_RXDOUBLEX */
bogdanm 0:9b334a45a8ff 505 #define _USART_RXDOUBLEX_MASK 0xC1FFC1FFUL /**< Mask for USART_RXDOUBLEX */
bogdanm 0:9b334a45a8ff 506 #define _USART_RXDOUBLEX_RXDATA0_SHIFT 0 /**< Shift value for USART_RXDATA0 */
bogdanm 0:9b334a45a8ff 507 #define _USART_RXDOUBLEX_RXDATA0_MASK 0x1FFUL /**< Bit mask for USART_RXDATA0 */
bogdanm 0:9b334a45a8ff 508 #define _USART_RXDOUBLEX_RXDATA0_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_RXDOUBLEX */
bogdanm 0:9b334a45a8ff 509 #define USART_RXDOUBLEX_RXDATA0_DEFAULT (_USART_RXDOUBLEX_RXDATA0_DEFAULT << 0) /**< Shifted mode DEFAULT for USART_RXDOUBLEX */
bogdanm 0:9b334a45a8ff 510 #define USART_RXDOUBLEX_PERR0 (0x1UL << 14) /**< Data Parity Error 0 */
bogdanm 0:9b334a45a8ff 511 #define _USART_RXDOUBLEX_PERR0_SHIFT 14 /**< Shift value for USART_PERR0 */
bogdanm 0:9b334a45a8ff 512 #define _USART_RXDOUBLEX_PERR0_MASK 0x4000UL /**< Bit mask for USART_PERR0 */
bogdanm 0:9b334a45a8ff 513 #define _USART_RXDOUBLEX_PERR0_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_RXDOUBLEX */
bogdanm 0:9b334a45a8ff 514 #define USART_RXDOUBLEX_PERR0_DEFAULT (_USART_RXDOUBLEX_PERR0_DEFAULT << 14) /**< Shifted mode DEFAULT for USART_RXDOUBLEX */
bogdanm 0:9b334a45a8ff 515 #define USART_RXDOUBLEX_FERR0 (0x1UL << 15) /**< Data Framing Error 0 */
bogdanm 0:9b334a45a8ff 516 #define _USART_RXDOUBLEX_FERR0_SHIFT 15 /**< Shift value for USART_FERR0 */
bogdanm 0:9b334a45a8ff 517 #define _USART_RXDOUBLEX_FERR0_MASK 0x8000UL /**< Bit mask for USART_FERR0 */
bogdanm 0:9b334a45a8ff 518 #define _USART_RXDOUBLEX_FERR0_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_RXDOUBLEX */
bogdanm 0:9b334a45a8ff 519 #define USART_RXDOUBLEX_FERR0_DEFAULT (_USART_RXDOUBLEX_FERR0_DEFAULT << 15) /**< Shifted mode DEFAULT for USART_RXDOUBLEX */
bogdanm 0:9b334a45a8ff 520 #define _USART_RXDOUBLEX_RXDATA1_SHIFT 16 /**< Shift value for USART_RXDATA1 */
bogdanm 0:9b334a45a8ff 521 #define _USART_RXDOUBLEX_RXDATA1_MASK 0x1FF0000UL /**< Bit mask for USART_RXDATA1 */
bogdanm 0:9b334a45a8ff 522 #define _USART_RXDOUBLEX_RXDATA1_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_RXDOUBLEX */
bogdanm 0:9b334a45a8ff 523 #define USART_RXDOUBLEX_RXDATA1_DEFAULT (_USART_RXDOUBLEX_RXDATA1_DEFAULT << 16) /**< Shifted mode DEFAULT for USART_RXDOUBLEX */
bogdanm 0:9b334a45a8ff 524 #define USART_RXDOUBLEX_PERR1 (0x1UL << 30) /**< Data Parity Error 1 */
bogdanm 0:9b334a45a8ff 525 #define _USART_RXDOUBLEX_PERR1_SHIFT 30 /**< Shift value for USART_PERR1 */
bogdanm 0:9b334a45a8ff 526 #define _USART_RXDOUBLEX_PERR1_MASK 0x40000000UL /**< Bit mask for USART_PERR1 */
bogdanm 0:9b334a45a8ff 527 #define _USART_RXDOUBLEX_PERR1_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_RXDOUBLEX */
bogdanm 0:9b334a45a8ff 528 #define USART_RXDOUBLEX_PERR1_DEFAULT (_USART_RXDOUBLEX_PERR1_DEFAULT << 30) /**< Shifted mode DEFAULT for USART_RXDOUBLEX */
bogdanm 0:9b334a45a8ff 529 #define USART_RXDOUBLEX_FERR1 (0x1UL << 31) /**< Data Framing Error 1 */
bogdanm 0:9b334a45a8ff 530 #define _USART_RXDOUBLEX_FERR1_SHIFT 31 /**< Shift value for USART_FERR1 */
bogdanm 0:9b334a45a8ff 531 #define _USART_RXDOUBLEX_FERR1_MASK 0x80000000UL /**< Bit mask for USART_FERR1 */
bogdanm 0:9b334a45a8ff 532 #define _USART_RXDOUBLEX_FERR1_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_RXDOUBLEX */
bogdanm 0:9b334a45a8ff 533 #define USART_RXDOUBLEX_FERR1_DEFAULT (_USART_RXDOUBLEX_FERR1_DEFAULT << 31) /**< Shifted mode DEFAULT for USART_RXDOUBLEX */
bogdanm 0:9b334a45a8ff 534
bogdanm 0:9b334a45a8ff 535 /* Bit fields for USART RXDOUBLE */
bogdanm 0:9b334a45a8ff 536 #define _USART_RXDOUBLE_RESETVALUE 0x00000000UL /**< Default value for USART_RXDOUBLE */
bogdanm 0:9b334a45a8ff 537 #define _USART_RXDOUBLE_MASK 0x0000FFFFUL /**< Mask for USART_RXDOUBLE */
bogdanm 0:9b334a45a8ff 538 #define _USART_RXDOUBLE_RXDATA0_SHIFT 0 /**< Shift value for USART_RXDATA0 */
bogdanm 0:9b334a45a8ff 539 #define _USART_RXDOUBLE_RXDATA0_MASK 0xFFUL /**< Bit mask for USART_RXDATA0 */
bogdanm 0:9b334a45a8ff 540 #define _USART_RXDOUBLE_RXDATA0_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_RXDOUBLE */
bogdanm 0:9b334a45a8ff 541 #define USART_RXDOUBLE_RXDATA0_DEFAULT (_USART_RXDOUBLE_RXDATA0_DEFAULT << 0) /**< Shifted mode DEFAULT for USART_RXDOUBLE */
bogdanm 0:9b334a45a8ff 542 #define _USART_RXDOUBLE_RXDATA1_SHIFT 8 /**< Shift value for USART_RXDATA1 */
bogdanm 0:9b334a45a8ff 543 #define _USART_RXDOUBLE_RXDATA1_MASK 0xFF00UL /**< Bit mask for USART_RXDATA1 */
bogdanm 0:9b334a45a8ff 544 #define _USART_RXDOUBLE_RXDATA1_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_RXDOUBLE */
bogdanm 0:9b334a45a8ff 545 #define USART_RXDOUBLE_RXDATA1_DEFAULT (_USART_RXDOUBLE_RXDATA1_DEFAULT << 8) /**< Shifted mode DEFAULT for USART_RXDOUBLE */
bogdanm 0:9b334a45a8ff 546
bogdanm 0:9b334a45a8ff 547 /* Bit fields for USART RXDATAXP */
bogdanm 0:9b334a45a8ff 548 #define _USART_RXDATAXP_RESETVALUE 0x00000000UL /**< Default value for USART_RXDATAXP */
bogdanm 0:9b334a45a8ff 549 #define _USART_RXDATAXP_MASK 0x0000C1FFUL /**< Mask for USART_RXDATAXP */
bogdanm 0:9b334a45a8ff 550 #define _USART_RXDATAXP_RXDATAP_SHIFT 0 /**< Shift value for USART_RXDATAP */
bogdanm 0:9b334a45a8ff 551 #define _USART_RXDATAXP_RXDATAP_MASK 0x1FFUL /**< Bit mask for USART_RXDATAP */
bogdanm 0:9b334a45a8ff 552 #define _USART_RXDATAXP_RXDATAP_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_RXDATAXP */
bogdanm 0:9b334a45a8ff 553 #define USART_RXDATAXP_RXDATAP_DEFAULT (_USART_RXDATAXP_RXDATAP_DEFAULT << 0) /**< Shifted mode DEFAULT for USART_RXDATAXP */
bogdanm 0:9b334a45a8ff 554 #define USART_RXDATAXP_PERRP (0x1UL << 14) /**< Data Parity Error Peek */
bogdanm 0:9b334a45a8ff 555 #define _USART_RXDATAXP_PERRP_SHIFT 14 /**< Shift value for USART_PERRP */
bogdanm 0:9b334a45a8ff 556 #define _USART_RXDATAXP_PERRP_MASK 0x4000UL /**< Bit mask for USART_PERRP */
bogdanm 0:9b334a45a8ff 557 #define _USART_RXDATAXP_PERRP_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_RXDATAXP */
bogdanm 0:9b334a45a8ff 558 #define USART_RXDATAXP_PERRP_DEFAULT (_USART_RXDATAXP_PERRP_DEFAULT << 14) /**< Shifted mode DEFAULT for USART_RXDATAXP */
bogdanm 0:9b334a45a8ff 559 #define USART_RXDATAXP_FERRP (0x1UL << 15) /**< Data Framing Error Peek */
bogdanm 0:9b334a45a8ff 560 #define _USART_RXDATAXP_FERRP_SHIFT 15 /**< Shift value for USART_FERRP */
bogdanm 0:9b334a45a8ff 561 #define _USART_RXDATAXP_FERRP_MASK 0x8000UL /**< Bit mask for USART_FERRP */
bogdanm 0:9b334a45a8ff 562 #define _USART_RXDATAXP_FERRP_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_RXDATAXP */
bogdanm 0:9b334a45a8ff 563 #define USART_RXDATAXP_FERRP_DEFAULT (_USART_RXDATAXP_FERRP_DEFAULT << 15) /**< Shifted mode DEFAULT for USART_RXDATAXP */
bogdanm 0:9b334a45a8ff 564
bogdanm 0:9b334a45a8ff 565 /* Bit fields for USART RXDOUBLEXP */
bogdanm 0:9b334a45a8ff 566 #define _USART_RXDOUBLEXP_RESETVALUE 0x00000000UL /**< Default value for USART_RXDOUBLEXP */
bogdanm 0:9b334a45a8ff 567 #define _USART_RXDOUBLEXP_MASK 0xC1FFC1FFUL /**< Mask for USART_RXDOUBLEXP */
bogdanm 0:9b334a45a8ff 568 #define _USART_RXDOUBLEXP_RXDATAP0_SHIFT 0 /**< Shift value for USART_RXDATAP0 */
bogdanm 0:9b334a45a8ff 569 #define _USART_RXDOUBLEXP_RXDATAP0_MASK 0x1FFUL /**< Bit mask for USART_RXDATAP0 */
bogdanm 0:9b334a45a8ff 570 #define _USART_RXDOUBLEXP_RXDATAP0_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_RXDOUBLEXP */
bogdanm 0:9b334a45a8ff 571 #define USART_RXDOUBLEXP_RXDATAP0_DEFAULT (_USART_RXDOUBLEXP_RXDATAP0_DEFAULT << 0) /**< Shifted mode DEFAULT for USART_RXDOUBLEXP */
bogdanm 0:9b334a45a8ff 572 #define USART_RXDOUBLEXP_PERRP0 (0x1UL << 14) /**< Data Parity Error 0 Peek */
bogdanm 0:9b334a45a8ff 573 #define _USART_RXDOUBLEXP_PERRP0_SHIFT 14 /**< Shift value for USART_PERRP0 */
bogdanm 0:9b334a45a8ff 574 #define _USART_RXDOUBLEXP_PERRP0_MASK 0x4000UL /**< Bit mask for USART_PERRP0 */
bogdanm 0:9b334a45a8ff 575 #define _USART_RXDOUBLEXP_PERRP0_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_RXDOUBLEXP */
bogdanm 0:9b334a45a8ff 576 #define USART_RXDOUBLEXP_PERRP0_DEFAULT (_USART_RXDOUBLEXP_PERRP0_DEFAULT << 14) /**< Shifted mode DEFAULT for USART_RXDOUBLEXP */
bogdanm 0:9b334a45a8ff 577 #define USART_RXDOUBLEXP_FERRP0 (0x1UL << 15) /**< Data Framing Error 0 Peek */
bogdanm 0:9b334a45a8ff 578 #define _USART_RXDOUBLEXP_FERRP0_SHIFT 15 /**< Shift value for USART_FERRP0 */
bogdanm 0:9b334a45a8ff 579 #define _USART_RXDOUBLEXP_FERRP0_MASK 0x8000UL /**< Bit mask for USART_FERRP0 */
bogdanm 0:9b334a45a8ff 580 #define _USART_RXDOUBLEXP_FERRP0_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_RXDOUBLEXP */
bogdanm 0:9b334a45a8ff 581 #define USART_RXDOUBLEXP_FERRP0_DEFAULT (_USART_RXDOUBLEXP_FERRP0_DEFAULT << 15) /**< Shifted mode DEFAULT for USART_RXDOUBLEXP */
bogdanm 0:9b334a45a8ff 582 #define _USART_RXDOUBLEXP_RXDATAP1_SHIFT 16 /**< Shift value for USART_RXDATAP1 */
bogdanm 0:9b334a45a8ff 583 #define _USART_RXDOUBLEXP_RXDATAP1_MASK 0x1FF0000UL /**< Bit mask for USART_RXDATAP1 */
bogdanm 0:9b334a45a8ff 584 #define _USART_RXDOUBLEXP_RXDATAP1_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_RXDOUBLEXP */
bogdanm 0:9b334a45a8ff 585 #define USART_RXDOUBLEXP_RXDATAP1_DEFAULT (_USART_RXDOUBLEXP_RXDATAP1_DEFAULT << 16) /**< Shifted mode DEFAULT for USART_RXDOUBLEXP */
bogdanm 0:9b334a45a8ff 586 #define USART_RXDOUBLEXP_PERRP1 (0x1UL << 30) /**< Data Parity Error 1 Peek */
bogdanm 0:9b334a45a8ff 587 #define _USART_RXDOUBLEXP_PERRP1_SHIFT 30 /**< Shift value for USART_PERRP1 */
bogdanm 0:9b334a45a8ff 588 #define _USART_RXDOUBLEXP_PERRP1_MASK 0x40000000UL /**< Bit mask for USART_PERRP1 */
bogdanm 0:9b334a45a8ff 589 #define _USART_RXDOUBLEXP_PERRP1_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_RXDOUBLEXP */
bogdanm 0:9b334a45a8ff 590 #define USART_RXDOUBLEXP_PERRP1_DEFAULT (_USART_RXDOUBLEXP_PERRP1_DEFAULT << 30) /**< Shifted mode DEFAULT for USART_RXDOUBLEXP */
bogdanm 0:9b334a45a8ff 591 #define USART_RXDOUBLEXP_FERRP1 (0x1UL << 31) /**< Data Framing Error 1 Peek */
bogdanm 0:9b334a45a8ff 592 #define _USART_RXDOUBLEXP_FERRP1_SHIFT 31 /**< Shift value for USART_FERRP1 */
bogdanm 0:9b334a45a8ff 593 #define _USART_RXDOUBLEXP_FERRP1_MASK 0x80000000UL /**< Bit mask for USART_FERRP1 */
bogdanm 0:9b334a45a8ff 594 #define _USART_RXDOUBLEXP_FERRP1_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_RXDOUBLEXP */
bogdanm 0:9b334a45a8ff 595 #define USART_RXDOUBLEXP_FERRP1_DEFAULT (_USART_RXDOUBLEXP_FERRP1_DEFAULT << 31) /**< Shifted mode DEFAULT for USART_RXDOUBLEXP */
bogdanm 0:9b334a45a8ff 596
bogdanm 0:9b334a45a8ff 597 /* Bit fields for USART TXDATAX */
bogdanm 0:9b334a45a8ff 598 #define _USART_TXDATAX_RESETVALUE 0x00000000UL /**< Default value for USART_TXDATAX */
bogdanm 0:9b334a45a8ff 599 #define _USART_TXDATAX_MASK 0x0000F9FFUL /**< Mask for USART_TXDATAX */
bogdanm 0:9b334a45a8ff 600 #define _USART_TXDATAX_TXDATAX_SHIFT 0 /**< Shift value for USART_TXDATAX */
bogdanm 0:9b334a45a8ff 601 #define _USART_TXDATAX_TXDATAX_MASK 0x1FFUL /**< Bit mask for USART_TXDATAX */
bogdanm 0:9b334a45a8ff 602 #define _USART_TXDATAX_TXDATAX_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_TXDATAX */
bogdanm 0:9b334a45a8ff 603 #define USART_TXDATAX_TXDATAX_DEFAULT (_USART_TXDATAX_TXDATAX_DEFAULT << 0) /**< Shifted mode DEFAULT for USART_TXDATAX */
bogdanm 0:9b334a45a8ff 604 #define USART_TXDATAX_UBRXAT (0x1UL << 11) /**< Unblock RX After Transmission */
bogdanm 0:9b334a45a8ff 605 #define _USART_TXDATAX_UBRXAT_SHIFT 11 /**< Shift value for USART_UBRXAT */
bogdanm 0:9b334a45a8ff 606 #define _USART_TXDATAX_UBRXAT_MASK 0x800UL /**< Bit mask for USART_UBRXAT */
bogdanm 0:9b334a45a8ff 607 #define _USART_TXDATAX_UBRXAT_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_TXDATAX */
bogdanm 0:9b334a45a8ff 608 #define USART_TXDATAX_UBRXAT_DEFAULT (_USART_TXDATAX_UBRXAT_DEFAULT << 11) /**< Shifted mode DEFAULT for USART_TXDATAX */
bogdanm 0:9b334a45a8ff 609 #define USART_TXDATAX_TXTRIAT (0x1UL << 12) /**< Set TXTRI After Transmission */
bogdanm 0:9b334a45a8ff 610 #define _USART_TXDATAX_TXTRIAT_SHIFT 12 /**< Shift value for USART_TXTRIAT */
bogdanm 0:9b334a45a8ff 611 #define _USART_TXDATAX_TXTRIAT_MASK 0x1000UL /**< Bit mask for USART_TXTRIAT */
bogdanm 0:9b334a45a8ff 612 #define _USART_TXDATAX_TXTRIAT_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_TXDATAX */
bogdanm 0:9b334a45a8ff 613 #define USART_TXDATAX_TXTRIAT_DEFAULT (_USART_TXDATAX_TXTRIAT_DEFAULT << 12) /**< Shifted mode DEFAULT for USART_TXDATAX */
bogdanm 0:9b334a45a8ff 614 #define USART_TXDATAX_TXBREAK (0x1UL << 13) /**< Transmit Data As Break */
bogdanm 0:9b334a45a8ff 615 #define _USART_TXDATAX_TXBREAK_SHIFT 13 /**< Shift value for USART_TXBREAK */
bogdanm 0:9b334a45a8ff 616 #define _USART_TXDATAX_TXBREAK_MASK 0x2000UL /**< Bit mask for USART_TXBREAK */
bogdanm 0:9b334a45a8ff 617 #define _USART_TXDATAX_TXBREAK_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_TXDATAX */
bogdanm 0:9b334a45a8ff 618 #define USART_TXDATAX_TXBREAK_DEFAULT (_USART_TXDATAX_TXBREAK_DEFAULT << 13) /**< Shifted mode DEFAULT for USART_TXDATAX */
bogdanm 0:9b334a45a8ff 619 #define USART_TXDATAX_TXDISAT (0x1UL << 14) /**< Clear TXEN After Transmission */
bogdanm 0:9b334a45a8ff 620 #define _USART_TXDATAX_TXDISAT_SHIFT 14 /**< Shift value for USART_TXDISAT */
bogdanm 0:9b334a45a8ff 621 #define _USART_TXDATAX_TXDISAT_MASK 0x4000UL /**< Bit mask for USART_TXDISAT */
bogdanm 0:9b334a45a8ff 622 #define _USART_TXDATAX_TXDISAT_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_TXDATAX */
bogdanm 0:9b334a45a8ff 623 #define USART_TXDATAX_TXDISAT_DEFAULT (_USART_TXDATAX_TXDISAT_DEFAULT << 14) /**< Shifted mode DEFAULT for USART_TXDATAX */
bogdanm 0:9b334a45a8ff 624 #define USART_TXDATAX_RXENAT (0x1UL << 15) /**< Enable RX After Transmission */
bogdanm 0:9b334a45a8ff 625 #define _USART_TXDATAX_RXENAT_SHIFT 15 /**< Shift value for USART_RXENAT */
bogdanm 0:9b334a45a8ff 626 #define _USART_TXDATAX_RXENAT_MASK 0x8000UL /**< Bit mask for USART_RXENAT */
bogdanm 0:9b334a45a8ff 627 #define _USART_TXDATAX_RXENAT_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_TXDATAX */
bogdanm 0:9b334a45a8ff 628 #define USART_TXDATAX_RXENAT_DEFAULT (_USART_TXDATAX_RXENAT_DEFAULT << 15) /**< Shifted mode DEFAULT for USART_TXDATAX */
bogdanm 0:9b334a45a8ff 629
bogdanm 0:9b334a45a8ff 630 /* Bit fields for USART TXDATA */
bogdanm 0:9b334a45a8ff 631 #define _USART_TXDATA_RESETVALUE 0x00000000UL /**< Default value for USART_TXDATA */
bogdanm 0:9b334a45a8ff 632 #define _USART_TXDATA_MASK 0x000000FFUL /**< Mask for USART_TXDATA */
bogdanm 0:9b334a45a8ff 633 #define _USART_TXDATA_TXDATA_SHIFT 0 /**< Shift value for USART_TXDATA */
bogdanm 0:9b334a45a8ff 634 #define _USART_TXDATA_TXDATA_MASK 0xFFUL /**< Bit mask for USART_TXDATA */
bogdanm 0:9b334a45a8ff 635 #define _USART_TXDATA_TXDATA_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_TXDATA */
bogdanm 0:9b334a45a8ff 636 #define USART_TXDATA_TXDATA_DEFAULT (_USART_TXDATA_TXDATA_DEFAULT << 0) /**< Shifted mode DEFAULT for USART_TXDATA */
bogdanm 0:9b334a45a8ff 637
bogdanm 0:9b334a45a8ff 638 /* Bit fields for USART TXDOUBLEX */
bogdanm 0:9b334a45a8ff 639 #define _USART_TXDOUBLEX_RESETVALUE 0x00000000UL /**< Default value for USART_TXDOUBLEX */
bogdanm 0:9b334a45a8ff 640 #define _USART_TXDOUBLEX_MASK 0xF9FFF9FFUL /**< Mask for USART_TXDOUBLEX */
bogdanm 0:9b334a45a8ff 641 #define _USART_TXDOUBLEX_TXDATA0_SHIFT 0 /**< Shift value for USART_TXDATA0 */
bogdanm 0:9b334a45a8ff 642 #define _USART_TXDOUBLEX_TXDATA0_MASK 0x1FFUL /**< Bit mask for USART_TXDATA0 */
bogdanm 0:9b334a45a8ff 643 #define _USART_TXDOUBLEX_TXDATA0_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_TXDOUBLEX */
bogdanm 0:9b334a45a8ff 644 #define USART_TXDOUBLEX_TXDATA0_DEFAULT (_USART_TXDOUBLEX_TXDATA0_DEFAULT << 0) /**< Shifted mode DEFAULT for USART_TXDOUBLEX */
bogdanm 0:9b334a45a8ff 645 #define USART_TXDOUBLEX_UBRXAT0 (0x1UL << 11) /**< Unblock RX After Transmission */
bogdanm 0:9b334a45a8ff 646 #define _USART_TXDOUBLEX_UBRXAT0_SHIFT 11 /**< Shift value for USART_UBRXAT0 */
bogdanm 0:9b334a45a8ff 647 #define _USART_TXDOUBLEX_UBRXAT0_MASK 0x800UL /**< Bit mask for USART_UBRXAT0 */
bogdanm 0:9b334a45a8ff 648 #define _USART_TXDOUBLEX_UBRXAT0_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_TXDOUBLEX */
bogdanm 0:9b334a45a8ff 649 #define USART_TXDOUBLEX_UBRXAT0_DEFAULT (_USART_TXDOUBLEX_UBRXAT0_DEFAULT << 11) /**< Shifted mode DEFAULT for USART_TXDOUBLEX */
bogdanm 0:9b334a45a8ff 650 #define USART_TXDOUBLEX_TXTRIAT0 (0x1UL << 12) /**< Set TXTRI After Transmission */
bogdanm 0:9b334a45a8ff 651 #define _USART_TXDOUBLEX_TXTRIAT0_SHIFT 12 /**< Shift value for USART_TXTRIAT0 */
bogdanm 0:9b334a45a8ff 652 #define _USART_TXDOUBLEX_TXTRIAT0_MASK 0x1000UL /**< Bit mask for USART_TXTRIAT0 */
bogdanm 0:9b334a45a8ff 653 #define _USART_TXDOUBLEX_TXTRIAT0_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_TXDOUBLEX */
bogdanm 0:9b334a45a8ff 654 #define USART_TXDOUBLEX_TXTRIAT0_DEFAULT (_USART_TXDOUBLEX_TXTRIAT0_DEFAULT << 12) /**< Shifted mode DEFAULT for USART_TXDOUBLEX */
bogdanm 0:9b334a45a8ff 655 #define USART_TXDOUBLEX_TXBREAK0 (0x1UL << 13) /**< Transmit Data As Break */
bogdanm 0:9b334a45a8ff 656 #define _USART_TXDOUBLEX_TXBREAK0_SHIFT 13 /**< Shift value for USART_TXBREAK0 */
bogdanm 0:9b334a45a8ff 657 #define _USART_TXDOUBLEX_TXBREAK0_MASK 0x2000UL /**< Bit mask for USART_TXBREAK0 */
bogdanm 0:9b334a45a8ff 658 #define _USART_TXDOUBLEX_TXBREAK0_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_TXDOUBLEX */
bogdanm 0:9b334a45a8ff 659 #define USART_TXDOUBLEX_TXBREAK0_DEFAULT (_USART_TXDOUBLEX_TXBREAK0_DEFAULT << 13) /**< Shifted mode DEFAULT for USART_TXDOUBLEX */
bogdanm 0:9b334a45a8ff 660 #define USART_TXDOUBLEX_TXDISAT0 (0x1UL << 14) /**< Clear TXEN After Transmission */
bogdanm 0:9b334a45a8ff 661 #define _USART_TXDOUBLEX_TXDISAT0_SHIFT 14 /**< Shift value for USART_TXDISAT0 */
bogdanm 0:9b334a45a8ff 662 #define _USART_TXDOUBLEX_TXDISAT0_MASK 0x4000UL /**< Bit mask for USART_TXDISAT0 */
bogdanm 0:9b334a45a8ff 663 #define _USART_TXDOUBLEX_TXDISAT0_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_TXDOUBLEX */
bogdanm 0:9b334a45a8ff 664 #define USART_TXDOUBLEX_TXDISAT0_DEFAULT (_USART_TXDOUBLEX_TXDISAT0_DEFAULT << 14) /**< Shifted mode DEFAULT for USART_TXDOUBLEX */
bogdanm 0:9b334a45a8ff 665 #define USART_TXDOUBLEX_RXENAT0 (0x1UL << 15) /**< Enable RX After Transmission */
bogdanm 0:9b334a45a8ff 666 #define _USART_TXDOUBLEX_RXENAT0_SHIFT 15 /**< Shift value for USART_RXENAT0 */
bogdanm 0:9b334a45a8ff 667 #define _USART_TXDOUBLEX_RXENAT0_MASK 0x8000UL /**< Bit mask for USART_RXENAT0 */
bogdanm 0:9b334a45a8ff 668 #define _USART_TXDOUBLEX_RXENAT0_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_TXDOUBLEX */
bogdanm 0:9b334a45a8ff 669 #define USART_TXDOUBLEX_RXENAT0_DEFAULT (_USART_TXDOUBLEX_RXENAT0_DEFAULT << 15) /**< Shifted mode DEFAULT for USART_TXDOUBLEX */
bogdanm 0:9b334a45a8ff 670 #define _USART_TXDOUBLEX_TXDATA1_SHIFT 16 /**< Shift value for USART_TXDATA1 */
bogdanm 0:9b334a45a8ff 671 #define _USART_TXDOUBLEX_TXDATA1_MASK 0x1FF0000UL /**< Bit mask for USART_TXDATA1 */
bogdanm 0:9b334a45a8ff 672 #define _USART_TXDOUBLEX_TXDATA1_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_TXDOUBLEX */
bogdanm 0:9b334a45a8ff 673 #define USART_TXDOUBLEX_TXDATA1_DEFAULT (_USART_TXDOUBLEX_TXDATA1_DEFAULT << 16) /**< Shifted mode DEFAULT for USART_TXDOUBLEX */
bogdanm 0:9b334a45a8ff 674 #define USART_TXDOUBLEX_UBRXAT1 (0x1UL << 27) /**< Unblock RX After Transmission */
bogdanm 0:9b334a45a8ff 675 #define _USART_TXDOUBLEX_UBRXAT1_SHIFT 27 /**< Shift value for USART_UBRXAT1 */
bogdanm 0:9b334a45a8ff 676 #define _USART_TXDOUBLEX_UBRXAT1_MASK 0x8000000UL /**< Bit mask for USART_UBRXAT1 */
bogdanm 0:9b334a45a8ff 677 #define _USART_TXDOUBLEX_UBRXAT1_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_TXDOUBLEX */
bogdanm 0:9b334a45a8ff 678 #define USART_TXDOUBLEX_UBRXAT1_DEFAULT (_USART_TXDOUBLEX_UBRXAT1_DEFAULT << 27) /**< Shifted mode DEFAULT for USART_TXDOUBLEX */
bogdanm 0:9b334a45a8ff 679 #define USART_TXDOUBLEX_TXTRIAT1 (0x1UL << 28) /**< Set TXTRI After Transmission */
bogdanm 0:9b334a45a8ff 680 #define _USART_TXDOUBLEX_TXTRIAT1_SHIFT 28 /**< Shift value for USART_TXTRIAT1 */
bogdanm 0:9b334a45a8ff 681 #define _USART_TXDOUBLEX_TXTRIAT1_MASK 0x10000000UL /**< Bit mask for USART_TXTRIAT1 */
bogdanm 0:9b334a45a8ff 682 #define _USART_TXDOUBLEX_TXTRIAT1_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_TXDOUBLEX */
bogdanm 0:9b334a45a8ff 683 #define USART_TXDOUBLEX_TXTRIAT1_DEFAULT (_USART_TXDOUBLEX_TXTRIAT1_DEFAULT << 28) /**< Shifted mode DEFAULT for USART_TXDOUBLEX */
bogdanm 0:9b334a45a8ff 684 #define USART_TXDOUBLEX_TXBREAK1 (0x1UL << 29) /**< Transmit Data As Break */
bogdanm 0:9b334a45a8ff 685 #define _USART_TXDOUBLEX_TXBREAK1_SHIFT 29 /**< Shift value for USART_TXBREAK1 */
bogdanm 0:9b334a45a8ff 686 #define _USART_TXDOUBLEX_TXBREAK1_MASK 0x20000000UL /**< Bit mask for USART_TXBREAK1 */
bogdanm 0:9b334a45a8ff 687 #define _USART_TXDOUBLEX_TXBREAK1_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_TXDOUBLEX */
bogdanm 0:9b334a45a8ff 688 #define USART_TXDOUBLEX_TXBREAK1_DEFAULT (_USART_TXDOUBLEX_TXBREAK1_DEFAULT << 29) /**< Shifted mode DEFAULT for USART_TXDOUBLEX */
bogdanm 0:9b334a45a8ff 689 #define USART_TXDOUBLEX_TXDISAT1 (0x1UL << 30) /**< Clear TXEN After Transmission */
bogdanm 0:9b334a45a8ff 690 #define _USART_TXDOUBLEX_TXDISAT1_SHIFT 30 /**< Shift value for USART_TXDISAT1 */
bogdanm 0:9b334a45a8ff 691 #define _USART_TXDOUBLEX_TXDISAT1_MASK 0x40000000UL /**< Bit mask for USART_TXDISAT1 */
bogdanm 0:9b334a45a8ff 692 #define _USART_TXDOUBLEX_TXDISAT1_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_TXDOUBLEX */
bogdanm 0:9b334a45a8ff 693 #define USART_TXDOUBLEX_TXDISAT1_DEFAULT (_USART_TXDOUBLEX_TXDISAT1_DEFAULT << 30) /**< Shifted mode DEFAULT for USART_TXDOUBLEX */
bogdanm 0:9b334a45a8ff 694 #define USART_TXDOUBLEX_RXENAT1 (0x1UL << 31) /**< Enable RX After Transmission */
bogdanm 0:9b334a45a8ff 695 #define _USART_TXDOUBLEX_RXENAT1_SHIFT 31 /**< Shift value for USART_RXENAT1 */
bogdanm 0:9b334a45a8ff 696 #define _USART_TXDOUBLEX_RXENAT1_MASK 0x80000000UL /**< Bit mask for USART_RXENAT1 */
bogdanm 0:9b334a45a8ff 697 #define _USART_TXDOUBLEX_RXENAT1_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_TXDOUBLEX */
bogdanm 0:9b334a45a8ff 698 #define USART_TXDOUBLEX_RXENAT1_DEFAULT (_USART_TXDOUBLEX_RXENAT1_DEFAULT << 31) /**< Shifted mode DEFAULT for USART_TXDOUBLEX */
bogdanm 0:9b334a45a8ff 699
bogdanm 0:9b334a45a8ff 700 /* Bit fields for USART TXDOUBLE */
bogdanm 0:9b334a45a8ff 701 #define _USART_TXDOUBLE_RESETVALUE 0x00000000UL /**< Default value for USART_TXDOUBLE */
bogdanm 0:9b334a45a8ff 702 #define _USART_TXDOUBLE_MASK 0x0000FFFFUL /**< Mask for USART_TXDOUBLE */
bogdanm 0:9b334a45a8ff 703 #define _USART_TXDOUBLE_TXDATA0_SHIFT 0 /**< Shift value for USART_TXDATA0 */
bogdanm 0:9b334a45a8ff 704 #define _USART_TXDOUBLE_TXDATA0_MASK 0xFFUL /**< Bit mask for USART_TXDATA0 */
bogdanm 0:9b334a45a8ff 705 #define _USART_TXDOUBLE_TXDATA0_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_TXDOUBLE */
bogdanm 0:9b334a45a8ff 706 #define USART_TXDOUBLE_TXDATA0_DEFAULT (_USART_TXDOUBLE_TXDATA0_DEFAULT << 0) /**< Shifted mode DEFAULT for USART_TXDOUBLE */
bogdanm 0:9b334a45a8ff 707 #define _USART_TXDOUBLE_TXDATA1_SHIFT 8 /**< Shift value for USART_TXDATA1 */
bogdanm 0:9b334a45a8ff 708 #define _USART_TXDOUBLE_TXDATA1_MASK 0xFF00UL /**< Bit mask for USART_TXDATA1 */
bogdanm 0:9b334a45a8ff 709 #define _USART_TXDOUBLE_TXDATA1_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_TXDOUBLE */
bogdanm 0:9b334a45a8ff 710 #define USART_TXDOUBLE_TXDATA1_DEFAULT (_USART_TXDOUBLE_TXDATA1_DEFAULT << 8) /**< Shifted mode DEFAULT for USART_TXDOUBLE */
bogdanm 0:9b334a45a8ff 711
bogdanm 0:9b334a45a8ff 712 /* Bit fields for USART IF */
bogdanm 0:9b334a45a8ff 713 #define _USART_IF_RESETVALUE 0x00000002UL /**< Default value for USART_IF */
bogdanm 0:9b334a45a8ff 714 #define _USART_IF_MASK 0x00001FFFUL /**< Mask for USART_IF */
bogdanm 0:9b334a45a8ff 715 #define USART_IF_TXC (0x1UL << 0) /**< TX Complete Interrupt Flag */
bogdanm 0:9b334a45a8ff 716 #define _USART_IF_TXC_SHIFT 0 /**< Shift value for USART_TXC */
bogdanm 0:9b334a45a8ff 717 #define _USART_IF_TXC_MASK 0x1UL /**< Bit mask for USART_TXC */
bogdanm 0:9b334a45a8ff 718 #define _USART_IF_TXC_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IF */
bogdanm 0:9b334a45a8ff 719 #define USART_IF_TXC_DEFAULT (_USART_IF_TXC_DEFAULT << 0) /**< Shifted mode DEFAULT for USART_IF */
bogdanm 0:9b334a45a8ff 720 #define USART_IF_TXBL (0x1UL << 1) /**< TX Buffer Level Interrupt Flag */
bogdanm 0:9b334a45a8ff 721 #define _USART_IF_TXBL_SHIFT 1 /**< Shift value for USART_TXBL */
bogdanm 0:9b334a45a8ff 722 #define _USART_IF_TXBL_MASK 0x2UL /**< Bit mask for USART_TXBL */
bogdanm 0:9b334a45a8ff 723 #define _USART_IF_TXBL_DEFAULT 0x00000001UL /**< Mode DEFAULT for USART_IF */
bogdanm 0:9b334a45a8ff 724 #define USART_IF_TXBL_DEFAULT (_USART_IF_TXBL_DEFAULT << 1) /**< Shifted mode DEFAULT for USART_IF */
bogdanm 0:9b334a45a8ff 725 #define USART_IF_RXDATAV (0x1UL << 2) /**< RX Data Valid Interrupt Flag */
bogdanm 0:9b334a45a8ff 726 #define _USART_IF_RXDATAV_SHIFT 2 /**< Shift value for USART_RXDATAV */
bogdanm 0:9b334a45a8ff 727 #define _USART_IF_RXDATAV_MASK 0x4UL /**< Bit mask for USART_RXDATAV */
bogdanm 0:9b334a45a8ff 728 #define _USART_IF_RXDATAV_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IF */
bogdanm 0:9b334a45a8ff 729 #define USART_IF_RXDATAV_DEFAULT (_USART_IF_RXDATAV_DEFAULT << 2) /**< Shifted mode DEFAULT for USART_IF */
bogdanm 0:9b334a45a8ff 730 #define USART_IF_RXFULL (0x1UL << 3) /**< RX Buffer Full Interrupt Flag */
bogdanm 0:9b334a45a8ff 731 #define _USART_IF_RXFULL_SHIFT 3 /**< Shift value for USART_RXFULL */
bogdanm 0:9b334a45a8ff 732 #define _USART_IF_RXFULL_MASK 0x8UL /**< Bit mask for USART_RXFULL */
bogdanm 0:9b334a45a8ff 733 #define _USART_IF_RXFULL_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IF */
bogdanm 0:9b334a45a8ff 734 #define USART_IF_RXFULL_DEFAULT (_USART_IF_RXFULL_DEFAULT << 3) /**< Shifted mode DEFAULT for USART_IF */
bogdanm 0:9b334a45a8ff 735 #define USART_IF_RXOF (0x1UL << 4) /**< RX Overflow Interrupt Flag */
bogdanm 0:9b334a45a8ff 736 #define _USART_IF_RXOF_SHIFT 4 /**< Shift value for USART_RXOF */
bogdanm 0:9b334a45a8ff 737 #define _USART_IF_RXOF_MASK 0x10UL /**< Bit mask for USART_RXOF */
bogdanm 0:9b334a45a8ff 738 #define _USART_IF_RXOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IF */
bogdanm 0:9b334a45a8ff 739 #define USART_IF_RXOF_DEFAULT (_USART_IF_RXOF_DEFAULT << 4) /**< Shifted mode DEFAULT for USART_IF */
bogdanm 0:9b334a45a8ff 740 #define USART_IF_RXUF (0x1UL << 5) /**< RX Underflow Interrupt Flag */
bogdanm 0:9b334a45a8ff 741 #define _USART_IF_RXUF_SHIFT 5 /**< Shift value for USART_RXUF */
bogdanm 0:9b334a45a8ff 742 #define _USART_IF_RXUF_MASK 0x20UL /**< Bit mask for USART_RXUF */
bogdanm 0:9b334a45a8ff 743 #define _USART_IF_RXUF_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IF */
bogdanm 0:9b334a45a8ff 744 #define USART_IF_RXUF_DEFAULT (_USART_IF_RXUF_DEFAULT << 5) /**< Shifted mode DEFAULT for USART_IF */
bogdanm 0:9b334a45a8ff 745 #define USART_IF_TXOF (0x1UL << 6) /**< TX Overflow Interrupt Flag */
bogdanm 0:9b334a45a8ff 746 #define _USART_IF_TXOF_SHIFT 6 /**< Shift value for USART_TXOF */
bogdanm 0:9b334a45a8ff 747 #define _USART_IF_TXOF_MASK 0x40UL /**< Bit mask for USART_TXOF */
bogdanm 0:9b334a45a8ff 748 #define _USART_IF_TXOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IF */
bogdanm 0:9b334a45a8ff 749 #define USART_IF_TXOF_DEFAULT (_USART_IF_TXOF_DEFAULT << 6) /**< Shifted mode DEFAULT for USART_IF */
bogdanm 0:9b334a45a8ff 750 #define USART_IF_TXUF (0x1UL << 7) /**< TX Underflow Interrupt Flag */
bogdanm 0:9b334a45a8ff 751 #define _USART_IF_TXUF_SHIFT 7 /**< Shift value for USART_TXUF */
bogdanm 0:9b334a45a8ff 752 #define _USART_IF_TXUF_MASK 0x80UL /**< Bit mask for USART_TXUF */
bogdanm 0:9b334a45a8ff 753 #define _USART_IF_TXUF_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IF */
bogdanm 0:9b334a45a8ff 754 #define USART_IF_TXUF_DEFAULT (_USART_IF_TXUF_DEFAULT << 7) /**< Shifted mode DEFAULT for USART_IF */
bogdanm 0:9b334a45a8ff 755 #define USART_IF_PERR (0x1UL << 8) /**< Parity Error Interrupt Flag */
bogdanm 0:9b334a45a8ff 756 #define _USART_IF_PERR_SHIFT 8 /**< Shift value for USART_PERR */
bogdanm 0:9b334a45a8ff 757 #define _USART_IF_PERR_MASK 0x100UL /**< Bit mask for USART_PERR */
bogdanm 0:9b334a45a8ff 758 #define _USART_IF_PERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IF */
bogdanm 0:9b334a45a8ff 759 #define USART_IF_PERR_DEFAULT (_USART_IF_PERR_DEFAULT << 8) /**< Shifted mode DEFAULT for USART_IF */
bogdanm 0:9b334a45a8ff 760 #define USART_IF_FERR (0x1UL << 9) /**< Framing Error Interrupt Flag */
bogdanm 0:9b334a45a8ff 761 #define _USART_IF_FERR_SHIFT 9 /**< Shift value for USART_FERR */
bogdanm 0:9b334a45a8ff 762 #define _USART_IF_FERR_MASK 0x200UL /**< Bit mask for USART_FERR */
bogdanm 0:9b334a45a8ff 763 #define _USART_IF_FERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IF */
bogdanm 0:9b334a45a8ff 764 #define USART_IF_FERR_DEFAULT (_USART_IF_FERR_DEFAULT << 9) /**< Shifted mode DEFAULT for USART_IF */
bogdanm 0:9b334a45a8ff 765 #define USART_IF_MPAF (0x1UL << 10) /**< Multi-Processor Address Frame Interrupt Flag */
bogdanm 0:9b334a45a8ff 766 #define _USART_IF_MPAF_SHIFT 10 /**< Shift value for USART_MPAF */
bogdanm 0:9b334a45a8ff 767 #define _USART_IF_MPAF_MASK 0x400UL /**< Bit mask for USART_MPAF */
bogdanm 0:9b334a45a8ff 768 #define _USART_IF_MPAF_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IF */
bogdanm 0:9b334a45a8ff 769 #define USART_IF_MPAF_DEFAULT (_USART_IF_MPAF_DEFAULT << 10) /**< Shifted mode DEFAULT for USART_IF */
bogdanm 0:9b334a45a8ff 770 #define USART_IF_SSM (0x1UL << 11) /**< Slave-Select In Master Mode Interrupt Flag */
bogdanm 0:9b334a45a8ff 771 #define _USART_IF_SSM_SHIFT 11 /**< Shift value for USART_SSM */
bogdanm 0:9b334a45a8ff 772 #define _USART_IF_SSM_MASK 0x800UL /**< Bit mask for USART_SSM */
bogdanm 0:9b334a45a8ff 773 #define _USART_IF_SSM_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IF */
bogdanm 0:9b334a45a8ff 774 #define USART_IF_SSM_DEFAULT (_USART_IF_SSM_DEFAULT << 11) /**< Shifted mode DEFAULT for USART_IF */
bogdanm 0:9b334a45a8ff 775 #define USART_IF_CCF (0x1UL << 12) /**< Collision Check Fail Interrupt Flag */
bogdanm 0:9b334a45a8ff 776 #define _USART_IF_CCF_SHIFT 12 /**< Shift value for USART_CCF */
bogdanm 0:9b334a45a8ff 777 #define _USART_IF_CCF_MASK 0x1000UL /**< Bit mask for USART_CCF */
bogdanm 0:9b334a45a8ff 778 #define _USART_IF_CCF_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IF */
bogdanm 0:9b334a45a8ff 779 #define USART_IF_CCF_DEFAULT (_USART_IF_CCF_DEFAULT << 12) /**< Shifted mode DEFAULT for USART_IF */
bogdanm 0:9b334a45a8ff 780
bogdanm 0:9b334a45a8ff 781 /* Bit fields for USART IFS */
bogdanm 0:9b334a45a8ff 782 #define _USART_IFS_RESETVALUE 0x00000000UL /**< Default value for USART_IFS */
bogdanm 0:9b334a45a8ff 783 #define _USART_IFS_MASK 0x00001FF9UL /**< Mask for USART_IFS */
bogdanm 0:9b334a45a8ff 784 #define USART_IFS_TXC (0x1UL << 0) /**< Set TX Complete Interrupt Flag */
bogdanm 0:9b334a45a8ff 785 #define _USART_IFS_TXC_SHIFT 0 /**< Shift value for USART_TXC */
bogdanm 0:9b334a45a8ff 786 #define _USART_IFS_TXC_MASK 0x1UL /**< Bit mask for USART_TXC */
bogdanm 0:9b334a45a8ff 787 #define _USART_IFS_TXC_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IFS */
bogdanm 0:9b334a45a8ff 788 #define USART_IFS_TXC_DEFAULT (_USART_IFS_TXC_DEFAULT << 0) /**< Shifted mode DEFAULT for USART_IFS */
bogdanm 0:9b334a45a8ff 789 #define USART_IFS_RXFULL (0x1UL << 3) /**< Set RX Buffer Full Interrupt Flag */
bogdanm 0:9b334a45a8ff 790 #define _USART_IFS_RXFULL_SHIFT 3 /**< Shift value for USART_RXFULL */
bogdanm 0:9b334a45a8ff 791 #define _USART_IFS_RXFULL_MASK 0x8UL /**< Bit mask for USART_RXFULL */
bogdanm 0:9b334a45a8ff 792 #define _USART_IFS_RXFULL_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IFS */
bogdanm 0:9b334a45a8ff 793 #define USART_IFS_RXFULL_DEFAULT (_USART_IFS_RXFULL_DEFAULT << 3) /**< Shifted mode DEFAULT for USART_IFS */
bogdanm 0:9b334a45a8ff 794 #define USART_IFS_RXOF (0x1UL << 4) /**< Set RX Overflow Interrupt Flag */
bogdanm 0:9b334a45a8ff 795 #define _USART_IFS_RXOF_SHIFT 4 /**< Shift value for USART_RXOF */
bogdanm 0:9b334a45a8ff 796 #define _USART_IFS_RXOF_MASK 0x10UL /**< Bit mask for USART_RXOF */
bogdanm 0:9b334a45a8ff 797 #define _USART_IFS_RXOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IFS */
bogdanm 0:9b334a45a8ff 798 #define USART_IFS_RXOF_DEFAULT (_USART_IFS_RXOF_DEFAULT << 4) /**< Shifted mode DEFAULT for USART_IFS */
bogdanm 0:9b334a45a8ff 799 #define USART_IFS_RXUF (0x1UL << 5) /**< Set RX Underflow Interrupt Flag */
bogdanm 0:9b334a45a8ff 800 #define _USART_IFS_RXUF_SHIFT 5 /**< Shift value for USART_RXUF */
bogdanm 0:9b334a45a8ff 801 #define _USART_IFS_RXUF_MASK 0x20UL /**< Bit mask for USART_RXUF */
bogdanm 0:9b334a45a8ff 802 #define _USART_IFS_RXUF_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IFS */
bogdanm 0:9b334a45a8ff 803 #define USART_IFS_RXUF_DEFAULT (_USART_IFS_RXUF_DEFAULT << 5) /**< Shifted mode DEFAULT for USART_IFS */
bogdanm 0:9b334a45a8ff 804 #define USART_IFS_TXOF (0x1UL << 6) /**< Set TX Overflow Interrupt Flag */
bogdanm 0:9b334a45a8ff 805 #define _USART_IFS_TXOF_SHIFT 6 /**< Shift value for USART_TXOF */
bogdanm 0:9b334a45a8ff 806 #define _USART_IFS_TXOF_MASK 0x40UL /**< Bit mask for USART_TXOF */
bogdanm 0:9b334a45a8ff 807 #define _USART_IFS_TXOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IFS */
bogdanm 0:9b334a45a8ff 808 #define USART_IFS_TXOF_DEFAULT (_USART_IFS_TXOF_DEFAULT << 6) /**< Shifted mode DEFAULT for USART_IFS */
bogdanm 0:9b334a45a8ff 809 #define USART_IFS_TXUF (0x1UL << 7) /**< Set TX Underflow Interrupt Flag */
bogdanm 0:9b334a45a8ff 810 #define _USART_IFS_TXUF_SHIFT 7 /**< Shift value for USART_TXUF */
bogdanm 0:9b334a45a8ff 811 #define _USART_IFS_TXUF_MASK 0x80UL /**< Bit mask for USART_TXUF */
bogdanm 0:9b334a45a8ff 812 #define _USART_IFS_TXUF_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IFS */
bogdanm 0:9b334a45a8ff 813 #define USART_IFS_TXUF_DEFAULT (_USART_IFS_TXUF_DEFAULT << 7) /**< Shifted mode DEFAULT for USART_IFS */
bogdanm 0:9b334a45a8ff 814 #define USART_IFS_PERR (0x1UL << 8) /**< Set Parity Error Interrupt Flag */
bogdanm 0:9b334a45a8ff 815 #define _USART_IFS_PERR_SHIFT 8 /**< Shift value for USART_PERR */
bogdanm 0:9b334a45a8ff 816 #define _USART_IFS_PERR_MASK 0x100UL /**< Bit mask for USART_PERR */
bogdanm 0:9b334a45a8ff 817 #define _USART_IFS_PERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IFS */
bogdanm 0:9b334a45a8ff 818 #define USART_IFS_PERR_DEFAULT (_USART_IFS_PERR_DEFAULT << 8) /**< Shifted mode DEFAULT for USART_IFS */
bogdanm 0:9b334a45a8ff 819 #define USART_IFS_FERR (0x1UL << 9) /**< Set Framing Error Interrupt Flag */
bogdanm 0:9b334a45a8ff 820 #define _USART_IFS_FERR_SHIFT 9 /**< Shift value for USART_FERR */
bogdanm 0:9b334a45a8ff 821 #define _USART_IFS_FERR_MASK 0x200UL /**< Bit mask for USART_FERR */
bogdanm 0:9b334a45a8ff 822 #define _USART_IFS_FERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IFS */
bogdanm 0:9b334a45a8ff 823 #define USART_IFS_FERR_DEFAULT (_USART_IFS_FERR_DEFAULT << 9) /**< Shifted mode DEFAULT for USART_IFS */
bogdanm 0:9b334a45a8ff 824 #define USART_IFS_MPAF (0x1UL << 10) /**< Set Multi-Processor Address Frame Interrupt Flag */
bogdanm 0:9b334a45a8ff 825 #define _USART_IFS_MPAF_SHIFT 10 /**< Shift value for USART_MPAF */
bogdanm 0:9b334a45a8ff 826 #define _USART_IFS_MPAF_MASK 0x400UL /**< Bit mask for USART_MPAF */
bogdanm 0:9b334a45a8ff 827 #define _USART_IFS_MPAF_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IFS */
bogdanm 0:9b334a45a8ff 828 #define USART_IFS_MPAF_DEFAULT (_USART_IFS_MPAF_DEFAULT << 10) /**< Shifted mode DEFAULT for USART_IFS */
bogdanm 0:9b334a45a8ff 829 #define USART_IFS_SSM (0x1UL << 11) /**< Set Slave-Select in Master mode Interrupt Flag */
bogdanm 0:9b334a45a8ff 830 #define _USART_IFS_SSM_SHIFT 11 /**< Shift value for USART_SSM */
bogdanm 0:9b334a45a8ff 831 #define _USART_IFS_SSM_MASK 0x800UL /**< Bit mask for USART_SSM */
bogdanm 0:9b334a45a8ff 832 #define _USART_IFS_SSM_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IFS */
bogdanm 0:9b334a45a8ff 833 #define USART_IFS_SSM_DEFAULT (_USART_IFS_SSM_DEFAULT << 11) /**< Shifted mode DEFAULT for USART_IFS */
bogdanm 0:9b334a45a8ff 834 #define USART_IFS_CCF (0x1UL << 12) /**< Set Collision Check Fail Interrupt Flag */
bogdanm 0:9b334a45a8ff 835 #define _USART_IFS_CCF_SHIFT 12 /**< Shift value for USART_CCF */
bogdanm 0:9b334a45a8ff 836 #define _USART_IFS_CCF_MASK 0x1000UL /**< Bit mask for USART_CCF */
bogdanm 0:9b334a45a8ff 837 #define _USART_IFS_CCF_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IFS */
bogdanm 0:9b334a45a8ff 838 #define USART_IFS_CCF_DEFAULT (_USART_IFS_CCF_DEFAULT << 12) /**< Shifted mode DEFAULT for USART_IFS */
bogdanm 0:9b334a45a8ff 839
bogdanm 0:9b334a45a8ff 840 /* Bit fields for USART IFC */
bogdanm 0:9b334a45a8ff 841 #define _USART_IFC_RESETVALUE 0x00000000UL /**< Default value for USART_IFC */
bogdanm 0:9b334a45a8ff 842 #define _USART_IFC_MASK 0x00001FF9UL /**< Mask for USART_IFC */
bogdanm 0:9b334a45a8ff 843 #define USART_IFC_TXC (0x1UL << 0) /**< Clear TX Complete Interrupt Flag */
bogdanm 0:9b334a45a8ff 844 #define _USART_IFC_TXC_SHIFT 0 /**< Shift value for USART_TXC */
bogdanm 0:9b334a45a8ff 845 #define _USART_IFC_TXC_MASK 0x1UL /**< Bit mask for USART_TXC */
bogdanm 0:9b334a45a8ff 846 #define _USART_IFC_TXC_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IFC */
bogdanm 0:9b334a45a8ff 847 #define USART_IFC_TXC_DEFAULT (_USART_IFC_TXC_DEFAULT << 0) /**< Shifted mode DEFAULT for USART_IFC */
bogdanm 0:9b334a45a8ff 848 #define USART_IFC_RXFULL (0x1UL << 3) /**< Clear RX Buffer Full Interrupt Flag */
bogdanm 0:9b334a45a8ff 849 #define _USART_IFC_RXFULL_SHIFT 3 /**< Shift value for USART_RXFULL */
bogdanm 0:9b334a45a8ff 850 #define _USART_IFC_RXFULL_MASK 0x8UL /**< Bit mask for USART_RXFULL */
bogdanm 0:9b334a45a8ff 851 #define _USART_IFC_RXFULL_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IFC */
bogdanm 0:9b334a45a8ff 852 #define USART_IFC_RXFULL_DEFAULT (_USART_IFC_RXFULL_DEFAULT << 3) /**< Shifted mode DEFAULT for USART_IFC */
bogdanm 0:9b334a45a8ff 853 #define USART_IFC_RXOF (0x1UL << 4) /**< Clear RX Overflow Interrupt Flag */
bogdanm 0:9b334a45a8ff 854 #define _USART_IFC_RXOF_SHIFT 4 /**< Shift value for USART_RXOF */
bogdanm 0:9b334a45a8ff 855 #define _USART_IFC_RXOF_MASK 0x10UL /**< Bit mask for USART_RXOF */
bogdanm 0:9b334a45a8ff 856 #define _USART_IFC_RXOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IFC */
bogdanm 0:9b334a45a8ff 857 #define USART_IFC_RXOF_DEFAULT (_USART_IFC_RXOF_DEFAULT << 4) /**< Shifted mode DEFAULT for USART_IFC */
bogdanm 0:9b334a45a8ff 858 #define USART_IFC_RXUF (0x1UL << 5) /**< Clear RX Underflow Interrupt Flag */
bogdanm 0:9b334a45a8ff 859 #define _USART_IFC_RXUF_SHIFT 5 /**< Shift value for USART_RXUF */
bogdanm 0:9b334a45a8ff 860 #define _USART_IFC_RXUF_MASK 0x20UL /**< Bit mask for USART_RXUF */
bogdanm 0:9b334a45a8ff 861 #define _USART_IFC_RXUF_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IFC */
bogdanm 0:9b334a45a8ff 862 #define USART_IFC_RXUF_DEFAULT (_USART_IFC_RXUF_DEFAULT << 5) /**< Shifted mode DEFAULT for USART_IFC */
bogdanm 0:9b334a45a8ff 863 #define USART_IFC_TXOF (0x1UL << 6) /**< Clear TX Overflow Interrupt Flag */
bogdanm 0:9b334a45a8ff 864 #define _USART_IFC_TXOF_SHIFT 6 /**< Shift value for USART_TXOF */
bogdanm 0:9b334a45a8ff 865 #define _USART_IFC_TXOF_MASK 0x40UL /**< Bit mask for USART_TXOF */
bogdanm 0:9b334a45a8ff 866 #define _USART_IFC_TXOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IFC */
bogdanm 0:9b334a45a8ff 867 #define USART_IFC_TXOF_DEFAULT (_USART_IFC_TXOF_DEFAULT << 6) /**< Shifted mode DEFAULT for USART_IFC */
bogdanm 0:9b334a45a8ff 868 #define USART_IFC_TXUF (0x1UL << 7) /**< Clear TX Underflow Interrupt Flag */
bogdanm 0:9b334a45a8ff 869 #define _USART_IFC_TXUF_SHIFT 7 /**< Shift value for USART_TXUF */
bogdanm 0:9b334a45a8ff 870 #define _USART_IFC_TXUF_MASK 0x80UL /**< Bit mask for USART_TXUF */
bogdanm 0:9b334a45a8ff 871 #define _USART_IFC_TXUF_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IFC */
bogdanm 0:9b334a45a8ff 872 #define USART_IFC_TXUF_DEFAULT (_USART_IFC_TXUF_DEFAULT << 7) /**< Shifted mode DEFAULT for USART_IFC */
bogdanm 0:9b334a45a8ff 873 #define USART_IFC_PERR (0x1UL << 8) /**< Clear Parity Error Interrupt Flag */
bogdanm 0:9b334a45a8ff 874 #define _USART_IFC_PERR_SHIFT 8 /**< Shift value for USART_PERR */
bogdanm 0:9b334a45a8ff 875 #define _USART_IFC_PERR_MASK 0x100UL /**< Bit mask for USART_PERR */
bogdanm 0:9b334a45a8ff 876 #define _USART_IFC_PERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IFC */
bogdanm 0:9b334a45a8ff 877 #define USART_IFC_PERR_DEFAULT (_USART_IFC_PERR_DEFAULT << 8) /**< Shifted mode DEFAULT for USART_IFC */
bogdanm 0:9b334a45a8ff 878 #define USART_IFC_FERR (0x1UL << 9) /**< Clear Framing Error Interrupt Flag */
bogdanm 0:9b334a45a8ff 879 #define _USART_IFC_FERR_SHIFT 9 /**< Shift value for USART_FERR */
bogdanm 0:9b334a45a8ff 880 #define _USART_IFC_FERR_MASK 0x200UL /**< Bit mask for USART_FERR */
bogdanm 0:9b334a45a8ff 881 #define _USART_IFC_FERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IFC */
bogdanm 0:9b334a45a8ff 882 #define USART_IFC_FERR_DEFAULT (_USART_IFC_FERR_DEFAULT << 9) /**< Shifted mode DEFAULT for USART_IFC */
bogdanm 0:9b334a45a8ff 883 #define USART_IFC_MPAF (0x1UL << 10) /**< Clear Multi-Processor Address Frame Interrupt Flag */
bogdanm 0:9b334a45a8ff 884 #define _USART_IFC_MPAF_SHIFT 10 /**< Shift value for USART_MPAF */
bogdanm 0:9b334a45a8ff 885 #define _USART_IFC_MPAF_MASK 0x400UL /**< Bit mask for USART_MPAF */
bogdanm 0:9b334a45a8ff 886 #define _USART_IFC_MPAF_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IFC */
bogdanm 0:9b334a45a8ff 887 #define USART_IFC_MPAF_DEFAULT (_USART_IFC_MPAF_DEFAULT << 10) /**< Shifted mode DEFAULT for USART_IFC */
bogdanm 0:9b334a45a8ff 888 #define USART_IFC_SSM (0x1UL << 11) /**< Clear Slave-Select In Master Mode Interrupt Flag */
bogdanm 0:9b334a45a8ff 889 #define _USART_IFC_SSM_SHIFT 11 /**< Shift value for USART_SSM */
bogdanm 0:9b334a45a8ff 890 #define _USART_IFC_SSM_MASK 0x800UL /**< Bit mask for USART_SSM */
bogdanm 0:9b334a45a8ff 891 #define _USART_IFC_SSM_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IFC */
bogdanm 0:9b334a45a8ff 892 #define USART_IFC_SSM_DEFAULT (_USART_IFC_SSM_DEFAULT << 11) /**< Shifted mode DEFAULT for USART_IFC */
bogdanm 0:9b334a45a8ff 893 #define USART_IFC_CCF (0x1UL << 12) /**< Clear Collision Check Fail Interrupt Flag */
bogdanm 0:9b334a45a8ff 894 #define _USART_IFC_CCF_SHIFT 12 /**< Shift value for USART_CCF */
bogdanm 0:9b334a45a8ff 895 #define _USART_IFC_CCF_MASK 0x1000UL /**< Bit mask for USART_CCF */
bogdanm 0:9b334a45a8ff 896 #define _USART_IFC_CCF_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IFC */
bogdanm 0:9b334a45a8ff 897 #define USART_IFC_CCF_DEFAULT (_USART_IFC_CCF_DEFAULT << 12) /**< Shifted mode DEFAULT for USART_IFC */
bogdanm 0:9b334a45a8ff 898
bogdanm 0:9b334a45a8ff 899 /* Bit fields for USART IEN */
bogdanm 0:9b334a45a8ff 900 #define _USART_IEN_RESETVALUE 0x00000000UL /**< Default value for USART_IEN */
bogdanm 0:9b334a45a8ff 901 #define _USART_IEN_MASK 0x00001FFFUL /**< Mask for USART_IEN */
bogdanm 0:9b334a45a8ff 902 #define USART_IEN_TXC (0x1UL << 0) /**< TX Complete Interrupt Enable */
bogdanm 0:9b334a45a8ff 903 #define _USART_IEN_TXC_SHIFT 0 /**< Shift value for USART_TXC */
bogdanm 0:9b334a45a8ff 904 #define _USART_IEN_TXC_MASK 0x1UL /**< Bit mask for USART_TXC */
bogdanm 0:9b334a45a8ff 905 #define _USART_IEN_TXC_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IEN */
bogdanm 0:9b334a45a8ff 906 #define USART_IEN_TXC_DEFAULT (_USART_IEN_TXC_DEFAULT << 0) /**< Shifted mode DEFAULT for USART_IEN */
bogdanm 0:9b334a45a8ff 907 #define USART_IEN_TXBL (0x1UL << 1) /**< TX Buffer Level Interrupt Enable */
bogdanm 0:9b334a45a8ff 908 #define _USART_IEN_TXBL_SHIFT 1 /**< Shift value for USART_TXBL */
bogdanm 0:9b334a45a8ff 909 #define _USART_IEN_TXBL_MASK 0x2UL /**< Bit mask for USART_TXBL */
bogdanm 0:9b334a45a8ff 910 #define _USART_IEN_TXBL_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IEN */
bogdanm 0:9b334a45a8ff 911 #define USART_IEN_TXBL_DEFAULT (_USART_IEN_TXBL_DEFAULT << 1) /**< Shifted mode DEFAULT for USART_IEN */
bogdanm 0:9b334a45a8ff 912 #define USART_IEN_RXDATAV (0x1UL << 2) /**< RX Data Valid Interrupt Enable */
bogdanm 0:9b334a45a8ff 913 #define _USART_IEN_RXDATAV_SHIFT 2 /**< Shift value for USART_RXDATAV */
bogdanm 0:9b334a45a8ff 914 #define _USART_IEN_RXDATAV_MASK 0x4UL /**< Bit mask for USART_RXDATAV */
bogdanm 0:9b334a45a8ff 915 #define _USART_IEN_RXDATAV_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IEN */
bogdanm 0:9b334a45a8ff 916 #define USART_IEN_RXDATAV_DEFAULT (_USART_IEN_RXDATAV_DEFAULT << 2) /**< Shifted mode DEFAULT for USART_IEN */
bogdanm 0:9b334a45a8ff 917 #define USART_IEN_RXFULL (0x1UL << 3) /**< RX Buffer Full Interrupt Enable */
bogdanm 0:9b334a45a8ff 918 #define _USART_IEN_RXFULL_SHIFT 3 /**< Shift value for USART_RXFULL */
bogdanm 0:9b334a45a8ff 919 #define _USART_IEN_RXFULL_MASK 0x8UL /**< Bit mask for USART_RXFULL */
bogdanm 0:9b334a45a8ff 920 #define _USART_IEN_RXFULL_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IEN */
bogdanm 0:9b334a45a8ff 921 #define USART_IEN_RXFULL_DEFAULT (_USART_IEN_RXFULL_DEFAULT << 3) /**< Shifted mode DEFAULT for USART_IEN */
bogdanm 0:9b334a45a8ff 922 #define USART_IEN_RXOF (0x1UL << 4) /**< RX Overflow Interrupt Enable */
bogdanm 0:9b334a45a8ff 923 #define _USART_IEN_RXOF_SHIFT 4 /**< Shift value for USART_RXOF */
bogdanm 0:9b334a45a8ff 924 #define _USART_IEN_RXOF_MASK 0x10UL /**< Bit mask for USART_RXOF */
bogdanm 0:9b334a45a8ff 925 #define _USART_IEN_RXOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IEN */
bogdanm 0:9b334a45a8ff 926 #define USART_IEN_RXOF_DEFAULT (_USART_IEN_RXOF_DEFAULT << 4) /**< Shifted mode DEFAULT for USART_IEN */
bogdanm 0:9b334a45a8ff 927 #define USART_IEN_RXUF (0x1UL << 5) /**< RX Underflow Interrupt Enable */
bogdanm 0:9b334a45a8ff 928 #define _USART_IEN_RXUF_SHIFT 5 /**< Shift value for USART_RXUF */
bogdanm 0:9b334a45a8ff 929 #define _USART_IEN_RXUF_MASK 0x20UL /**< Bit mask for USART_RXUF */
bogdanm 0:9b334a45a8ff 930 #define _USART_IEN_RXUF_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IEN */
bogdanm 0:9b334a45a8ff 931 #define USART_IEN_RXUF_DEFAULT (_USART_IEN_RXUF_DEFAULT << 5) /**< Shifted mode DEFAULT for USART_IEN */
bogdanm 0:9b334a45a8ff 932 #define USART_IEN_TXOF (0x1UL << 6) /**< TX Overflow Interrupt Enable */
bogdanm 0:9b334a45a8ff 933 #define _USART_IEN_TXOF_SHIFT 6 /**< Shift value for USART_TXOF */
bogdanm 0:9b334a45a8ff 934 #define _USART_IEN_TXOF_MASK 0x40UL /**< Bit mask for USART_TXOF */
bogdanm 0:9b334a45a8ff 935 #define _USART_IEN_TXOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IEN */
bogdanm 0:9b334a45a8ff 936 #define USART_IEN_TXOF_DEFAULT (_USART_IEN_TXOF_DEFAULT << 6) /**< Shifted mode DEFAULT for USART_IEN */
bogdanm 0:9b334a45a8ff 937 #define USART_IEN_TXUF (0x1UL << 7) /**< TX Underflow Interrupt Enable */
bogdanm 0:9b334a45a8ff 938 #define _USART_IEN_TXUF_SHIFT 7 /**< Shift value for USART_TXUF */
bogdanm 0:9b334a45a8ff 939 #define _USART_IEN_TXUF_MASK 0x80UL /**< Bit mask for USART_TXUF */
bogdanm 0:9b334a45a8ff 940 #define _USART_IEN_TXUF_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IEN */
bogdanm 0:9b334a45a8ff 941 #define USART_IEN_TXUF_DEFAULT (_USART_IEN_TXUF_DEFAULT << 7) /**< Shifted mode DEFAULT for USART_IEN */
bogdanm 0:9b334a45a8ff 942 #define USART_IEN_PERR (0x1UL << 8) /**< Parity Error Interrupt Enable */
bogdanm 0:9b334a45a8ff 943 #define _USART_IEN_PERR_SHIFT 8 /**< Shift value for USART_PERR */
bogdanm 0:9b334a45a8ff 944 #define _USART_IEN_PERR_MASK 0x100UL /**< Bit mask for USART_PERR */
bogdanm 0:9b334a45a8ff 945 #define _USART_IEN_PERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IEN */
bogdanm 0:9b334a45a8ff 946 #define USART_IEN_PERR_DEFAULT (_USART_IEN_PERR_DEFAULT << 8) /**< Shifted mode DEFAULT for USART_IEN */
bogdanm 0:9b334a45a8ff 947 #define USART_IEN_FERR (0x1UL << 9) /**< Framing Error Interrupt Enable */
bogdanm 0:9b334a45a8ff 948 #define _USART_IEN_FERR_SHIFT 9 /**< Shift value for USART_FERR */
bogdanm 0:9b334a45a8ff 949 #define _USART_IEN_FERR_MASK 0x200UL /**< Bit mask for USART_FERR */
bogdanm 0:9b334a45a8ff 950 #define _USART_IEN_FERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IEN */
bogdanm 0:9b334a45a8ff 951 #define USART_IEN_FERR_DEFAULT (_USART_IEN_FERR_DEFAULT << 9) /**< Shifted mode DEFAULT for USART_IEN */
bogdanm 0:9b334a45a8ff 952 #define USART_IEN_MPAF (0x1UL << 10) /**< Multi-Processor Address Frame Interrupt Enable */
bogdanm 0:9b334a45a8ff 953 #define _USART_IEN_MPAF_SHIFT 10 /**< Shift value for USART_MPAF */
bogdanm 0:9b334a45a8ff 954 #define _USART_IEN_MPAF_MASK 0x400UL /**< Bit mask for USART_MPAF */
bogdanm 0:9b334a45a8ff 955 #define _USART_IEN_MPAF_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IEN */
bogdanm 0:9b334a45a8ff 956 #define USART_IEN_MPAF_DEFAULT (_USART_IEN_MPAF_DEFAULT << 10) /**< Shifted mode DEFAULT for USART_IEN */
bogdanm 0:9b334a45a8ff 957 #define USART_IEN_SSM (0x1UL << 11) /**< Slave-Select In Master Mode Interrupt Enable */
bogdanm 0:9b334a45a8ff 958 #define _USART_IEN_SSM_SHIFT 11 /**< Shift value for USART_SSM */
bogdanm 0:9b334a45a8ff 959 #define _USART_IEN_SSM_MASK 0x800UL /**< Bit mask for USART_SSM */
bogdanm 0:9b334a45a8ff 960 #define _USART_IEN_SSM_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IEN */
bogdanm 0:9b334a45a8ff 961 #define USART_IEN_SSM_DEFAULT (_USART_IEN_SSM_DEFAULT << 11) /**< Shifted mode DEFAULT for USART_IEN */
bogdanm 0:9b334a45a8ff 962 #define USART_IEN_CCF (0x1UL << 12) /**< Collision Check Fail Interrupt Enable */
bogdanm 0:9b334a45a8ff 963 #define _USART_IEN_CCF_SHIFT 12 /**< Shift value for USART_CCF */
bogdanm 0:9b334a45a8ff 964 #define _USART_IEN_CCF_MASK 0x1000UL /**< Bit mask for USART_CCF */
bogdanm 0:9b334a45a8ff 965 #define _USART_IEN_CCF_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IEN */
bogdanm 0:9b334a45a8ff 966 #define USART_IEN_CCF_DEFAULT (_USART_IEN_CCF_DEFAULT << 12) /**< Shifted mode DEFAULT for USART_IEN */
bogdanm 0:9b334a45a8ff 967
bogdanm 0:9b334a45a8ff 968 /* Bit fields for USART IRCTRL */
bogdanm 0:9b334a45a8ff 969 #define _USART_IRCTRL_RESETVALUE 0x00000000UL /**< Default value for USART_IRCTRL */
bogdanm 0:9b334a45a8ff 970 #define _USART_IRCTRL_MASK 0x000000BFUL /**< Mask for USART_IRCTRL */
bogdanm 0:9b334a45a8ff 971 #define USART_IRCTRL_IREN (0x1UL << 0) /**< Enable IrDA Module */
bogdanm 0:9b334a45a8ff 972 #define _USART_IRCTRL_IREN_SHIFT 0 /**< Shift value for USART_IREN */
bogdanm 0:9b334a45a8ff 973 #define _USART_IRCTRL_IREN_MASK 0x1UL /**< Bit mask for USART_IREN */
bogdanm 0:9b334a45a8ff 974 #define _USART_IRCTRL_IREN_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IRCTRL */
bogdanm 0:9b334a45a8ff 975 #define USART_IRCTRL_IREN_DEFAULT (_USART_IRCTRL_IREN_DEFAULT << 0) /**< Shifted mode DEFAULT for USART_IRCTRL */
bogdanm 0:9b334a45a8ff 976 #define _USART_IRCTRL_IRPW_SHIFT 1 /**< Shift value for USART_IRPW */
bogdanm 0:9b334a45a8ff 977 #define _USART_IRCTRL_IRPW_MASK 0x6UL /**< Bit mask for USART_IRPW */
bogdanm 0:9b334a45a8ff 978 #define _USART_IRCTRL_IRPW_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IRCTRL */
bogdanm 0:9b334a45a8ff 979 #define _USART_IRCTRL_IRPW_ONE 0x00000000UL /**< Mode ONE for USART_IRCTRL */
bogdanm 0:9b334a45a8ff 980 #define _USART_IRCTRL_IRPW_TWO 0x00000001UL /**< Mode TWO for USART_IRCTRL */
bogdanm 0:9b334a45a8ff 981 #define _USART_IRCTRL_IRPW_THREE 0x00000002UL /**< Mode THREE for USART_IRCTRL */
bogdanm 0:9b334a45a8ff 982 #define _USART_IRCTRL_IRPW_FOUR 0x00000003UL /**< Mode FOUR for USART_IRCTRL */
bogdanm 0:9b334a45a8ff 983 #define USART_IRCTRL_IRPW_DEFAULT (_USART_IRCTRL_IRPW_DEFAULT << 1) /**< Shifted mode DEFAULT for USART_IRCTRL */
bogdanm 0:9b334a45a8ff 984 #define USART_IRCTRL_IRPW_ONE (_USART_IRCTRL_IRPW_ONE << 1) /**< Shifted mode ONE for USART_IRCTRL */
bogdanm 0:9b334a45a8ff 985 #define USART_IRCTRL_IRPW_TWO (_USART_IRCTRL_IRPW_TWO << 1) /**< Shifted mode TWO for USART_IRCTRL */
bogdanm 0:9b334a45a8ff 986 #define USART_IRCTRL_IRPW_THREE (_USART_IRCTRL_IRPW_THREE << 1) /**< Shifted mode THREE for USART_IRCTRL */
bogdanm 0:9b334a45a8ff 987 #define USART_IRCTRL_IRPW_FOUR (_USART_IRCTRL_IRPW_FOUR << 1) /**< Shifted mode FOUR for USART_IRCTRL */
bogdanm 0:9b334a45a8ff 988 #define USART_IRCTRL_IRFILT (0x1UL << 3) /**< IrDA RX Filter */
bogdanm 0:9b334a45a8ff 989 #define _USART_IRCTRL_IRFILT_SHIFT 3 /**< Shift value for USART_IRFILT */
bogdanm 0:9b334a45a8ff 990 #define _USART_IRCTRL_IRFILT_MASK 0x8UL /**< Bit mask for USART_IRFILT */
bogdanm 0:9b334a45a8ff 991 #define _USART_IRCTRL_IRFILT_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IRCTRL */
bogdanm 0:9b334a45a8ff 992 #define USART_IRCTRL_IRFILT_DEFAULT (_USART_IRCTRL_IRFILT_DEFAULT << 3) /**< Shifted mode DEFAULT for USART_IRCTRL */
bogdanm 0:9b334a45a8ff 993 #define _USART_IRCTRL_IRPRSSEL_SHIFT 4 /**< Shift value for USART_IRPRSSEL */
bogdanm 0:9b334a45a8ff 994 #define _USART_IRCTRL_IRPRSSEL_MASK 0x30UL /**< Bit mask for USART_IRPRSSEL */
bogdanm 0:9b334a45a8ff 995 #define _USART_IRCTRL_IRPRSSEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IRCTRL */
bogdanm 0:9b334a45a8ff 996 #define _USART_IRCTRL_IRPRSSEL_PRSCH0 0x00000000UL /**< Mode PRSCH0 for USART_IRCTRL */
bogdanm 0:9b334a45a8ff 997 #define _USART_IRCTRL_IRPRSSEL_PRSCH1 0x00000001UL /**< Mode PRSCH1 for USART_IRCTRL */
bogdanm 0:9b334a45a8ff 998 #define _USART_IRCTRL_IRPRSSEL_PRSCH2 0x00000002UL /**< Mode PRSCH2 for USART_IRCTRL */
bogdanm 0:9b334a45a8ff 999 #define _USART_IRCTRL_IRPRSSEL_PRSCH3 0x00000003UL /**< Mode PRSCH3 for USART_IRCTRL */
bogdanm 0:9b334a45a8ff 1000 #define USART_IRCTRL_IRPRSSEL_DEFAULT (_USART_IRCTRL_IRPRSSEL_DEFAULT << 4) /**< Shifted mode DEFAULT for USART_IRCTRL */
bogdanm 0:9b334a45a8ff 1001 #define USART_IRCTRL_IRPRSSEL_PRSCH0 (_USART_IRCTRL_IRPRSSEL_PRSCH0 << 4) /**< Shifted mode PRSCH0 for USART_IRCTRL */
bogdanm 0:9b334a45a8ff 1002 #define USART_IRCTRL_IRPRSSEL_PRSCH1 (_USART_IRCTRL_IRPRSSEL_PRSCH1 << 4) /**< Shifted mode PRSCH1 for USART_IRCTRL */
bogdanm 0:9b334a45a8ff 1003 #define USART_IRCTRL_IRPRSSEL_PRSCH2 (_USART_IRCTRL_IRPRSSEL_PRSCH2 << 4) /**< Shifted mode PRSCH2 for USART_IRCTRL */
bogdanm 0:9b334a45a8ff 1004 #define USART_IRCTRL_IRPRSSEL_PRSCH3 (_USART_IRCTRL_IRPRSSEL_PRSCH3 << 4) /**< Shifted mode PRSCH3 for USART_IRCTRL */
bogdanm 0:9b334a45a8ff 1005 #define USART_IRCTRL_IRPRSEN (0x1UL << 7) /**< IrDA PRS Channel Enable */
bogdanm 0:9b334a45a8ff 1006 #define _USART_IRCTRL_IRPRSEN_SHIFT 7 /**< Shift value for USART_IRPRSEN */
bogdanm 0:9b334a45a8ff 1007 #define _USART_IRCTRL_IRPRSEN_MASK 0x80UL /**< Bit mask for USART_IRPRSEN */
bogdanm 0:9b334a45a8ff 1008 #define _USART_IRCTRL_IRPRSEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_IRCTRL */
bogdanm 0:9b334a45a8ff 1009 #define USART_IRCTRL_IRPRSEN_DEFAULT (_USART_IRCTRL_IRPRSEN_DEFAULT << 7) /**< Shifted mode DEFAULT for USART_IRCTRL */
bogdanm 0:9b334a45a8ff 1010
bogdanm 0:9b334a45a8ff 1011 /* Bit fields for USART ROUTE */
bogdanm 0:9b334a45a8ff 1012 #define _USART_ROUTE_RESETVALUE 0x00000000UL /**< Default value for USART_ROUTE */
bogdanm 0:9b334a45a8ff 1013 #define _USART_ROUTE_MASK 0x0000070FUL /**< Mask for USART_ROUTE */
bogdanm 0:9b334a45a8ff 1014 #define USART_ROUTE_RXPEN (0x1UL << 0) /**< RX Pin Enable */
bogdanm 0:9b334a45a8ff 1015 #define _USART_ROUTE_RXPEN_SHIFT 0 /**< Shift value for USART_RXPEN */
bogdanm 0:9b334a45a8ff 1016 #define _USART_ROUTE_RXPEN_MASK 0x1UL /**< Bit mask for USART_RXPEN */
bogdanm 0:9b334a45a8ff 1017 #define _USART_ROUTE_RXPEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_ROUTE */
bogdanm 0:9b334a45a8ff 1018 #define USART_ROUTE_RXPEN_DEFAULT (_USART_ROUTE_RXPEN_DEFAULT << 0) /**< Shifted mode DEFAULT for USART_ROUTE */
bogdanm 0:9b334a45a8ff 1019 #define USART_ROUTE_TXPEN (0x1UL << 1) /**< TX Pin Enable */
bogdanm 0:9b334a45a8ff 1020 #define _USART_ROUTE_TXPEN_SHIFT 1 /**< Shift value for USART_TXPEN */
bogdanm 0:9b334a45a8ff 1021 #define _USART_ROUTE_TXPEN_MASK 0x2UL /**< Bit mask for USART_TXPEN */
bogdanm 0:9b334a45a8ff 1022 #define _USART_ROUTE_TXPEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_ROUTE */
bogdanm 0:9b334a45a8ff 1023 #define USART_ROUTE_TXPEN_DEFAULT (_USART_ROUTE_TXPEN_DEFAULT << 1) /**< Shifted mode DEFAULT for USART_ROUTE */
bogdanm 0:9b334a45a8ff 1024 #define USART_ROUTE_CSPEN (0x1UL << 2) /**< CS Pin Enable */
bogdanm 0:9b334a45a8ff 1025 #define _USART_ROUTE_CSPEN_SHIFT 2 /**< Shift value for USART_CSPEN */
bogdanm 0:9b334a45a8ff 1026 #define _USART_ROUTE_CSPEN_MASK 0x4UL /**< Bit mask for USART_CSPEN */
bogdanm 0:9b334a45a8ff 1027 #define _USART_ROUTE_CSPEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_ROUTE */
bogdanm 0:9b334a45a8ff 1028 #define USART_ROUTE_CSPEN_DEFAULT (_USART_ROUTE_CSPEN_DEFAULT << 2) /**< Shifted mode DEFAULT for USART_ROUTE */
bogdanm 0:9b334a45a8ff 1029 #define USART_ROUTE_CLKPEN (0x1UL << 3) /**< CLK Pin Enable */
bogdanm 0:9b334a45a8ff 1030 #define _USART_ROUTE_CLKPEN_SHIFT 3 /**< Shift value for USART_CLKPEN */
bogdanm 0:9b334a45a8ff 1031 #define _USART_ROUTE_CLKPEN_MASK 0x8UL /**< Bit mask for USART_CLKPEN */
bogdanm 0:9b334a45a8ff 1032 #define _USART_ROUTE_CLKPEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_ROUTE */
bogdanm 0:9b334a45a8ff 1033 #define USART_ROUTE_CLKPEN_DEFAULT (_USART_ROUTE_CLKPEN_DEFAULT << 3) /**< Shifted mode DEFAULT for USART_ROUTE */
bogdanm 0:9b334a45a8ff 1034 #define _USART_ROUTE_LOCATION_SHIFT 8 /**< Shift value for USART_LOCATION */
bogdanm 0:9b334a45a8ff 1035 #define _USART_ROUTE_LOCATION_MASK 0x700UL /**< Bit mask for USART_LOCATION */
bogdanm 0:9b334a45a8ff 1036 #define _USART_ROUTE_LOCATION_LOC0 0x00000000UL /**< Mode LOC0 for USART_ROUTE */
bogdanm 0:9b334a45a8ff 1037 #define _USART_ROUTE_LOCATION_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_ROUTE */
bogdanm 0:9b334a45a8ff 1038 #define _USART_ROUTE_LOCATION_LOC1 0x00000001UL /**< Mode LOC1 for USART_ROUTE */
bogdanm 0:9b334a45a8ff 1039 #define _USART_ROUTE_LOCATION_LOC2 0x00000002UL /**< Mode LOC2 for USART_ROUTE */
bogdanm 0:9b334a45a8ff 1040 #define _USART_ROUTE_LOCATION_LOC3 0x00000003UL /**< Mode LOC3 for USART_ROUTE */
bogdanm 0:9b334a45a8ff 1041 #define USART_ROUTE_LOCATION_LOC0 (_USART_ROUTE_LOCATION_LOC0 << 8) /**< Shifted mode LOC0 for USART_ROUTE */
bogdanm 0:9b334a45a8ff 1042 #define USART_ROUTE_LOCATION_DEFAULT (_USART_ROUTE_LOCATION_DEFAULT << 8) /**< Shifted mode DEFAULT for USART_ROUTE */
bogdanm 0:9b334a45a8ff 1043 #define USART_ROUTE_LOCATION_LOC1 (_USART_ROUTE_LOCATION_LOC1 << 8) /**< Shifted mode LOC1 for USART_ROUTE */
bogdanm 0:9b334a45a8ff 1044 #define USART_ROUTE_LOCATION_LOC2 (_USART_ROUTE_LOCATION_LOC2 << 8) /**< Shifted mode LOC2 for USART_ROUTE */
bogdanm 0:9b334a45a8ff 1045 #define USART_ROUTE_LOCATION_LOC3 (_USART_ROUTE_LOCATION_LOC3 << 8) /**< Shifted mode LOC3 for USART_ROUTE */
bogdanm 0:9b334a45a8ff 1046
bogdanm 0:9b334a45a8ff 1047 /* Bit fields for USART INPUT */
bogdanm 0:9b334a45a8ff 1048 #define _USART_INPUT_RESETVALUE 0x00000000UL /**< Default value for USART_INPUT */
bogdanm 0:9b334a45a8ff 1049 #define _USART_INPUT_MASK 0x00000013UL /**< Mask for USART_INPUT */
bogdanm 0:9b334a45a8ff 1050 #define _USART_INPUT_RXPRSSEL_SHIFT 0 /**< Shift value for USART_RXPRSSEL */
bogdanm 0:9b334a45a8ff 1051 #define _USART_INPUT_RXPRSSEL_MASK 0x3UL /**< Bit mask for USART_RXPRSSEL */
bogdanm 0:9b334a45a8ff 1052 #define _USART_INPUT_RXPRSSEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_INPUT */
bogdanm 0:9b334a45a8ff 1053 #define _USART_INPUT_RXPRSSEL_PRSCH0 0x00000000UL /**< Mode PRSCH0 for USART_INPUT */
bogdanm 0:9b334a45a8ff 1054 #define _USART_INPUT_RXPRSSEL_PRSCH1 0x00000001UL /**< Mode PRSCH1 for USART_INPUT */
bogdanm 0:9b334a45a8ff 1055 #define _USART_INPUT_RXPRSSEL_PRSCH2 0x00000002UL /**< Mode PRSCH2 for USART_INPUT */
bogdanm 0:9b334a45a8ff 1056 #define _USART_INPUT_RXPRSSEL_PRSCH3 0x00000003UL /**< Mode PRSCH3 for USART_INPUT */
bogdanm 0:9b334a45a8ff 1057 #define USART_INPUT_RXPRSSEL_DEFAULT (_USART_INPUT_RXPRSSEL_DEFAULT << 0) /**< Shifted mode DEFAULT for USART_INPUT */
bogdanm 0:9b334a45a8ff 1058 #define USART_INPUT_RXPRSSEL_PRSCH0 (_USART_INPUT_RXPRSSEL_PRSCH0 << 0) /**< Shifted mode PRSCH0 for USART_INPUT */
bogdanm 0:9b334a45a8ff 1059 #define USART_INPUT_RXPRSSEL_PRSCH1 (_USART_INPUT_RXPRSSEL_PRSCH1 << 0) /**< Shifted mode PRSCH1 for USART_INPUT */
bogdanm 0:9b334a45a8ff 1060 #define USART_INPUT_RXPRSSEL_PRSCH2 (_USART_INPUT_RXPRSSEL_PRSCH2 << 0) /**< Shifted mode PRSCH2 for USART_INPUT */
bogdanm 0:9b334a45a8ff 1061 #define USART_INPUT_RXPRSSEL_PRSCH3 (_USART_INPUT_RXPRSSEL_PRSCH3 << 0) /**< Shifted mode PRSCH3 for USART_INPUT */
bogdanm 0:9b334a45a8ff 1062 #define USART_INPUT_RXPRS (0x1UL << 4) /**< PRS RX Enable */
bogdanm 0:9b334a45a8ff 1063 #define _USART_INPUT_RXPRS_SHIFT 4 /**< Shift value for USART_RXPRS */
bogdanm 0:9b334a45a8ff 1064 #define _USART_INPUT_RXPRS_MASK 0x10UL /**< Bit mask for USART_RXPRS */
bogdanm 0:9b334a45a8ff 1065 #define _USART_INPUT_RXPRS_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_INPUT */
bogdanm 0:9b334a45a8ff 1066 #define USART_INPUT_RXPRS_DEFAULT (_USART_INPUT_RXPRS_DEFAULT << 4) /**< Shifted mode DEFAULT for USART_INPUT */
bogdanm 0:9b334a45a8ff 1067
bogdanm 0:9b334a45a8ff 1068 /* Bit fields for USART I2SCTRL */
bogdanm 0:9b334a45a8ff 1069 #define _USART_I2SCTRL_RESETVALUE 0x00000000UL /**< Default value for USART_I2SCTRL */
bogdanm 0:9b334a45a8ff 1070 #define _USART_I2SCTRL_MASK 0x0000071FUL /**< Mask for USART_I2SCTRL */
bogdanm 0:9b334a45a8ff 1071 #define USART_I2SCTRL_EN (0x1UL << 0) /**< Enable I2S Mode */
bogdanm 0:9b334a45a8ff 1072 #define _USART_I2SCTRL_EN_SHIFT 0 /**< Shift value for USART_EN */
bogdanm 0:9b334a45a8ff 1073 #define _USART_I2SCTRL_EN_MASK 0x1UL /**< Bit mask for USART_EN */
bogdanm 0:9b334a45a8ff 1074 #define _USART_I2SCTRL_EN_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_I2SCTRL */
bogdanm 0:9b334a45a8ff 1075 #define USART_I2SCTRL_EN_DEFAULT (_USART_I2SCTRL_EN_DEFAULT << 0) /**< Shifted mode DEFAULT for USART_I2SCTRL */
bogdanm 0:9b334a45a8ff 1076 #define USART_I2SCTRL_MONO (0x1UL << 1) /**< Stero or Mono */
bogdanm 0:9b334a45a8ff 1077 #define _USART_I2SCTRL_MONO_SHIFT 1 /**< Shift value for USART_MONO */
bogdanm 0:9b334a45a8ff 1078 #define _USART_I2SCTRL_MONO_MASK 0x2UL /**< Bit mask for USART_MONO */
bogdanm 0:9b334a45a8ff 1079 #define _USART_I2SCTRL_MONO_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_I2SCTRL */
bogdanm 0:9b334a45a8ff 1080 #define USART_I2SCTRL_MONO_DEFAULT (_USART_I2SCTRL_MONO_DEFAULT << 1) /**< Shifted mode DEFAULT for USART_I2SCTRL */
bogdanm 0:9b334a45a8ff 1081 #define USART_I2SCTRL_JUSTIFY (0x1UL << 2) /**< Justification of I2S Data */
bogdanm 0:9b334a45a8ff 1082 #define _USART_I2SCTRL_JUSTIFY_SHIFT 2 /**< Shift value for USART_JUSTIFY */
bogdanm 0:9b334a45a8ff 1083 #define _USART_I2SCTRL_JUSTIFY_MASK 0x4UL /**< Bit mask for USART_JUSTIFY */
bogdanm 0:9b334a45a8ff 1084 #define _USART_I2SCTRL_JUSTIFY_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_I2SCTRL */
bogdanm 0:9b334a45a8ff 1085 #define _USART_I2SCTRL_JUSTIFY_LEFT 0x00000000UL /**< Mode LEFT for USART_I2SCTRL */
bogdanm 0:9b334a45a8ff 1086 #define _USART_I2SCTRL_JUSTIFY_RIGHT 0x00000001UL /**< Mode RIGHT for USART_I2SCTRL */
bogdanm 0:9b334a45a8ff 1087 #define USART_I2SCTRL_JUSTIFY_DEFAULT (_USART_I2SCTRL_JUSTIFY_DEFAULT << 2) /**< Shifted mode DEFAULT for USART_I2SCTRL */
bogdanm 0:9b334a45a8ff 1088 #define USART_I2SCTRL_JUSTIFY_LEFT (_USART_I2SCTRL_JUSTIFY_LEFT << 2) /**< Shifted mode LEFT for USART_I2SCTRL */
bogdanm 0:9b334a45a8ff 1089 #define USART_I2SCTRL_JUSTIFY_RIGHT (_USART_I2SCTRL_JUSTIFY_RIGHT << 2) /**< Shifted mode RIGHT for USART_I2SCTRL */
bogdanm 0:9b334a45a8ff 1090 #define USART_I2SCTRL_DMASPLIT (0x1UL << 3) /**< Separate DMA Request For Left/Right Data */
bogdanm 0:9b334a45a8ff 1091 #define _USART_I2SCTRL_DMASPLIT_SHIFT 3 /**< Shift value for USART_DMASPLIT */
bogdanm 0:9b334a45a8ff 1092 #define _USART_I2SCTRL_DMASPLIT_MASK 0x8UL /**< Bit mask for USART_DMASPLIT */
bogdanm 0:9b334a45a8ff 1093 #define _USART_I2SCTRL_DMASPLIT_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_I2SCTRL */
bogdanm 0:9b334a45a8ff 1094 #define USART_I2SCTRL_DMASPLIT_DEFAULT (_USART_I2SCTRL_DMASPLIT_DEFAULT << 3) /**< Shifted mode DEFAULT for USART_I2SCTRL */
bogdanm 0:9b334a45a8ff 1095 #define USART_I2SCTRL_DELAY (0x1UL << 4) /**< Delay on I2S data */
bogdanm 0:9b334a45a8ff 1096 #define _USART_I2SCTRL_DELAY_SHIFT 4 /**< Shift value for USART_DELAY */
bogdanm 0:9b334a45a8ff 1097 #define _USART_I2SCTRL_DELAY_MASK 0x10UL /**< Bit mask for USART_DELAY */
bogdanm 0:9b334a45a8ff 1098 #define _USART_I2SCTRL_DELAY_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_I2SCTRL */
bogdanm 0:9b334a45a8ff 1099 #define USART_I2SCTRL_DELAY_DEFAULT (_USART_I2SCTRL_DELAY_DEFAULT << 4) /**< Shifted mode DEFAULT for USART_I2SCTRL */
bogdanm 0:9b334a45a8ff 1100 #define _USART_I2SCTRL_FORMAT_SHIFT 8 /**< Shift value for USART_FORMAT */
bogdanm 0:9b334a45a8ff 1101 #define _USART_I2SCTRL_FORMAT_MASK 0x700UL /**< Bit mask for USART_FORMAT */
bogdanm 0:9b334a45a8ff 1102 #define _USART_I2SCTRL_FORMAT_DEFAULT 0x00000000UL /**< Mode DEFAULT for USART_I2SCTRL */
bogdanm 0:9b334a45a8ff 1103 #define _USART_I2SCTRL_FORMAT_W32D32 0x00000000UL /**< Mode W32D32 for USART_I2SCTRL */
bogdanm 0:9b334a45a8ff 1104 #define _USART_I2SCTRL_FORMAT_W32D24M 0x00000001UL /**< Mode W32D24M for USART_I2SCTRL */
bogdanm 0:9b334a45a8ff 1105 #define _USART_I2SCTRL_FORMAT_W32D24 0x00000002UL /**< Mode W32D24 for USART_I2SCTRL */
bogdanm 0:9b334a45a8ff 1106 #define _USART_I2SCTRL_FORMAT_W32D16 0x00000003UL /**< Mode W32D16 for USART_I2SCTRL */
bogdanm 0:9b334a45a8ff 1107 #define _USART_I2SCTRL_FORMAT_W32D8 0x00000004UL /**< Mode W32D8 for USART_I2SCTRL */
bogdanm 0:9b334a45a8ff 1108 #define _USART_I2SCTRL_FORMAT_W16D16 0x00000005UL /**< Mode W16D16 for USART_I2SCTRL */
bogdanm 0:9b334a45a8ff 1109 #define _USART_I2SCTRL_FORMAT_W16D8 0x00000006UL /**< Mode W16D8 for USART_I2SCTRL */
bogdanm 0:9b334a45a8ff 1110 #define _USART_I2SCTRL_FORMAT_W8D8 0x00000007UL /**< Mode W8D8 for USART_I2SCTRL */
bogdanm 0:9b334a45a8ff 1111 #define USART_I2SCTRL_FORMAT_DEFAULT (_USART_I2SCTRL_FORMAT_DEFAULT << 8) /**< Shifted mode DEFAULT for USART_I2SCTRL */
bogdanm 0:9b334a45a8ff 1112 #define USART_I2SCTRL_FORMAT_W32D32 (_USART_I2SCTRL_FORMAT_W32D32 << 8) /**< Shifted mode W32D32 for USART_I2SCTRL */
bogdanm 0:9b334a45a8ff 1113 #define USART_I2SCTRL_FORMAT_W32D24M (_USART_I2SCTRL_FORMAT_W32D24M << 8) /**< Shifted mode W32D24M for USART_I2SCTRL */
bogdanm 0:9b334a45a8ff 1114 #define USART_I2SCTRL_FORMAT_W32D24 (_USART_I2SCTRL_FORMAT_W32D24 << 8) /**< Shifted mode W32D24 for USART_I2SCTRL */
bogdanm 0:9b334a45a8ff 1115 #define USART_I2SCTRL_FORMAT_W32D16 (_USART_I2SCTRL_FORMAT_W32D16 << 8) /**< Shifted mode W32D16 for USART_I2SCTRL */
bogdanm 0:9b334a45a8ff 1116 #define USART_I2SCTRL_FORMAT_W32D8 (_USART_I2SCTRL_FORMAT_W32D8 << 8) /**< Shifted mode W32D8 for USART_I2SCTRL */
bogdanm 0:9b334a45a8ff 1117 #define USART_I2SCTRL_FORMAT_W16D16 (_USART_I2SCTRL_FORMAT_W16D16 << 8) /**< Shifted mode W16D16 for USART_I2SCTRL */
bogdanm 0:9b334a45a8ff 1118 #define USART_I2SCTRL_FORMAT_W16D8 (_USART_I2SCTRL_FORMAT_W16D8 << 8) /**< Shifted mode W16D8 for USART_I2SCTRL */
bogdanm 0:9b334a45a8ff 1119 #define USART_I2SCTRL_FORMAT_W8D8 (_USART_I2SCTRL_FORMAT_W8D8 << 8) /**< Shifted mode W8D8 for USART_I2SCTRL */
bogdanm 0:9b334a45a8ff 1120
bogdanm 0:9b334a45a8ff 1121 /** @} End of group EFM32ZG_USART */
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