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targets/TARGET_NXP/TARGET_LPC11U6X/device/system_LPC11U6x.h@149:156823d33999, 2016-10-28 (annotated)

Committer:
<>
Date:
Fri Oct 28 11:17:30 2016 +0100
Revision:
149:156823d33999
Parent:
targets/cmsis/TARGET_NXP/TARGET_LPC11U6X/system_LPC11U6x.h@144:ef7eb2e8f9f7 
This updates the lib to the mbed lib v128



NOTE: This release includes a restructuring of the file and directory locations and thus some

include paths in your code may need updating accordingly.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**************************************************************************//**
<> 144:ef7eb2e8f9f7 2 * @file system_LPC11U6x.h
<> 144:ef7eb2e8f9f7 3 * @brief CMSIS Cortex-M3 Device System Header File for
<> 144:ef7eb2e8f9f7 4 * NXP LPC11U6x Device Series
<> 144:ef7eb2e8f9f7 5 * @version V1.00
<> 144:ef7eb2e8f9f7 6 * @date 19. July 2013
<> 144:ef7eb2e8f9f7 7 *
<> 144:ef7eb2e8f9f7 8 * @note
<> 144:ef7eb2e8f9f7 9 * Copyright (C) 2013 ARM Limited. All rights reserved.
<> 144:ef7eb2e8f9f7 10 *
<> 144:ef7eb2e8f9f7 11 * @par
<> 144:ef7eb2e8f9f7 12 * ARM Limited (ARM) is supplying this software for use with Cortex-M
<> 144:ef7eb2e8f9f7 13 * processor based microcontrollers. This file can be freely distributed
<> 144:ef7eb2e8f9f7 14 * within development tools that are supporting such ARM based processors.
<> 144:ef7eb2e8f9f7 15 *
<> 144:ef7eb2e8f9f7 16 * @par
<> 144:ef7eb2e8f9f7 17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
<> 144:ef7eb2e8f9f7 18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
<> 144:ef7eb2e8f9f7 19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
<> 144:ef7eb2e8f9f7 20 * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
<> 144:ef7eb2e8f9f7 21 * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
<> 144:ef7eb2e8f9f7 22 *
<> 144:ef7eb2e8f9f7 23 ******************************************************************************/
<> 144:ef7eb2e8f9f7 24
<> 144:ef7eb2e8f9f7 25
<> 144:ef7eb2e8f9f7 26 #ifndef __SYSTEM_LPC11U6x_H
<> 144:ef7eb2e8f9f7 27 #define __SYSTEM_LPC11U6x_H
<> 144:ef7eb2e8f9f7 28
<> 144:ef7eb2e8f9f7 29 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 30 extern "C" {
<> 144:ef7eb2e8f9f7 31 #endif
<> 144:ef7eb2e8f9f7 32
<> 144:ef7eb2e8f9f7 33 #include <stdint.h>
<> 144:ef7eb2e8f9f7 34
<> 144:ef7eb2e8f9f7 35 extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
<> 144:ef7eb2e8f9f7 36
<> 144:ef7eb2e8f9f7 37
<> 144:ef7eb2e8f9f7 38 /**
<> 144:ef7eb2e8f9f7 39 * Initialize the system
<> 144:ef7eb2e8f9f7 40 *
<> 144:ef7eb2e8f9f7 41 * @param none
<> 144:ef7eb2e8f9f7 42 * @return none
<> 144:ef7eb2e8f9f7 43 *
<> 144:ef7eb2e8f9f7 44 * @brief Setup the microcontroller system.
<> 144:ef7eb2e8f9f7 45 * Initialize the System and update the SystemCoreClock variable.
<> 144:ef7eb2e8f9f7 46 */
<> 144:ef7eb2e8f9f7 47 extern void SystemInit (void);
<> 144:ef7eb2e8f9f7 48
<> 144:ef7eb2e8f9f7 49 /**
<> 144:ef7eb2e8f9f7 50 * Update SystemCoreClock variable
<> 144:ef7eb2e8f9f7 51 *
<> 144:ef7eb2e8f9f7 52 * @param none
<> 144:ef7eb2e8f9f7 53 * @return none
<> 144:ef7eb2e8f9f7 54 *
<> 144:ef7eb2e8f9f7 55 * @brief Updates the SystemCoreClock with current core Clock
<> 144:ef7eb2e8f9f7 56 * retrieved from cpu registers.
<> 144:ef7eb2e8f9f7 57 */
<> 144:ef7eb2e8f9f7 58 extern void SystemCoreClockUpdate (void);
<> 144:ef7eb2e8f9f7 59
<> 144:ef7eb2e8f9f7 60 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 61 }
<> 144:ef7eb2e8f9f7 62 #endif
<> 144:ef7eb2e8f9f7 63
<> 144:ef7eb2e8f9f7 64 #endif /* __SYSTEM_LPC11U6x_H */