SDBlockDevice.cpp

00001 /* mbed Microcontroller Library
00002  * Copyright (c) 2006-2013 ARM Limited
00003  *
00004  * Licensed under the Apache License, Version 2.0 (the "License");
00005  * you may not use this file except in compliance with the License.
00006  * You may obtain a copy of the License at
00007  *
00008  *     http://www.apache.org/licenses/LICENSE-2.0
00009  *
00010  * Unless required by applicable law or agreed to in writing, software
00011  * distributed under the License is distributed on an "AS IS" BASIS,
00012  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
00013  * See the License for the specific language governing permissions and
00014  * limitations under the License.
00015  */
00016 
00017 /* Introduction
00018  * ------------
00019  * SD and MMC cards support a number of interfaces, but common to them all
00020  * is one based on SPI. Since we already have the mbed SPI Interface, it will
00021  * be used for SD cards.
00022  *
00023  * The main reference I'm using is Chapter 7, "SPI Mode" of:
00024  *  http://www.sdcard.org/developers/tech/sdcard/pls/Simplified_Physical_Layer_Spec.pdf
00025  *
00026  * SPI Startup
00027  * -----------
00028  * The SD card powers up in SD mode. The start-up procedure is complicated
00029  * by the requirement to support older SDCards in a backwards compatible
00030  * way with the new higher capacity variants SDHC and SDHC.
00031  *
00032  * The following figures from the specification with associated text describe
00033  * the SPI mode initialisation process:
00034  *  - Figure 7-1: SD Memory Card State Diagram (SPI mode)
00035  *  - Figure 7-2: SPI Mode Initialization Flow
00036  *
00037  * Firstly, a low initial clock should be selected (in the range of 100-
00038  * 400kHZ). After initialisation has been completed, the switch to a
00039  * higher clock speed can be made (e.g. 1MHz). Newer cards will support
00040  * higher speeds than the default _transfer_sck defined here.
00041  *
00042  * Next, note the following from the SDCard specification (note to
00043  * Figure 7-1):
00044  *
00045  *  In any of the cases CMD1 is not recommended because it may be difficult for the host
00046  *  to distinguish between MultiMediaCard and SD Memory Card
00047  *
00048  * Hence CMD1 is not used for the initialisation sequence.
00049  *
00050  * The SPI interface mode is selected by asserting CS low and sending the
00051  * reset command (CMD0). The card will respond with a (R1) response.
00052  * In practice many cards initially respond with 0xff or invalid data
00053  * which is ignored. Data is read until a valid response is received
00054  * or the number of re-reads has exceeded a maximim count. If a valid
00055  * response is not received then the CMD0 can be retried. This
00056  * has been found to successfully initialise cards where the SPI master
00057  * (on MCU) has been reset but the SDCard has not, so the first
00058  * CMD0 may be lost.
00059  *
00060  * CMD8 is optionally sent to determine the voltage range supported, and
00061  * indirectly determine whether it is a version 1.x SD/non-SD card or
00062  * version 2.x. I'll just ignore this for now.
00063  *
00064  * ACMD41 is repeatedly issued to initialise the card, until "in idle"
00065  * (bit 0) of the R1 response goes to '0', indicating it is initialised.
00066  *
00067  * You should also indicate whether the host supports High Capicity cards,
00068  * and check whether the card is high capacity - i'll also ignore this
00069  *
00070  * SPI Protocol
00071  * ------------
00072  * The SD SPI protocol is based on transactions made up of 8-bit words, with
00073  * the host starting every bus transaction by asserting the CS signal low. The
00074  * card always responds to commands, data blocks and errors.
00075  *
00076  * The protocol supports a CRC, but by default it is off (except for the
00077  * first reset CMD0, where the CRC can just be pre-calculated, and CMD8)
00078  * I'll leave the CRC off I think!
00079  *
00080  * Standard capacity cards have variable data block sizes, whereas High
00081  * Capacity cards fix the size of data block to 512 bytes. I'll therefore
00082  * just always use the Standard Capacity cards with a block size of 512 bytes.
00083  * This is set with CMD16.
00084  *
00085  * You can read and write single blocks (CMD17, CMD25) or multiple blocks
00086  * (CMD18, CMD25). For simplicity, I'll just use single block accesses. When
00087  * the card gets a read command, it responds with a response token, and then
00088  * a data token or an error.
00089  *
00090  * SPI Command Format
00091  * ------------------
00092  * Commands are 6-bytes long, containing the command, 32-bit argument, and CRC.
00093  *
00094  * +---------------+------------+------------+-----------+----------+--------------+
00095  * | 01 | cmd[5:0] | arg[31:24] | arg[23:16] | arg[15:8] | arg[7:0] | crc[6:0] | 1 |
00096  * +---------------+------------+------------+-----------+----------+--------------+
00097  *
00098  * As I'm not using CRC, I can fix that byte to what is needed for CMD0 (0x95)
00099  *
00100  * All Application Specific commands shall be preceded with APP_CMD (CMD55).
00101  *
00102  * SPI Response Format
00103  * -------------------
00104  * The main response format (R1) is a status byte (normally zero). Key flags:
00105  *  idle - 1 if the card is in an idle state/initialising
00106  *  cmd  - 1 if an illegal command code was detected
00107  *
00108  *    +-------------------------------------------------+
00109  * R1 | 0 | arg | addr | seq | crc | cmd | erase | idle |
00110  *    +-------------------------------------------------+
00111  *
00112  * R1b is the same, except it is followed by a busy signal (zeros) until
00113  * the first non-zero byte when it is ready again.
00114  *
00115  * Data Response Token
00116  * -------------------
00117  * Every data block written to the card is acknowledged by a byte
00118  * response token
00119  *
00120  * +----------------------+
00121  * | xxx | 0 | status | 1 |
00122  * +----------------------+
00123  *              010 - OK!
00124  *              101 - CRC Error
00125  *              110 - Write Error
00126  *
00127  * Single Block Read and Write
00128  * ---------------------------
00129  *
00130  * Block transfers have a byte header, followed by the data, followed
00131  * by a 16-bit CRC. In our case, the data will always be 512 bytes.
00132  *
00133  * +------+---------+---------+- -  - -+---------+-----------+----------+
00134  * | 0xFE | data[0] | data[1] |        | data[n] | crc[15:8] | crc[7:0] |
00135  * +------+---------+---------+- -  - -+---------+-----------+----------+
00136  */
00137 
00138 /* If the target has no SPI support then SDCard is not supported */
00139 #ifdef DEVICE_SPI
00140 
00141 #include "SDBlockDevice.h"
00142 #include "mbed_debug.h"
00143 #include <errno.h>
00144 
00145 /* Required version: 5.6.1 and above */
00146 #if defined(MBED_MAJOR_VERSION) && MBED_MAJOR_VERSION >= 5
00147 #if (MBED_VERSION < MBED_ENCODE_VERSION(5,6,1))
00148 #error "Incompatible mbed-os version detected! Required 5.6.1 and above"
00149 #endif
00150 #else
00151 #warning "mbed-os version 5.6.1 or above required"
00152 #endif
00153 
00154 #ifndef MBED_CONF_SD_CMD_TIMEOUT
00155 #define MBED_CONF_SD_CMD_TIMEOUT                 5000   /*!< Timeout in ms for response */
00156 #endif
00157 
00158 #ifndef MBED_CONF_SD_CMD0_IDLE_STATE_RETRIES
00159 #define MBED_CONF_SD_CMD0_IDLE_STATE_RETRIES     5      /*!< Number of retries for sending CMDO */
00160 #endif
00161 
00162 #define SD_COMMAND_TIMEOUT                       MBED_CONF_SD_CMD_TIMEOUT
00163 #define SD_CMD0_GO_IDLE_STATE_RETRIES            MBED_CONF_SD_CMD0_IDLE_STATE_RETRIES
00164 #define SD_DBG                                   0      /*!< 1 - Enable debugging */
00165 #define SD_CMD_TRACE                             0      /*!< 1 - Enable SD command tracing */
00166 
00167 #define SD_BLOCK_DEVICE_ERROR_WOULD_BLOCK        -5001  /*!< operation would block */
00168 #define SD_BLOCK_DEVICE_ERROR_UNSUPPORTED        -5002  /*!< unsupported operation */
00169 #define SD_BLOCK_DEVICE_ERROR_PARAMETER          -5003  /*!< invalid parameter */
00170 #define SD_BLOCK_DEVICE_ERROR_NO_INIT            -5004  /*!< uninitialized */
00171 #define SD_BLOCK_DEVICE_ERROR_NO_DEVICE          -5005  /*!< device is missing or not connected */
00172 #define SD_BLOCK_DEVICE_ERROR_WRITE_PROTECTED    -5006  /*!< write protected */
00173 #define SD_BLOCK_DEVICE_ERROR_UNUSABLE           -5007  /*!< unusable card */
00174 #define SD_BLOCK_DEVICE_ERROR_NO_RESPONSE        -5008  /*!< No response from device */
00175 #define SD_BLOCK_DEVICE_ERROR_CRC                -5009  /*!< CRC error */
00176 #define SD_BLOCK_DEVICE_ERROR_ERASE              -5010  /*!< Erase error: reset/sequence */
00177 #define SD_BLOCK_DEVICE_ERROR_WRITE              -5011  /*!< SPI Write error: !SPI_DATA_ACCEPTED */
00178 
00179 #define BLOCK_SIZE_HC                            512    /*!< Block size supported for SD card is 512 bytes  */
00180 #define WRITE_BL_PARTIAL                         0      /*!< Partial block write - Not supported */
00181 #define CRC_SUPPORT                              0      /*!< CRC - Not supported */
00182 #define SPI_CMD(x) (0x40 | (x & 0x3f))
00183 
00184 /* R1 Response Format */
00185 #define R1_NO_RESPONSE          (0xFF)
00186 #define R1_RESPONSE_RECV        (0x80)
00187 #define R1_IDLE_STATE           (1 << 0)
00188 #define R1_ERASE_RESET          (1 << 1)
00189 #define R1_ILLEGAL_COMMAND      (1 << 2)
00190 #define R1_COM_CRC_ERROR        (1 << 3)
00191 #define R1_ERASE_SEQUENCE_ERROR (1 << 4)
00192 #define R1_ADDRESS_ERROR        (1 << 5)
00193 #define R1_PARAMETER_ERROR      (1 << 6)
00194 
00195 // Types
00196 #define SDCARD_NONE              0           /**< No card is present */
00197 #define SDCARD_V1                1           /**< v1.x Standard Capacity */
00198 #define SDCARD_V2                2           /**< v2.x Standard capacity SD card */
00199 #define SDCARD_V2HC              3           /**< v2.x High capacity SD card */
00200 #define CARD_UNKNOWN             4           /**< Unknown or unsupported card */
00201 
00202 /* SIZE in Bytes */
00203 #define PACKET_SIZE              6           /*!< SD Packet size CMD+ARG+CRC */
00204 #define R1_RESPONSE_SIZE         1           /*!< Size of R1 response */
00205 #define R2_RESPONSE_SIZE         2           /*!< Size of R2 response */
00206 #define R3_R7_RESPONSE_SIZE      5           /*!< Size of R3/R7 response */
00207 
00208 /* R1b Response */
00209 #define DEVICE_BUSY             (0x00)
00210 
00211 /* R2 Response Format */
00212 #define R2_CARD_LOCKED          (1 << 0)
00213 #define R2_CMD_FAILED           (1 << 1)
00214 #define R2_ERROR                (1 << 2)
00215 #define R2_CC_ERROR             (1 << 3)
00216 #define R2_CC_FAILED            (1 << 4)
00217 #define R2_WP_VIOLATION         (1 << 5)
00218 #define R2_ERASE_PARAM          (1 << 6)
00219 #define R2_OUT_OF_RANGE         (1 << 7)
00220 
00221 /* R3 Response : OCR Register */
00222 #define OCR_HCS_CCS             (0x1 << 30)
00223 #define OCR_LOW_VOLTAGE         (0x01 << 24)
00224 #define OCR_3_3V                (0x1 << 20)
00225 
00226 /* R7 response pattern for CMD8 */
00227 #define CMD8_PATTERN             (0xAA)
00228 
00229 /*  CRC Enable  */
00230 #define CRC_ENABLE               (0)         /*!< CRC 1 - Enable 0 - Disable */
00231 
00232 /* Control Tokens   */
00233 #define SPI_DATA_RESPONSE_MASK   (0x1F)
00234 #define SPI_DATA_ACCEPTED        (0x05)
00235 #define SPI_DATA_CRC_ERROR       (0x0B)
00236 #define SPI_DATA_WRITE_ERROR     (0x0D)
00237 #define SPI_START_BLOCK          (0xFE)      /*!< For Single Block Read/Write and Multiple Block Read */
00238 #define SPI_START_BLK_MUL_WRITE  (0xFC)      /*!< Start Multi-block write */
00239 #define SPI_STOP_TRAN            (0xFD)      /*!< Stop Multi-block write */
00240 
00241 #define SPI_DATA_READ_ERROR_MASK (0xF)       /*!< Data Error Token: 4 LSB bits */
00242 #define SPI_READ_ERROR           (0x1 << 0)  /*!< Error */
00243 #define SPI_READ_ERROR_CC        (0x1 << 1)  /*!< CC Error*/
00244 #define SPI_READ_ERROR_ECC_C     (0x1 << 2)  /*!< Card ECC failed */
00245 #define SPI_READ_ERROR_OFR       (0x1 << 3)  /*!< Out of Range */
00246 
00247 SDBlockDevice::SDBlockDevice(PinName mosi, PinName miso, PinName sclk, PinName cs, uint64_t hz)
00248     : _sectors(0), _spi(mosi, miso, sclk), _cs(cs), _is_initialized(0)
00249 {
00250     _cs = 1;
00251     _card_type = SDCARD_NONE;
00252 
00253     // Set default to 100kHz for initialisation and 1MHz for data transfer
00254     _init_sck = 100000;
00255     _transfer_sck = hz;
00256 
00257     // Only HC block size is supported.
00258     _block_size = BLOCK_SIZE_HC;
00259     _erase_size = BLOCK_SIZE_HC;
00260 }
00261 
00262 SDBlockDevice::~SDBlockDevice()
00263 {
00264     if (_is_initialized) {
00265         deinit();
00266     }
00267 }
00268 
00269 int SDBlockDevice::_initialise_card()
00270 {
00271     // Detail debugging is for commands
00272     _dbg = SD_DBG ? SD_CMD_TRACE : 0;
00273     int32_t status = BD_ERROR_OK;
00274     uint32_t response, arg;
00275 
00276     // Initialize the SPI interface: Card by default is in SD mode
00277     _spi_init();
00278 
00279     // The card is transitioned from SDCard mode to SPI mode by sending the CMD0 + CS Asserted("0")
00280     if (_go_idle_state() != R1_IDLE_STATE) {
00281         debug_if(SD_DBG, "No disk, or could not put SD card in to SPI idle state\n");
00282         return SD_BLOCK_DEVICE_ERROR_NO_DEVICE;
00283     }
00284 
00285     // Send CMD8, if the card rejects the command then it's probably using the
00286     // legacy protocol, or is a MMC, or just flat-out broken
00287     status = _cmd8();
00288     if (BD_ERROR_OK != status && SD_BLOCK_DEVICE_ERROR_UNSUPPORTED != status) {
00289         return status;
00290     }
00291 
00292     // Read OCR - CMD58 Response contains OCR register
00293     if (BD_ERROR_OK != (status = _cmd(CMD58_READ_OCR, 0x0, 0x0, &response))) {
00294         return status;
00295     }
00296 
00297     // Check if card supports voltage range: 3.3V
00298     if (!(response & OCR_3_3V)) {
00299         _card_type = CARD_UNKNOWN;
00300         status = SD_BLOCK_DEVICE_ERROR_UNUSABLE;
00301         return status;
00302     }
00303 
00304     // HCS is set 1 for HC/XC capacity cards for ACMD41, if supported
00305     arg = 0x0;
00306     if (SDCARD_V2 == _card_type) {
00307         arg |= OCR_HCS_CCS;
00308     }
00309 
00310     /* Idle state bit in the R1 response of ACMD41 is used by the card to inform the host
00311      * if initialization of ACMD41 is completed. "1" indicates that the card is still initializing.
00312      * "0" indicates completion of initialization. The host repeatedly issues ACMD41 until
00313      * this bit is set to "0".
00314      */
00315     _spi_timer.start();
00316     do {
00317         status = _cmd(ACMD41_SD_SEND_OP_COND, arg, 1, &response);
00318     } while ((response & R1_IDLE_STATE) && (_spi_timer.read_ms() < SD_COMMAND_TIMEOUT));
00319     _spi_timer.stop();
00320 
00321     // Initialization complete: ACMD41 successful
00322     if ((BD_ERROR_OK != status) || (0x00 != response)) {
00323         _card_type = CARD_UNKNOWN;
00324         debug_if(SD_DBG, "Timeout waiting for card\n");
00325         return status;
00326     }
00327 
00328     if (SDCARD_V2 == _card_type) {
00329         // Get the card capacity CCS: CMD58
00330         if (BD_ERROR_OK == (status = _cmd(CMD58_READ_OCR, 0x0, 0x0, &response))) {
00331             // High Capacity card
00332             if (response & OCR_HCS_CCS) {
00333                 _card_type = SDCARD_V2HC;
00334                 debug_if(SD_DBG, "Card Initialized: High Capacity Card \n");
00335             } else {
00336                 debug_if(SD_DBG, "Card Initialized: Standard Capacity Card: Version 2.x \n");
00337             }
00338         }
00339     } else {
00340         _card_type = SDCARD_V1;
00341         debug_if(SD_DBG, "Card Initialized: Version 1.x Card\n");
00342     }
00343 
00344     // Disable CRC
00345     status = _cmd(CMD59_CRC_ON_OFF, 0);
00346 
00347     return status;
00348 }
00349 
00350 
00351 int SDBlockDevice::init()
00352 {
00353     lock();
00354     int err = _initialise_card();
00355     _is_initialized = (err == BD_ERROR_OK);
00356     if (!_is_initialized) {
00357         debug_if(SD_DBG, "Fail to initialize card\n");
00358         unlock();
00359         return err;
00360     }
00361     debug_if(SD_DBG, "init card = %d\n", _is_initialized);
00362     _sectors = _sd_sectors();
00363     // CMD9 failed
00364     if (0 == _sectors) {
00365         unlock();
00366         return BD_ERROR_DEVICE_ERROR;
00367     }
00368 
00369     // Set block length to 512 (CMD16)
00370     if (_cmd(CMD16_SET_BLOCKLEN, _block_size) != 0) {
00371         debug_if(SD_DBG, "Set %d-byte block timed out\n", _block_size);
00372         unlock();
00373         return BD_ERROR_DEVICE_ERROR;
00374     }
00375 
00376     // Set SCK for data transfer
00377     err = _freq();
00378     if (err) {
00379         unlock();
00380         return err;
00381     }
00382     unlock();
00383     return BD_ERROR_OK;
00384 }
00385 
00386 int SDBlockDevice::deinit()
00387 {
00388     lock();
00389     _is_initialized = false;
00390     _sectors = 0;
00391     unlock();
00392     return 0;
00393 }
00394 
00395 
00396 int SDBlockDevice::program(const void *b, bd_addr_t addr, bd_size_t size)
00397 {
00398     if (!is_valid_program(addr, size)) {
00399         return SD_BLOCK_DEVICE_ERROR_PARAMETER;
00400     }
00401 
00402     lock();
00403     if (!_is_initialized) {
00404         unlock();
00405         return SD_BLOCK_DEVICE_ERROR_NO_INIT;
00406     }
00407 
00408     const uint8_t *buffer = static_cast<const uint8_t*>(b);
00409     int status = BD_ERROR_OK;
00410     uint8_t response;
00411 
00412     // Get block count
00413     bd_addr_t blockCnt = size / _block_size;
00414 
00415     // SDSC Card (CCS=0) uses byte unit address
00416     // SDHC and SDXC Cards (CCS=1) use block unit address (512 Bytes unit)
00417     if(SDCARD_V2HC == _card_type) {
00418         addr = addr / _block_size;
00419     }
00420 
00421     // Send command to perform write operation
00422     if (blockCnt == 1) {
00423         // Single block write command
00424         if (BD_ERROR_OK != (status = _cmd(CMD24_WRITE_BLOCK, addr))) {
00425             unlock();
00426             return status;
00427         }
00428 
00429         // Write data
00430         response = _write(buffer, SPI_START_BLOCK, _block_size);
00431 
00432         // Only CRC and general write error are communicated via response token
00433         if ((response == SPI_DATA_CRC_ERROR) || (response == SPI_DATA_WRITE_ERROR)) {
00434             debug_if(SD_DBG, "Single Block Write failed: 0x%x \n", response);
00435             status = SD_BLOCK_DEVICE_ERROR_WRITE;
00436         }
00437     } else {
00438         // Pre-erase setting prior to multiple block write operation
00439         _cmd(ACMD23_SET_WR_BLK_ERASE_COUNT, blockCnt, 1);
00440 
00441         // Multiple block write command
00442         if (BD_ERROR_OK != (status = _cmd(CMD25_WRITE_MULTIPLE_BLOCK, addr))) {
00443             unlock();
00444             return status;
00445         }
00446 
00447         // Write the data: one block at a time
00448         do {
00449             response = _write(buffer, SPI_START_BLK_MUL_WRITE, _block_size);
00450             if (response != SPI_DATA_ACCEPTED) {
00451                 debug_if(SD_DBG, "Multiple Block Write failed: 0x%x \n", response);
00452                 break;
00453             }
00454             buffer += _block_size;
00455         }while (--blockCnt);     // Receive all blocks of data
00456 
00457         /* In a Multiple Block write operation, the stop transmission will be done by
00458          * sending 'Stop Tran' token instead of 'Start Block' token at the beginning
00459          * of the next block
00460          */
00461         _spi.write(SPI_STOP_TRAN);
00462     }
00463 
00464     _deselect();
00465     unlock();
00466     return status;
00467 }
00468 
00469 int SDBlockDevice::read(void *b, bd_addr_t addr, bd_size_t size)
00470 {
00471     if (!is_valid_read(addr, size)) {
00472         return SD_BLOCK_DEVICE_ERROR_PARAMETER;
00473     }
00474 
00475     lock();
00476     if (!_is_initialized) {
00477         unlock();
00478         return SD_BLOCK_DEVICE_ERROR_PARAMETER;
00479     }
00480 
00481     uint8_t *buffer = static_cast<uint8_t *>(b);
00482     int status = BD_ERROR_OK;
00483     bd_addr_t blockCnt =  size / _block_size;
00484 
00485     // SDSC Card (CCS=0) uses byte unit address
00486     // SDHC and SDXC Cards (CCS=1) use block unit address (512 Bytes unit)
00487     if (SDCARD_V2HC == _card_type) {
00488         addr = addr / _block_size;
00489     }
00490 
00491     // Write command ro receive data
00492     if (blockCnt > 1) {
00493         status = _cmd(CMD18_READ_MULTIPLE_BLOCK, addr);
00494     } else {
00495         status = _cmd(CMD17_READ_SINGLE_BLOCK, addr);
00496     }
00497     if (BD_ERROR_OK != status) {
00498         unlock();
00499         return status;
00500     }
00501 
00502     // receive the data : one block at a time
00503     while (blockCnt) {
00504         if (0 != _read(buffer, _block_size)) {
00505             status = SD_BLOCK_DEVICE_ERROR_NO_RESPONSE;
00506             break;
00507         }
00508         buffer += _block_size;
00509         --blockCnt;
00510     }
00511     _deselect();
00512 
00513     // Send CMD12(0x00000000) to stop the transmission for multi-block transfer
00514     if (size > _block_size) {
00515         status = _cmd(CMD12_STOP_TRANSMISSION, 0x0);
00516     }
00517     unlock();
00518     return status;
00519 }
00520 
00521 bool SDBlockDevice::_is_valid_trim(bd_addr_t addr, bd_size_t size)
00522 {
00523     return (
00524         addr % _erase_size == 0 &&
00525         size % _erase_size == 0 &&
00526         addr + size <= this->size());
00527 }
00528 
00529 int SDBlockDevice::trim(bd_addr_t addr, bd_size_t size)
00530 {
00531     if (!_is_valid_trim(addr, size)) {
00532         return SD_BLOCK_DEVICE_ERROR_PARAMETER;
00533     }
00534 
00535     lock();
00536     if (!_is_initialized) {
00537         unlock();
00538         return SD_BLOCK_DEVICE_ERROR_NO_INIT;
00539     }
00540     int status = BD_ERROR_OK;
00541 
00542     size -= _block_size;
00543     // SDSC Card (CCS=0) uses byte unit address
00544     // SDHC and SDXC Cards (CCS=1) use block unit address (512 Bytes unit)
00545     if (SDCARD_V2HC == _card_type) {
00546         size = size / _block_size;
00547         addr = addr / _block_size;
00548     }
00549 
00550     // Start lba sent in start command
00551     if (BD_ERROR_OK != (status = _cmd(CMD32_ERASE_WR_BLK_START_ADDR, addr))) {
00552         unlock();
00553         return status;
00554     }
00555 
00556     // End lba = addr+size sent in end addr command
00557     if (BD_ERROR_OK != (status = _cmd(CMD33_ERASE_WR_BLK_END_ADDR, addr+size))) {
00558         unlock();
00559         return status;
00560     }
00561     status = _cmd(CMD38_ERASE, 0x0);
00562     unlock();
00563     return status;
00564 }
00565 
00566 bd_size_t SDBlockDevice::get_read_size() const
00567 {
00568     return _block_size;
00569 }
00570 
00571 bd_size_t SDBlockDevice::get_program_size() const
00572 {
00573     return _block_size;
00574 }
00575 
00576 bd_size_t SDBlockDevice::size() const
00577 {
00578     return _block_size*_sectors;
00579 }
00580 
00581 void SDBlockDevice::debug(bool dbg)
00582 {
00583     _dbg = dbg;
00584 }
00585 
00586 int SDBlockDevice::frequency(uint64_t freq)
00587 {
00588     lock();
00589     _transfer_sck = freq;
00590     int err = _freq();
00591     unlock();
00592     return err;
00593 }
00594 
00595 // PRIVATE FUNCTIONS
00596 int SDBlockDevice::_freq(void)
00597 {
00598     // Max frequency supported is 25MHZ
00599     if (_transfer_sck <= 25000000) {
00600         _spi.frequency(_transfer_sck);
00601         return 0;
00602     } else {  // TODO: Switch function to be implemented for higher frequency
00603         _transfer_sck = 25000000;
00604         _spi.frequency(_transfer_sck);
00605         return -EINVAL;
00606     }
00607 }
00608 
00609 uint8_t SDBlockDevice::_cmd_spi(SDBlockDevice::cmdSupported cmd, uint32_t arg) {
00610     uint8_t response;
00611     char cmdPacket[PACKET_SIZE];
00612 
00613     // Prepare the command packet
00614     cmdPacket[0] = SPI_CMD(cmd);
00615     cmdPacket[1] = (arg >> 24);
00616     cmdPacket[2] = (arg >> 16);
00617     cmdPacket[3] = (arg >> 8);
00618     cmdPacket[4] = (arg >> 0);
00619     // CMD0 is executed in SD mode, hence should have correct CRC
00620     // CMD8 CRC verification is always enabled
00621     switch(cmd) {
00622         case CMD0_GO_IDLE_STATE:
00623             cmdPacket[5] = 0x95;
00624             break;
00625         case CMD8_SEND_IF_COND:
00626             cmdPacket[5] = 0x87;
00627             break;
00628         default:
00629             cmdPacket[5] = 0xFF;    // Make sure bit 0-End bit is high
00630             break;
00631     }
00632 
00633     // send a command
00634     for (int i = 0; i < PACKET_SIZE; i++) {
00635         _spi.write(cmdPacket[i]);
00636     }
00637 
00638     // The received byte immediataly following CMD12 is a stuff byte,
00639     // it should be discarded before receive the response of the CMD12.
00640     if (CMD12_STOP_TRANSMISSION == cmd) {
00641         _spi.write(SPI_FILL_CHAR);
00642     }
00643 
00644     // Loop for response: Response is sent back within command response time (NCR), 0 to 8 bytes for SDC
00645     for (int i = 0; i < 0x10; i++) {
00646         response = _spi.write(SPI_FILL_CHAR);
00647         // Got the response
00648         if (!(response & R1_RESPONSE_RECV)) {
00649             break;
00650         }
00651     }
00652     return response;
00653 }
00654 
00655 int SDBlockDevice::_cmd(SDBlockDevice::cmdSupported cmd, uint32_t arg, bool isAcmd, uint32_t *resp) {
00656     int32_t status = BD_ERROR_OK;
00657     uint32_t response;
00658 
00659     // Select card and wait for card to be ready before sending next command
00660     // Note: next command will fail if card is not ready
00661     _select();
00662 
00663     // No need to wait for card to be ready when sending the stop command
00664     if (CMD12_STOP_TRANSMISSION != cmd) {
00665         if (false == _wait_ready(SD_COMMAND_TIMEOUT)) {
00666             debug_if(SD_DBG, "Card not ready yet \n");
00667         }
00668     }
00669 
00670     // Re-try command
00671     for(int i = 0; i < 3; i++) {
00672         // Send CMD55 for APP command first
00673         if (isAcmd) {
00674             response = _cmd_spi(CMD55_APP_CMD, 0x0);
00675             // Wait for card to be ready after CMD55
00676             if (false == _wait_ready(SD_COMMAND_TIMEOUT)) {
00677                 debug_if(SD_DBG, "Card not ready yet \n");
00678             }
00679         }
00680 
00681         // Send command over SPI interface
00682         response = _cmd_spi(cmd, arg);
00683         if (R1_NO_RESPONSE == response) {
00684             debug_if(SD_DBG, "No response CMD:%d \n", cmd);
00685             continue;
00686         }
00687         break;
00688     }
00689 
00690     // Pass the response to the command call if required
00691     if (NULL != resp) {
00692         *resp = response;
00693     }
00694 
00695     // Process the response R1  : Exit on CRC/Illegal command error/No response
00696     if (R1_NO_RESPONSE == response) {
00697         _deselect();
00698         debug_if(SD_DBG, "No response CMD:%d response: 0x%x\n",cmd, response);
00699         return SD_BLOCK_DEVICE_ERROR_NO_DEVICE;         // No device
00700     }
00701     if (response & R1_COM_CRC_ERROR) {
00702         _deselect();
00703         debug_if(SD_DBG, "CRC error CMD:%d response 0x%x \n",cmd, response);
00704         return SD_BLOCK_DEVICE_ERROR_CRC;                // CRC error
00705     }
00706     if (response & R1_ILLEGAL_COMMAND) {
00707         _deselect();
00708         debug_if(SD_DBG, "Illegal command CMD:%d response 0x%x\n",cmd, response);
00709         if (CMD8_SEND_IF_COND == cmd) {                  // Illegal command is for Ver1 or not SD Card
00710             _card_type = CARD_UNKNOWN;
00711         }
00712         return SD_BLOCK_DEVICE_ERROR_UNSUPPORTED;      // Command not supported
00713     }
00714 
00715     debug_if(_dbg, "CMD:%d \t arg:0x%x \t Response:0x%x \n", cmd, arg, response);
00716     // Set status for other errors
00717     if ((response & R1_ERASE_RESET) || (response & R1_ERASE_SEQUENCE_ERROR)) {
00718         status = SD_BLOCK_DEVICE_ERROR_ERASE;            // Erase error
00719     }else if ((response & R1_ADDRESS_ERROR) || (response & R1_PARAMETER_ERROR)) {
00720         // Misaligned address / invalid address block length
00721         status = SD_BLOCK_DEVICE_ERROR_PARAMETER;
00722     }
00723 
00724     // Get rest of the response part for other commands
00725     switch(cmd) {
00726         case CMD8_SEND_IF_COND:             // Response R7
00727             debug_if(_dbg, "V2-Version Card\n");
00728             _card_type = SDCARD_V2;
00729             // Note: No break here, need to read rest of the response
00730         case CMD58_READ_OCR:                // Response R3
00731             response  = (_spi.write(SPI_FILL_CHAR) << 24);
00732             response |= (_spi.write(SPI_FILL_CHAR) << 16);
00733             response |= (_spi.write(SPI_FILL_CHAR) << 8);
00734             response |= _spi.write(SPI_FILL_CHAR);
00735             debug_if(_dbg, "R3/R7: 0x%x \n", response);
00736             break;
00737 
00738         case CMD12_STOP_TRANSMISSION:       // Response R1b
00739         case CMD38_ERASE:
00740             _wait_ready(SD_COMMAND_TIMEOUT);
00741             break;
00742 
00743         case ACMD13_SD_STATUS:             // Response R2
00744             response = _spi.write(SPI_FILL_CHAR);
00745             debug_if(_dbg, "R2: 0x%x \n", response);
00746             break;
00747 
00748         default:                            // Response R1
00749             break;
00750     }
00751 
00752     // Pass the updated response to the command
00753     if (NULL != resp) {
00754         *resp = response;
00755     }
00756 
00757     // Do not deselect card if read is in progress.
00758     if (((CMD9_SEND_CSD == cmd) || (ACMD22_SEND_NUM_WR_BLOCKS == cmd) ||
00759         (CMD24_WRITE_BLOCK == cmd) || (CMD25_WRITE_MULTIPLE_BLOCK == cmd) ||
00760         (CMD17_READ_SINGLE_BLOCK == cmd) || (CMD18_READ_MULTIPLE_BLOCK == cmd))
00761         && (BD_ERROR_OK == status)) {
00762         return BD_ERROR_OK;
00763     }
00764     // Deselect card
00765     _deselect();
00766     return status;
00767 }
00768 
00769 int SDBlockDevice::_cmd8() {
00770     uint32_t arg = (CMD8_PATTERN << 0);         // [7:0]check pattern
00771     uint32_t response = 0;
00772     int32_t status = BD_ERROR_OK;
00773 
00774     arg |= (0x1 << 8);  // 2.7-3.6V             // [11:8]supply voltage(VHS)
00775 
00776     status = _cmd(CMD8_SEND_IF_COND, arg, 0x0, &response);
00777     // Verify voltage and pattern for V2 version of card
00778     if ((BD_ERROR_OK == status) && (SDCARD_V2 == _card_type)) {
00779         // If check pattern is not matched, CMD8 communication is not valid
00780         if((response & 0xFFF) != arg)
00781         {
00782             debug_if(SD_DBG, "CMD8 Pattern mismatch 0x%x : 0x%x\n", arg, response);
00783             _card_type = CARD_UNKNOWN;
00784             status = SD_BLOCK_DEVICE_ERROR_UNUSABLE;
00785         }
00786     }
00787     return status;
00788 }
00789 
00790 uint32_t SDBlockDevice::_go_idle_state() {
00791     uint32_t response;
00792 
00793     /* Reseting the MCU SPI master may not reset the on-board SDCard, in which
00794      * case when MCU power-on occurs the SDCard will resume operations as
00795      * though there was no reset. In this scenario the first CMD0 will
00796      * not be interpreted as a command and get lost. For some cards retrying
00797      * the command overcomes this situation. */
00798     for (int i = 0; i < SD_CMD0_GO_IDLE_STATE_RETRIES; i++) {
00799         _cmd(CMD0_GO_IDLE_STATE, 0x0, 0x0, &response);
00800         if (R1_IDLE_STATE == response)
00801             break;
00802         wait_ms(1);
00803     }
00804     return response;
00805 }
00806 
00807 int SDBlockDevice::_read_bytes(uint8_t *buffer, uint32_t length) {
00808     uint16_t crc;
00809 
00810     // read until start byte (0xFE)
00811     if (false == _wait_token(SPI_START_BLOCK)) {
00812         debug_if(SD_DBG, "Read timeout\n");
00813         _deselect();
00814         return SD_BLOCK_DEVICE_ERROR_NO_RESPONSE;
00815     }
00816 
00817     // read data
00818     for (uint32_t i = 0; i < length; i++) {
00819         buffer[i] = _spi.write(SPI_FILL_CHAR);
00820     }
00821 
00822     // Read the CRC16 checksum for the data block
00823     crc = (_spi.write(SPI_FILL_CHAR) << 8);
00824     crc |= _spi.write(SPI_FILL_CHAR);
00825 
00826     _deselect();
00827     return 0;
00828 }
00829 
00830 int SDBlockDevice::_read(uint8_t *buffer, uint32_t length) {
00831     uint16_t crc;
00832 
00833     // read until start byte (0xFE)
00834     if (false == _wait_token(SPI_START_BLOCK)) {
00835         debug_if(SD_DBG, "Read timeout\n");
00836         _deselect();
00837         return SD_BLOCK_DEVICE_ERROR_NO_RESPONSE;
00838     }
00839 
00840     // read data
00841     _spi.write(NULL, 0, (char*)buffer, length);
00842 
00843     // Read the CRC16 checksum for the data block
00844     crc = (_spi.write(SPI_FILL_CHAR) << 8);
00845     crc |= _spi.write(SPI_FILL_CHAR);
00846 
00847     return 0;
00848 }
00849 
00850 uint8_t SDBlockDevice::_write(const uint8_t *buffer, uint8_t token, uint32_t length) {
00851     uint16_t crc = 0xFFFF;
00852     uint8_t response = 0xFF;
00853 
00854     // indicate start of block
00855     _spi.write(token);
00856 
00857     // write the data
00858     _spi.write((char*)buffer, length, NULL, 0);
00859 
00860     // write the checksum CRC16
00861     _spi.write(crc >> 8);
00862     _spi.write(crc);
00863 
00864     // check the response token
00865     response = _spi.write(SPI_FILL_CHAR);
00866 
00867     // Wait for last block to be written
00868     if (false == _wait_ready(SD_COMMAND_TIMEOUT)) {
00869         debug_if(SD_DBG, "Card not ready yet \n");
00870     }
00871 
00872     return (response & SPI_DATA_RESPONSE_MASK);
00873 }
00874 
00875 static uint32_t ext_bits(unsigned char *data, int msb, int lsb) {
00876     uint32_t bits = 0;
00877     uint32_t size = 1 + msb - lsb;
00878     for (uint32_t i = 0; i < size; i++) {
00879         uint32_t position = lsb + i;
00880         uint32_t byte = 15 - (position >> 3);
00881         uint32_t bit = position & 0x7;
00882         uint32_t value = (data[byte] >> bit) & 1;
00883         bits |= value << i;
00884     }
00885     return bits;
00886 }
00887 
00888 bd_size_t SDBlockDevice::_sd_sectors() {
00889     uint32_t c_size, c_size_mult, read_bl_len;
00890     uint32_t block_len, mult, blocknr;
00891     uint32_t hc_c_size;
00892     bd_size_t blocks = 0, capacity = 0;
00893 
00894     // CMD9, Response R2 (R1 byte + 16-byte block read)
00895     if (_cmd(CMD9_SEND_CSD, 0x0) != 0x0) {
00896         debug_if(SD_DBG, "Didn't get a response from the disk\n");
00897         return 0;
00898     }
00899     uint8_t csd[16];
00900     if (_read_bytes(csd, 16) != 0) {
00901         debug_if(SD_DBG, "Couldn't read csd response from disk\n");
00902         return 0;
00903     }
00904 
00905     // csd_structure : csd[127:126]
00906     int csd_structure = ext_bits(csd, 127, 126);
00907     switch (csd_structure) {
00908         case 0:
00909             c_size = ext_bits(csd, 73, 62);              // c_size        : csd[73:62]
00910             c_size_mult = ext_bits(csd, 49, 47);         // c_size_mult   : csd[49:47]
00911             read_bl_len = ext_bits(csd, 83, 80);         // read_bl_len   : csd[83:80] - the *maximum* read block length
00912             block_len = 1 << read_bl_len;                // BLOCK_LEN = 2^READ_BL_LEN
00913             mult = 1 << (c_size_mult + 2);               // MULT = 2^C_SIZE_MULT+2 (C_SIZE_MULT < 8)
00914             blocknr = (c_size + 1) * mult;               // BLOCKNR = (C_SIZE+1) * MULT
00915             capacity = blocknr * block_len;              // memory capacity = BLOCKNR * BLOCK_LEN
00916             blocks = capacity / _block_size;
00917             debug_if(SD_DBG, "Standard Capacity: c_size: %d \n", c_size);
00918             debug_if(SD_DBG, "Sectors: 0x%x : %llu\n", blocks, blocks);
00919             debug_if(SD_DBG, "Capacity: 0x%x : %llu MB\n", capacity, (capacity/(1024U*1024U)));
00920 
00921             // ERASE_BLK_EN = 1: Erase in multiple of 512 bytes supported
00922             if (ext_bits(csd, 46, 46)) {
00923                 _erase_size = BLOCK_SIZE_HC;
00924             } else {
00925                 // ERASE_BLK_EN = 1: Erase in multiple of SECTOR_SIZE supported
00926                 _erase_size = BLOCK_SIZE_HC * (ext_bits(csd, 45, 39) + 1);
00927             }
00928             break;
00929 
00930         case 1:
00931             hc_c_size = ext_bits(csd, 69, 48);            // device size : C_SIZE : [69:48]
00932             blocks = (hc_c_size+1) << 10;                 // block count = C_SIZE+1) * 1K byte (512B is block size)
00933             debug_if(SD_DBG, "SDHC/SDXC Card: hc_c_size: %d \n", hc_c_size);
00934             debug_if(SD_DBG, "Sectors: 0x%x : %llu\n", blocks, blocks);
00935             debug_if(SD_DBG, "Capacity: %llu MB\n", (blocks/(2048U)));
00936             // ERASE_BLK_EN is fixed to 1, which means host can erase one or multiple of 512 bytes.
00937             _erase_size = BLOCK_SIZE_HC;
00938             break;
00939 
00940         default:
00941             debug_if(SD_DBG, "CSD struct unsupported\r\n");
00942             return 0;
00943     };
00944     return blocks;
00945 }
00946 
00947 // SPI function to wait till chip is ready and sends start token
00948 bool SDBlockDevice::_wait_token(uint8_t token) {
00949     _spi_timer.reset();
00950     _spi_timer.start();
00951 
00952     do {
00953         if (token == _spi.write(SPI_FILL_CHAR)) {
00954             _spi_timer.stop();
00955             return true;
00956         }
00957     } while (_spi_timer.read_ms() < 300);       // Wait for 300 msec for start token
00958     _spi_timer.stop();
00959     debug_if(SD_DBG, "_wait_token: timeout\n");
00960     return false;
00961 }
00962 
00963 // SPI function to wait till chip is ready
00964 // The host controller should wait for end of the process until DO goes high (a 0xFF is received).
00965 bool SDBlockDevice::_wait_ready(uint16_t ms) {
00966     uint8_t response;
00967     _spi_timer.reset();
00968     _spi_timer.start();
00969     do {
00970         response = _spi.write(SPI_FILL_CHAR);
00971         if (response == 0xFF) {
00972             _spi_timer.stop();
00973             return true;
00974         }
00975     } while (_spi_timer.read_ms() < ms);
00976     _spi_timer.stop();
00977     return false;
00978 }
00979 
00980 // SPI function to wait for count
00981 void SDBlockDevice::_spi_wait(uint8_t count)
00982 {
00983     for (uint8_t i = 0; i < count; ++i) {
00984         _spi.write(SPI_FILL_CHAR);
00985     }
00986 }
00987 
00988 void SDBlockDevice::_spi_init() {
00989     _spi.lock();
00990     // Set to SCK for initialization, and clock card with cs = 1
00991     _spi.frequency(_init_sck);
00992     _spi.format(8, 0);
00993     _spi.set_default_write_value(SPI_FILL_CHAR);
00994     // Initial 74 cycles required for few cards, before selecting SPI mode
00995     _cs = 1;
00996     _spi_wait(10);
00997     _spi.unlock();
00998 }
00999 
01000 void SDBlockDevice::_select() {
01001     _spi.lock();
01002     _spi.write(SPI_FILL_CHAR);
01003     _cs = 0;
01004 }
01005 
01006 void SDBlockDevice::_deselect() {
01007     _cs = 1;
01008     _spi.write(SPI_FILL_CHAR);
01009     _spi.unlock();
01010 }
01011 
01012 #endif  /* DEVICE_SPI */