Michael Spencer / Smoothie

Fork of Smoothie to port to mbed non-LPC targets.

Dependencies:   mbed

Fork of Smoothie by Stéphane Cachat

libs/LPC17xx/LPC17xxLib/src/lpc17xx_mcpwm.c@2:1df0b61d3b5a, 2014-02-28 (annotated)

Committer:
Michael J. Spencer
Date:
Fri Feb 28 18:52:52 2014 -0800
Revision:
2:1df0b61d3b5a
Update to latest Smoothie.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Michael J. Spencer 2:1df0b61d3b5a 1 #ifdef __LPC17XX__
Michael J. Spencer 2:1df0b61d3b5a 2
Michael J. Spencer 2:1df0b61d3b5a 3 /**********************************************************************
Michael J. Spencer 2:1df0b61d3b5a 4 * $Id$ lpc17xx_mcpwm.c 2010-05-21
Michael J. Spencer 2:1df0b61d3b5a 5 *//**
Michael J. Spencer 2:1df0b61d3b5a 6 * @file lpc17xx_mcpwm.c
Michael J. Spencer 2:1df0b61d3b5a 7 * @brief Contains all functions support for Motor Control PWM firmware
Michael J. Spencer 2:1df0b61d3b5a 8 * library on LPC17xx
Michael J. Spencer 2:1df0b61d3b5a 9 * @version 2.0
Michael J. Spencer 2:1df0b61d3b5a 10 * @date 21. May. 2010
Michael J. Spencer 2:1df0b61d3b5a 11 * @author NXP MCU SW Application Team
Michael J. Spencer 2:1df0b61d3b5a 12 *
Michael J. Spencer 2:1df0b61d3b5a 13 * Copyright(C) 2010, NXP Semiconductor
Michael J. Spencer 2:1df0b61d3b5a 14 * All rights reserved.
Michael J. Spencer 2:1df0b61d3b5a 15 *
Michael J. Spencer 2:1df0b61d3b5a 16 ***********************************************************************
Michael J. Spencer 2:1df0b61d3b5a 17 * Software that is described herein is for illustrative purposes only
Michael J. Spencer 2:1df0b61d3b5a 18 * which provides customers with programming information regarding the
Michael J. Spencer 2:1df0b61d3b5a 19 * products. This software is supplied "AS IS" without any warranties.
Michael J. Spencer 2:1df0b61d3b5a 20 * NXP Semiconductors assumes no responsibility or liability for the
Michael J. Spencer 2:1df0b61d3b5a 21 * use of the software, conveys no license or title under any patent,
Michael J. Spencer 2:1df0b61d3b5a 22 * copyright, or mask work right to the product. NXP Semiconductors
Michael J. Spencer 2:1df0b61d3b5a 23 * reserves the right to make changes in the software without
Michael J. Spencer 2:1df0b61d3b5a 24 * notification. NXP Semiconductors also make no representation or
Michael J. Spencer 2:1df0b61d3b5a 25 * warranty that such application will be suitable for the specified
Michael J. Spencer 2:1df0b61d3b5a 26 * use without further testing or modification.
Michael J. Spencer 2:1df0b61d3b5a 27 **********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 28
Michael J. Spencer 2:1df0b61d3b5a 29 /* Peripheral group ----------------------------------------------------------- */
Michael J. Spencer 2:1df0b61d3b5a 30 /** @addtogroup MCPWM
Michael J. Spencer 2:1df0b61d3b5a 31 * @{
Michael J. Spencer 2:1df0b61d3b5a 32 */
Michael J. Spencer 2:1df0b61d3b5a 33
Michael J. Spencer 2:1df0b61d3b5a 34 /* Includes ------------------------------------------------------------------- */
Michael J. Spencer 2:1df0b61d3b5a 35 #include "lpc17xx_mcpwm.h"
Michael J. Spencer 2:1df0b61d3b5a 36 #include "lpc17xx_clkpwr.h"
Michael J. Spencer 2:1df0b61d3b5a 37
Michael J. Spencer 2:1df0b61d3b5a 38 /* If this source file built with example, the LPC17xx FW library configuration
Michael J. Spencer 2:1df0b61d3b5a 39 * file in each example directory ("lpc17xx_libcfg.h") must be included,
Michael J. Spencer 2:1df0b61d3b5a 40 * otherwise the default FW library configuration file must be included instead
Michael J. Spencer 2:1df0b61d3b5a 41 */
Michael J. Spencer 2:1df0b61d3b5a 42 #ifdef __BUILD_WITH_EXAMPLE__
Michael J. Spencer 2:1df0b61d3b5a 43 #include "lpc17xx_libcfg.h"
Michael J. Spencer 2:1df0b61d3b5a 44 #else
Michael J. Spencer 2:1df0b61d3b5a 45 #include "lpc17xx_libcfg_default.h"
Michael J. Spencer 2:1df0b61d3b5a 46 #endif /* __BUILD_WITH_EXAMPLE__ */
Michael J. Spencer 2:1df0b61d3b5a 47
Michael J. Spencer 2:1df0b61d3b5a 48
Michael J. Spencer 2:1df0b61d3b5a 49 #ifdef _MCPWM
Michael J. Spencer 2:1df0b61d3b5a 50
Michael J. Spencer 2:1df0b61d3b5a 51 /* Public Functions ----------------------------------------------------------- */
Michael J. Spencer 2:1df0b61d3b5a 52 /** @addtogroup MCPWM_Public_Functions
Michael J. Spencer 2:1df0b61d3b5a 53 * @{
Michael J. Spencer 2:1df0b61d3b5a 54 */
Michael J. Spencer 2:1df0b61d3b5a 55
Michael J. Spencer 2:1df0b61d3b5a 56 /*********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 57 * @brief Initializes the MCPWM peripheral
Michael J. Spencer 2:1df0b61d3b5a 58 * @param[in] MCPWMx Motor Control PWM peripheral selected,
Michael J. Spencer 2:1df0b61d3b5a 59 * Should be: LPC_MCPWM
Michael J. Spencer 2:1df0b61d3b5a 60 * @return None
Michael J. Spencer 2:1df0b61d3b5a 61 **********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 62 void MCPWM_Init(LPC_MCPWM_TypeDef *MCPWMx)
Michael J. Spencer 2:1df0b61d3b5a 63 {
Michael J. Spencer 2:1df0b61d3b5a 64
Michael J. Spencer 2:1df0b61d3b5a 65 /* Turn On MCPWM PCLK */
Michael J. Spencer 2:1df0b61d3b5a 66 CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCMC, ENABLE);
Michael J. Spencer 2:1df0b61d3b5a 67 /* As default, peripheral clock for MCPWM module
Michael J. Spencer 2:1df0b61d3b5a 68 * is set to FCCLK / 2 */
Michael J. Spencer 2:1df0b61d3b5a 69 // CLKPWR_SetPCLKDiv(CLKPWR_PCLKSEL_MC, CLKPWR_PCLKSEL_CCLK_DIV_2);
Michael J. Spencer 2:1df0b61d3b5a 70
Michael J. Spencer 2:1df0b61d3b5a 71 MCPWMx->MCCAP_CLR = MCPWM_CAPCLR_CAP(0) | MCPWM_CAPCLR_CAP(1) | MCPWM_CAPCLR_CAP(2);
Michael J. Spencer 2:1df0b61d3b5a 72 MCPWMx->MCINTFLAG_CLR = MCPWM_INT_ILIM(0) | MCPWM_INT_ILIM(1) | MCPWM_INT_ILIM(2) \
Michael J. Spencer 2:1df0b61d3b5a 73 | MCPWM_INT_IMAT(0) | MCPWM_INT_IMAT(1) | MCPWM_INT_IMAT(2) \
Michael J. Spencer 2:1df0b61d3b5a 74 | MCPWM_INT_ICAP(0) | MCPWM_INT_ICAP(1) | MCPWM_INT_ICAP(2);
Michael J. Spencer 2:1df0b61d3b5a 75 MCPWMx->MCINTEN_CLR = MCPWM_INT_ILIM(0) | MCPWM_INT_ILIM(1) | MCPWM_INT_ILIM(2) \
Michael J. Spencer 2:1df0b61d3b5a 76 | MCPWM_INT_IMAT(0) | MCPWM_INT_IMAT(1) | MCPWM_INT_IMAT(2) \
Michael J. Spencer 2:1df0b61d3b5a 77 | MCPWM_INT_ICAP(0) | MCPWM_INT_ICAP(1) | MCPWM_INT_ICAP(2);
Michael J. Spencer 2:1df0b61d3b5a 78 }
Michael J. Spencer 2:1df0b61d3b5a 79
Michael J. Spencer 2:1df0b61d3b5a 80
Michael J. Spencer 2:1df0b61d3b5a 81 /*********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 82 * @brief Configures each channel in MCPWM peripheral according to the
Michael J. Spencer 2:1df0b61d3b5a 83 * specified parameters in the MCPWM_CHANNEL_CFG_Type.
Michael J. Spencer 2:1df0b61d3b5a 84 * @param[in] MCPWMx Motor Control PWM peripheral selected
Michael J. Spencer 2:1df0b61d3b5a 85 * should be: LPC_MCPWM
Michael J. Spencer 2:1df0b61d3b5a 86 * @param[in] channelNum Channel number, should be: 0..2.
Michael J. Spencer 2:1df0b61d3b5a 87 * @param[in] channelSetup Pointer to a MCPWM_CHANNEL_CFG_Type structure
Michael J. Spencer 2:1df0b61d3b5a 88 * that contains the configuration information for the
Michael J. Spencer 2:1df0b61d3b5a 89 * specified MCPWM channel.
Michael J. Spencer 2:1df0b61d3b5a 90 * @return None
Michael J. Spencer 2:1df0b61d3b5a 91 **********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 92 void MCPWM_ConfigChannel(LPC_MCPWM_TypeDef *MCPWMx, uint32_t channelNum,
Michael J. Spencer 2:1df0b61d3b5a 93 MCPWM_CHANNEL_CFG_Type * channelSetup)
Michael J. Spencer 2:1df0b61d3b5a 94 {
Michael J. Spencer 2:1df0b61d3b5a 95 if (channelNum <= 2) {
Michael J. Spencer 2:1df0b61d3b5a 96 if (channelNum == 0) {
Michael J. Spencer 2:1df0b61d3b5a 97 MCPWMx->MCTIM0 = channelSetup->channelTimercounterValue;
Michael J. Spencer 2:1df0b61d3b5a 98 MCPWMx->MCPER0 = channelSetup->channelPeriodValue;
Michael J. Spencer 2:1df0b61d3b5a 99 MCPWMx->MCPW0 = channelSetup->channelPulsewidthValue;
Michael J. Spencer 2:1df0b61d3b5a 100 } else if (channelNum == 1) {
Michael J. Spencer 2:1df0b61d3b5a 101 MCPWMx->MCTIM1 = channelSetup->channelTimercounterValue;
Michael J. Spencer 2:1df0b61d3b5a 102 MCPWMx->MCPER1 = channelSetup->channelPeriodValue;
Michael J. Spencer 2:1df0b61d3b5a 103 MCPWMx->MCPW1 = channelSetup->channelPulsewidthValue;
Michael J. Spencer 2:1df0b61d3b5a 104 } else if (channelNum == 2) {
Michael J. Spencer 2:1df0b61d3b5a 105 MCPWMx->MCTIM2 = channelSetup->channelTimercounterValue;
Michael J. Spencer 2:1df0b61d3b5a 106 MCPWMx->MCPER2 = channelSetup->channelPeriodValue;
Michael J. Spencer 2:1df0b61d3b5a 107 MCPWMx->MCPW2 = channelSetup->channelPulsewidthValue;
Michael J. Spencer 2:1df0b61d3b5a 108 } else {
Michael J. Spencer 2:1df0b61d3b5a 109 return;
Michael J. Spencer 2:1df0b61d3b5a 110 }
Michael J. Spencer 2:1df0b61d3b5a 111
Michael J. Spencer 2:1df0b61d3b5a 112 if (channelSetup->channelType /* == MCPWM_CHANNEL_CENTER_MODE */){
Michael J. Spencer 2:1df0b61d3b5a 113 MCPWMx->MCCON_SET = MCPWM_CON_CENTER(channelNum);
Michael J. Spencer 2:1df0b61d3b5a 114 } else {
Michael J. Spencer 2:1df0b61d3b5a 115 MCPWMx->MCCON_CLR = MCPWM_CON_CENTER(channelNum);
Michael J. Spencer 2:1df0b61d3b5a 116 }
Michael J. Spencer 2:1df0b61d3b5a 117
Michael J. Spencer 2:1df0b61d3b5a 118 if (channelSetup->channelPolarity /* == MCPWM_CHANNEL_PASSIVE_HI */){
Michael J. Spencer 2:1df0b61d3b5a 119 MCPWMx->MCCON_SET = MCPWM_CON_POLAR(channelNum);
Michael J. Spencer 2:1df0b61d3b5a 120 } else {
Michael J. Spencer 2:1df0b61d3b5a 121 MCPWMx->MCCON_CLR = MCPWM_CON_POLAR(channelNum);
Michael J. Spencer 2:1df0b61d3b5a 122 }
Michael J. Spencer 2:1df0b61d3b5a 123
Michael J. Spencer 2:1df0b61d3b5a 124 if (channelSetup->channelDeadtimeEnable /* == ENABLE */){
Michael J. Spencer 2:1df0b61d3b5a 125 MCPWMx->MCCON_SET = MCPWM_CON_DTE(channelNum);
Michael J. Spencer 2:1df0b61d3b5a 126 MCPWMx->MCDEADTIME &= ~(MCPWM_DT(channelNum, 0x3FF));
Michael J. Spencer 2:1df0b61d3b5a 127 MCPWMx->MCDEADTIME |= MCPWM_DT(channelNum, channelSetup->channelDeadtimeValue);
Michael J. Spencer 2:1df0b61d3b5a 128 } else {
Michael J. Spencer 2:1df0b61d3b5a 129 MCPWMx->MCCON_CLR = MCPWM_CON_DTE(channelNum);
Michael J. Spencer 2:1df0b61d3b5a 130 }
Michael J. Spencer 2:1df0b61d3b5a 131
Michael J. Spencer 2:1df0b61d3b5a 132 if (channelSetup->channelUpdateEnable /* == ENABLE */){
Michael J. Spencer 2:1df0b61d3b5a 133 MCPWMx->MCCON_CLR = MCPWM_CON_DISUP(channelNum);
Michael J. Spencer 2:1df0b61d3b5a 134 } else {
Michael J. Spencer 2:1df0b61d3b5a 135 MCPWMx->MCCON_SET = MCPWM_CON_DISUP(channelNum);
Michael J. Spencer 2:1df0b61d3b5a 136 }
Michael J. Spencer 2:1df0b61d3b5a 137 }
Michael J. Spencer 2:1df0b61d3b5a 138 }
Michael J. Spencer 2:1df0b61d3b5a 139
Michael J. Spencer 2:1df0b61d3b5a 140
Michael J. Spencer 2:1df0b61d3b5a 141 /*********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 142 * @brief Write to MCPWM shadow registers - Update the value for period
Michael J. Spencer 2:1df0b61d3b5a 143 * and pulse width in MCPWM peripheral.
Michael J. Spencer 2:1df0b61d3b5a 144 * @param[in] MCPWMx Motor Control PWM peripheral selected
Michael J. Spencer 2:1df0b61d3b5a 145 * Should be: LPC_MCPWM
Michael J. Spencer 2:1df0b61d3b5a 146 * @param[in] channelNum Channel Number, should be: 0..2.
Michael J. Spencer 2:1df0b61d3b5a 147 * @param[in] channelSetup Pointer to a MCPWM_CHANNEL_CFG_Type structure
Michael J. Spencer 2:1df0b61d3b5a 148 * that contains the configuration information for the
Michael J. Spencer 2:1df0b61d3b5a 149 * specified MCPWM channel.
Michael J. Spencer 2:1df0b61d3b5a 150 * @return None
Michael J. Spencer 2:1df0b61d3b5a 151 **********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 152 void MCPWM_WriteToShadow(LPC_MCPWM_TypeDef *MCPWMx, uint32_t channelNum,
Michael J. Spencer 2:1df0b61d3b5a 153 MCPWM_CHANNEL_CFG_Type *channelSetup)
Michael J. Spencer 2:1df0b61d3b5a 154 {
Michael J. Spencer 2:1df0b61d3b5a 155 if (channelNum == 0){
Michael J. Spencer 2:1df0b61d3b5a 156 MCPWMx->MCPER0 = channelSetup->channelPeriodValue;
Michael J. Spencer 2:1df0b61d3b5a 157 MCPWMx->MCPW0 = channelSetup->channelPulsewidthValue;
Michael J. Spencer 2:1df0b61d3b5a 158 } else if (channelNum == 1) {
Michael J. Spencer 2:1df0b61d3b5a 159 MCPWMx->MCPER1 = channelSetup->channelPeriodValue;
Michael J. Spencer 2:1df0b61d3b5a 160 MCPWMx->MCPW1 = channelSetup->channelPulsewidthValue;
Michael J. Spencer 2:1df0b61d3b5a 161 } else if (channelNum == 2) {
Michael J. Spencer 2:1df0b61d3b5a 162 MCPWMx->MCPER2 = channelSetup->channelPeriodValue;
Michael J. Spencer 2:1df0b61d3b5a 163 MCPWMx->MCPW2 = channelSetup->channelPulsewidthValue;
Michael J. Spencer 2:1df0b61d3b5a 164 }
Michael J. Spencer 2:1df0b61d3b5a 165 }
Michael J. Spencer 2:1df0b61d3b5a 166
Michael J. Spencer 2:1df0b61d3b5a 167
Michael J. Spencer 2:1df0b61d3b5a 168
Michael J. Spencer 2:1df0b61d3b5a 169 /*********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 170 * @brief Configures capture function in MCPWM peripheral
Michael J. Spencer 2:1df0b61d3b5a 171 * @param[in] MCPWMx Motor Control PWM peripheral selected
Michael J. Spencer 2:1df0b61d3b5a 172 * Should be: LPC_MCPWM
Michael J. Spencer 2:1df0b61d3b5a 173 * @param[in] channelNum MCI (Motor Control Input pin) number
Michael J. Spencer 2:1df0b61d3b5a 174 * Should be: 0..2
Michael J. Spencer 2:1df0b61d3b5a 175 * @param[in] captureConfig Pointer to a MCPWM_CAPTURE_CFG_Type structure
Michael J. Spencer 2:1df0b61d3b5a 176 * that contains the configuration information for the
Michael J. Spencer 2:1df0b61d3b5a 177 * specified MCPWM capture.
Michael J. Spencer 2:1df0b61d3b5a 178 * @return
Michael J. Spencer 2:1df0b61d3b5a 179 **********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 180 void MCPWM_ConfigCapture(LPC_MCPWM_TypeDef *MCPWMx, uint32_t channelNum,
Michael J. Spencer 2:1df0b61d3b5a 181 MCPWM_CAPTURE_CFG_Type *captureConfig)
Michael J. Spencer 2:1df0b61d3b5a 182 {
Michael J. Spencer 2:1df0b61d3b5a 183 if (channelNum <= 2) {
Michael J. Spencer 2:1df0b61d3b5a 184
Michael J. Spencer 2:1df0b61d3b5a 185 if (captureConfig->captureFalling /* == ENABLE */) {
Michael J. Spencer 2:1df0b61d3b5a 186 MCPWMx->MCCAPCON_SET = MCPWM_CAPCON_CAPMCI_FE(captureConfig->captureChannel, channelNum);
Michael J. Spencer 2:1df0b61d3b5a 187 } else {
Michael J. Spencer 2:1df0b61d3b5a 188 MCPWMx->MCCAPCON_CLR = MCPWM_CAPCON_CAPMCI_FE(captureConfig->captureChannel, channelNum);
Michael J. Spencer 2:1df0b61d3b5a 189 }
Michael J. Spencer 2:1df0b61d3b5a 190
Michael J. Spencer 2:1df0b61d3b5a 191 if (captureConfig->captureRising /* == ENABLE */) {
Michael J. Spencer 2:1df0b61d3b5a 192 MCPWMx->MCCAPCON_SET = MCPWM_CAPCON_CAPMCI_RE(captureConfig->captureChannel, channelNum);
Michael J. Spencer 2:1df0b61d3b5a 193 } else {
Michael J. Spencer 2:1df0b61d3b5a 194 MCPWMx->MCCAPCON_CLR = MCPWM_CAPCON_CAPMCI_RE(captureConfig->captureChannel, channelNum);
Michael J. Spencer 2:1df0b61d3b5a 195 }
Michael J. Spencer 2:1df0b61d3b5a 196
Michael J. Spencer 2:1df0b61d3b5a 197 if (captureConfig->timerReset /* == ENABLE */){
Michael J. Spencer 2:1df0b61d3b5a 198 MCPWMx->MCCAPCON_SET = MCPWM_CAPCON_RT(captureConfig->captureChannel);
Michael J. Spencer 2:1df0b61d3b5a 199 } else {
Michael J. Spencer 2:1df0b61d3b5a 200 MCPWMx->MCCAPCON_CLR = MCPWM_CAPCON_RT(captureConfig->captureChannel);
Michael J. Spencer 2:1df0b61d3b5a 201 }
Michael J. Spencer 2:1df0b61d3b5a 202
Michael J. Spencer 2:1df0b61d3b5a 203 if (captureConfig->hnfEnable /* == ENABLE */){
Michael J. Spencer 2:1df0b61d3b5a 204 MCPWMx->MCCAPCON_SET = MCPWM_CAPCON_HNFCAP(channelNum);
Michael J. Spencer 2:1df0b61d3b5a 205 } else {
Michael J. Spencer 2:1df0b61d3b5a 206 MCPWMx->MCCAPCON_CLR = MCPWM_CAPCON_HNFCAP(channelNum);
Michael J. Spencer 2:1df0b61d3b5a 207 }
Michael J. Spencer 2:1df0b61d3b5a 208 }
Michael J. Spencer 2:1df0b61d3b5a 209 }
Michael J. Spencer 2:1df0b61d3b5a 210
Michael J. Spencer 2:1df0b61d3b5a 211
Michael J. Spencer 2:1df0b61d3b5a 212 /*********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 213 * @brief Clears current captured value in specified capture channel
Michael J. Spencer 2:1df0b61d3b5a 214 * @param[in] MCPWMx Motor Control PWM peripheral selected
Michael J. Spencer 2:1df0b61d3b5a 215 * Should be: LPC_MCPWM
Michael J. Spencer 2:1df0b61d3b5a 216 * @param[in] captureChannel Capture channel number, should be: 0..2
Michael J. Spencer 2:1df0b61d3b5a 217 * @return None
Michael J. Spencer 2:1df0b61d3b5a 218 **********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 219 void MCPWM_ClearCapture(LPC_MCPWM_TypeDef *MCPWMx, uint32_t captureChannel)
Michael J. Spencer 2:1df0b61d3b5a 220 {
Michael J. Spencer 2:1df0b61d3b5a 221 MCPWMx->MCCAP_CLR = MCPWM_CAPCLR_CAP(captureChannel);
Michael J. Spencer 2:1df0b61d3b5a 222 }
Michael J. Spencer 2:1df0b61d3b5a 223
Michael J. Spencer 2:1df0b61d3b5a 224 /*********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 225 * @brief Get current captured value in specified capture channel
Michael J. Spencer 2:1df0b61d3b5a 226 * @param[in] MCPWMx Motor Control PWM peripheral selected,
Michael J. Spencer 2:1df0b61d3b5a 227 * Should be: LPC_MCPWM
Michael J. Spencer 2:1df0b61d3b5a 228 * @param[in] captureChannel Capture channel number, should be: 0..2
Michael J. Spencer 2:1df0b61d3b5a 229 * @return None
Michael J. Spencer 2:1df0b61d3b5a 230 **********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 231 uint32_t MCPWM_GetCapture(LPC_MCPWM_TypeDef *MCPWMx, uint32_t captureChannel)
Michael J. Spencer 2:1df0b61d3b5a 232 {
Michael J. Spencer 2:1df0b61d3b5a 233 if (captureChannel == 0){
Michael J. Spencer 2:1df0b61d3b5a 234 return (MCPWMx->MCCR0);
Michael J. Spencer 2:1df0b61d3b5a 235 } else if (captureChannel == 1) {
Michael J. Spencer 2:1df0b61d3b5a 236 return (MCPWMx->MCCR1);
Michael J. Spencer 2:1df0b61d3b5a 237 } else if (captureChannel == 2) {
Michael J. Spencer 2:1df0b61d3b5a 238 return (MCPWMx->MCCR2);
Michael J. Spencer 2:1df0b61d3b5a 239 }
Michael J. Spencer 2:1df0b61d3b5a 240 return (0);
Michael J. Spencer 2:1df0b61d3b5a 241 }
Michael J. Spencer 2:1df0b61d3b5a 242
Michael J. Spencer 2:1df0b61d3b5a 243
Michael J. Spencer 2:1df0b61d3b5a 244 /*********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 245 * @brief Configures Count control in MCPWM peripheral
Michael J. Spencer 2:1df0b61d3b5a 246 * @param[in] MCPWMx Motor Control PWM peripheral selected
Michael J. Spencer 2:1df0b61d3b5a 247 * Should be: LPC_MCPWM
Michael J. Spencer 2:1df0b61d3b5a 248 * @param[in] channelNum Channel number, should be: 0..2
Michael J. Spencer 2:1df0b61d3b5a 249 * @param[in] countMode Count mode, should be:
Michael J. Spencer 2:1df0b61d3b5a 250 * - ENABLE: Enables count mode.
Michael J. Spencer 2:1df0b61d3b5a 251 * - DISABLE: Disable count mode, the channel is in timer mode.
Michael J. Spencer 2:1df0b61d3b5a 252 * @param[in] countConfig Pointer to a MCPWM_COUNT_CFG_Type structure
Michael J. Spencer 2:1df0b61d3b5a 253 * that contains the configuration information for the
Michael J. Spencer 2:1df0b61d3b5a 254 * specified MCPWM count control.
Michael J. Spencer 2:1df0b61d3b5a 255 * @return None
Michael J. Spencer 2:1df0b61d3b5a 256 **********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 257 void MCPWM_CountConfig(LPC_MCPWM_TypeDef *MCPWMx, uint32_t channelNum,
Michael J. Spencer 2:1df0b61d3b5a 258 uint32_t countMode, MCPWM_COUNT_CFG_Type *countConfig)
Michael J. Spencer 2:1df0b61d3b5a 259 {
Michael J. Spencer 2:1df0b61d3b5a 260 if (channelNum <= 2) {
Michael J. Spencer 2:1df0b61d3b5a 261 if (countMode /* == ENABLE */){
Michael J. Spencer 2:1df0b61d3b5a 262 MCPWMx->MCCNTCON_SET = MCPWM_CNTCON_CNTR(channelNum);
Michael J. Spencer 2:1df0b61d3b5a 263 if (countConfig->countFalling /* == ENABLE */) {
Michael J. Spencer 2:1df0b61d3b5a 264 MCPWMx->MCCNTCON_SET = MCPWM_CNTCON_TCMCI_FE(countConfig->counterChannel,channelNum);
Michael J. Spencer 2:1df0b61d3b5a 265 } else {
Michael J. Spencer 2:1df0b61d3b5a 266 MCPWMx->MCCNTCON_CLR = MCPWM_CNTCON_TCMCI_FE(countConfig->counterChannel,channelNum);
Michael J. Spencer 2:1df0b61d3b5a 267 }
Michael J. Spencer 2:1df0b61d3b5a 268 if (countConfig->countRising /* == ENABLE */) {
Michael J. Spencer 2:1df0b61d3b5a 269 MCPWMx->MCCNTCON_SET = MCPWM_CNTCON_TCMCI_RE(countConfig->counterChannel,channelNum);
Michael J. Spencer 2:1df0b61d3b5a 270 } else {
Michael J. Spencer 2:1df0b61d3b5a 271 MCPWMx->MCCNTCON_CLR = MCPWM_CNTCON_TCMCI_RE(countConfig->counterChannel,channelNum);
Michael J. Spencer 2:1df0b61d3b5a 272 }
Michael J. Spencer 2:1df0b61d3b5a 273 } else {
Michael J. Spencer 2:1df0b61d3b5a 274 MCPWMx->MCCNTCON_CLR = MCPWM_CNTCON_CNTR(channelNum);
Michael J. Spencer 2:1df0b61d3b5a 275 }
Michael J. Spencer 2:1df0b61d3b5a 276 }
Michael J. Spencer 2:1df0b61d3b5a 277 }
Michael J. Spencer 2:1df0b61d3b5a 278
Michael J. Spencer 2:1df0b61d3b5a 279
Michael J. Spencer 2:1df0b61d3b5a 280 /*********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 281 * @brief Start MCPWM activity for each MCPWM channel
Michael J. Spencer 2:1df0b61d3b5a 282 * @param[in] MCPWMx Motor Control PWM peripheral selected
Michael J. Spencer 2:1df0b61d3b5a 283 * Should be: LPC_MCPWM
Michael J. Spencer 2:1df0b61d3b5a 284 * @param[in] channel0 State of this command on channel 0:
Michael J. Spencer 2:1df0b61d3b5a 285 * - ENABLE: 'Start' command will effect on channel 0
Michael J. Spencer 2:1df0b61d3b5a 286 * - DISABLE: 'Start' command will not effect on channel 0
Michael J. Spencer 2:1df0b61d3b5a 287 * @param[in] channel1 State of this command on channel 1:
Michael J. Spencer 2:1df0b61d3b5a 288 * - ENABLE: 'Start' command will effect on channel 1
Michael J. Spencer 2:1df0b61d3b5a 289 * - DISABLE: 'Start' command will not effect on channel 1
Michael J. Spencer 2:1df0b61d3b5a 290 * @param[in] channel2 State of this command on channel 2:
Michael J. Spencer 2:1df0b61d3b5a 291 * - ENABLE: 'Start' command will effect on channel 2
Michael J. Spencer 2:1df0b61d3b5a 292 * - DISABLE: 'Start' command will not effect on channel 2
Michael J. Spencer 2:1df0b61d3b5a 293 * @return None
Michael J. Spencer 2:1df0b61d3b5a 294 **********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 295 void MCPWM_Start(LPC_MCPWM_TypeDef *MCPWMx, uint32_t channel0,
Michael J. Spencer 2:1df0b61d3b5a 296 uint32_t channel1, uint32_t channel2)
Michael J. Spencer 2:1df0b61d3b5a 297 {
Michael J. Spencer 2:1df0b61d3b5a 298 uint32_t regVal = 0;
Michael J. Spencer 2:1df0b61d3b5a 299 regVal = (channel0 ? MCPWM_CON_RUN(0) : 0) | (channel1 ? MCPWM_CON_RUN(1) : 0) \
Michael J. Spencer 2:1df0b61d3b5a 300 | (channel2 ? MCPWM_CON_RUN(2) : 0);
Michael J. Spencer 2:1df0b61d3b5a 301 MCPWMx->MCCON_SET = regVal;
Michael J. Spencer 2:1df0b61d3b5a 302 }
Michael J. Spencer 2:1df0b61d3b5a 303
Michael J. Spencer 2:1df0b61d3b5a 304
Michael J. Spencer 2:1df0b61d3b5a 305 /*********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 306 * @brief Stop MCPWM activity for each MCPWM channel
Michael J. Spencer 2:1df0b61d3b5a 307 * @param[in] MCPWMx Motor Control PWM peripheral selected
Michael J. Spencer 2:1df0b61d3b5a 308 * Should be: LPC_MCPWM
Michael J. Spencer 2:1df0b61d3b5a 309 * @param[in] channel0 State of this command on channel 0:
Michael J. Spencer 2:1df0b61d3b5a 310 * - ENABLE: 'Stop' command will effect on channel 0
Michael J. Spencer 2:1df0b61d3b5a 311 * - DISABLE: 'Stop' command will not effect on channel 0
Michael J. Spencer 2:1df0b61d3b5a 312 * @param[in] channel1 State of this command on channel 1:
Michael J. Spencer 2:1df0b61d3b5a 313 * - ENABLE: 'Stop' command will effect on channel 1
Michael J. Spencer 2:1df0b61d3b5a 314 * - DISABLE: 'Stop' command will not effect on channel 1
Michael J. Spencer 2:1df0b61d3b5a 315 * @param[in] channel2 State of this command on channel 2:
Michael J. Spencer 2:1df0b61d3b5a 316 * - ENABLE: 'Stop' command will effect on channel 2
Michael J. Spencer 2:1df0b61d3b5a 317 * - DISABLE: 'Stop' command will not effect on channel 2
Michael J. Spencer 2:1df0b61d3b5a 318 * @return None
Michael J. Spencer 2:1df0b61d3b5a 319 **********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 320 void MCPWM_Stop(LPC_MCPWM_TypeDef *MCPWMx, uint32_t channel0,
Michael J. Spencer 2:1df0b61d3b5a 321 uint32_t channel1, uint32_t channel2)
Michael J. Spencer 2:1df0b61d3b5a 322 {
Michael J. Spencer 2:1df0b61d3b5a 323 uint32_t regVal = 0;
Michael J. Spencer 2:1df0b61d3b5a 324 regVal = (channel0 ? MCPWM_CON_RUN(0) : 0) | (channel1 ? MCPWM_CON_RUN(1) : 0) \
Michael J. Spencer 2:1df0b61d3b5a 325 | (channel2 ? MCPWM_CON_RUN(2) : 0);
Michael J. Spencer 2:1df0b61d3b5a 326 MCPWMx->MCCON_CLR = regVal;
Michael J. Spencer 2:1df0b61d3b5a 327 }
Michael J. Spencer 2:1df0b61d3b5a 328
Michael J. Spencer 2:1df0b61d3b5a 329
Michael J. Spencer 2:1df0b61d3b5a 330 /*********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 331 * @brief Enables/Disables 3-phase AC motor mode on MCPWM peripheral
Michael J. Spencer 2:1df0b61d3b5a 332 * @param[in] MCPWMx Motor Control PWM peripheral selected
Michael J. Spencer 2:1df0b61d3b5a 333 * Should be: LPC_MCPWM
Michael J. Spencer 2:1df0b61d3b5a 334 * @param[in] acMode State of this command, should be:
Michael J. Spencer 2:1df0b61d3b5a 335 * - ENABLE.
Michael J. Spencer 2:1df0b61d3b5a 336 * - DISABLE.
Michael J. Spencer 2:1df0b61d3b5a 337 * @return None
Michael J. Spencer 2:1df0b61d3b5a 338 **********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 339 void MCPWM_ACMode(LPC_MCPWM_TypeDef *MCPWMx, uint32_t acMode)
Michael J. Spencer 2:1df0b61d3b5a 340 {
Michael J. Spencer 2:1df0b61d3b5a 341 if (acMode){
Michael J. Spencer 2:1df0b61d3b5a 342 MCPWMx->MCCON_SET = MCPWM_CON_ACMODE;
Michael J. Spencer 2:1df0b61d3b5a 343 } else {
Michael J. Spencer 2:1df0b61d3b5a 344 MCPWMx->MCCON_CLR = MCPWM_CON_ACMODE;
Michael J. Spencer 2:1df0b61d3b5a 345 }
Michael J. Spencer 2:1df0b61d3b5a 346 }
Michael J. Spencer 2:1df0b61d3b5a 347
Michael J. Spencer 2:1df0b61d3b5a 348
Michael J. Spencer 2:1df0b61d3b5a 349 /*********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 350 * @brief Enables/Disables 3-phase DC motor mode on MCPWM peripheral
Michael J. Spencer 2:1df0b61d3b5a 351 * @param[in] MCPWMx Motor Control PWM peripheral selected
Michael J. Spencer 2:1df0b61d3b5a 352 * Should be: LPC_MCPWM
Michael J. Spencer 2:1df0b61d3b5a 353 * @param[in] dcMode State of this command, should be:
Michael J. Spencer 2:1df0b61d3b5a 354 * - ENABLE.
Michael J. Spencer 2:1df0b61d3b5a 355 * - DISABLE.
Michael J. Spencer 2:1df0b61d3b5a 356 * @param[in] outputInvered Polarity of the MCOB outputs for all 3 channels,
Michael J. Spencer 2:1df0b61d3b5a 357 * should be:
Michael J. Spencer 2:1df0b61d3b5a 358 * - ENABLE: The MCOB outputs have opposite polarity
Michael J. Spencer 2:1df0b61d3b5a 359 * from the MCOA outputs.
Michael J. Spencer 2:1df0b61d3b5a 360 * - DISABLE: The MCOB outputs have the same basic
Michael J. Spencer 2:1df0b61d3b5a 361 * polarity as the MCOA outputs.
Michael J. Spencer 2:1df0b61d3b5a 362 * @param[in] outputPattern A value contains bits that enables/disables the specified
Michael J. Spencer 2:1df0b61d3b5a 363 * output pins route to the internal MCOA0 signal, should be:
Michael J. Spencer 2:1df0b61d3b5a 364 - MCPWM_PATENT_A0: MCOA0 tracks internal MCOA0
Michael J. Spencer 2:1df0b61d3b5a 365 - MCPWM_PATENT_B0: MCOB0 tracks internal MCOA0
Michael J. Spencer 2:1df0b61d3b5a 366 - MCPWM_PATENT_A1: MCOA1 tracks internal MCOA0
Michael J. Spencer 2:1df0b61d3b5a 367 - MCPWM_PATENT_B1: MCOB1 tracks internal MCOA0
Michael J. Spencer 2:1df0b61d3b5a 368 - MCPWM_PATENT_A2: MCOA2 tracks internal MCOA0
Michael J. Spencer 2:1df0b61d3b5a 369 - MCPWM_PATENT_B2: MCOB2 tracks internal MCOA0
Michael J. Spencer 2:1df0b61d3b5a 370 * @return None
Michael J. Spencer 2:1df0b61d3b5a 371 *
Michael J. Spencer 2:1df0b61d3b5a 372 * Note: all these outputPatent values above can be ORed together for using as input parameter.
Michael J. Spencer 2:1df0b61d3b5a 373 **********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 374 void MCPWM_DCMode(LPC_MCPWM_TypeDef *MCPWMx, uint32_t dcMode,
Michael J. Spencer 2:1df0b61d3b5a 375 uint32_t outputInvered, uint32_t outputPattern)
Michael J. Spencer 2:1df0b61d3b5a 376 {
Michael J. Spencer 2:1df0b61d3b5a 377 if (dcMode){
Michael J. Spencer 2:1df0b61d3b5a 378 MCPWMx->MCCON_SET = MCPWM_CON_DCMODE;
Michael J. Spencer 2:1df0b61d3b5a 379 } else {
Michael J. Spencer 2:1df0b61d3b5a 380 MCPWMx->MCCON_CLR = MCPWM_CON_DCMODE;
Michael J. Spencer 2:1df0b61d3b5a 381 }
Michael J. Spencer 2:1df0b61d3b5a 382
Michael J. Spencer 2:1df0b61d3b5a 383 if (outputInvered) {
Michael J. Spencer 2:1df0b61d3b5a 384 MCPWMx->MCCON_SET = MCPWM_CON_INVBDC;
Michael J. Spencer 2:1df0b61d3b5a 385 } else {
Michael J. Spencer 2:1df0b61d3b5a 386 MCPWMx->MCCON_CLR = MCPWM_CON_INVBDC;
Michael J. Spencer 2:1df0b61d3b5a 387 }
Michael J. Spencer 2:1df0b61d3b5a 388
Michael J. Spencer 2:1df0b61d3b5a 389 MCPWMx->MCCCP = outputPattern;
Michael J. Spencer 2:1df0b61d3b5a 390 }
Michael J. Spencer 2:1df0b61d3b5a 391
Michael J. Spencer 2:1df0b61d3b5a 392
Michael J. Spencer 2:1df0b61d3b5a 393 /*********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 394 * @brief Configures the specified interrupt in MCPWM peripheral
Michael J. Spencer 2:1df0b61d3b5a 395 * @param[in] MCPWMx Motor Control PWM peripheral selected
Michael J. Spencer 2:1df0b61d3b5a 396 * Should be: LPC_MCPWM
Michael J. Spencer 2:1df0b61d3b5a 397 * @param[in] ulIntType Interrupt type, should be:
Michael J. Spencer 2:1df0b61d3b5a 398 * - MCPWM_INTFLAG_LIM0: Limit interrupt for channel (0)
Michael J. Spencer 2:1df0b61d3b5a 399 * - MCPWM_INTFLAG_MAT0: Match interrupt for channel (0)
Michael J. Spencer 2:1df0b61d3b5a 400 * - MCPWM_INTFLAG_CAP0: Capture interrupt for channel (0)
Michael J. Spencer 2:1df0b61d3b5a 401 * - MCPWM_INTFLAG_LIM1: Limit interrupt for channel (1)
Michael J. Spencer 2:1df0b61d3b5a 402 * - MCPWM_INTFLAG_MAT1: Match interrupt for channel (1)
Michael J. Spencer 2:1df0b61d3b5a 403 * - MCPWM_INTFLAG_CAP1: Capture interrupt for channel (1)
Michael J. Spencer 2:1df0b61d3b5a 404 * - MCPWM_INTFLAG_LIM2: Limit interrupt for channel (2)
Michael J. Spencer 2:1df0b61d3b5a 405 * - MCPWM_INTFLAG_MAT2: Match interrupt for channel (2)
Michael J. Spencer 2:1df0b61d3b5a 406 * - MCPWM_INTFLAG_CAP2: Capture interrupt for channel (2)
Michael J. Spencer 2:1df0b61d3b5a 407 * - MCPWM_INTFLAG_ABORT: Fast abort interrupt
Michael J. Spencer 2:1df0b61d3b5a 408 * @param[in] NewState New State of this command, should be:
Michael J. Spencer 2:1df0b61d3b5a 409 * - ENABLE.
Michael J. Spencer 2:1df0b61d3b5a 410 * - DISABLE.
Michael J. Spencer 2:1df0b61d3b5a 411 * @return None
Michael J. Spencer 2:1df0b61d3b5a 412 *
Michael J. Spencer 2:1df0b61d3b5a 413 * Note: all these ulIntType values above can be ORed together for using as input parameter.
Michael J. Spencer 2:1df0b61d3b5a 414 **********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 415 void MCPWM_IntConfig(LPC_MCPWM_TypeDef *MCPWMx, uint32_t ulIntType, FunctionalState NewState)
Michael J. Spencer 2:1df0b61d3b5a 416 {
Michael J. Spencer 2:1df0b61d3b5a 417 if (NewState) {
Michael J. Spencer 2:1df0b61d3b5a 418 MCPWMx->MCINTEN_SET = ulIntType;
Michael J. Spencer 2:1df0b61d3b5a 419 } else {
Michael J. Spencer 2:1df0b61d3b5a 420 MCPWMx->MCINTEN_CLR = ulIntType;
Michael J. Spencer 2:1df0b61d3b5a 421 }
Michael J. Spencer 2:1df0b61d3b5a 422 }
Michael J. Spencer 2:1df0b61d3b5a 423
Michael J. Spencer 2:1df0b61d3b5a 424
Michael J. Spencer 2:1df0b61d3b5a 425 /*********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 426 * @brief Sets/Forces the specified interrupt for MCPWM peripheral
Michael J. Spencer 2:1df0b61d3b5a 427 * @param[in] MCPWMx Motor Control PWM peripheral selected
Michael J. Spencer 2:1df0b61d3b5a 428 * Should be LPC_MCPWM
Michael J. Spencer 2:1df0b61d3b5a 429 * @param[in] ulIntType Interrupt type, should be:
Michael J. Spencer 2:1df0b61d3b5a 430 * - MCPWM_INTFLAG_LIM0: Limit interrupt for channel (0)
Michael J. Spencer 2:1df0b61d3b5a 431 * - MCPWM_INTFLAG_MAT0: Match interrupt for channel (0)
Michael J. Spencer 2:1df0b61d3b5a 432 * - MCPWM_INTFLAG_CAP0: Capture interrupt for channel (0)
Michael J. Spencer 2:1df0b61d3b5a 433 * - MCPWM_INTFLAG_LIM1: Limit interrupt for channel (1)
Michael J. Spencer 2:1df0b61d3b5a 434 * - MCPWM_INTFLAG_MAT1: Match interrupt for channel (1)
Michael J. Spencer 2:1df0b61d3b5a 435 * - MCPWM_INTFLAG_CAP1: Capture interrupt for channel (1)
Michael J. Spencer 2:1df0b61d3b5a 436 * - MCPWM_INTFLAG_LIM2: Limit interrupt for channel (2)
Michael J. Spencer 2:1df0b61d3b5a 437 * - MCPWM_INTFLAG_MAT2: Match interrupt for channel (2)
Michael J. Spencer 2:1df0b61d3b5a 438 * - MCPWM_INTFLAG_CAP2: Capture interrupt for channel (2)
Michael J. Spencer 2:1df0b61d3b5a 439 * - MCPWM_INTFLAG_ABORT: Fast abort interrupt
Michael J. Spencer 2:1df0b61d3b5a 440 * @return None
Michael J. Spencer 2:1df0b61d3b5a 441 * Note: all these ulIntType values above can be ORed together for using as input parameter.
Michael J. Spencer 2:1df0b61d3b5a 442 **********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 443 void MCPWM_IntSet(LPC_MCPWM_TypeDef *MCPWMx, uint32_t ulIntType)
Michael J. Spencer 2:1df0b61d3b5a 444 {
Michael J. Spencer 2:1df0b61d3b5a 445 MCPWMx->MCINTFLAG_SET = ulIntType;
Michael J. Spencer 2:1df0b61d3b5a 446 }
Michael J. Spencer 2:1df0b61d3b5a 447
Michael J. Spencer 2:1df0b61d3b5a 448
Michael J. Spencer 2:1df0b61d3b5a 449 /*********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 450 * @brief Clear the specified interrupt pending for MCPWM peripheral
Michael J. Spencer 2:1df0b61d3b5a 451 * @param[in] MCPWMx Motor Control PWM peripheral selected,
Michael J. Spencer 2:1df0b61d3b5a 452 * should be: LPC_MCPWM
Michael J. Spencer 2:1df0b61d3b5a 453 * @param[in] ulIntType Interrupt type, should be:
Michael J. Spencer 2:1df0b61d3b5a 454 * - MCPWM_INTFLAG_LIM0: Limit interrupt for channel (0)
Michael J. Spencer 2:1df0b61d3b5a 455 * - MCPWM_INTFLAG_MAT0: Match interrupt for channel (0)
Michael J. Spencer 2:1df0b61d3b5a 456 * - MCPWM_INTFLAG_CAP0: Capture interrupt for channel (0)
Michael J. Spencer 2:1df0b61d3b5a 457 * - MCPWM_INTFLAG_LIM1: Limit interrupt for channel (1)
Michael J. Spencer 2:1df0b61d3b5a 458 * - MCPWM_INTFLAG_MAT1: Match interrupt for channel (1)
Michael J. Spencer 2:1df0b61d3b5a 459 * - MCPWM_INTFLAG_CAP1: Capture interrupt for channel (1)
Michael J. Spencer 2:1df0b61d3b5a 460 * - MCPWM_INTFLAG_LIM2: Limit interrupt for channel (2)
Michael J. Spencer 2:1df0b61d3b5a 461 * - MCPWM_INTFLAG_MAT2: Match interrupt for channel (2)
Michael J. Spencer 2:1df0b61d3b5a 462 * - MCPWM_INTFLAG_CAP2: Capture interrupt for channel (2)
Michael J. Spencer 2:1df0b61d3b5a 463 * - MCPWM_INTFLAG_ABORT: Fast abort interrupt
Michael J. Spencer 2:1df0b61d3b5a 464 * @return None
Michael J. Spencer 2:1df0b61d3b5a 465 * Note: all these ulIntType values above can be ORed together for using as input parameter.
Michael J. Spencer 2:1df0b61d3b5a 466 **********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 467 void MCPWM_IntClear(LPC_MCPWM_TypeDef *MCPWMx, uint32_t ulIntType)
Michael J. Spencer 2:1df0b61d3b5a 468 {
Michael J. Spencer 2:1df0b61d3b5a 469 MCPWMx->MCINTFLAG_CLR = ulIntType;
Michael J. Spencer 2:1df0b61d3b5a 470 }
Michael J. Spencer 2:1df0b61d3b5a 471
Michael J. Spencer 2:1df0b61d3b5a 472
Michael J. Spencer 2:1df0b61d3b5a 473 /*********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 474 * @brief Check whether if the specified interrupt in MCPWM is set or not
Michael J. Spencer 2:1df0b61d3b5a 475 * @param[in] MCPWMx Motor Control PWM peripheral selected,
Michael J. Spencer 2:1df0b61d3b5a 476 * should be: LPC_MCPWM
Michael J. Spencer 2:1df0b61d3b5a 477 * @param[in] ulIntType Interrupt type, should be:
Michael J. Spencer 2:1df0b61d3b5a 478 * - MCPWM_INTFLAG_LIM0: Limit interrupt for channel (0)
Michael J. Spencer 2:1df0b61d3b5a 479 * - MCPWM_INTFLAG_MAT0: Match interrupt for channel (0)
Michael J. Spencer 2:1df0b61d3b5a 480 * - MCPWM_INTFLAG_CAP0: Capture interrupt for channel (0)
Michael J. Spencer 2:1df0b61d3b5a 481 * - MCPWM_INTFLAG_LIM1: Limit interrupt for channel (1)
Michael J. Spencer 2:1df0b61d3b5a 482 * - MCPWM_INTFLAG_MAT1: Match interrupt for channel (1)
Michael J. Spencer 2:1df0b61d3b5a 483 * - MCPWM_INTFLAG_CAP1: Capture interrupt for channel (1)
Michael J. Spencer 2:1df0b61d3b5a 484 * - MCPWM_INTFLAG_LIM2: Limit interrupt for channel (2)
Michael J. Spencer 2:1df0b61d3b5a 485 * - MCPWM_INTFLAG_MAT2: Match interrupt for channel (2)
Michael J. Spencer 2:1df0b61d3b5a 486 * - MCPWM_INTFLAG_CAP2: Capture interrupt for channel (2)
Michael J. Spencer 2:1df0b61d3b5a 487 * - MCPWM_INTFLAG_ABORT: Fast abort interrupt
Michael J. Spencer 2:1df0b61d3b5a 488 * @return None
Michael J. Spencer 2:1df0b61d3b5a 489 **********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 490 FlagStatus MCPWM_GetIntStatus(LPC_MCPWM_TypeDef *MCPWMx, uint32_t ulIntType)
Michael J. Spencer 2:1df0b61d3b5a 491 {
Michael J. Spencer 2:1df0b61d3b5a 492 return ((MCPWMx->MCINTFLAG & ulIntType) ? SET : RESET);
Michael J. Spencer 2:1df0b61d3b5a 493 }
Michael J. Spencer 2:1df0b61d3b5a 494
Michael J. Spencer 2:1df0b61d3b5a 495 /**
Michael J. Spencer 2:1df0b61d3b5a 496 * @}
Michael J. Spencer 2:1df0b61d3b5a 497 */
Michael J. Spencer 2:1df0b61d3b5a 498
Michael J. Spencer 2:1df0b61d3b5a 499 #endif /* _MCPWM */
Michael J. Spencer 2:1df0b61d3b5a 500
Michael J. Spencer 2:1df0b61d3b5a 501 /**
Michael J. Spencer 2:1df0b61d3b5a 502 * @}
Michael J. Spencer 2:1df0b61d3b5a 503 */
Michael J. Spencer 2:1df0b61d3b5a 504
Michael J. Spencer 2:1df0b61d3b5a 505 /* --------------------------------- End Of File ------------------------------ */
Michael J. Spencer 2:1df0b61d3b5a 506 #endif /* __LPC17XX__ */