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mbed-os/hal/mbed_itm_api.c@0:6ad07c9019fd, 2018-05-30 (annotated)

Committer:
Bethory
Date:
Wed May 30 00:01:50 2018 +0000
Revision:
0:6ad07c9019fd
Codigo de tales para todos los pasculaes

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Bethory 0:6ad07c9019fd 1 /* mbed Microcontroller Library
Bethory 0:6ad07c9019fd 2 * Copyright (c) 2017 ARM Limited
Bethory 0:6ad07c9019fd 3 *
Bethory 0:6ad07c9019fd 4 * Licensed under the Apache License, Version 2.0 (the "License");
Bethory 0:6ad07c9019fd 5 * you may not use this file except in compliance with the License.
Bethory 0:6ad07c9019fd 6 * You may obtain a copy of the License at
Bethory 0:6ad07c9019fd 7 *
Bethory 0:6ad07c9019fd 8 * http://www.apache.org/licenses/LICENSE-2.0
Bethory 0:6ad07c9019fd 9 *
Bethory 0:6ad07c9019fd 10 * Unless required by applicable law or agreed to in writing, software
Bethory 0:6ad07c9019fd 11 * distributed under the License is distributed on an "AS IS" BASIS,
Bethory 0:6ad07c9019fd 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
Bethory 0:6ad07c9019fd 13 * See the License for the specific language governing permissions and
Bethory 0:6ad07c9019fd 14 * limitations under the License.
Bethory 0:6ad07c9019fd 15 */
Bethory 0:6ad07c9019fd 16
Bethory 0:6ad07c9019fd 17 #if defined(DEVICE_ITM)
Bethory 0:6ad07c9019fd 18
Bethory 0:6ad07c9019fd 19 #include "hal/itm_api.h"
Bethory 0:6ad07c9019fd 20 #include "cmsis.h"
Bethory 0:6ad07c9019fd 21
Bethory 0:6ad07c9019fd 22 #include <stdbool.h>
Bethory 0:6ad07c9019fd 23
Bethory 0:6ad07c9019fd 24 #define ITM_ENABLE_WRITE 0xC5ACCE55
Bethory 0:6ad07c9019fd 25
Bethory 0:6ad07c9019fd 26 #define SWO_NRZ 0x02
Bethory 0:6ad07c9019fd 27 #define SWO_STIMULUS_PORT 0x01
Bethory 0:6ad07c9019fd 28
Bethory 0:6ad07c9019fd 29 void mbed_itm_init(void)
Bethory 0:6ad07c9019fd 30 {
Bethory 0:6ad07c9019fd 31 static bool do_init = true;
Bethory 0:6ad07c9019fd 32
Bethory 0:6ad07c9019fd 33 if (do_init) {
Bethory 0:6ad07c9019fd 34 do_init = false;
Bethory 0:6ad07c9019fd 35
Bethory 0:6ad07c9019fd 36 itm_init();
Bethory 0:6ad07c9019fd 37
Bethory 0:6ad07c9019fd 38 /* Enable write access to ITM registers. */
Bethory 0:6ad07c9019fd 39 ITM->LAR = ITM_ENABLE_WRITE;
Bethory 0:6ad07c9019fd 40
Bethory 0:6ad07c9019fd 41 /* Trace Port Interface Selected Pin Protocol Register. */
Bethory 0:6ad07c9019fd 42 TPI->SPPR = (SWO_NRZ << TPI_SPPR_TXMODE_Pos);
Bethory 0:6ad07c9019fd 43
Bethory 0:6ad07c9019fd 44 /* Trace Port Interface Formatter and Flush Control Register */
Bethory 0:6ad07c9019fd 45 TPI->FFCR = (1 << TPI_FFCR_TrigIn_Pos);
Bethory 0:6ad07c9019fd 46
Bethory 0:6ad07c9019fd 47 /* Data Watchpoint and Trace Control Register */
Bethory 0:6ad07c9019fd 48 DWT->CTRL = (1 << DWT_CTRL_CYCTAP_Pos) |
Bethory 0:6ad07c9019fd 49 (0xF << DWT_CTRL_POSTINIT_Pos) |
Bethory 0:6ad07c9019fd 50 (0xF << DWT_CTRL_POSTPRESET_Pos) |
Bethory 0:6ad07c9019fd 51 (1 << DWT_CTRL_CYCCNTENA_Pos);
Bethory 0:6ad07c9019fd 52
Bethory 0:6ad07c9019fd 53 /* Trace Privilege Register.
Bethory 0:6ad07c9019fd 54 * Disable access to trace channel configuration from non-privileged mode.
Bethory 0:6ad07c9019fd 55 */
Bethory 0:6ad07c9019fd 56 ITM->TPR = 0x0;
Bethory 0:6ad07c9019fd 57
Bethory 0:6ad07c9019fd 58 /* Trace Control Register */
Bethory 0:6ad07c9019fd 59 ITM->TCR = (1 << ITM_TCR_TraceBusID_Pos) |
Bethory 0:6ad07c9019fd 60 (1 << ITM_TCR_DWTENA_Pos) |
Bethory 0:6ad07c9019fd 61 (1 << ITM_TCR_SYNCENA_Pos) |
Bethory 0:6ad07c9019fd 62 (1 << ITM_TCR_ITMENA_Pos);
Bethory 0:6ad07c9019fd 63
Bethory 0:6ad07c9019fd 64 /* Trace Enable Register */
Bethory 0:6ad07c9019fd 65 ITM->TER = SWO_STIMULUS_PORT;
Bethory 0:6ad07c9019fd 66 }
Bethory 0:6ad07c9019fd 67 }
Bethory 0:6ad07c9019fd 68
Bethory 0:6ad07c9019fd 69 uint32_t mbed_itm_send(uint32_t port, uint32_t data)
Bethory 0:6ad07c9019fd 70 {
Bethory 0:6ad07c9019fd 71 /* Check if ITM and port is enabled */
Bethory 0:6ad07c9019fd 72 if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && /* ITM enabled */
Bethory 0:6ad07c9019fd 73 ((ITM->TER & (1UL << port) ) != 0UL) ) /* ITM Port enabled */
Bethory 0:6ad07c9019fd 74 {
Bethory 0:6ad07c9019fd 75 /* write data to port */
Bethory 0:6ad07c9019fd 76 ITM->PORT[port].u32 = data;
Bethory 0:6ad07c9019fd 77
Bethory 0:6ad07c9019fd 78 /* Wait until data has been clocked out */
Bethory 0:6ad07c9019fd 79 while (ITM->PORT[port].u32 == 0UL) {
Bethory 0:6ad07c9019fd 80 __NOP();
Bethory 0:6ad07c9019fd 81 }
Bethory 0:6ad07c9019fd 82 }
Bethory 0:6ad07c9019fd 83
Bethory 0:6ad07c9019fd 84 return data;
Bethory 0:6ad07c9019fd 85 }
Bethory 0:6ad07c9019fd 86
Bethory 0:6ad07c9019fd 87 #endif // defined(DEVICE_ITM)