main.cpp

00001 #include "mbed.h"
00002 #include "AUDIO_DISCO_F746NG.h"
00003 #include "SDRAM_DISCO_F746NG.h"
00004 
00005 AUDIO_DISCO_F746NG audio;
00006 // audio IN_OUT buffer is stored in the SDRAM, SDRAM needs to be initialized and FMC enabled
00007 SDRAM_DISCO_F746NG sdram;
00008 
00009 DigitalOut led_green(LED1);
00010 DigitalOut led_red(LED2);
00011 Serial pc(USBTX, USBRX);
00012 
00013 typedef enum
00014 {
00015     BUFFER_OFFSET_NONE = 0,
00016     BUFFER_OFFSET_HALF = 1,
00017     BUFFER_OFFSET_FULL = 2,
00018 }BUFFER_StateTypeDef;
00019 
00020 #define AUDIO_BLOCK_SIZE   ((uint32_t)512)
00021 #define AUDIO_BUFFER_IN     SDRAM_DEVICE_ADDR     /* In SDRAM */
00022 #define AUDIO_BUFFER_OUT   (SDRAM_DEVICE_ADDR + (AUDIO_BLOCK_SIZE * 2)) /* In SDRAM */
00023 __IO uint32_t  audio_rec_buffer_state = BUFFER_OFFSET_NONE;
00024 static uint8_t SetSysClock_PLL_HSE_200MHz();
00025 int main()
00026 {
00027     SetSysClock_PLL_HSE_200MHz();
00028     pc.baud(9600);
00029 
00030     pc.printf("\n\nAUDIO LOOPBACK EXAMPLE START:\n");
00031     led_red = 0;
00032   
00033     pc.printf("\nAUDIO RECORD INIT OK\n");
00034     pc.printf("Microphones sound streamed to headphones\n");
00035     
00036     /* Initialize SDRAM buffers */
00037     memset((uint16_t*)AUDIO_BUFFER_IN, 0, AUDIO_BLOCK_SIZE*2);
00038     memset((uint16_t*)AUDIO_BUFFER_OUT, 0, AUDIO_BLOCK_SIZE*2);
00039     audio_rec_buffer_state = BUFFER_OFFSET_NONE;
00040 
00041     /* Start Recording */
00042     audio.IN_Record((uint16_t*)AUDIO_BUFFER_IN, AUDIO_BLOCK_SIZE);
00043 
00044     /* Start Playback */
00045     audio.OUT_SetAudioFrameSlot(CODEC_AUDIOFRAME_SLOT_02);
00046     audio.OUT_Play((uint16_t*)AUDIO_BUFFER_OUT, AUDIO_BLOCK_SIZE * 2);
00047 
00048   
00049     while (1) {
00050         /* Wait end of half block recording */
00051         while(audio_rec_buffer_state == BUFFER_OFFSET_HALF) {
00052         }
00053         audio_rec_buffer_state = BUFFER_OFFSET_NONE;
00054         /* Copy recorded 1st half block */
00055         memcpy((uint16_t *)(AUDIO_BUFFER_OUT), (uint16_t *)(AUDIO_BUFFER_IN), AUDIO_BLOCK_SIZE);
00056         /* Wait end of one block recording */
00057         while(audio_rec_buffer_state == BUFFER_OFFSET_FULL) {
00058         }
00059         audio_rec_buffer_state = BUFFER_OFFSET_NONE;
00060         /* Copy recorded 2nd half block */
00061         memcpy((uint16_t *)(AUDIO_BUFFER_OUT + (AUDIO_BLOCK_SIZE)), (uint16_t *)(AUDIO_BUFFER_IN + (AUDIO_BLOCK_SIZE)), AUDIO_BLOCK_SIZE);
00062     }
00063 }
00064 /*-------------------------------------------------------------------------------------
00065        Callbacks implementation:
00066            the callbacks API are defined __weak in the stm32746g_discovery_audio.c file
00067            and their implementation should be done in the user code if they are needed.
00068            Below some examples of callback implementations.
00069   -------------------------------------------------------------------------------------*/
00070 /**
00071   * @brief Manages the DMA Transfer complete interrupt.
00072   * @param None
00073   * @retval None
00074   */
00075 void BSP_AUDIO_IN_TransferComplete_CallBack(void)
00076 {
00077   audio_rec_buffer_state = BUFFER_OFFSET_FULL;
00078   return;
00079 }
00080 
00081 /**
00082   * @brief  Manages the DMA Half Transfer complete interrupt.
00083   * @param  None
00084   * @retval None
00085   */
00086 void BSP_AUDIO_IN_HalfTransfer_CallBack(void)
00087 {
00088   audio_rec_buffer_state = BUFFER_OFFSET_HALF;
00089   return;
00090 }
00091 
00092 static uint8_t SetSysClock_PLL_HSE_200MHz()
00093 {
00094   RCC_ClkInitTypeDef RCC_ClkInitStruct;
00095   RCC_OscInitTypeDef RCC_OscInitStruct;
00096 
00097   // Enable power clock  
00098   __PWR_CLK_ENABLE();
00099   
00100   // Enable HSE oscillator and activate PLL with HSE as source
00101   RCC_OscInitStruct.OscillatorType      = RCC_OSCILLATORTYPE_HSE;
00102   RCC_OscInitStruct.HSEState            = RCC_HSE_ON; /* External xtal on OSC_IN/OSC_OUT */
00103 
00104   // Warning: this configuration is for a 25 MHz xtal clock only
00105   RCC_OscInitStruct.PLL.PLLState        = RCC_PLL_ON;
00106   RCC_OscInitStruct.PLL.PLLSource       = RCC_PLLSOURCE_HSE;
00107   RCC_OscInitStruct.PLL.PLLM            = 25;            // VCO input clock = 1 MHz (25 MHz / 25)
00108   RCC_OscInitStruct.PLL.PLLN            = 400;           // VCO output clock = 400 MHz (1 MHz * 400)
00109   RCC_OscInitStruct.PLL.PLLP            = RCC_PLLP_DIV2; // PLLCLK = 200 MHz (400 MHz / 2)
00110   RCC_OscInitStruct.PLL.PLLQ            = 8;             // USB clock = 50 MHz (400 MHz / 8)
00111   
00112   if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
00113   {
00114     return 0; // FAIL
00115   }
00116 
00117   // Activate the OverDrive to reach the 216 MHz Frequency
00118   if (HAL_PWREx_EnableOverDrive() != HAL_OK)
00119   {
00120     return 0; // FAIL
00121   }
00122   
00123   // Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers
00124   RCC_ClkInitStruct.ClockType      = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
00125   RCC_ClkInitStruct.SYSCLKSource   = RCC_SYSCLKSOURCE_PLLCLK; // 200 MHz
00126   RCC_ClkInitStruct.AHBCLKDivider  = RCC_SYSCLK_DIV1;         // 200 MHz
00127   RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;           //  50 MHz
00128   RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;           // 100 MHz
00129   
00130   if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_7) != HAL_OK)
00131   {
00132     return 0; // FAIL
00133   }
00134   HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSE, RCC_MCODIV_4);
00135   return 1; // OK
00136 }