AppNearMe µNFC stack for the NXP PN532 chip License: You can use the stack free of charge to prototype with mbed; if you want to use the stack with your commercial product, get in touch!

Dependents:   IOT_sensor_nfc AppNearMe_MuNFC_PN532_Test p2p_nfc_test NFCMoodLamp ... more

License

You can use the stack free of charge to prototype with mbed; if you want to use the stack with your commercial product, get in touch!

Committer:
AppNearMe
Date:
Wed Nov 07 18:18:52 2012 +0000
Revision:
10:2af578c635cd
Updated library

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AppNearMe 10:2af578c635cd 1 /*
AppNearMe 10:2af578c635cd 2 pn512_registers.h
AppNearMe 10:2af578c635cd 3 Copyright (c) Donatien Garnier 2012
AppNearMe 10:2af578c635cd 4 donatien.garnier@appnearme.com
AppNearMe 10:2af578c635cd 5 http://www.appnearme.com/
AppNearMe 10:2af578c635cd 6 */
AppNearMe 10:2af578c635cd 7
AppNearMe 10:2af578c635cd 8 #ifndef PN512_REGISTERS_H_
AppNearMe 10:2af578c635cd 9 #define PN512_REGISTERS_H_
AppNearMe 10:2af578c635cd 10
AppNearMe 10:2af578c635cd 11 #ifdef __cplusplus
AppNearMe 10:2af578c635cd 12 extern "C" {
AppNearMe 10:2af578c635cd 13 #endif
AppNearMe 10:2af578c635cd 14
AppNearMe 10:2af578c635cd 15 //Page 0 - Command and Status
AppNearMe 10:2af578c635cd 16 #define PN512_REG_PAGE 0x00 //Selects the register page
AppNearMe 10:2af578c635cd 17 #define PN512_REG_COMMAND 0x01 //Starts and stops command execution
AppNearMe 10:2af578c635cd 18 #define PN512_REG_COMIEN 0x02 //Controls bits to enable and disable the passing of Interrupt Requests
AppNearMe 10:2af578c635cd 19 #define PN512_REG_DIVIEN 0x03 //Controls bits to enable and disable the passing of Interrupt Requests
AppNearMe 10:2af578c635cd 20 #define PN512_REG_COMIRQ 0x04 //Contains Interrupt Request bits
AppNearMe 10:2af578c635cd 21 #define PN512_REG_DIVIRQ 0x05 //Contains Interrupt Request bits
AppNearMe 10:2af578c635cd 22 #define PN512_REG_ERROR 0x06 //Error bits showing the error status of the last command executed
AppNearMe 10:2af578c635cd 23 #define PN512_REG_STATUS1 0x07 //Contains status bits for communication
AppNearMe 10:2af578c635cd 24 #define PN512_REG_STATUS2 0x08 //Contains status bits of the receiver and transmitter
AppNearMe 10:2af578c635cd 25 #define PN512_REG_FIFODATA 0x09 //In- and output of 64 byte FIFO-buffer
AppNearMe 10:2af578c635cd 26 #define PN512_REG_FIFOLEVEL 0x0A //Indicates the number of bytes stored in the FIFO
AppNearMe 10:2af578c635cd 27 #define PN512_REG_WATERLEVEL 0x0B //Defines the level for FIFO under- and overflow warning
AppNearMe 10:2af578c635cd 28 #define PN512_REG_CONTROL 0x0C //Contains miscellaneous Control Registers
AppNearMe 10:2af578c635cd 29 #define PN512_REG_BITFRAMING 0x0D //Adjustments for bit oriented frames
AppNearMe 10:2af578c635cd 30 #define PN512_REG_COLL 0x0E //Bit position of the first bit collision detected on the RF-interface
AppNearMe 10:2af578c635cd 31
AppNearMe 10:2af578c635cd 32 //Page 1 - Command
AppNearMe 10:2af578c635cd 33 //#define PN512_REG_PAGE 0x10 //Selects the register page
AppNearMe 10:2af578c635cd 34 #define PN512_REG_MODE 0x11 //Defines general modes for transmitting and receiving
AppNearMe 10:2af578c635cd 35 #define PN512_REG_TXMODE 0x12 //Defines the data rate and framing during transmission
AppNearMe 10:2af578c635cd 36 #define PN512_REG_RXMODE 0x13 //Defines the data rate and framing during receiving
AppNearMe 10:2af578c635cd 37 #define PN512_REG_TXCONTROL 0x14 //Controls the logical behavior of the antenna driver pins TX1 and TX2
AppNearMe 10:2af578c635cd 38 #define PN512_REG_TXAUTO 0x15 //Controls the setting of the antenna drivers
AppNearMe 10:2af578c635cd 39 #define PN512_REG_TXSEL 0x16 //Selects the internal sources for the antenna driver
AppNearMe 10:2af578c635cd 40 #define PN512_REG_RXSEL 0x17 //Selects internal receiver settings
AppNearMe 10:2af578c635cd 41 #define PN512_REG_RXTHRESHOLD 0x18 //Selects thresholds for the bit decoder
AppNearMe 10:2af578c635cd 42 #define PN512_REG_DEMOD 0x19 //Defines demodulator settings
AppNearMe 10:2af578c635cd 43 #define PN512_REG_FELNFC1 0x1A //Defines the length of the valid range for the receive package
AppNearMe 10:2af578c635cd 44 #define PN512_REG_FELNFC2 0x1B //Defines the length of the valid range for the receive package
AppNearMe 10:2af578c635cd 45 #define PN512_REG_MIFNFC 0x1C //Controls the communication in ISO/IEC 14443/MIFARE and NFC target mode at 106 kbit
AppNearMe 10:2af578c635cd 46 #define PN512_REG_MANUALRCV 0x1D //Allows manual fine tuning of the internal receiver
AppNearMe 10:2af578c635cd 47 #define PN512_REG_TYPEB 0x1E //Configure the ISO/IEC 14443 type B
AppNearMe 10:2af578c635cd 48 #define PN512_REG_SERIALSPEED 0x1F //Selects the speed of the serial UART interface
AppNearMe 10:2af578c635cd 49
AppNearMe 10:2af578c635cd 50 //Page 2 - CFG
AppNearMe 10:2af578c635cd 51 //#define PN512_REG_PAGE 0x20 //Selects the register page
AppNearMe 10:2af578c635cd 52 #define PN512_REG_CRCRESULT 0x21 //Shows the actual MSB and LSB values of the CRC calculation
AppNearMe 10:2af578c635cd 53 #define PN512_REG_GSNOFF 0x23 //Selects the conductance of the antenna driver pins TX1 and TX2 for modulation, when the driver is switched off
AppNearMe 10:2af578c635cd 54 #define PN512_REG_MODWIDTH 0x24 //Controls the setting of the ModWidth
AppNearMe 10:2af578c635cd 55 #define PN512_REG_TXBITPHASE 0x25 //Adjust the TX bit phase at 106 kbit
AppNearMe 10:2af578c635cd 56 #define PN512_REG_RFCFG 0x26 //Configures the receiver gain and RF level
AppNearMe 10:2af578c635cd 57 #define PN512_REG_GSNON 0x27 //Selects the conductance of the antenna driver pins TX1 and TX2 for modulation when the drivers are switched on
AppNearMe 10:2af578c635cd 58 #define PN512_REG_CWGSP 0x28 //Selects the conductance of the antenna driver pins TX1 and TX2 for modulation during times of no modulation
AppNearMe 10:2af578c635cd 59 #define PN512_REG_MODGSP 0x29 //Selects the conductance of the antenna driver pins TX1 and TX2 for modulation during modulation
AppNearMe 10:2af578c635cd 60 #define PN512_REG_TMODE_TPRESCALERHIGH 0x2A //Defines settings for the internal timer
AppNearMe 10:2af578c635cd 61 #define PN512_REG_TPRESCALERLOW 0x2B //Defines settings for the internal timer
AppNearMe 10:2af578c635cd 62 #define PN512_REG_TRELOADHIGH 0x2C //Describes the 16-bit timer reload value
AppNearMe 10:2af578c635cd 63 #define PN512_REG_TRELOADLOW 0x2D //Describes the 16-bit timer reload value
AppNearMe 10:2af578c635cd 64 #define PN512_REG_TCOUNTERVALHIGH 0x2E //Shows the 16-bit actual timer value
AppNearMe 10:2af578c635cd 65 #define PN512_REG_TCOUNTERVALLOW 0x2F //Shows the 16-bit actual timer value
AppNearMe 10:2af578c635cd 66
AppNearMe 10:2af578c635cd 67 //Page 3 - TestRegister
AppNearMe 10:2af578c635cd 68 //#define PN512_REG_PAGE 0x30 //Selects the register page
AppNearMe 10:2af578c635cd 69 #define PN512_REG_TESTSEL1 0x31 //General test signal configuration
AppNearMe 10:2af578c635cd 70 #define PN512_REG_TESTSEL2 0x32 //General test signal configuration and PRBS control
AppNearMe 10:2af578c635cd 71 #define PN512_REG_TESTPINEN 0x33 //Enables pin output driver on 8-bit parallel bus (Note: For serial interfaces only)
AppNearMe 10:2af578c635cd 72 #define PN512_REG_TESTPINVALUE 0x34 //Defines the values for the 8-bit parallel bus when it is used as I/O bus
AppNearMe 10:2af578c635cd 73 #define PN512_REG_TESTBUS 0x35 //Shows the status of the internal testbus
AppNearMe 10:2af578c635cd 74 #define PN512_REG_AUTOTEST 0x36 //Controls the digital selftest
AppNearMe 10:2af578c635cd 75 #define PN512_REG_VERSION 0x37 //Shows the version
AppNearMe 10:2af578c635cd 76 #define PN512_REG_ANALOGTEST 0x38 //Controls the pins AUX1 and AUX2
AppNearMe 10:2af578c635cd 77 #define PN512_REG_TESTDAC1 0x39 //Defines the test value for the TestDAC1
AppNearMe 10:2af578c635cd 78 #define PN512_REG_TESTDAC2 0x3A //Defines the test value for the TestDAC2
AppNearMe 10:2af578c635cd 79 #define PN512_REG_TESTADC 0x3B //Shows the actual value of ADC I and Q
AppNearMe 10:2af578c635cd 80
AppNearMe 10:2af578c635cd 81
AppNearMe 10:2af578c635cd 82 void pn512_registers_init(void);
AppNearMe 10:2af578c635cd 83
AppNearMe 10:2af578c635cd 84 void pn512_register_write(uint8_t address, uint8_t data);
AppNearMe 10:2af578c635cd 85 uint8_t pn512_register_read(uint8_t address);
AppNearMe 10:2af578c635cd 86
AppNearMe 10:2af578c635cd 87 #ifdef __cplusplus
AppNearMe 10:2af578c635cd 88 }
AppNearMe 10:2af578c635cd 89 #endif
AppNearMe 10:2af578c635cd 90
AppNearMe 10:2af578c635cd 91 #endif /* PN512_REGISTERS_H_ */