Andy A / DW1000

DW1000 UWB driver based on work of Matthias Grob & Manuel Stalder - ETH Zürich - 2015

Dependencies:   BurstSPI

DW1000Setup.cpp@8:0b408e77b701, 2016-04-18 (annotated)

Committer:
AndyA
Date:
Mon Apr 18 16:58:27 2016 +0000
Revision:
8:0b408e77b701
Child:
9:326bf149c8bc
f

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AndyA 8:0b408e77b701 1
AndyA 8:0b408e77b701 2 #include "DW1000Setup.h"
AndyA 8:0b408e77b701 3
AndyA 8:0b408e77b701 4 DW1000Setup::DW1000Setup(UWBMode modeToUse)
AndyA 8:0b408e77b701 5 {
AndyA 8:0b408e77b701 6 switch (modeToUse) {
AndyA 8:0b408e77b701 7 case user110k: // values from Matthias Grob & Manuel Stalder - ETH Zürich - library
AndyA 8:0b408e77b701 8
AndyA 8:0b408e77b701 9 setChannel(5);
AndyA 8:0b408e77b701 10 setPRF(prf16MHz);
AndyA 8:0b408e77b701 11 setDataRate(kbps110);
AndyA 8:0b408e77b701 12 setSfd(standard);
AndyA 8:0b408e77b701 13 setPreambleLength(pre1024);
AndyA 8:0b408e77b701 14 setPreambleCode(3);
AndyA 8:0b408e77b701 15 setSmartPower(false);
AndyA 8:0b408e77b701 16 // setTxPower(18);
AndyA 8:0b408e77b701 17 break;
AndyA 8:0b408e77b701 18 case tunedDefault: // User Manual "2.5.5 Default Configurations that should be modified" p. 22
AndyA 8:0b408e77b701 19 default:
AndyA 8:0b408e77b701 20 setChannel(5);
AndyA 8:0b408e77b701 21 setPRF(prf16MHz);
AndyA 8:0b408e77b701 22 setDataRate(kbps6800);
AndyA 8:0b408e77b701 23 setSfd(standard);
AndyA 8:0b408e77b701 24 setPreambleLength(pre128);
AndyA 8:0b408e77b701 25 setPreambleCode(3);
AndyA 8:0b408e77b701 26 setSmartPower(false);
AndyA 8:0b408e77b701 27 // setTxPower(18);
AndyA 8:0b408e77b701 28 break;
AndyA 8:0b408e77b701 29 case fastLocationC5:
AndyA 8:0b408e77b701 30 setChannel(5);
AndyA 8:0b408e77b701 31 setPRF(prf64MHz);
AndyA 8:0b408e77b701 32 setDataRate(kbps6800);
AndyA 8:0b408e77b701 33 setSfd(standard);
AndyA 8:0b408e77b701 34 setPreambleLength(pre64);
AndyA 8:0b408e77b701 35 setPreambleCode(10);
AndyA 8:0b408e77b701 36 setSmartPower(true);
AndyA 8:0b408e77b701 37 // setTxPower(18);
AndyA 8:0b408e77b701 38 break;
AndyA 8:0b408e77b701 39 case fastLocationC4:
AndyA 8:0b408e77b701 40 setChannel(4);
AndyA 8:0b408e77b701 41 setPRF(prf64MHz);
AndyA 8:0b408e77b701 42 setDataRate(kbps6800);
AndyA 8:0b408e77b701 43 setSfd(standard);
AndyA 8:0b408e77b701 44 setPreambleLength(pre64);
AndyA 8:0b408e77b701 45 setPreambleCode(18);
AndyA 8:0b408e77b701 46 setSmartPower(true);
AndyA 8:0b408e77b701 47 // setTxPower(18);
AndyA 8:0b408e77b701 48 break;
AndyA 8:0b408e77b701 49 case rangeRateCompromise:
AndyA 8:0b408e77b701 50 setChannel(4);
AndyA 8:0b408e77b701 51 setPRF(prf64MHz);
AndyA 8:0b408e77b701 52 setDataRate(kbps850);
AndyA 8:0b408e77b701 53 setSfd(standard); // for some reason decawave doesn't work.
AndyA 8:0b408e77b701 54 setPreambleLength(pre256);
AndyA 8:0b408e77b701 55 setPreambleCode(18);
AndyA 8:0b408e77b701 56 setSmartPower(false);
AndyA 8:0b408e77b701 57 // setTxPower(18);
AndyA 8:0b408e77b701 58 break;
AndyA 8:0b408e77b701 59 }
AndyA 8:0b408e77b701 60 }
AndyA 8:0b408e77b701 61
AndyA 8:0b408e77b701 62
AndyA 8:0b408e77b701 63 DW1000Setup::DW1000Setup(DW1000Setup *orij) {
AndyA 8:0b408e77b701 64 channel = orij->getChannel();
AndyA 8:0b408e77b701 65 prf = orij->getPRF();
AndyA 8:0b408e77b701 66 dataRate = orij->getDataRate();
AndyA 8:0b408e77b701 67 sfd = orij->getSfd();
AndyA 8:0b408e77b701 68 preamble = orij->getPreambleLength();
AndyA 8:0b408e77b701 69 preambleCode = orij->getPreambleCode();
AndyA 8:0b408e77b701 70 GPIO_Pins = orij->getGPIO(); // 8 = irq, 7 = sync. Others are GPIO
AndyA 8:0b408e77b701 71 enableSmartPower = orij->getSmartPower();
AndyA 8:0b408e77b701 72 memcpy(&powers,orij->getTxPowers(),4*sizeof(float));
AndyA 8:0b408e77b701 73 }
AndyA 8:0b408e77b701 74
AndyA 8:0b408e77b701 75
AndyA 8:0b408e77b701 76 void DW1000Setup::applyConfig(DW1000Setup *orij) {
AndyA 8:0b408e77b701 77 channel = orij->getChannel();
AndyA 8:0b408e77b701 78 prf = orij->getPRF();
AndyA 8:0b408e77b701 79 dataRate = orij->getDataRate();
AndyA 8:0b408e77b701 80 sfd = orij->getSfd();
AndyA 8:0b408e77b701 81 preamble = orij->getPreambleLength();
AndyA 8:0b408e77b701 82 preambleCode = orij->getPreambleCode();
AndyA 8:0b408e77b701 83 GPIO_Pins = orij->getGPIO(); // 8 = irq, 7 = sync. Others are GPIO
AndyA 8:0b408e77b701 84 enableSmartPower = orij->getSmartPower();
AndyA 8:0b408e77b701 85 memcpy(&powers,orij->getTxPowers(),4*sizeof(float));
AndyA 8:0b408e77b701 86 }
AndyA 8:0b408e77b701 87
AndyA 8:0b408e77b701 88
AndyA 8:0b408e77b701 89 bool DW1000Setup::check()
AndyA 8:0b408e77b701 90 {
AndyA 8:0b408e77b701 91 int maxCode = 24;
AndyA 8:0b408e77b701 92 int minCode = 1;
AndyA 8:0b408e77b701 93
AndyA 8:0b408e77b701 94 if (prf == prf16MHz)
AndyA 8:0b408e77b701 95 switch (channel) {
AndyA 8:0b408e77b701 96 case 1:
AndyA 8:0b408e77b701 97 maxCode = 2;
AndyA 8:0b408e77b701 98 minCode = 1;
AndyA 8:0b408e77b701 99 break;
AndyA 8:0b408e77b701 100 case 2:
AndyA 8:0b408e77b701 101 case 5:
AndyA 8:0b408e77b701 102 maxCode = 4;
AndyA 8:0b408e77b701 103 minCode = 3;
AndyA 8:0b408e77b701 104 break;
AndyA 8:0b408e77b701 105 case 3:
AndyA 8:0b408e77b701 106 maxCode = 6;
AndyA 8:0b408e77b701 107 minCode = 5;
AndyA 8:0b408e77b701 108 break;
AndyA 8:0b408e77b701 109 case 4:
AndyA 8:0b408e77b701 110 case 7:
AndyA 8:0b408e77b701 111 maxCode = 8;
AndyA 8:0b408e77b701 112 minCode = 7;
AndyA 8:0b408e77b701 113 break;
AndyA 8:0b408e77b701 114 default:
AndyA 8:0b408e77b701 115 return false; // invalid channel
AndyA 8:0b408e77b701 116 }
AndyA 8:0b408e77b701 117 else
AndyA 8:0b408e77b701 118 switch (channel) {
AndyA 8:0b408e77b701 119 case 1:
AndyA 8:0b408e77b701 120 case 2:
AndyA 8:0b408e77b701 121 case 3:
AndyA 8:0b408e77b701 122 case 5:
AndyA 8:0b408e77b701 123 maxCode = 12;
AndyA 8:0b408e77b701 124 minCode = 9;
AndyA 8:0b408e77b701 125 break;
AndyA 8:0b408e77b701 126 case 4:
AndyA 8:0b408e77b701 127 case 7:
AndyA 8:0b408e77b701 128 maxCode = 20;
AndyA 8:0b408e77b701 129 minCode = 17;
AndyA 8:0b408e77b701 130 break;
AndyA 8:0b408e77b701 131 default:
AndyA 8:0b408e77b701 132 return false; // invalid channel
AndyA 8:0b408e77b701 133 }
AndyA 8:0b408e77b701 134
AndyA 8:0b408e77b701 135 if ((preambleCode > maxCode) || (preambleCode < minCode))
AndyA 8:0b408e77b701 136 return false;
AndyA 8:0b408e77b701 137
AndyA 8:0b408e77b701 138 switch (preamble) {
AndyA 8:0b408e77b701 139 default:
AndyA 8:0b408e77b701 140 return false;
AndyA 8:0b408e77b701 141 case pre64:
AndyA 8:0b408e77b701 142 case pre128:
AndyA 8:0b408e77b701 143 if (dataRate != kbps6800)
AndyA 8:0b408e77b701 144 return false;
AndyA 8:0b408e77b701 145 break;
AndyA 8:0b408e77b701 146 case pre256:
AndyA 8:0b408e77b701 147 if (dataRate == kbps110)
AndyA 8:0b408e77b701 148 return false;
AndyA 8:0b408e77b701 149 break;
AndyA 8:0b408e77b701 150 case pre512:
AndyA 8:0b408e77b701 151 case pre1024:
AndyA 8:0b408e77b701 152 case pre1536:
AndyA 8:0b408e77b701 153 if (dataRate != kbps850)
AndyA 8:0b408e77b701 154 return false;
AndyA 8:0b408e77b701 155 break;
AndyA 8:0b408e77b701 156 case pre2048:
AndyA 8:0b408e77b701 157 if (dataRate == kbps6800)
AndyA 8:0b408e77b701 158 return false;
AndyA 8:0b408e77b701 159 break;
AndyA 8:0b408e77b701 160 case pre4096:
AndyA 8:0b408e77b701 161 if (dataRate != kbps110)
AndyA 8:0b408e77b701 162 return false;
AndyA 8:0b408e77b701 163 break;
AndyA 8:0b408e77b701 164 }
AndyA 8:0b408e77b701 165
AndyA 8:0b408e77b701 166 if (enableSmartPower) {
AndyA 8:0b408e77b701 167 if (dataRate != kbps6800)
AndyA 8:0b408e77b701 168 return false;
AndyA 8:0b408e77b701 169 }
AndyA 8:0b408e77b701 170 return true;
AndyA 8:0b408e77b701 171 }
AndyA 8:0b408e77b701 172
AndyA 8:0b408e77b701 173 void DW1000Setup::getSetupDescription(char *buffer, int len)
AndyA 8:0b408e77b701 174 {
AndyA 8:0b408e77b701 175
AndyA 8:0b408e77b701 176 char dataRateString[10];
AndyA 8:0b408e77b701 177 if (dataRate == kbps6800)
AndyA 8:0b408e77b701 178 strcpy(dataRateString,"6.8 Mbps");
AndyA 8:0b408e77b701 179 else if (dataRate == kbps850)
AndyA 8:0b408e77b701 180 strcpy(dataRateString,"850 kbps");
AndyA 8:0b408e77b701 181 else
AndyA 8:0b408e77b701 182 strcpy(dataRateString,"110 kbps");
AndyA 8:0b408e77b701 183
AndyA 8:0b408e77b701 184 char preambleString[8];
AndyA 8:0b408e77b701 185 switch (preamble) {
AndyA 8:0b408e77b701 186 default:
AndyA 8:0b408e77b701 187 strcpy(preambleString,"error");
AndyA 8:0b408e77b701 188 break;
AndyA 8:0b408e77b701 189 case pre64:
AndyA 8:0b408e77b701 190 strcpy(preambleString,"64");
AndyA 8:0b408e77b701 191 break;
AndyA 8:0b408e77b701 192 case pre128:
AndyA 8:0b408e77b701 193 strcpy(preambleString,"128");
AndyA 8:0b408e77b701 194 break;
AndyA 8:0b408e77b701 195 case pre256:
AndyA 8:0b408e77b701 196 strcpy(preambleString,"256");
AndyA 8:0b408e77b701 197 break;
AndyA 8:0b408e77b701 198 case pre512:
AndyA 8:0b408e77b701 199 strcpy(preambleString,"512");
AndyA 8:0b408e77b701 200 break;
AndyA 8:0b408e77b701 201 case pre1024:
AndyA 8:0b408e77b701 202 strcpy(preambleString,"1024");
AndyA 8:0b408e77b701 203 break;
AndyA 8:0b408e77b701 204 case pre1536:
AndyA 8:0b408e77b701 205 strcpy(preambleString,"1536");
AndyA 8:0b408e77b701 206 break;
AndyA 8:0b408e77b701 207 case pre2048:
AndyA 8:0b408e77b701 208 strcpy(preambleString,"2048");
AndyA 8:0b408e77b701 209 break;
AndyA 8:0b408e77b701 210 case pre4096:
AndyA 8:0b408e77b701 211 strcpy(preambleString,"4096");
AndyA 8:0b408e77b701 212 break;
AndyA 8:0b408e77b701 213 }
AndyA 8:0b408e77b701 214
AndyA 8:0b408e77b701 215 snprintf(buffer,len,"Channel:\t%u\r\nPRF:\t%s\r\nData Rate:\t%s\r\nPreamble length:\t%s\r\nPreamble code:\t%u\r\nSmart power:\t%s\r\nSFD:\t%s\r\n",
AndyA 8:0b408e77b701 216 channel,
AndyA 8:0b408e77b701 217 (prf == prf16MHz)?"16 MHz":"64 MHz",
AndyA 8:0b408e77b701 218 dataRateString,
AndyA 8:0b408e77b701 219 preambleString,
AndyA 8:0b408e77b701 220 preambleCode,
AndyA 8:0b408e77b701 221 enableSmartPower?"Enabled":"Disabled",
AndyA 8:0b408e77b701 222 (sfd == standard)?"Standard":"Non-standard");
AndyA 8:0b408e77b701 223 }
AndyA 8:0b408e77b701 224
AndyA 8:0b408e77b701 225 bool DW1000Setup::setSmartTxPower(float powerdBm,float power500us,float power250us,float power125us) {
AndyA 8:0b408e77b701 226 if ((powerdBm < 0) || (powerdBm > 33.5))
AndyA 8:0b408e77b701 227 return false;
AndyA 8:0b408e77b701 228
AndyA 8:0b408e77b701 229 powers[0] = powerdBm;
AndyA 8:0b408e77b701 230
AndyA 8:0b408e77b701 231 if ((power500us < powerdBm) || (power500us > 33.5))
AndyA 8:0b408e77b701 232 powers[1] = powers[0];
AndyA 8:0b408e77b701 233 else
AndyA 8:0b408e77b701 234 powers[1] = power500us;
AndyA 8:0b408e77b701 235
AndyA 8:0b408e77b701 236 if ((power250us < power500us) || (power250us > 33.5))
AndyA 8:0b408e77b701 237 powers[2] = powers[1];
AndyA 8:0b408e77b701 238 else
AndyA 8:0b408e77b701 239 powers[2] = power250us;
AndyA 8:0b408e77b701 240
AndyA 8:0b408e77b701 241 if ((power125us < power250us) || (power125us > 33.5))
AndyA 8:0b408e77b701 242 powers[3] = powers[2];
AndyA 8:0b408e77b701 243 else
AndyA 8:0b408e77b701 244 powers[3] = power125us;
AndyA 8:0b408e77b701 245
AndyA 8:0b408e77b701 246 return true;
AndyA 8:0b408e77b701 247 }
AndyA 8:0b408e77b701 248
AndyA 8:0b408e77b701 249 bool DW1000Setup::setTxPower(float powerdBm,float powerPRF) {
AndyA 8:0b408e77b701 250 if ((powerdBm < 0) || (powerdBm > 33.5))
AndyA 8:0b408e77b701 251 return false;
AndyA 8:0b408e77b701 252
AndyA 8:0b408e77b701 253 powers[0] = powerdBm;
AndyA 8:0b408e77b701 254 powers[1] = powerdBm;
AndyA 8:0b408e77b701 255 powers[2] = powerdBm;
AndyA 8:0b408e77b701 256 powers[3] = powerdBm;
AndyA 8:0b408e77b701 257
AndyA 8:0b408e77b701 258 if ((powerPRF > 0) && (powerPRF < 33.5))
AndyA 8:0b408e77b701 259 powers[1] = powerPRF;
AndyA 8:0b408e77b701 260
AndyA 8:0b408e77b701 261 return true;
AndyA 8:0b408e77b701 262 }