LIS2DH.h

00001 /*******************************************************************************
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00005  * copy of this software and associated documentation files (the "Software"),
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00014  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
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00024  * Products, Inc. Branding Policy.
00025  *
00026  * The mere transfer of this software does not imply any licenses
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00033 
00034 #ifndef LIS2DH_H_
00035 #define LIS2DH_H_
00036 
00037 #include "mbed.h"
00038 
00039 /**
00040  * Driver for the LIS2DH on the HSP Platform
00041  *
00042  */
00043 void LIS2DHIntHandler(void);
00044 
00045 #define LIS2DH_DATARATE_1HZ    0x1
00046 #define LIS2DH_DATARATE_10HZ   0x2
00047 #define LIS2DH_DATARATE_25HZ   0x3
00048 #define LIS2DH_DATARATE_50HZ   0x4
00049 #define LIS2DH_DATARATE_100HZ  0x5
00050 #define LIS2DH_DATARATE_200HZ  0x6
00051 #define LIS2DH_DATARATE_400HZ  0x7
00052 
00053 #define LIS2DH_FIFOMODE_BYPASS  0x00
00054 #define LIS2DH_FIFOMODE_FIFO    0x01
00055 #define LIS2DH_FIFOMODE_STREAM  0x02
00056 #define LIS2DH_FIFOMODE_TRIGGER 0x03
00057 
00058 #define LIS2DH_ID 0x33
00059 #define LIS2DH_FIFO_SIZE 32
00060 
00061 #define LISD2DH_FIFO_MODE_BYPASS  0
00062 #define LISD2DH_FIFO_MODE_FIFO    1
00063 #define LISD2DH_FIFO_MODE_STREAM  2
00064 #define LISD2DH_FIFO_MODE_TRIGGER 3
00065 
00066 #define LIS2DH_NUMBER_OF_AXIS  3
00067 #define LIS2DH_MAX_DATA_SIZE   (LIS2DH_NUMBER_OF_AXIS * LIS2DH_FIFO_SIZE)
00068 
00069 class LIS2DH {
00070 public:
00071   // LIS2DH registers
00072   typedef enum {  
00073     LIS2DH_READID          = 0x33,    
00074     LIS2DH_STATUS_REG_AUX  = 0x07,
00075     LIS2DH_OUT_TEMP_L      = 0x0C,
00076     LIS2DH_OUT_TEMP_H      = 0x0D,
00077     LIS2DH_INT_COUNTER_REG = 0x0E,
00078     LIS2DH_WHO_AM_I        = 0x0F,
00079     LIS2DH_TEMP_CFG_REG    = 0x1F,
00080     LIS2DH_CTRL_REG1       = 0x20,
00081     LIS2DH_CTRL_REG2       = 0x21,
00082     LIS2DH_CTRL_REG3       = 0x22,
00083     LIS2DH_CTRL_REG4       = 0x23,
00084     LIS2DH_CTRL_REG5       = 0x24,
00085     LIS2DH_CTRL_REG6       = 0x25,
00086     LIS2DH_REFERENCE       = 0x26,
00087     LIS2DH_STATUS_REG2     = 0x27,
00088     LIS2DH_OUT_X_L         = 0x28,
00089     LIS2DH_OUT_X_H         = 0x29,
00090     LIS2DH_OUT_Y_L         = 0x2A,
00091     LIS2DH_OUT_Y_H         = 0x2B,
00092     LIS2DH_OUT_Z_L         = 0x2C,
00093     LIS2DH_OUT_Z_H         = 0x2D,
00094     LIS2DH_FIFO_CTRL_REG   = 0x2E,
00095     LIS2DH_FIFO_SRC_REG    = 0x2F,
00096     LIS2DH_INT1_CFG        = 0x30,
00097     LIS2DH_INT1_SRC        = 0x31,
00098     LIS2DH_INT1_THS        = 0x32,
00099     LIS2DH_INT1_DURATION   = 0x33,
00100     LIS2DH_INT2_CFG        = 0x34,
00101     LIS2DH_INT2_SRC        = 0x35,
00102     LIS2DH_INT2_THS        = 0x36,
00103     LIS2DH_INT2_DURATION   = 0x37,
00104     LIS2DH_CLICK_CFG       = 0x38,
00105     LIS2DH_CLICK_SRC       = 0x39,
00106     LIS2DH_CLICK_THS       = 0x3A,
00107     LIS2DH_TIME_LIMIT      = 0x3B,
00108     LIS2DH_TIME_LATENCY    = 0x3C,
00109     LIS2DH_TIME_WINDOW     = 0x3D,
00110     LIS2DH_Act_THS         = 0x3E,
00111     LIS2DH_Act_DUR         = 0x3F,
00112     }LIS2DH_REG_map_t;
00113 
00114   // @brief STATUS_AUX (07h)
00115   typedef union lis2dh_status_aux_reg {
00116     char all;
00117     struct {
00118       char reserved3 : 2;
00119       char TDA       : 1;
00120       char reserved2 : 3;
00121       char TOR       : 1;
00122       char reserved1 : 1;
00123     } bit;
00124   } lis2dh_status_aux_t;
00125 
00126   // @brief TEMP_CFG_REG (1Fh)
00127   typedef union lis2dh_temp_cfg_reg {
00128     char all;
00129     struct {
00130       char reserved1 : 6;
00131       char TEMP_EN0  : 0;
00132       char TEMP_EN1  : 0;
00133     } bit;
00134   } lis2dh_temp_cfg_t;
00135 
00136   // @brief CTRL_REG1 (20h)
00137   typedef union lis2dh_ctrl_reg1_reg {
00138     char all;
00139     struct {
00140       char Xen  : 1;
00141       char Yen  : 1;
00142       char Zen  : 1;
00143       char LPen : 1;
00144       char ODR  : 5;
00145     } bit;
00146   } lis2dh_ctrl_reg1_t;
00147 
00148   // @brief CTRL_REG1 (21h)
00149   typedef union lis2dh_ctrl_reg2_reg {
00150     char all;
00151     struct {
00152       char HPIS    : 3;
00153       char HPCLICK : 1;
00154       char FDS     : 1;
00155       char HPCF    : 2;
00156       char HPM     : 2;
00157     } bit;
00158   } lis2dh_ctrl_reg2_t;
00159 
00160   // @brief CTRL_REG3 (22h)
00161   typedef union lis2dh_ctrl_reg3_reg {
00162     char all;
00163     struct {
00164       char reserved   : 1;
00165       char I1_OVERRUN : 1;
00166       char I1_WTM     : 1;
00167       char I1_DRDY    : 2;
00168       char I1_AOI     : 1;
00169       char I1_CLICK   : 1;
00170     } bit;
00171   } lis2dh_ctrl_reg3_t;
00172 
00173   // @brief CTRL_REG4 (23h)
00174   typedef union lis2dh_ctrl_reg4_reg {
00175     char all;
00176     struct {
00177       char SIM : 1;
00178       char ST  : 2;
00179       char BDU : 1;
00180     } bit;
00181   } lis2dh_ctrl_reg4_t;
00182 
00183   // @brief CTRL_REG5 (24h)
00184   typedef union lis2dh_ctrl_reg5_reg {
00185     char all;
00186     struct {
00187       char D4D_INT2 : 1;
00188       char LIR_INT2 : 1;
00189       char D4D_INT1 : 1;
00190       char LIR_INT1 : 1;
00191       char reserved : 2;
00192       char FIFO_EN  : 1;
00193       char BOOT     : 1;
00194     } bit;
00195   } lis2dh_ctrl_reg5_t;
00196 
00197   // @brief CTRL_REG6 (25h)
00198   typedef union lis2dh_ctrl_reg6_reg {
00199     char all;
00200     struct {
00201       char reserved1 : 1;
00202       char H_LACTIVE : 1;
00203       char reserved2 : 1;
00204       char P2_ACT    : 1;
00205       char BOOT_I2   : 1;
00206       char I2_INT2   : 2;
00207       char I2_INT1   : 1;
00208       char I2_CLICKen: 1;
00209     } bit;
00210   } lis2dh_ctrl_reg6_t;
00211 
00212   // @brief REFERENCE (26h)
00213   typedef union lis2dh_reference_reg {
00214     char all;
00215   } lis2dh_reference;
00216 
00217   // @brief STATUS_REG (27h)
00218   typedef union lis2dh_status_reg_ {
00219     char all;
00220     struct {
00221       char XDA   : 1;
00222       char YDA   : 1;
00223       char ZDA   : 1;
00224       char ZYXDA : 1;
00225       char XOR   : 1;
00226       char YOR   : 1;
00227       char ZOR   : 1;
00228       char ZYXOR : 1;
00229     } bit;
00230   } lis2dh_status_reg_t;
00231 
00232 
00233   // @brief FIFO_CTRL_REG (2Eh)
00234   typedef union lis2dh_fifo_ctrl_reg_ {
00235     char all;
00236     struct {
00237       char FTH : 5;
00238       char TR  : 1;
00239       char FM  : 2;
00240     } bit;
00241   } lis2dh_fifo_ctrl_reg_t;
00242 
00243   // @brief FIFO_CTRL_REG (2Fh)
00244   typedef union lis2dh_fifo_src_reg_ {
00245     char all;
00246     struct {
00247       char FSS       : 5;
00248       char EMPTY     : 1;
00249       char OVRN_FIFO : 1;
00250       char WTM       : 1;
00251     } bit;
00252   } lis2dh_fifo_src_reg_t;
00253 
00254   // @brief INT1_CFG (30h)
00255   typedef union lis2dh_int1_cfg_reg_ {
00256     char all;
00257     struct {
00258       char XLIE_XDOWNE : 1;
00259       char XHIE_XUPE   : 1;
00260       char YLIE_YDOWNE : 1;
00261       char YHIE_YUPE   : 1;
00262       char ZLIE_ZDOWNE : 1;
00263       char ZHIE_ZUPE   : 1;
00264       char SIXD        : 1;
00265       char AOI         : 1;
00266     } bit;
00267   } lis2dh_int1_cfg_t;
00268 
00269   // @brief INT1_SRC (31h)
00270   typedef union lis2dh_int1_src_reg_ {
00271     char all;
00272     struct {
00273       char XL : 1;
00274       char XH : 1;
00275       char YL : 1;
00276       char YH : 1;
00277       char ZL : 1;
00278       char ZH : 1;
00279       char IA : 1;
00280       char reserved : 1;
00281     } bit;
00282   } lis2dh_int1_src_t;
00283 
00284   // @brief INT2_CFG (34h)
00285   typedef union lis2dh_int2_cfg_reg_ {
00286     char all;
00287     struct {
00288       char XLIE : 1;
00289       char XHIE : 1;
00290       char YLIE : 1;
00291       char YHIE : 1;
00292       char ZLIE : 1;
00293       char ZHIE : 1;
00294       char SIX6 : 1;
00295       char AOI  : 1;
00296     } bit;
00297   } lis2dh_int2_cfg_t;
00298 
00299   // @brief INT2_SRC (35h)
00300   typedef union lis2dh_int2_src_reg_ {
00301     char all;
00302     struct {
00303       char XL       : 1;
00304       char XH       : 1;
00305       char YL       : 1;
00306       char YH       : 1;
00307       char ZL       : 1;
00308       char ZH       : 1;
00309       char IA       : 1;
00310       char reserved : 1;
00311     } bit;
00312   } lis2dh_int2_src_t;
00313 
00314   LIS2DH(PinName sda, PinName scl, int slaveAddress);
00315   LIS2DH(I2C *i2c, int slaveAddress);
00316   ~LIS2DH(void);
00317 
00318   /** 
00319    * @brief Initialize the device
00320    */
00321   void init(void);
00322   /** 
00323    * @brief Interrupt handler
00324    */
00325   void int_handler(void);
00326   /** 
00327    * @brief Get motion data from the device fifo
00328    */
00329   int get_motion_fifo(short *valueX, short *valueY, short *valueZ);
00330   /** 
00331    * @brief Get the last cached motion values (cached from a previous interrupt
00332    * event)
00333    */
00334   int get_motion_cached(int16_t *valueX, int16_t *valueY, int16_t *valueZ);
00335   /** 
00336    * @brief Start Interrupts
00337    */
00338   int initStart(int dataRate, int fifoThreshold);
00339   /** 
00340    * @brief Stop interrupts
00341    */
00342   void stop(void);
00343   /** 
00344    * @brief Read device register
00345    */
00346   int readReg(LIS2DH_REG_map_t reg, char *value);
00347   /** 
00348    * @brief Write device regsiter
00349    */
00350   int writeReg(LIS2DH_REG_map_t reg, char value);
00351   /** 
00352    * @brief Detect if device exists
00353    */
00354   int detect(char *detected);
00355   /** 
00356    * @brief Read the device ID
00357    */
00358   char readId(void);
00359 
00360   static LIS2DH *instance;
00361 private:
00362   /** @brief
00363   */
00364   void configure_interrupt(void);
00365   // I2C pointer
00366   I2C *i2c;
00367   // Is this object the owner of the I2C object
00368   bool isOwner;
00369   // Device slave address
00370   int slaveAddress;
00371 };
00372 
00373 #endif /* LIS2DH_H_ */