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Dependents:   Nucleo_L432KC_Quadrature_Decoder_with_ADC_and_DAC

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targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K82F/drivers/fsl_smartcard_phy_ncn8025.c@161:bd0311f1ad86, 2017-05-27 (annotated)

Committer:
tonnyleonard
Date:
Sat May 27 01:26:18 2017 +0000
Revision:
161:bd0311f1ad86
Parent:
154:37f96f9d4de2 
Testing ADC with shunt

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 154:37f96f9d4de2 1 /*
<> 154:37f96f9d4de2 2 * Copyright (c) 2015, Freescale Semiconductor, Inc.
<> 154:37f96f9d4de2 3 * All rights reserved.
<> 154:37f96f9d4de2 4 *
<> 154:37f96f9d4de2 5 * Redistribution and use in source and binary forms, with or without modification,
<> 154:37f96f9d4de2 6 * are permitted provided that the following conditions are met:
<> 154:37f96f9d4de2 7 *
<> 154:37f96f9d4de2 8 * o Redistributions of source code must retain the above copyright notice, this list
<> 154:37f96f9d4de2 9 * of conditions and the following disclaimer.
<> 154:37f96f9d4de2 10 *
<> 154:37f96f9d4de2 11 * o Redistributions in binary form must reproduce the above copyright notice, this
<> 154:37f96f9d4de2 12 * list of conditions and the following disclaimer in the documentation and/or
<> 154:37f96f9d4de2 13 * other materials provided with the distribution.
<> 154:37f96f9d4de2 14 *
<> 154:37f96f9d4de2 15 * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
<> 154:37f96f9d4de2 16 * contributors may be used to endorse or promote products derived from this
<> 154:37f96f9d4de2 17 * software without specific prior written permission.
<> 154:37f96f9d4de2 18 *
<> 154:37f96f9d4de2 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
<> 154:37f96f9d4de2 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
<> 154:37f96f9d4de2 21 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 154:37f96f9d4de2 22 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
<> 154:37f96f9d4de2 23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
<> 154:37f96f9d4de2 24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
<> 154:37f96f9d4de2 25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
<> 154:37f96f9d4de2 26 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
<> 154:37f96f9d4de2 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
<> 154:37f96f9d4de2 28 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 154:37f96f9d4de2 29 */
<> 154:37f96f9d4de2 30
<> 154:37f96f9d4de2 31 #include "fsl_smartcard_phy_ncn8025.h"
<> 154:37f96f9d4de2 32 #if (defined(FSL_FEATURE_SOC_EMVSIM_COUNT) && (FSL_FEATURE_SOC_EMVSIM_COUNT))
<> 154:37f96f9d4de2 33 #include "fsl_smartcard_emvsim.h"
<> 154:37f96f9d4de2 34 #endif
<> 154:37f96f9d4de2 35
<> 154:37f96f9d4de2 36 /*******************************************************************************
<> 154:37f96f9d4de2 37 * Definitions
<> 154:37f96f9d4de2 38 ******************************************************************************/
<> 154:37f96f9d4de2 39
<> 154:37f96f9d4de2 40 /*******************************************************************************
<> 154:37f96f9d4de2 41 * Prototypes
<> 154:37f96f9d4de2 42 ******************************************************************************/
<> 154:37f96f9d4de2 43 static uint32_t smartcard_phy_ncn8025_InterfaceClockInit(void *base,
<> 154:37f96f9d4de2 44 smartcard_interface_config_t const *config,
<> 154:37f96f9d4de2 45 uint32_t srcClock_Hz);
<> 154:37f96f9d4de2 46 static void smartcard_phy_ncn8025_InterfaceClockDeinit(void *base, smartcard_interface_config_t const *config);
<> 154:37f96f9d4de2 47 #if !(defined(FSL_FEATURE_SOC_EMVSIM_COUNT) && (FSL_FEATURE_SOC_EMVSIM_COUNT))
<> 154:37f96f9d4de2 48 extern void smartcard_uart_TimerStart(uint8_t channel, uint32_t time);
<> 154:37f96f9d4de2 49 #endif
<> 154:37f96f9d4de2 50
<> 154:37f96f9d4de2 51 /*******************************************************************************
<> 154:37f96f9d4de2 52 * Variables
<> 154:37f96f9d4de2 53 ******************************************************************************/
<> 154:37f96f9d4de2 54
<> 154:37f96f9d4de2 55 /*******************************************************************************
<> 154:37f96f9d4de2 56 * Code
<> 154:37f96f9d4de2 57 ******************************************************************************/
<> 154:37f96f9d4de2 58 /*!
<> 154:37f96f9d4de2 59 * @brief This function initializes clock module used for card clock generation
<> 154:37f96f9d4de2 60 */
<> 154:37f96f9d4de2 61 static uint32_t smartcard_phy_ncn8025_InterfaceClockInit(void *base,
<> 154:37f96f9d4de2 62 smartcard_interface_config_t const *config,
<> 154:37f96f9d4de2 63 uint32_t srcClock_Hz)
<> 154:37f96f9d4de2 64 {
<> 154:37f96f9d4de2 65 assert((NULL != config));
<> 154:37f96f9d4de2 66 #if defined(FSL_FEATURE_SOC_EMVSIM_COUNT) && (FSL_FEATURE_SOC_EMVSIM_COUNT)
<> 154:37f96f9d4de2 67 assert(config->clockModule < FSL_FEATURE_SOC_EMVSIM_COUNT);
<> 154:37f96f9d4de2 68
<> 154:37f96f9d4de2 69 uint32_t emvsimClkMhz = 0u;
<> 154:37f96f9d4de2 70 uint8_t emvsimPRSCValue;
<> 154:37f96f9d4de2 71
<> 154:37f96f9d4de2 72 /* Retrieve EMV SIM clock */
<> 154:37f96f9d4de2 73 emvsimClkMhz = srcClock_Hz / 1000000u;
<> 154:37f96f9d4de2 74 /* Calculate MOD value */
<> 154:37f96f9d4de2 75 emvsimPRSCValue = (emvsimClkMhz * 1000u) / (config->smartCardClock / 1000u);
<> 154:37f96f9d4de2 76 /* Set clock prescaler */
<> 154:37f96f9d4de2 77 ((EMVSIM_Type *)base)->CLKCFG =
<> 154:37f96f9d4de2 78 (((EMVSIM_Type *)base)->CLKCFG & ~EMVSIM_CLKCFG_CLK_PRSC_MASK) | EMVSIM_CLKCFG_CLK_PRSC(emvsimPRSCValue);
<> 154:37f96f9d4de2 79 /* Enable smart card clock */
<> 154:37f96f9d4de2 80 ((EMVSIM_Type *)base)->PCSR |= EMVSIM_PCSR_SCEN_MASK;
<> 154:37f96f9d4de2 81
<> 154:37f96f9d4de2 82 return config->smartCardClock;
<> 154:37f96f9d4de2 83 #elif defined(FSL_FEATURE_SOC_FTM_COUNT) && (FSL_FEATURE_SOC_FTM_COUNT)
<> 154:37f96f9d4de2 84 assert(config->clockModule < FSL_FEATURE_SOC_FTM_COUNT);
<> 154:37f96f9d4de2 85
<> 154:37f96f9d4de2 86 uint32_t periph_clk_mhz = 0u;
<> 154:37f96f9d4de2 87 uint16_t ftmModValue;
<> 154:37f96f9d4de2 88 uint32_t ftm_base[] = FTM_BASE_ADDRS;
<> 154:37f96f9d4de2 89 FTM_Type *ftmBase = (FTM_Type *)ftm_base[config->clockModule];
<> 154:37f96f9d4de2 90
<> 154:37f96f9d4de2 91 /* Retrieve FTM system clock */
<> 154:37f96f9d4de2 92 periph_clk_mhz = srcClock_Hz / 1000000u;
<> 154:37f96f9d4de2 93 /* Calculate MOD value */
<> 154:37f96f9d4de2 94 ftmModValue = ((periph_clk_mhz * 1000u / 2u) / (config->smartCardClock / 1000u)) - 1u;
<> 154:37f96f9d4de2 95 /* un-gate FTM peripheral clock */
<> 154:37f96f9d4de2 96 switch (config->clockModule)
<> 154:37f96f9d4de2 97 {
<> 154:37f96f9d4de2 98 case 0u:
<> 154:37f96f9d4de2 99 CLOCK_EnableClock(kCLOCK_Ftm0);
<> 154:37f96f9d4de2 100 break;
<> 154:37f96f9d4de2 101 #if FSL_FEATURE_SOC_FTM_COUNT > 1
<> 154:37f96f9d4de2 102 case 1u:
<> 154:37f96f9d4de2 103 CLOCK_EnableClock(kCLOCK_Ftm1);
<> 154:37f96f9d4de2 104 break;
<> 154:37f96f9d4de2 105 #endif
<> 154:37f96f9d4de2 106 #if FSL_FEATURE_SOC_FTM_COUNT > 2
<> 154:37f96f9d4de2 107 case 2u:
<> 154:37f96f9d4de2 108 CLOCK_EnableClock(kCLOCK_Ftm2);
<> 154:37f96f9d4de2 109 break;
<> 154:37f96f9d4de2 110 #endif
<> 154:37f96f9d4de2 111 #if FSL_FEATURE_SOC_FTM_COUNT > 3
<> 154:37f96f9d4de2 112 case 3u:
<> 154:37f96f9d4de2 113 CLOCK_EnableClock(kCLOCK_Ftm3);
<> 154:37f96f9d4de2 114 break;
<> 154:37f96f9d4de2 115 #endif
<> 154:37f96f9d4de2 116 default:
<> 154:37f96f9d4de2 117 return 0u;
<> 154:37f96f9d4de2 118 }
<> 154:37f96f9d4de2 119 /* Initialize FTM driver */
<> 154:37f96f9d4de2 120 /* Reset FTM prescaler to 'Divide by 1', i.e., to be same clock as peripheral clock
<> 154:37f96f9d4de2 121 * Disable FTM counter, Set counter to operates in Up-counting mode */
<> 154:37f96f9d4de2 122 ftmBase->SC &= ~(FTM_SC_PS_MASK | FTM_SC_CLKS_MASK | FTM_SC_CPWMS_MASK);
<> 154:37f96f9d4de2 123 /* Set initial counter value */
<> 154:37f96f9d4de2 124 ftmBase->CNTIN = 0u;
<> 154:37f96f9d4de2 125 /* Set MOD value */
<> 154:37f96f9d4de2 126 ftmBase->MOD = ftmModValue;
<> 154:37f96f9d4de2 127 /* Configure mode to output compare, toggle output on match */
<> 154:37f96f9d4de2 128 ftmBase->CONTROLS[config->clockModuleChannel].CnSC = (FTM_CnSC_ELSA_MASK | FTM_CnSC_MSA_MASK);
<> 154:37f96f9d4de2 129 /* Configure a match value to toggle output at */
<> 154:37f96f9d4de2 130 ftmBase->CONTROLS[config->clockModuleChannel].CnV = 1;
<> 154:37f96f9d4de2 131 /* Set clock source to start the counter : System clock */
<> 154:37f96f9d4de2 132 ftmBase->SC = FTM_SC_CLKS(1);
<> 154:37f96f9d4de2 133 /* Re-calculate the actually configured smartcard clock and return to caller */
<> 154:37f96f9d4de2 134 return (uint32_t)(((periph_clk_mhz * 1000u / 2u) / (ftmBase->MOD + 1u)) * 1000u);
<> 154:37f96f9d4de2 135 #else
<> 154:37f96f9d4de2 136 return 0u;
<> 154:37f96f9d4de2 137 #endif
<> 154:37f96f9d4de2 138 }
<> 154:37f96f9d4de2 139
<> 154:37f96f9d4de2 140 /*!
<> 154:37f96f9d4de2 141 * @brief This function de-initialize clock module used for card clock generation
<> 154:37f96f9d4de2 142 */
<> 154:37f96f9d4de2 143 static void smartcard_phy_ncn8025_InterfaceClockDeinit(void *base, smartcard_interface_config_t const *config)
<> 154:37f96f9d4de2 144 {
<> 154:37f96f9d4de2 145 #if defined(FSL_FEATURE_SOC_EMVSIM_COUNT) && (FSL_FEATURE_SOC_EMVSIM_COUNT)
<> 154:37f96f9d4de2 146 assert((config->clockModule < FSL_FEATURE_SOC_EMVSIM_COUNT) && (NULL != base));
<> 154:37f96f9d4de2 147
<> 154:37f96f9d4de2 148 /* Disable smart card clock */
<> 154:37f96f9d4de2 149 ((EMVSIM_Type *)base)->PCSR &= ~EMVSIM_PCSR_SCEN_MASK;
<> 154:37f96f9d4de2 150 #elif defined(FSL_FEATURE_SOC_FTM_COUNT) && (FSL_FEATURE_SOC_FTM_COUNT)
<> 154:37f96f9d4de2 151 assert(config->clockModule < FSL_FEATURE_SOC_FTM_COUNT);
<> 154:37f96f9d4de2 152 /* gate FTM peripheral clock */
<> 154:37f96f9d4de2 153 switch (config->clockModule)
<> 154:37f96f9d4de2 154 {
<> 154:37f96f9d4de2 155 case 0u:
<> 154:37f96f9d4de2 156 CLOCK_DisableClock(kCLOCK_Ftm0);
<> 154:37f96f9d4de2 157 break;
<> 154:37f96f9d4de2 158 #if FSL_FEATURE_SOC_FTM_COUNT > 1
<> 154:37f96f9d4de2 159 case 1u:
<> 154:37f96f9d4de2 160 CLOCK_DisableClock(kCLOCK_Ftm1);
<> 154:37f96f9d4de2 161 break;
<> 154:37f96f9d4de2 162 #endif
<> 154:37f96f9d4de2 163 #if FSL_FEATURE_SOC_FTM_COUNT > 2
<> 154:37f96f9d4de2 164 case 2u:
<> 154:37f96f9d4de2 165 CLOCK_DisableClock(kCLOCK_Ftm2);
<> 154:37f96f9d4de2 166 break;
<> 154:37f96f9d4de2 167 #endif
<> 154:37f96f9d4de2 168 #if FSL_FEATURE_SOC_FTM_COUNT > 3
<> 154:37f96f9d4de2 169 case 3u:
<> 154:37f96f9d4de2 170 CLOCK_DisableClock(kCLOCK_Ftm3);
<> 154:37f96f9d4de2 171 break;
<> 154:37f96f9d4de2 172 #endif
<> 154:37f96f9d4de2 173 default:
<> 154:37f96f9d4de2 174 break;
<> 154:37f96f9d4de2 175 }
<> 154:37f96f9d4de2 176 #endif
<> 154:37f96f9d4de2 177 }
<> 154:37f96f9d4de2 178
<> 154:37f96f9d4de2 179 void SMARTCARD_PHY_NCN8025_GetDefaultConfig(smartcard_interface_config_t *config)
<> 154:37f96f9d4de2 180 {
<> 154:37f96f9d4de2 181 assert((NULL != config));
<> 154:37f96f9d4de2 182
<> 154:37f96f9d4de2 183 config->clockToResetDelay = SMARTCARD_INIT_DELAY_CLOCK_CYCLES;
<> 154:37f96f9d4de2 184 config->vcc = kSMARTCARD_VoltageClassB3_3V;
<> 154:37f96f9d4de2 185 }
<> 154:37f96f9d4de2 186
<> 154:37f96f9d4de2 187 status_t SMARTCARD_PHY_NCN8025_Init(void *base, smartcard_interface_config_t const *config, uint32_t srcClock_Hz)
<> 154:37f96f9d4de2 188 {
<> 154:37f96f9d4de2 189 if ((NULL == config) || (0u == srcClock_Hz))
<> 154:37f96f9d4de2 190 {
<> 154:37f96f9d4de2 191 return kStatus_SMARTCARD_InvalidInput;
<> 154:37f96f9d4de2 192 }
<> 154:37f96f9d4de2 193
<> 154:37f96f9d4de2 194 /* Configure GPIO(CMDVCC, RST, INT, VSEL0, VSEL1) pins */
<> 154:37f96f9d4de2 195 uint32_t gpio_base[] = GPIO_BASE_ADDRS;
<> 154:37f96f9d4de2 196 IRQn_Type port_irq[] = PORT_IRQS;
<> 154:37f96f9d4de2 197 /* Set VSEL pins to low level context */
<> 154:37f96f9d4de2 198 ((GPIO_Type *)gpio_base[config->vsel0Port])->PCOR |= (1u << config->vsel0Pin);
<> 154:37f96f9d4de2 199 ((GPIO_Type *)gpio_base[config->vsel1Port])->PCOR |= (1u << config->vsel1Pin);
<> 154:37f96f9d4de2 200 /* Set VSEL pins to output pins */
<> 154:37f96f9d4de2 201 ((GPIO_Type *)gpio_base[config->vsel0Port])->PDDR |= (1u << config->vsel0Pin);
<> 154:37f96f9d4de2 202 ((GPIO_Type *)gpio_base[config->vsel1Port])->PDDR |= (1u << config->vsel1Pin);
<> 154:37f96f9d4de2 203 #if defined(FSL_FEATURE_SOC_EMVSIM_COUNT) && (FSL_FEATURE_SOC_EMVSIM_COUNT)
<> 154:37f96f9d4de2 204 /* Set CMD_VCC pin to logic level '1', to allow card detection interrupt from NCN8025 */
<> 154:37f96f9d4de2 205 ((EMVSIM_Type *)base)->PCSR |= EMVSIM_PCSR_SVCC_EN_MASK;
<> 154:37f96f9d4de2 206 ((EMVSIM_Type *)base)->PCSR &= ~EMVSIM_PCSR_VCCENP_MASK;
<> 154:37f96f9d4de2 207 #else
<> 154:37f96f9d4de2 208 /* Set RST pin to zero context and CMDVCC to high context */
<> 154:37f96f9d4de2 209 ((GPIO_Type *)gpio_base[config->resetPort])->PCOR |= (1u << config->resetPin);
<> 154:37f96f9d4de2 210 ((GPIO_Type *)gpio_base[config->controlPort])->PSOR |= (1u << config->controlPin);
<> 154:37f96f9d4de2 211 /* Set CMDVCC, RESET pins as output pins */
<> 154:37f96f9d4de2 212 ((GPIO_Type *)gpio_base[config->resetPort])->PDDR |= (1u << config->resetPin);
<> 154:37f96f9d4de2 213 ((GPIO_Type *)gpio_base[config->controlPort])->PDDR |= (1u << config->controlPin);
<> 154:37f96f9d4de2 214
<> 154:37f96f9d4de2 215 #endif
<> 154:37f96f9d4de2 216 /* Initialize INT pin */
<> 154:37f96f9d4de2 217 ((GPIO_Type *)gpio_base[config->irqPort])->PDDR &= ~(1u << config->irqPin);
<> 154:37f96f9d4de2 218 /* Enable Port IRQ for smartcard presence detection */
<> 154:37f96f9d4de2 219 NVIC_EnableIRQ(port_irq[config->irqPort]);
<> 154:37f96f9d4de2 220 /* Smartcard clock initialization */
<> 154:37f96f9d4de2 221 if (config->smartCardClock != smartcard_phy_ncn8025_InterfaceClockInit(base, config, srcClock_Hz))
<> 154:37f96f9d4de2 222 {
<> 154:37f96f9d4de2 223 return kStatus_SMARTCARD_OtherError;
<> 154:37f96f9d4de2 224 }
<> 154:37f96f9d4de2 225
<> 154:37f96f9d4de2 226 return kStatus_SMARTCARD_Success;
<> 154:37f96f9d4de2 227 }
<> 154:37f96f9d4de2 228
<> 154:37f96f9d4de2 229 void SMARTCARD_PHY_NCN8025_Deinit(void *base, smartcard_interface_config_t *config)
<> 154:37f96f9d4de2 230 {
<> 154:37f96f9d4de2 231 assert((NULL != config));
<> 154:37f96f9d4de2 232
<> 154:37f96f9d4de2 233 IRQn_Type port_irq[] = PORT_IRQS;
<> 154:37f96f9d4de2 234 NVIC_DisableIRQ(port_irq[config->irqPort]);
<> 154:37f96f9d4de2 235 /* Stop smartcard clock */
<> 154:37f96f9d4de2 236 smartcard_phy_ncn8025_InterfaceClockDeinit(base, config);
<> 154:37f96f9d4de2 237 }
<> 154:37f96f9d4de2 238
<> 154:37f96f9d4de2 239 status_t SMARTCARD_PHY_NCN8025_Activate(void *base, smartcard_context_t *context, smartcard_reset_type_t resetType)
<> 154:37f96f9d4de2 240 {
<> 154:37f96f9d4de2 241 if ((NULL == context) || (NULL == context->timeDelay))
<> 154:37f96f9d4de2 242 {
<> 154:37f96f9d4de2 243 return kStatus_SMARTCARD_InvalidInput;
<> 154:37f96f9d4de2 244 }
<> 154:37f96f9d4de2 245
<> 154:37f96f9d4de2 246 context->timersState.initCharTimerExpired = false;
<> 154:37f96f9d4de2 247 context->resetType = resetType;
<> 154:37f96f9d4de2 248 uint32_t gpio_base[] = GPIO_BASE_ADDRS;
<> 154:37f96f9d4de2 249 #if defined(FSL_FEATURE_SOC_EMVSIM_COUNT) && (FSL_FEATURE_SOC_EMVSIM_COUNT)
<> 154:37f96f9d4de2 250 EMVSIM_Type *emvsimBase = (EMVSIM_Type *)base;
<> 154:37f96f9d4de2 251 #endif
<> 154:37f96f9d4de2 252
<> 154:37f96f9d4de2 253 if (resetType == kSMARTCARD_ColdReset)
<> 154:37f96f9d4de2 254 { /* Ensure that RST is LOW and CMD is high here so that PHY goes in normal mode */
<> 154:37f96f9d4de2 255 #if defined(FSL_FEATURE_SOC_EMVSIM_COUNT) && (FSL_FEATURE_SOC_EMVSIM_COUNT)
<> 154:37f96f9d4de2 256 emvsimBase->PCSR =
<> 154:37f96f9d4de2 257 (emvsimBase->PCSR & ~(EMVSIM_PCSR_VCCENP_MASK | EMVSIM_PCSR_SRST_MASK)) | EMVSIM_PCSR_SVCC_EN_MASK;
<> 154:37f96f9d4de2 258 #else
<> 154:37f96f9d4de2 259 ((GPIO_Type *)gpio_base[context->interfaceConfig.resetPort])->PCOR |= (1u << context->interfaceConfig.resetPin);
<> 154:37f96f9d4de2 260 ((GPIO_Type *)gpio_base[context->interfaceConfig.controlPort])->PSOR |=
<> 154:37f96f9d4de2 261 (1u << context->interfaceConfig.controlPin);
<> 154:37f96f9d4de2 262 #endif
<> 154:37f96f9d4de2 263 /* vcc = 5v: vsel0=0,vsel1= 1
<> 154:37f96f9d4de2 264 * vcc = 3.3v: vsel0=x,vsel1= 0
<> 154:37f96f9d4de2 265 * vcc = 1.8v: vsel0=1,vsel1= 1 */
<> 154:37f96f9d4de2 266 /* Setting of VSEL1 pin */
<> 154:37f96f9d4de2 267 if ((kSMARTCARD_VoltageClassA5_0V == context->interfaceConfig.vcc) ||
<> 154:37f96f9d4de2 268 (kSMARTCARD_VoltageClassC1_8V == context->interfaceConfig.vcc))
<> 154:37f96f9d4de2 269 {
<> 154:37f96f9d4de2 270 ((GPIO_Type *)gpio_base[context->interfaceConfig.vsel1Port])->PSOR |=
<> 154:37f96f9d4de2 271 (1u << context->interfaceConfig.vsel1Pin);
<> 154:37f96f9d4de2 272 }
<> 154:37f96f9d4de2 273 else
<> 154:37f96f9d4de2 274 {
<> 154:37f96f9d4de2 275 ((GPIO_Type *)gpio_base[context->interfaceConfig.vsel1Port])->PCOR |=
<> 154:37f96f9d4de2 276 (1u << context->interfaceConfig.vsel1Pin);
<> 154:37f96f9d4de2 277 }
<> 154:37f96f9d4de2 278 /* Setting of VSEL0 pin */
<> 154:37f96f9d4de2 279 if (kSMARTCARD_VoltageClassC1_8V == context->interfaceConfig.vcc)
<> 154:37f96f9d4de2 280 {
<> 154:37f96f9d4de2 281 ((GPIO_Type *)gpio_base[context->interfaceConfig.vsel0Port])->PSOR |=
<> 154:37f96f9d4de2 282 (1u << context->interfaceConfig.vsel0Pin);
<> 154:37f96f9d4de2 283 }
<> 154:37f96f9d4de2 284 else
<> 154:37f96f9d4de2 285 {
<> 154:37f96f9d4de2 286 ((GPIO_Type *)gpio_base[context->interfaceConfig.vsel0Port])->PCOR |=
<> 154:37f96f9d4de2 287 (1u << context->interfaceConfig.vsel0Pin);
<> 154:37f96f9d4de2 288 }
<> 154:37f96f9d4de2 289 /* Set PHY to start Activation sequence by pulling CMDVCC low */
<> 154:37f96f9d4de2 290 #if defined(FSL_FEATURE_SOC_EMVSIM_COUNT) && (FSL_FEATURE_SOC_EMVSIM_COUNT)
<> 154:37f96f9d4de2 291 emvsimBase->PCSR |= EMVSIM_PCSR_VCCENP_MASK;
<> 154:37f96f9d4de2 292 #else
<> 154:37f96f9d4de2 293 ((GPIO_Type *)gpio_base[context->interfaceConfig.controlPort])->PCOR |=
<> 154:37f96f9d4de2 294 (1u << context->interfaceConfig.controlPin);
<> 154:37f96f9d4de2 295 #endif
<> 154:37f96f9d4de2 296 }
<> 154:37f96f9d4de2 297 else if (resetType == kSMARTCARD_WarmReset)
<> 154:37f96f9d4de2 298 { /* Ensure that card is already active */
<> 154:37f96f9d4de2 299 if (!context->cardParams.active)
<> 154:37f96f9d4de2 300 { /* Card is not active;hence return */
<> 154:37f96f9d4de2 301 return kStatus_SMARTCARD_CardNotActivated;
<> 154:37f96f9d4de2 302 }
<> 154:37f96f9d4de2 303 /* Pull RESET low to start warm Activation sequence */
<> 154:37f96f9d4de2 304 #if defined(FSL_FEATURE_SOC_EMVSIM_COUNT) && (FSL_FEATURE_SOC_EMVSIM_COUNT)
<> 154:37f96f9d4de2 305 emvsimBase->PCSR &= ~EMVSIM_PCSR_SRST_MASK;
<> 154:37f96f9d4de2 306 #else
<> 154:37f96f9d4de2 307 ((GPIO_Type *)gpio_base[context->interfaceConfig.resetPort])->PCOR |= (1u << context->interfaceConfig.resetPin);
<> 154:37f96f9d4de2 308 #endif
<> 154:37f96f9d4de2 309 }
<> 154:37f96f9d4de2 310 else
<> 154:37f96f9d4de2 311 {
<> 154:37f96f9d4de2 312 return kStatus_SMARTCARD_InvalidInput;
<> 154:37f96f9d4de2 313 }
<> 154:37f96f9d4de2 314 /* Wait for sometime as specified by EMV before pulling RST High
<> 154:37f96f9d4de2 315 * As per EMV delay <= 42000 Clock cycles
<> 154:37f96f9d4de2 316 * as per PHY delay >= 1us
<> 154:37f96f9d4de2 317 */
<> 154:37f96f9d4de2 318 uint32_t temp = (uint32_t)((float)(1 + (float)(((float)(1000u * context->interfaceConfig.clockToResetDelay)) /
<> 154:37f96f9d4de2 319 ((float)context->interfaceConfig.smartCardClock))));
<> 154:37f96f9d4de2 320 context->timeDelay(temp);
<> 154:37f96f9d4de2 321
<> 154:37f96f9d4de2 322 /* Pull reset HIGH Now to mark the end of Activation sequence */
<> 154:37f96f9d4de2 323 #if defined(FSL_FEATURE_SOC_EMVSIM_COUNT) && (FSL_FEATURE_SOC_EMVSIM_COUNT)
<> 154:37f96f9d4de2 324 emvsimBase->PCSR |= EMVSIM_PCSR_SRST_MASK;
<> 154:37f96f9d4de2 325 #else
<> 154:37f96f9d4de2 326 ((GPIO_Type *)gpio_base[context->interfaceConfig.resetPort])->PSOR |= (1u << context->interfaceConfig.resetPin);
<> 154:37f96f9d4de2 327 #endif
<> 154:37f96f9d4de2 328
<> 154:37f96f9d4de2 329 #if defined(FSL_FEATURE_SOC_EMVSIM_COUNT) && (FSL_FEATURE_SOC_EMVSIM_COUNT)
<> 154:37f96f9d4de2 330 /* Down counter trigger, and clear any pending counter status flag */
<> 154:37f96f9d4de2 331 emvsimBase->TX_STATUS = EMVSIM_TX_STATUS_GPCNT1_TO_MASK | EMVSIM_TX_STATUS_GPCNT0_TO_MASK;
<> 154:37f96f9d4de2 332 /* Set counter value for TS detection delay */
<> 154:37f96f9d4de2 333 emvsimBase->GPCNT0_VAL = (SMARTCARD_INIT_DELAY_CLOCK_CYCLES + SMARTCARD_INIT_DELAY_CLOCK_CYCLES_ADJUSTMENT);
<> 154:37f96f9d4de2 334 /* Pre-load counter value for ATR duration delay */
<> 154:37f96f9d4de2 335 emvsimBase->GPCNT1_VAL = (SMARTCARD_EMV_ATR_DURATION_ETU + SMARTCARD_ATR_DURATION_ADJUSTMENT);
<> 154:37f96f9d4de2 336 /* Select the clock for GPCNT for both TS detection and early start of ATR duration counter */
<> 154:37f96f9d4de2 337 emvsimBase->CLKCFG =
<> 154:37f96f9d4de2 338 (emvsimBase->CLKCFG & ~EMVSIM_CLKCFG_GPCNT0_CLK_SEL_MASK) | EMVSIM_CLKCFG_GPCNT0_CLK_SEL(kEMVSIM_GPCCardClock);
<> 154:37f96f9d4de2 339 /* Set receiver to ICM mode, Flush RX FIFO */
<> 154:37f96f9d4de2 340 emvsimBase->CTRL |= (EMVSIM_CTRL_ICM_MASK | EMVSIM_CTRL_FLSH_RX_MASK);
<> 154:37f96f9d4de2 341 /* Enable counter interrupt for TS detection */
<> 154:37f96f9d4de2 342 emvsimBase->INT_MASK &= ~EMVSIM_INT_MASK_GPCNT0_IM_MASK;
<> 154:37f96f9d4de2 343 /* Clear any pending status flags */
<> 154:37f96f9d4de2 344 emvsimBase->RX_STATUS = 0xFFFFFFFFu;
<> 154:37f96f9d4de2 345 /* Enable receiver */
<> 154:37f96f9d4de2 346 emvsimBase->CTRL |= EMVSIM_CTRL_RCV_EN_MASK;
<> 154:37f96f9d4de2 347 #else
<> 154:37f96f9d4de2 348 /* Enable external timer for TS detection time-out */
<> 154:37f96f9d4de2 349 smartcard_uart_TimerStart(context->interfaceConfig.tsTimerId,
<> 154:37f96f9d4de2 350 (SMARTCARD_INIT_DELAY_CLOCK_CYCLES + SMARTCARD_INIT_DELAY_CLOCK_CYCLES_ADJUSTMENT) *
<> 154:37f96f9d4de2 351 (CLOCK_GetFreq(kCLOCK_CoreSysClk) / context->interfaceConfig.smartCardClock));
<> 154:37f96f9d4de2 352 #endif
<> 154:37f96f9d4de2 353 /* Here the card was activated */
<> 154:37f96f9d4de2 354 context->cardParams.active = true;
<> 154:37f96f9d4de2 355
<> 154:37f96f9d4de2 356 return kStatus_SMARTCARD_Success;
<> 154:37f96f9d4de2 357 }
<> 154:37f96f9d4de2 358
<> 154:37f96f9d4de2 359 status_t SMARTCARD_PHY_NCN8025_Deactivate(void *base, smartcard_context_t *context)
<> 154:37f96f9d4de2 360 {
<> 154:37f96f9d4de2 361 if ((NULL == context))
<> 154:37f96f9d4de2 362 {
<> 154:37f96f9d4de2 363 return kStatus_SMARTCARD_InvalidInput;
<> 154:37f96f9d4de2 364 }
<> 154:37f96f9d4de2 365
<> 154:37f96f9d4de2 366 #if !(defined(FSL_FEATURE_SOC_EMVSIM_COUNT) && (FSL_FEATURE_SOC_EMVSIM_COUNT))
<> 154:37f96f9d4de2 367 uint32_t gpio_base[] = GPIO_BASE_ADDRS;
<> 154:37f96f9d4de2 368 #endif
<> 154:37f96f9d4de2 369 /* Tell PHY to start Deactivation sequence by pulling CMD high and reset low */
<> 154:37f96f9d4de2 370 #if defined(FSL_FEATURE_SOC_EMVSIM_COUNT) && (FSL_FEATURE_SOC_EMVSIM_COUNT)
<> 154:37f96f9d4de2 371 ((EMVSIM_Type *)base)->PCSR |= EMVSIM_PCSR_SVCC_EN_MASK;
<> 154:37f96f9d4de2 372 ((EMVSIM_Type *)base)->PCSR &= ~EMVSIM_PCSR_VCCENP_MASK;
<> 154:37f96f9d4de2 373 ((EMVSIM_Type *)base)->PCSR &= ~EMVSIM_PCSR_SRST_MASK;
<> 154:37f96f9d4de2 374 #else
<> 154:37f96f9d4de2 375 ((GPIO_Type *)gpio_base[context->interfaceConfig.controlPort])->PSOR |= (1u << context->interfaceConfig.controlPin);
<> 154:37f96f9d4de2 376 ((GPIO_Type *)gpio_base[context->interfaceConfig.resetPort])->PCOR |= (1u << context->interfaceConfig.resetPin);
<> 154:37f96f9d4de2 377 #endif
<> 154:37f96f9d4de2 378 /* According EMV 4.3 specification deactivation sequence should be done within 100ms.
<> 154:37f96f9d4de2 379 * The period is measured from the time that RST is set to state L to the time that Vcc
<> 154:37f96f9d4de2 380 * reaches 0.4 V or less.
<> 154:37f96f9d4de2 381 */
<> 154:37f96f9d4de2 382 context->timeDelay(100);
<> 154:37f96f9d4de2 383 /* Here the card was deactivated */
<> 154:37f96f9d4de2 384 context->cardParams.active = false;
<> 154:37f96f9d4de2 385
<> 154:37f96f9d4de2 386 return kStatus_SMARTCARD_Success;
<> 154:37f96f9d4de2 387 }
<> 154:37f96f9d4de2 388
<> 154:37f96f9d4de2 389 status_t SMARTCARD_PHY_NCN8025_Control(void *base,
<> 154:37f96f9d4de2 390 smartcard_context_t *context,
<> 154:37f96f9d4de2 391 smartcard_interface_control_t control,
<> 154:37f96f9d4de2 392 uint32_t param)
<> 154:37f96f9d4de2 393 {
<> 154:37f96f9d4de2 394 if ((NULL == context))
<> 154:37f96f9d4de2 395 {
<> 154:37f96f9d4de2 396 return kStatus_SMARTCARD_InvalidInput;
<> 154:37f96f9d4de2 397 }
<> 154:37f96f9d4de2 398
<> 154:37f96f9d4de2 399 #if !(defined(FSL_FEATURE_SOC_EMVSIM_COUNT) && (FSL_FEATURE_SOC_EMVSIM_COUNT))
<> 154:37f96f9d4de2 400 uint32_t gpio_base[] = GPIO_BASE_ADDRS;
<> 154:37f96f9d4de2 401 #endif
<> 154:37f96f9d4de2 402
<> 154:37f96f9d4de2 403 switch (control)
<> 154:37f96f9d4de2 404 {
<> 154:37f96f9d4de2 405 case kSMARTCARD_InterfaceSetVcc:
<> 154:37f96f9d4de2 406 /* Set card parameter to VCC level set by caller */
<> 154:37f96f9d4de2 407 context->interfaceConfig.vcc = (smartcard_card_voltage_class_t)param;
<> 154:37f96f9d4de2 408 break;
<> 154:37f96f9d4de2 409 case kSMARTCARD_InterfaceSetClockToResetDelay:
<> 154:37f96f9d4de2 410 /* Set interface clock to Reset delay set by caller */
<> 154:37f96f9d4de2 411 context->interfaceConfig.clockToResetDelay = param;
<> 154:37f96f9d4de2 412 break;
<> 154:37f96f9d4de2 413 case kSMARTCARD_InterfaceReadStatus:
<> 154:37f96f9d4de2 414 #if defined(FSL_FEATURE_SOC_EMVSIM_COUNT) && (FSL_FEATURE_SOC_EMVSIM_COUNT)
<> 154:37f96f9d4de2 415 /* Expecting active low present detect */
<> 154:37f96f9d4de2 416 context->cardParams.present =
<> 154:37f96f9d4de2 417 ((emvsim_presence_detect_status_t)((((EMVSIM_Type *)base)->PCSR & EMVSIM_PCSR_SPDP_MASK) >>
<> 154:37f96f9d4de2 418 EMVSIM_PCSR_SPDP_SHIFT) == kEMVSIM_DetectPinIsLow);
<> 154:37f96f9d4de2 419 #else
<> 154:37f96f9d4de2 420 if (((GPIO_Type *)gpio_base[context->interfaceConfig.controlPort])->PDIR &
<> 154:37f96f9d4de2 421 (1u << context->interfaceConfig.controlPin))
<> 154:37f96f9d4de2 422 {
<> 154:37f96f9d4de2 423 if (((GPIO_Type *)gpio_base[context->interfaceConfig.irqPort])->PDIR &
<> 154:37f96f9d4de2 424 (1u << context->interfaceConfig.irqPin))
<> 154:37f96f9d4de2 425 { /* CMDVCC is high => session is inactive and INT is high => card is present */
<> 154:37f96f9d4de2 426 context->cardParams.present = true;
<> 154:37f96f9d4de2 427 context->cardParams.active = false;
<> 154:37f96f9d4de2 428 context->cardParams.faulty = false;
<> 154:37f96f9d4de2 429 context->cardParams.status = SMARTCARD_NCN8025_STATUS_PRES;
<> 154:37f96f9d4de2 430 }
<> 154:37f96f9d4de2 431 else
<> 154:37f96f9d4de2 432 { /* CMDVCC is high => session is inactive and INT is low => card is absent */
<> 154:37f96f9d4de2 433 context->cardParams.present = false;
<> 154:37f96f9d4de2 434 context->cardParams.active = false;
<> 154:37f96f9d4de2 435 context->cardParams.faulty = false;
<> 154:37f96f9d4de2 436 context->cardParams.status = 0u;
<> 154:37f96f9d4de2 437 }
<> 154:37f96f9d4de2 438 }
<> 154:37f96f9d4de2 439 else
<> 154:37f96f9d4de2 440 {
<> 154:37f96f9d4de2 441 if (((GPIO_Type *)gpio_base[context->interfaceConfig.irqPort])->PDIR &
<> 154:37f96f9d4de2 442 (1u << context->interfaceConfig.irqPin))
<> 154:37f96f9d4de2 443 { /* CMDVCC is low => session is active and INT is high => card is present */
<> 154:37f96f9d4de2 444 context->cardParams.present = true;
<> 154:37f96f9d4de2 445 context->cardParams.active = true;
<> 154:37f96f9d4de2 446 context->cardParams.faulty = false;
<> 154:37f96f9d4de2 447 context->cardParams.status = SMARTCARD_NCN8025_STATUS_PRES | SMARTCARD_NCN8025_STATUS_ACTIVE;
<> 154:37f96f9d4de2 448 }
<> 154:37f96f9d4de2 449 else
<> 154:37f96f9d4de2 450 { /* CMDVCC is low => session is active and INT is low => card is absent/deactivated due to some fault
<> 154:37f96f9d4de2 451 */
<> 154:37f96f9d4de2 452 /* A fault has been detected (card has been deactivated) but The cause of the deactivation is not
<> 154:37f96f9d4de2 453 * yet known.
<> 154:37f96f9d4de2 454 * Lets determine the cause of fault by pulling CMD high
<> 154:37f96f9d4de2 455 */
<> 154:37f96f9d4de2 456 ((GPIO_Type *)gpio_base[context->interfaceConfig.controlPort])->PSOR |=
<> 154:37f96f9d4de2 457 (1u << context->interfaceConfig.controlPin);
<> 154:37f96f9d4de2 458
<> 154:37f96f9d4de2 459 if (((GPIO_Type *)gpio_base[context->interfaceConfig.irqPort])->PDIR &
<> 154:37f96f9d4de2 460 (1u << context->interfaceConfig.irqPin))
<> 154:37f96f9d4de2 461 { /* The fault detected was not a card removal (card is still present) */
<> 154:37f96f9d4de2 462 /* If INT follows CMDVCCN, the fault is due to a supply voltage drop, a VCC over-current
<> 154:37f96f9d4de2 463 * detection or overheating. */
<> 154:37f96f9d4de2 464 context->cardParams.present = true;
<> 154:37f96f9d4de2 465 context->cardParams.active = false;
<> 154:37f96f9d4de2 466 context->cardParams.faulty = true;
<> 154:37f96f9d4de2 467 context->cardParams.status = SMARTCARD_NCN8025_STATUS_PRES | SMARTCARD_NCN8025_STATUS_FAULTY |
<> 154:37f96f9d4de2 468 SMARTCARD_NCN8025_STATUS_CARD_DEACTIVATED;
<> 154:37f96f9d4de2 469 }
<> 154:37f96f9d4de2 470 else
<> 154:37f96f9d4de2 471 { /* The fault detected was the card removal
<> 154:37f96f9d4de2 472 * Setting CMDVCCN allows checking if the deactivation is due to card removal.
<> 154:37f96f9d4de2 473 * In this case the INT pin will stay low after CMDVCCN is high.
<> 154:37f96f9d4de2 474 */
<> 154:37f96f9d4de2 475 context->cardParams.present = false;
<> 154:37f96f9d4de2 476 context->cardParams.active = false;
<> 154:37f96f9d4de2 477 context->cardParams.faulty = false;
<> 154:37f96f9d4de2 478 context->cardParams.status =
<> 154:37f96f9d4de2 479 SMARTCARD_NCN8025_STATUS_CARD_REMOVED | SMARTCARD_NCN8025_STATUS_CARD_DEACTIVATED;
<> 154:37f96f9d4de2 480 }
<> 154:37f96f9d4de2 481 }
<> 154:37f96f9d4de2 482 }
<> 154:37f96f9d4de2 483 #endif
<> 154:37f96f9d4de2 484 break;
<> 154:37f96f9d4de2 485 default:
<> 154:37f96f9d4de2 486 return kStatus_SMARTCARD_InvalidInput;
<> 154:37f96f9d4de2 487 }
<> 154:37f96f9d4de2 488
<> 154:37f96f9d4de2 489 return kStatus_SMARTCARD_Success;
<> 154:37f96f9d4de2 490 }
<> 154:37f96f9d4de2 491
<> 154:37f96f9d4de2 492 void SMARTCARD_PHY_NCN8025_IRQHandler(void *base, smartcard_context_t *context)
<> 154:37f96f9d4de2 493 {
<> 154:37f96f9d4de2 494 if ((NULL == context))
<> 154:37f96f9d4de2 495 {
<> 154:37f96f9d4de2 496 return;
<> 154:37f96f9d4de2 497 }
<> 154:37f96f9d4de2 498
<> 154:37f96f9d4de2 499 /* Read interface/card status */
<> 154:37f96f9d4de2 500 SMARTCARD_PHY_NCN8025_Control(base, context, kSMARTCARD_InterfaceReadStatus, 0u);
<> 154:37f96f9d4de2 501 /* Invoke callback if there is one */
<> 154:37f96f9d4de2 502 if (NULL != context->interfaceCallback)
<> 154:37f96f9d4de2 503 {
<> 154:37f96f9d4de2 504 context->interfaceCallback(context, context->interfaceCallbackParam);
<> 154:37f96f9d4de2 505 }
<> 154:37f96f9d4de2 506 }