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Dependents:   Nucleo_L432KC_Quadrature_Decoder_with_ADC_and_DAC

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targets/TARGET_STM/TARGET_STM32F0/gpio_irq_api.c@161:bd0311f1ad86, 2017-05-27 (annotated)

Committer:
tonnyleonard
Date:
Sat May 27 01:26:18 2017 +0000
Revision:
161:bd0311f1ad86
Parent:
153:fa9ff456f731 
Testing ADC with shunt

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 149:156823d33999 1 /* mbed Microcontroller Library
<> 149:156823d33999 2 *******************************************************************************
<> 149:156823d33999 3 * Copyright (c) 2014, STMicroelectronics
<> 149:156823d33999 4 * All rights reserved.
<> 149:156823d33999 5 *
<> 149:156823d33999 6 * Redistribution and use in source and binary forms, with or without
<> 149:156823d33999 7 * modification, are permitted provided that the following conditions are met:
<> 149:156823d33999 8 *
<> 149:156823d33999 9 * 1. Redistributions of source code must retain the above copyright notice,
<> 149:156823d33999 10 * this list of conditions and the following disclaimer.
<> 149:156823d33999 11 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 149:156823d33999 12 * this list of conditions and the following disclaimer in the documentation
<> 149:156823d33999 13 * and/or other materials provided with the distribution.
<> 149:156823d33999 14 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 149:156823d33999 15 * may be used to endorse or promote products derived from this software
<> 149:156823d33999 16 * without specific prior written permission.
<> 149:156823d33999 17 *
<> 149:156823d33999 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 149:156823d33999 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 149:156823d33999 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 149:156823d33999 21 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 149:156823d33999 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 149:156823d33999 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 149:156823d33999 24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 149:156823d33999 25 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 149:156823d33999 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 149:156823d33999 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 149:156823d33999 28 *******************************************************************************
<> 149:156823d33999 29 */
<> 149:156823d33999 30 #include <stddef.h>
<> 149:156823d33999 31 #include "cmsis.h"
<> 149:156823d33999 32 #include "gpio_irq_api.h"
<> 149:156823d33999 33 #include "pinmap.h"
<> 149:156823d33999 34 #include "mbed_error.h"
<> 149:156823d33999 35
<> 149:156823d33999 36 #define EDGE_NONE (0)
<> 149:156823d33999 37 #define EDGE_RISE (1)
<> 149:156823d33999 38 #define EDGE_FALL (2)
<> 149:156823d33999 39 #define EDGE_BOTH (3)
<> 149:156823d33999 40
<> 149:156823d33999 41 // Number of EXTI irq vectors (EXTI0_1, EXTI2_3, EXTI4_15)
<> 149:156823d33999 42 #define CHANNEL_NUM (3)
<> 149:156823d33999 43
<> 149:156823d33999 44 // Max pins for one line (max with EXTI4_15)
<> 149:156823d33999 45 #define MAX_PIN_LINE (12)
<> 149:156823d33999 46
<> 149:156823d33999 47 typedef struct gpio_channel {
<> 149:156823d33999 48 uint32_t pin_mask; // bitmask representing which pins are configured for receiving interrupts
<> 149:156823d33999 49 uint32_t channel_ids[MAX_PIN_LINE]; // mbed "gpio_irq_t gpio_irq" field of instance
<> 149:156823d33999 50 uint32_t channel_gpio[MAX_PIN_LINE]; // base address of gpio port group
<> 149:156823d33999 51 uint32_t channel_pin[MAX_PIN_LINE]; // pin number in port group
<> 149:156823d33999 52 } gpio_channel_t;
<> 149:156823d33999 53
<> 149:156823d33999 54 static gpio_channel_t channels[CHANNEL_NUM] = {
<> 149:156823d33999 55 {.pin_mask = 0},
<> 149:156823d33999 56 {.pin_mask = 0},
<> 149:156823d33999 57 {.pin_mask = 0}
<> 149:156823d33999 58 };
<> 149:156823d33999 59
<> 149:156823d33999 60 // Used to return the index for channels array.
<> 149:156823d33999 61 static uint32_t pin_base_nr[16] = {
<> 149:156823d33999 62 // EXTI0_1
<> 149:156823d33999 63 0, // pin 0
<> 149:156823d33999 64 1, // pin 1
<> 149:156823d33999 65 // EXTI2_3
<> 149:156823d33999 66 0, // pin 2
<> 149:156823d33999 67 1, // pin 3
<> 149:156823d33999 68 // EXTI4_15
<> 149:156823d33999 69 0, // pin 4
<> 149:156823d33999 70 1, // pin 5
<> 149:156823d33999 71 2, // pin 6
<> 149:156823d33999 72 3, // pin 7
<> 149:156823d33999 73 4, // pin 8
<> 149:156823d33999 74 5, // pin 9
<> 149:156823d33999 75 6, // pin 10
<> 149:156823d33999 76 7, // pin 11
<> 149:156823d33999 77 8, // pin 12
<> 149:156823d33999 78 9, // pin 13
<> 149:156823d33999 79 10, // pin 14
<> 149:156823d33999 80 11 // pin 15
<> 149:156823d33999 81 };
<> 149:156823d33999 82
<> 149:156823d33999 83 static gpio_irq_handler irq_handler;
<> 149:156823d33999 84
<> 153:fa9ff456f731 85 static void handle_interrupt_in(uint32_t irq_index, uint32_t max_num_pin_line)
<> 153:fa9ff456f731 86 {
<> 149:156823d33999 87 gpio_channel_t *gpio_channel = &channels[irq_index];
<> 149:156823d33999 88 uint32_t gpio_idx;
<> 149:156823d33999 89
<> 149:156823d33999 90 for (gpio_idx = 0; gpio_idx < max_num_pin_line; gpio_idx++) {
<> 149:156823d33999 91 uint32_t current_mask = (1 << gpio_idx);
<> 149:156823d33999 92
<> 149:156823d33999 93 if (gpio_channel->pin_mask & current_mask) {
<> 149:156823d33999 94 // Retrieve the gpio and pin that generate the irq
<> 149:156823d33999 95 GPIO_TypeDef *gpio = (GPIO_TypeDef *)(gpio_channel->channel_gpio[gpio_idx]);
<> 149:156823d33999 96 uint32_t pin = (uint32_t)(1 << (gpio_channel->channel_pin[gpio_idx]));
<> 149:156823d33999 97
<> 149:156823d33999 98 // Clear interrupt flag
<> 149:156823d33999 99 if (__HAL_GPIO_EXTI_GET_FLAG(pin) != RESET) {
<> 149:156823d33999 100 __HAL_GPIO_EXTI_CLEAR_FLAG(pin);
<> 149:156823d33999 101
<> 149:156823d33999 102 if (gpio_channel->channel_ids[gpio_idx] == 0) continue;
<> 149:156823d33999 103
<> 149:156823d33999 104 // Check which edge has generated the irq
<> 149:156823d33999 105 if ((gpio->IDR & pin) == 0) {
<> 149:156823d33999 106 irq_handler(gpio_channel->channel_ids[gpio_idx], IRQ_FALL);
<> 149:156823d33999 107 } else {
<> 149:156823d33999 108 irq_handler(gpio_channel->channel_ids[gpio_idx], IRQ_RISE);
<> 149:156823d33999 109 }
<> 149:156823d33999 110 }
<> 149:156823d33999 111 }
<> 149:156823d33999 112 }
<> 149:156823d33999 113 }
<> 149:156823d33999 114
<> 149:156823d33999 115 // EXTI lines 0 to 1
<> 153:fa9ff456f731 116 static void gpio_irq0(void)
<> 153:fa9ff456f731 117 {
<> 149:156823d33999 118 handle_interrupt_in(0, 2);
<> 149:156823d33999 119 }
<> 149:156823d33999 120
<> 149:156823d33999 121 // EXTI lines 2 to 3
<> 153:fa9ff456f731 122 static void gpio_irq1(void)
<> 153:fa9ff456f731 123 {
<> 149:156823d33999 124 handle_interrupt_in(1, 2);
<> 149:156823d33999 125 }
<> 149:156823d33999 126
<> 149:156823d33999 127 // EXTI lines 4 to 15
<> 153:fa9ff456f731 128 static void gpio_irq2(void)
<> 153:fa9ff456f731 129 {
<> 149:156823d33999 130 handle_interrupt_in(2, 12);
<> 149:156823d33999 131 }
<> 149:156823d33999 132
<> 149:156823d33999 133 extern uint32_t Set_GPIO_Clock(uint32_t port_idx);
<> 149:156823d33999 134 extern void pin_function_gpiomode(PinName pin, uint32_t gpiomode);
<> 149:156823d33999 135
<> 153:fa9ff456f731 136 int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id)
<> 153:fa9ff456f731 137 {
<> 149:156823d33999 138 IRQn_Type irq_n = (IRQn_Type)0;
<> 149:156823d33999 139 uint32_t vector = 0;
<> 149:156823d33999 140 uint32_t irq_index;
<> 149:156823d33999 141 gpio_channel_t *gpio_channel;
<> 149:156823d33999 142 uint32_t gpio_idx;
<> 149:156823d33999 143
<> 149:156823d33999 144 if (pin == NC) return -1;
<> 149:156823d33999 145
<> 149:156823d33999 146 uint32_t port_index = STM_PORT(pin);
<> 149:156823d33999 147 uint32_t pin_index = STM_PIN(pin);
<> 149:156823d33999 148
<> 149:156823d33999 149 // Select irq number and interrupt routine
<> 149:156823d33999 150 if ((pin_index == 0) || (pin_index == 1)) {
<> 149:156823d33999 151 irq_n = EXTI0_1_IRQn;
<> 149:156823d33999 152 vector = (uint32_t)&gpio_irq0;
<> 149:156823d33999 153 irq_index = 0;
<> 149:156823d33999 154 } else if ((pin_index == 2) || (pin_index == 3)) {
<> 149:156823d33999 155 irq_n = EXTI2_3_IRQn;
<> 149:156823d33999 156 vector = (uint32_t)&gpio_irq1;
<> 149:156823d33999 157 irq_index = 1;
<> 149:156823d33999 158 } else if ((pin_index > 3) && (pin_index < 16)) {
<> 149:156823d33999 159 irq_n = EXTI4_15_IRQn;
<> 149:156823d33999 160 vector = (uint32_t)&gpio_irq2;
<> 149:156823d33999 161 irq_index = 2;
<> 149:156823d33999 162 } else {
<> 149:156823d33999 163 error("InterruptIn error: pin not supported.\n");
<> 149:156823d33999 164 return -1;
<> 149:156823d33999 165 }
<> 149:156823d33999 166
<> 149:156823d33999 167 // Enable GPIO clock
<> 149:156823d33999 168 uint32_t gpio_add = Set_GPIO_Clock(port_index);
<> 149:156823d33999 169
<> 149:156823d33999 170 // Configure GPIO
<> 149:156823d33999 171 pin_function(pin, STM_PIN_DATA(STM_MODE_IT_FALLING, GPIO_NOPULL, 0));
<> 149:156823d33999 172
<> 149:156823d33999 173 // Enable EXTI interrupt
<> 149:156823d33999 174 NVIC_SetVector(irq_n, vector);
<> 149:156823d33999 175 NVIC_EnableIRQ(irq_n);
<> 149:156823d33999 176
<> 149:156823d33999 177 // Save informations for future use
<> 149:156823d33999 178 obj->irq_n = irq_n;
<> 149:156823d33999 179 obj->irq_index = irq_index;
<> 149:156823d33999 180 obj->event = EDGE_NONE;
<> 149:156823d33999 181 obj->pin = pin;
<> 149:156823d33999 182
<> 149:156823d33999 183 gpio_channel = &channels[irq_index];
<> 149:156823d33999 184 gpio_idx = pin_base_nr[pin_index];
<> 149:156823d33999 185 gpio_channel->pin_mask |= (1 << gpio_idx);
<> 149:156823d33999 186 gpio_channel->channel_ids[gpio_idx] = id;
<> 149:156823d33999 187 gpio_channel->channel_gpio[gpio_idx] = gpio_add;
<> 149:156823d33999 188 gpio_channel->channel_pin[gpio_idx] = pin_index;
<> 149:156823d33999 189
<> 149:156823d33999 190 irq_handler = handler;
<> 149:156823d33999 191
<> 149:156823d33999 192 return 0;
<> 149:156823d33999 193 }
<> 149:156823d33999 194
<> 153:fa9ff456f731 195 void gpio_irq_free(gpio_irq_t *obj)
<> 153:fa9ff456f731 196 {
<> 149:156823d33999 197 gpio_channel_t *gpio_channel = &channels[obj->irq_index];
<> 149:156823d33999 198 uint32_t pin_index = STM_PIN(obj->pin);
<> 153:fa9ff456f731 199 uint32_t gpio_addr = GPIOA_BASE + (GPIOB_BASE-GPIOA_BASE) * STM_PORT(obj->pin);
<> 149:156823d33999 200 uint32_t gpio_idx = pin_base_nr[pin_index];
<> 153:fa9ff456f731 201
<> 153:fa9ff456f731 202 HAL_GPIO_DeInit((GPIO_TypeDef *)gpio_addr, (1<<pin_index));
<> 149:156823d33999 203 gpio_channel->pin_mask &= ~(1 << gpio_idx);
<> 149:156823d33999 204 gpio_channel->channel_ids[gpio_idx] = 0;
<> 149:156823d33999 205 gpio_channel->channel_gpio[gpio_idx] = 0;
<> 149:156823d33999 206 gpio_channel->channel_pin[gpio_idx] = 0;
<> 149:156823d33999 207
<> 149:156823d33999 208 // Disable EXTI line, but don't change pull-up config
<> 149:156823d33999 209 pin_function_gpiomode(obj->pin, STM_MODE_INPUT);
<> 149:156823d33999 210 obj->event = EDGE_NONE;
<> 149:156823d33999 211 }
<> 149:156823d33999 212
<> 153:fa9ff456f731 213 void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable)
<> 153:fa9ff456f731 214 {
<> 149:156823d33999 215 uint32_t mode = STM_MODE_IT_EVT_RESET;
<> 149:156823d33999 216 uint32_t pull = GPIO_NOPULL;
<> 149:156823d33999 217
<> 149:156823d33999 218 if (enable) {
<> 149:156823d33999 219 if (event == IRQ_RISE) {
<> 149:156823d33999 220 if ((obj->event == EDGE_FALL) || (obj->event == EDGE_BOTH)) {
<> 149:156823d33999 221 mode = STM_MODE_IT_RISING_FALLING;
<> 149:156823d33999 222 obj->event = EDGE_BOTH;
<> 149:156823d33999 223 } else { // NONE or RISE
<> 149:156823d33999 224 mode = STM_MODE_IT_RISING;
<> 149:156823d33999 225 obj->event = EDGE_RISE;
<> 149:156823d33999 226 }
<> 149:156823d33999 227 }
<> 149:156823d33999 228 if (event == IRQ_FALL) {
<> 149:156823d33999 229 if ((obj->event == EDGE_RISE) || (obj->event == EDGE_BOTH)) {
<> 149:156823d33999 230 mode = STM_MODE_IT_RISING_FALLING;
<> 149:156823d33999 231 obj->event = EDGE_BOTH;
<> 149:156823d33999 232 } else { // NONE or FALL
<> 149:156823d33999 233 mode = STM_MODE_IT_FALLING;
<> 149:156823d33999 234 obj->event = EDGE_FALL;
<> 149:156823d33999 235 }
<> 149:156823d33999 236 }
<> 149:156823d33999 237 } else { // Disable
<> 149:156823d33999 238 if (event == IRQ_RISE) {
<> 149:156823d33999 239 if ((obj->event == EDGE_FALL) || (obj->event == EDGE_BOTH)) {
<> 149:156823d33999 240 mode = STM_MODE_IT_FALLING;
<> 149:156823d33999 241 obj->event = EDGE_FALL;
<> 149:156823d33999 242 } else { // NONE or RISE
<> 153:fa9ff456f731 243 mode = STM_MODE_INPUT;
<> 149:156823d33999 244 obj->event = EDGE_NONE;
<> 149:156823d33999 245 }
<> 149:156823d33999 246 }
<> 149:156823d33999 247 if (event == IRQ_FALL) {
<> 149:156823d33999 248 if ((obj->event == EDGE_RISE) || (obj->event == EDGE_BOTH)) {
<> 149:156823d33999 249 mode = STM_MODE_IT_RISING;
<> 149:156823d33999 250 obj->event = EDGE_RISE;
<> 149:156823d33999 251 } else { // NONE or FALL
<> 153:fa9ff456f731 252 mode = STM_MODE_INPUT;
<> 149:156823d33999 253 obj->event = EDGE_NONE;
<> 149:156823d33999 254 }
<> 149:156823d33999 255 }
<> 149:156823d33999 256 }
<> 149:156823d33999 257
<> 149:156823d33999 258 pin_function_gpiomode(obj->pin, mode);
<> 149:156823d33999 259 }
<> 149:156823d33999 260
<> 153:fa9ff456f731 261 void gpio_irq_enable(gpio_irq_t *obj)
<> 153:fa9ff456f731 262 {
<> 149:156823d33999 263 NVIC_EnableIRQ(obj->irq_n);
<> 149:156823d33999 264 }
<> 149:156823d33999 265
<> 153:fa9ff456f731 266 void gpio_irq_disable(gpio_irq_t *obj)
<> 153:fa9ff456f731 267 {
<> 149:156823d33999 268 NVIC_DisableIRQ(obj->irq_n);
<> 149:156823d33999 269 obj->event = EDGE_NONE;
<> 149:156823d33999 270 }