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Dependents:   Nucleo_L432KC_Quadrature_Decoder_with_ADC_and_DAC

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targets/cmsis/TARGET_WIZNET/TARGET_W7500x/system_W7500x.c@0:9b334a45a8ff, 2015-10-01 (annotated)

Committer:
bogdanm
Date:
Thu Oct 01 15:25:22 2015 +0300
Revision:
0:9b334a45a8ff
Child:
144:ef7eb2e8f9f7
Initial commit on mbed-dev



Replaces mbed-src (now inactive)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /**************************************************************************//**
bogdanm 0:9b334a45a8ff 2 * @file system_CMSDK_CM0.c
bogdanm 0:9b334a45a8ff 3 * @brief CMSIS Cortex-M0 Device Peripheral Access Layer Source File for
bogdanm 0:9b334a45a8ff 4 * Device CMSDK
bogdanm 0:9b334a45a8ff 5 * @version V3.01
bogdanm 0:9b334a45a8ff 6 * @date 06. March 2012
bogdanm 0:9b334a45a8ff 7 *
bogdanm 0:9b334a45a8ff 8 * @note
bogdanm 0:9b334a45a8ff 9 * Copyright (C) 2010-2012 ARM Limited. All rights reserved.
bogdanm 0:9b334a45a8ff 10 *
bogdanm 0:9b334a45a8ff 11 * @par
bogdanm 0:9b334a45a8ff 12 * ARM Limited (ARM) is supplying this software for use with Cortex-M
bogdanm 0:9b334a45a8ff 13 * processor based microcontrollers. This file can be freely distributed
bogdanm 0:9b334a45a8ff 14 * within development tools that are supporting such ARM based processors.
bogdanm 0:9b334a45a8ff 15 *
bogdanm 0:9b334a45a8ff 16 * @par
bogdanm 0:9b334a45a8ff 17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
bogdanm 0:9b334a45a8ff 18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
bogdanm 0:9b334a45a8ff 19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
bogdanm 0:9b334a45a8ff 20 * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
bogdanm 0:9b334a45a8ff 21 * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
bogdanm 0:9b334a45a8ff 22 *
bogdanm 0:9b334a45a8ff 23 ******************************************************************************/
bogdanm 0:9b334a45a8ff 24
bogdanm 0:9b334a45a8ff 25
bogdanm 0:9b334a45a8ff 26 #include "system_W7500x.h"
bogdanm 0:9b334a45a8ff 27
bogdanm 0:9b334a45a8ff 28
bogdanm 0:9b334a45a8ff 29 /*----------------------------------------------------------------------------
bogdanm 0:9b334a45a8ff 30 DEFINES
bogdanm 0:9b334a45a8ff 31 *----------------------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 32 //#define SYSCLK_EXTERN_OSC
bogdanm 0:9b334a45a8ff 33
bogdanm 0:9b334a45a8ff 34
bogdanm 0:9b334a45a8ff 35
bogdanm 0:9b334a45a8ff 36 /*----------------------------------------------------------------------------
bogdanm 0:9b334a45a8ff 37 Clock Variable definitions
bogdanm 0:9b334a45a8ff 38 *----------------------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 39 uint32_t SystemFrequency = 0; /*!< System Clock Frequency (Core Clock) */
bogdanm 0:9b334a45a8ff 40 uint32_t SystemCoreClock = 0; /*!< Processor Clock Frequency */
bogdanm 0:9b334a45a8ff 41
bogdanm 0:9b334a45a8ff 42
bogdanm 0:9b334a45a8ff 43 /*----------------------------------------------------------------------------
bogdanm 0:9b334a45a8ff 44 Clock functions
bogdanm 0:9b334a45a8ff 45 *----------------------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 46 void SystemCoreClockUpdate (void) /* Get Core Clock Frequency */
bogdanm 0:9b334a45a8ff 47 {
bogdanm 0:9b334a45a8ff 48 uint8_t M,N,OD;
bogdanm 0:9b334a45a8ff 49
bogdanm 0:9b334a45a8ff 50 #ifdef SYSCLK_EXTERN_OSC
bogdanm 0:9b334a45a8ff 51 CRG->PLL_IFSR = CRG_PLL_IFSR_OCLK;
bogdanm 0:9b334a45a8ff 52 #else
bogdanm 0:9b334a45a8ff 53 CRG->PLL_IFSR = CRG_PLL_IFSR_RCLK;
bogdanm 0:9b334a45a8ff 54 #endif
bogdanm 0:9b334a45a8ff 55 OD = (1 << (CRG->PLL_FCR & 0x01)) * (1 << ((CRG->PLL_FCR & 0x02) >> 1));
bogdanm 0:9b334a45a8ff 56 N = (CRG->PLL_FCR >> 8 ) & 0x3F;
bogdanm 0:9b334a45a8ff 57 M = (CRG->PLL_FCR >> 16) & 0x3F;
bogdanm 0:9b334a45a8ff 58
bogdanm 0:9b334a45a8ff 59 #ifdef SYSCLK_EXTERN_OSC
bogdanm 0:9b334a45a8ff 60 SystemCoreClock = EXTERN_XTAL * M / N * 1 / OD;
bogdanm 0:9b334a45a8ff 61 #else
bogdanm 0:9b334a45a8ff 62 SystemCoreClock = INTERN_XTAL * M / N * 1 / OD;
bogdanm 0:9b334a45a8ff 63 #endif
bogdanm 0:9b334a45a8ff 64 }
bogdanm 0:9b334a45a8ff 65
bogdanm 0:9b334a45a8ff 66 uint32_t GetSystemClock()
bogdanm 0:9b334a45a8ff 67 {
bogdanm 0:9b334a45a8ff 68 return SystemCoreClock;
bogdanm 0:9b334a45a8ff 69 }
bogdanm 0:9b334a45a8ff 70
bogdanm 0:9b334a45a8ff 71
bogdanm 0:9b334a45a8ff 72 /**
bogdanm 0:9b334a45a8ff 73 * Initialize the system
bogdanm 0:9b334a45a8ff 74 *
bogdanm 0:9b334a45a8ff 75 * @param none
bogdanm 0:9b334a45a8ff 76 * @return none
bogdanm 0:9b334a45a8ff 77 *
bogdanm 0:9b334a45a8ff 78 * @brief Setup the microcontroller system.
bogdanm 0:9b334a45a8ff 79 * Initialize the System.
bogdanm 0:9b334a45a8ff 80 */
bogdanm 0:9b334a45a8ff 81 void SystemInit (void)
bogdanm 0:9b334a45a8ff 82 {
bogdanm 0:9b334a45a8ff 83 uint8_t M,N,OD;
bogdanm 0:9b334a45a8ff 84
bogdanm 0:9b334a45a8ff 85 (*((volatile uint32_t *)(W7500x_TRIM_BGT))) = (*((volatile uint32_t *)(W7500x_INFO_BGT)));
bogdanm 0:9b334a45a8ff 86 (*((volatile uint32_t *)(W7500x_TRIM_OSC))) = (*((volatile uint32_t *)(W7500x_INFO_OSC)));
bogdanm 0:9b334a45a8ff 87
bogdanm 0:9b334a45a8ff 88
bogdanm 0:9b334a45a8ff 89 // Set PLL input frequency
bogdanm 0:9b334a45a8ff 90 #ifdef SYSCLK_EXTERN_OSC
bogdanm 0:9b334a45a8ff 91 CRG->PLL_IFSR = CRG_PLL_IFSR_OCLK;
bogdanm 0:9b334a45a8ff 92 #else
bogdanm 0:9b334a45a8ff 93 CRG->PLL_IFSR = CRG_PLL_IFSR_RCLK;
bogdanm 0:9b334a45a8ff 94 #endif
bogdanm 0:9b334a45a8ff 95 OD = (1 << (CRG->PLL_FCR & 0x01)) * (1 << ((CRG->PLL_FCR & 0x02) >> 1));
bogdanm 0:9b334a45a8ff 96 N = (CRG->PLL_FCR >> 8 ) & 0x3F;
bogdanm 0:9b334a45a8ff 97 M = (CRG->PLL_FCR >> 16) & 0x3F;
bogdanm 0:9b334a45a8ff 98
bogdanm 0:9b334a45a8ff 99 #ifdef SYSCLK_EXTERN_OSC
bogdanm 0:9b334a45a8ff 100 SystemCoreClock = EXTERN_XTAL * M / N * 1 / OD;
bogdanm 0:9b334a45a8ff 101 #else
bogdanm 0:9b334a45a8ff 102 SystemCoreClock = INTERN_XTAL * M / N * 1 / OD;
bogdanm 0:9b334a45a8ff 103 #endif
bogdanm 0:9b334a45a8ff 104 }