CMSIS DSP library
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arm_cmplx_dot_prod_q15.c
00001 /* ---------------------------------------------------------------------- 00002 * Copyright (C) 2010-2013 ARM Limited. All rights reserved. 00003 * 00004 * $Date: 17. January 2013 00005 * $Revision: V1.4.1 00006 * 00007 * Project: CMSIS DSP Library 00008 * Title: arm_cmplx_dot_prod_q15.c 00009 * 00010 * Description: Processing function for the Q15 Complex Dot product 00011 * 00012 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 00013 * 00014 * Redistribution and use in source and binary forms, with or without 00015 * modification, are permitted provided that the following conditions 00016 * are met: 00017 * - Redistributions of source code must retain the above copyright 00018 * notice, this list of conditions and the following disclaimer. 00019 * - Redistributions in binary form must reproduce the above copyright 00020 * notice, this list of conditions and the following disclaimer in 00021 * the documentation and/or other materials provided with the 00022 * distribution. 00023 * - Neither the name of ARM LIMITED nor the names of its contributors 00024 * may be used to endorse or promote products derived from this 00025 * software without specific prior written permission. 00026 * 00027 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 00028 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 00029 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 00030 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 00031 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 00032 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 00033 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 00034 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 00035 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 00036 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 00037 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 00038 * POSSIBILITY OF SUCH DAMAGE. 00039 * -------------------------------------------------------------------- */ 00040 00041 #include "arm_math.h" 00042 00043 /** 00044 * @ingroup groupCmplxMath 00045 */ 00046 00047 /** 00048 * @addtogroup cmplx_dot_prod 00049 * @{ 00050 */ 00051 00052 /** 00053 * @brief Q15 complex dot product 00054 * @param *pSrcA points to the first input vector 00055 * @param *pSrcB points to the second input vector 00056 * @param numSamples number of complex samples in each vector 00057 * @param *realResult real part of the result returned here 00058 * @param *imagResult imaginary part of the result returned here 00059 * @return none. 00060 * 00061 * <b>Scaling and Overflow Behavior:</b> 00062 * \par 00063 * The function is implemented using an internal 64-bit accumulator. 00064 * The intermediate 1.15 by 1.15 multiplications are performed with full precision and yield a 2.30 result. 00065 * These are accumulated in a 64-bit accumulator with 34.30 precision. 00066 * As a final step, the accumulators are converted to 8.24 format. 00067 * The return results <code>realResult</code> and <code>imagResult</code> are in 8.24 format. 00068 */ 00069 00070 void arm_cmplx_dot_prod_q15( 00071 q15_t * pSrcA, 00072 q15_t * pSrcB, 00073 uint32_t numSamples, 00074 q31_t * realResult, 00075 q31_t * imagResult) 00076 { 00077 q63_t real_sum = 0, imag_sum = 0; /* Temporary result storage */ 00078 00079 #ifndef ARM_MATH_CM0_FAMILY 00080 00081 /* Run the below code for Cortex-M4 and Cortex-M3 */ 00082 uint32_t blkCnt; /* loop counter */ 00083 00084 00085 /*loop Unrolling */ 00086 blkCnt = numSamples >> 2u; 00087 00088 /* First part of the processing with loop unrolling. Compute 4 outputs at a time. 00089 ** a second loop below computes the remaining 1 to 3 samples. */ 00090 while(blkCnt > 0u) 00091 { 00092 /* CReal = A[0]* B[0] + A[2]* B[2] + A[4]* B[4] + .....+ A[numSamples-2]* B[numSamples-2] */ 00093 real_sum += ((q31_t) * pSrcA++ * *pSrcB++); 00094 00095 /* CImag = A[1]* B[1] + A[3]* B[3] + A[5]* B[5] + .....+ A[numSamples-1]* B[numSamples-1] */ 00096 imag_sum += ((q31_t) * pSrcA++ * *pSrcB++); 00097 00098 real_sum += ((q31_t) * pSrcA++ * *pSrcB++); 00099 imag_sum += ((q31_t) * pSrcA++ * *pSrcB++); 00100 00101 real_sum += ((q31_t) * pSrcA++ * *pSrcB++); 00102 imag_sum += ((q31_t) * pSrcA++ * *pSrcB++); 00103 00104 real_sum += ((q31_t) * pSrcA++ * *pSrcB++); 00105 imag_sum += ((q31_t) * pSrcA++ * *pSrcB++); 00106 00107 /* Decrement the loop counter */ 00108 blkCnt--; 00109 } 00110 00111 /* If the numSamples is not a multiple of 4, compute any remaining output samples here. 00112 ** No loop unrolling is used. */ 00113 blkCnt = numSamples % 0x4u; 00114 00115 while(blkCnt > 0u) 00116 { 00117 /* CReal = A[0]* B[0] + A[2]* B[2] + A[4]* B[4] + .....+ A[numSamples-2]* B[numSamples-2] */ 00118 real_sum += ((q31_t) * pSrcA++ * *pSrcB++); 00119 /* CImag = A[1]* B[1] + A[3]* B[3] + A[5]* B[5] + .....+ A[numSamples-1]* B[numSamples-1] */ 00120 imag_sum += ((q31_t) * pSrcA++ * *pSrcB++); 00121 00122 /* Decrement the loop counter */ 00123 blkCnt--; 00124 } 00125 00126 #else 00127 00128 /* Run the below code for Cortex-M0 */ 00129 00130 while(numSamples > 0u) 00131 { 00132 /* CReal = A[0]* B[0] + A[2]* B[2] + A[4]* B[4] + .....+ A[numSamples-2]* B[numSamples-2] */ 00133 real_sum += ((q31_t) * pSrcA++ * *pSrcB++); 00134 /* CImag = A[1]* B[1] + A[3]* B[3] + A[5]* B[5] + .....+ A[numSamples-1]* B[numSamples-1] */ 00135 imag_sum += ((q31_t) * pSrcA++ * *pSrcB++); 00136 00137 /* Decrement the loop counter */ 00138 numSamples--; 00139 } 00140 00141 #endif /* #ifndef ARM_MATH_CM0_FAMILY */ 00142 00143 /* Store the real and imaginary results in 8.24 format */ 00144 /* Convert real data in 34.30 to 8.24 by 6 right shifts */ 00145 *realResult = (q31_t) (real_sum) >> 6; 00146 /* Convert imaginary data in 34.30 to 8.24 by 6 right shifts */ 00147 *imagResult = (q31_t) (imag_sum) >> 6; 00148 } 00149 00150 /** 00151 * @} end of cmplx_dot_prod group 00152 */
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