CMSIS DSP library
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arm_biquad_cascade_df1_init_q31.c
00001 /* ---------------------------------------------------------------------- 00002 * Copyright (C) 2010-2013 ARM Limited. All rights reserved. 00003 * 00004 * $Date: 17. January 2013 00005 * $Revision: V1.4.1 00006 * 00007 * Project: CMSIS DSP Library 00008 * Title: arm_biquad_cascade_df1_init_q31.c 00009 * 00010 * Description: Q31 Biquad cascade DirectFormI(DF1) filter initialization function. 00011 * 00012 * 00013 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 00014 * 00015 * Redistribution and use in source and binary forms, with or without 00016 * modification, are permitted provided that the following conditions 00017 * are met: 00018 * - Redistributions of source code must retain the above copyright 00019 * notice, this list of conditions and the following disclaimer. 00020 * - Redistributions in binary form must reproduce the above copyright 00021 * notice, this list of conditions and the following disclaimer in 00022 * the documentation and/or other materials provided with the 00023 * distribution. 00024 * - Neither the name of ARM LIMITED nor the names of its contributors 00025 * may be used to endorse or promote products derived from this 00026 * software without specific prior written permission. 00027 * 00028 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 00029 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 00030 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 00031 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 00032 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 00033 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 00034 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 00035 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 00036 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 00037 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 00038 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 00039 * POSSIBILITY OF SUCH DAMAGE. 00040 * -------------------------------------------------------------------- */ 00041 00042 #include "arm_math.h" 00043 00044 /** 00045 * @ingroup groupFilters 00046 */ 00047 00048 /** 00049 * @addtogroup BiquadCascadeDF1 00050 * @{ 00051 */ 00052 00053 /** 00054 * @details 00055 * 00056 * @param[in,out] *S points to an instance of the Q31 Biquad cascade structure. 00057 * @param[in] numStages number of 2nd order stages in the filter. 00058 * @param[in] *pCoeffs points to the filter coefficients buffer. 00059 * @param[in] *pState points to the state buffer. 00060 * @param[in] postShift Shift to be applied after the accumulator. Varies according to the coefficients format 00061 * @return none 00062 * 00063 * <b>Coefficient and State Ordering:</b> 00064 * 00065 * \par 00066 * The coefficients are stored in the array <code>pCoeffs</code> in the following order: 00067 * <pre> 00068 * {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...} 00069 * </pre> 00070 * where <code>b1x</code> and <code>a1x</code> are the coefficients for the first stage, 00071 * <code>b2x</code> and <code>a2x</code> are the coefficients for the second stage, 00072 * and so on. The <code>pCoeffs</code> array contains a total of <code>5*numStages</code> values. 00073 * 00074 * \par 00075 * The <code>pState</code> points to state variables array. 00076 * Each Biquad stage has 4 state variables <code>x[n-1], x[n-2], y[n-1],</code> and <code>y[n-2]</code>. 00077 * The state variables are arranged in the <code>pState</code> array as: 00078 * <pre> 00079 * {x[n-1], x[n-2], y[n-1], y[n-2]} 00080 * </pre> 00081 * The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on. 00082 * The state array has a total length of <code>4*numStages</code> values. 00083 * The state variables are updated after each block of data is processed; the coefficients are untouched. 00084 */ 00085 00086 void arm_biquad_cascade_df1_init_q31( 00087 arm_biquad_casd_df1_inst_q31 * S, 00088 uint8_t numStages, 00089 q31_t * pCoeffs, 00090 q31_t * pState, 00091 int8_t postShift) 00092 { 00093 /* Assign filter stages */ 00094 S->numStages = numStages; 00095 00096 /* Assign postShift to be applied to the output */ 00097 S->postShift = postShift; 00098 00099 /* Assign coefficient pointer */ 00100 S->pCoeffs = pCoeffs; 00101 00102 /* Clear state buffer and size is always 4 * numStages */ 00103 memset(pState, 0, (4u * (uint32_t) numStages) * sizeof(q31_t)); 00104 00105 /* Assign state pointer */ 00106 S->pState = pState; 00107 } 00108 00109 /** 00110 * @} end of BiquadCascadeDF1 group 00111 */
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