CMSIS DSP library

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Fork of mbed-dsp by mbed official

Committer:
mbed_official
Date:
Fri Nov 08 13:45:10 2013 +0000
Revision:
3:7a284390b0ce
Parent:
2:da51fb522205
Synchronized with git revision e69956aba2f68a2a26ac26b051f8d349deaa1ce8

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emilmont 1:fdd22bb7aa52 1 /* ----------------------------------------------------------------------
mbed_official 3:7a284390b0ce 2 * Copyright (C) 2010-2013 ARM Limited. All rights reserved.
emilmont 1:fdd22bb7aa52 3 *
mbed_official 3:7a284390b0ce 4 * $Date: 17. January 2013
mbed_official 3:7a284390b0ce 5 * $Revision: V1.4.1
emilmont 1:fdd22bb7aa52 6 *
emilmont 2:da51fb522205 7 * Project: CMSIS DSP Library
emilmont 2:da51fb522205 8 * Title: arm_mat_mult_fast_q31.c
emilmont 1:fdd22bb7aa52 9 *
emilmont 2:da51fb522205 10 * Description: Q31 matrix multiplication (fast variant).
emilmont 1:fdd22bb7aa52 11 *
emilmont 1:fdd22bb7aa52 12 * Target Processor: Cortex-M4/Cortex-M3
emilmont 1:fdd22bb7aa52 13 *
mbed_official 3:7a284390b0ce 14 * Redistribution and use in source and binary forms, with or without
mbed_official 3:7a284390b0ce 15 * modification, are permitted provided that the following conditions
mbed_official 3:7a284390b0ce 16 * are met:
mbed_official 3:7a284390b0ce 17 * - Redistributions of source code must retain the above copyright
mbed_official 3:7a284390b0ce 18 * notice, this list of conditions and the following disclaimer.
mbed_official 3:7a284390b0ce 19 * - Redistributions in binary form must reproduce the above copyright
mbed_official 3:7a284390b0ce 20 * notice, this list of conditions and the following disclaimer in
mbed_official 3:7a284390b0ce 21 * the documentation and/or other materials provided with the
mbed_official 3:7a284390b0ce 22 * distribution.
mbed_official 3:7a284390b0ce 23 * - Neither the name of ARM LIMITED nor the names of its contributors
mbed_official 3:7a284390b0ce 24 * may be used to endorse or promote products derived from this
mbed_official 3:7a284390b0ce 25 * software without specific prior written permission.
mbed_official 3:7a284390b0ce 26 *
mbed_official 3:7a284390b0ce 27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
mbed_official 3:7a284390b0ce 28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
mbed_official 3:7a284390b0ce 29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
mbed_official 3:7a284390b0ce 30 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
mbed_official 3:7a284390b0ce 31 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
mbed_official 3:7a284390b0ce 32 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
mbed_official 3:7a284390b0ce 33 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
mbed_official 3:7a284390b0ce 34 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 3:7a284390b0ce 35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
mbed_official 3:7a284390b0ce 36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
mbed_official 3:7a284390b0ce 37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
mbed_official 3:7a284390b0ce 38 * POSSIBILITY OF SUCH DAMAGE.
emilmont 1:fdd22bb7aa52 39 * -------------------------------------------------------------------- */
emilmont 1:fdd22bb7aa52 40
emilmont 1:fdd22bb7aa52 41 #include "arm_math.h"
emilmont 1:fdd22bb7aa52 42
emilmont 1:fdd22bb7aa52 43 /**
emilmont 1:fdd22bb7aa52 44 * @ingroup groupMatrix
emilmont 1:fdd22bb7aa52 45 */
emilmont 1:fdd22bb7aa52 46
emilmont 1:fdd22bb7aa52 47 /**
emilmont 1:fdd22bb7aa52 48 * @addtogroup MatrixMult
emilmont 1:fdd22bb7aa52 49 * @{
emilmont 1:fdd22bb7aa52 50 */
emilmont 1:fdd22bb7aa52 51
emilmont 1:fdd22bb7aa52 52 /**
emilmont 1:fdd22bb7aa52 53 * @brief Q31 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4
emilmont 1:fdd22bb7aa52 54 * @param[in] *pSrcA points to the first input matrix structure
emilmont 1:fdd22bb7aa52 55 * @param[in] *pSrcB points to the second input matrix structure
emilmont 1:fdd22bb7aa52 56 * @param[out] *pDst points to output matrix structure
emilmont 2:da51fb522205 57 * @return The function returns either
emilmont 1:fdd22bb7aa52 58 * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
emilmont 1:fdd22bb7aa52 59 *
emilmont 1:fdd22bb7aa52 60 * @details
emilmont 1:fdd22bb7aa52 61 * <b>Scaling and Overflow Behavior:</b>
emilmont 1:fdd22bb7aa52 62 *
emilmont 1:fdd22bb7aa52 63 * \par
emilmont 1:fdd22bb7aa52 64 * The difference between the function arm_mat_mult_q31() and this fast variant is that
emilmont 1:fdd22bb7aa52 65 * the fast variant use a 32-bit rather than a 64-bit accumulator.
emilmont 1:fdd22bb7aa52 66 * The result of each 1.31 x 1.31 multiplication is truncated to
emilmont 1:fdd22bb7aa52 67 * 2.30 format. These intermediate results are accumulated in a 32-bit register in 2.30
emilmont 1:fdd22bb7aa52 68 * format. Finally, the accumulator is saturated and converted to a 1.31 result.
emilmont 1:fdd22bb7aa52 69 *
emilmont 1:fdd22bb7aa52 70 * \par
emilmont 1:fdd22bb7aa52 71 * The fast version has the same overflow behavior as the standard version but provides
emilmont 1:fdd22bb7aa52 72 * less precision since it discards the low 32 bits of each multiplication result.
emilmont 1:fdd22bb7aa52 73 * In order to avoid overflows completely the input signals must be scaled down.
emilmont 1:fdd22bb7aa52 74 * Scale down one of the input matrices by log2(numColsA) bits to
emilmont 1:fdd22bb7aa52 75 * avoid overflows, as a total of numColsA additions are computed internally for each
emilmont 1:fdd22bb7aa52 76 * output element.
emilmont 1:fdd22bb7aa52 77 *
emilmont 1:fdd22bb7aa52 78 * \par
emilmont 1:fdd22bb7aa52 79 * See <code>arm_mat_mult_q31()</code> for a slower implementation of this function
emilmont 1:fdd22bb7aa52 80 * which uses 64-bit accumulation to provide higher precision.
emilmont 1:fdd22bb7aa52 81 */
emilmont 1:fdd22bb7aa52 82
emilmont 1:fdd22bb7aa52 83 arm_status arm_mat_mult_fast_q31(
emilmont 1:fdd22bb7aa52 84 const arm_matrix_instance_q31 * pSrcA,
emilmont 1:fdd22bb7aa52 85 const arm_matrix_instance_q31 * pSrcB,
emilmont 1:fdd22bb7aa52 86 arm_matrix_instance_q31 * pDst)
emilmont 1:fdd22bb7aa52 87 {
emilmont 1:fdd22bb7aa52 88 q31_t *pIn1 = pSrcA->pData; /* input data matrix pointer A */
emilmont 1:fdd22bb7aa52 89 q31_t *pIn2 = pSrcB->pData; /* input data matrix pointer B */
emilmont 1:fdd22bb7aa52 90 q31_t *pInA = pSrcA->pData; /* input data matrix pointer A */
emilmont 1:fdd22bb7aa52 91 // q31_t *pSrcB = pSrcB->pData; /* input data matrix pointer B */
emilmont 1:fdd22bb7aa52 92 q31_t *pOut = pDst->pData; /* output data matrix pointer */
emilmont 1:fdd22bb7aa52 93 q31_t *px; /* Temporary output data matrix pointer */
emilmont 1:fdd22bb7aa52 94 q31_t sum; /* Accumulator */
emilmont 1:fdd22bb7aa52 95 uint16_t numRowsA = pSrcA->numRows; /* number of rows of input matrix A */
emilmont 1:fdd22bb7aa52 96 uint16_t numColsB = pSrcB->numCols; /* number of columns of input matrix B */
emilmont 1:fdd22bb7aa52 97 uint16_t numColsA = pSrcA->numCols; /* number of columns of input matrix A */
emilmont 1:fdd22bb7aa52 98 uint16_t col, i = 0u, j, row = numRowsA, colCnt; /* loop counters */
emilmont 1:fdd22bb7aa52 99 arm_status status; /* status of matrix multiplication */
emilmont 1:fdd22bb7aa52 100 q31_t inA1, inA2, inA3, inA4, inB1, inB2, inB3, inB4;
emilmont 1:fdd22bb7aa52 101
emilmont 1:fdd22bb7aa52 102 #ifdef ARM_MATH_MATRIX_CHECK
emilmont 1:fdd22bb7aa52 103
emilmont 1:fdd22bb7aa52 104
emilmont 1:fdd22bb7aa52 105 /* Check for matrix mismatch condition */
emilmont 1:fdd22bb7aa52 106 if((pSrcA->numCols != pSrcB->numRows) ||
emilmont 1:fdd22bb7aa52 107 (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
emilmont 1:fdd22bb7aa52 108 {
emilmont 1:fdd22bb7aa52 109 /* Set status as ARM_MATH_SIZE_MISMATCH */
emilmont 1:fdd22bb7aa52 110 status = ARM_MATH_SIZE_MISMATCH;
emilmont 1:fdd22bb7aa52 111 }
emilmont 1:fdd22bb7aa52 112 else
emilmont 1:fdd22bb7aa52 113 #endif /* #ifdef ARM_MATH_MATRIX_CHECK */
emilmont 1:fdd22bb7aa52 114
emilmont 1:fdd22bb7aa52 115 {
emilmont 1:fdd22bb7aa52 116 /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
emilmont 1:fdd22bb7aa52 117 /* row loop */
emilmont 1:fdd22bb7aa52 118 do
emilmont 1:fdd22bb7aa52 119 {
emilmont 1:fdd22bb7aa52 120 /* Output pointer is set to starting address of the row being processed */
emilmont 1:fdd22bb7aa52 121 px = pOut + i;
emilmont 1:fdd22bb7aa52 122
emilmont 1:fdd22bb7aa52 123 /* For every row wise process, the column loop counter is to be initiated */
emilmont 1:fdd22bb7aa52 124 col = numColsB;
emilmont 1:fdd22bb7aa52 125
emilmont 1:fdd22bb7aa52 126 /* For every row wise process, the pIn2 pointer is set
emilmont 1:fdd22bb7aa52 127 ** to the starting address of the pSrcB data */
emilmont 1:fdd22bb7aa52 128 pIn2 = pSrcB->pData;
emilmont 1:fdd22bb7aa52 129
emilmont 1:fdd22bb7aa52 130 j = 0u;
emilmont 1:fdd22bb7aa52 131
emilmont 1:fdd22bb7aa52 132 /* column loop */
emilmont 1:fdd22bb7aa52 133 do
emilmont 1:fdd22bb7aa52 134 {
emilmont 1:fdd22bb7aa52 135 /* Set the variable sum, that acts as accumulator, to zero */
emilmont 1:fdd22bb7aa52 136 sum = 0;
emilmont 1:fdd22bb7aa52 137
emilmont 1:fdd22bb7aa52 138 /* Initiate the pointer pIn1 to point to the starting address of pInA */
emilmont 1:fdd22bb7aa52 139 pIn1 = pInA;
emilmont 1:fdd22bb7aa52 140
emilmont 1:fdd22bb7aa52 141 /* Apply loop unrolling and compute 4 MACs simultaneously. */
emilmont 1:fdd22bb7aa52 142 colCnt = numColsA >> 2;
emilmont 1:fdd22bb7aa52 143
emilmont 1:fdd22bb7aa52 144
emilmont 1:fdd22bb7aa52 145 /* matrix multiplication */
emilmont 1:fdd22bb7aa52 146 while(colCnt > 0u)
emilmont 1:fdd22bb7aa52 147 {
emilmont 1:fdd22bb7aa52 148 /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
emilmont 1:fdd22bb7aa52 149 /* Perform the multiply-accumulates */
emilmont 1:fdd22bb7aa52 150 inB1 = *pIn2;
emilmont 1:fdd22bb7aa52 151 pIn2 += numColsB;
emilmont 1:fdd22bb7aa52 152
emilmont 1:fdd22bb7aa52 153 inA1 = pIn1[0];
emilmont 1:fdd22bb7aa52 154 inA2 = pIn1[1];
emilmont 1:fdd22bb7aa52 155
emilmont 1:fdd22bb7aa52 156 inB2 = *pIn2;
emilmont 1:fdd22bb7aa52 157 pIn2 += numColsB;
emilmont 1:fdd22bb7aa52 158
emilmont 1:fdd22bb7aa52 159 inB3 = *pIn2;
emilmont 1:fdd22bb7aa52 160 pIn2 += numColsB;
emilmont 1:fdd22bb7aa52 161
emilmont 1:fdd22bb7aa52 162 sum = (q31_t) ((((q63_t) sum << 32) + ((q63_t) inA1 * inB1)) >> 32);
emilmont 1:fdd22bb7aa52 163 sum = (q31_t) ((((q63_t) sum << 32) + ((q63_t) inA2 * inB2)) >> 32);
emilmont 1:fdd22bb7aa52 164
emilmont 1:fdd22bb7aa52 165 inA3 = pIn1[2];
emilmont 1:fdd22bb7aa52 166 inA4 = pIn1[3];
emilmont 1:fdd22bb7aa52 167
emilmont 1:fdd22bb7aa52 168 inB4 = *pIn2;
emilmont 1:fdd22bb7aa52 169 pIn2 += numColsB;
emilmont 1:fdd22bb7aa52 170
emilmont 1:fdd22bb7aa52 171 sum = (q31_t) ((((q63_t) sum << 32) + ((q63_t) inA3 * inB3)) >> 32);
emilmont 1:fdd22bb7aa52 172 sum = (q31_t) ((((q63_t) sum << 32) + ((q63_t) inA4 * inB4)) >> 32);
emilmont 1:fdd22bb7aa52 173
emilmont 1:fdd22bb7aa52 174 pIn1 += 4u;
emilmont 1:fdd22bb7aa52 175
emilmont 1:fdd22bb7aa52 176 /* Decrement the loop counter */
emilmont 1:fdd22bb7aa52 177 colCnt--;
emilmont 1:fdd22bb7aa52 178 }
emilmont 1:fdd22bb7aa52 179
emilmont 1:fdd22bb7aa52 180 /* If the columns of pSrcA is not a multiple of 4, compute any remaining output samples here.
emilmont 1:fdd22bb7aa52 181 ** No loop unrolling is used. */
emilmont 1:fdd22bb7aa52 182 colCnt = numColsA % 0x4u;
emilmont 1:fdd22bb7aa52 183
emilmont 1:fdd22bb7aa52 184 while(colCnt > 0u)
emilmont 1:fdd22bb7aa52 185 {
emilmont 1:fdd22bb7aa52 186 /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
emilmont 1:fdd22bb7aa52 187 /* Perform the multiply-accumulates */
emilmont 1:fdd22bb7aa52 188 sum = (q31_t) ((((q63_t) sum << 32) +
emilmont 1:fdd22bb7aa52 189 ((q63_t) * pIn1++ * (*pIn2))) >> 32);
emilmont 1:fdd22bb7aa52 190 pIn2 += numColsB;
emilmont 1:fdd22bb7aa52 191
emilmont 1:fdd22bb7aa52 192 /* Decrement the loop counter */
emilmont 1:fdd22bb7aa52 193 colCnt--;
emilmont 1:fdd22bb7aa52 194 }
emilmont 1:fdd22bb7aa52 195
emilmont 1:fdd22bb7aa52 196 /* Convert the result from 2.30 to 1.31 format and store in destination buffer */
emilmont 1:fdd22bb7aa52 197 *px++ = sum << 1;
emilmont 1:fdd22bb7aa52 198
emilmont 1:fdd22bb7aa52 199 /* Update the pointer pIn2 to point to the starting address of the next column */
emilmont 1:fdd22bb7aa52 200 j++;
emilmont 1:fdd22bb7aa52 201 pIn2 = pSrcB->pData + j;
emilmont 1:fdd22bb7aa52 202
emilmont 1:fdd22bb7aa52 203 /* Decrement the column loop counter */
emilmont 1:fdd22bb7aa52 204 col--;
emilmont 1:fdd22bb7aa52 205
emilmont 1:fdd22bb7aa52 206 } while(col > 0u);
emilmont 1:fdd22bb7aa52 207
emilmont 1:fdd22bb7aa52 208 /* Update the pointer pInA to point to the starting address of the next row */
emilmont 1:fdd22bb7aa52 209 i = i + numColsB;
emilmont 1:fdd22bb7aa52 210 pInA = pInA + numColsA;
emilmont 1:fdd22bb7aa52 211
emilmont 1:fdd22bb7aa52 212 /* Decrement the row loop counter */
emilmont 1:fdd22bb7aa52 213 row--;
emilmont 1:fdd22bb7aa52 214
emilmont 1:fdd22bb7aa52 215 } while(row > 0u);
emilmont 1:fdd22bb7aa52 216
emilmont 1:fdd22bb7aa52 217 /* set status as ARM_MATH_SUCCESS */
emilmont 1:fdd22bb7aa52 218 status = ARM_MATH_SUCCESS;
emilmont 1:fdd22bb7aa52 219 }
emilmont 1:fdd22bb7aa52 220 /* Return to application */
emilmont 1:fdd22bb7aa52 221 return (status);
emilmont 1:fdd22bb7aa52 222 }
emilmont 1:fdd22bb7aa52 223
emilmont 1:fdd22bb7aa52 224 /**
emilmont 1:fdd22bb7aa52 225 * @} end of MatrixMult group
emilmont 1:fdd22bb7aa52 226 */