CMSIS DSP library
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cmsis_dsp/FilteringFunctions/arm_biquad_cascade_df1_q15.c@3:7a284390b0ce, 2013-11-08 (annotated)
- Committer:
- mbed_official
- Date:
- Fri Nov 08 13:45:10 2013 +0000
- Revision:
- 3:7a284390b0ce
- Parent:
- 2:da51fb522205
Synchronized with git revision e69956aba2f68a2a26ac26b051f8d349deaa1ce8
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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emilmont | 1:fdd22bb7aa52 | 1 | /* ---------------------------------------------------------------------- |
mbed_official | 3:7a284390b0ce | 2 | * Copyright (C) 2010-2013 ARM Limited. All rights reserved. |
emilmont | 1:fdd22bb7aa52 | 3 | * |
mbed_official | 3:7a284390b0ce | 4 | * $Date: 17. January 2013 |
mbed_official | 3:7a284390b0ce | 5 | * $Revision: V1.4.1 |
emilmont | 1:fdd22bb7aa52 | 6 | * |
emilmont | 2:da51fb522205 | 7 | * Project: CMSIS DSP Library |
emilmont | 2:da51fb522205 | 8 | * Title: arm_biquad_cascade_df1_q15.c |
emilmont | 1:fdd22bb7aa52 | 9 | * |
emilmont | 2:da51fb522205 | 10 | * Description: Processing function for the |
emilmont | 2:da51fb522205 | 11 | * Q15 Biquad cascade DirectFormI(DF1) filter. |
emilmont | 1:fdd22bb7aa52 | 12 | * |
emilmont | 1:fdd22bb7aa52 | 13 | * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0 |
emilmont | 1:fdd22bb7aa52 | 14 | * |
mbed_official | 3:7a284390b0ce | 15 | * Redistribution and use in source and binary forms, with or without |
mbed_official | 3:7a284390b0ce | 16 | * modification, are permitted provided that the following conditions |
mbed_official | 3:7a284390b0ce | 17 | * are met: |
mbed_official | 3:7a284390b0ce | 18 | * - Redistributions of source code must retain the above copyright |
mbed_official | 3:7a284390b0ce | 19 | * notice, this list of conditions and the following disclaimer. |
mbed_official | 3:7a284390b0ce | 20 | * - Redistributions in binary form must reproduce the above copyright |
mbed_official | 3:7a284390b0ce | 21 | * notice, this list of conditions and the following disclaimer in |
mbed_official | 3:7a284390b0ce | 22 | * the documentation and/or other materials provided with the |
mbed_official | 3:7a284390b0ce | 23 | * distribution. |
mbed_official | 3:7a284390b0ce | 24 | * - Neither the name of ARM LIMITED nor the names of its contributors |
mbed_official | 3:7a284390b0ce | 25 | * may be used to endorse or promote products derived from this |
mbed_official | 3:7a284390b0ce | 26 | * software without specific prior written permission. |
mbed_official | 3:7a284390b0ce | 27 | * |
mbed_official | 3:7a284390b0ce | 28 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |
mbed_official | 3:7a284390b0ce | 29 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |
mbed_official | 3:7a284390b0ce | 30 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS |
mbed_official | 3:7a284390b0ce | 31 | * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE |
mbed_official | 3:7a284390b0ce | 32 | * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
mbed_official | 3:7a284390b0ce | 33 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, |
mbed_official | 3:7a284390b0ce | 34 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
mbed_official | 3:7a284390b0ce | 35 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
mbed_official | 3:7a284390b0ce | 36 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
mbed_official | 3:7a284390b0ce | 37 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
mbed_official | 3:7a284390b0ce | 38 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
mbed_official | 3:7a284390b0ce | 39 | * POSSIBILITY OF SUCH DAMAGE. |
emilmont | 1:fdd22bb7aa52 | 40 | * -------------------------------------------------------------------- */ |
emilmont | 1:fdd22bb7aa52 | 41 | |
emilmont | 1:fdd22bb7aa52 | 42 | #include "arm_math.h" |
emilmont | 1:fdd22bb7aa52 | 43 | |
emilmont | 1:fdd22bb7aa52 | 44 | /** |
emilmont | 1:fdd22bb7aa52 | 45 | * @ingroup groupFilters |
emilmont | 1:fdd22bb7aa52 | 46 | */ |
emilmont | 1:fdd22bb7aa52 | 47 | |
emilmont | 1:fdd22bb7aa52 | 48 | /** |
emilmont | 1:fdd22bb7aa52 | 49 | * @addtogroup BiquadCascadeDF1 |
emilmont | 1:fdd22bb7aa52 | 50 | * @{ |
emilmont | 1:fdd22bb7aa52 | 51 | */ |
emilmont | 1:fdd22bb7aa52 | 52 | |
emilmont | 1:fdd22bb7aa52 | 53 | /** |
emilmont | 1:fdd22bb7aa52 | 54 | * @brief Processing function for the Q15 Biquad cascade filter. |
emilmont | 1:fdd22bb7aa52 | 55 | * @param[in] *S points to an instance of the Q15 Biquad cascade structure. |
emilmont | 1:fdd22bb7aa52 | 56 | * @param[in] *pSrc points to the block of input data. |
emilmont | 1:fdd22bb7aa52 | 57 | * @param[out] *pDst points to the location where the output result is written. |
emilmont | 1:fdd22bb7aa52 | 58 | * @param[in] blockSize number of samples to process per call. |
emilmont | 1:fdd22bb7aa52 | 59 | * @return none. |
emilmont | 1:fdd22bb7aa52 | 60 | * |
emilmont | 1:fdd22bb7aa52 | 61 | * |
emilmont | 1:fdd22bb7aa52 | 62 | * <b>Scaling and Overflow Behavior:</b> |
emilmont | 1:fdd22bb7aa52 | 63 | * \par |
emilmont | 1:fdd22bb7aa52 | 64 | * The function is implemented using a 64-bit internal accumulator. |
emilmont | 1:fdd22bb7aa52 | 65 | * Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result. |
emilmont | 1:fdd22bb7aa52 | 66 | * The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. |
emilmont | 1:fdd22bb7aa52 | 67 | * There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved. |
emilmont | 1:fdd22bb7aa52 | 68 | * The accumulator is then shifted by <code>postShift</code> bits to truncate the result to 1.15 format by discarding the low 16 bits. |
emilmont | 1:fdd22bb7aa52 | 69 | * Finally, the result is saturated to 1.15 format. |
emilmont | 1:fdd22bb7aa52 | 70 | * |
emilmont | 1:fdd22bb7aa52 | 71 | * \par |
emilmont | 1:fdd22bb7aa52 | 72 | * Refer to the function <code>arm_biquad_cascade_df1_fast_q15()</code> for a faster but less precise implementation of this filter for Cortex-M3 and Cortex-M4. |
emilmont | 1:fdd22bb7aa52 | 73 | */ |
emilmont | 1:fdd22bb7aa52 | 74 | |
emilmont | 1:fdd22bb7aa52 | 75 | void arm_biquad_cascade_df1_q15( |
emilmont | 1:fdd22bb7aa52 | 76 | const arm_biquad_casd_df1_inst_q15 * S, |
emilmont | 1:fdd22bb7aa52 | 77 | q15_t * pSrc, |
emilmont | 1:fdd22bb7aa52 | 78 | q15_t * pDst, |
emilmont | 1:fdd22bb7aa52 | 79 | uint32_t blockSize) |
emilmont | 1:fdd22bb7aa52 | 80 | { |
emilmont | 1:fdd22bb7aa52 | 81 | |
emilmont | 1:fdd22bb7aa52 | 82 | |
mbed_official | 3:7a284390b0ce | 83 | #ifndef ARM_MATH_CM0_FAMILY |
emilmont | 1:fdd22bb7aa52 | 84 | |
emilmont | 1:fdd22bb7aa52 | 85 | /* Run the below code for Cortex-M4 and Cortex-M3 */ |
emilmont | 1:fdd22bb7aa52 | 86 | |
emilmont | 1:fdd22bb7aa52 | 87 | q15_t *pIn = pSrc; /* Source pointer */ |
emilmont | 1:fdd22bb7aa52 | 88 | q15_t *pOut = pDst; /* Destination pointer */ |
emilmont | 1:fdd22bb7aa52 | 89 | q31_t in; /* Temporary variable to hold input value */ |
emilmont | 1:fdd22bb7aa52 | 90 | q31_t out; /* Temporary variable to hold output value */ |
emilmont | 1:fdd22bb7aa52 | 91 | q31_t b0; /* Temporary variable to hold bo value */ |
emilmont | 1:fdd22bb7aa52 | 92 | q31_t b1, a1; /* Filter coefficients */ |
emilmont | 1:fdd22bb7aa52 | 93 | q31_t state_in, state_out; /* Filter state variables */ |
emilmont | 1:fdd22bb7aa52 | 94 | q31_t acc_l, acc_h; |
emilmont | 1:fdd22bb7aa52 | 95 | q63_t acc; /* Accumulator */ |
emilmont | 1:fdd22bb7aa52 | 96 | int32_t lShift = (15 - (int32_t) S->postShift); /* Post shift */ |
emilmont | 1:fdd22bb7aa52 | 97 | q15_t *pState = S->pState; /* State pointer */ |
emilmont | 1:fdd22bb7aa52 | 98 | q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ |
emilmont | 1:fdd22bb7aa52 | 99 | uint32_t sample, stage = (uint32_t) S->numStages; /* Stage loop counter */ |
emilmont | 1:fdd22bb7aa52 | 100 | int32_t uShift = (32 - lShift); |
emilmont | 1:fdd22bb7aa52 | 101 | |
emilmont | 1:fdd22bb7aa52 | 102 | do |
emilmont | 1:fdd22bb7aa52 | 103 | { |
emilmont | 1:fdd22bb7aa52 | 104 | /* Read the b0 and 0 coefficients using SIMD */ |
emilmont | 1:fdd22bb7aa52 | 105 | b0 = *__SIMD32(pCoeffs)++; |
emilmont | 1:fdd22bb7aa52 | 106 | |
emilmont | 1:fdd22bb7aa52 | 107 | /* Read the b1 and b2 coefficients using SIMD */ |
emilmont | 1:fdd22bb7aa52 | 108 | b1 = *__SIMD32(pCoeffs)++; |
emilmont | 1:fdd22bb7aa52 | 109 | |
emilmont | 1:fdd22bb7aa52 | 110 | /* Read the a1 and a2 coefficients using SIMD */ |
emilmont | 1:fdd22bb7aa52 | 111 | a1 = *__SIMD32(pCoeffs)++; |
emilmont | 1:fdd22bb7aa52 | 112 | |
emilmont | 1:fdd22bb7aa52 | 113 | /* Read the input state values from the state buffer: x[n-1], x[n-2] */ |
emilmont | 1:fdd22bb7aa52 | 114 | state_in = *__SIMD32(pState)++; |
emilmont | 1:fdd22bb7aa52 | 115 | |
emilmont | 1:fdd22bb7aa52 | 116 | /* Read the output state values from the state buffer: y[n-1], y[n-2] */ |
emilmont | 1:fdd22bb7aa52 | 117 | state_out = *__SIMD32(pState)--; |
emilmont | 1:fdd22bb7aa52 | 118 | |
emilmont | 1:fdd22bb7aa52 | 119 | /* Apply loop unrolling and compute 2 output values simultaneously. */ |
emilmont | 1:fdd22bb7aa52 | 120 | /* The variable acc hold output values that are being computed: |
emilmont | 1:fdd22bb7aa52 | 121 | * |
emilmont | 1:fdd22bb7aa52 | 122 | * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] |
emilmont | 1:fdd22bb7aa52 | 123 | * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] |
emilmont | 1:fdd22bb7aa52 | 124 | */ |
emilmont | 1:fdd22bb7aa52 | 125 | sample = blockSize >> 1u; |
emilmont | 1:fdd22bb7aa52 | 126 | |
emilmont | 1:fdd22bb7aa52 | 127 | /* First part of the processing with loop unrolling. Compute 2 outputs at a time. |
emilmont | 1:fdd22bb7aa52 | 128 | ** a second loop below computes the remaining 1 sample. */ |
emilmont | 1:fdd22bb7aa52 | 129 | while(sample > 0u) |
emilmont | 1:fdd22bb7aa52 | 130 | { |
emilmont | 1:fdd22bb7aa52 | 131 | |
emilmont | 1:fdd22bb7aa52 | 132 | /* Read the input */ |
emilmont | 1:fdd22bb7aa52 | 133 | in = *__SIMD32(pIn)++; |
emilmont | 1:fdd22bb7aa52 | 134 | |
emilmont | 1:fdd22bb7aa52 | 135 | /* out = b0 * x[n] + 0 * 0 */ |
emilmont | 1:fdd22bb7aa52 | 136 | out = __SMUAD(b0, in); |
emilmont | 1:fdd22bb7aa52 | 137 | |
emilmont | 1:fdd22bb7aa52 | 138 | /* acc += b1 * x[n-1] + b2 * x[n-2] + out */ |
emilmont | 1:fdd22bb7aa52 | 139 | acc = __SMLALD(b1, state_in, out); |
emilmont | 1:fdd22bb7aa52 | 140 | /* acc += a1 * y[n-1] + a2 * y[n-2] */ |
emilmont | 1:fdd22bb7aa52 | 141 | acc = __SMLALD(a1, state_out, acc); |
emilmont | 1:fdd22bb7aa52 | 142 | |
emilmont | 1:fdd22bb7aa52 | 143 | /* The result is converted from 3.29 to 1.31 if postShift = 1, and then saturation is applied */ |
emilmont | 1:fdd22bb7aa52 | 144 | /* Calc lower part of acc */ |
emilmont | 1:fdd22bb7aa52 | 145 | acc_l = acc & 0xffffffff; |
emilmont | 1:fdd22bb7aa52 | 146 | |
emilmont | 1:fdd22bb7aa52 | 147 | /* Calc upper part of acc */ |
emilmont | 1:fdd22bb7aa52 | 148 | acc_h = (acc >> 32) & 0xffffffff; |
emilmont | 1:fdd22bb7aa52 | 149 | |
emilmont | 1:fdd22bb7aa52 | 150 | /* Apply shift for lower part of acc and upper part of acc */ |
emilmont | 1:fdd22bb7aa52 | 151 | out = (uint32_t) acc_l >> lShift | acc_h << uShift; |
emilmont | 1:fdd22bb7aa52 | 152 | |
emilmont | 1:fdd22bb7aa52 | 153 | out = __SSAT(out, 16); |
emilmont | 1:fdd22bb7aa52 | 154 | |
emilmont | 1:fdd22bb7aa52 | 155 | /* Every time after the output is computed state should be updated. */ |
emilmont | 1:fdd22bb7aa52 | 156 | /* The states should be updated as: */ |
emilmont | 1:fdd22bb7aa52 | 157 | /* Xn2 = Xn1 */ |
emilmont | 1:fdd22bb7aa52 | 158 | /* Xn1 = Xn */ |
emilmont | 1:fdd22bb7aa52 | 159 | /* Yn2 = Yn1 */ |
emilmont | 1:fdd22bb7aa52 | 160 | /* Yn1 = acc */ |
emilmont | 1:fdd22bb7aa52 | 161 | /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */ |
emilmont | 1:fdd22bb7aa52 | 162 | /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */ |
emilmont | 1:fdd22bb7aa52 | 163 | |
emilmont | 1:fdd22bb7aa52 | 164 | #ifndef ARM_MATH_BIG_ENDIAN |
emilmont | 1:fdd22bb7aa52 | 165 | |
emilmont | 1:fdd22bb7aa52 | 166 | state_in = __PKHBT(in, state_in, 16); |
emilmont | 1:fdd22bb7aa52 | 167 | state_out = __PKHBT(out, state_out, 16); |
emilmont | 1:fdd22bb7aa52 | 168 | |
emilmont | 1:fdd22bb7aa52 | 169 | #else |
emilmont | 1:fdd22bb7aa52 | 170 | |
emilmont | 1:fdd22bb7aa52 | 171 | state_in = __PKHBT(state_in >> 16, (in >> 16), 16); |
emilmont | 1:fdd22bb7aa52 | 172 | state_out = __PKHBT(state_out >> 16, (out), 16); |
emilmont | 1:fdd22bb7aa52 | 173 | |
emilmont | 1:fdd22bb7aa52 | 174 | #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ |
emilmont | 1:fdd22bb7aa52 | 175 | |
emilmont | 1:fdd22bb7aa52 | 176 | /* out = b0 * x[n] + 0 * 0 */ |
emilmont | 1:fdd22bb7aa52 | 177 | out = __SMUADX(b0, in); |
emilmont | 1:fdd22bb7aa52 | 178 | /* acc += b1 * x[n-1] + b2 * x[n-2] + out */ |
emilmont | 1:fdd22bb7aa52 | 179 | acc = __SMLALD(b1, state_in, out); |
emilmont | 1:fdd22bb7aa52 | 180 | /* acc += a1 * y[n-1] + a2 * y[n-2] */ |
emilmont | 1:fdd22bb7aa52 | 181 | acc = __SMLALD(a1, state_out, acc); |
emilmont | 1:fdd22bb7aa52 | 182 | |
emilmont | 1:fdd22bb7aa52 | 183 | /* The result is converted from 3.29 to 1.31 if postShift = 1, and then saturation is applied */ |
emilmont | 1:fdd22bb7aa52 | 184 | /* Calc lower part of acc */ |
emilmont | 1:fdd22bb7aa52 | 185 | acc_l = acc & 0xffffffff; |
emilmont | 1:fdd22bb7aa52 | 186 | |
emilmont | 1:fdd22bb7aa52 | 187 | /* Calc upper part of acc */ |
emilmont | 1:fdd22bb7aa52 | 188 | acc_h = (acc >> 32) & 0xffffffff; |
emilmont | 1:fdd22bb7aa52 | 189 | |
emilmont | 1:fdd22bb7aa52 | 190 | /* Apply shift for lower part of acc and upper part of acc */ |
emilmont | 1:fdd22bb7aa52 | 191 | out = (uint32_t) acc_l >> lShift | acc_h << uShift; |
emilmont | 1:fdd22bb7aa52 | 192 | |
emilmont | 1:fdd22bb7aa52 | 193 | out = __SSAT(out, 16); |
emilmont | 1:fdd22bb7aa52 | 194 | |
emilmont | 1:fdd22bb7aa52 | 195 | /* Store the output in the destination buffer. */ |
emilmont | 1:fdd22bb7aa52 | 196 | |
emilmont | 1:fdd22bb7aa52 | 197 | #ifndef ARM_MATH_BIG_ENDIAN |
emilmont | 1:fdd22bb7aa52 | 198 | |
emilmont | 1:fdd22bb7aa52 | 199 | *__SIMD32(pOut)++ = __PKHBT(state_out, out, 16); |
emilmont | 1:fdd22bb7aa52 | 200 | |
emilmont | 1:fdd22bb7aa52 | 201 | #else |
emilmont | 1:fdd22bb7aa52 | 202 | |
emilmont | 1:fdd22bb7aa52 | 203 | *__SIMD32(pOut)++ = __PKHBT(out, state_out >> 16, 16); |
emilmont | 1:fdd22bb7aa52 | 204 | |
emilmont | 1:fdd22bb7aa52 | 205 | #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ |
emilmont | 1:fdd22bb7aa52 | 206 | |
emilmont | 1:fdd22bb7aa52 | 207 | /* Every time after the output is computed state should be updated. */ |
emilmont | 1:fdd22bb7aa52 | 208 | /* The states should be updated as: */ |
emilmont | 1:fdd22bb7aa52 | 209 | /* Xn2 = Xn1 */ |
emilmont | 1:fdd22bb7aa52 | 210 | /* Xn1 = Xn */ |
emilmont | 1:fdd22bb7aa52 | 211 | /* Yn2 = Yn1 */ |
emilmont | 1:fdd22bb7aa52 | 212 | /* Yn1 = acc */ |
emilmont | 1:fdd22bb7aa52 | 213 | /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */ |
emilmont | 1:fdd22bb7aa52 | 214 | /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */ |
emilmont | 1:fdd22bb7aa52 | 215 | #ifndef ARM_MATH_BIG_ENDIAN |
emilmont | 1:fdd22bb7aa52 | 216 | |
emilmont | 1:fdd22bb7aa52 | 217 | state_in = __PKHBT(in >> 16, state_in, 16); |
emilmont | 1:fdd22bb7aa52 | 218 | state_out = __PKHBT(out, state_out, 16); |
emilmont | 1:fdd22bb7aa52 | 219 | |
emilmont | 1:fdd22bb7aa52 | 220 | #else |
emilmont | 1:fdd22bb7aa52 | 221 | |
emilmont | 1:fdd22bb7aa52 | 222 | state_in = __PKHBT(state_in >> 16, in, 16); |
emilmont | 1:fdd22bb7aa52 | 223 | state_out = __PKHBT(state_out >> 16, out, 16); |
emilmont | 1:fdd22bb7aa52 | 224 | |
emilmont | 1:fdd22bb7aa52 | 225 | #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ |
emilmont | 1:fdd22bb7aa52 | 226 | |
emilmont | 1:fdd22bb7aa52 | 227 | |
emilmont | 1:fdd22bb7aa52 | 228 | /* Decrement the loop counter */ |
emilmont | 1:fdd22bb7aa52 | 229 | sample--; |
emilmont | 1:fdd22bb7aa52 | 230 | |
emilmont | 1:fdd22bb7aa52 | 231 | } |
emilmont | 1:fdd22bb7aa52 | 232 | |
emilmont | 1:fdd22bb7aa52 | 233 | /* If the blockSize is not a multiple of 2, compute any remaining output samples here. |
emilmont | 1:fdd22bb7aa52 | 234 | ** No loop unrolling is used. */ |
emilmont | 1:fdd22bb7aa52 | 235 | |
emilmont | 1:fdd22bb7aa52 | 236 | if((blockSize & 0x1u) != 0u) |
emilmont | 1:fdd22bb7aa52 | 237 | { |
emilmont | 1:fdd22bb7aa52 | 238 | /* Read the input */ |
emilmont | 1:fdd22bb7aa52 | 239 | in = *pIn++; |
emilmont | 1:fdd22bb7aa52 | 240 | |
emilmont | 1:fdd22bb7aa52 | 241 | /* out = b0 * x[n] + 0 * 0 */ |
emilmont | 1:fdd22bb7aa52 | 242 | |
emilmont | 1:fdd22bb7aa52 | 243 | #ifndef ARM_MATH_BIG_ENDIAN |
emilmont | 1:fdd22bb7aa52 | 244 | |
emilmont | 1:fdd22bb7aa52 | 245 | out = __SMUAD(b0, in); |
emilmont | 1:fdd22bb7aa52 | 246 | |
emilmont | 1:fdd22bb7aa52 | 247 | #else |
emilmont | 1:fdd22bb7aa52 | 248 | |
emilmont | 1:fdd22bb7aa52 | 249 | out = __SMUADX(b0, in); |
emilmont | 1:fdd22bb7aa52 | 250 | |
emilmont | 1:fdd22bb7aa52 | 251 | #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ |
emilmont | 1:fdd22bb7aa52 | 252 | |
emilmont | 1:fdd22bb7aa52 | 253 | /* acc = b1 * x[n-1] + b2 * x[n-2] + out */ |
emilmont | 1:fdd22bb7aa52 | 254 | acc = __SMLALD(b1, state_in, out); |
emilmont | 1:fdd22bb7aa52 | 255 | /* acc += a1 * y[n-1] + a2 * y[n-2] */ |
emilmont | 1:fdd22bb7aa52 | 256 | acc = __SMLALD(a1, state_out, acc); |
emilmont | 1:fdd22bb7aa52 | 257 | |
emilmont | 1:fdd22bb7aa52 | 258 | /* The result is converted from 3.29 to 1.31 if postShift = 1, and then saturation is applied */ |
emilmont | 1:fdd22bb7aa52 | 259 | /* Calc lower part of acc */ |
emilmont | 1:fdd22bb7aa52 | 260 | acc_l = acc & 0xffffffff; |
emilmont | 1:fdd22bb7aa52 | 261 | |
emilmont | 1:fdd22bb7aa52 | 262 | /* Calc upper part of acc */ |
emilmont | 1:fdd22bb7aa52 | 263 | acc_h = (acc >> 32) & 0xffffffff; |
emilmont | 1:fdd22bb7aa52 | 264 | |
emilmont | 1:fdd22bb7aa52 | 265 | /* Apply shift for lower part of acc and upper part of acc */ |
emilmont | 1:fdd22bb7aa52 | 266 | out = (uint32_t) acc_l >> lShift | acc_h << uShift; |
emilmont | 1:fdd22bb7aa52 | 267 | |
emilmont | 1:fdd22bb7aa52 | 268 | out = __SSAT(out, 16); |
emilmont | 1:fdd22bb7aa52 | 269 | |
emilmont | 1:fdd22bb7aa52 | 270 | /* Store the output in the destination buffer. */ |
emilmont | 1:fdd22bb7aa52 | 271 | *pOut++ = (q15_t) out; |
emilmont | 1:fdd22bb7aa52 | 272 | |
emilmont | 1:fdd22bb7aa52 | 273 | /* Every time after the output is computed state should be updated. */ |
emilmont | 1:fdd22bb7aa52 | 274 | /* The states should be updated as: */ |
emilmont | 1:fdd22bb7aa52 | 275 | /* Xn2 = Xn1 */ |
emilmont | 1:fdd22bb7aa52 | 276 | /* Xn1 = Xn */ |
emilmont | 1:fdd22bb7aa52 | 277 | /* Yn2 = Yn1 */ |
emilmont | 1:fdd22bb7aa52 | 278 | /* Yn1 = acc */ |
emilmont | 1:fdd22bb7aa52 | 279 | /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */ |
emilmont | 1:fdd22bb7aa52 | 280 | /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */ |
emilmont | 1:fdd22bb7aa52 | 281 | |
emilmont | 1:fdd22bb7aa52 | 282 | #ifndef ARM_MATH_BIG_ENDIAN |
emilmont | 1:fdd22bb7aa52 | 283 | |
emilmont | 1:fdd22bb7aa52 | 284 | state_in = __PKHBT(in, state_in, 16); |
emilmont | 1:fdd22bb7aa52 | 285 | state_out = __PKHBT(out, state_out, 16); |
emilmont | 1:fdd22bb7aa52 | 286 | |
emilmont | 1:fdd22bb7aa52 | 287 | #else |
emilmont | 1:fdd22bb7aa52 | 288 | |
emilmont | 1:fdd22bb7aa52 | 289 | state_in = __PKHBT(state_in >> 16, in, 16); |
emilmont | 1:fdd22bb7aa52 | 290 | state_out = __PKHBT(state_out >> 16, out, 16); |
emilmont | 1:fdd22bb7aa52 | 291 | |
emilmont | 1:fdd22bb7aa52 | 292 | #endif /* #ifndef ARM_MATH_BIG_ENDIAN */ |
emilmont | 1:fdd22bb7aa52 | 293 | |
emilmont | 1:fdd22bb7aa52 | 294 | } |
emilmont | 1:fdd22bb7aa52 | 295 | |
emilmont | 1:fdd22bb7aa52 | 296 | /* The first stage goes from the input wire to the output wire. */ |
emilmont | 1:fdd22bb7aa52 | 297 | /* Subsequent numStages occur in-place in the output wire */ |
emilmont | 1:fdd22bb7aa52 | 298 | pIn = pDst; |
emilmont | 1:fdd22bb7aa52 | 299 | |
emilmont | 1:fdd22bb7aa52 | 300 | /* Reset the output pointer */ |
emilmont | 1:fdd22bb7aa52 | 301 | pOut = pDst; |
emilmont | 1:fdd22bb7aa52 | 302 | |
emilmont | 1:fdd22bb7aa52 | 303 | /* Store the updated state variables back into the state array */ |
emilmont | 1:fdd22bb7aa52 | 304 | *__SIMD32(pState)++ = state_in; |
emilmont | 1:fdd22bb7aa52 | 305 | *__SIMD32(pState)++ = state_out; |
emilmont | 1:fdd22bb7aa52 | 306 | |
emilmont | 1:fdd22bb7aa52 | 307 | |
emilmont | 1:fdd22bb7aa52 | 308 | /* Decrement the loop counter */ |
emilmont | 1:fdd22bb7aa52 | 309 | stage--; |
emilmont | 1:fdd22bb7aa52 | 310 | |
emilmont | 1:fdd22bb7aa52 | 311 | } while(stage > 0u); |
emilmont | 1:fdd22bb7aa52 | 312 | |
emilmont | 1:fdd22bb7aa52 | 313 | #else |
emilmont | 1:fdd22bb7aa52 | 314 | |
emilmont | 1:fdd22bb7aa52 | 315 | /* Run the below code for Cortex-M0 */ |
emilmont | 1:fdd22bb7aa52 | 316 | |
emilmont | 1:fdd22bb7aa52 | 317 | q15_t *pIn = pSrc; /* Source pointer */ |
emilmont | 1:fdd22bb7aa52 | 318 | q15_t *pOut = pDst; /* Destination pointer */ |
emilmont | 1:fdd22bb7aa52 | 319 | q15_t b0, b1, b2, a1, a2; /* Filter coefficients */ |
emilmont | 1:fdd22bb7aa52 | 320 | q15_t Xn1, Xn2, Yn1, Yn2; /* Filter state variables */ |
emilmont | 1:fdd22bb7aa52 | 321 | q15_t Xn; /* temporary input */ |
emilmont | 1:fdd22bb7aa52 | 322 | q63_t acc; /* Accumulator */ |
emilmont | 1:fdd22bb7aa52 | 323 | int32_t shift = (15 - (int32_t) S->postShift); /* Post shift */ |
emilmont | 1:fdd22bb7aa52 | 324 | q15_t *pState = S->pState; /* State pointer */ |
emilmont | 1:fdd22bb7aa52 | 325 | q15_t *pCoeffs = S->pCoeffs; /* Coefficient pointer */ |
emilmont | 1:fdd22bb7aa52 | 326 | uint32_t sample, stage = (uint32_t) S->numStages; /* Stage loop counter */ |
emilmont | 1:fdd22bb7aa52 | 327 | |
emilmont | 1:fdd22bb7aa52 | 328 | do |
emilmont | 1:fdd22bb7aa52 | 329 | { |
emilmont | 1:fdd22bb7aa52 | 330 | /* Reading the coefficients */ |
emilmont | 1:fdd22bb7aa52 | 331 | b0 = *pCoeffs++; |
mbed_official | 3:7a284390b0ce | 332 | pCoeffs++; // skip the 0 coefficient |
emilmont | 1:fdd22bb7aa52 | 333 | b1 = *pCoeffs++; |
emilmont | 1:fdd22bb7aa52 | 334 | b2 = *pCoeffs++; |
emilmont | 1:fdd22bb7aa52 | 335 | a1 = *pCoeffs++; |
emilmont | 1:fdd22bb7aa52 | 336 | a2 = *pCoeffs++; |
emilmont | 1:fdd22bb7aa52 | 337 | |
emilmont | 1:fdd22bb7aa52 | 338 | /* Reading the state values */ |
emilmont | 1:fdd22bb7aa52 | 339 | Xn1 = pState[0]; |
emilmont | 1:fdd22bb7aa52 | 340 | Xn2 = pState[1]; |
emilmont | 1:fdd22bb7aa52 | 341 | Yn1 = pState[2]; |
emilmont | 1:fdd22bb7aa52 | 342 | Yn2 = pState[3]; |
emilmont | 1:fdd22bb7aa52 | 343 | |
emilmont | 1:fdd22bb7aa52 | 344 | /* The variables acc holds the output value that is computed: |
emilmont | 1:fdd22bb7aa52 | 345 | * acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] |
emilmont | 1:fdd22bb7aa52 | 346 | */ |
emilmont | 1:fdd22bb7aa52 | 347 | |
emilmont | 1:fdd22bb7aa52 | 348 | sample = blockSize; |
emilmont | 1:fdd22bb7aa52 | 349 | |
emilmont | 1:fdd22bb7aa52 | 350 | while(sample > 0u) |
emilmont | 1:fdd22bb7aa52 | 351 | { |
emilmont | 1:fdd22bb7aa52 | 352 | /* Read the input */ |
emilmont | 1:fdd22bb7aa52 | 353 | Xn = *pIn++; |
emilmont | 1:fdd22bb7aa52 | 354 | |
emilmont | 1:fdd22bb7aa52 | 355 | /* acc = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */ |
emilmont | 1:fdd22bb7aa52 | 356 | /* acc = b0 * x[n] */ |
emilmont | 1:fdd22bb7aa52 | 357 | acc = (q31_t) b0 *Xn; |
emilmont | 1:fdd22bb7aa52 | 358 | |
emilmont | 1:fdd22bb7aa52 | 359 | /* acc += b1 * x[n-1] */ |
emilmont | 1:fdd22bb7aa52 | 360 | acc += (q31_t) b1 *Xn1; |
emilmont | 1:fdd22bb7aa52 | 361 | /* acc += b[2] * x[n-2] */ |
emilmont | 1:fdd22bb7aa52 | 362 | acc += (q31_t) b2 *Xn2; |
emilmont | 1:fdd22bb7aa52 | 363 | /* acc += a1 * y[n-1] */ |
emilmont | 1:fdd22bb7aa52 | 364 | acc += (q31_t) a1 *Yn1; |
emilmont | 1:fdd22bb7aa52 | 365 | /* acc += a2 * y[n-2] */ |
emilmont | 1:fdd22bb7aa52 | 366 | acc += (q31_t) a2 *Yn2; |
emilmont | 1:fdd22bb7aa52 | 367 | |
emilmont | 1:fdd22bb7aa52 | 368 | /* The result is converted to 1.31 */ |
emilmont | 1:fdd22bb7aa52 | 369 | acc = __SSAT((acc >> shift), 16); |
emilmont | 1:fdd22bb7aa52 | 370 | |
emilmont | 1:fdd22bb7aa52 | 371 | /* Every time after the output is computed state should be updated. */ |
emilmont | 1:fdd22bb7aa52 | 372 | /* The states should be updated as: */ |
emilmont | 1:fdd22bb7aa52 | 373 | /* Xn2 = Xn1 */ |
emilmont | 1:fdd22bb7aa52 | 374 | /* Xn1 = Xn */ |
emilmont | 1:fdd22bb7aa52 | 375 | /* Yn2 = Yn1 */ |
emilmont | 1:fdd22bb7aa52 | 376 | /* Yn1 = acc */ |
emilmont | 1:fdd22bb7aa52 | 377 | Xn2 = Xn1; |
emilmont | 1:fdd22bb7aa52 | 378 | Xn1 = Xn; |
emilmont | 1:fdd22bb7aa52 | 379 | Yn2 = Yn1; |
emilmont | 1:fdd22bb7aa52 | 380 | Yn1 = (q15_t) acc; |
emilmont | 1:fdd22bb7aa52 | 381 | |
emilmont | 1:fdd22bb7aa52 | 382 | /* Store the output in the destination buffer. */ |
emilmont | 1:fdd22bb7aa52 | 383 | *pOut++ = (q15_t) acc; |
emilmont | 1:fdd22bb7aa52 | 384 | |
emilmont | 1:fdd22bb7aa52 | 385 | /* decrement the loop counter */ |
emilmont | 1:fdd22bb7aa52 | 386 | sample--; |
emilmont | 1:fdd22bb7aa52 | 387 | } |
emilmont | 1:fdd22bb7aa52 | 388 | |
emilmont | 1:fdd22bb7aa52 | 389 | /* The first stage goes from the input buffer to the output buffer. */ |
emilmont | 1:fdd22bb7aa52 | 390 | /* Subsequent stages occur in-place in the output buffer */ |
emilmont | 1:fdd22bb7aa52 | 391 | pIn = pDst; |
emilmont | 1:fdd22bb7aa52 | 392 | |
emilmont | 1:fdd22bb7aa52 | 393 | /* Reset to destination pointer */ |
emilmont | 1:fdd22bb7aa52 | 394 | pOut = pDst; |
emilmont | 1:fdd22bb7aa52 | 395 | |
emilmont | 1:fdd22bb7aa52 | 396 | /* Store the updated state variables back into the pState array */ |
emilmont | 1:fdd22bb7aa52 | 397 | *pState++ = Xn1; |
emilmont | 1:fdd22bb7aa52 | 398 | *pState++ = Xn2; |
emilmont | 1:fdd22bb7aa52 | 399 | *pState++ = Yn1; |
emilmont | 1:fdd22bb7aa52 | 400 | *pState++ = Yn2; |
emilmont | 1:fdd22bb7aa52 | 401 | |
emilmont | 1:fdd22bb7aa52 | 402 | } while(--stage); |
emilmont | 1:fdd22bb7aa52 | 403 | |
mbed_official | 3:7a284390b0ce | 404 | #endif /* #ifndef ARM_MATH_CM0_FAMILY */ |
emilmont | 1:fdd22bb7aa52 | 405 | |
emilmont | 1:fdd22bb7aa52 | 406 | } |
emilmont | 1:fdd22bb7aa52 | 407 | |
emilmont | 1:fdd22bb7aa52 | 408 | |
emilmont | 1:fdd22bb7aa52 | 409 | /** |
emilmont | 1:fdd22bb7aa52 | 410 | * @} end of BiquadCascadeDF1 group |
emilmont | 1:fdd22bb7aa52 | 411 | */ |