mbed official / mbed-dsp

CMSIS DSP library

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cmsis_dsp/ComplexMathFunctions/arm_cmplx_dot_prod_q31.c@3:7a284390b0ce, 2013-11-08 (annotated)

Committer:
mbed_official
Date:
Fri Nov 08 13:45:10 2013 +0000
Revision:
3:7a284390b0ce
Parent:
2:da51fb522205 
Synchronized with git revision e69956aba2f68a2a26ac26b051f8d349deaa1ce8

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 1:fdd22bb7aa52 1 /* ----------------------------------------------------------------------
mbed_official 3:7a284390b0ce 2 * Copyright (C) 2010-2013 ARM Limited. All rights reserved.
emilmont 1:fdd22bb7aa52 3 *
mbed_official 3:7a284390b0ce 4 * $Date: 17. January 2013
mbed_official 3:7a284390b0ce 5 * $Revision: V1.4.1
emilmont 1:fdd22bb7aa52 6 *
emilmont 2:da51fb522205 7 * Project: CMSIS DSP Library
emilmont 2:da51fb522205 8 * Title: arm_cmplx_dot_prod_q31.c
emilmont 1:fdd22bb7aa52 9 *
emilmont 2:da51fb522205 10 * Description: Q31 complex dot product
emilmont 1:fdd22bb7aa52 11 *
emilmont 1:fdd22bb7aa52 12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
emilmont 1:fdd22bb7aa52 13 *
mbed_official 3:7a284390b0ce 14 * Redistribution and use in source and binary forms, with or without
mbed_official 3:7a284390b0ce 15 * modification, are permitted provided that the following conditions
mbed_official 3:7a284390b0ce 16 * are met:
mbed_official 3:7a284390b0ce 17 * - Redistributions of source code must retain the above copyright
mbed_official 3:7a284390b0ce 18 * notice, this list of conditions and the following disclaimer.
mbed_official 3:7a284390b0ce 19 * - Redistributions in binary form must reproduce the above copyright
mbed_official 3:7a284390b0ce 20 * notice, this list of conditions and the following disclaimer in
mbed_official 3:7a284390b0ce 21 * the documentation and/or other materials provided with the
mbed_official 3:7a284390b0ce 22 * distribution.
mbed_official 3:7a284390b0ce 23 * - Neither the name of ARM LIMITED nor the names of its contributors
mbed_official 3:7a284390b0ce 24 * may be used to endorse or promote products derived from this
mbed_official 3:7a284390b0ce 25 * software without specific prior written permission.
mbed_official 3:7a284390b0ce 26 *
mbed_official 3:7a284390b0ce 27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
mbed_official 3:7a284390b0ce 28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
mbed_official 3:7a284390b0ce 29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
mbed_official 3:7a284390b0ce 30 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
mbed_official 3:7a284390b0ce 31 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
mbed_official 3:7a284390b0ce 32 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
mbed_official 3:7a284390b0ce 33 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
mbed_official 3:7a284390b0ce 34 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 3:7a284390b0ce 35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
mbed_official 3:7a284390b0ce 36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
mbed_official 3:7a284390b0ce 37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
mbed_official 3:7a284390b0ce 38 * POSSIBILITY OF SUCH DAMAGE.
emilmont 1:fdd22bb7aa52 39 * -------------------------------------------------------------------- */
emilmont 1:fdd22bb7aa52 40
emilmont 1:fdd22bb7aa52 41 #include "arm_math.h"
emilmont 1:fdd22bb7aa52 42
emilmont 1:fdd22bb7aa52 43 /**
emilmont 1:fdd22bb7aa52 44 * @ingroup groupCmplxMath
emilmont 1:fdd22bb7aa52 45 */
emilmont 1:fdd22bb7aa52 46
emilmont 1:fdd22bb7aa52 47 /**
emilmont 1:fdd22bb7aa52 48 * @addtogroup cmplx_dot_prod
emilmont 1:fdd22bb7aa52 49 * @{
emilmont 1:fdd22bb7aa52 50 */
emilmont 1:fdd22bb7aa52 51
emilmont 1:fdd22bb7aa52 52 /**
emilmont 1:fdd22bb7aa52 53 * @brief Q31 complex dot product
emilmont 1:fdd22bb7aa52 54 * @param *pSrcA points to the first input vector
emilmont 1:fdd22bb7aa52 55 * @param *pSrcB points to the second input vector
emilmont 1:fdd22bb7aa52 56 * @param numSamples number of complex samples in each vector
emilmont 1:fdd22bb7aa52 57 * @param *realResult real part of the result returned here
emilmont 1:fdd22bb7aa52 58 * @param *imagResult imaginary part of the result returned here
emilmont 1:fdd22bb7aa52 59 * @return none.
emilmont 1:fdd22bb7aa52 60 *
emilmont 1:fdd22bb7aa52 61 * <b>Scaling and Overflow Behavior:</b>
emilmont 1:fdd22bb7aa52 62 * \par
emilmont 1:fdd22bb7aa52 63 * The function is implemented using an internal 64-bit accumulator.
emilmont 1:fdd22bb7aa52 64 * The intermediate 1.31 by 1.31 multiplications are performed with 64-bit precision and then shifted to 16.48 format.
emilmont 1:fdd22bb7aa52 65 * The internal real and imaginary accumulators are in 16.48 format and provide 15 guard bits.
emilmont 1:fdd22bb7aa52 66 * Additions are nonsaturating and no overflow will occur as long as <code>numSamples</code> is less than 32768.
emilmont 1:fdd22bb7aa52 67 * The return results <code>realResult</code> and <code>imagResult</code> are in 16.48 format.
emilmont 1:fdd22bb7aa52 68 * Input down scaling is not required.
emilmont 1:fdd22bb7aa52 69 */
emilmont 1:fdd22bb7aa52 70
emilmont 1:fdd22bb7aa52 71 void arm_cmplx_dot_prod_q31(
emilmont 1:fdd22bb7aa52 72 q31_t * pSrcA,
emilmont 1:fdd22bb7aa52 73 q31_t * pSrcB,
emilmont 1:fdd22bb7aa52 74 uint32_t numSamples,
emilmont 1:fdd22bb7aa52 75 q63_t * realResult,
emilmont 1:fdd22bb7aa52 76 q63_t * imagResult)
emilmont 1:fdd22bb7aa52 77 {
emilmont 1:fdd22bb7aa52 78 q63_t real_sum = 0, imag_sum = 0; /* Temporary result storage */
emilmont 1:fdd22bb7aa52 79
mbed_official 3:7a284390b0ce 80 #ifndef ARM_MATH_CM0_FAMILY
emilmont 1:fdd22bb7aa52 81
emilmont 1:fdd22bb7aa52 82 /* Run the below code for Cortex-M4 and Cortex-M3 */
emilmont 1:fdd22bb7aa52 83 uint32_t blkCnt; /* loop counter */
emilmont 1:fdd22bb7aa52 84
emilmont 1:fdd22bb7aa52 85
emilmont 1:fdd22bb7aa52 86 /*loop Unrolling */
emilmont 1:fdd22bb7aa52 87 blkCnt = numSamples >> 2u;
emilmont 1:fdd22bb7aa52 88
emilmont 1:fdd22bb7aa52 89 /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
emilmont 1:fdd22bb7aa52 90 ** a second loop below computes the remaining 1 to 3 samples. */
emilmont 1:fdd22bb7aa52 91 while(blkCnt > 0u)
emilmont 1:fdd22bb7aa52 92 {
emilmont 1:fdd22bb7aa52 93 /* CReal = A[0]* B[0] + A[2]* B[2] + A[4]* B[4] + .....+ A[numSamples-2]* B[numSamples-2] */
emilmont 1:fdd22bb7aa52 94 /* Convert real data in 2.62 to 16.48 by 14 right shifts */
emilmont 1:fdd22bb7aa52 95 real_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14;
emilmont 1:fdd22bb7aa52 96 /* CImag = A[1]* B[1] + A[3]* B[3] + A[5]* B[5] + .....+ A[numSamples-1]* B[numSamples-1] */
emilmont 1:fdd22bb7aa52 97 /* Convert imag data in 2.62 to 16.48 by 14 right shifts */
emilmont 1:fdd22bb7aa52 98 imag_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14;
emilmont 1:fdd22bb7aa52 99
emilmont 1:fdd22bb7aa52 100 real_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14;
emilmont 1:fdd22bb7aa52 101 imag_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14;
emilmont 1:fdd22bb7aa52 102
emilmont 1:fdd22bb7aa52 103 real_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14;
emilmont 1:fdd22bb7aa52 104 imag_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14;
emilmont 1:fdd22bb7aa52 105
emilmont 1:fdd22bb7aa52 106 real_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14;
emilmont 1:fdd22bb7aa52 107 imag_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14;
emilmont 1:fdd22bb7aa52 108
emilmont 1:fdd22bb7aa52 109
emilmont 1:fdd22bb7aa52 110 /* Decrement the loop counter */
emilmont 1:fdd22bb7aa52 111 blkCnt--;
emilmont 1:fdd22bb7aa52 112 }
emilmont 1:fdd22bb7aa52 113
emilmont 1:fdd22bb7aa52 114 /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
emilmont 1:fdd22bb7aa52 115 ** No loop unrolling is used. */
emilmont 1:fdd22bb7aa52 116 blkCnt = numSamples % 0x4u;
emilmont 1:fdd22bb7aa52 117
emilmont 1:fdd22bb7aa52 118 while(blkCnt > 0u)
emilmont 1:fdd22bb7aa52 119 {
emilmont 1:fdd22bb7aa52 120 /* CReal = A[0]* B[0] + A[2]* B[2] + A[4]* B[4] + .....+ A[numSamples-2]* B[numSamples-2] */
emilmont 1:fdd22bb7aa52 121 real_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14;
emilmont 1:fdd22bb7aa52 122 /* CImag = A[1]* B[1] + A[3]* B[3] + A[5]* B[5] + .....+ A[numSamples-1]* B[numSamples-1] */
emilmont 1:fdd22bb7aa52 123 imag_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14;
emilmont 1:fdd22bb7aa52 124
emilmont 1:fdd22bb7aa52 125 /* Decrement the loop counter */
emilmont 1:fdd22bb7aa52 126 blkCnt--;
emilmont 1:fdd22bb7aa52 127 }
emilmont 1:fdd22bb7aa52 128
emilmont 1:fdd22bb7aa52 129 #else
emilmont 1:fdd22bb7aa52 130
emilmont 1:fdd22bb7aa52 131 /* Run the below code for Cortex-M0 */
emilmont 1:fdd22bb7aa52 132
emilmont 1:fdd22bb7aa52 133 while(numSamples > 0u)
emilmont 1:fdd22bb7aa52 134 {
emilmont 1:fdd22bb7aa52 135 /* outReal = realA[0]* realB[0] + realA[2]* realB[2] + realA[4]* realB[4] + .....+ realA[numSamples-2]* realB[numSamples-2] */
emilmont 1:fdd22bb7aa52 136 real_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14;
emilmont 1:fdd22bb7aa52 137 /* outImag = imagA[1]* imagB[1] + imagA[3]* imagB[3] + imagA[5]* imagB[5] + .....+ imagA[numSamples-1]* imagB[numSamples-1] */
emilmont 1:fdd22bb7aa52 138 imag_sum += (q63_t) * pSrcA++ * (*pSrcB++) >> 14;
emilmont 1:fdd22bb7aa52 139
emilmont 1:fdd22bb7aa52 140 /* Decrement the loop counter */
emilmont 1:fdd22bb7aa52 141 numSamples--;
emilmont 1:fdd22bb7aa52 142 }
emilmont 1:fdd22bb7aa52 143
mbed_official 3:7a284390b0ce 144 #endif /* #ifndef ARM_MATH_CM0_FAMILY */
emilmont 1:fdd22bb7aa52 145
emilmont 1:fdd22bb7aa52 146 /* Store the real and imaginary results in 16.48 format */
emilmont 1:fdd22bb7aa52 147 *realResult = real_sum;
emilmont 1:fdd22bb7aa52 148 *imagResult = imag_sum;
emilmont 1:fdd22bb7aa52 149 }
emilmont 1:fdd22bb7aa52 150
emilmont 1:fdd22bb7aa52 151 /**
emilmont 1:fdd22bb7aa52 152 * @} end of cmplx_dot_prod group
emilmont 1:fdd22bb7aa52 153 */