i2c.h

00001 #define tm_len 134
00002 #define tc_len 135
00003 #define tc_test_len 135
00004 
00005 const int addr = 0x20;                                            //slave address 
00006 bool write_ack = false;
00007 bool read_ack = false;
00008 const int addr_pl = 0x20<<1;  //PL address
00009 const int addr_bae = 0x20; ///bae address
00010 //uint8_t rcv_isr = 0;
00011 
00012 int count = 0;
00013 
00014 char PL_I2C_DATA[134];//Payload i2c array
00015 uint8_t PL_TM_SIZE;//size of data to bev read from i2c
00016 uint32_t pdirr1;
00017 uint32_t pdirw1;
00018 
00019 void I2C_busreset()
00020 {
00021     PORTE->PCR[24] &= 0xfffffffb;    //Enabling high slew rates for SDA and SCL lines
00022     PORTE->PCR[25] &= 0xfffffffb;    //Enabling high slew rates for SDA and SCL lines
00023     I2C0->C1 &= 0x7f;               //Disabling I2C module
00024     SIM->SCGC4 &= 0xffffffbf;       //Disabling clock to I2C module
00025     SIM->SCGC4 |= 0x00000040;       //Enabling clock to I2C module
00026     I2C0->C1 |= 0x80;               //Enabling I2C module
00027     PORTE->PCR[24] |= 0x00000004;    //Disabling high slew rates for SDA and SCL lines
00028     PORTE->PCR[25] |= 0x00000004;    //Disabling high slew rates for SDA and SCL lines
00029     Thread::wait(1);                //Wait for all I2C registers to be updates to their their values
00030 }
00031 bool FCTN_I2C_READ_PL(char *data,int length)       // Returns 0 for success
00032 {    
00033     master.frequency(400000);
00034     PL_I2C_GPIO = 1;
00035     read_ack = master.read(addr_pl|1,data,length);
00036     Thread::wait(1);        //as per tests Thread::wait not required on master side. But its safe to give 1ms 
00037     pdirr1=PTE->PDIR;
00038     uint8_t i2c_count = 0;    
00039     if(read_ack == 0)   //if read_ack says success, it may or may not be successful.Hence we check SCL and SDA
00040     {
00041         while(((pdirr1 & 0x03000000)!=0x03000000)&& i2c_count<10)//checking SCL and SDA for time=10ms
00042         {
00043             Thread::wait(1);
00044             pdirr1=PTE->PDIR;
00045             i2c_count++;
00046         }
00047         if(((pdirr1 & 0x03000000)==0x03000000))//if SCL and SDA are both high
00048         {    
00049             gPC.printf("\n\rData received from PL");
00050         }
00051         else 
00052         {            
00053             I2C_busreset();
00054             read_ack = 1;
00055         }
00056     }
00057     else if (read_ack == 1)
00058     {
00059         CDMS_I2C_ERR_SPEED_COUNTER++;
00060         I2C_busreset();
00061     }
00062     
00063     PL_I2C_GPIO = 0;
00064     i2c_count = 0;
00065     return read_ack;
00066     
00067     
00068 }
00069 bool FCTN_I2C_WRITE_PL(char *data2,uint8_t tc_len2)       // Returns 0 for success
00070 {
00071     master.frequency(400000);
00072     write_ack = master.write(addr_pl|0x00,data2,tc_len2);//address to be defined in payload    
00073     Thread::wait(1);    //As per the tests Thread::wait is not required on master side but its safe to give 1ms
00074     pdirw1=PTE->PDIR;
00075     uint8_t i2c_count = 0;
00076     if(write_ack == 0)
00077     {
00078         while(((pdirw1 & 0x03000000)!=0x03000000)&& i2c_count<10)
00079         {
00080             Thread::wait(1);
00081             pdirw1=PTE->PDIR;
00082             i2c_count++;
00083         }
00084         if(((pdirw1 & 0x03000000)==0x03000000))
00085         {
00086             gPC.printf("\n\r Data sent");        
00087         }
00088         else
00089         {
00090             I2C_busreset();
00091             write_ack = 1;
00092         }
00093     }      
00094     if (write_ack == 1)
00095     {
00096         I2C_busreset();
00097         CDMS_I2C_ERR_SPEED_COUNTER++;
00098     }
00099     i2c_count = 0;
00100     return write_ack;
00101 }
00102 bool FCTN_I2C_READ(char *data,int length)       // Returns 0 for success
00103 {   
00104  //   gPC.printf("i2C_rd\r\n");
00105     master.frequency(400000);
00106     CDMS_I2C_GPIO = 1;
00107     read_ack = master.read(addr_bae|1,data,length); 
00108     Thread::wait(1);        //as per tests Thread::wait not required on master side. But its safe to give 1ms 
00109     pdirr1=PTE->PDIR;
00110     uint8_t i2c_count = 0;    
00111     if(read_ack == 0)   //if read_ack says success, it may or may not be successful.Hence we check SCL and SDA
00112     {
00113         while(((pdirr1 & 0x03000000)!=0x03000000)&& i2c_count<10)//checking SCL and SDA for time=10ms
00114         {
00115             Thread::wait(1);
00116             pdirr1=PTE->PDIR;
00117             i2c_count++;
00118         }
00119         if(((pdirr1 & 0x03000000)==0x03000000))//if SCL and SDA are both high
00120         {    
00121             //gPC.printf("\n\rData received from BAE");
00122         }
00123         else 
00124         {            
00125             I2C_busreset();
00126             read_ack = 1;
00127         }
00128     }
00129     if (read_ack == 1)
00130     {
00131         I2C_busreset();
00132         CDMS_I2C_ERR_BAE_COUNTER++;     
00133     }
00134  //  gPC.printf("end_12c_RD_\r\n");
00135     CDMS_I2C_GPIO = 0;
00136     i2c_count = 0;
00137     return read_ack;
00138 }
00139 
00140 bool FCTN_I2C_WRITE(char *data,int tc_len2)       // Returns 0 for success
00141 {    
00142    //  gPC.printf("i2C_wr\r\n");
00143     master.frequency(400000);
00144     CDMS_I2C_GPIO = 1;
00145     write_ack = master.write(addr_bae|0x00,data,tc_len2); 
00146     Thread::wait(1);   //As per the tests Thread::wait is not required on master side but its safe to give 1ms
00147     pdirw1=PTE->PDIR;
00148     uint8_t i2c_count = 0;
00149     if(write_ack == 0)
00150     {
00151         while(((pdirw1 & 0x03000000)!=0x03000000)&& i2c_count<10)
00152         {
00153             Thread::wait(1);
00154             pdirw1=PTE->PDIR;
00155             i2c_count++;
00156         }
00157         if(((pdirw1 & 0x03000000)==0x03000000))
00158         {
00159             //gPC.printf("\n\r Data sent");        
00160         }
00161         else
00162         {
00163             I2C_busreset();
00164             write_ack = 1;
00165         }
00166     }      
00167     if (write_ack == 1)
00168     {
00169         I2C_busreset();
00170         CDMS_I2C_ERR_BAE_COUNTER++;
00171     }
00172   //   gPC.printf("i2C_wr_end\r\n");
00173     CDMS_I2C_GPIO = 0;
00174     i2c_count = 0;
00175     return write_ack;
00176 }