adf.h

00001 //without reset feature , with state checks.
00002 
00003 #ifndef ADF_H    // To make sure you don't declare the function more than once by including the header multiple times.
00004 #define ADF_H
00005 
00006 InterruptIn IRQ(ADF_IRQ);
00007 //Ticker ticker;
00008 #include "OBSRS.h" 
00009 bool loop_on;
00010 bool ADF_off;
00011 bool buffer_state;
00012 bool finish_write_data;
00013 uint8_t signal = 0x00;
00014 //unsigned char bbram_buffer[66]={0x19,0x00,0x60,0x00,0x00,0x00,0x00,0x00,0x00,0x33,0x00,0xFB,0xC2,0x10,0xC0,0x00,0x30,0x31,0x07,0x00,0x01,0x00,/*PA Level Byte*/0x57/*PA Parameters*/,0x08/*GMSK_modulation*/,0x0B,0x37,0x00,0x00,0x40,0x0C,0x00,0x05,0x00,0x00,0x18,0x12,0x34,0x56,0x20,0x10,0xC4,0x14,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x70,0xE0,0x00,0x10,0x04,0x00,0x00,0x00,0x00,0x00};
00015 unsigned char bbram_buffer[66]={0x19,0x00,0x60,0x00,0x00,0x00,0x00,0x00,0x00,0x33,0x00,0xF5,0xC2,0x10,0xC0,0x00,0x30,0x31,0x07,0x00,0x01,0x00,/*PA Level Byte*/0x57/*PA Parameters*/,0x08/*GMSK_modulation*/,0x0B,0x37,0x00,0x00,0x40,0x0C,0x00,0x05,0x00,0x00,0x18,0x12,0x34,0x56,0x20,0x10,0xC4,0x14,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x70,0xE0,0x00,0x10,0x04,0x00,0x00,0x00,0x00,0x00};
00016 
00017 bool data_irq_err=0;
00018 bool data_err= false;
00019 unsigned char temp_byte=0x00;
00020 unsigned char data_err1[112];
00021 unsigned char data_err_cnt=0;
00022 unsigned int byte_count =0;
00023 #define DATA_ERR_THRS 20
00024 bool rolling_buffer_settings_error=true;
00025 bool bbram_write_success=true;
00026 int bbram_err_cnt=0;
00027 int rbp_err_cnt=0;
00028 bool reset_flag=false;
00029 #define RBP_THRS 4
00030 bool quit_configuration=false;
00031 bool power_reset_flag=false;
00032 unsigned int power_reset_count=0;
00033 bool Configuration_done=false;
00034 #define HW_THRS 2
00035 bool hw_reset_flag = false;
00036 uint8_t firstbyte;
00037 uint8_t secondbyte;
00038 unsigned char buffer_112[112];
00039 int loop_conter = 0;
00040 int loop_cntr = 0;
00041 //ADF temperature reading
00042 #define temp_correction_value 0
00043 
00044 #define TRANSMIT_LEN_1 0xFF
00045 #define TRANSMIT_LEN_2 0xFF
00046 /***/
00047 Timer T;
00048  
00049 #define START_ADDRESS 0x020;
00050 #define MISO_PIN PTE3
00051 /**************Defining Counter Limits**************/
00052 #define THRS 20
00053 #define STATE_ERR_THRS 20
00054 #define PHY_OFF_EXEC_TIME 300
00055 #define PHY_ON_EXEC_TIME 300
00056 #define PHY_TX_EXEC_TIME 600
00057 /******DEFINING COMMANDS*********/
00058 #define CMD_HW_RESET 0xC8
00059 #define CMD_PHY_ON 0xB1
00060 #define CMD_PHY_OFF 0xB0
00061 #define CMD_PHY_TX 0xB5
00062 #define CMD_CONFIG_DEV 0xBB
00063 /**STATES**/
00064 //=======================
00065 #define PHY_OFF 0xB1
00066 #define PHY_ON 0xB2
00067 #define PHY_TX 0xB4
00068 #define BUSY 0x00
00069 //===================================================
00070 
00071 #define POWER_RESET_THRS 2
00072 #define HW_RESET_THRS 2
00073 
00074 unsigned int Adf_data_counter=0;
00075 unsigned char status =0;
00076 unsigned int cmd_err_cnt=0;
00077 unsigned int data_length;
00078 unsigned int state_err_cnt=0;
00079 unsigned int miso_err_cnt=0;
00080 unsigned int hw_reset_err_cnt=0;
00081 unsigned int counter =0;
00082 bool temp_return = 0;
00083 bool bcn_flag=0;
00084 bool bbram_flag=0;
00085 bool last_buffer =0;
00086 bool stop_transmission=false;
00087 
00088 #define reset_flags {\
00089 finish_write_data = false;\
00090 buffer_state = true;\
00091 last_buffer = false;\
00092 loop_on = true;\
00093 ADF_off = false;\
00094 buffer_state = true;\
00095 loop_on = true;\
00096 ADF_off = false;\
00097 /*sent_tmfrom_SDcard = false;*/\
00098 Adf_data_counter=0;\
00099 status =0;\
00100 cmd_err_cnt=0;\
00101 data_length;\
00102 state_err_cnt=0;\
00103 miso_err_cnt=0;\
00104 hw_reset_err_cnt=0;\
00105 counter =0;\
00106 bcn_flag=0;\
00107 bbram_flag=0;\
00108 stop_transmission=false;\
00109     }
00110 
00111 
00112 int err_arr[64];
00113 bool bbram_err=false;
00114 int err_idx=-1;
00115 int err[64];
00116 #define bbram_check gCS_ADF=0;\
00117     for(int i=0;i<64;i++){\
00118         err_arr[i]=0;\
00119         }\
00120     for(int i=0;i<64;i++){\
00121         err[i]=0;\
00122         }\
00123     bbram_err=false;\
00124     gCS_ADF=0;\
00125     spi.write(0x39);\
00126     spi.write(0x00);\
00127     spi.write(0xFF);\
00128     for(int i=0;i<64;i++){\
00129         err_arr[i]=spi.write(0xFF);\
00130         if(err_arr[i]!=bbram_buffer[i+2]){\
00131             err[i]=1;\
00132             bbram_err=true;\
00133             }\
00134     }\
00135     gCS_ADF=1;\
00136     if(!bbram_err)\
00137         /*gPC.printf("BBRAM verified \r\n")*/;\
00138     else\
00139         gPC.printf("BBRAM error \r\n");\
00140  
00141 
00142 bool tx_loop=1;
00143 
00144 #define PRNT_ONCE {\
00145     gPC.printf("%d %d lol_ what?\r\n",segment_len,EOS_len);\
00146     }
00147  
00148 #define bbram_write {\
00149     gCS_ADF=0;\
00150     spi.write(0xB0);\
00151     wait_us(300);\
00152     gCS_ADF=1;\
00153     gCS_ADF=0;\
00154     for(int i=0;i<66;i++){\
00155         spi.write(bbram_buffer[i]);\
00156     }\
00157     gCS_ADF=1;\
00158 }
00159 //------------------------------------------------------------------------
00160 // state checking functions
00161 //bool assrt_phy_off( int, int, int);
00162 //bool assrt_phy_on( int,int,int);
00163 //bool assrt_phy_tx(int,int,int);
00164 
00165 #define check_status {\
00166     unsigned char stat=0;\
00167     gCS_ADF=0;\
00168     spi.write(0xFF);\
00169     stat = spi.write(0xFF);\
00170     gCS_ADF=1;\
00171     status = stat;\
00172 }
00173 /***********************/
00174 /**********Restart ADF**************/
00175 
00176 /**************************/
00177 
00178 /*CMD_VAR*/
00179 bool cmd_bit=true;
00180 bool cmd_err_flag=false;
00181 unsigned char command = 0x00;
00182 void CMD(uint8_t command) {
00183     cmd_err_cnt=0;
00184     cmd_err_flag=false;
00185     while(cmd_err_cnt<3) {
00186         check_status;
00187         cmd_bit=status&0x20;
00188         if(cmd_bit) {
00189             gCS_ADF=0;
00190             spi.write(command);
00191             gCS_ADF=1;
00192             break;
00193         } else {
00194             wait_us(5);
00195             cmd_err_cnt++;
00196         }
00197     }
00198     if(cmd_err_cnt==3) {
00199         cmd_err_flag=true;
00200     }
00201 }
00202 
00203 // all three arguments are int
00204 #define assrt_phy_off {\
00205     int state_err_cnt = 0;\
00206     CMD(CMD_PHY_OFF);\
00207     if(cmd_err_flag){\
00208         temp_return=1;\
00209         }\
00210     else{\
00211         for(int i = 0 ; i < 40 ;i++){\
00212             CMD(CMD_PHY_OFF);\
00213             check_status;\
00214             if(status == PHY_OFF){\
00215                 temp_return = 0;\
00216             break;\
00217             }\
00218             else if(state_err_cnt>THRS){\
00219                 temp_return = 1;\
00220             break;\
00221             }\
00222             else {\
00223                 wait_ms(1);\
00224             }\
00225         }\
00226     }\
00227 }
00228 
00229 bool dummy_digitalOut_1=0;
00230 #define power_reset{\
00231     dummy_digitalOut_1=0;\
00232     wait_ms(10);\
00233     dummy_digitalOut_1=1;\
00234     power_reset_flag=false;\
00235     power_reset_count++;\
00236     wait_ms(10);\
00237     }\
00238 
00239 void get_temp_and_txcurr(){
00240 /*ADF Temperature reading*/;
00241                 gCS_ADF=0;
00242                 spi.write(0x1B);
00243                 spi.write(0x24);
00244                 spi.write(0x10);
00245                 gCS_ADF=1;
00246                 gCS_ADF=0;
00247                 spi.write(0x1B);
00248                 spi.write(0x25);
00249                 spi.write(0x02);
00250                 gCS_ADF=1;
00251                 gCS_ADF=0;
00252                 spi.write(0x1B);
00253                 spi.write(0x59);
00254                 spi.write(0x08);
00255                 gCS_ADF=1;
00256 
00257                 gCS_ADF=0;
00258                 spi.write(0x3B);
00259                 spi.write(0x28);
00260                 spi.write(0xFF);
00261                 firstbyte = spi.write(0xFF);
00262                 gCS_ADF=1;
00263                 gCS_ADF=0;
00264                 spi.write(0x3B);
00265                 spi.write(0x27);
00266                 spi.write(0xFF);
00267                 secondbyte = spi.write(0xFF);
00268                 gCS_ADF=1;
00269                 
00270                 COM_ADF_TMP = (firstbyte & 0xC0) >> 6;
00271                 //COM_ADF_TMP |= secondbyte & 0xfc;
00272                 secondbyte = (secondbyte & 0x3F) << 2;
00273                 COM_ADF_TMP = secondbyte | firstbyte;
00274                 COM_ADF_TMP = 0.9474*(COM_ADF_TMP - 28) +28.2;
00275                 
00276                 gPC.printf("\n\rCOM_ADF_TMP : %d \n",COM_ADF_TMP);
00277                 /*uint8_t txcurr = (3.3*COM_TX_OC_FAULT)/(0.05)*100;*///    ID_current
00278                 
00279                 
00280                 
00281     }
00282     
00283 void get_com_oc_sw_status()
00284 {
00285     COM_OC_SET = 1;
00286     if (COM_TX_OC_FAULT){\
00287          com_oc_sw_status = 0x1;\
00288     }\
00289     else{\
00290         com_oc_sw_status = 0;\
00291     }\
00292 } 
00293 
00294 bool hardware_reset(int bcn_call)
00295 {
00296      if(hw_reset_err_cnt>HW_RESET_THRS){
00297         power_reset_flag=true;
00298         power_reset;
00299         return 0;
00300     }
00301     
00302     for(int i= 0; i < 2 ; i++) {
00303         gCS_ADF=0;
00304         spi.write(CMD_HW_RESET);
00305         gCS_ADF=1;
00306         wait_ms(2);// Typically 1 ms
00307         int count=0;
00308         temp_return = 0;
00309         while(count<10 && miso_err_cnt<10) {
00310             if(MISO_PIN) {
00311 //                assrt_phy_off;
00312 /*asseert_phyoff Starts**/
00313 {\
00314     int state_err_cnt = 0;\
00315     CMD(CMD_PHY_OFF);\
00316     if(cmd_err_flag){\
00317         temp_return=1;\
00318         }\
00319     else{\
00320         for(int i = 0 ; i < 40 ;i++){\
00321             CMD(CMD_PHY_OFF);\
00322             check_status;\
00323             if(status == PHY_OFF){\
00324                 temp_return = 0;\
00325             break;\
00326             }\
00327             else if(state_err_cnt>THRS){\
00328                 temp_return = 1;\
00329             break;\
00330             }\
00331             else {\
00332                 wait_ms(1);\
00333             }\
00334         }\
00335     }\
00336 }\
00337 /*Assert_phy_off_ends*/
00338 
00339 
00340 
00341 
00342 
00343                 if(!temp_return){
00344                     return 0;
00345                 }
00346                 count++;
00347             } else {
00348                 wait_us(50);
00349                 miso_err_cnt++;
00350             }
00351         }
00352     }
00353     return 1;
00354 }
00355 //for reseting the transmission call assert function after b5 and b1. after b1 assert_phi_on and after b5 assert_phi_tx.
00356 //----------------------------------------------------------------------------
00357 unsigned char temp;
00358 bool reg_err;
00359 int reg_err_cnt;
00360 #define REG_ERR_THRS 5
00361 #define reg_check(addr1,addr2,reg_val){\
00362  gCS_ADF=0;\
00363         reg_err=false;\
00364         spi.write(addr1);\
00365         spi.write(addr2);\
00366         spi.write(0xFF);\
00367         temp = spi.write(0xFF);\
00368         if(temp==reg_val)\
00369             reg_err = false;\
00370         else\
00371             reg_err=true;\
00372     gCS_ADF=1;\
00373 }
00374 
00375 #define initiate {\
00376     gCS_ADF=0;\
00377     spi.write(0xFF);\
00378     spi.write(0xFF);\
00379     gCS_ADF=1;\
00380     reg_err=true;\
00381     for(reg_err_cnt=0;reg_err_cnt<REG_ERR_THRS && reg_err;reg_err_cnt++){\
00382         gCS_ADF=0;\
00383         spi.write(0x08);\
00384         spi.write(0x14);\
00385         spi.write(TRANSMIT_LEN_1);\
00386         gCS_ADF=1;\
00387         reg_check(0x28,0x14,TRANSMIT_LEN_1);\
00388     }\
00389     if(reg_err)\
00390         gPC.printf("Reg_err_ignored %x \r\n",(int)temp);\
00391     else\
00392         /*gPC.printf("reg written successful %x \r\n",(int)temp)*/;\
00393     reg_err=true;\
00394     for(reg_err_cnt=0;reg_err_cnt<REG_ERR_THRS && reg_err;reg_err_cnt++){\
00395         gCS_ADF=0;\
00396         spi.write(0x08);\
00397         spi.write(0x15);\
00398         spi.write(TRANSMIT_LEN_2);\
00399         gCS_ADF=1;\
00400         reg_check(0x28,0x15,TRANSMIT_LEN_2);\
00401     }\
00402     if(reg_err)\
00403         gPC.printf("Reg_err_ignored %x \r\n",(int)temp);\
00404     else\
00405         gPC.printf("reg written successful %x \r\n",(int)temp);\
00406 }
00407 
00408 #define write_data {\
00409     counter++;\
00410     if(counter==584){\
00411         finish_write_data=true;\
00412         restart_adf_flag=true;\
00413         counter=0;\
00414         }\
00415     gCS_ADF=0;\
00416         spi.write(0x0B);\
00417         spi.write(0x36);\
00418         spi.write(0xFF);\
00419     gCS_ADF=1;\
00420     data_err_cnt=0;\
00421     data_err=true;\
00422     while(data_err && (data_err_cnt<DATA_ERR_THRS)){\
00423         gCS_ADF=0;\
00424         if(buffer_state){\
00425             spi.write(0x18);\
00426             spi.write(0x20);\
00427             for(unsigned char i=0; i<112;i++){\
00428                     spi.write(buffer_112[i]);\
00429                     /*gPC.printf("0x%X,",spi.write(buffer_112[i]));*/\
00430             }\
00431         }\
00432         else{\
00433             spi.write(0x18);\
00434             spi.write(0x90);\
00435             for(unsigned char i=0; i<112;i++){\
00436                     spi.write(buffer_112[i]);\
00437                 /*gPC.printf("0x%X,",spi.write(buffer_112[i]));*/\
00438             }\
00439         }\
00440         gCS_ADF=1;\
00441         wait_us(5);\
00442         data_err=false;\
00443         gCS_ADF=0;\
00444         spi.write(0x38);\
00445         if(buffer_state){\
00446             spi.write(0x20);\
00447             }\
00448         else{\
00449             spi.write(0x90);\
00450             }\
00451         spi.write(0xFF);\
00452         for(unsigned char i=0; i<112;i++){\
00453             temp_byte=spi.write(0xFF);\
00454             if(buffer_112[i]!=temp_byte){\
00455                 data_err1[i]=1;\
00456                 data_err=true;\
00457                 }\
00458         }\
00459     gCS_ADF=1;\
00460     /*SPI_mutex.unlock();*/\
00461     if(data_err==false){\
00462     buffer_state = !buffer_state;\
00463         data_err_cnt++;\
00464     }\
00465     if(last_buffer){\
00466         finish_write_data = true;\
00467            /*gPC.puts("adf_off\r\n");*/\
00468         }\
00469     }\
00470 }
00471 
00472 #define check {\
00473     check_status;\
00474     /*gPC.printf("I 0x%X\r\n",(int)status);*/\
00475     if(IRQ){\
00476         get_com_oc_sw_status();\
00477         /*gPC.printf("det\r\n");*/\
00478         if(!ADF_off) {\
00479             if(finish_write_data || restart_adf_flag) {\
00480                 write_data;\
00481                 ADF_off=true;\
00482                 T.stop();\
00483                 T.reset();\
00484                 T.start();\
00485                 /*ADF Temperature reading*/;\
00486                 get_temp_and_txcurr();\
00487             } else {\
00488                 T.stop();\
00489                 T.reset();\
00490                 T.start();\
00491                 write_data;\
00492                 if(sent_tmfrom_SDcard){\
00493                 send_tm_from_SD_card_fun(buffer_112,last_buffer);\
00494                 }\
00495                 else snd_tm.transmit_data(buffer_112,&last_buffer);\
00496             }\
00497         } else {\
00498             wait_ms(20);\
00499             gCS_ADF=0;\
00500             spi.write(0xB1);\
00501             gCS_ADF=1;\
00502             gPC.puts("transmission done\r\n");\
00503             /*gPC.printf("Time taken by last write_data %f msecs\n", T.read_ms())*/;\
00504             T.stop();\
00505             T.reset();\
00506             loop_on=false;\
00507             break;\
00508             /*if(restart_adf_flag)*/\
00509             if(0)\
00510             {\
00511                 restart_adf_flag=false;\
00512                 ADF_off=false;\
00513                 send_data;\
00514                 loop_on=true;\
00515                 CMD(CMD_PHY_TX);\
00516                 wait_us(2000);\
00517                 }\
00518         }\
00519     }\
00520     else{\
00521         if(T.read_us()>98000){\
00522                 data_irq_err=true;\
00523                 CMD(CMD_PHY_ON);\
00524                 gPC.printf("Data_error_detected");\
00525                 T.stop();\
00526                 T.reset();\
00527                 }\
00528         }\
00529 }
00530 
00531 #define send_data {\
00532     gCS_ADF=0;\
00533     spi.write(0xBB);\
00534     gCS_ADF=1;\
00535     gCS_ADF=0;\
00536     spi.write(0xFF);\
00537     spi.write(0xFF);\
00538     gCS_ADF=1;\
00539     if(sent_tmfrom_SDcard){\
00540         send_tm_from_SD_card_fun(buffer_112,last_buffer);\
00541     }else{\
00542         snd_tm.transmit_data(buffer_112,&last_buffer);\
00543     }\
00544     write_data;\
00545     if(sent_tmfrom_SDcard){\
00546         send_tm_from_SD_card_fun(buffer_112,last_buffer);\
00547     }else{\
00548         snd_tm.transmit_data(buffer_112,&last_buffer);\
00549     }\
00550     write_data;\
00551     if(sent_tmfrom_SDcard){\
00552         send_tm_from_SD_card_fun(buffer_112,last_buffer);\
00553     }else{\
00554         snd_tm.transmit_data(buffer_112,&last_buffer);\
00555     }\
00556     gCS_ADF=0;\
00557     spi.write(0xB1);\
00558     gCS_ADF=1;\
00559     wait_us(300);\
00560     gCS_ADF=0;\
00561     spi.write(0xFF);\
00562     spi.write(0xFF);\
00563     gCS_ADF=1;\
00564     gCS_ADF=0;\
00565     spi.write(0xB5);\
00566     gCS_ADF=1;\
00567     wait_us(300);\
00568     gCS_ADF=0;\
00569     spi.write(0xFF);\
00570     spi.write(0xFF);\
00571     gCS_ADF=1;\
00572 }
00573   
00574 #define initial_adf_check {\
00575     bool Configuration_Done=false;\
00576     quit_configuration=false;\
00577     bool reset_flag1 = 0;\
00578     bool flag = false;\
00579     while((hw_reset_err_cnt<HW_THRS)&&(quit_configuration==false)){\
00580         while((bbram_err_cnt<2)&&(quit_configuration==false)){\
00581             /*assrt_phy_off;*/\
00582             /*Assrt_phy_off Begin*/\
00583             {\
00584     int state_err_cnt = 0;\
00585     CMD(CMD_PHY_OFF);\
00586     if(cmd_err_flag){\
00587         temp_return=1;\
00588         }\
00589     else{\
00590         for(int i = 0 ; i < 40 ;i++){\
00591             CMD(CMD_PHY_OFF);\
00592             check_status;\
00593             if(status == PHY_OFF){\
00594                 temp_return = 0;\
00595             break;\
00596             }\
00597             else if(state_err_cnt>THRS){\
00598                 temp_return = 1;\
00599             break;\
00600             }\
00601             else {\
00602                 wait_ms(1);\
00603             }\
00604         }\
00605     }\
00606 }\
00607             /*Assrt_phy_off end*/\
00608             reset_flag1=temp_return;\
00609             if(!reset_flag1){\
00610                 bbram_write;\
00611                 while((rbp_err_cnt<RBP_THRS)&&(quit_configuration==false)){\
00612                     bbram_check;\
00613                     if(bbram_err==0){\
00614                         bbram_write_success=true;\
00615                         bbram_err_cnt=0;\
00616                         initiate;\
00617                         if(reg_err){\
00618                             rbp_err_cnt++;\
00619                             }\
00620                         else{\
00621                             rbp_err_cnt=0;\
00622                             /*gPC.printf("NO Reg err\r\n")*/;\
00623                             CMD(CMD_CONFIG_DEV);\
00624                             if(cmd_err_flag){\
00625                                 reset_flag=1;\
00626                                 gPC.printf("CMD ERR\r\n");\
00627                                 loop_cntr++;\
00628                                 if (loop_cntr > 30){loop_cntr = 0;break;}\
00629                             }\
00630                             else{\
00631                                 reset_flag=0;\
00632                                 /*gPC.printf("NO CMD ERR CONFIG_DONE\r\n")*/;\
00633                                 quit_configuration=true;\
00634                             }\
00635                         }\
00636                     }\
00637                     else{\
00638                         bbram_write_success=false;\
00639                         bbram_err_cnt++;\
00640                         break;\
00641                     }\
00642                 }\
00643             }\
00644             else{\
00645                 break;\
00646             }\
00647         }\
00648         if(reset_flag1){\
00649             hardware_reset(0);\
00650             hw_reset_err_cnt++;\
00651             gPC.puts("Resetting hardware\r\n");\
00652         }\
00653     }\
00654     if(hw_reset_err_cnt==HW_THRS){\
00655         power_reset_flag=1;\
00656         power_reset_count++;\
00657         }\
00658     else{\
00659         Configuration_Done=true;\
00660         gPC.printf("Configuration_Done\n");\
00661         }\
00662 }
00663 
00664 #define configure_adf {\
00665     reset_flags;\
00666     initial_adf_check;\
00667     gPC.puts("Config_part done\r\n");\
00668 }
00669 //obsrs_flag must be put high in obsrs 
00670 bool retransmit = true;
00671 bool configure = true;
00672 void transmit_adf(){
00673     configure =true;
00674     
00675     
00676 while(retransmit||configure){
00677     configure =0;
00678     retransmit=0;
00679     loop_conter = 0;//to prevent from going into infinite while loop
00680 while(power_reset_count<POWER_RESET_THRS){     
00681     restart_adf_flag=false;
00682     bool tx_err=false;
00683     configure_adf;
00684     send_data;
00685     /*PA MCR level*/;
00686     gCS_ADF=0;
00687     spi.write(0x1B);
00688     spi.write(0x07);
00689    //     spi.write(0x35);
00690    // spi.write(0x36);
00691     spi.write(0x34);  //PA Output = 30.8
00692     gCS_ADF=1;
00693     CMD(CMD_PHY_TX);
00694     wait_us(2000);
00695     T.start();
00696     while(loop_on){
00697         wait_us(20);
00698         check;
00699         if(data_irq_err||tx_err){
00700             hw_reset_err_cnt++;
00701             hw_reset_flag=true;
00702         break;
00703         }
00704     }
00705     if(hw_reset_flag==true){
00706         hardware_reset(0);
00707         }
00708     else{
00709         break;
00710     }
00711     gPC.puts("after while looprn");
00712     loop_conter++;
00713     if (loop_conter > 2){break;gPC.printf("\nERROR: TM DROPPED");}//to prevent from going into infinite while loop
00714     
00715 }
00716 if(restart_adf_flag){
00717         retransmit=true;
00718         restart_adf_flag=false;
00719         }
00720 }
00721 if(ack_head != NULL){
00722 while(ack_head != NULL){
00723                            
00724                            Base_tm *temp_pointer = ack_head->next_TM;
00725                            delete ack_head;
00726 //                           gPC.printf("deleting stuff\n\r");
00727                            ack_head = temp_pointer;
00728                         }                        
00729                         }
00730 }
00731 #endif