Team Fox / Mbed 2 deprecated CDMS_QM_03MAR2017_Flash_with_obsrs

working version

Dependencies:   mbed mbed-rtos SimpleDMA FreescaleIAP eeprom

Fork of CDMS_CODE_FM_28JAN2017 by samp Srinivasan

DefinitionsAndGlobals.h@262:752c8689944a, 2016-07-14 (annotated)

Committer:
aniruddhv
Date:
Thu Jul 14 17:57:05 2016 +0000
Revision:
262:752c8689944a
Parent:
261:1e54415b34d3
Child:
264:f7d8f9f361e3
Merged Aniruddh's code, changed power_on and power_off BAE, added PAHOT and PAOC measurements, added sys_reset_cdms timer

Who changed what in which revision?

UserRevisionLine numberNew contents of line
shreeshas95 0:f016e9e8d48b 1 // **************DEFINITIONS*********************
aniruddhv 69:20f09a0c3fd2 2
chaithanyarss 261:1e54415b34d3 3 #define bypass_adf 1
ee12b079 252:9c631b2f5da8 4 #define dma 0
aniruddhv 69:20f09a0c3fd2 5
shreeshas95 0:f016e9e8d48b 6 // COM_RX
shreeshas95 5:ab276a17ca07 7 #define RX_TIMEOUT_LIMIT 0.5
chaithanyarss 261:1e54415b34d3 8 //#define COM_RX_UART_TX PTE20 // For bypassing RX1M (SET BAUD RATE 1200) #define COM_RX_UART_TX USBTX
chaithanyarss 261:1e54415b34d3 9 //#define COM_RX_UART_RX PTE21 // For bypassing RX1M (SET BAUD RATE 1200) #define COM_RX_UART_RX USBRX
ee12b079 81:1a39e9e14771 10
chaithanyarss 261:1e54415b34d3 11 #define COM_RX_UART_TX USBTX
chaithanyarss 261:1e54415b34d3 12 #define COM_RX_UART_RX USBRX
aniruddhv 56:a88e16f6c18e 13
shreeshas95 0:f016e9e8d48b 14 // COMMON SPI
shreeshas95 0:f016e9e8d48b 15 #define SPI_MOSI PTE1
ee12b079 185:3b3cd96a7811 16 #define SPI_MISO PTE3
shreeshas95 0:f016e9e8d48b 17 #define SPI_CLK PTE2
shreeshas95 1:a0055b3280c8 18 #define SPI_CS_ADF PTA15
ee12b079 114:9fb55057b13f 19 #define SPI_CS_SDC PIN20
chaithanyarss 261:1e54415b34d3 20 //#define SPI_CS_RTC PIN26
chaithanyarss 261:1e54415b34d3 21 #define SPI_CS_RTC PIN60
shreeshas95 2:2caf2a9a13aa 22
shreeshas95 4:104dd82c99b8 23 // COM_TX
shreeshas95 4:104dd82c99b8 24 #define COM_TX_CONFIG_LIMIT 3
aniruddhv 52:0bd68655c651 25 #define COM_TX_TICKER_LIMIT 32
shreeshas95 4:104dd82c99b8 26
ee12b079 209:63e9c8f8b5d2 27 // ADF INTERRUPT
shreeshas95 2:2caf2a9a13aa 28 #define ADF_IRQ PTA14
ee12b079 161:a63672bf4423 29
ee12b079 162:48fda0b8d573 30 //I2C - Payload to CDMS (need to change while using CDMS hardware);
ee12b079 209:63e9c8f8b5d2 31 I2C master(PIN32,PIN31);
ee12b079 209:63e9c8f8b5d2 32 DigitalIn PL_I2C_Intr(PTC13);
ee12b079 209:63e9c8f8b5d2 33 DigitalOut PL_I2C_GPIO(PTC1);
ee12b079 209:63e9c8f8b5d2 34
ee12b079 162:48fda0b8d573 35 //I2C - CDMS to BAE
ee12b079 245:da9d1bd999da 36 DigitalIn BAE_I2C_GPIO(PIN67);//PTB21 from bae to cdms
ee12b079 245:da9d1bd999da 37 DigitalOut CDMS_I2C_GPIO(PIN39);//PTA5 from cdms to bae
ee12b079 162:48fda0b8d573 38
shreeshas95 0:f016e9e8d48b 39 // TC LIST
shreeshas95 2:2caf2a9a13aa 40 #define TCL_STATE_INCOMPLETE 0x00
aniruddhv 262:752c8689944a 41 #define TCL_STATE_ABORTED 0x01
aniruddhv 262:752c8689944a 42 #define TCL_STATE_EXECUTING 0x02
aniruddhv 262:752c8689944a 43 #define TCL_STATE_COMPLETED 0x03
shreeshas95 0:f016e9e8d48b 44
shreeshas95 0:f016e9e8d48b 45 // LIST OF FLAGS
shreeshas95 2:2caf2a9a13aa 46 #define UART_INT_FLAG 0x0001
shreeshas95 2:2caf2a9a13aa 47 #define NEW_TC_RECEIVED 0x0002
shreeshas95 2:2caf2a9a13aa 48 #define COM_SESSION_FLAG 0x0004
shreeshas95 2:2caf2a9a13aa 49 #define COM_RX_FLAG 0x0008
shreeshas95 2:2caf2a9a13aa 50 #define COM_MNG_TMTC_RUNNING_FLAG 0x0010
shreeshas95 2:2caf2a9a13aa 51 #define COM_SESSION_VALIDITY 0x0020
shreeshas95 2:2caf2a9a13aa 52 #define ALL_CRC_PASS_FLAG 0x0040
shreeshas95 2:2caf2a9a13aa 53 #define COM_PA_HOT_FLAG 0x0080
aniruddhv 262:752c8689944a 54 #define COM_PA_OC_FLAG 0x8000
shreeshas95 2:2caf2a9a13aa 55 #define COM_TX_FLAG 0x0100
shreeshas95 6:79d422d1ed42 56 #define COM_SESSION_TIMEOUT_FLAG 0x0200
ee12b079 209:63e9c8f8b5d2 57 #define COM_AUTO_POWER_OFF_BAE_FLAG 0x0400
ee12b079 209:63e9c8f8b5d2 58 #define BAE_SW_EN_FLAG 0x0800
ee12b079 209:63e9c8f8b5d2 59 #define RF_SW_STATUS_FLAG 0x1000
ee12b079 209:63e9c8f8b5d2 60 #define COM_INIT_STATUS_FLAG 0x2000
ee12b079 209:63e9c8f8b5d2 61 #define COM_TX_STATUS_FLAG 0x4000
ee12b079 209:63e9c8f8b5d2 62
ee12b079 209:63e9c8f8b5d2 63 //RF relay STATUS
ee12b079 209:63e9c8f8b5d2 64 #define RF_COM_TX 0
ee12b079 209:63e9c8f8b5d2 65 #define RF_BCN 1
shreeshas95 0:f016e9e8d48b 66
shreeshas95 0:f016e9e8d48b 67 // COM_MNG_TMTC THREAD
shreeshas95 6:79d422d1ed42 68 #define SESSION_TIME_LIMIT 1500
shreeshas95 0:f016e9e8d48b 69 #define COM_MNG_TMTC_SIGNAL_UART_INT 0x01
shreeshas95 0:f016e9e8d48b 70 #define COM_MNG_TMTC_SIGNAL_ADF_NSD 0x02
shreeshas95 0:f016e9e8d48b 71 #define COM_MNG_TMTC_SIGNAL_ADF_SD 0x03
aniruddhv 262:752c8689944a 72 #define cdms_reset_timeout 345600000
ee12b079 245:da9d1bd999da 73
shreeshas95 0:f016e9e8d48b 74 // COM_MNG_TMTC
shreeshas95 2:2caf2a9a13aa 75 #define COM_PA_COOLING_TIME_LIMIT 20
aniruddhv 262:752c8689944a 76 #define COM_MAX_TC_LIMIT 256
shreeshas95 4:104dd82c99b8 77 #define TM_ACK_CODE_INDEX 2
shreeshas95 5:ab276a17ca07 78 #define CRC_FAIL_NACK_CODE 0x01
shreeshas95 2:2caf2a9a13aa 79
shreeshas95 2:2caf2a9a13aa 80 // call sign
shreeshas95 2:2caf2a9a13aa 81 #define PSC_CALLSIGN 0x00
shreeshas95 2:2caf2a9a13aa 82 #define APID_CALLSIGN 0x00
shreeshas95 2:2caf2a9a13aa 83
shreeshas95 2:2caf2a9a13aa 84 // max value of telecommands in a tcl
shreeshas95 2:2caf2a9a13aa 85 #define TCL_OVERFLOW_CONSTANT 256
shreeshas95 4:104dd82c99b8 86 #define TM_OVERFLOW_CONSTANT 256
aniruddhv 262:752c8689944a 87 #define BYTE_OVERFLOW_CONSTANT 35000
shreeshas95 2:2caf2a9a13aa 88
shreeshas95 0:f016e9e8d48b 89 // starting value of packet sequence count at each pass
shreeshas95 0:f016e9e8d48b 90 #define PSC_START_VALUE 1
shreeshas95 0:f016e9e8d48b 91
shreeshas95 0:f016e9e8d48b 92 // APID list
aniruddhv 52:0bd68655c651 93 #define APID_COM 0
shreeshas95 0:f016e9e8d48b 94 #define APID_BAE 1
shreeshas95 0:f016e9e8d48b 95 #define APID_CDMS 2
shreeshas95 0:f016e9e8d48b 96 #define APID_SPEED 3
shreeshas95 0:f016e9e8d48b 97
aniruddhv 52:0bd68655c651 98 //SERVICE
aniruddhv 52:0bd68655c651 99 #define SERVICE_OBOSC 0xB
aniruddhv 52:0bd68655c651 100 #define SERVICE_OBSRS 0xF
aniruddhv 52:0bd68655c651 101
shreeshas95 0:f016e9e8d48b 102 // HIGH PRIORITY TC - priority list
shreeshas95 0:f016e9e8d48b 103 // not correct values here
shreeshas95 0:f016e9e8d48b 104 #define HPTC1 5
shreeshas95 0:f016e9e8d48b 105 #define HPTC2 6
shreeshas95 0:f016e9e8d48b 106 // Add more entries above
shreeshas95 0:f016e9e8d48b 107
shreeshas95 0:f016e9e8d48b 108 // TMID list
shreeshas95 0:f016e9e8d48b 109 #define TMID_ACK_L1 0xA
shreeshas95 4:104dd82c99b8 110 #define TMID_ACK_L234 0xB
shreeshas95 4:104dd82c99b8 111 #define TMID_TCL 0x7
shreeshas95 4:104dd82c99b8 112 #define TMID_CALL_SIGN 0xE
shreeshas95 0:f016e9e8d48b 113
shreeshas95 0:f016e9e8d48b 114 // OBOSC SERVICE SUBTYPE
shreeshas95 4:104dd82c99b8 115 #define OBOSC_TCL_MAX_SHORT_SIZE 11
shreeshas95 4:104dd82c99b8 116 #define OBOSC_LONG_TC_FIRST_HALF_SIZE 67
shreeshas95 4:104dd82c99b8 117 #define OBOSC_LONG_TC_SECOND_HALF_SIZE 68
shreeshas95 4:104dd82c99b8 118 #define OBOSC_TCL_TAG_LONG_FIRST_HALF 0x10
shreeshas95 4:104dd82c99b8 119 #define OBOSC_TCL_TAG_LONG_SECOND_HALF 0x11
shreeshas95 4:104dd82c99b8 120
shreeshas95 0:f016e9e8d48b 121 #define OBOSC_SUB_DISABLE 0x01
shreeshas95 0:f016e9e8d48b 122 #define OBOSC_SUB_RETRY 0x05
shreeshas95 4:104dd82c99b8 123 #define OBOSC_SUB_REP_TCLD 0x06
shreeshas95 0:f016e9e8d48b 124 #define OBOSC_SUB_REP_LE 0x0F
shreeshas95 0:f016e9e8d48b 125 #define OBOSC_SUB_RESET 0x07
shreeshas95 0:f016e9e8d48b 126
shreeshas95 101:bece931236a2 127 // PAYLOAD or SCIENCE
shreeshas95 101:bece931236a2 128 #define PAYLOAD_BUFFER_LENGTH 6723
ee12b079 113:b8991d9e3b6c 129 #define PAY_SPI_MOSI PTE18
ee12b079 113:b8991d9e3b6c 130 #define PAY_SPI_MISO PTE19
ee12b079 113:b8991d9e3b6c 131 #define PAY_SPI_CLK PTE17
ee12b079 113:b8991d9e3b6c 132 #define PAY_SPI_CS PTE16
ee12b079 245:da9d1bd999da 133 #define SCIENCE_SIGNAL 0x04
ee12b079 209:63e9c8f8b5d2 134
ee12b079 209:63e9c8f8b5d2 135 //BEACON
ee12b079 209:63e9c8f8b5d2 136 #define BCN_APID_SOURCE 0x41
ee12b079 209:63e9c8f8b5d2 137 #define BCN_SERVICE 0x81
shreeshas95 101:bece931236a2 138
ee12b079 209:63e9c8f8b5d2 139 //BAE
ee12b079 209:63e9c8f8b5d2 140 #define BAE_APID_SOURCE 0x81
ee12b079 209:63e9c8f8b5d2 141 #define BAE_SERVICE 0x81
ee12b079 209:63e9c8f8b5d2 142 #define BAE_POWER_ON_PID 0x13
ee12b079 209:63e9c8f8b5d2 143 #define BAE_POWER_OFF_PID 0x23
ee12b079 209:63e9c8f8b5d2 144 #define BAE_RESET_PID 0x33
ee12b079 209:63e9c8f8b5d2 145
ee12b079 209:63e9c8f8b5d2 146 //RF RELAY
aniruddhv 262:752c8689944a 147 #define RF_RELAY_CNTRL_TX PTB7
aniruddhv 262:752c8689944a 148 #define RF_RELAY_CNTRL_BCN PTB12
chaithanyarss 224:3ac1f91e0ebc 149
chaithanyarss 224:3ac1f91e0ebc 150 //CDMS HK
ee12b079 246:565458eefd94 151 #define HK_SIGNAL 0x05
chaithanyarss 224:3ac1f91e0ebc 152 #define COMRX_ALIVE 0x01
chaithanyarss 224:3ac1f91e0ebc 153 #define COMRX_DEAD 0x00
chaithanyarss 224:3ac1f91e0ebc 154 #define DEVICE_ENABLED 0x00
chaithanyarss 224:3ac1f91e0ebc 155 #define DEVICE_POWERED 0x01
chaithanyarss 224:3ac1f91e0ebc 156 #define DEVICE_OC_FAULT 0x02
chaithanyarss 224:3ac1f91e0ebc 157 #define DEVICE_DISABLED 0x03
chaithanyarss 224:3ac1f91e0ebc 158
ee12b079 209:63e9c8f8b5d2 159
shreeshas95 3:6c81fc8834e2 160
shreeshas95 0:f016e9e8d48b 161 // ****************GLOBAL VARIABLES******************
chaithanyarss 251:c766afa330a3 162
chaithanyarss 251:c766afa330a3 163 //Global
chaithanyarss 251:c766afa330a3 164 Mutex gMutex;
chaithanyarss 251:c766afa330a3 165
chaithanyarss 251:c766afa330a3 166
shreeshas95 0:f016e9e8d48b 167 // DEBUG
shreeshas95 0:f016e9e8d48b 168 Serial gPC( USBTX, USBRX );
shreeshas95 4:104dd82c99b8 169 DigitalOut gLEDR(LED_RED);
shreeshas95 4:104dd82c99b8 170 DigitalOut gLEDG(LED_GREEN);
shreeshas95 0:f016e9e8d48b 171
shreeshas95 0:f016e9e8d48b 172 // COM_RX
shreeshas95 0:f016e9e8d48b 173 RawSerial RX1M( COM_RX_UART_TX, COM_RX_UART_RX );
shreeshas95 0:f016e9e8d48b 174 COM_RX_DATA_NODE *gRX_HEAD_DATA_NODE = NULL;
shreeshas95 0:f016e9e8d48b 175 COM_RX_DATA_NODE *gRX_CURRENT_DATA_NODE = NULL;
shreeshas95 2:2caf2a9a13aa 176 // uint8_t *gRX_CURRENT_PTR = NULL;
shreeshas95 0:f016e9e8d48b 177 uint32_t gRX_COUNT = 0;
aniruddhv 262:752c8689944a 178 uint16_t gTOTAL_RAW_BYTES = 0;
shreeshas95 0:f016e9e8d48b 179 uint16_t gTOTAL_INCORRECT_SIZE_TC = 0x00;
shreeshas95 0:f016e9e8d48b 180 uint16_t gTOTAL_CRC_FAIL_TC = 0x00;
shreeshas95 2:2caf2a9a13aa 181 uint16_t gTOTAL_REPEATED_TC = 0x00;
shreeshas95 0:f016e9e8d48b 182
shreeshas95 0:f016e9e8d48b 183 // COMMON SPI
shreeshas95 0:f016e9e8d48b 184 SPI spi( SPI_MOSI, SPI_MISO, SPI_CLK );
shreeshas95 1:a0055b3280c8 185 DigitalOut gCS_ADF(SPI_CS_ADF);
ee12b079 86:a26f5f22631d 186 DigitalOut cs_sd(SPI_CS_SDC);
shreeshas95 2:2caf2a9a13aa 187 DigitalOut gCS_RTC(SPI_CS_RTC);
shreeshas95 0:f016e9e8d48b 188 Mutex SPI_mutex;
shreeshas95 0:f016e9e8d48b 189
ee12b079 209:63e9c8f8b5d2 190 //I2C
ee12b079 209:63e9c8f8b5d2 191 Mutex BAE_I2C_mutex;
ee12b079 209:63e9c8f8b5d2 192
ee12b079 209:63e9c8f8b5d2 193 //RF Relay
ee12b079 209:63e9c8f8b5d2 194 DigitalOut RF_SW_CNTRL_BCN(RF_RELAY_CNTRL_BCN);
ee12b079 209:63e9c8f8b5d2 195 DigitalOut RF_SW_CNTRL_TX(RF_RELAY_CNTRL_TX);
ee12b079 209:63e9c8f8b5d2 196
ee12b079 209:63e9c8f8b5d2 197 //COM_RX
ee12b079 209:63e9c8f8b5d2 198 DigitalOut COM_RX_CNTRL(PIN72);
ee12b079 209:63e9c8f8b5d2 199 DigitalOut COM_TX_CNTRL(PIN56);
aniruddhv 262:752c8689944a 200 DigitalIn COM_TX_OC_FAULT(PIN69);
ee12b079 209:63e9c8f8b5d2 201
shreeshas95 0:f016e9e8d48b 202 // TC LIST
shreeshas95 0:f016e9e8d48b 203 Base_tc* gHEAD_NODE_TCL = NULL;
shreeshas95 0:f016e9e8d48b 204 Base_tc* gLAST_NODE_TCL = NULL;
shreeshas95 2:2caf2a9a13aa 205 uint8_t gMASTER_STATE = TCL_STATE_INCOMPLETE;
shreeshas95 2:2caf2a9a13aa 206 uint16_t gFLAGS = 0x0000;
shreeshas95 0:f016e9e8d48b 207
shreeshas95 0:f016e9e8d48b 208 // COM_MNG_TMTC THREAD
shreeshas95 0:f016e9e8d48b 209 Thread* gCOM_MNG_TMTC_THREAD = NULL;
shreeshas95 0:f016e9e8d48b 210 Timeout gRX_TIMEOUT;
shreeshas95 0:f016e9e8d48b 211 Timeout gSESSION_TIMEOUT;
aniruddhv 262:752c8689944a 212 Timeout gCOM_RX_DISABLE;
shreeshas95 0:f016e9e8d48b 213
shreeshas95 0:f016e9e8d48b 214 // COM_MNG_TMTC
aniruddhv 262:752c8689944a 215 RtosTimer *sys_reset_cdms_timer;
ee12b079 209:63e9c8f8b5d2 216
shreeshas95 2:2caf2a9a13aa 217 // PA cooling timeout
shreeshas95 4:104dd82c99b8 218 Timeout gCOM_PA_COOLING_TIMEOUT;
shreeshas95 2:2caf2a9a13aa 219
shreeshas95 2:2caf2a9a13aa 220 // GS code for verification
aniruddhv 37:c9a739750806 221 const uint8_t gGSCODE[] = {0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
shreeshas95 2:2caf2a9a13aa 222
shreeshas95 0:f016e9e8d48b 223 uint8_t gTOTAL_VALID_TC = 0x00;
shreeshas95 0:f016e9e8d48b 224 // USE LAST_L1_ACK FOR GENERATING REPORT
shreeshas95 4:104dd82c99b8 225 uint8_t gLAST_TM[TM_LONG_SIZE];
shreeshas95 4:104dd82c99b8 226 uint8_t gLAST_TM_SHORT_OR_LONG = SHORT_TM_CODE;
shreeshas95 3:6c81fc8834e2 227
shreeshas95 101:bece931236a2 228 // PAYLOAD OR SCIENCE_THREAD
shreeshas95 3:6c81fc8834e2 229 Thread* gSCIENCE_THREAD = NULL;
ee12b079 245:da9d1bd999da 230 dmaSPISlave *gPAY_SPI;
ee12b079 191:0636c8391407 231 uint8_t gPAYLOAD_BUFFER[PAYLOAD_BUFFER_LENGTH] = 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chaithanyarss 251:c766afa330a3 232 RtosTimer *PL_wo_dma;
ee12b079 209:63e9c8f8b5d2 233
shreeshas95 4:104dd82c99b8 234 // CALL SIGN TM
shreeshas95 103:b55559925dc1 235 const uint8_t gCALL_SIGN_STRING[TM_SHORT_SIZE] = {0xE0, 0x00, 0x00, 0x00, 0x56, 0x55, 0x32, 0x4E, 0x43, 0x46, 0x00, 0xAC, 0x11};
shreeshas95 103:b55559925dc1 236
ee12b079 245:da9d1bd999da 237 //HK Thread
ee12b079 245:da9d1bd999da 238 Thread* gHK_THREAD = NULL;
ee12b079 245:da9d1bd999da 239 RtosTimer *HK_counter;
ee12b079 245:da9d1bd999da 240
shreeshas95 103:b55559925dc1 241 // CDMS HK
ee12b079 209:63e9c8f8b5d2 242 uint8_t CDMS_STANDBY;
ee12b079 209:63e9c8f8b5d2 243 uint8_t CDMS_HEALTH_DATA[128];
ee12b079 209:63e9c8f8b5d2 244 uint8_t CDMS_RAM[59];
ee12b079 209:63e9c8f8b5d2 245 uint16_t GPIO_STATUS;
ee12b079 209:63e9c8f8b5d2 246 uint8_t CDMS_HK_MAIN_STATUS;
ee12b079 209:63e9c8f8b5d2 247 uint8_t COMRX_STATUS;
ee12b079 209:63e9c8f8b5d2 248 uint8_t RTC_FAULTCOUNT;
ee12b079 209:63e9c8f8b5d2 249 uint16_t SD_FAULTCOUNT;
ee12b079 209:63e9c8f8b5d2 250 uint8_t SD_STATUS;
ee12b079 209:63e9c8f8b5d2 251 uint8_t BAE_FAULTCOUNT;
ee12b079 209:63e9c8f8b5d2 252 uint8_t BAE_STATUS;
ee12b079 209:63e9c8f8b5d2 253 uint8_t PL_STATUS;
ee12b079 209:63e9c8f8b5d2 254 uint16_t PL_FAULTCOUNT;
ee12b079 209:63e9c8f8b5d2 255 bool BAE_HK_I2C;
ee12b079 209:63e9c8f8b5d2 256 uint8_t RTC_STATUS;
ee12b079 209:63e9c8f8b5d2 257 float RSSI_volatge;
ee12b079 209:63e9c8f8b5d2 258
shreeshas95 103:b55559925dc1 259 CDMS_HK_actual actual_data;
shreeshas95 103:b55559925dc1 260 CDMS_HK_quant quant_data;
shreeshas95 103:b55559925dc1 261 CDMS_HK_min_max min_max_data;
ee12b079 194:ab528911780d 262 bool firstCount=true;
ee12b079 194:ab528911780d 263
ee12b079 209:63e9c8f8b5d2 264 //GPIO PINS
ee12b079 209:63e9c8f8b5d2 265 DigitalIn V_A_PGOOD (PIN88);
ee12b079 209:63e9c8f8b5d2 266 DigitalIn V_B_PGOOD_1 (PIN6);
ee12b079 209:63e9c8f8b5d2 267 DigitalIn V_B_PGOOD_2 (PIN7);
ee12b079 209:63e9c8f8b5d2 268 DigitalIn V_C_PGOOD (PIN54);
ee12b079 209:63e9c8f8b5d2 269 DigitalIn COMRX_OC_FAULT (PIN68);
ee12b079 209:63e9c8f8b5d2 270 DigitalIn COMTX_OC_FAULT (PIN69);
ee12b079 209:63e9c8f8b5d2 271 DigitalIn BAE_OC_FAULT (PIN92);
ee12b079 259:066a7abd2a5f 272 DigitalOut PL_GPIO_1_STATUS (PIN71);
chaithanyarss 257:7d404e9dc9e2 273 DigitalOut PL_GPIO_2_STATUS (PIN81);
chaithanyarss 257:7d404e9dc9e2 274 DigitalOut PL_GPIO_3_STATUS (PIN80);
chaithanyarss 224:3ac1f91e0ebc 275 DigitalIn PL_BEE_SW_OC_FAULT (PIN91);
chaithanyarss 224:3ac1f91e0ebc 276 DigitalIn PL_EPS_LATCH_SW_OC_FAULT (PIN5);
chaithanyarss 257:7d404e9dc9e2 277 DigitalOut EPS_V_C_EN_STATUS (PIN72);
chaithanyarss 257:7d404e9dc9e2 278 DigitalOut EPS_V_D_EN_STATUS (PIN56);
ee12b079 209:63e9c8f8b5d2 279
ee12b079 209:63e9c8f8b5d2 280
ee12b079 209:63e9c8f8b5d2 281 DigitalIn SD_OC_FAULT (PIN90);
ee12b079 209:63e9c8f8b5d2 282 DigitalOut SD_SW_EN_DS (PIN97);
ee12b079 209:63e9c8f8b5d2 283 DigitalOut BAE_SW_EN_DS (PIN47);
chaithanyarss 257:7d404e9dc9e2 284 DigitalOut TRXY_EN (PIN84);
chaithanyarss 257:7d404e9dc9e2 285 DigitalOut TRZ_EN (PIN88);
chaithanyarss 257:7d404e9dc9e2 286 DigitalOut V_A_EN (PIN99);
ee12b079 259:066a7abd2a5f 287 DigitalOut sys_pwr_rst (PIN96);
ee12b079 245:da9d1bd999da 288
ee12b079 245:da9d1bd999da 289 DigitalOut PYLD_DFF (PIN73);
ee12b079 245:da9d1bd999da 290 DigitalOut PYLD_DFF_CLK (PIN65);
ee12b079 245:da9d1bd999da 291 DigitalOut PYLD_EPS_DFF_PWR (PIN64);
ee12b079 245:da9d1bd999da 292 DigitalOut PYLD_EPS_DFF_PWR_CLK (PIN40);
ee12b079 245:da9d1bd999da 293
ee12b079 245:da9d1bd999da 294 DigitalOut RESET_TO_BAE(PIN93,1);
ee12b079 245:da9d1bd999da 295 DigitalOut RESET_TO_PYLD(PIN21);
ee12b079 209:63e9c8f8b5d2 296
ee12b079 194:ab528911780d 297 //SD HK
ee12b079 194:ab528911780d 298 uint32_t FSC_CURRENT[6];
ee12b079 195:6a549c0e9287 299 uint32_t FSC_LAST[6];
ee12b079 209:63e9c8f8b5d2 300 uint8_t SD_RD_ERROR;
ee12b079 209:63e9c8f8b5d2 301
ee12b079 209:63e9c8f8b5d2 302 //Time's
ee12b079 209:63e9c8f8b5d2 303 uint32_t TIME_LATEST_RTC;
ee12b079 209:63e9c8f8b5d2 304 uint32_t TIME_LATEST_I2C_BAE;
ee12b079 209:63e9c8f8b5d2 305 uint32_t TIME_LATEST_I2C_SPEED;
ee12b079 209:63e9c8f8b5d2 306 uint32_t TIME_LATEST_SD_WR;
ee12b079 209:63e9c8f8b5d2 307 uint32_t TIME_LATEST_SD_RD;
ee12b079 209:63e9c8f8b5d2 308 uint32_t TIME_LATEST_SPI_SPEED;
ee12b079 209:63e9c8f8b5d2 309
ee12b079 209:63e9c8f8b5d2 310 //Counter's
ee12b079 209:63e9c8f8b5d2 311 uint16_t CDMS_I2C_ERR_SPEED_COUNTER;
ee12b079 209:63e9c8f8b5d2 312 uint16_t CDMS_I2C_ERR_BAE_COUNTER;
ee12b079 209:63e9c8f8b5d2 313 uint16_t CDMS_HK_MAIN_COUNTER;
ee12b079 209:63e9c8f8b5d2 314 uint16_t COMRX_RESET_COUNTER;
ee12b079 209:63e9c8f8b5d2 315 uint16_t PL_MAIN_COUNTER;
ee12b079 209:63e9c8f8b5d2 316 uint16_t PL_RCV_SC_DATA_COUNTER;
chaithanyarss 257:7d404e9dc9e2 317 uint16_t CDMS_WR_SD_FAULT_COUNTER;
chaithanyarss 257:7d404e9dc9e2 318 uint16_t SD_LIB_WRITES = 0;
ee12b079 209:63e9c8f8b5d2 319
ee12b079 209:63e9c8f8b5d2 320 //CDMS RAM parameters
ee12b079 209:63e9c8f8b5d2 321 uint8_t PL_INIT_STATUS;
ee12b079 209:63e9c8f8b5d2 322 uint8_t PL_MAIN_STATUS;
ee12b079 209:63e9c8f8b5d2 323 uint8_t PL_LOW_POWER;
ee12b079 209:63e9c8f8b5d2 324 uint8_t PL_STATE;
ee12b079 209:63e9c8f8b5d2 325 uint8_t PL_RCV_SC_DATA_STATUS;
ee12b079 209:63e9c8f8b5d2 326 uint8_t COM_SESSION;
ee12b079 209:63e9c8f8b5d2 327 uint8_t COM_RX;
ee12b079 209:63e9c8f8b5d2 328 uint8_t RF_SW_STATUS;
ee12b079 209:63e9c8f8b5d2 329 uint8_t COM_TX;
ee12b079 209:63e9c8f8b5d2 330 uint8_t COM_TX_STATUS;
ee12b079 209:63e9c8f8b5d2 331 uint8_t COM_MNG_TMTC;
chaithanyarss 257:7d404e9dc9e2 332 uint8_t EN_CDMS_HK;
chaithanyarss 257:7d404e9dc9e2 333 uint8_t EN_PL;
chaithanyarss 257:7d404e9dc9e2 334 uint8_t EN_RCV_SC;
ee12b079 209:63e9c8f8b5d2 335 uint8_t CDMS_INIT_STATUS;
ee12b079 209:63e9c8f8b5d2 336 uint8_t CDMS_HK_STATUS;
chaithanyarss 257:7d404e9dc9e2 337 uint8_t COM_RX_STATUS;
chaithanyarss 257:7d404e9dc9e2 338 uint8_t CDMS_RTC_BL;
chaithanyarss 257:7d404e9dc9e2 339
chaithanyarss 257:7d404e9dc9e2 340 //CDMS FLASH parameters
chaithanyarss 257:7d404e9dc9e2 341 uint8_t EPS_V_A_EN_STATUS;
chaithanyarss 257:7d404e9dc9e2 342 uint8_t BAE_SW_STATUS;
chaithanyarss 257:7d404e9dc9e2 343 uint8_t CDMS_SD_SW_STATUS;
chaithanyarss 257:7d404e9dc9e2 344 uint8_t PL_BEE_SW_STATUS;
chaithanyarss 257:7d404e9dc9e2 345 uint8_t PL_EPS_LATCH_SW_EN;
chaithanyarss 257:7d404e9dc9e2 346 uint8_t RTC_INIT_STATUS;
chaithanyarss 257:7d404e9dc9e2 347 uint8_t CDMS_RTC_DISABLE;
chaithanyarss 257:7d404e9dc9e2 348 uint16_t CDMS_RESET_COUNTER;
chaithanyarss 257:7d404e9dc9e2 349 uint32_t TIME_LATEST_CDSMS_RESET;
chaithanyarss 257:7d404e9dc9e2 350 uint16_t COM_TC_BYTES_LIMIT;
chaithanyarss 257:7d404e9dc9e2 351 uint8_t COM_RX_CURRENT_MAX;
chaithanyarss 257:7d404e9dc9e2 352 uint8_t COM_RX_DISABLE_TIMEOUT;
chaithanyarss 257:7d404e9dc9e2 353 uint8_t COM_PA_TMP_HIGH;
chaithanyarss 257:7d404e9dc9e2 354 uint8_t COM_PA_RECOVERY_TIMEOUT;
chaithanyarss 257:7d404e9dc9e2 355 uint8_t COM_SESSION_TIMEOUT;
chaithanyarss 257:7d404e9dc9e2 356 uint8_t COM_RSSI_MIN;
chaithanyarss 257:7d404e9dc9e2 357 uint16_t SD_LIB_BLK_CURRENT;