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targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/device/TOOLCHAIN_IAR/stm32l475xx.icf@167:e84263d55307, 2017-06-21 (annotated)

Committer:
AnnaBridge
Date:
Wed Jun 21 17:46:44 2017 +0100
Revision:
167:e84263d55307
Child:
168:9672193075cf
This updates the lib to the mbed lib v 145

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 167:e84263d55307 1 /* [ROM = 1024kb = 0x100000] */
AnnaBridge 167:e84263d55307 2 define symbol __intvec_start__ = 0x08000000;
AnnaBridge 167:e84263d55307 3 define symbol __region_ROM_start__ = 0x08000000;
AnnaBridge 167:e84263d55307 4 define symbol __region_ROM_end__ = 0x080FFFFF;
AnnaBridge 167:e84263d55307 5
AnnaBridge 167:e84263d55307 6 /* [RAM = 128kb = 96kb + 32kb = 0x20000] */
AnnaBridge 167:e84263d55307 7 /* Vector table dynamic copy: Total: 98 vectors = 392 bytes (0x188) to be reserved in RAM */
AnnaBridge 167:e84263d55307 8 define symbol __NVIC_start__ = 0x10000000;
AnnaBridge 167:e84263d55307 9 define symbol __NVIC_end__ = 0x10000187;
AnnaBridge 167:e84263d55307 10 define symbol __region_SRAM2_start__ = 0x10000188; /* This adress is 8-byte aligned */
AnnaBridge 167:e84263d55307 11 define symbol __region_SRAM2_end__ = 0x10007FFF;
AnnaBridge 167:e84263d55307 12 define symbol __region_SRAM1_start__ = 0x20000000;
AnnaBridge 167:e84263d55307 13 define symbol __region_SRAM1_end__ = 0x20017FFF;
AnnaBridge 167:e84263d55307 14
AnnaBridge 167:e84263d55307 15 /* Memory regions */
AnnaBridge 167:e84263d55307 16 define memory mem with size = 4G;
AnnaBridge 167:e84263d55307 17 define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__];
AnnaBridge 167:e84263d55307 18 define region SRAM2_region = mem:[from __region_SRAM2_start__ to __region_SRAM2_end__];
AnnaBridge 167:e84263d55307 19 define region SRAM1_region = mem:[from __region_SRAM1_start__ to __region_SRAM1_end__];
AnnaBridge 167:e84263d55307 20
AnnaBridge 167:e84263d55307 21 /* Stack 1/8 and Heap 1/4 of RAM */
AnnaBridge 167:e84263d55307 22 define symbol __size_cstack__ = 0x8000;
AnnaBridge 167:e84263d55307 23 define symbol __size_heap__ = 0xa000;
AnnaBridge 167:e84263d55307 24 define block CSTACK with alignment = 8, size = __size_cstack__ { };
AnnaBridge 167:e84263d55307 25 define block HEAP with alignment = 8, size = __size_heap__ { };
AnnaBridge 167:e84263d55307 26 define block STACKHEAP with fixed order { block HEAP, block CSTACK };
AnnaBridge 167:e84263d55307 27
AnnaBridge 167:e84263d55307 28 initialize by copy with packing = zeros { readwrite };
AnnaBridge 167:e84263d55307 29 do not initialize { section .noinit };
AnnaBridge 167:e84263d55307 30
AnnaBridge 167:e84263d55307 31 place at address mem:__intvec_start__ { readonly section .intvec };
AnnaBridge 167:e84263d55307 32
AnnaBridge 167:e84263d55307 33 place in ROM_region { readonly };
AnnaBridge 167:e84263d55307 34 place in SRAM1_region { readwrite, block STACKHEAP };
AnnaBridge 167:e84263d55307 35 place in SRAM2_region { };