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targets/TARGET_NORDIC/TARGET_NRF5_SDK13/sdk/drivers_nrf/spi_master/nrf_drv_spi.h@162:e13f6fdb2ac4, 2017-04-12 (annotated)

Committer:
<>
Date:
Wed Apr 12 16:21:43 2017 +0100
Revision:
162:e13f6fdb2ac4
This updates the lib to the mbed lib v140

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 162:e13f6fdb2ac4 1 /*
<> 162:e13f6fdb2ac4 2 * Copyright (c) 2015 Nordic Semiconductor ASA
<> 162:e13f6fdb2ac4 3 * All rights reserved.
<> 162:e13f6fdb2ac4 4 *
<> 162:e13f6fdb2ac4 5 * Redistribution and use in source and binary forms, with or without modification,
<> 162:e13f6fdb2ac4 6 * are permitted provided that the following conditions are met:
<> 162:e13f6fdb2ac4 7 *
<> 162:e13f6fdb2ac4 8 * 1. Redistributions of source code must retain the above copyright notice, this list
<> 162:e13f6fdb2ac4 9 * of conditions and the following disclaimer.
<> 162:e13f6fdb2ac4 10 *
<> 162:e13f6fdb2ac4 11 * 2. Redistributions in binary form, except as embedded into a Nordic Semiconductor ASA
<> 162:e13f6fdb2ac4 12 * integrated circuit in a product or a software update for such product, must reproduce
<> 162:e13f6fdb2ac4 13 * the above copyright notice, this list of conditions and the following disclaimer in
<> 162:e13f6fdb2ac4 14 * the documentation and/or other materials provided with the distribution.
<> 162:e13f6fdb2ac4 15 *
<> 162:e13f6fdb2ac4 16 * 3. Neither the name of Nordic Semiconductor ASA nor the names of its contributors may be
<> 162:e13f6fdb2ac4 17 * used to endorse or promote products derived from this software without specific prior
<> 162:e13f6fdb2ac4 18 * written permission.
<> 162:e13f6fdb2ac4 19 *
<> 162:e13f6fdb2ac4 20 * 4. This software, with or without modification, must only be used with a
<> 162:e13f6fdb2ac4 21 * Nordic Semiconductor ASA integrated circuit.
<> 162:e13f6fdb2ac4 22 *
<> 162:e13f6fdb2ac4 23 * 5. Any software provided in binary or object form under this license must not be reverse
<> 162:e13f6fdb2ac4 24 * engineered, decompiled, modified and/or disassembled.
<> 162:e13f6fdb2ac4 25 *
<> 162:e13f6fdb2ac4 26 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
<> 162:e13f6fdb2ac4 27 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
<> 162:e13f6fdb2ac4 28 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 162:e13f6fdb2ac4 29 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
<> 162:e13f6fdb2ac4 30 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
<> 162:e13f6fdb2ac4 31 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
<> 162:e13f6fdb2ac4 32 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
<> 162:e13f6fdb2ac4 33 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
<> 162:e13f6fdb2ac4 34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
<> 162:e13f6fdb2ac4 35 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 162:e13f6fdb2ac4 36 *
<> 162:e13f6fdb2ac4 37 */
<> 162:e13f6fdb2ac4 38
<> 162:e13f6fdb2ac4 39 /**@file
<> 162:e13f6fdb2ac4 40 * @addtogroup nrf_spi Serial peripheral interface (SPI/SPIM)
<> 162:e13f6fdb2ac4 41 * @ingroup nrf_drivers
<> 162:e13f6fdb2ac4 42 * @brief Serial peripheral interface (SPI/SPIM) APIs.
<> 162:e13f6fdb2ac4 43 *
<> 162:e13f6fdb2ac4 44 */
<> 162:e13f6fdb2ac4 45
<> 162:e13f6fdb2ac4 46 #ifndef NRF_DRV_SPI_H__
<> 162:e13f6fdb2ac4 47 #define NRF_DRV_SPI_H__
<> 162:e13f6fdb2ac4 48
<> 162:e13f6fdb2ac4 49 #include "nordic_common.h"
<> 162:e13f6fdb2ac4 50 #include "sdk_config.h"
<> 162:e13f6fdb2ac4 51 #include "nrf_peripherals.h"
<> 162:e13f6fdb2ac4 52 #include "nrf_spi.h"
<> 162:e13f6fdb2ac4 53 #ifdef SPIM_PRESENT
<> 162:e13f6fdb2ac4 54 #include "nrf_spim.h"
<> 162:e13f6fdb2ac4 55 #endif
<> 162:e13f6fdb2ac4 56 #include "sdk_errors.h"
<> 162:e13f6fdb2ac4 57
<> 162:e13f6fdb2ac4 58 #ifdef __cplusplus
<> 162:e13f6fdb2ac4 59 extern "C" {
<> 162:e13f6fdb2ac4 60 #endif
<> 162:e13f6fdb2ac4 61
<> 162:e13f6fdb2ac4 62 #if defined(SPIM_PRESENT)
<> 162:e13f6fdb2ac4 63 #define NRF_DRV_SPI_PERIPHERAL(id) \
<> 162:e13f6fdb2ac4 64 (CONCAT_3(SPI, id, _USE_EASY_DMA) == 1 ? \
<> 162:e13f6fdb2ac4 65 (void *)CONCAT_2(NRF_SPIM, id) \
<> 162:e13f6fdb2ac4 66 : (void *)CONCAT_2(NRF_SPI, id))
<> 162:e13f6fdb2ac4 67 #define SPI2_IRQ SPIM2_SPIS2_SPI2_IRQn
<> 162:e13f6fdb2ac4 68 #define SPI2_IRQ_HANDLER SPIM2_SPIS2_SPI2_IRQHandler
<> 162:e13f6fdb2ac4 69 #else
<> 162:e13f6fdb2ac4 70 #define NRF_DRV_SPI_PERIPHERAL(id) (void *)CONCAT_2(NRF_SPI, id)
<> 162:e13f6fdb2ac4 71 #endif
<> 162:e13f6fdb2ac4 72 #define SPI0_IRQ SPI0_TWI0_IRQn
<> 162:e13f6fdb2ac4 73 #define SPI0_IRQ_HANDLER SPI0_TWI0_IRQHandler
<> 162:e13f6fdb2ac4 74 #define SPI1_IRQ SPI1_TWI1_IRQn
<> 162:e13f6fdb2ac4 75 #define SPI1_IRQ_HANDLER SPI1_TWI1_IRQHandler
<> 162:e13f6fdb2ac4 76
<> 162:e13f6fdb2ac4 77
<> 162:e13f6fdb2ac4 78 /**
<> 162:e13f6fdb2ac4 79 * @defgroup nrf_drv_spi SPI master driver
<> 162:e13f6fdb2ac4 80 * @{
<> 162:e13f6fdb2ac4 81 * @ingroup nrf_spi
<> 162:e13f6fdb2ac4 82 *
<> 162:e13f6fdb2ac4 83 * @brief Multi-instance SPI master driver.
<> 162:e13f6fdb2ac4 84 */
<> 162:e13f6fdb2ac4 85
<> 162:e13f6fdb2ac4 86 /**
<> 162:e13f6fdb2ac4 87 * @brief SPI master driver instance data structure.
<> 162:e13f6fdb2ac4 88 */
<> 162:e13f6fdb2ac4 89 typedef struct
<> 162:e13f6fdb2ac4 90 {
<> 162:e13f6fdb2ac4 91 void * p_registers; ///< Pointer to the structure with SPI/SPIM peripheral instance registers.
<> 162:e13f6fdb2ac4 92 IRQn_Type irq; ///< SPI/SPIM peripheral instance IRQ number.
<> 162:e13f6fdb2ac4 93 uint8_t drv_inst_idx; ///< Driver instance index.
<> 162:e13f6fdb2ac4 94 bool use_easy_dma; ///< True if the peripheral with EasyDMA (SPIM) shall be used.
<> 162:e13f6fdb2ac4 95 } nrf_drv_spi_t;
<> 162:e13f6fdb2ac4 96
<> 162:e13f6fdb2ac4 97 #define SPI0_INSTANCE_INDEX 0
<> 162:e13f6fdb2ac4 98 #define SPI1_INSTANCE_INDEX SPI0_INSTANCE_INDEX+SPI0_ENABLED
<> 162:e13f6fdb2ac4 99 #define SPI2_INSTANCE_INDEX SPI1_INSTANCE_INDEX+SPI1_ENABLED
<> 162:e13f6fdb2ac4 100
<> 162:e13f6fdb2ac4 101 /**
<> 162:e13f6fdb2ac4 102 * @brief Macro for creating an SPI master driver instance.
<> 162:e13f6fdb2ac4 103 */
<> 162:e13f6fdb2ac4 104 #define NRF_DRV_SPI_INSTANCE(id) \
<> 162:e13f6fdb2ac4 105 { \
<> 162:e13f6fdb2ac4 106 .p_registers = NRF_DRV_SPI_PERIPHERAL(id), \
<> 162:e13f6fdb2ac4 107 .irq = CONCAT_3(SPI, id, _IRQ), \
<> 162:e13f6fdb2ac4 108 .drv_inst_idx = CONCAT_3(SPI, id, _INSTANCE_INDEX), \
<> 162:e13f6fdb2ac4 109 .use_easy_dma = CONCAT_3(SPI, id, _USE_EASY_DMA) \
<> 162:e13f6fdb2ac4 110 }
<> 162:e13f6fdb2ac4 111
<> 162:e13f6fdb2ac4 112 /**
<> 162:e13f6fdb2ac4 113 * @brief This value can be provided instead of a pin number for signals MOSI,
<> 162:e13f6fdb2ac4 114 * MISO, and Slave Select to specify that the given signal is not used and
<> 162:e13f6fdb2ac4 115 * therefore does not need to be connected to a pin.
<> 162:e13f6fdb2ac4 116 */
<> 162:e13f6fdb2ac4 117 #define NRF_DRV_SPI_PIN_NOT_USED 0xFF
<> 162:e13f6fdb2ac4 118
<> 162:e13f6fdb2ac4 119 /**
<> 162:e13f6fdb2ac4 120 * @brief SPI data rates.
<> 162:e13f6fdb2ac4 121 */
<> 162:e13f6fdb2ac4 122 typedef enum
<> 162:e13f6fdb2ac4 123 {
<> 162:e13f6fdb2ac4 124 NRF_DRV_SPI_FREQ_125K = NRF_SPI_FREQ_125K, ///< 125 kbps.
<> 162:e13f6fdb2ac4 125 NRF_DRV_SPI_FREQ_250K = NRF_SPI_FREQ_250K, ///< 250 kbps.
<> 162:e13f6fdb2ac4 126 NRF_DRV_SPI_FREQ_500K = NRF_SPI_FREQ_500K, ///< 500 kbps.
<> 162:e13f6fdb2ac4 127 NRF_DRV_SPI_FREQ_1M = NRF_SPI_FREQ_1M, ///< 1 Mbps.
<> 162:e13f6fdb2ac4 128 NRF_DRV_SPI_FREQ_2M = NRF_SPI_FREQ_2M, ///< 2 Mbps.
<> 162:e13f6fdb2ac4 129 NRF_DRV_SPI_FREQ_4M = NRF_SPI_FREQ_4M, ///< 4 Mbps.
<> 162:e13f6fdb2ac4 130 NRF_DRV_SPI_FREQ_8M = NRF_SPI_FREQ_8M ///< 8 Mbps.
<> 162:e13f6fdb2ac4 131 } nrf_drv_spi_frequency_t;
<> 162:e13f6fdb2ac4 132
<> 162:e13f6fdb2ac4 133 /**
<> 162:e13f6fdb2ac4 134 * @brief SPI modes.
<> 162:e13f6fdb2ac4 135 */
<> 162:e13f6fdb2ac4 136 typedef enum
<> 162:e13f6fdb2ac4 137 {
<> 162:e13f6fdb2ac4 138 NRF_DRV_SPI_MODE_0 = NRF_SPI_MODE_0, ///< SCK active high, sample on leading edge of clock.
<> 162:e13f6fdb2ac4 139 NRF_DRV_SPI_MODE_1 = NRF_SPI_MODE_1, ///< SCK active high, sample on trailing edge of clock.
<> 162:e13f6fdb2ac4 140 NRF_DRV_SPI_MODE_2 = NRF_SPI_MODE_2, ///< SCK active low, sample on leading edge of clock.
<> 162:e13f6fdb2ac4 141 NRF_DRV_SPI_MODE_3 = NRF_SPI_MODE_3 ///< SCK active low, sample on trailing edge of clock.
<> 162:e13f6fdb2ac4 142 } nrf_drv_spi_mode_t;
<> 162:e13f6fdb2ac4 143
<> 162:e13f6fdb2ac4 144 /**
<> 162:e13f6fdb2ac4 145 * @brief SPI bit orders.
<> 162:e13f6fdb2ac4 146 */
<> 162:e13f6fdb2ac4 147 typedef enum
<> 162:e13f6fdb2ac4 148 {
<> 162:e13f6fdb2ac4 149 NRF_DRV_SPI_BIT_ORDER_MSB_FIRST = NRF_SPI_BIT_ORDER_MSB_FIRST, ///< Most significant bit shifted out first.
<> 162:e13f6fdb2ac4 150 NRF_DRV_SPI_BIT_ORDER_LSB_FIRST = NRF_SPI_BIT_ORDER_LSB_FIRST ///< Least significant bit shifted out first.
<> 162:e13f6fdb2ac4 151 } nrf_drv_spi_bit_order_t;
<> 162:e13f6fdb2ac4 152
<> 162:e13f6fdb2ac4 153 /**
<> 162:e13f6fdb2ac4 154 * @brief SPI master driver instance configuration structure.
<> 162:e13f6fdb2ac4 155 */
<> 162:e13f6fdb2ac4 156 typedef struct
<> 162:e13f6fdb2ac4 157 {
<> 162:e13f6fdb2ac4 158 uint8_t sck_pin; ///< SCK pin number.
<> 162:e13f6fdb2ac4 159 uint8_t mosi_pin; ///< MOSI pin number (optional).
<> 162:e13f6fdb2ac4 160 /**< Set to @ref NRF_DRV_SPI_PIN_NOT_USED
<> 162:e13f6fdb2ac4 161 * if this signal is not needed. */
<> 162:e13f6fdb2ac4 162 uint8_t miso_pin; ///< MISO pin number (optional).
<> 162:e13f6fdb2ac4 163 /**< Set to @ref NRF_DRV_SPI_PIN_NOT_USED
<> 162:e13f6fdb2ac4 164 * if this signal is not needed. */
<> 162:e13f6fdb2ac4 165 uint8_t ss_pin; ///< Slave Select pin number (optional).
<> 162:e13f6fdb2ac4 166 /**< Set to @ref NRF_DRV_SPI_PIN_NOT_USED
<> 162:e13f6fdb2ac4 167 * if this signal is not needed. The driver
<> 162:e13f6fdb2ac4 168 * supports only active low for this signal.
<> 162:e13f6fdb2ac4 169 * If the signal should be active high,
<> 162:e13f6fdb2ac4 170 * it must be controlled externally. */
<> 162:e13f6fdb2ac4 171 uint8_t irq_priority; ///< Interrupt priority.
<> 162:e13f6fdb2ac4 172 uint8_t orc; ///< Over-run character.
<> 162:e13f6fdb2ac4 173 /**< This character is used when all bytes from the TX buffer are sent,
<> 162:e13f6fdb2ac4 174 but the transfer continues due to RX. */
<> 162:e13f6fdb2ac4 175 nrf_drv_spi_frequency_t frequency; ///< SPI frequency.
<> 162:e13f6fdb2ac4 176 nrf_drv_spi_mode_t mode; ///< SPI mode.
<> 162:e13f6fdb2ac4 177 nrf_drv_spi_bit_order_t bit_order; ///< SPI bit order.
<> 162:e13f6fdb2ac4 178 } nrf_drv_spi_config_t;
<> 162:e13f6fdb2ac4 179
<> 162:e13f6fdb2ac4 180 /**
<> 162:e13f6fdb2ac4 181 * @brief SPI master instance default configuration.
<> 162:e13f6fdb2ac4 182 */
<> 162:e13f6fdb2ac4 183 #define NRF_DRV_SPI_DEFAULT_CONFIG \
<> 162:e13f6fdb2ac4 184 { \
<> 162:e13f6fdb2ac4 185 .sck_pin = NRF_DRV_SPI_PIN_NOT_USED, \
<> 162:e13f6fdb2ac4 186 .mosi_pin = NRF_DRV_SPI_PIN_NOT_USED, \
<> 162:e13f6fdb2ac4 187 .miso_pin = NRF_DRV_SPI_PIN_NOT_USED, \
<> 162:e13f6fdb2ac4 188 .ss_pin = NRF_DRV_SPI_PIN_NOT_USED, \
<> 162:e13f6fdb2ac4 189 .irq_priority = SPI_DEFAULT_CONFIG_IRQ_PRIORITY, \
<> 162:e13f6fdb2ac4 190 .orc = 0xFF, \
<> 162:e13f6fdb2ac4 191 .frequency = NRF_DRV_SPI_FREQ_4M, \
<> 162:e13f6fdb2ac4 192 .mode = NRF_DRV_SPI_MODE_0, \
<> 162:e13f6fdb2ac4 193 .bit_order = NRF_DRV_SPI_BIT_ORDER_MSB_FIRST, \
<> 162:e13f6fdb2ac4 194 }
<> 162:e13f6fdb2ac4 195
<> 162:e13f6fdb2ac4 196 #define NRF_DRV_SPI_FLAG_TX_POSTINC (1UL << 0) /**< TX buffer address incremented after transfer. */
<> 162:e13f6fdb2ac4 197 #define NRF_DRV_SPI_FLAG_RX_POSTINC (1UL << 1) /**< RX buffer address incremented after transfer. */
<> 162:e13f6fdb2ac4 198 #define NRF_DRV_SPI_FLAG_NO_XFER_EVT_HANDLER (1UL << 2) /**< Interrupt after each transfer is suppressed, and the event handler is not called. */
<> 162:e13f6fdb2ac4 199 #define NRF_DRV_SPI_FLAG_HOLD_XFER (1UL << 3) /**< Set up the transfer but do not start it. */
<> 162:e13f6fdb2ac4 200 #define NRF_DRV_SPI_FLAG_REPEATED_XFER (1UL << 4) /**< Flag indicating that the transfer will be executed multiple times. */
<> 162:e13f6fdb2ac4 201
<> 162:e13f6fdb2ac4 202 /**
<> 162:e13f6fdb2ac4 203 * @brief Single transfer descriptor structure.
<> 162:e13f6fdb2ac4 204 */
<> 162:e13f6fdb2ac4 205 typedef struct
<> 162:e13f6fdb2ac4 206 {
<> 162:e13f6fdb2ac4 207 uint8_t const * p_tx_buffer; ///< Pointer to TX buffer.
<> 162:e13f6fdb2ac4 208 uint8_t tx_length; ///< TX buffer length.
<> 162:e13f6fdb2ac4 209 uint8_t * p_rx_buffer; ///< Pointer to RX buffer.
<> 162:e13f6fdb2ac4 210 uint8_t rx_length; ///< RX buffer length.
<> 162:e13f6fdb2ac4 211 }nrf_drv_spi_xfer_desc_t;
<> 162:e13f6fdb2ac4 212
<> 162:e13f6fdb2ac4 213
<> 162:e13f6fdb2ac4 214 /**
<> 162:e13f6fdb2ac4 215 * @brief Macro for setting up single transfer descriptor.
<> 162:e13f6fdb2ac4 216 *
<> 162:e13f6fdb2ac4 217 * This macro is for internal use only.
<> 162:e13f6fdb2ac4 218 */
<> 162:e13f6fdb2ac4 219 #define NRF_DRV_SPI_SINGLE_XFER(p_tx, tx_len, p_rx, rx_len) \
<> 162:e13f6fdb2ac4 220 { \
<> 162:e13f6fdb2ac4 221 .p_tx_buffer = (uint8_t const *)(p_tx), \
<> 162:e13f6fdb2ac4 222 .tx_length = (tx_len), \
<> 162:e13f6fdb2ac4 223 .p_rx_buffer = (p_rx), \
<> 162:e13f6fdb2ac4 224 .rx_length = (rx_len), \
<> 162:e13f6fdb2ac4 225 }
<> 162:e13f6fdb2ac4 226
<> 162:e13f6fdb2ac4 227 /**
<> 162:e13f6fdb2ac4 228 * @brief Macro for setting duplex TX RX transfer.
<> 162:e13f6fdb2ac4 229 */
<> 162:e13f6fdb2ac4 230 #define NRF_DRV_SPI_XFER_TRX(p_tx_buf, tx_length, p_rx_buf, rx_length) \
<> 162:e13f6fdb2ac4 231 NRF_DRV_SPI_SINGLE_XFER(p_tx_buf, tx_length, p_rx_buf, rx_length)
<> 162:e13f6fdb2ac4 232
<> 162:e13f6fdb2ac4 233 /**
<> 162:e13f6fdb2ac4 234 * @brief Macro for setting TX transfer.
<> 162:e13f6fdb2ac4 235 */
<> 162:e13f6fdb2ac4 236 #define NRF_DRV_SPI_XFER_TX(p_buf, length) \
<> 162:e13f6fdb2ac4 237 NRF_DRV_SPI_SINGLE_XFER(p_buf, length, NULL, 0)
<> 162:e13f6fdb2ac4 238
<> 162:e13f6fdb2ac4 239 /**
<> 162:e13f6fdb2ac4 240 * @brief Macro for setting RX transfer.
<> 162:e13f6fdb2ac4 241 */
<> 162:e13f6fdb2ac4 242 #define NRF_DRV_SPI_XFER_RX(p_buf, length) \
<> 162:e13f6fdb2ac4 243 NRF_DRV_SPI_SINGLE_XFER(NULL, 0, p_buf, length)
<> 162:e13f6fdb2ac4 244
<> 162:e13f6fdb2ac4 245 /**
<> 162:e13f6fdb2ac4 246 * @brief SPI master driver event types, passed to the handler routine provided
<> 162:e13f6fdb2ac4 247 * during initialization.
<> 162:e13f6fdb2ac4 248 */
<> 162:e13f6fdb2ac4 249 typedef enum
<> 162:e13f6fdb2ac4 250 {
<> 162:e13f6fdb2ac4 251 NRF_DRV_SPI_EVENT_DONE, ///< Transfer done.
<> 162:e13f6fdb2ac4 252 } nrf_drv_spi_evt_type_t;
<> 162:e13f6fdb2ac4 253
<> 162:e13f6fdb2ac4 254 typedef struct
<> 162:e13f6fdb2ac4 255 {
<> 162:e13f6fdb2ac4 256 nrf_drv_spi_evt_type_t type; ///< Event type.
<> 162:e13f6fdb2ac4 257 union
<> 162:e13f6fdb2ac4 258 {
<> 162:e13f6fdb2ac4 259 nrf_drv_spi_xfer_desc_t done; ///< Event data for DONE event.
<> 162:e13f6fdb2ac4 260 } data;
<> 162:e13f6fdb2ac4 261 } nrf_drv_spi_evt_t;
<> 162:e13f6fdb2ac4 262
<> 162:e13f6fdb2ac4 263 /**
<> 162:e13f6fdb2ac4 264 * @brief SPI master driver event handler type.
<> 162:e13f6fdb2ac4 265 */
<> 162:e13f6fdb2ac4 266 typedef void (*nrf_drv_spi_handler_t)(nrf_drv_spi_evt_t const * p_event);
<> 162:e13f6fdb2ac4 267
<> 162:e13f6fdb2ac4 268
<> 162:e13f6fdb2ac4 269 /**
<> 162:e13f6fdb2ac4 270 * @brief Function for initializing the SPI master driver instance.
<> 162:e13f6fdb2ac4 271 *
<> 162:e13f6fdb2ac4 272 * This function configures and enables the specified peripheral.
<> 162:e13f6fdb2ac4 273 *
<> 162:e13f6fdb2ac4 274 * @param[in] p_instance Pointer to the driver instance structure.
<> 162:e13f6fdb2ac4 275 * @param[in] p_config Pointer to the structure with the initial configuration.
<> 162:e13f6fdb2ac4 276 * If NULL, the default configuration is used.
<> 162:e13f6fdb2ac4 277 * @param handler Event handler provided by the user. If NULL, transfers
<> 162:e13f6fdb2ac4 278 * will be performed in blocking mode.
<> 162:e13f6fdb2ac4 279 *
<> 162:e13f6fdb2ac4 280 * @retval NRF_SUCCESS If initialization was successful.
<> 162:e13f6fdb2ac4 281 * @retval NRF_ERROR_INVALID_STATE If the driver was already initialized.
<> 162:e13f6fdb2ac4 282 * @retval NRF_ERROR_BUSY If some other peripheral with the same
<> 162:e13f6fdb2ac4 283 * instance ID is already in use. This is
<> 162:e13f6fdb2ac4 284 * possible only if PERIPHERAL_RESOURCE_SHARING_ENABLED
<> 162:e13f6fdb2ac4 285 * is set to a value other than zero.
<> 162:e13f6fdb2ac4 286 */
<> 162:e13f6fdb2ac4 287 ret_code_t nrf_drv_spi_init(nrf_drv_spi_t const * const p_instance,
<> 162:e13f6fdb2ac4 288 nrf_drv_spi_config_t const * p_config,
<> 162:e13f6fdb2ac4 289 nrf_drv_spi_handler_t handler);
<> 162:e13f6fdb2ac4 290
<> 162:e13f6fdb2ac4 291 /**
<> 162:e13f6fdb2ac4 292 * @brief Function for uninitializing the SPI master driver instance.
<> 162:e13f6fdb2ac4 293 *
<> 162:e13f6fdb2ac4 294 * @param[in] p_instance Pointer to the driver instance structure.
<> 162:e13f6fdb2ac4 295 */
<> 162:e13f6fdb2ac4 296 void nrf_drv_spi_uninit(nrf_drv_spi_t const * const p_instance);
<> 162:e13f6fdb2ac4 297
<> 162:e13f6fdb2ac4 298 /**
<> 162:e13f6fdb2ac4 299 * @brief Function for starting the SPI data transfer.
<> 162:e13f6fdb2ac4 300 *
<> 162:e13f6fdb2ac4 301 * If an event handler was provided in the @ref nrf_drv_spi_init call, this function
<> 162:e13f6fdb2ac4 302 * returns immediately and the handler is called when the transfer is done.
<> 162:e13f6fdb2ac4 303 * Otherwise, the transfer is performed in blocking mode, which means that this function
<> 162:e13f6fdb2ac4 304 * returns when the transfer is finished.
<> 162:e13f6fdb2ac4 305 *
<> 162:e13f6fdb2ac4 306 * @note Peripherals using EasyDMA (for example, SPIM) require the transfer buffers
<> 162:e13f6fdb2ac4 307 * to be placed in the Data RAM region. If they are not and an SPIM instance is
<> 162:e13f6fdb2ac4 308 * used, this function will fail with the error code NRF_ERROR_INVALID_ADDR.
<> 162:e13f6fdb2ac4 309 *
<> 162:e13f6fdb2ac4 310 * @param[in] p_instance Pointer to the driver instance structure.
<> 162:e13f6fdb2ac4 311 * @param[in] p_tx_buffer Pointer to the transmit buffer. Can be NULL
<> 162:e13f6fdb2ac4 312 * if there is nothing to send.
<> 162:e13f6fdb2ac4 313 * @param tx_buffer_length Length of the transmit buffer.
<> 162:e13f6fdb2ac4 314 * @param[in] p_rx_buffer Pointer to the receive buffer. Can be NULL
<> 162:e13f6fdb2ac4 315 * if there is nothing to receive.
<> 162:e13f6fdb2ac4 316 * @param rx_buffer_length Length of the receive buffer.
<> 162:e13f6fdb2ac4 317 *
<> 162:e13f6fdb2ac4 318 * @retval NRF_SUCCESS If the operation was successful.
<> 162:e13f6fdb2ac4 319 * @retval NRF_ERROR_BUSY If a previously started transfer has not finished
<> 162:e13f6fdb2ac4 320 * yet.
<> 162:e13f6fdb2ac4 321 * @retval NRF_ERROR_INVALID_ADDR If the provided buffers are not placed in the Data
<> 162:e13f6fdb2ac4 322 * RAM region.
<> 162:e13f6fdb2ac4 323 */
<> 162:e13f6fdb2ac4 324 ret_code_t nrf_drv_spi_transfer(nrf_drv_spi_t const * const p_instance,
<> 162:e13f6fdb2ac4 325 uint8_t const * p_tx_buffer,
<> 162:e13f6fdb2ac4 326 uint8_t tx_buffer_length,
<> 162:e13f6fdb2ac4 327 uint8_t * p_rx_buffer,
<> 162:e13f6fdb2ac4 328 uint8_t rx_buffer_length);
<> 162:e13f6fdb2ac4 329
<> 162:e13f6fdb2ac4 330
<> 162:e13f6fdb2ac4 331 /**
<> 162:e13f6fdb2ac4 332 * @brief Function for starting the SPI data transfer with additional option flags.
<> 162:e13f6fdb2ac4 333 *
<> 162:e13f6fdb2ac4 334 * Function enables customizing the transfer by using option flags.
<> 162:e13f6fdb2ac4 335 *
<> 162:e13f6fdb2ac4 336 * Additional options are provided using the flags parameter:
<> 162:e13f6fdb2ac4 337 *
<> 162:e13f6fdb2ac4 338 * - @ref NRF_DRV_SPI_FLAG_TX_POSTINC and @ref NRF_DRV_SPI_FLAG_RX_POSTINC<span></span>:
<> 162:e13f6fdb2ac4 339 * Post-incrementation of buffer addresses. Supported only by SPIM.
<> 162:e13f6fdb2ac4 340 * - @ref NRF_DRV_SPI_FLAG_HOLD_XFER<span></span>: Driver is not starting the transfer. Use this
<> 162:e13f6fdb2ac4 341 * flag if the transfer is triggered externally by PPI. Supported only by SPIM. Use
<> 162:e13f6fdb2ac4 342 * @ref nrf_drv_twi_start_task_get to get the address of the start task.
<> 162:e13f6fdb2ac4 343 * - @ref NRF_DRV_SPI_FLAG_NO_XFER_EVT_HANDLER<span></span>: No user event handler after transfer
<> 162:e13f6fdb2ac4 344 * completion. This also means no interrupt at the end of the transfer. Supported only by SPIM.
<> 162:e13f6fdb2ac4 345 * If @ref NRF_DRV_SPI_FLAG_NO_XFER_EVT_HANDLER is used, the driver does not set the instance into
<> 162:e13f6fdb2ac4 346 * busy state, so you must ensure that the next transfers are set up when SPIM is not active.
<> 162:e13f6fdb2ac4 347 * @ref nrf_drv_spi_end_event_get function can be used to detect end of transfer. Option can be used
<> 162:e13f6fdb2ac4 348 * together with @ref NRF_DRV_SPI_FLAG_REPEATED_XFER to prepare a sequence of SPI transfers
<> 162:e13f6fdb2ac4 349 * without interruptions.
<> 162:e13f6fdb2ac4 350 * - @ref NRF_DRV_SPI_FLAG_REPEATED_XFER<span></span>: Prepare for repeated transfers. You can set
<> 162:e13f6fdb2ac4 351 * up a number of transfers that will be triggered externally (for example by PPI). An example is
<> 162:e13f6fdb2ac4 352 * a TXRX transfer with the options @ref NRF_DRV_SPI_FLAG_RX_POSTINC,
<> 162:e13f6fdb2ac4 353 * @ref NRF_DRV_SPI_FLAG_NO_XFER_EVT_HANDLER, and @ref NRF_DRV_SPI_FLAG_REPEATED_XFER. After the
<> 162:e13f6fdb2ac4 354 * transfer is set up, a set of transfers can be triggered by PPI that will read, for example,
<> 162:e13f6fdb2ac4 355 * the same register of an external component and put it into a RAM buffer without any interrupts.
<> 162:e13f6fdb2ac4 356 * @ref nrf_drv_spi_end_event_get can be used to get the address of the END event, which can be
<> 162:e13f6fdb2ac4 357 * used to count the number of transfers. If @ref NRF_DRV_SPI_FLAG_REPEATED_XFER is used,
<> 162:e13f6fdb2ac4 358 * the driver does not set the instance into busy state, so you must ensure that the next
<> 162:e13f6fdb2ac4 359 * transfers are set up when SPIM is not active. Supported only by SPIM.
<> 162:e13f6fdb2ac4 360 * @note Function is intended to be used only in non-blocking mode.
<> 162:e13f6fdb2ac4 361 *
<> 162:e13f6fdb2ac4 362 * @param p_instance Pointer to the driver instance structure.
<> 162:e13f6fdb2ac4 363 * @param p_xfer_desc Pointer to the transfer descriptor.
<> 162:e13f6fdb2ac4 364 * @param flags Transfer options (0 for default settings).
<> 162:e13f6fdb2ac4 365 *
<> 162:e13f6fdb2ac4 366 * @retval NRF_SUCCESS If the procedure was successful.
<> 162:e13f6fdb2ac4 367 * @retval NRF_ERROR_BUSY If the driver is not ready for a new transfer.
<> 162:e13f6fdb2ac4 368 * @retval NRF_ERROR_NOT_SUPPORTED If the provided parameters are not supported.
<> 162:e13f6fdb2ac4 369 * @retval NRF_ERROR_INVALID_ADDR If the provided buffers are not placed in the Data
<> 162:e13f6fdb2ac4 370 * RAM region.
<> 162:e13f6fdb2ac4 371 */
<> 162:e13f6fdb2ac4 372 ret_code_t nrf_drv_spi_xfer(nrf_drv_spi_t const * const p_instance,
<> 162:e13f6fdb2ac4 373 nrf_drv_spi_xfer_desc_t const * p_xfer_desc,
<> 162:e13f6fdb2ac4 374 uint32_t flags);
<> 162:e13f6fdb2ac4 375
<> 162:e13f6fdb2ac4 376 /**
<> 162:e13f6fdb2ac4 377 * @brief Function for returning the address of a SPIM start task.
<> 162:e13f6fdb2ac4 378 *
<> 162:e13f6fdb2ac4 379 * This function should be used if @ref nrf_drv_spi_xfer was called with the flag @ref NRF_DRV_SPI_FLAG_HOLD_XFER.
<> 162:e13f6fdb2ac4 380 * In that case, the transfer is not started by the driver, but it must be started externally by PPI.
<> 162:e13f6fdb2ac4 381 *
<> 162:e13f6fdb2ac4 382 * @param[in] p_instance Pointer to the driver instance structure.
<> 162:e13f6fdb2ac4 383 *
<> 162:e13f6fdb2ac4 384 * @return Start task address.
<> 162:e13f6fdb2ac4 385 */
<> 162:e13f6fdb2ac4 386 uint32_t nrf_drv_spi_start_task_get(nrf_drv_spi_t const * p_instance);
<> 162:e13f6fdb2ac4 387
<> 162:e13f6fdb2ac4 388 /**
<> 162:e13f6fdb2ac4 389 * @brief Function for returning the address of a END SPIM event.
<> 162:e13f6fdb2ac4 390 *
<> 162:e13f6fdb2ac4 391 * A END event can be used to detect the end of a transfer if the @ref NRF_DRV_SPI_FLAG_NO_XFER_EVT_HANDLER
<> 162:e13f6fdb2ac4 392 * option is used.
<> 162:e13f6fdb2ac4 393 *
<> 162:e13f6fdb2ac4 394 * @param[in] p_instance Pointer to the driver instance structure.
<> 162:e13f6fdb2ac4 395 *
<> 162:e13f6fdb2ac4 396 * @return END event address.
<> 162:e13f6fdb2ac4 397 */
<> 162:e13f6fdb2ac4 398 uint32_t nrf_drv_spi_end_event_get(nrf_drv_spi_t const * p_instance);
<> 162:e13f6fdb2ac4 399
<> 162:e13f6fdb2ac4 400 // modification for mbed-os
<> 162:e13f6fdb2ac4 401 #if __MBED__
<> 162:e13f6fdb2ac4 402 void nrf_drv_spi_abort(nrf_drv_spi_t const * p_instance);
<> 162:e13f6fdb2ac4 403 #endif
<> 162:e13f6fdb2ac4 404
<> 162:e13f6fdb2ac4 405 #ifdef __cplusplus
<> 162:e13f6fdb2ac4 406 }
<> 162:e13f6fdb2ac4 407 #endif
<> 162:e13f6fdb2ac4 408
<> 162:e13f6fdb2ac4 409 #endif // NRF_DRV_SPI_H__
<> 162:e13f6fdb2ac4 410
<> 162:e13f6fdb2ac4 411 /** @} */