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targets/TARGET_NORDIC/TARGET_NRF5/TARGET_SDK11/drivers_nrf/hal/nrf_gpiote.h@180:d79f997829d6, 2017-12-18 (annotated)

Committer:
Anythingconnected
Date:
Mon Dec 18 10:14:27 2017 +0000
Revision:
180:d79f997829d6
Parent:
165:e614a9f1c9e2 
Getting byte by byte read to work

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /*
<> 144:ef7eb2e8f9f7 2 * Copyright (c) 2015 Nordic Semiconductor ASA
<> 144:ef7eb2e8f9f7 3 * All rights reserved.
<> 144:ef7eb2e8f9f7 4 *
<> 144:ef7eb2e8f9f7 5 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 6 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 7 *
<> 144:ef7eb2e8f9f7 8 * 1. Redistributions of source code must retain the above copyright notice, this list
<> 144:ef7eb2e8f9f7 9 * of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 10 *
<> 144:ef7eb2e8f9f7 11 * 2. Redistributions in binary form, except as embedded into a Nordic Semiconductor ASA
<> 144:ef7eb2e8f9f7 12 * integrated circuit in a product or a software update for such product, must reproduce
<> 144:ef7eb2e8f9f7 13 * the above copyright notice, this list of conditions and the following disclaimer in
<> 144:ef7eb2e8f9f7 14 * the documentation and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 15 *
<> 144:ef7eb2e8f9f7 16 * 3. Neither the name of Nordic Semiconductor ASA nor the names of its contributors may be
<> 144:ef7eb2e8f9f7 17 * used to endorse or promote products derived from this software without specific prior
<> 144:ef7eb2e8f9f7 18 * written permission.
<> 144:ef7eb2e8f9f7 19 *
<> 144:ef7eb2e8f9f7 20 * 4. This software, with or without modification, must only be used with a
<> 144:ef7eb2e8f9f7 21 * Nordic Semiconductor ASA integrated circuit.
<> 144:ef7eb2e8f9f7 22 *
<> 144:ef7eb2e8f9f7 23 * 5. Any software provided in binary or object form under this license must not be reverse
<> 144:ef7eb2e8f9f7 24 * engineered, decompiled, modified and/or disassembled.
<> 144:ef7eb2e8f9f7 25 *
<> 144:ef7eb2e8f9f7 26 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
<> 144:ef7eb2e8f9f7 27 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
<> 144:ef7eb2e8f9f7 28 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 29 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
<> 144:ef7eb2e8f9f7 30 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
<> 144:ef7eb2e8f9f7 31 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
<> 144:ef7eb2e8f9f7 32 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
<> 144:ef7eb2e8f9f7 33 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
<> 144:ef7eb2e8f9f7 34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
<> 144:ef7eb2e8f9f7 35 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 36 *
<> 144:ef7eb2e8f9f7 37 */
<> 144:ef7eb2e8f9f7 38
<> 144:ef7eb2e8f9f7 39 #ifndef NRF_GPIOTE_H__
<> 144:ef7eb2e8f9f7 40 #define NRF_GPIOTE_H__
<> 144:ef7eb2e8f9f7 41
<> 144:ef7eb2e8f9f7 42 #include "nrf.h"
<> 144:ef7eb2e8f9f7 43 #include <stdint.h>
<> 144:ef7eb2e8f9f7 44 #include <stddef.h>
<> 144:ef7eb2e8f9f7 45 #include <stdbool.h>
<> 144:ef7eb2e8f9f7 46
<> 144:ef7eb2e8f9f7 47 /**
<> 144:ef7eb2e8f9f7 48 * @defgroup nrf_gpiote_abs GPIOTE abstraction
<> 144:ef7eb2e8f9f7 49 * @{
<> 144:ef7eb2e8f9f7 50 * @ingroup nrf_gpiote
<> 144:ef7eb2e8f9f7 51 * @brief GPIOTE abstraction for configuration of channels.
<> 144:ef7eb2e8f9f7 52 */
<> 144:ef7eb2e8f9f7 53 #ifdef NRF51
<> 144:ef7eb2e8f9f7 54 #define NUMBER_OF_GPIO_TE 4
<> 144:ef7eb2e8f9f7 55 #elif defined(NRF52)
<> 144:ef7eb2e8f9f7 56 #define NUMBER_OF_GPIO_TE 8
<> 144:ef7eb2e8f9f7 57 #else
<> 144:ef7eb2e8f9f7 58 #error "Chip family not specified"
<> 144:ef7eb2e8f9f7 59 #endif
<> 144:ef7eb2e8f9f7 60
<> 144:ef7eb2e8f9f7 61 /**
<> 144:ef7eb2e8f9f7 62 * @enum nrf_gpiote_polarity_t
<> 144:ef7eb2e8f9f7 63 * @brief Polarity for the GPIOTE channel.
<> 144:ef7eb2e8f9f7 64 */
<> 144:ef7eb2e8f9f7 65 typedef enum
<> 144:ef7eb2e8f9f7 66 {
<> 144:ef7eb2e8f9f7 67 NRF_GPIOTE_POLARITY_LOTOHI = GPIOTE_CONFIG_POLARITY_LoToHi, ///< Low to high.
<> 144:ef7eb2e8f9f7 68 NRF_GPIOTE_POLARITY_HITOLO = GPIOTE_CONFIG_POLARITY_HiToLo, ///< High to low.
<> 144:ef7eb2e8f9f7 69 NRF_GPIOTE_POLARITY_TOGGLE = GPIOTE_CONFIG_POLARITY_Toggle ///< Toggle.
<> 144:ef7eb2e8f9f7 70 } nrf_gpiote_polarity_t;
<> 144:ef7eb2e8f9f7 71
<> 144:ef7eb2e8f9f7 72
<> 144:ef7eb2e8f9f7 73 /**
<> 144:ef7eb2e8f9f7 74 * @enum nrf_gpiote_outinit_t
<> 144:ef7eb2e8f9f7 75 * @brief Initial output value for the GPIOTE channel.
<> 144:ef7eb2e8f9f7 76 */
<> 144:ef7eb2e8f9f7 77 typedef enum
<> 144:ef7eb2e8f9f7 78 {
<> 144:ef7eb2e8f9f7 79 NRF_GPIOTE_INITIAL_VALUE_LOW = GPIOTE_CONFIG_OUTINIT_Low, ///< Low to high.
<> 144:ef7eb2e8f9f7 80 NRF_GPIOTE_INITIAL_VALUE_HIGH = GPIOTE_CONFIG_OUTINIT_High ///< High to low.
<> 144:ef7eb2e8f9f7 81 } nrf_gpiote_outinit_t;
<> 144:ef7eb2e8f9f7 82
<> 144:ef7eb2e8f9f7 83 /**
<> 144:ef7eb2e8f9f7 84 * @brief Tasks.
<> 144:ef7eb2e8f9f7 85 */
<> 144:ef7eb2e8f9f7 86 typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */
<> 144:ef7eb2e8f9f7 87 {
<> 144:ef7eb2e8f9f7 88 NRF_GPIOTE_TASKS_OUT_0 = offsetof(NRF_GPIOTE_Type, TASKS_OUT[0]), /**< Out task 0.*/
<> 144:ef7eb2e8f9f7 89 NRF_GPIOTE_TASKS_OUT_1 = offsetof(NRF_GPIOTE_Type, TASKS_OUT[1]), /**< Out task 1.*/
<> 144:ef7eb2e8f9f7 90 NRF_GPIOTE_TASKS_OUT_2 = offsetof(NRF_GPIOTE_Type, TASKS_OUT[2]), /**< Out task 2.*/
<> 144:ef7eb2e8f9f7 91 NRF_GPIOTE_TASKS_OUT_3 = offsetof(NRF_GPIOTE_Type, TASKS_OUT[3]), /**< Out task 3.*/
<> 144:ef7eb2e8f9f7 92 #if (NUMBER_OF_GPIO_TE == 8)
<> 144:ef7eb2e8f9f7 93 NRF_GPIOTE_TASKS_OUT_4 = offsetof(NRF_GPIOTE_Type, TASKS_OUT[4]), /**< Out task 4.*/
<> 144:ef7eb2e8f9f7 94 NRF_GPIOTE_TASKS_OUT_5 = offsetof(NRF_GPIOTE_Type, TASKS_OUT[5]), /**< Out task 5.*/
<> 144:ef7eb2e8f9f7 95 NRF_GPIOTE_TASKS_OUT_6 = offsetof(NRF_GPIOTE_Type, TASKS_OUT[6]), /**< Out task 6.*/
<> 144:ef7eb2e8f9f7 96 NRF_GPIOTE_TASKS_OUT_7 = offsetof(NRF_GPIOTE_Type, TASKS_OUT[7]), /**< Out task 7.*/
<> 144:ef7eb2e8f9f7 97 #endif
<> 144:ef7eb2e8f9f7 98 #ifdef NRF52
<> 144:ef7eb2e8f9f7 99 NRF_GPIOTE_TASKS_SET_0 = offsetof(NRF_GPIOTE_Type, TASKS_SET[0]), /**< Set task 0.*/
<> 144:ef7eb2e8f9f7 100 NRF_GPIOTE_TASKS_SET_1 = offsetof(NRF_GPIOTE_Type, TASKS_SET[1]), /**< Set task 1.*/
<> 144:ef7eb2e8f9f7 101 NRF_GPIOTE_TASKS_SET_2 = offsetof(NRF_GPIOTE_Type, TASKS_SET[2]), /**< Set task 2.*/
<> 144:ef7eb2e8f9f7 102 NRF_GPIOTE_TASKS_SET_3 = offsetof(NRF_GPIOTE_Type, TASKS_SET[3]), /**< Set task 3.*/
<> 144:ef7eb2e8f9f7 103 NRF_GPIOTE_TASKS_SET_4 = offsetof(NRF_GPIOTE_Type, TASKS_SET[4]), /**< Set task 4.*/
<> 144:ef7eb2e8f9f7 104 NRF_GPIOTE_TASKS_SET_5 = offsetof(NRF_GPIOTE_Type, TASKS_SET[5]), /**< Set task 5.*/
<> 144:ef7eb2e8f9f7 105 NRF_GPIOTE_TASKS_SET_6 = offsetof(NRF_GPIOTE_Type, TASKS_SET[6]), /**< Set task 6.*/
<> 144:ef7eb2e8f9f7 106 NRF_GPIOTE_TASKS_SET_7 = offsetof(NRF_GPIOTE_Type, TASKS_SET[7]), /**< Set task 7.*/
<> 144:ef7eb2e8f9f7 107 NRF_GPIOTE_TASKS_CLR_0 = offsetof(NRF_GPIOTE_Type, TASKS_CLR[0]), /**< Clear task 0.*/
<> 144:ef7eb2e8f9f7 108 NRF_GPIOTE_TASKS_CLR_1 = offsetof(NRF_GPIOTE_Type, TASKS_CLR[1]), /**< Clear task 1.*/
<> 144:ef7eb2e8f9f7 109 NRF_GPIOTE_TASKS_CLR_2 = offsetof(NRF_GPIOTE_Type, TASKS_CLR[2]), /**< Clear task 2.*/
<> 144:ef7eb2e8f9f7 110 NRF_GPIOTE_TASKS_CLR_3 = offsetof(NRF_GPIOTE_Type, TASKS_CLR[3]), /**< Clear task 3.*/
<> 144:ef7eb2e8f9f7 111 NRF_GPIOTE_TASKS_CLR_4 = offsetof(NRF_GPIOTE_Type, TASKS_CLR[4]), /**< Clear task 4.*/
<> 144:ef7eb2e8f9f7 112 NRF_GPIOTE_TASKS_CLR_5 = offsetof(NRF_GPIOTE_Type, TASKS_CLR[5]), /**< Clear task 5.*/
<> 144:ef7eb2e8f9f7 113 NRF_GPIOTE_TASKS_CLR_6 = offsetof(NRF_GPIOTE_Type, TASKS_CLR[6]), /**< Clear task 6.*/
<> 144:ef7eb2e8f9f7 114 NRF_GPIOTE_TASKS_CLR_7 = offsetof(NRF_GPIOTE_Type, TASKS_CLR[7]), /**< Clear task 7.*/
<> 144:ef7eb2e8f9f7 115 #endif
<> 144:ef7eb2e8f9f7 116 /*lint -restore*/
<> 144:ef7eb2e8f9f7 117 } nrf_gpiote_tasks_t;
<> 144:ef7eb2e8f9f7 118
<> 144:ef7eb2e8f9f7 119 /**
<> 144:ef7eb2e8f9f7 120 * @brief Events.
<> 144:ef7eb2e8f9f7 121 */
<> 144:ef7eb2e8f9f7 122 typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */
<> 144:ef7eb2e8f9f7 123 {
<> 144:ef7eb2e8f9f7 124 NRF_GPIOTE_EVENTS_IN_0 = offsetof(NRF_GPIOTE_Type, EVENTS_IN[0]), /**< In event 0.*/
<> 144:ef7eb2e8f9f7 125 NRF_GPIOTE_EVENTS_IN_1 = offsetof(NRF_GPIOTE_Type, EVENTS_IN[1]), /**< In event 1.*/
<> 144:ef7eb2e8f9f7 126 NRF_GPIOTE_EVENTS_IN_2 = offsetof(NRF_GPIOTE_Type, EVENTS_IN[2]), /**< In event 2.*/
<> 144:ef7eb2e8f9f7 127 NRF_GPIOTE_EVENTS_IN_3 = offsetof(NRF_GPIOTE_Type, EVENTS_IN[3]), /**< In event 3.*/
<> 144:ef7eb2e8f9f7 128 #if (NUMBER_OF_GPIO_TE == 8)
<> 144:ef7eb2e8f9f7 129 NRF_GPIOTE_EVENTS_IN_4 = offsetof(NRF_GPIOTE_Type, EVENTS_IN[4]), /**< In event 4.*/
<> 144:ef7eb2e8f9f7 130 NRF_GPIOTE_EVENTS_IN_5 = offsetof(NRF_GPIOTE_Type, EVENTS_IN[5]), /**< In event 5.*/
<> 144:ef7eb2e8f9f7 131 NRF_GPIOTE_EVENTS_IN_6 = offsetof(NRF_GPIOTE_Type, EVENTS_IN[6]), /**< In event 6.*/
<> 144:ef7eb2e8f9f7 132 NRF_GPIOTE_EVENTS_IN_7 = offsetof(NRF_GPIOTE_Type, EVENTS_IN[7]), /**< In event 7.*/
<> 144:ef7eb2e8f9f7 133 #endif
<> 144:ef7eb2e8f9f7 134 NRF_GPIOTE_EVENTS_PORT = offsetof(NRF_GPIOTE_Type, EVENTS_PORT), /**< Port event.*/
<> 144:ef7eb2e8f9f7 135 /*lint -restore*/
<> 144:ef7eb2e8f9f7 136 } nrf_gpiote_events_t;
<> 144:ef7eb2e8f9f7 137
<> 144:ef7eb2e8f9f7 138 /**
<> 144:ef7eb2e8f9f7 139 * @enum nrf_gpiote_int_t
<> 144:ef7eb2e8f9f7 140 * @brief GPIOTE interrupts.
<> 144:ef7eb2e8f9f7 141 */
<> 144:ef7eb2e8f9f7 142 typedef enum
<> 144:ef7eb2e8f9f7 143 {
<> 144:ef7eb2e8f9f7 144 NRF_GPIOTE_INT_IN0_MASK = GPIOTE_INTENSET_IN0_Msk, /**< GPIOTE interrupt from IN0. */
<> 144:ef7eb2e8f9f7 145 NRF_GPIOTE_INT_IN1_MASK = GPIOTE_INTENSET_IN1_Msk, /**< GPIOTE interrupt from IN1. */
<> 144:ef7eb2e8f9f7 146 NRF_GPIOTE_INT_IN2_MASK = GPIOTE_INTENSET_IN2_Msk, /**< GPIOTE interrupt from IN2. */
<> 144:ef7eb2e8f9f7 147 NRF_GPIOTE_INT_IN3_MASK = GPIOTE_INTENSET_IN3_Msk, /**< GPIOTE interrupt from IN3. */
<> 144:ef7eb2e8f9f7 148 #if (NUMBER_OF_GPIO_TE == 8)
<> 144:ef7eb2e8f9f7 149 NRF_GPIOTE_INT_IN4_MASK = GPIOTE_INTENSET_IN4_Msk, /**< GPIOTE interrupt from IN4. */
<> 144:ef7eb2e8f9f7 150 NRF_GPIOTE_INT_IN5_MASK = GPIOTE_INTENSET_IN5_Msk, /**< GPIOTE interrupt from IN5. */
<> 144:ef7eb2e8f9f7 151 NRF_GPIOTE_INT_IN6_MASK = GPIOTE_INTENSET_IN6_Msk, /**< GPIOTE interrupt from IN6. */
<> 144:ef7eb2e8f9f7 152 NRF_GPIOTE_INT_IN7_MASK = GPIOTE_INTENSET_IN7_Msk, /**< GPIOTE interrupt from IN7. */
<> 144:ef7eb2e8f9f7 153 #endif
<> 144:ef7eb2e8f9f7 154 NRF_GPIOTE_INT_PORT_MASK = (int)GPIOTE_INTENSET_PORT_Msk, /**< GPIOTE interrupt from PORT event. */
<> 144:ef7eb2e8f9f7 155 } nrf_gpiote_int_t;
<> 144:ef7eb2e8f9f7 156
<> 144:ef7eb2e8f9f7 157 #if (NUMBER_OF_GPIO_TE == 4)
<> 144:ef7eb2e8f9f7 158 #define NRF_GPIOTE_INT_IN_MASK (NRF_GPIOTE_INT_IN0_MASK | NRF_GPIOTE_INT_IN1_MASK |\
<> 144:ef7eb2e8f9f7 159 NRF_GPIOTE_INT_IN2_MASK | NRF_GPIOTE_INT_IN3_MASK)
<> 144:ef7eb2e8f9f7 160 #elif (NUMBER_OF_GPIO_TE == 8)
<> 144:ef7eb2e8f9f7 161 #define NRF_GPIOTE_INT_IN_MASK (NRF_GPIOTE_INT_IN0_MASK | NRF_GPIOTE_INT_IN1_MASK |\
<> 144:ef7eb2e8f9f7 162 NRF_GPIOTE_INT_IN2_MASK | NRF_GPIOTE_INT_IN3_MASK |\
<> 144:ef7eb2e8f9f7 163 NRF_GPIOTE_INT_IN4_MASK | NRF_GPIOTE_INT_IN5_MASK |\
<> 144:ef7eb2e8f9f7 164 NRF_GPIOTE_INT_IN6_MASK | NRF_GPIOTE_INT_IN7_MASK)
<> 144:ef7eb2e8f9f7 165 #else
<> 144:ef7eb2e8f9f7 166 #error "Unexpected number of GPIO Tasks and Events"
<> 144:ef7eb2e8f9f7 167 #endif
<> 144:ef7eb2e8f9f7 168 /**
<> 144:ef7eb2e8f9f7 169 * @brief Function for activating a specific GPIOTE task.
<> 144:ef7eb2e8f9f7 170 *
<> 144:ef7eb2e8f9f7 171 * @param[in] task Task.
<> 144:ef7eb2e8f9f7 172 */
<> 144:ef7eb2e8f9f7 173 __STATIC_INLINE void nrf_gpiote_task_set(nrf_gpiote_tasks_t task);
<> 144:ef7eb2e8f9f7 174
<> 144:ef7eb2e8f9f7 175 /**
<> 144:ef7eb2e8f9f7 176 * @brief Function for getting the address of a specific GPIOTE task.
<> 144:ef7eb2e8f9f7 177 *
<> 144:ef7eb2e8f9f7 178 * @param[in] task Task.
<> 144:ef7eb2e8f9f7 179 *
<> 144:ef7eb2e8f9f7 180 * @returns Address.
<> 144:ef7eb2e8f9f7 181 */
<> 144:ef7eb2e8f9f7 182 __STATIC_INLINE uint32_t nrf_gpiote_task_addr_get(nrf_gpiote_tasks_t task);
<> 144:ef7eb2e8f9f7 183
<> 144:ef7eb2e8f9f7 184 /**
<> 144:ef7eb2e8f9f7 185 * @brief Function for getting the state of a specific GPIOTE event.
<> 144:ef7eb2e8f9f7 186 *
<> 144:ef7eb2e8f9f7 187 * @param[in] event Event.
<> 144:ef7eb2e8f9f7 188 */
<> 144:ef7eb2e8f9f7 189 __STATIC_INLINE bool nrf_gpiote_event_is_set(nrf_gpiote_events_t event);
<> 144:ef7eb2e8f9f7 190
<> 144:ef7eb2e8f9f7 191 /**
<> 144:ef7eb2e8f9f7 192 * @brief Function for clearing a specific GPIOTE event.
<> 144:ef7eb2e8f9f7 193 *
<> 144:ef7eb2e8f9f7 194 * @param[in] event Event.
<> 144:ef7eb2e8f9f7 195 */
<> 144:ef7eb2e8f9f7 196 __STATIC_INLINE void nrf_gpiote_event_clear(nrf_gpiote_events_t event);
<> 144:ef7eb2e8f9f7 197
<> 144:ef7eb2e8f9f7 198 /**
<> 144:ef7eb2e8f9f7 199 * @brief Function for getting the address of a specific GPIOTE event.
<> 144:ef7eb2e8f9f7 200 *
<> 144:ef7eb2e8f9f7 201 * @param[in] event Event.
<> 144:ef7eb2e8f9f7 202 *
<> 144:ef7eb2e8f9f7 203 * @return Address
<> 144:ef7eb2e8f9f7 204 */
<> 144:ef7eb2e8f9f7 205 __STATIC_INLINE uint32_t nrf_gpiote_event_addr_get(nrf_gpiote_events_t event);
<> 144:ef7eb2e8f9f7 206
<> 144:ef7eb2e8f9f7 207 /**@brief Function for enabling interrupts.
<> 144:ef7eb2e8f9f7 208 *
<> 144:ef7eb2e8f9f7 209 * @param[in] mask Interrupt mask to be enabled.
<> 144:ef7eb2e8f9f7 210 */
<> 144:ef7eb2e8f9f7 211 __STATIC_INLINE void nrf_gpiote_int_enable(uint32_t mask);
<> 144:ef7eb2e8f9f7 212
<> 144:ef7eb2e8f9f7 213 /**@brief Function for disabling interrupts.
<> 144:ef7eb2e8f9f7 214 *
<> 144:ef7eb2e8f9f7 215 * @param[in] mask Interrupt mask to be disabled.
<> 144:ef7eb2e8f9f7 216 */
<> 144:ef7eb2e8f9f7 217 __STATIC_INLINE void nrf_gpiote_int_disable(uint32_t mask);
<> 144:ef7eb2e8f9f7 218
<> 144:ef7eb2e8f9f7 219 /**@brief Function for checking if interrupts are enabled.
<> 144:ef7eb2e8f9f7 220 *
<> 144:ef7eb2e8f9f7 221 * @param[in] mask Mask of interrupt flags to check.
<> 144:ef7eb2e8f9f7 222 *
<> 144:ef7eb2e8f9f7 223 * @return Mask with enabled interrupts.
<> 144:ef7eb2e8f9f7 224 */
<> 144:ef7eb2e8f9f7 225 __STATIC_INLINE uint32_t nrf_gpiote_int_is_enabled(uint32_t mask);
<> 144:ef7eb2e8f9f7 226
<> 144:ef7eb2e8f9f7 227 /**@brief Function for enabling a GPIOTE event.
<> 144:ef7eb2e8f9f7 228 *
<> 144:ef7eb2e8f9f7 229 * @param[in] idx Task-Event index.
<> 144:ef7eb2e8f9f7 230 */
<> 144:ef7eb2e8f9f7 231 __STATIC_INLINE void nrf_gpiote_event_enable(uint32_t idx);
<> 144:ef7eb2e8f9f7 232
<> 144:ef7eb2e8f9f7 233 /**@brief Function for disabling a GPIOTE event.
<> 144:ef7eb2e8f9f7 234 *
<> 144:ef7eb2e8f9f7 235 * @param[in] idx Task-Event index.
<> 144:ef7eb2e8f9f7 236 */
<> 144:ef7eb2e8f9f7 237 __STATIC_INLINE void nrf_gpiote_event_disable(uint32_t idx);
<> 144:ef7eb2e8f9f7 238
<> 144:ef7eb2e8f9f7 239 /**@brief Function for configuring a GPIOTE event.
<> 144:ef7eb2e8f9f7 240 *
<> 144:ef7eb2e8f9f7 241 * @param[in] idx Task-Event index.
<> 144:ef7eb2e8f9f7 242 * @param[in] pin Pin associated with event.
<> 144:ef7eb2e8f9f7 243 * @param[in] polarity Transition that should generate an event.
<> 144:ef7eb2e8f9f7 244 */
<> 144:ef7eb2e8f9f7 245 __STATIC_INLINE void nrf_gpiote_event_configure(uint32_t idx, uint32_t pin,
<> 144:ef7eb2e8f9f7 246 nrf_gpiote_polarity_t polarity);
<> 144:ef7eb2e8f9f7 247
<> 144:ef7eb2e8f9f7 248 /**@brief Function for getting the pin associated with a GPIOTE event.
<> 144:ef7eb2e8f9f7 249 *
<> 144:ef7eb2e8f9f7 250 * @param[in] idx Task-Event index.
<> 144:ef7eb2e8f9f7 251 *
<> 144:ef7eb2e8f9f7 252 * @return Pin number.
<> 144:ef7eb2e8f9f7 253 */
<> 144:ef7eb2e8f9f7 254 __STATIC_INLINE uint32_t nrf_gpiote_event_pin_get(uint32_t idx);
<> 144:ef7eb2e8f9f7 255
<> 144:ef7eb2e8f9f7 256 /**@brief Function for getting the polarity associated with a GPIOTE event.
<> 144:ef7eb2e8f9f7 257 *
<> 144:ef7eb2e8f9f7 258 * @param[in] idx Task-Event index.
<> 144:ef7eb2e8f9f7 259 *
<> 144:ef7eb2e8f9f7 260 * @return Polarity.
<> 144:ef7eb2e8f9f7 261 */
<> 144:ef7eb2e8f9f7 262 __STATIC_INLINE nrf_gpiote_polarity_t nrf_gpiote_event_polarity_get(uint32_t idx);
<> 144:ef7eb2e8f9f7 263
<> 144:ef7eb2e8f9f7 264 /**@brief Function for enabling a GPIOTE task.
<> 144:ef7eb2e8f9f7 265 *
<> 144:ef7eb2e8f9f7 266 * @param[in] idx Task-Event index.
<> 144:ef7eb2e8f9f7 267 */
<> 144:ef7eb2e8f9f7 268 __STATIC_INLINE void nrf_gpiote_task_enable(uint32_t idx);
<> 144:ef7eb2e8f9f7 269
<> 144:ef7eb2e8f9f7 270 /**@brief Function for disabling a GPIOTE task.
<> 144:ef7eb2e8f9f7 271 *
<> 144:ef7eb2e8f9f7 272 * @param[in] idx Task-Event index.
<> 144:ef7eb2e8f9f7 273 */
<> 144:ef7eb2e8f9f7 274 __STATIC_INLINE void nrf_gpiote_task_disable(uint32_t idx);
<> 144:ef7eb2e8f9f7 275
<> 144:ef7eb2e8f9f7 276 /**@brief Function for configuring a GPIOTE task.
<> 144:ef7eb2e8f9f7 277 * @note Function is not configuring mode field so task is disabled after this function is called.
<> 144:ef7eb2e8f9f7 278 *
<> 144:ef7eb2e8f9f7 279 * @param[in] idx Task-Event index.
<> 144:ef7eb2e8f9f7 280 * @param[in] pin Pin associated with event.
<> 144:ef7eb2e8f9f7 281 * @param[in] polarity Transition that should generate an event.
<> 144:ef7eb2e8f9f7 282 * @param[in] init_val Initial value of pin.
<> 144:ef7eb2e8f9f7 283 */
<> 144:ef7eb2e8f9f7 284 __STATIC_INLINE void nrf_gpiote_task_configure(uint32_t idx, uint32_t pin,
<> 144:ef7eb2e8f9f7 285 nrf_gpiote_polarity_t polarity,
<> 144:ef7eb2e8f9f7 286 nrf_gpiote_outinit_t init_val);
<> 144:ef7eb2e8f9f7 287
<> 144:ef7eb2e8f9f7 288 /**@brief Function for forcing a specific state on the pin connected to GPIOTE.
<> 144:ef7eb2e8f9f7 289 *
<> 144:ef7eb2e8f9f7 290 * @param[in] idx Task-Event index.
<> 144:ef7eb2e8f9f7 291 * @param[in] init_val Pin state.
<> 144:ef7eb2e8f9f7 292 */
<> 144:ef7eb2e8f9f7 293 __STATIC_INLINE void nrf_gpiote_task_force(uint32_t idx, nrf_gpiote_outinit_t init_val);
<> 144:ef7eb2e8f9f7 294
<> 144:ef7eb2e8f9f7 295 /**@brief Function for resetting a GPIOTE task event configuration to the default state.
<> 144:ef7eb2e8f9f7 296 *
<> 144:ef7eb2e8f9f7 297 * @param[in] idx Task-Event index.
<> 144:ef7eb2e8f9f7 298 */
<> 144:ef7eb2e8f9f7 299 __STATIC_INLINE void nrf_gpiote_te_default(uint32_t idx);
<> 144:ef7eb2e8f9f7 300
<> 144:ef7eb2e8f9f7 301 #ifndef SUPPRESS_INLINE_IMPLEMENTATION
<> 144:ef7eb2e8f9f7 302 __STATIC_INLINE void nrf_gpiote_task_set(nrf_gpiote_tasks_t task)
<> 144:ef7eb2e8f9f7 303 {
<> 144:ef7eb2e8f9f7 304 *(__IO uint32_t *)((uint32_t)NRF_GPIOTE + task) = 0x1UL;
<> 144:ef7eb2e8f9f7 305 }
<> 144:ef7eb2e8f9f7 306
<> 144:ef7eb2e8f9f7 307 __STATIC_INLINE uint32_t nrf_gpiote_task_addr_get(nrf_gpiote_tasks_t task)
<> 144:ef7eb2e8f9f7 308 {
<> 144:ef7eb2e8f9f7 309 return ((uint32_t)NRF_GPIOTE + task);
<> 144:ef7eb2e8f9f7 310 }
<> 144:ef7eb2e8f9f7 311
<> 144:ef7eb2e8f9f7 312 __STATIC_INLINE bool nrf_gpiote_event_is_set(nrf_gpiote_events_t event)
<> 144:ef7eb2e8f9f7 313 {
<> 144:ef7eb2e8f9f7 314 return (*(uint32_t *)nrf_gpiote_event_addr_get(event) == 0x1UL) ? true : false;
<> 144:ef7eb2e8f9f7 315 }
<> 144:ef7eb2e8f9f7 316
<> 144:ef7eb2e8f9f7 317 __STATIC_INLINE void nrf_gpiote_event_clear(nrf_gpiote_events_t event)
<> 144:ef7eb2e8f9f7 318 {
<> 144:ef7eb2e8f9f7 319 *(uint32_t *)nrf_gpiote_event_addr_get(event) = 0;
<> 144:ef7eb2e8f9f7 320 #if __CORTEX_M == 0x04
<> 144:ef7eb2e8f9f7 321 volatile uint32_t dummy = *((volatile uint32_t *)nrf_gpiote_event_addr_get(event));
<> 144:ef7eb2e8f9f7 322 (void)dummy;
<> 144:ef7eb2e8f9f7 323 #endif
<> 144:ef7eb2e8f9f7 324 }
<> 144:ef7eb2e8f9f7 325
<> 144:ef7eb2e8f9f7 326 __STATIC_INLINE uint32_t nrf_gpiote_event_addr_get(nrf_gpiote_events_t event)
<> 144:ef7eb2e8f9f7 327 {
<> 144:ef7eb2e8f9f7 328 return ((uint32_t)NRF_GPIOTE + event);
<> 144:ef7eb2e8f9f7 329 }
<> 144:ef7eb2e8f9f7 330
<> 144:ef7eb2e8f9f7 331 __STATIC_INLINE void nrf_gpiote_int_enable(uint32_t mask)
<> 144:ef7eb2e8f9f7 332 {
<> 144:ef7eb2e8f9f7 333 NRF_GPIOTE->INTENSET = mask;
<> 144:ef7eb2e8f9f7 334 }
<> 144:ef7eb2e8f9f7 335
<> 144:ef7eb2e8f9f7 336 __STATIC_INLINE void nrf_gpiote_int_disable(uint32_t mask)
<> 144:ef7eb2e8f9f7 337 {
<> 144:ef7eb2e8f9f7 338 NRF_GPIOTE->INTENCLR = mask;
<> 144:ef7eb2e8f9f7 339 }
<> 144:ef7eb2e8f9f7 340
<> 144:ef7eb2e8f9f7 341 __STATIC_INLINE uint32_t nrf_gpiote_int_is_enabled(uint32_t mask)
<> 144:ef7eb2e8f9f7 342 {
<> 144:ef7eb2e8f9f7 343 return (NRF_GPIOTE->INTENSET & mask);
<> 144:ef7eb2e8f9f7 344 }
<> 144:ef7eb2e8f9f7 345
<> 144:ef7eb2e8f9f7 346 __STATIC_INLINE void nrf_gpiote_event_enable(uint32_t idx)
<> 144:ef7eb2e8f9f7 347 {
<> 144:ef7eb2e8f9f7 348 NRF_GPIOTE->CONFIG[idx] |= GPIOTE_CONFIG_MODE_Event;
<> 144:ef7eb2e8f9f7 349 }
<> 144:ef7eb2e8f9f7 350
<> 144:ef7eb2e8f9f7 351 __STATIC_INLINE void nrf_gpiote_event_disable(uint32_t idx)
<> 144:ef7eb2e8f9f7 352 {
<> 144:ef7eb2e8f9f7 353 NRF_GPIOTE->CONFIG[idx] &= ~GPIOTE_CONFIG_MODE_Event;
<> 144:ef7eb2e8f9f7 354 }
<> 144:ef7eb2e8f9f7 355
<> 144:ef7eb2e8f9f7 356 __STATIC_INLINE void nrf_gpiote_event_configure(uint32_t idx, uint32_t pin, nrf_gpiote_polarity_t polarity)
<> 144:ef7eb2e8f9f7 357 {
<> 144:ef7eb2e8f9f7 358 NRF_GPIOTE->CONFIG[idx] &= ~(GPIOTE_CONFIG_PSEL_Msk | GPIOTE_CONFIG_POLARITY_Msk);
<> 144:ef7eb2e8f9f7 359 NRF_GPIOTE->CONFIG[idx] |= ((pin << GPIOTE_CONFIG_PSEL_Pos) & GPIOTE_CONFIG_PSEL_Msk) |
<> 144:ef7eb2e8f9f7 360 ((polarity << GPIOTE_CONFIG_POLARITY_Pos) & GPIOTE_CONFIG_POLARITY_Msk);
<> 144:ef7eb2e8f9f7 361 }
<> 144:ef7eb2e8f9f7 362
<> 144:ef7eb2e8f9f7 363 __STATIC_INLINE uint32_t nrf_gpiote_event_pin_get(uint32_t idx)
<> 144:ef7eb2e8f9f7 364 {
<> 144:ef7eb2e8f9f7 365 return ((NRF_GPIOTE->CONFIG[idx] & GPIOTE_CONFIG_PSEL_Msk) >> GPIOTE_CONFIG_PSEL_Pos);
<> 144:ef7eb2e8f9f7 366 }
<> 144:ef7eb2e8f9f7 367
<> 144:ef7eb2e8f9f7 368 __STATIC_INLINE nrf_gpiote_polarity_t nrf_gpiote_event_polarity_get(uint32_t idx)
<> 144:ef7eb2e8f9f7 369 {
<> 144:ef7eb2e8f9f7 370 return (nrf_gpiote_polarity_t)((NRF_GPIOTE->CONFIG[idx] & GPIOTE_CONFIG_POLARITY_Msk) >> GPIOTE_CONFIG_POLARITY_Pos);
<> 144:ef7eb2e8f9f7 371 }
<> 144:ef7eb2e8f9f7 372
<> 144:ef7eb2e8f9f7 373 __STATIC_INLINE void nrf_gpiote_task_enable(uint32_t idx)
<> 144:ef7eb2e8f9f7 374 {
<> 144:ef7eb2e8f9f7 375 uint32_t final_config = NRF_GPIOTE->CONFIG[idx] | GPIOTE_CONFIG_MODE_Task;
<> 144:ef7eb2e8f9f7 376 /* Workaround for the OUTINIT PAN. When nrf_gpiote_task_config() is called a glitch happens
<> 144:ef7eb2e8f9f7 377 on the GPIO if the GPIO in question is already assigned to GPIOTE and the pin is in the
<> 144:ef7eb2e8f9f7 378 correct state in GPIOTE but not in the OUT register. */
<> 144:ef7eb2e8f9f7 379 /* Configure channel to Pin31, not connected to the pin, and configure as a tasks that will set it to proper level */
<> 144:ef7eb2e8f9f7 380 NRF_GPIOTE->CONFIG[idx] = final_config | ((31 << GPIOTE_CONFIG_PSEL_Pos) & GPIOTE_CONFIG_PSEL_Msk);
<> 144:ef7eb2e8f9f7 381 __NOP();
<> 144:ef7eb2e8f9f7 382 __NOP();
<> 144:ef7eb2e8f9f7 383 __NOP();
<> 144:ef7eb2e8f9f7 384 NRF_GPIOTE->CONFIG[idx] = final_config;
<> 144:ef7eb2e8f9f7 385 }
<> 144:ef7eb2e8f9f7 386
<> 144:ef7eb2e8f9f7 387 __STATIC_INLINE void nrf_gpiote_task_disable(uint32_t idx)
<> 144:ef7eb2e8f9f7 388 {
<> 144:ef7eb2e8f9f7 389 NRF_GPIOTE->CONFIG[idx] &= ~GPIOTE_CONFIG_MODE_Task;
<> 144:ef7eb2e8f9f7 390 }
<> 144:ef7eb2e8f9f7 391
<> 144:ef7eb2e8f9f7 392 __STATIC_INLINE void nrf_gpiote_task_configure(uint32_t idx, uint32_t pin,
<> 144:ef7eb2e8f9f7 393 nrf_gpiote_polarity_t polarity,
<> 144:ef7eb2e8f9f7 394 nrf_gpiote_outinit_t init_val)
<> 144:ef7eb2e8f9f7 395 {
<> 144:ef7eb2e8f9f7 396 NRF_GPIOTE->CONFIG[idx] &= ~(GPIOTE_CONFIG_PSEL_Msk |
<> 144:ef7eb2e8f9f7 397 GPIOTE_CONFIG_POLARITY_Msk |
<> 144:ef7eb2e8f9f7 398 GPIOTE_CONFIG_OUTINIT_Msk);
<> 144:ef7eb2e8f9f7 399
<> 144:ef7eb2e8f9f7 400 NRF_GPIOTE->CONFIG[idx] |= ((pin << GPIOTE_CONFIG_PSEL_Pos) & GPIOTE_CONFIG_PSEL_Msk) |
<> 144:ef7eb2e8f9f7 401 ((polarity << GPIOTE_CONFIG_POLARITY_Pos) & GPIOTE_CONFIG_POLARITY_Msk) |
<> 144:ef7eb2e8f9f7 402 ((init_val << GPIOTE_CONFIG_OUTINIT_Pos) & GPIOTE_CONFIG_OUTINIT_Msk);
<> 144:ef7eb2e8f9f7 403 }
<> 144:ef7eb2e8f9f7 404
<> 144:ef7eb2e8f9f7 405 __STATIC_INLINE void nrf_gpiote_task_force(uint32_t idx, nrf_gpiote_outinit_t init_val)
<> 144:ef7eb2e8f9f7 406 {
<> 144:ef7eb2e8f9f7 407 NRF_GPIOTE->CONFIG[idx] = (NRF_GPIOTE->CONFIG[idx] & ~GPIOTE_CONFIG_OUTINIT_Msk)
<> 144:ef7eb2e8f9f7 408 | ((init_val << GPIOTE_CONFIG_OUTINIT_Pos) & GPIOTE_CONFIG_OUTINIT_Msk);
<> 144:ef7eb2e8f9f7 409 }
<> 144:ef7eb2e8f9f7 410
<> 144:ef7eb2e8f9f7 411 __STATIC_INLINE void nrf_gpiote_te_default(uint32_t idx)
<> 144:ef7eb2e8f9f7 412 {
<> 144:ef7eb2e8f9f7 413 NRF_GPIOTE->CONFIG[idx] = 0;
<> 144:ef7eb2e8f9f7 414 }
<> 144:ef7eb2e8f9f7 415 #endif //SUPPRESS_INLINE_IMPLEMENTATION
<> 144:ef7eb2e8f9f7 416 /** @} */
<> 144:ef7eb2e8f9f7 417
<> 144:ef7eb2e8f9f7 418 #endif