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targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/drivers/fsl_crc.c@180:d79f997829d6, 2017-12-18 (annotated)

Committer:
Anythingconnected
Date:
Mon Dec 18 10:14:27 2017 +0000
Revision:
180:d79f997829d6
Parent:
154:37f96f9d4de2 
Getting byte by byte read to work

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 154:37f96f9d4de2 1 /*
<> 154:37f96f9d4de2 2 * Copyright (c) 2015-2016, Freescale Semiconductor, Inc.
<> 154:37f96f9d4de2 3 * All rights reserved.
<> 154:37f96f9d4de2 4 *
<> 154:37f96f9d4de2 5 * Redistribution and use in source and binary forms, with or without modification,
<> 154:37f96f9d4de2 6 * are permitted provided that the following conditions are met:
<> 154:37f96f9d4de2 7 *
<> 154:37f96f9d4de2 8 * o Redistributions of source code must retain the above copyright notice, this list
<> 154:37f96f9d4de2 9 * of conditions and the following disclaimer.
<> 154:37f96f9d4de2 10 *
<> 154:37f96f9d4de2 11 * o Redistributions in binary form must reproduce the above copyright notice, this
<> 154:37f96f9d4de2 12 * list of conditions and the following disclaimer in the documentation and/or
<> 154:37f96f9d4de2 13 * other materials provided with the distribution.
<> 154:37f96f9d4de2 14 *
<> 154:37f96f9d4de2 15 * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
<> 154:37f96f9d4de2 16 * contributors may be used to endorse or promote products derived from this
<> 154:37f96f9d4de2 17 * software without specific prior written permission.
<> 154:37f96f9d4de2 18 *
<> 154:37f96f9d4de2 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
<> 154:37f96f9d4de2 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
<> 154:37f96f9d4de2 21 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 154:37f96f9d4de2 22 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
<> 154:37f96f9d4de2 23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
<> 154:37f96f9d4de2 24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
<> 154:37f96f9d4de2 25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
<> 154:37f96f9d4de2 26 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
<> 154:37f96f9d4de2 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
<> 154:37f96f9d4de2 28 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 154:37f96f9d4de2 29 */
<> 154:37f96f9d4de2 30 #include "fsl_crc.h"
<> 154:37f96f9d4de2 31
<> 154:37f96f9d4de2 32 /*******************************************************************************
<> 154:37f96f9d4de2 33 * Definitions
<> 154:37f96f9d4de2 34 ******************************************************************************/
<> 154:37f96f9d4de2 35 /*! @internal @brief Has data register with name CRC. */
<> 154:37f96f9d4de2 36 #if defined(FSL_FEATURE_CRC_HAS_CRC_REG) && FSL_FEATURE_CRC_HAS_CRC_REG
<> 154:37f96f9d4de2 37 #define DATA CRC
<> 154:37f96f9d4de2 38 #define DATALL CRCLL
<> 154:37f96f9d4de2 39 #endif
<> 154:37f96f9d4de2 40
<> 154:37f96f9d4de2 41 #if defined(CRC_DRIVER_USE_CRC16_CCIT_FALSE_AS_DEFAULT) && CRC_DRIVER_USE_CRC16_CCIT_FALSE_AS_DEFAULT
<> 154:37f96f9d4de2 42 /* @brief Default user configuration structure for CRC-16-CCITT */
<> 154:37f96f9d4de2 43 #define CRC_DRIVER_DEFAULT_POLYNOMIAL 0x1021U
<> 154:37f96f9d4de2 44 /*< CRC-16-CCIT polynomial x**16 + x**12 + x**5 + x**0 */
<> 154:37f96f9d4de2 45 #define CRC_DRIVER_DEFAULT_SEED 0xFFFFU
<> 154:37f96f9d4de2 46 /*< Default initial checksum */
<> 154:37f96f9d4de2 47 #define CRC_DRIVER_DEFAULT_REFLECT_IN false
<> 154:37f96f9d4de2 48 /*< Default is no transpose */
<> 154:37f96f9d4de2 49 #define CRC_DRIVER_DEFAULT_REFLECT_OUT false
<> 154:37f96f9d4de2 50 /*< Default is transpose bytes */
<> 154:37f96f9d4de2 51 #define CRC_DRIVER_DEFAULT_COMPLEMENT_CHECKSUM false
<> 154:37f96f9d4de2 52 /*< Default is without complement of CRC data register read data */
<> 154:37f96f9d4de2 53 #define CRC_DRIVER_DEFAULT_CRC_BITS kCrcBits16
<> 154:37f96f9d4de2 54 /*< Default is 16-bit CRC protocol */
<> 154:37f96f9d4de2 55 #define CRC_DRIVER_DEFAULT_CRC_RESULT kCrcFinalChecksum
<> 154:37f96f9d4de2 56 /*< Default is resutl type is final checksum */
<> 154:37f96f9d4de2 57 #endif /* CRC_DRIVER_USE_CRC16_CCIT_FALSE_AS_DEFAULT */
<> 154:37f96f9d4de2 58
<> 154:37f96f9d4de2 59 /*! @brief CRC type of transpose of read write data */
<> 154:37f96f9d4de2 60 typedef enum _crc_transpose_type
<> 154:37f96f9d4de2 61 {
<> 154:37f96f9d4de2 62 kCrcTransposeNone = 0U, /*! No transpose */
<> 154:37f96f9d4de2 63 kCrcTransposeBits = 1U, /*! Tranpose bits in bytes */
<> 154:37f96f9d4de2 64 kCrcTransposeBitsAndBytes = 2U, /*! Transpose bytes and bits in bytes */
<> 154:37f96f9d4de2 65 kCrcTransposeBytes = 3U, /*! Transpose bytes */
<> 154:37f96f9d4de2 66 } crc_transpose_type_t;
<> 154:37f96f9d4de2 67
<> 154:37f96f9d4de2 68 /*!
<> 154:37f96f9d4de2 69 * @brief CRC module configuration.
<> 154:37f96f9d4de2 70 *
<> 154:37f96f9d4de2 71 * This structure holds the configuration for the CRC module.
<> 154:37f96f9d4de2 72 */
<> 154:37f96f9d4de2 73 typedef struct _crc_module_config
<> 154:37f96f9d4de2 74 {
<> 154:37f96f9d4de2 75 uint32_t polynomial; /*!< CRC Polynomial, MSBit first.@n
<> 154:37f96f9d4de2 76 Example polynomial: 0x1021 = 1_0000_0010_0001 = x^12+x^5+1 */
<> 154:37f96f9d4de2 77 uint32_t seed; /*!< Starting checksum value */
<> 154:37f96f9d4de2 78 crc_transpose_type_t readTranspose; /*!< Type of transpose when reading CRC result. */
<> 154:37f96f9d4de2 79 crc_transpose_type_t writeTranspose; /*!< Type of transpose when writing CRC input data. */
<> 154:37f96f9d4de2 80 bool complementChecksum; /*!< True if the result shall be complement of the actual checksum. */
<> 154:37f96f9d4de2 81 crc_bits_t crcBits; /*!< Selects 16- or 32- bit CRC protocol. */
<> 154:37f96f9d4de2 82 } crc_module_config_t;
<> 154:37f96f9d4de2 83
<> 154:37f96f9d4de2 84 /*******************************************************************************
<> 154:37f96f9d4de2 85 * Code
<> 154:37f96f9d4de2 86 ******************************************************************************/
<> 154:37f96f9d4de2 87
<> 154:37f96f9d4de2 88 /*!
<> 154:37f96f9d4de2 89 * @brief Returns transpose type for CRC protocol reflect in parameter.
<> 154:37f96f9d4de2 90 *
<> 154:37f96f9d4de2 91 * This functions helps to set writeTranspose member of crc_config_t structure. Reflect in is CRC protocol parameter.
<> 154:37f96f9d4de2 92 *
<> 154:37f96f9d4de2 93 * @param enable True or false for the selected CRC protocol Reflect In (refin) parameter.
<> 154:37f96f9d4de2 94 */
<> 154:37f96f9d4de2 95 static inline crc_transpose_type_t CRC_GetTransposeTypeFromReflectIn(bool enable)
<> 154:37f96f9d4de2 96 {
<> 154:37f96f9d4de2 97 return ((enable) ? kCrcTransposeBitsAndBytes : kCrcTransposeBytes);
<> 154:37f96f9d4de2 98 }
<> 154:37f96f9d4de2 99
<> 154:37f96f9d4de2 100 /*!
<> 154:37f96f9d4de2 101 * @brief Returns transpose type for CRC protocol reflect out parameter.
<> 154:37f96f9d4de2 102 *
<> 154:37f96f9d4de2 103 * This functions helps to set readTranspose member of crc_config_t structure. Reflect out is CRC protocol parameter.
<> 154:37f96f9d4de2 104 *
<> 154:37f96f9d4de2 105 * @param enable True or false for the selected CRC protocol Reflect Out (refout) parameter.
<> 154:37f96f9d4de2 106 */
<> 154:37f96f9d4de2 107 static inline crc_transpose_type_t CRC_GetTransposeTypeFromReflectOut(bool enable)
<> 154:37f96f9d4de2 108 {
<> 154:37f96f9d4de2 109 return ((enable) ? kCrcTransposeBitsAndBytes : kCrcTransposeNone);
<> 154:37f96f9d4de2 110 }
<> 154:37f96f9d4de2 111
<> 154:37f96f9d4de2 112 /*!
<> 154:37f96f9d4de2 113 * @brief Starts checksum computation.
<> 154:37f96f9d4de2 114 *
<> 154:37f96f9d4de2 115 * Configures the CRC module for the specified CRC protocol. @n
<> 154:37f96f9d4de2 116 * Starts the checksum computation by writing the seed value
<> 154:37f96f9d4de2 117 *
<> 154:37f96f9d4de2 118 * @param base CRC peripheral address.
<> 154:37f96f9d4de2 119 * @param config Pointer to protocol configuration structure.
<> 154:37f96f9d4de2 120 */
<> 154:37f96f9d4de2 121 static void CRC_ConfigureAndStart(CRC_Type *base, const crc_module_config_t *config)
<> 154:37f96f9d4de2 122 {
<> 154:37f96f9d4de2 123 uint32_t crcControl;
<> 154:37f96f9d4de2 124
<> 154:37f96f9d4de2 125 /* pre-compute value for CRC control registger based on user configuraton without WAS field */
<> 154:37f96f9d4de2 126 crcControl = 0 | CRC_CTRL_TOT(config->writeTranspose) | CRC_CTRL_TOTR(config->readTranspose) |
<> 154:37f96f9d4de2 127 CRC_CTRL_FXOR(config->complementChecksum) | CRC_CTRL_TCRC(config->crcBits);
<> 154:37f96f9d4de2 128
<> 154:37f96f9d4de2 129 /* make sure the control register is clear - WAS is deasserted, and protocol is set */
<> 154:37f96f9d4de2 130 base->CTRL = crcControl;
<> 154:37f96f9d4de2 131
<> 154:37f96f9d4de2 132 /* write polynomial register */
<> 154:37f96f9d4de2 133 base->GPOLY = config->polynomial;
<> 154:37f96f9d4de2 134
<> 154:37f96f9d4de2 135 /* write pre-computed control register value along with WAS to start checksum computation */
<> 154:37f96f9d4de2 136 base->CTRL = crcControl | CRC_CTRL_WAS(true);
<> 154:37f96f9d4de2 137
<> 154:37f96f9d4de2 138 /* write seed (initial checksum) */
<> 154:37f96f9d4de2 139 base->DATA = config->seed;
<> 154:37f96f9d4de2 140
<> 154:37f96f9d4de2 141 /* deassert WAS by writing pre-computed CRC control register value */
<> 154:37f96f9d4de2 142 base->CTRL = crcControl;
<> 154:37f96f9d4de2 143 }
<> 154:37f96f9d4de2 144
<> 154:37f96f9d4de2 145 /*!
<> 154:37f96f9d4de2 146 * @brief Starts final checksum computation.
<> 154:37f96f9d4de2 147 *
<> 154:37f96f9d4de2 148 * Configures the CRC module for the specified CRC protocol. @n
<> 154:37f96f9d4de2 149 * Starts final checksum computation by writing the seed value.
<> 154:37f96f9d4de2 150 * @note CRC_Get16bitResult() or CRC_Get32bitResult() return final checksum
<> 154:37f96f9d4de2 151 * (output reflection and xor functions are applied).
<> 154:37f96f9d4de2 152 *
<> 154:37f96f9d4de2 153 * @param base CRC peripheral address.
<> 154:37f96f9d4de2 154 * @param protocolConfig Pointer to protocol configuration structure.
<> 154:37f96f9d4de2 155 */
<> 154:37f96f9d4de2 156 static void CRC_SetProtocolConfig(CRC_Type *base, const crc_config_t *protocolConfig)
<> 154:37f96f9d4de2 157 {
<> 154:37f96f9d4de2 158 crc_module_config_t moduleConfig;
<> 154:37f96f9d4de2 159 /* convert protocol to CRC peripheral module configuration, prepare for final checksum */
<> 154:37f96f9d4de2 160 moduleConfig.polynomial = protocolConfig->polynomial;
<> 154:37f96f9d4de2 161 moduleConfig.seed = protocolConfig->seed;
<> 154:37f96f9d4de2 162 moduleConfig.readTranspose = CRC_GetTransposeTypeFromReflectOut(protocolConfig->reflectOut);
<> 154:37f96f9d4de2 163 moduleConfig.writeTranspose = CRC_GetTransposeTypeFromReflectIn(protocolConfig->reflectIn);
<> 154:37f96f9d4de2 164 moduleConfig.complementChecksum = protocolConfig->complementChecksum;
<> 154:37f96f9d4de2 165 moduleConfig.crcBits = protocolConfig->crcBits;
<> 154:37f96f9d4de2 166
<> 154:37f96f9d4de2 167 CRC_ConfigureAndStart(base, &moduleConfig);
<> 154:37f96f9d4de2 168 }
<> 154:37f96f9d4de2 169
<> 154:37f96f9d4de2 170 /*!
<> 154:37f96f9d4de2 171 * @brief Starts intermediate checksum computation.
<> 154:37f96f9d4de2 172 *
<> 154:37f96f9d4de2 173 * Configures the CRC module for the specified CRC protocol. @n
<> 154:37f96f9d4de2 174 * Starts intermediate checksum computation by writing the seed value.
<> 154:37f96f9d4de2 175 * @note CRC_Get16bitResult() or CRC_Get32bitResult() return intermediate checksum (raw data register value).
<> 154:37f96f9d4de2 176 *
<> 154:37f96f9d4de2 177 * @param base CRC peripheral address.
<> 154:37f96f9d4de2 178 * @param protocolConfig Pointer to protocol configuration structure.
<> 154:37f96f9d4de2 179 */
<> 154:37f96f9d4de2 180 static void CRC_SetRawProtocolConfig(CRC_Type *base, const crc_config_t *protocolConfig)
<> 154:37f96f9d4de2 181 {
<> 154:37f96f9d4de2 182 crc_module_config_t moduleConfig;
<> 154:37f96f9d4de2 183 /* convert protocol to CRC peripheral module configuration, prepare for intermediate checksum */
<> 154:37f96f9d4de2 184 moduleConfig.polynomial = protocolConfig->polynomial;
<> 154:37f96f9d4de2 185 moduleConfig.seed = protocolConfig->seed;
<> 154:37f96f9d4de2 186 moduleConfig.readTranspose =
<> 154:37f96f9d4de2 187 kCrcTransposeNone; /* intermediate checksum does no transpose of data register read value */
<> 154:37f96f9d4de2 188 moduleConfig.writeTranspose = CRC_GetTransposeTypeFromReflectIn(protocolConfig->reflectIn);
<> 154:37f96f9d4de2 189 moduleConfig.complementChecksum = false; /* intermediate checksum does no xor of data register read value */
<> 154:37f96f9d4de2 190 moduleConfig.crcBits = protocolConfig->crcBits;
<> 154:37f96f9d4de2 191
<> 154:37f96f9d4de2 192 CRC_ConfigureAndStart(base, &moduleConfig);
<> 154:37f96f9d4de2 193 }
<> 154:37f96f9d4de2 194
<> 154:37f96f9d4de2 195 void CRC_Init(CRC_Type *base, const crc_config_t *config)
<> 154:37f96f9d4de2 196 {
<> 154:37f96f9d4de2 197 #if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
<> 154:37f96f9d4de2 198 /* ungate clock */
<> 154:37f96f9d4de2 199 CLOCK_EnableClock(kCLOCK_Crc0);
<> 154:37f96f9d4de2 200 #endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
<> 154:37f96f9d4de2 201 /* configure CRC module and write the seed */
<> 154:37f96f9d4de2 202 if (config->crcResult == kCrcFinalChecksum)
<> 154:37f96f9d4de2 203 {
<> 154:37f96f9d4de2 204 CRC_SetProtocolConfig(base, config);
<> 154:37f96f9d4de2 205 }
<> 154:37f96f9d4de2 206 else
<> 154:37f96f9d4de2 207 {
<> 154:37f96f9d4de2 208 CRC_SetRawProtocolConfig(base, config);
<> 154:37f96f9d4de2 209 }
<> 154:37f96f9d4de2 210 }
<> 154:37f96f9d4de2 211
<> 154:37f96f9d4de2 212 void CRC_GetDefaultConfig(crc_config_t *config)
<> 154:37f96f9d4de2 213 {
<> 154:37f96f9d4de2 214 static const crc_config_t crc16ccit = {
<> 154:37f96f9d4de2 215 CRC_DRIVER_DEFAULT_POLYNOMIAL, CRC_DRIVER_DEFAULT_SEED,
<> 154:37f96f9d4de2 216 CRC_DRIVER_DEFAULT_REFLECT_IN, CRC_DRIVER_DEFAULT_REFLECT_OUT,
<> 154:37f96f9d4de2 217 CRC_DRIVER_DEFAULT_COMPLEMENT_CHECKSUM, CRC_DRIVER_DEFAULT_CRC_BITS,
<> 154:37f96f9d4de2 218 CRC_DRIVER_DEFAULT_CRC_RESULT,
<> 154:37f96f9d4de2 219 };
<> 154:37f96f9d4de2 220
<> 154:37f96f9d4de2 221 *config = crc16ccit;
<> 154:37f96f9d4de2 222 }
<> 154:37f96f9d4de2 223
<> 154:37f96f9d4de2 224 void CRC_WriteData(CRC_Type *base, const uint8_t *data, size_t dataSize)
<> 154:37f96f9d4de2 225 {
<> 154:37f96f9d4de2 226 const uint32_t *data32;
<> 154:37f96f9d4de2 227
<> 154:37f96f9d4de2 228 /* 8-bit reads and writes till source address is aligned 4 bytes */
<> 154:37f96f9d4de2 229 while ((dataSize) && ((uint32_t)data & 3U))
<> 154:37f96f9d4de2 230 {
<> 154:37f96f9d4de2 231 base->ACCESS8BIT.DATALL = *data;
<> 154:37f96f9d4de2 232 data++;
<> 154:37f96f9d4de2 233 dataSize--;
<> 154:37f96f9d4de2 234 }
<> 154:37f96f9d4de2 235
<> 154:37f96f9d4de2 236 /* use 32-bit reads and writes as long as possible */
<> 154:37f96f9d4de2 237 data32 = (const uint32_t *)data;
<> 154:37f96f9d4de2 238 while (dataSize >= sizeof(uint32_t))
<> 154:37f96f9d4de2 239 {
<> 154:37f96f9d4de2 240 base->DATA = *data32;
<> 154:37f96f9d4de2 241 data32++;
<> 154:37f96f9d4de2 242 dataSize -= sizeof(uint32_t);
<> 154:37f96f9d4de2 243 }
<> 154:37f96f9d4de2 244
<> 154:37f96f9d4de2 245 data = (const uint8_t *)data32;
<> 154:37f96f9d4de2 246
<> 154:37f96f9d4de2 247 /* 8-bit reads and writes till end of data buffer */
<> 154:37f96f9d4de2 248 while (dataSize)
<> 154:37f96f9d4de2 249 {
<> 154:37f96f9d4de2 250 base->ACCESS8BIT.DATALL = *data;
<> 154:37f96f9d4de2 251 data++;
<> 154:37f96f9d4de2 252 dataSize--;
<> 154:37f96f9d4de2 253 }
<> 154:37f96f9d4de2 254 }
<> 154:37f96f9d4de2 255
<> 154:37f96f9d4de2 256 uint32_t CRC_Get32bitResult(CRC_Type *base)
<> 154:37f96f9d4de2 257 {
<> 154:37f96f9d4de2 258 return base->DATA;
<> 154:37f96f9d4de2 259 }
<> 154:37f96f9d4de2 260
<> 154:37f96f9d4de2 261 uint16_t CRC_Get16bitResult(CRC_Type *base)
<> 154:37f96f9d4de2 262 {
<> 154:37f96f9d4de2 263 uint32_t retval;
<> 154:37f96f9d4de2 264 uint32_t totr; /* type of transpose read bitfield */
<> 154:37f96f9d4de2 265
<> 154:37f96f9d4de2 266 retval = base->DATA;
<> 154:37f96f9d4de2 267 totr = (base->CTRL & CRC_CTRL_TOTR_MASK) >> CRC_CTRL_TOTR_SHIFT;
<> 154:37f96f9d4de2 268
<> 154:37f96f9d4de2 269 /* check transpose type to get 16-bit out of 32-bit register */
<> 154:37f96f9d4de2 270 if (totr >= 2U)
<> 154:37f96f9d4de2 271 {
<> 154:37f96f9d4de2 272 /* transpose of bytes for read is set, the result CRC is in CRC_DATA[HU:HL] */
<> 154:37f96f9d4de2 273 retval &= 0xFFFF0000U;
<> 154:37f96f9d4de2 274 retval = retval >> 16U;
<> 154:37f96f9d4de2 275 }
<> 154:37f96f9d4de2 276 else
<> 154:37f96f9d4de2 277 {
<> 154:37f96f9d4de2 278 /* no transpose of bytes for read, the result CRC is in CRC_DATA[LU:LL] */
<> 154:37f96f9d4de2 279 retval &= 0x0000FFFFU;
<> 154:37f96f9d4de2 280 }
<> 154:37f96f9d4de2 281 return (uint16_t)retval;
<> 154:37f96f9d4de2 282 }