Zürcher Eliteeinheit / Mbed 2 deprecated ROME2_P4

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Dependencies:   ROME2_P2 mbed

Fork of ROME2_P3 by Zürcher Eliteeinheit

EncoderCounter.cpp@0:e360940c4b88, 2018-03-16 (annotated)

Committer:
Appalco
Date:
Fri Mar 16 13:32:47 2018 +0000
Revision:
0:e360940c4b88
import

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Appalco 0:e360940c4b88 1 /*
Appalco 0:e360940c4b88 2 * EncoderCounter.cpp
Appalco 0:e360940c4b88 3 * Copyright (c) 2018, ZHAW
Appalco 0:e360940c4b88 4 * All rights reserved.
Appalco 0:e360940c4b88 5 */
Appalco 0:e360940c4b88 6
Appalco 0:e360940c4b88 7 #include "EncoderCounter.h"
Appalco 0:e360940c4b88 8
Appalco 0:e360940c4b88 9 using namespace std;
Appalco 0:e360940c4b88 10
Appalco 0:e360940c4b88 11 /**
Appalco 0:e360940c4b88 12 * Creates and initializes the driver to read the quadrature
Appalco 0:e360940c4b88 13 * encoder counter of the STM32 microcontroller.
Appalco 0:e360940c4b88 14 * @param a the input pin for the channel A.
Appalco 0:e360940c4b88 15 * @param b the input pin for the channel B.
Appalco 0:e360940c4b88 16 */
Appalco 0:e360940c4b88 17 EncoderCounter::EncoderCounter(PinName a, PinName b) {
Appalco 0:e360940c4b88 18
Appalco 0:e360940c4b88 19 // check pins
Appalco 0:e360940c4b88 20
Appalco 0:e360940c4b88 21 if ((a == PA_0) && (b == PA_1)) {
Appalco 0:e360940c4b88 22
Appalco 0:e360940c4b88 23 // pinmap OK for TIM2 CH1 and CH2
Appalco 0:e360940c4b88 24
Appalco 0:e360940c4b88 25 TIM = TIM2;
Appalco 0:e360940c4b88 26
Appalco 0:e360940c4b88 27 // configure general purpose I/O registers
Appalco 0:e360940c4b88 28
Appalco 0:e360940c4b88 29 GPIOA->MODER &= ~GPIO_MODER_MODER0; // reset port A0
Appalco 0:e360940c4b88 30 GPIOA->MODER |= GPIO_MODER_MODER0_1; // set alternate mode of port A0
Appalco 0:e360940c4b88 31 GPIOA->PUPDR &= ~GPIO_PUPDR_PUPDR0; // reset pull-up/pull-down on port A0
Appalco 0:e360940c4b88 32 GPIOA->PUPDR |= GPIO_PUPDR_PUPDR0_1; // set input as pull-down
Appalco 0:e360940c4b88 33 GPIOA->AFR[0] &= ~(0xF << 4*0); // reset alternate function of port A0
Appalco 0:e360940c4b88 34 GPIOA->AFR[0] |= 1 << 4*0; // set alternate funtion 1 of port A0
Appalco 0:e360940c4b88 35
Appalco 0:e360940c4b88 36 GPIOA->MODER &= ~GPIO_MODER_MODER1; // reset port A1
Appalco 0:e360940c4b88 37 GPIOA->MODER |= GPIO_MODER_MODER1_1; // set alternate mode of port A1
Appalco 0:e360940c4b88 38 GPIOA->PUPDR &= ~GPIO_PUPDR_PUPDR1; // reset pull-up/pull-down on port A1
Appalco 0:e360940c4b88 39 GPIOA->PUPDR |= GPIO_PUPDR_PUPDR1_1; // set input as pull-down
Appalco 0:e360940c4b88 40 GPIOA->AFR[0] &= ~(0xF << 4*1); // reset alternate function of port A1
Appalco 0:e360940c4b88 41 GPIOA->AFR[0] |= 1 << 4*1; // set alternate funtion 1 of port A1
Appalco 0:e360940c4b88 42
Appalco 0:e360940c4b88 43 // configure reset and clock control registers
Appalco 0:e360940c4b88 44
Appalco 0:e360940c4b88 45 RCC->APB1RSTR |= RCC_APB1RSTR_TIM2RST; //reset TIM2 controller
Appalco 0:e360940c4b88 46 RCC->APB1RSTR &= ~RCC_APB1RSTR_TIM2RST;
Appalco 0:e360940c4b88 47
Appalco 0:e360940c4b88 48 RCC->APB1ENR |= RCC_APB1ENR_TIM2EN; // TIM2 clock enable
Appalco 0:e360940c4b88 49
Appalco 0:e360940c4b88 50 } else if ((a == PA_6) && (b == PC_7)) {
Appalco 0:e360940c4b88 51
Appalco 0:e360940c4b88 52 // pinmap OK for TIM3 CH1 and CH2
Appalco 0:e360940c4b88 53
Appalco 0:e360940c4b88 54 TIM = TIM3;
Appalco 0:e360940c4b88 55
Appalco 0:e360940c4b88 56 // configure reset and clock control registers
Appalco 0:e360940c4b88 57
Appalco 0:e360940c4b88 58 RCC->AHB1ENR |= RCC_AHB1ENR_GPIOCEN; // manually enable port C (port A enabled by mbed library)
Appalco 0:e360940c4b88 59
Appalco 0:e360940c4b88 60 // configure general purpose I/O registers
Appalco 0:e360940c4b88 61
Appalco 0:e360940c4b88 62 GPIOA->MODER &= ~GPIO_MODER_MODER6; // reset port A6
Appalco 0:e360940c4b88 63 GPIOA->MODER |= GPIO_MODER_MODER6_1; // set alternate mode of port A6
Appalco 0:e360940c4b88 64 GPIOA->PUPDR &= ~GPIO_PUPDR_PUPDR6; // reset pull-up/pull-down on port A6
Appalco 0:e360940c4b88 65 GPIOA->PUPDR |= GPIO_PUPDR_PUPDR6_1; // set input as pull-down
Appalco 0:e360940c4b88 66 GPIOA->AFR[0] &= ~(0xF << 4*6); // reset alternate function of port A6
Appalco 0:e360940c4b88 67 GPIOA->AFR[0] |= 2 << 4*6; // set alternate funtion 2 of port A6
Appalco 0:e360940c4b88 68
Appalco 0:e360940c4b88 69 GPIOC->MODER &= ~GPIO_MODER_MODER7; // reset port C7
Appalco 0:e360940c4b88 70 GPIOC->MODER |= GPIO_MODER_MODER7_1; // set alternate mode of port C7
Appalco 0:e360940c4b88 71 GPIOC->PUPDR &= ~GPIO_PUPDR_PUPDR7; // reset pull-up/pull-down on port C7
Appalco 0:e360940c4b88 72 GPIOC->PUPDR |= GPIO_PUPDR_PUPDR7_1; // set input as pull-down
Appalco 0:e360940c4b88 73 GPIOC->AFR[0] &= ~0xF0000000; // reset alternate function of port C7
Appalco 0:e360940c4b88 74 GPIOC->AFR[0] |= 2 << 4*7; // set alternate funtion 2 of port C7
Appalco 0:e360940c4b88 75
Appalco 0:e360940c4b88 76 // configure reset and clock control registers
Appalco 0:e360940c4b88 77
Appalco 0:e360940c4b88 78 RCC->APB1RSTR |= RCC_APB1RSTR_TIM3RST; //reset TIM3 controller
Appalco 0:e360940c4b88 79 RCC->APB1RSTR &= ~RCC_APB1RSTR_TIM3RST;
Appalco 0:e360940c4b88 80
Appalco 0:e360940c4b88 81 RCC->APB1ENR |= RCC_APB1ENR_TIM3EN; // TIM3 clock enable
Appalco 0:e360940c4b88 82
Appalco 0:e360940c4b88 83 } else if ((a == PB_6) && (b == PB_7)) {
Appalco 0:e360940c4b88 84
Appalco 0:e360940c4b88 85 // pinmap OK for TIM4 CH1 and CH2
Appalco 0:e360940c4b88 86
Appalco 0:e360940c4b88 87 TIM = TIM4;
Appalco 0:e360940c4b88 88
Appalco 0:e360940c4b88 89 // configure reset and clock control registers
Appalco 0:e360940c4b88 90
Appalco 0:e360940c4b88 91 RCC->AHB1ENR |= RCC_AHB1ENR_GPIOBEN; // manually enable port B (port A enabled by mbed library)
Appalco 0:e360940c4b88 92
Appalco 0:e360940c4b88 93 // configure general purpose I/O registers
Appalco 0:e360940c4b88 94
Appalco 0:e360940c4b88 95 GPIOB->MODER &= ~GPIO_MODER_MODER6; // reset port B6
Appalco 0:e360940c4b88 96 GPIOB->MODER |= GPIO_MODER_MODER6_1; // set alternate mode of port B6
Appalco 0:e360940c4b88 97 GPIOB->PUPDR &= ~GPIO_PUPDR_PUPDR6; // reset pull-up/pull-down on port B6
Appalco 0:e360940c4b88 98 GPIOB->PUPDR |= GPIO_PUPDR_PUPDR6_1; // set input as pull-down
Appalco 0:e360940c4b88 99 GPIOB->AFR[0] &= ~(0xF << 4*6); // reset alternate function of port B6
Appalco 0:e360940c4b88 100 GPIOB->AFR[0] |= 2 << 4*6; // set alternate funtion 2 of port B6
Appalco 0:e360940c4b88 101
Appalco 0:e360940c4b88 102 GPIOB->MODER &= ~GPIO_MODER_MODER7; // reset port B7
Appalco 0:e360940c4b88 103 GPIOB->MODER |= GPIO_MODER_MODER7_1; // set alternate mode of port B7
Appalco 0:e360940c4b88 104 GPIOB->PUPDR &= ~GPIO_PUPDR_PUPDR7; // reset pull-up/pull-down on port B7
Appalco 0:e360940c4b88 105 GPIOB->PUPDR |= GPIO_PUPDR_PUPDR7_1; // set input as pull-down
Appalco 0:e360940c4b88 106 GPIOB->AFR[0] &= ~0xF0000000; // reset alternate function of port B7
Appalco 0:e360940c4b88 107 GPIOB->AFR[0] |= 2 << 4*7; // set alternate funtion 2 of port B7
Appalco 0:e360940c4b88 108
Appalco 0:e360940c4b88 109 // configure reset and clock control registers
Appalco 0:e360940c4b88 110
Appalco 0:e360940c4b88 111 RCC->APB1RSTR |= RCC_APB1RSTR_TIM4RST; //reset TIM4 controller
Appalco 0:e360940c4b88 112 RCC->APB1RSTR &= ~RCC_APB1RSTR_TIM4RST;
Appalco 0:e360940c4b88 113
Appalco 0:e360940c4b88 114 RCC->APB1ENR |= RCC_APB1ENR_TIM4EN; // TIM4 clock enable
Appalco 0:e360940c4b88 115
Appalco 0:e360940c4b88 116 } else {
Appalco 0:e360940c4b88 117
Appalco 0:e360940c4b88 118 printf("pinmap not found for peripheral\n");
Appalco 0:e360940c4b88 119 }
Appalco 0:e360940c4b88 120
Appalco 0:e360940c4b88 121 // configure general purpose timer 3 or 4
Appalco 0:e360940c4b88 122
Appalco 0:e360940c4b88 123 TIM->CR1 = 0x0000; // counter disable
Appalco 0:e360940c4b88 124 TIM->CR2 = 0x0000; // reset master mode selection
Appalco 0:e360940c4b88 125 TIM->SMCR = TIM_SMCR_SMS_1 | TIM_SMCR_SMS_0; // counting on both TI1 & TI2 edges
Appalco 0:e360940c4b88 126 TIM->CCMR1 = TIM_CCMR1_CC2S_0 | TIM_CCMR1_CC1S_0;
Appalco 0:e360940c4b88 127 TIM->CCMR2 = 0x0000; // reset capture mode register 2
Appalco 0:e360940c4b88 128 TIM->CCER = TIM_CCER_CC2E | TIM_CCER_CC1E;
Appalco 0:e360940c4b88 129 TIM->CNT = 0x0000; // reset counter value
Appalco 0:e360940c4b88 130 TIM->ARR = 0xFFFF; // auto reload register
Appalco 0:e360940c4b88 131 TIM->CR1 = TIM_CR1_CEN; // counter enable
Appalco 0:e360940c4b88 132 }
Appalco 0:e360940c4b88 133
Appalco 0:e360940c4b88 134 EncoderCounter::~EncoderCounter() {}
Appalco 0:e360940c4b88 135
Appalco 0:e360940c4b88 136 /**
Appalco 0:e360940c4b88 137 * Resets the counter value to zero.
Appalco 0:e360940c4b88 138 */
Appalco 0:e360940c4b88 139 void EncoderCounter::reset() {
Appalco 0:e360940c4b88 140
Appalco 0:e360940c4b88 141 TIM->CNT = 0x0000;
Appalco 0:e360940c4b88 142 }
Appalco 0:e360940c4b88 143
Appalco 0:e360940c4b88 144 /**
Appalco 0:e360940c4b88 145 * Resets the counter value to a given offset value.
Appalco 0:e360940c4b88 146 * @param offset the offset value to reset the counter to.
Appalco 0:e360940c4b88 147 */
Appalco 0:e360940c4b88 148 void EncoderCounter::reset(short offset) {
Appalco 0:e360940c4b88 149
Appalco 0:e360940c4b88 150 TIM->CNT = -offset;
Appalco 0:e360940c4b88 151 }
Appalco 0:e360940c4b88 152
Appalco 0:e360940c4b88 153 /**
Appalco 0:e360940c4b88 154 * Reads the quadrature encoder counter value.
Appalco 0:e360940c4b88 155 * @return the quadrature encoder counter as a signed 16-bit integer value.
Appalco 0:e360940c4b88 156 */
Appalco 0:e360940c4b88 157 short EncoderCounter::read() {
Appalco 0:e360940c4b88 158
Appalco 0:e360940c4b88 159 return (short)(-TIM->CNT);
Appalco 0:e360940c4b88 160 }
Appalco 0:e360940c4b88 161
Appalco 0:e360940c4b88 162 /**
Appalco 0:e360940c4b88 163 * The empty operator is a shorthand notation of the <code>read()</code> method.
Appalco 0:e360940c4b88 164 */
Appalco 0:e360940c4b88 165 EncoderCounter::operator short() {
Appalco 0:e360940c4b88 166
Appalco 0:e360940c4b88 167 return read();
Appalco 0:e360940c4b88 168 }
Appalco 0:e360940c4b88 169
Appalco 0:e360940c4b88 170