wizchip_conf.c

00001 //****************************************************************************/ 
00002 //!
00003 //! \file wizchip_conf.c
00004 //! \brief WIZCHIP Config Header File.
00005 //! \version 1.0.0
00006 //! \date 2013/10/01
00007 //! \par  Revision history
00008 //!       <2013/10/01> 1st Release
00009 //! \author MidnightCow
00010 //! \copyright
00011 //!
00012 //! Copyright (c)  2013, WIZnet Co., LTD.
00013 //! All rights reserved.
00014 //! 
00015 //! Redistribution and use in source and binary forms, with or without 
00016 //! modification, are permitted provided that the following conditions 
00017 //! are met: 
00018 //! 
00019 //!     * Redistributions of source code must retain the above copyright 
00020 //! notice, this list of conditions and the following disclaimer. 
00021 //!     * Redistributions in binary form must reproduce the above copyright
00022 //! notice, this list of conditions and the following disclaimer in the
00023 //! documentation and/or other materials provided with the distribution. 
00024 //!     * Neither the name of the <ORGANIZATION> nor the names of its 
00025 //! contributors may be used to endorse or promote products derived 
00026 //! from this software without specific prior written permission. 
00027 //! 
00028 //! THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
00029 //! AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
00030 //! IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
00031 //! ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 
00032 //! LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 
00033 //! CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 
00034 //! SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
00035 //! INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 
00036 //! CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
00037 //! ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 
00038 //! THE POSSIBILITY OF SUCH DAMAGE.
00039 //
00040 //*****************************************************************************/
00041 #include "wizchip_conf.h"
00042 /**
00043  * @brief Default function to enable interrupt.
00044  * @note This function help not to access wrong address. If you do not describe this function or register any functions,
00045  * null function is called.
00046  */
00047 void      wizchip_cris_enter(void)           {};
00048 /**
00049  * @brief Default function to disable interrupt.
00050  * @note This function help not to access wrong address. If you do not describe this function or register any functions,
00051  * null function is called.
00052  */
00053 void      wizchip_cris_exit(void)          {};
00054 /**
00055  * @brief Default function to select chip.
00056  * @note This function help not to access wrong address. If you do not describe this function or register any functions,
00057  * null function is called.
00058  */
00059 void    wizchip_cs_select(void)            {};
00060 /**
00061  * @brief Default function to deselect chip.
00062  * @note This function help not to access wrong address. If you do not describe this function or register any functions,
00063  * null function is called.
00064  */
00065 void    wizchip_cs_deselect(void)          {};
00066 /**
00067  * @brief Default function to read in direct or indirect interface.
00068  * @note This function help not to access wrong address. If you do not describe this function or register any functions,
00069  * null function is called.
00070  */
00071 uint8_t wizchip_bus_readbyte(uint32_t AddrSel) { return * ((volatile uint8_t *) AddrSel); };
00072 /**
00073  * @brief Default function to write in direct or indirect interface.
00074  * @note This function help not to access wrong address. If you do not describe this function or register any functions,
00075  * null function is called.
00076  */
00077  
00078 void    wizchip_bus_writebyte(uint32_t AddrSel, uint8_t wb)  { *((volatile uint8_t*)AddrSel) = wb; };
00079 /**
00080  * @brief Default function to read in SPI interface.
00081  * @note This function help not to access wrong address. If you do not describe this function or register any functions,
00082  * null function is called.
00083  */
00084 uint8_t wizchip_spi_readbyte(void)        {return 0;};
00085 /**
00086  * @brief Default function to write in SPI interface.
00087  * @note This function help not to access wrong address. If you do not describe this function or register any functions,
00088  * null function is called.
00089  */
00090 void    wizchip_spi_writebyte(uint8_t wb) {};
00091 
00092 /**
00093  * @\ref _WIZCHIP instance
00094  */
00095 _WIZCHIP  WIZCHIP =
00096       {
00097       .id                  = _WIZCHIP_ID_,
00098       .if_mode             = _WIZCHIP_IO_MODE_,
00099       .CRIS._enter         = wizchip_cris_enter,
00100       .CRIS._exit          = wizchip_cris_exit,
00101       .CS._select          = wizchip_cs_select,
00102       .CS._deselect        = wizchip_cs_deselect,
00103       .IF.BUS._read_byte   = wizchip_bus_readbyte,
00104       .IF.BUS._write_byte  = wizchip_bus_writebyte
00105 //    .IF.SPI._read_byte   = wizchip_spi_readbyte,
00106 //    .IF.SPI._write_byte  = wizchip_spi_writebyte
00107       };
00108 
00109 static uint8_t    _DNS_[4];      // DNS server ip address
00110 static dhcp_mode  _DHCP_;        // DHCP mode
00111 
00112 void reg_wizchip_cris_cbfunc(void(*cris_en)(void), void(*cris_ex)(void))
00113 {
00114    if(!cris_en || !cris_ex)
00115    {
00116       WIZCHIP.CRIS._enter = wizchip_cris_enter;
00117       WIZCHIP.CRIS._exit  = wizchip_cris_exit;
00118    }
00119    else
00120    {
00121       WIZCHIP.CRIS._enter = cris_en;
00122       WIZCHIP.CRIS._exit  = cris_ex;
00123    }
00124 }
00125 
00126 void reg_wizchip_cs_cbfunc(void(*cs_sel)(void), void(*cs_desel)(void))
00127 {
00128    if(!cs_sel || !cs_desel)
00129    {
00130       WIZCHIP.CS._select   = wizchip_cs_select;
00131       WIZCHIP.CS._deselect = wizchip_cs_deselect;
00132    }
00133    else
00134    {
00135       WIZCHIP.CS._select   = cs_sel;
00136       WIZCHIP.CS._deselect = cs_desel;
00137    }
00138 }
00139 
00140 void reg_wizchip_bus_cbfunc(uint8_t(*bus_rb)(uint32_t addr), void (*bus_wb)(uint32_t addr, uint8_t wb))
00141 {
00142    while(!(WIZCHIP.if_mode & _WIZCHIP_IO_MODE_BUS_));
00143    
00144    if(!bus_rb || !bus_wb)
00145    {
00146       WIZCHIP.IF.BUS._read_byte   = wizchip_bus_readbyte;
00147       WIZCHIP.IF.BUS._write_byte  = wizchip_bus_writebyte;
00148    }
00149    else
00150    {
00151       WIZCHIP.IF.BUS._read_byte   = bus_rb;
00152       WIZCHIP.IF.BUS._write_byte  = bus_wb;
00153    }
00154 }
00155 
00156 void reg_wizchip_spi_cbfunc(uint8_t (*spi_rb)(void), void (*spi_wb)(uint8_t wb))
00157 {
00158    while(!(WIZCHIP.if_mode & _WIZCHIP_IO_MODE_SPI_));
00159    
00160    if(!spi_rb || !spi_wb)
00161    {
00162       WIZCHIP.IF.SPI._read_byte   = wizchip_spi_readbyte;
00163       WIZCHIP.IF.SPI._write_byte  = wizchip_spi_writebyte;
00164    }
00165    else
00166    {
00167       WIZCHIP.IF.SPI._read_byte   = spi_rb;
00168       WIZCHIP.IF.SPI._write_byte  = spi_wb;
00169    }
00170 }
00171 
00172 int8_t ctlwizchip(ctlwizchip_type cwtype, void* arg)
00173 {
00174    uint8_t tmp = 0;
00175    uint8_t* ptmp[2] = {0,0};
00176    switch(cwtype)
00177    {
00178       case CW_RESET_WIZCHIP:
00179          wizchip_sw_reset();
00180          break;
00181       case CW_INIT_WIZCHIP:
00182          if(arg != 0) 
00183          {
00184             ptmp[0] = (uint8_t*)arg;
00185             ptmp[1] = ptmp[0] + _WIZCHIP_SOCK_NUM_;
00186          }
00187          return wizchip_init(ptmp[0], ptmp[1]);
00188       case CW_CLR_INTERRUPT:
00189          wizchip_clrinterrupt(*((intr_kind*)arg));
00190          break;
00191       case CW_GET_INTERRUPT:
00192         *((intr_kind*)arg) = wizchip_getinterrupt();
00193          break;
00194       case CW_SET_INTRMASK:
00195          wizchip_setinterruptmask(*((intr_kind*)arg));
00196          break;         
00197       case CW_GET_INTRMASK:
00198          *((intr_kind*)arg) = wizchip_getinterruptmask();
00199          break;
00200    #if _WIZCHIP_ > 5100
00201       case CW_SET_INTRTIME:
00202          setINTLEVEL(*(uint16_t*)arg);
00203          break;
00204       case CW_GET_INTRTIME:
00205          *(uint16_t*)arg = getINTLEVEL();
00206          break;
00207    #endif
00208       case CW_GET_ID:
00209          ((uint8_t*)arg)[0] = WIZCHIP.id[0];
00210          ((uint8_t*)arg)[1] = WIZCHIP.id[1];
00211          ((uint8_t*)arg)[2] = WIZCHIP.id[2];
00212          ((uint8_t*)arg)[3] = WIZCHIP.id[3];
00213          ((uint8_t*)arg)[4] = WIZCHIP.id[4];
00214          ((uint8_t*)arg)[5] = 0;
00215          break;
00216    #if _WIZCHIP_ ==  5500
00217       case CW_RESET_PHY:
00218          wizphy_reset();
00219          break;
00220       case CW_SET_PHYCONF:
00221          wizphy_setphyconf((wiz_PhyConf*)arg);
00222          break;
00223       case CW_GET_PHYCONF:
00224          wizphy_getphyconf((wiz_PhyConf*)arg);
00225          break;
00226       case CW_GET_PHYSTATUS:
00227          break;
00228       case CW_SET_PHYPOWMODE:
00229          return wizphy_setphypmode(*(uint8_t*)arg);
00230    #endif
00231       case CW_GET_PHYPOWMODE:
00232          tmp = wizphy_getphypmode();
00233          if((int8_t)tmp == -1) return -1;
00234          *(uint8_t*)arg = tmp;
00235          break;
00236       case CW_GET_PHYLINK:
00237          tmp = wizphy_getphylink();
00238          if((int8_t)tmp == -1) return -1;
00239          *(uint8_t*)arg = tmp;
00240          break;
00241       default:
00242          return -1;
00243    }
00244    return 0;
00245 }
00246 
00247 
00248 int8_t ctlnetwork(ctlnetwork_type cntype, void* arg)
00249 {
00250    
00251    switch(cntype)
00252    {
00253       case CN_SET_NETINFO:
00254          wizchip_setnetinfo((wiz_NetInfo*)arg);
00255          break;
00256       case CN_GET_NETINFO:
00257          wizchip_getnetinfo((wiz_NetInfo*)arg);
00258          break;
00259       case CN_SET_NETMODE:
00260          return wizchip_setnetmode(*(netmode_type*)arg);
00261       case CN_GET_NETMODE:
00262          *(netmode_type*)arg = wizchip_getnetmode();
00263          break;
00264       case CN_SET_TIMEOUT:
00265          wizchip_settimeout((wiz_NetTimeout*)arg);
00266          break;
00267       case CN_GET_TIMEOUT:
00268          wizchip_gettimeout((wiz_NetTimeout*)arg);
00269          break;
00270       default:
00271          return -1;
00272    }
00273    return 0;
00274 }
00275 
00276 void wizchip_sw_reset(void)
00277 {
00278    uint8_t gw[4], sn[4], sip[4];
00279    uint8_t mac[6];
00280    getSHAR(mac);
00281    getGAR(gw);  getSUBR(sn);  getSIPR(sip);
00282    setMR(MR_RST);
00283    getMR(); // for delay
00284    setSHAR(mac);
00285    setGAR(gw);
00286    setSUBR(sn);
00287    setSIPR(sip);
00288 }
00289 
00290 int8_t wizchip_init(uint8_t* txsize, uint8_t* rxsize)
00291 {
00292    int8_t i;
00293    int8_t tmp = 0;
00294    wizchip_sw_reset();
00295    if(txsize)
00296    {
00297       tmp = 0;
00298       for(i = 0 ; i < _WIZCHIP_SOCK_NUM_; i++)
00299          tmp += txsize[i];
00300       if(tmp > 16) return -1;
00301       for(i = 0 ; i < _WIZCHIP_SOCK_NUM_; i++)
00302          setSn_TXBUF_SIZE(i, txsize[i]);
00303    }
00304    if(rxsize)
00305    {
00306       tmp = 0;
00307       for(i = 0 ; i < _WIZCHIP_SOCK_NUM_; i++)
00308          tmp += rxsize[i];
00309       if(tmp > 16) return -1;
00310       for(i = 0 ; i < _WIZCHIP_SOCK_NUM_; i++)
00311          setSn_RXBUF_SIZE(i, rxsize[i]);
00312    }
00313    return 0;
00314 }
00315 
00316 void wizchip_clrinterrupt(intr_kind intr)
00317 {
00318    uint8_t ir  = (uint8_t)intr;
00319    uint8_t sir = (uint8_t)((uint16_t)intr >> 8);
00320 #if _WIZCHIP_ < 5500
00321    ir |= (1<<4); // IK_WOL
00322 #endif
00323 #if _WIZCHIP_ == 5200
00324    ir |= (1 << 6);
00325 #endif
00326    
00327 #if _WIZCHIP_ < 5200
00328    sir &= 0x0F;
00329 #endif
00330 
00331 #if _WIZCHIP_ == 5100
00332    ir |= sir;
00333    setIR(ir);
00334 #else
00335    setIR(ir);
00336    setSIR(sir);
00337 #endif   
00338 }
00339 
00340 intr_kind wizchip_getinterrupt(void)
00341 {
00342    uint8_t ir  = 0;
00343    uint8_t sir = 0;
00344    uint16_t ret = 0;
00345 #if _WIZCHIP_ == 5100
00346    ir = getIR();
00347    sir = ir 0x0F;
00348 #else
00349    ir  = getIR();
00350    sir = getSIR();
00351 #endif         
00352 
00353 #if _WIZCHIP_ < 5500
00354    ir &= ~(1<<4); // IK_WOL
00355 #endif
00356 #if _WIZCHIP_ == 5200
00357    ir &= ~(1 << 6);
00358 #endif
00359   ret = sir;
00360   ret = (ret << 8) + ir;
00361   return (intr_kind)ret;
00362 }
00363 
00364 void wizchip_setinterruptmask(intr_kind intr)
00365 {
00366    uint8_t imr  = (uint8_t)intr;
00367    uint8_t simr = (uint8_t)((uint16_t)intr >> 8);
00368 #if _WIZCHIP_ < 5500
00369    imr &= ~(1<<4); // IK_WOL
00370 #endif
00371 #if _WIZCHIP_ == 5200
00372    imr &= ~(1 << 6);
00373 #endif
00374    
00375 #if _WIZCHIP_ < 5200
00376    simr &= 0x0F;
00377 #endif
00378 
00379 #if _WIZCHIP_ == 5100
00380    imr |= simr;
00381    setIMR(imr);
00382 #else
00383    setIMR(imr);
00384    setSIMR(simr);
00385 #endif   
00386 }
00387 
00388 intr_kind wizchip_getinterruptmask(void)
00389 {
00390    uint8_t imr  = 0;
00391    uint8_t simr = 0;
00392    uint16_t ret = 0;
00393 #if _WIZCHIP_ == 5100
00394    imr  = getIMR();
00395    simr = imr 0x0F;
00396 #else
00397    imr  = getIMR();
00398    simr = getSIMR();
00399 #endif         
00400 
00401 #if _WIZCHIP_ < 5500
00402    imr &= ~(1<<4); // IK_WOL
00403 #endif
00404 #if _WIZCHIP_ == 5200
00405    imr &= ~(1 << 6);  // IK_DEST_UNREACH
00406 #endif
00407   ret = simr;
00408   ret = (ret << 8) + imr;
00409   return (intr_kind)ret;
00410 }
00411 
00412 int8_t wizphy_getphylink(void)
00413 {
00414    int8_t tmp;
00415 #if   _WIZCHIP_ == 5200
00416    if(getPHYSTATUS() & PHYSTATUS_LINK)
00417       tmp = PHY_LINK_ON;
00418    else
00419       tmp = PHY_LINK_OFF;
00420 #elif _WIZCHIP_ == 5500
00421    if(getPHYCFGR() & PHYCFGR_LNK_ON)
00422       tmp = PHY_LINK_ON;
00423    else
00424       tmp = PHY_LINK_OFF;
00425 #else
00426    tmp = -1;
00427 #endif
00428    return tmp;
00429 }
00430 
00431 #if _WIZCHIP_ > 5100
00432 
00433 int8_t wizphy_getphypmode(void)
00434 {
00435    int8_t tmp = 0;
00436    #if   _WIZCHIP_ == 5200
00437       if(getPHYSTATUS() & PHYSTATUS_POWERDOWN)
00438          tmp = PHY_POWER_DOWN;
00439       else          
00440          tmp = PHY_POWER_NORM;
00441    #elif _WIZCHIP_ == 5500
00442       if(getPHYCFGR() & PHYCFGR_OPMDC_PDOWN)
00443          tmp = PHY_POWER_DOWN;
00444       else 
00445          tmp = PHY_POWER_NORM;
00446    #else
00447       tmp = -1;
00448    #endif
00449    return tmp;
00450 }
00451 #endif
00452 
00453 #if _WIZCHIP_ == 5500
00454 void wizphy_reset(void)
00455 {
00456    uint8_t tmp = getPHYCFGR();
00457    tmp &= PHYCFGR_RST;
00458    setPHYCFGR(tmp);
00459    tmp = getPHYCFGR(); 
00460    tmp |= ~PHYCFGR_RST;
00461    setPHYCFGR(tmp);
00462 }
00463 
00464 void wizphy_setphyconf(wiz_PhyConf* phyconf)
00465 {
00466    uint8_t tmp = 0;
00467    if(phyconf->by == PHY_CONFBY_SW)
00468       tmp |= PHYCFGR_OPMD;
00469    else
00470       tmp &= ~PHYCFGR_OPMD;
00471    if(phyconf->mode == PHY_MODE_AUTONEGO)
00472       tmp |= PHYCFGR_OPMDC_ALLA;
00473    else
00474    {
00475       if(phyconf->duplex == PHY_DUPLEX_FULL)
00476       {
00477          if(phyconf->speed == PHY_SPEED_100)
00478             tmp |= PHYCFGR_OPMDC_100F;
00479          else
00480             tmp |= PHYCFGR_OPMDC_10F;
00481       }   
00482       else
00483       {
00484          if(phyconf->speed == PHY_SPEED_100)
00485             tmp |= PHYCFGR_OPMDC_100H;
00486          else
00487             tmp |= PHYCFGR_OPMDC_10H;
00488       }
00489    }
00490    setPHYCFGR(tmp);
00491    wizphy_reset();
00492 }
00493 
00494 void wizphy_getphyconf(wiz_PhyConf* phyconf)
00495 {
00496    uint8_t tmp = 0;
00497    tmp = getPHYCFGR();
00498    phyconf->by   = (tmp & PHYCFGR_OPMD) ? PHY_CONFBY_SW : PHY_CONFBY_HW;
00499    switch(tmp & PHYCFGR_OPMDC_ALLA)
00500    {
00501       case PHYCFGR_OPMDC_ALLA:
00502       case PHYCFGR_OPMDC_100FA: 
00503          phyconf->mode = PHY_MODE_AUTONEGO;
00504          break;
00505       default:
00506          phyconf->mode = PHY_MODE_MANUAL;
00507          break;
00508    }
00509    switch(tmp & PHYCFGR_OPMDC_ALLA)
00510    {
00511       case PHYCFGR_OPMDC_100FA:
00512       case PHYCFGR_OPMDC_100F:
00513       case PHYCFGR_OPMDC_100H:
00514          phyconf->speed = PHY_SPEED_100;
00515          break;
00516       default:
00517          phyconf->speed = PHY_SPEED_10;
00518          break;
00519    }
00520    switch(tmp & PHYCFGR_OPMDC_ALLA)
00521    {
00522       case PHYCFGR_OPMDC_100FA:
00523       case PHYCFGR_OPMDC_100F:
00524       case PHYCFGR_OPMDC_10F:
00525          phyconf->duplex = PHY_DUPLEX_FULL;
00526          break;
00527       default:
00528          phyconf->duplex = PHY_DUPLEX_HALF;
00529          break;
00530    }
00531 }
00532 
00533 void wizphy_getphystat(wiz_PhyConf* phyconf)
00534 {
00535    uint8_t tmp = getPHYCFGR();
00536    phyconf->duplex = (tmp & PHYCFGR_DPX_FULL) ? PHY_DUPLEX_FULL : PHY_DUPLEX_HALF;
00537    phyconf->speed  = (tmp & PHYCFGR_SPD_100) ? PHY_SPEED_100 : PHY_SPEED_10;
00538 }
00539 
00540 int8_t wizphy_setphypmode(uint8_t pmode)
00541 {
00542    uint8_t tmp = 0;
00543    tmp = getPHYCFGR();
00544    if((tmp & PHYCFGR_OPMD)== 0) return -1;
00545    tmp &= ~PHYCFGR_OPMDC_ALLA;         
00546    if( pmode == PHY_POWER_DOWN)
00547       tmp |= PHYCFGR_OPMDC_PDOWN;
00548    else
00549       tmp |= PHYCFGR_OPMDC_ALLA;
00550    setPHYCFGR(tmp);
00551    wizphy_reset();
00552    tmp = getPHYCFGR();
00553    if( pmode == PHY_POWER_DOWN)
00554    {
00555       if(tmp & PHYCFGR_OPMDC_PDOWN) return 0;
00556    }
00557    else
00558    {
00559       if(tmp & PHYCFGR_OPMDC_ALLA) return 0;
00560    }
00561    return -1;
00562 }
00563 #endif
00564 
00565 
00566 void wizchip_setnetinfo(wiz_NetInfo* pnetinfo)
00567 {
00568    setSHAR(pnetinfo->mac);
00569    setGAR(pnetinfo->gw);
00570    setSUBR(pnetinfo->sn);
00571    setSIPR(pnetinfo->ip);
00572    _DNS_[0] = pnetinfo->dns[0];
00573    _DNS_[1] = pnetinfo->dns[1];
00574    _DNS_[2] = pnetinfo->dns[2];
00575    _DNS_[3] = pnetinfo->dns[3];
00576    _DHCP_   = pnetinfo->dhcp;
00577 }
00578 
00579 void wizchip_getnetinfo(wiz_NetInfo* pnetinfo)
00580 {
00581    getSHAR(pnetinfo->mac);
00582    getGAR(pnetinfo->gw);
00583    getSUBR(pnetinfo->sn);
00584    getSIPR(pnetinfo->ip);
00585    pnetinfo->dns[0]= _DNS_[0];
00586    pnetinfo->dns[1]= _DNS_[1];
00587    pnetinfo->dns[2]= _DNS_[2];
00588    pnetinfo->dns[3]= _DNS_[3];
00589    pnetinfo->dhcp  = _DHCP_;
00590 }
00591 
00592 int8_t wizchip_setnetmode(netmode_type netmode)
00593 {
00594    uint8_t tmp = 0;
00595 #if _WIZCHIP_ != 5500   
00596    if(netmode & ~(NM_WAKEONLAN | NM_PPPOE | NM_PINGBLOCK)) return -1;
00597 #else
00598    if(netmode & ~(NM_WAKEONLAN | NM_PPPOE | NM_PINGBLOCK | NM_FORCEARP)) return -1;
00599 #endif      
00600    tmp = getMR();
00601    tmp |= (uint8_t)netmode;
00602    setMR(tmp);
00603    return 0;
00604 }
00605 
00606 netmode_type wizchip_getnetmode(void)
00607 {
00608    return (netmode_type) getMR();
00609 }
00610 
00611 void wizchip_settimeout(wiz_NetTimeout* nettime)
00612 {
00613    setRCR(nettime->retry_cnt);
00614    setRTR(nettime->time_100us);
00615 }
00616 
00617 void wizchip_gettimeout(wiz_NetTimeout* nettime)
00618 {
00619    nettime->retry_cnt = getRCR();
00620    nettime->time_100us = getRTR();
00621 }