TeamGyro / mbed-rtos

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Dependents:   GYRO_MPU6050 Bluetooth_Powered_Multimeter_Using_STM32F429_and_RTOS fyp

targets/TARGET_Freescale/mbed_rtx4.h@0:a7c449cd2d5a, 2020-02-03 (annotated)

Committer:
guilhemMBED
Date:
Mon Feb 03 13:41:14 2020 +0000
Revision:
0:a7c449cd2d5a
previous version;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
guilhemMBED 0:a7c449cd2d5a 1 /* mbed Microcontroller Library
guilhemMBED 0:a7c449cd2d5a 2 * Copyright (c) 2016 ARM Limited
guilhemMBED 0:a7c449cd2d5a 3 *
guilhemMBED 0:a7c449cd2d5a 4 * Licensed under the Apache License, Version 2.0 (the "License");
guilhemMBED 0:a7c449cd2d5a 5 * you may not use this file except in compliance with the License.
guilhemMBED 0:a7c449cd2d5a 6 * You may obtain a copy of the License at
guilhemMBED 0:a7c449cd2d5a 7 *
guilhemMBED 0:a7c449cd2d5a 8 * http://www.apache.org/licenses/LICENSE-2.0
guilhemMBED 0:a7c449cd2d5a 9 *
guilhemMBED 0:a7c449cd2d5a 10 * Unless required by applicable law or agreed to in writing, software
guilhemMBED 0:a7c449cd2d5a 11 * distributed under the License is distributed on an "AS IS" BASIS,
guilhemMBED 0:a7c449cd2d5a 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
guilhemMBED 0:a7c449cd2d5a 13 * See the License for the specific language governing permissions and
guilhemMBED 0:a7c449cd2d5a 14 * limitations under the License.
guilhemMBED 0:a7c449cd2d5a 15 */
guilhemMBED 0:a7c449cd2d5a 16
guilhemMBED 0:a7c449cd2d5a 17 #ifndef MBED_MBED_RTX_H
guilhemMBED 0:a7c449cd2d5a 18 #define MBED_MBED_RTX_H
guilhemMBED 0:a7c449cd2d5a 19
guilhemMBED 0:a7c449cd2d5a 20 #if defined(TARGET_K20D50M)
guilhemMBED 0:a7c449cd2d5a 21
guilhemMBED 0:a7c449cd2d5a 22 #ifndef INITIAL_SP
guilhemMBED 0:a7c449cd2d5a 23 #define INITIAL_SP (0x10008000UL)
guilhemMBED 0:a7c449cd2d5a 24 #endif
guilhemMBED 0:a7c449cd2d5a 25
guilhemMBED 0:a7c449cd2d5a 26 // RTX 4 only config below, for backward-compability
guilhemMBED 0:a7c449cd2d5a 27
guilhemMBED 0:a7c449cd2d5a 28 #ifndef OS_TASKCNT
guilhemMBED 0:a7c449cd2d5a 29 #define OS_TASKCNT 14
guilhemMBED 0:a7c449cd2d5a 30 #endif
guilhemMBED 0:a7c449cd2d5a 31 #ifndef OS_MAINSTKSIZE
guilhemMBED 0:a7c449cd2d5a 32 #define OS_MAINSTKSIZE 256
guilhemMBED 0:a7c449cd2d5a 33 #endif
guilhemMBED 0:a7c449cd2d5a 34 #ifndef OS_CLOCK
guilhemMBED 0:a7c449cd2d5a 35 #define OS_CLOCK 96000000
guilhemMBED 0:a7c449cd2d5a 36 #endif
guilhemMBED 0:a7c449cd2d5a 37
guilhemMBED 0:a7c449cd2d5a 38 #elif defined(TARGET_TEENSY3_1)
guilhemMBED 0:a7c449cd2d5a 39
guilhemMBED 0:a7c449cd2d5a 40 #ifndef INITIAL_SP
guilhemMBED 0:a7c449cd2d5a 41 #define INITIAL_SP (0x20008000UL)
guilhemMBED 0:a7c449cd2d5a 42 #endif
guilhemMBED 0:a7c449cd2d5a 43
guilhemMBED 0:a7c449cd2d5a 44 // RTX 4 only config below, for backward-compability
guilhemMBED 0:a7c449cd2d5a 45
guilhemMBED 0:a7c449cd2d5a 46 #ifndef OS_TASKCNT
guilhemMBED 0:a7c449cd2d5a 47 #define OS_TASKCNT 14
guilhemMBED 0:a7c449cd2d5a 48 #endif
guilhemMBED 0:a7c449cd2d5a 49 #ifndef OS_MAINSTKSIZE
guilhemMBED 0:a7c449cd2d5a 50 #define OS_MAINSTKSIZE 256
guilhemMBED 0:a7c449cd2d5a 51 #endif
guilhemMBED 0:a7c449cd2d5a 52 #ifndef OS_CLOCK
guilhemMBED 0:a7c449cd2d5a 53 #define OS_CLOCK 96000000
guilhemMBED 0:a7c449cd2d5a 54 #endif
guilhemMBED 0:a7c449cd2d5a 55
guilhemMBED 0:a7c449cd2d5a 56 #elif defined(TARGET_MCU_K22F)
guilhemMBED 0:a7c449cd2d5a 57
guilhemMBED 0:a7c449cd2d5a 58 #ifndef INITIAL_SP
guilhemMBED 0:a7c449cd2d5a 59 #define INITIAL_SP (0x20010000UL)
guilhemMBED 0:a7c449cd2d5a 60 #endif
guilhemMBED 0:a7c449cd2d5a 61
guilhemMBED 0:a7c449cd2d5a 62 // RTX 4 only config below, for backward-compability
guilhemMBED 0:a7c449cd2d5a 63
guilhemMBED 0:a7c449cd2d5a 64 #ifndef OS_TASKCNT
guilhemMBED 0:a7c449cd2d5a 65 #define OS_TASKCNT 14
guilhemMBED 0:a7c449cd2d5a 66 #endif
guilhemMBED 0:a7c449cd2d5a 67 #ifndef OS_MAINSTKSIZE
guilhemMBED 0:a7c449cd2d5a 68 #define OS_MAINSTKSIZE 256
guilhemMBED 0:a7c449cd2d5a 69 #endif
guilhemMBED 0:a7c449cd2d5a 70 #ifndef OS_CLOCK
guilhemMBED 0:a7c449cd2d5a 71 #define OS_CLOCK 80000000
guilhemMBED 0:a7c449cd2d5a 72 #endif
guilhemMBED 0:a7c449cd2d5a 73
guilhemMBED 0:a7c449cd2d5a 74 #elif defined(TARGET_K66F)
guilhemMBED 0:a7c449cd2d5a 75
guilhemMBED 0:a7c449cd2d5a 76 #ifndef INITIAL_SP
guilhemMBED 0:a7c449cd2d5a 77 #define INITIAL_SP (0x20030000UL)
guilhemMBED 0:a7c449cd2d5a 78 #endif
guilhemMBED 0:a7c449cd2d5a 79
guilhemMBED 0:a7c449cd2d5a 80 // RTX 4 only config below, for backward-compability
guilhemMBED 0:a7c449cd2d5a 81
guilhemMBED 0:a7c449cd2d5a 82 #ifndef OS_TASKCNT
guilhemMBED 0:a7c449cd2d5a 83 #define OS_TASKCNT 14
guilhemMBED 0:a7c449cd2d5a 84 #endif
guilhemMBED 0:a7c449cd2d5a 85 #ifndef OS_MAINSTKSIZE
guilhemMBED 0:a7c449cd2d5a 86 #define OS_MAINSTKSIZE 256
guilhemMBED 0:a7c449cd2d5a 87 #endif
guilhemMBED 0:a7c449cd2d5a 88 #ifndef OS_CLOCK
guilhemMBED 0:a7c449cd2d5a 89 #define OS_CLOCK 120000000
guilhemMBED 0:a7c449cd2d5a 90 #endif
guilhemMBED 0:a7c449cd2d5a 91
guilhemMBED 0:a7c449cd2d5a 92 #elif defined(TARGET_KL27Z)
guilhemMBED 0:a7c449cd2d5a 93
guilhemMBED 0:a7c449cd2d5a 94 #ifndef INITIAL_SP
guilhemMBED 0:a7c449cd2d5a 95 #define INITIAL_SP (0x20003000UL)
guilhemMBED 0:a7c449cd2d5a 96 #endif
guilhemMBED 0:a7c449cd2d5a 97
guilhemMBED 0:a7c449cd2d5a 98 // RTX 4 only config below, for backward-compability
guilhemMBED 0:a7c449cd2d5a 99
guilhemMBED 0:a7c449cd2d5a 100 #ifndef OS_TASKCNT
guilhemMBED 0:a7c449cd2d5a 101 #define OS_TASKCNT 6
guilhemMBED 0:a7c449cd2d5a 102 #endif
guilhemMBED 0:a7c449cd2d5a 103 #ifndef OS_MAINSTKSIZE
guilhemMBED 0:a7c449cd2d5a 104 #define OS_MAINSTKSIZE 128
guilhemMBED 0:a7c449cd2d5a 105 #endif
guilhemMBED 0:a7c449cd2d5a 106 #ifndef OS_CLOCK
guilhemMBED 0:a7c449cd2d5a 107 #define OS_CLOCK 48000000
guilhemMBED 0:a7c449cd2d5a 108 #endif
guilhemMBED 0:a7c449cd2d5a 109
guilhemMBED 0:a7c449cd2d5a 110 #elif defined(TARGET_KL43Z)
guilhemMBED 0:a7c449cd2d5a 111
guilhemMBED 0:a7c449cd2d5a 112 #ifndef INITIAL_SP
guilhemMBED 0:a7c449cd2d5a 113 #define INITIAL_SP (0x20006000UL)
guilhemMBED 0:a7c449cd2d5a 114 #endif
guilhemMBED 0:a7c449cd2d5a 115
guilhemMBED 0:a7c449cd2d5a 116 // RTX 4 only config below, for backward-compability
guilhemMBED 0:a7c449cd2d5a 117
guilhemMBED 0:a7c449cd2d5a 118 #ifndef OS_TASKCNT
guilhemMBED 0:a7c449cd2d5a 119 #define OS_TASKCNT 14
guilhemMBED 0:a7c449cd2d5a 120 #endif
guilhemMBED 0:a7c449cd2d5a 121 #ifndef OS_MAINSTKSIZE
guilhemMBED 0:a7c449cd2d5a 122 #define OS_MAINSTKSIZE 256
guilhemMBED 0:a7c449cd2d5a 123 #endif
guilhemMBED 0:a7c449cd2d5a 124 #ifndef OS_CLOCK
guilhemMBED 0:a7c449cd2d5a 125 #define OS_CLOCK 48000000
guilhemMBED 0:a7c449cd2d5a 126 #endif
guilhemMBED 0:a7c449cd2d5a 127
guilhemMBED 0:a7c449cd2d5a 128 #elif defined(TARGET_KL05Z)
guilhemMBED 0:a7c449cd2d5a 129
guilhemMBED 0:a7c449cd2d5a 130 #ifndef INITIAL_SP
guilhemMBED 0:a7c449cd2d5a 131 #define INITIAL_SP (0x20000C00UL)
guilhemMBED 0:a7c449cd2d5a 132 #endif
guilhemMBED 0:a7c449cd2d5a 133
guilhemMBED 0:a7c449cd2d5a 134 // RTX 4 only config below, for backward-compability
guilhemMBED 0:a7c449cd2d5a 135
guilhemMBED 0:a7c449cd2d5a 136 #ifndef OS_TASKCNT
guilhemMBED 0:a7c449cd2d5a 137 #define OS_TASKCNT 14
guilhemMBED 0:a7c449cd2d5a 138 #endif
guilhemMBED 0:a7c449cd2d5a 139 #ifndef OS_MAINSTKSIZE
guilhemMBED 0:a7c449cd2d5a 140 #define OS_MAINSTKSIZE 128
guilhemMBED 0:a7c449cd2d5a 141 #endif
guilhemMBED 0:a7c449cd2d5a 142 #ifndef OS_CLOCK
guilhemMBED 0:a7c449cd2d5a 143 #define OS_CLOCK 48000000
guilhemMBED 0:a7c449cd2d5a 144 #endif
guilhemMBED 0:a7c449cd2d5a 145
guilhemMBED 0:a7c449cd2d5a 146 #elif defined(TARGET_KL25Z)
guilhemMBED 0:a7c449cd2d5a 147
guilhemMBED 0:a7c449cd2d5a 148 #ifndef INITIAL_SP
guilhemMBED 0:a7c449cd2d5a 149 #define INITIAL_SP (0x20003000UL)
guilhemMBED 0:a7c449cd2d5a 150 #endif
guilhemMBED 0:a7c449cd2d5a 151
guilhemMBED 0:a7c449cd2d5a 152 // RTX 4 only config below, for backward-compability
guilhemMBED 0:a7c449cd2d5a 153
guilhemMBED 0:a7c449cd2d5a 154 #ifndef OS_TASKCNT
guilhemMBED 0:a7c449cd2d5a 155 #define OS_TASKCNT 14
guilhemMBED 0:a7c449cd2d5a 156 #endif
guilhemMBED 0:a7c449cd2d5a 157 #ifndef OS_MAINSTKSIZE
guilhemMBED 0:a7c449cd2d5a 158 #define OS_MAINSTKSIZE 128
guilhemMBED 0:a7c449cd2d5a 159 #endif
guilhemMBED 0:a7c449cd2d5a 160 #ifndef OS_CLOCK
guilhemMBED 0:a7c449cd2d5a 161 #define OS_CLOCK 48000000
guilhemMBED 0:a7c449cd2d5a 162 #endif
guilhemMBED 0:a7c449cd2d5a 163
guilhemMBED 0:a7c449cd2d5a 164 #elif defined(TARGET_KL26Z)
guilhemMBED 0:a7c449cd2d5a 165
guilhemMBED 0:a7c449cd2d5a 166 #ifndef INITIAL_SP
guilhemMBED 0:a7c449cd2d5a 167 #define INITIAL_SP (0x20003000UL)
guilhemMBED 0:a7c449cd2d5a 168 #endif
guilhemMBED 0:a7c449cd2d5a 169
guilhemMBED 0:a7c449cd2d5a 170 // RTX 4 only config below, for backward-compability
guilhemMBED 0:a7c449cd2d5a 171
guilhemMBED 0:a7c449cd2d5a 172 #ifndef OS_TASKCNT
guilhemMBED 0:a7c449cd2d5a 173 #define OS_TASKCNT 14
guilhemMBED 0:a7c449cd2d5a 174 #endif
guilhemMBED 0:a7c449cd2d5a 175 #ifndef OS_MAINSTKSIZE
guilhemMBED 0:a7c449cd2d5a 176 #define OS_MAINSTKSIZE 128
guilhemMBED 0:a7c449cd2d5a 177 #endif
guilhemMBED 0:a7c449cd2d5a 178 #ifndef OS_CLOCK
guilhemMBED 0:a7c449cd2d5a 179 #define OS_CLOCK 48000000
guilhemMBED 0:a7c449cd2d5a 180 #endif
guilhemMBED 0:a7c449cd2d5a 181
guilhemMBED 0:a7c449cd2d5a 182 #elif defined(TARGET_KL46Z)
guilhemMBED 0:a7c449cd2d5a 183
guilhemMBED 0:a7c449cd2d5a 184 #ifndef INITIAL_SP
guilhemMBED 0:a7c449cd2d5a 185 #define INITIAL_SP (0x20006000UL)
guilhemMBED 0:a7c449cd2d5a 186 #endif
guilhemMBED 0:a7c449cd2d5a 187
guilhemMBED 0:a7c449cd2d5a 188 // RTX 4 only config below, for backward-compability
guilhemMBED 0:a7c449cd2d5a 189
guilhemMBED 0:a7c449cd2d5a 190 #ifndef OS_TASKCNT
guilhemMBED 0:a7c449cd2d5a 191 #define OS_TASKCNT 14
guilhemMBED 0:a7c449cd2d5a 192 #endif
guilhemMBED 0:a7c449cd2d5a 193 #ifndef OS_MAINSTKSIZE
guilhemMBED 0:a7c449cd2d5a 194 #define OS_MAINSTKSIZE 256
guilhemMBED 0:a7c449cd2d5a 195 #endif
guilhemMBED 0:a7c449cd2d5a 196 #ifndef OS_CLOCK
guilhemMBED 0:a7c449cd2d5a 197 #define OS_CLOCK 48000000
guilhemMBED 0:a7c449cd2d5a 198 #endif
guilhemMBED 0:a7c449cd2d5a 199
guilhemMBED 0:a7c449cd2d5a 200 #elif defined(TARGET_KL82Z)
guilhemMBED 0:a7c449cd2d5a 201
guilhemMBED 0:a7c449cd2d5a 202 #ifndef INITIAL_SP
guilhemMBED 0:a7c449cd2d5a 203 #define INITIAL_SP (0x20012000UL)
guilhemMBED 0:a7c449cd2d5a 204 #endif
guilhemMBED 0:a7c449cd2d5a 205
guilhemMBED 0:a7c449cd2d5a 206 // RTX 4 only config below, for backward-compability
guilhemMBED 0:a7c449cd2d5a 207
guilhemMBED 0:a7c449cd2d5a 208 #ifndef OS_TASKCNT
guilhemMBED 0:a7c449cd2d5a 209 #define OS_TASKCNT 14
guilhemMBED 0:a7c449cd2d5a 210 #endif
guilhemMBED 0:a7c449cd2d5a 211 #ifndef OS_MAINSTKSIZE
guilhemMBED 0:a7c449cd2d5a 212 #define OS_MAINSTKSIZE 256
guilhemMBED 0:a7c449cd2d5a 213 #endif
guilhemMBED 0:a7c449cd2d5a 214 #ifndef OS_CLOCK
guilhemMBED 0:a7c449cd2d5a 215 #define OS_CLOCK 72000000
guilhemMBED 0:a7c449cd2d5a 216 #endif
guilhemMBED 0:a7c449cd2d5a 217
guilhemMBED 0:a7c449cd2d5a 218 #elif defined(TARGET_K64F)
guilhemMBED 0:a7c449cd2d5a 219
guilhemMBED 0:a7c449cd2d5a 220 #ifndef INITIAL_SP
guilhemMBED 0:a7c449cd2d5a 221 #define INITIAL_SP (0x20030000UL)
guilhemMBED 0:a7c449cd2d5a 222 #endif
guilhemMBED 0:a7c449cd2d5a 223
guilhemMBED 0:a7c449cd2d5a 224 // RTX 4 only config below, for backward-compability
guilhemMBED 0:a7c449cd2d5a 225
guilhemMBED 0:a7c449cd2d5a 226 #if defined(__CC_ARM) || defined(__GNUC__)
guilhemMBED 0:a7c449cd2d5a 227 #define ISR_STACK_SIZE (0x1000)
guilhemMBED 0:a7c449cd2d5a 228 #endif
guilhemMBED 0:a7c449cd2d5a 229
guilhemMBED 0:a7c449cd2d5a 230 #ifndef OS_TASKCNT
guilhemMBED 0:a7c449cd2d5a 231 #define OS_TASKCNT 14
guilhemMBED 0:a7c449cd2d5a 232 #endif
guilhemMBED 0:a7c449cd2d5a 233 #ifndef OS_MAINSTKSIZE
guilhemMBED 0:a7c449cd2d5a 234 #define OS_MAINSTKSIZE 256
guilhemMBED 0:a7c449cd2d5a 235 #endif
guilhemMBED 0:a7c449cd2d5a 236 #ifndef OS_CLOCK
guilhemMBED 0:a7c449cd2d5a 237 #define OS_CLOCK 120000000
guilhemMBED 0:a7c449cd2d5a 238 #endif
guilhemMBED 0:a7c449cd2d5a 239
guilhemMBED 0:a7c449cd2d5a 240 #elif defined(TARGET_KW24D)
guilhemMBED 0:a7c449cd2d5a 241
guilhemMBED 0:a7c449cd2d5a 242 #ifndef INITIAL_SP
guilhemMBED 0:a7c449cd2d5a 243 #define INITIAL_SP (0x20008000UL)
guilhemMBED 0:a7c449cd2d5a 244 #endif
guilhemMBED 0:a7c449cd2d5a 245
guilhemMBED 0:a7c449cd2d5a 246 // RTX 4 only config below, for backward-compability
guilhemMBED 0:a7c449cd2d5a 247
guilhemMBED 0:a7c449cd2d5a 248 #ifndef OS_TASKCNT
guilhemMBED 0:a7c449cd2d5a 249 #define OS_TASKCNT 14
guilhemMBED 0:a7c449cd2d5a 250 #endif
guilhemMBED 0:a7c449cd2d5a 251 #ifndef OS_MAINSTKSIZE
guilhemMBED 0:a7c449cd2d5a 252 #define OS_MAINSTKSIZE 256
guilhemMBED 0:a7c449cd2d5a 253 #endif
guilhemMBED 0:a7c449cd2d5a 254 #ifndef OS_CLOCK
guilhemMBED 0:a7c449cd2d5a 255 #define OS_CLOCK 48000000
guilhemMBED 0:a7c449cd2d5a 256 #endif
guilhemMBED 0:a7c449cd2d5a 257
guilhemMBED 0:a7c449cd2d5a 258 #elif defined(TARGET_KW41Z)
guilhemMBED 0:a7c449cd2d5a 259
guilhemMBED 0:a7c449cd2d5a 260 #ifndef INITIAL_SP
guilhemMBED 0:a7c449cd2d5a 261 #define INITIAL_SP (0x20018000UL)
guilhemMBED 0:a7c449cd2d5a 262 #endif
guilhemMBED 0:a7c449cd2d5a 263
guilhemMBED 0:a7c449cd2d5a 264 // RTX 4 only config below, for backward-compability
guilhemMBED 0:a7c449cd2d5a 265
guilhemMBED 0:a7c449cd2d5a 266 #ifndef OS_TASKCNT
guilhemMBED 0:a7c449cd2d5a 267 #define OS_TASKCNT 14
guilhemMBED 0:a7c449cd2d5a 268 #endif
guilhemMBED 0:a7c449cd2d5a 269 #ifndef OS_MAINSTKSIZE
guilhemMBED 0:a7c449cd2d5a 270 #define OS_MAINSTKSIZE 256
guilhemMBED 0:a7c449cd2d5a 271 #endif
guilhemMBED 0:a7c449cd2d5a 272 #ifndef OS_CLOCK
guilhemMBED 0:a7c449cd2d5a 273 #define OS_CLOCK 40000000
guilhemMBED 0:a7c449cd2d5a 274 #endif
guilhemMBED 0:a7c449cd2d5a 275
guilhemMBED 0:a7c449cd2d5a 276 #elif defined(TARGET_K82F)
guilhemMBED 0:a7c449cd2d5a 277
guilhemMBED 0:a7c449cd2d5a 278 #ifndef INITIAL_SP
guilhemMBED 0:a7c449cd2d5a 279 #define INITIAL_SP (0x20030000UL)
guilhemMBED 0:a7c449cd2d5a 280 #endif
guilhemMBED 0:a7c449cd2d5a 281
guilhemMBED 0:a7c449cd2d5a 282 // RTX 4 only config below, for backward-compability
guilhemMBED 0:a7c449cd2d5a 283
guilhemMBED 0:a7c449cd2d5a 284 #ifndef OS_TASKCNT
guilhemMBED 0:a7c449cd2d5a 285 #define OS_TASKCNT 14
guilhemMBED 0:a7c449cd2d5a 286 #endif
guilhemMBED 0:a7c449cd2d5a 287 #ifndef OS_MAINSTKSIZE
guilhemMBED 0:a7c449cd2d5a 288 #define OS_MAINSTKSIZE 256
guilhemMBED 0:a7c449cd2d5a 289 #endif
guilhemMBED 0:a7c449cd2d5a 290 #ifndef OS_CLOCK
guilhemMBED 0:a7c449cd2d5a 291 #define OS_CLOCK 120000000
guilhemMBED 0:a7c449cd2d5a 292 #endif
guilhemMBED 0:a7c449cd2d5a 293
guilhemMBED 0:a7c449cd2d5a 294 #elif defined(TARGET_RO359B)
guilhemMBED 0:a7c449cd2d5a 295
guilhemMBED 0:a7c449cd2d5a 296 #ifndef INITIAL_SP
guilhemMBED 0:a7c449cd2d5a 297 #define INITIAL_SP (0x20030000UL)
guilhemMBED 0:a7c449cd2d5a 298 #endif
guilhemMBED 0:a7c449cd2d5a 299
guilhemMBED 0:a7c449cd2d5a 300 // RTX 4 only config below, for backward-compability
guilhemMBED 0:a7c449cd2d5a 301
guilhemMBED 0:a7c449cd2d5a 302 #if defined(__CC_ARM) || defined(__GNUC__)
guilhemMBED 0:a7c449cd2d5a 303 #define ISR_STACK_SIZE (0x1000)
guilhemMBED 0:a7c449cd2d5a 304 #endif
guilhemMBED 0:a7c449cd2d5a 305
guilhemMBED 0:a7c449cd2d5a 306 #ifndef OS_TASKCNT
guilhemMBED 0:a7c449cd2d5a 307 #define OS_TASKCNT 14
guilhemMBED 0:a7c449cd2d5a 308 #endif
guilhemMBED 0:a7c449cd2d5a 309 #ifndef OS_MAINSTKSIZE
guilhemMBED 0:a7c449cd2d5a 310 #define OS_MAINSTKSIZE 256
guilhemMBED 0:a7c449cd2d5a 311 #endif
guilhemMBED 0:a7c449cd2d5a 312 #ifndef OS_CLOCK
guilhemMBED 0:a7c449cd2d5a 313 #define OS_CLOCK 96000000
guilhemMBED 0:a7c449cd2d5a 314 #endif
guilhemMBED 0:a7c449cd2d5a 315
guilhemMBED 0:a7c449cd2d5a 316 #endif
guilhemMBED 0:a7c449cd2d5a 317
guilhemMBED 0:a7c449cd2d5a 318 #endif // MBED_MBED_RTX_H