TeamGyro / mbed-rtos

OS2

Dependents:   GYRO_MPU6050 Bluetooth_Powered_Multimeter_Using_STM32F429_and_RTOS fyp

rtx/TARGET_CORTEX_M/HAL_CM.c@0:a7c449cd2d5a, 2020-02-03 (annotated)

Committer:
guilhemMBED
Date:
Mon Feb 03 13:41:14 2020 +0000
Revision:
0:a7c449cd2d5a
previous version;

Who changed what in which revision?

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guilhemMBED 0:a7c449cd2d5a 1 /*----------------------------------------------------------------------------
guilhemMBED 0:a7c449cd2d5a 2 * CMSIS-RTOS - RTX
guilhemMBED 0:a7c449cd2d5a 3 *----------------------------------------------------------------------------
guilhemMBED 0:a7c449cd2d5a 4 * Name: HAL_CM.C
guilhemMBED 0:a7c449cd2d5a 5 * Purpose: Hardware Abstraction Layer for Cortex-M
guilhemMBED 0:a7c449cd2d5a 6 * Rev.: V4.79
guilhemMBED 0:a7c449cd2d5a 7 *----------------------------------------------------------------------------
guilhemMBED 0:a7c449cd2d5a 8 *
guilhemMBED 0:a7c449cd2d5a 9 * Copyright (c) 1999-2009 KEIL, 2009-2015 ARM Germany GmbH
guilhemMBED 0:a7c449cd2d5a 10 * All rights reserved.
guilhemMBED 0:a7c449cd2d5a 11 * Redistribution and use in source and binary forms, with or without
guilhemMBED 0:a7c449cd2d5a 12 * modification, are permitted provided that the following conditions are met:
guilhemMBED 0:a7c449cd2d5a 13 * - Redistributions of source code must retain the above copyright
guilhemMBED 0:a7c449cd2d5a 14 * notice, this list of conditions and the following disclaimer.
guilhemMBED 0:a7c449cd2d5a 15 * - Redistributions in binary form must reproduce the above copyright
guilhemMBED 0:a7c449cd2d5a 16 * notice, this list of conditions and the following disclaimer in the
guilhemMBED 0:a7c449cd2d5a 17 * documentation and/or other materials provided with the distribution.
guilhemMBED 0:a7c449cd2d5a 18 * - Neither the name of ARM nor the names of its contributors may be used
guilhemMBED 0:a7c449cd2d5a 19 * to endorse or promote products derived from this software without
guilhemMBED 0:a7c449cd2d5a 20 * specific prior written permission.
guilhemMBED 0:a7c449cd2d5a 21 *
guilhemMBED 0:a7c449cd2d5a 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
guilhemMBED 0:a7c449cd2d5a 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
guilhemMBED 0:a7c449cd2d5a 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
guilhemMBED 0:a7c449cd2d5a 25 * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
guilhemMBED 0:a7c449cd2d5a 26 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
guilhemMBED 0:a7c449cd2d5a 27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
guilhemMBED 0:a7c449cd2d5a 28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
guilhemMBED 0:a7c449cd2d5a 29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
guilhemMBED 0:a7c449cd2d5a 30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
guilhemMBED 0:a7c449cd2d5a 31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
guilhemMBED 0:a7c449cd2d5a 32 * POSSIBILITY OF SUCH DAMAGE.
guilhemMBED 0:a7c449cd2d5a 33 *---------------------------------------------------------------------------*/
guilhemMBED 0:a7c449cd2d5a 34
guilhemMBED 0:a7c449cd2d5a 35 #include "rt_TypeDef.h"
guilhemMBED 0:a7c449cd2d5a 36 #include "RTX_Config.h"
guilhemMBED 0:a7c449cd2d5a 37 #include "rt_HAL_CM.h"
guilhemMBED 0:a7c449cd2d5a 38 #include "cmsis_os.h"
guilhemMBED 0:a7c449cd2d5a 39
guilhemMBED 0:a7c449cd2d5a 40 /*----------------------------------------------------------------------------
guilhemMBED 0:a7c449cd2d5a 41 * Global Variables
guilhemMBED 0:a7c449cd2d5a 42 *---------------------------------------------------------------------------*/
guilhemMBED 0:a7c449cd2d5a 43
guilhemMBED 0:a7c449cd2d5a 44 #ifdef DBG_MSG
guilhemMBED 0:a7c449cd2d5a 45 BIT dbg_msg;
guilhemMBED 0:a7c449cd2d5a 46 #endif
guilhemMBED 0:a7c449cd2d5a 47
guilhemMBED 0:a7c449cd2d5a 48 /*----------------------------------------------------------------------------
guilhemMBED 0:a7c449cd2d5a 49 * Functions
guilhemMBED 0:a7c449cd2d5a 50 *---------------------------------------------------------------------------*/
guilhemMBED 0:a7c449cd2d5a 51
guilhemMBED 0:a7c449cd2d5a 52
guilhemMBED 0:a7c449cd2d5a 53 /*--------------------------- rt_init_stack ---------------------------------*/
guilhemMBED 0:a7c449cd2d5a 54
guilhemMBED 0:a7c449cd2d5a 55 void rt_init_stack (P_TCB p_TCB, FUNCP task_body) {
guilhemMBED 0:a7c449cd2d5a 56 /* Prepare TCB and saved context for a first time start of a task. */
guilhemMBED 0:a7c449cd2d5a 57 U32 *stk,i,size;
guilhemMBED 0:a7c449cd2d5a 58
guilhemMBED 0:a7c449cd2d5a 59 /* Prepare a complete interrupt frame for first task start */
guilhemMBED 0:a7c449cd2d5a 60 size = p_TCB->priv_stack >> 2;
guilhemMBED 0:a7c449cd2d5a 61 if (size == 0U) {
guilhemMBED 0:a7c449cd2d5a 62 size = (U16)os_stackinfo >> 2;
guilhemMBED 0:a7c449cd2d5a 63 }
guilhemMBED 0:a7c449cd2d5a 64
guilhemMBED 0:a7c449cd2d5a 65 /* Write to the top of stack. */
guilhemMBED 0:a7c449cd2d5a 66 stk = &p_TCB->stack[size];
guilhemMBED 0:a7c449cd2d5a 67
guilhemMBED 0:a7c449cd2d5a 68 /* Auto correct to 8-byte ARM stack alignment. */
guilhemMBED 0:a7c449cd2d5a 69 if ((U32)stk & 0x04U) {
guilhemMBED 0:a7c449cd2d5a 70 stk--;
guilhemMBED 0:a7c449cd2d5a 71 }
guilhemMBED 0:a7c449cd2d5a 72
guilhemMBED 0:a7c449cd2d5a 73 stk -= 16;
guilhemMBED 0:a7c449cd2d5a 74
guilhemMBED 0:a7c449cd2d5a 75 /* Default xPSR and initial PC */
guilhemMBED 0:a7c449cd2d5a 76 stk[15] = INITIAL_xPSR;
guilhemMBED 0:a7c449cd2d5a 77 stk[14] = (U32)task_body;
guilhemMBED 0:a7c449cd2d5a 78
guilhemMBED 0:a7c449cd2d5a 79 /* Clear R4-R11,R0-R3,R12,LR registers. */
guilhemMBED 0:a7c449cd2d5a 80 for (i = 0U; i < 14U; i++) {
guilhemMBED 0:a7c449cd2d5a 81 stk[i] = 0U;
guilhemMBED 0:a7c449cd2d5a 82 }
guilhemMBED 0:a7c449cd2d5a 83
guilhemMBED 0:a7c449cd2d5a 84 /* Assign a void pointer to R0. */
guilhemMBED 0:a7c449cd2d5a 85 stk[8] = (U32)p_TCB->msg;
guilhemMBED 0:a7c449cd2d5a 86
guilhemMBED 0:a7c449cd2d5a 87 /* Initial Task stack pointer. */
guilhemMBED 0:a7c449cd2d5a 88 p_TCB->tsk_stack = (U32)stk;
guilhemMBED 0:a7c449cd2d5a 89
guilhemMBED 0:a7c449cd2d5a 90 /* Task entry point. */
guilhemMBED 0:a7c449cd2d5a 91 p_TCB->ptask = task_body;
guilhemMBED 0:a7c449cd2d5a 92
guilhemMBED 0:a7c449cd2d5a 93
guilhemMBED 0:a7c449cd2d5a 94 #ifdef __MBED_CMSIS_RTOS_CM
guilhemMBED 0:a7c449cd2d5a 95 /* Set a magic word for checking of stack overflow.
guilhemMBED 0:a7c449cd2d5a 96 For the main thread (ID: MAIN_THREAD_ID) the stack is in a memory area shared with the
guilhemMBED 0:a7c449cd2d5a 97 heap, therefore the last word of the stack is a moving target.
guilhemMBED 0:a7c449cd2d5a 98 We want to do stack/heap collision detection instead.
guilhemMBED 0:a7c449cd2d5a 99 Similar applies to stack filling for the magic pattern.
guilhemMBED 0:a7c449cd2d5a 100 */
guilhemMBED 0:a7c449cd2d5a 101 if (p_TCB->task_id != MAIN_THREAD_ID) {
guilhemMBED 0:a7c449cd2d5a 102 p_TCB->stack[0] = MAGIC_WORD;
guilhemMBED 0:a7c449cd2d5a 103
guilhemMBED 0:a7c449cd2d5a 104 /* Initialize stack with magic pattern. */
guilhemMBED 0:a7c449cd2d5a 105 if (os_stackinfo & 0x10000000U) {
guilhemMBED 0:a7c449cd2d5a 106 if (size > (16U+1U)) {
guilhemMBED 0:a7c449cd2d5a 107 for (i = ((size - 16U)/2U) - 1U; i; i--) {
guilhemMBED 0:a7c449cd2d5a 108 stk -= 2U;
guilhemMBED 0:a7c449cd2d5a 109 stk[1] = MAGIC_PATTERN;
guilhemMBED 0:a7c449cd2d5a 110 stk[0] = MAGIC_PATTERN;
guilhemMBED 0:a7c449cd2d5a 111 }
guilhemMBED 0:a7c449cd2d5a 112 if (--stk > p_TCB->stack) {
guilhemMBED 0:a7c449cd2d5a 113 *stk = MAGIC_PATTERN;
guilhemMBED 0:a7c449cd2d5a 114 }
guilhemMBED 0:a7c449cd2d5a 115 }
guilhemMBED 0:a7c449cd2d5a 116 }
guilhemMBED 0:a7c449cd2d5a 117 }
guilhemMBED 0:a7c449cd2d5a 118 #else
guilhemMBED 0:a7c449cd2d5a 119 /* Initialize stack with magic pattern. */
guilhemMBED 0:a7c449cd2d5a 120 if (os_stackinfo & 0x10000000U) {
guilhemMBED 0:a7c449cd2d5a 121 if (size > (16U+1U)) {
guilhemMBED 0:a7c449cd2d5a 122 for (i = ((size - 16U)/2U) - 1U; i; i--) {
guilhemMBED 0:a7c449cd2d5a 123 stk -= 2U;
guilhemMBED 0:a7c449cd2d5a 124 stk[1] = MAGIC_PATTERN;
guilhemMBED 0:a7c449cd2d5a 125 stk[0] = MAGIC_PATTERN;
guilhemMBED 0:a7c449cd2d5a 126 }
guilhemMBED 0:a7c449cd2d5a 127 if (--stk > p_TCB->stack) {
guilhemMBED 0:a7c449cd2d5a 128 *stk = MAGIC_PATTERN;
guilhemMBED 0:a7c449cd2d5a 129 }
guilhemMBED 0:a7c449cd2d5a 130 }
guilhemMBED 0:a7c449cd2d5a 131 }
guilhemMBED 0:a7c449cd2d5a 132
guilhemMBED 0:a7c449cd2d5a 133 /* Set a magic word for checking of stack overflow. */
guilhemMBED 0:a7c449cd2d5a 134 p_TCB->stack[0] = MAGIC_WORD;
guilhemMBED 0:a7c449cd2d5a 135 #endif
guilhemMBED 0:a7c449cd2d5a 136 }
guilhemMBED 0:a7c449cd2d5a 137
guilhemMBED 0:a7c449cd2d5a 138
guilhemMBED 0:a7c449cd2d5a 139 /*--------------------------- rt_ret_val ----------------------------------*/
guilhemMBED 0:a7c449cd2d5a 140
guilhemMBED 0:a7c449cd2d5a 141 static __inline U32 *rt_ret_regs (P_TCB p_TCB) {
guilhemMBED 0:a7c449cd2d5a 142 /* Get pointer to task return value registers (R0..R3) in Stack */
guilhemMBED 0:a7c449cd2d5a 143 #if defined(__TARGET_FPU_VFP)
guilhemMBED 0:a7c449cd2d5a 144 if (p_TCB->stack_frame) {
guilhemMBED 0:a7c449cd2d5a 145 /* Extended Stack Frame: R4-R11,S16-S31,R0-R3,R12,LR,PC,xPSR,S0-S15,FPSCR */
guilhemMBED 0:a7c449cd2d5a 146 return (U32 *)(p_TCB->tsk_stack + (8U*4U) + (16U*4U));
guilhemMBED 0:a7c449cd2d5a 147 } else {
guilhemMBED 0:a7c449cd2d5a 148 /* Basic Stack Frame: R4-R11,R0-R3,R12,LR,PC,xPSR */
guilhemMBED 0:a7c449cd2d5a 149 return (U32 *)(p_TCB->tsk_stack + (8U*4U));
guilhemMBED 0:a7c449cd2d5a 150 }
guilhemMBED 0:a7c449cd2d5a 151 #else
guilhemMBED 0:a7c449cd2d5a 152 /* Stack Frame: R4-R11,R0-R3,R12,LR,PC,xPSR */
guilhemMBED 0:a7c449cd2d5a 153 return (U32 *)(p_TCB->tsk_stack + (8U*4U));
guilhemMBED 0:a7c449cd2d5a 154 #endif
guilhemMBED 0:a7c449cd2d5a 155 }
guilhemMBED 0:a7c449cd2d5a 156
guilhemMBED 0:a7c449cd2d5a 157 void rt_ret_val (P_TCB p_TCB, U32 v0) {
guilhemMBED 0:a7c449cd2d5a 158 U32 *ret;
guilhemMBED 0:a7c449cd2d5a 159
guilhemMBED 0:a7c449cd2d5a 160 ret = rt_ret_regs(p_TCB);
guilhemMBED 0:a7c449cd2d5a 161 ret[0] = v0;
guilhemMBED 0:a7c449cd2d5a 162 }
guilhemMBED 0:a7c449cd2d5a 163
guilhemMBED 0:a7c449cd2d5a 164 void rt_ret_val2(P_TCB p_TCB, U32 v0, U32 v1) {
guilhemMBED 0:a7c449cd2d5a 165 U32 *ret;
guilhemMBED 0:a7c449cd2d5a 166
guilhemMBED 0:a7c449cd2d5a 167 ret = rt_ret_regs(p_TCB);
guilhemMBED 0:a7c449cd2d5a 168 ret[0] = v0;
guilhemMBED 0:a7c449cd2d5a 169 ret[1] = v1;
guilhemMBED 0:a7c449cd2d5a 170 }
guilhemMBED 0:a7c449cd2d5a 171
guilhemMBED 0:a7c449cd2d5a 172
guilhemMBED 0:a7c449cd2d5a 173 /*--------------------------- dbg_init --------------------------------------*/
guilhemMBED 0:a7c449cd2d5a 174
guilhemMBED 0:a7c449cd2d5a 175 #ifdef DBG_MSG
guilhemMBED 0:a7c449cd2d5a 176 void dbg_init (void) {
guilhemMBED 0:a7c449cd2d5a 177 if (((DEMCR & DEMCR_TRCENA) != 0U) &&
guilhemMBED 0:a7c449cd2d5a 178 ((ITM_CONTROL & ITM_ITMENA) != 0U) &&
guilhemMBED 0:a7c449cd2d5a 179 ((ITM_ENABLE & (1UL << 31)) != 0U)) {
guilhemMBED 0:a7c449cd2d5a 180 dbg_msg = __TRUE;
guilhemMBED 0:a7c449cd2d5a 181 }
guilhemMBED 0:a7c449cd2d5a 182 }
guilhemMBED 0:a7c449cd2d5a 183 #endif
guilhemMBED 0:a7c449cd2d5a 184
guilhemMBED 0:a7c449cd2d5a 185 /*--------------------------- dbg_task_notify -------------------------------*/
guilhemMBED 0:a7c449cd2d5a 186
guilhemMBED 0:a7c449cd2d5a 187 #ifdef DBG_MSG
guilhemMBED 0:a7c449cd2d5a 188 void dbg_task_notify (P_TCB p_tcb, BOOL create) {
guilhemMBED 0:a7c449cd2d5a 189 while (ITM_PORT31_U32 == 0U);
guilhemMBED 0:a7c449cd2d5a 190 ITM_PORT31_U32 = (U32)p_tcb->ptask;
guilhemMBED 0:a7c449cd2d5a 191 while (ITM_PORT31_U32 == 0U);
guilhemMBED 0:a7c449cd2d5a 192 ITM_PORT31_U16 = (U16)((create << 8) | p_tcb->task_id);
guilhemMBED 0:a7c449cd2d5a 193 }
guilhemMBED 0:a7c449cd2d5a 194 #endif
guilhemMBED 0:a7c449cd2d5a 195
guilhemMBED 0:a7c449cd2d5a 196 /*--------------------------- dbg_task_switch -------------------------------*/
guilhemMBED 0:a7c449cd2d5a 197
guilhemMBED 0:a7c449cd2d5a 198 #ifdef DBG_MSG
guilhemMBED 0:a7c449cd2d5a 199 void dbg_task_switch (U32 task_id) {
guilhemMBED 0:a7c449cd2d5a 200 while (ITM_PORT31_U32 == 0U);
guilhemMBED 0:a7c449cd2d5a 201 ITM_PORT31_U8 = (U8)task_id;
guilhemMBED 0:a7c449cd2d5a 202 }
guilhemMBED 0:a7c449cd2d5a 203 #endif
guilhemMBED 0:a7c449cd2d5a 204
guilhemMBED 0:a7c449cd2d5a 205 /*----------------------------------------------------------------------------
guilhemMBED 0:a7c449cd2d5a 206 * end of file
guilhemMBED 0:a7c449cd2d5a 207 *---------------------------------------------------------------------------*/