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targets/hal/TARGET_NXP/TARGET_LPC43XX/analogin_api.c@20:4263a77256ae, 2013-09-10 (annotated)

Committer:
bogdanm
Date:
Tue Sep 10 15:14:19 2013 +0300
Revision:
20:4263a77256ae
Child:
227:7bd0639b8911
Sync with git revision 171dda705c947bf910926a0b73d6a4797802554d

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 20:4263a77256ae 1 /* mbed Microcontroller Library
bogdanm 20:4263a77256ae 2 * Copyright (c) 2006-2013 ARM Limited
bogdanm 20:4263a77256ae 3 *
bogdanm 20:4263a77256ae 4 * Licensed under the Apache License, Version 2.0 (the "License");
bogdanm 20:4263a77256ae 5 * you may not use this file except in compliance with the License.
bogdanm 20:4263a77256ae 6 * You may obtain a copy of the License at
bogdanm 20:4263a77256ae 7 *
bogdanm 20:4263a77256ae 8 * http://www.apache.org/licenses/LICENSE-2.0
bogdanm 20:4263a77256ae 9 *
bogdanm 20:4263a77256ae 10 * Unless required by applicable law or agreed to in writing, software
bogdanm 20:4263a77256ae 11 * distributed under the License is distributed on an "AS IS" BASIS,
bogdanm 20:4263a77256ae 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
bogdanm 20:4263a77256ae 13 * See the License for the specific language governing permissions and
bogdanm 20:4263a77256ae 14 * limitations under the License.
bogdanm 20:4263a77256ae 15 *
bogdanm 20:4263a77256ae 16 * Ported to NXP LPC43XX by Micromint USA <support@micromint.com>
bogdanm 20:4263a77256ae 17 */
bogdanm 20:4263a77256ae 18 #include "analogin_api.h"
bogdanm 20:4263a77256ae 19 #include "cmsis.h"
bogdanm 20:4263a77256ae 20 #include "pinmap.h"
bogdanm 20:4263a77256ae 21 #include "error.h"
bogdanm 20:4263a77256ae 22
bogdanm 20:4263a77256ae 23 #define ANALOGIN_MEDIAN_FILTER 1
bogdanm 20:4263a77256ae 24
bogdanm 20:4263a77256ae 25 static inline int div_round_up(int x, int y) {
bogdanm 20:4263a77256ae 26 return (x + (y - 1)) / y;
bogdanm 20:4263a77256ae 27 }
bogdanm 20:4263a77256ae 28
bogdanm 20:4263a77256ae 29 // ToDo: Add support for ADC1
bogdanm 20:4263a77256ae 30 static const PinMap PinMap_ADC[] = {
bogdanm 20:4263a77256ae 31 {P_ADC0, ADC0_0, 0x08},
bogdanm 20:4263a77256ae 32 {P_ADC1, ADC0_1, 0x07},
bogdanm 20:4263a77256ae 33 {P_ADC2, ADC0_2, 0x01},
bogdanm 20:4263a77256ae 34 {P_ADC3, ADC0_3, 0x08},
bogdanm 20:4263a77256ae 35 {P_ADC4, ADC0_4, 0x08},
bogdanm 20:4263a77256ae 36 {P_ADC5, ADC0_5, 0x08},
bogdanm 20:4263a77256ae 37 {NC , NC , 0 }
bogdanm 20:4263a77256ae 38 };
bogdanm 20:4263a77256ae 39
bogdanm 20:4263a77256ae 40 void analogin_init(analogin_t *obj, PinName pin) {
bogdanm 20:4263a77256ae 41 uint8_t num, chan;
bogdanm 20:4263a77256ae 42
bogdanm 20:4263a77256ae 43 obj->adc = (ADCName)pinmap_peripheral(pin, PinMap_ADC);
bogdanm 20:4263a77256ae 44 if (obj->adc == (uint32_t)NC) {
bogdanm 20:4263a77256ae 45 error("ADC pin mapping failed");
bogdanm 20:4263a77256ae 46 }
bogdanm 20:4263a77256ae 47
bogdanm 20:4263a77256ae 48
bogdanm 20:4263a77256ae 49 // Configure the pin as GPIO input
bogdanm 20:4263a77256ae 50 if (pin < SFP_AIO0) {
bogdanm 20:4263a77256ae 51 pin_function(pin, (SCU_PINIO_PULLNONE | 0x0));
bogdanm 20:4263a77256ae 52 pin_mode(pin, PullNone);
bogdanm 20:4263a77256ae 53 num = (uint8_t)(obj->adc) / 8; // Heuristic?
bogdanm 20:4263a77256ae 54 chan = (uint8_t)(obj->adc) % 7;
bogdanm 20:4263a77256ae 55 } else {
bogdanm 20:4263a77256ae 56 num = MBED_ADC_NUM(pin);
bogdanm 20:4263a77256ae 57 chan = MBED_ADC_CHAN(pin);
bogdanm 20:4263a77256ae 58 }
bogdanm 20:4263a77256ae 59
bogdanm 20:4263a77256ae 60 // Calculate minimum clock divider
bogdanm 20:4263a77256ae 61 // clkdiv = divider - 1
bogdanm 20:4263a77256ae 62 uint32_t PCLK = SystemCoreClock;
bogdanm 20:4263a77256ae 63 uint32_t adcRate = 400000;
bogdanm 20:4263a77256ae 64 uint32_t clkdiv = div_round_up(PCLK, adcRate) - 1;
bogdanm 20:4263a77256ae 65
bogdanm 20:4263a77256ae 66 // Set the generic software-controlled ADC settings
bogdanm 20:4263a77256ae 67 LPC_ADC0->CR = (0 << 0) // SEL: 0 = no channels selected
bogdanm 20:4263a77256ae 68 | (clkdiv << 8) // CLKDIV:
bogdanm 20:4263a77256ae 69 | (0 << 16) // BURST: 0 = software control
bogdanm 20:4263a77256ae 70 | (1 << 21) // PDN: 1 = operational
bogdanm 20:4263a77256ae 71 | (0 << 24) // START: 0 = no start
bogdanm 20:4263a77256ae 72 | (0 << 27); // EDGE: not applicable
bogdanm 20:4263a77256ae 73
bogdanm 20:4263a77256ae 74 // Select ADC on analog function select register in SCU
bogdanm 20:4263a77256ae 75 LPC_SCU->ENAIO[num] |= 1UL << chan;
bogdanm 20:4263a77256ae 76 }
bogdanm 20:4263a77256ae 77
bogdanm 20:4263a77256ae 78 static inline uint32_t adc_read(analogin_t *obj) {
bogdanm 20:4263a77256ae 79 // Select the appropriate channel and start conversion
bogdanm 20:4263a77256ae 80 LPC_ADC0->CR &= ~0xFF;
bogdanm 20:4263a77256ae 81 LPC_ADC0->CR |= 1 << (int)obj->adc;
bogdanm 20:4263a77256ae 82 LPC_ADC0->CR |= 1 << 24;
bogdanm 20:4263a77256ae 83
bogdanm 20:4263a77256ae 84 // Repeatedly get the sample data until DONE bit
bogdanm 20:4263a77256ae 85 unsigned int data;
bogdanm 20:4263a77256ae 86 do {
bogdanm 20:4263a77256ae 87 data = LPC_ADC0->GDR;
bogdanm 20:4263a77256ae 88 } while ((data & ((unsigned int)1 << 31)) == 0);
bogdanm 20:4263a77256ae 89
bogdanm 20:4263a77256ae 90 // Stop conversion
bogdanm 20:4263a77256ae 91 LPC_ADC0->CR &= ~(1 << 24);
bogdanm 20:4263a77256ae 92
bogdanm 20:4263a77256ae 93 return (data >> 6) & ADC_RANGE; // 10 bit
bogdanm 20:4263a77256ae 94 }
bogdanm 20:4263a77256ae 95
bogdanm 20:4263a77256ae 96 static inline void order(uint32_t *a, uint32_t *b) {
bogdanm 20:4263a77256ae 97 if (*a > *b) {
bogdanm 20:4263a77256ae 98 uint32_t t = *a;
bogdanm 20:4263a77256ae 99 *a = *b;
bogdanm 20:4263a77256ae 100 *b = t;
bogdanm 20:4263a77256ae 101 }
bogdanm 20:4263a77256ae 102 }
bogdanm 20:4263a77256ae 103
bogdanm 20:4263a77256ae 104 static inline uint32_t adc_read_u32(analogin_t *obj) {
bogdanm 20:4263a77256ae 105 uint32_t value;
bogdanm 20:4263a77256ae 106 #if ANALOGIN_MEDIAN_FILTER
bogdanm 20:4263a77256ae 107 uint32_t v1 = adc_read(obj);
bogdanm 20:4263a77256ae 108 uint32_t v2 = adc_read(obj);
bogdanm 20:4263a77256ae 109 uint32_t v3 = adc_read(obj);
bogdanm 20:4263a77256ae 110 order(&v1, &v2);
bogdanm 20:4263a77256ae 111 order(&v2, &v3);
bogdanm 20:4263a77256ae 112 order(&v1, &v2);
bogdanm 20:4263a77256ae 113 value = v2;
bogdanm 20:4263a77256ae 114 #else
bogdanm 20:4263a77256ae 115 value = adc_read(obj);
bogdanm 20:4263a77256ae 116 #endif
bogdanm 20:4263a77256ae 117 return value;
bogdanm 20:4263a77256ae 118 }
bogdanm 20:4263a77256ae 119
bogdanm 20:4263a77256ae 120 uint16_t analogin_read_u16(analogin_t *obj) {
bogdanm 20:4263a77256ae 121 uint32_t value = adc_read_u32(obj);
bogdanm 20:4263a77256ae 122
bogdanm 20:4263a77256ae 123 return (value << 6) | ((value >> 4) & 0x003F); // 10 bit
bogdanm 20:4263a77256ae 124 }
bogdanm 20:4263a77256ae 125
bogdanm 20:4263a77256ae 126 float analogin_read(analogin_t *obj) {
bogdanm 20:4263a77256ae 127 uint32_t value = adc_read_u32(obj);
bogdanm 20:4263a77256ae 128 return (float)value * (1.0f / (float)ADC_RANGE);
bogdanm 20:4263a77256ae 129 }